2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
58 #include <trace/events/kvm.h>
60 #include <asm/debugreg.h>
64 #include <linux/kernel_stat.h>
65 #include <asm/fpu/internal.h> /* Ugh! */
66 #include <asm/pvclock.h>
67 #include <asm/div64.h>
68 #include <asm/irq_remapping.h>
70 #define CREATE_TRACE_POINTS
73 #define MAX_IO_MSRS 256
74 #define KVM_MAX_MCE_BANKS 32
75 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
76 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
78 #define emul_to_vcpu(ctxt) \
79 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
82 * - enable syscall per default because its emulated by KVM
83 * - enable LME and LMA per default on 64 bit KVM
87 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
89 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
92 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
93 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
95 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
96 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
98 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
99 static void process_nmi(struct kvm_vcpu
*vcpu
);
100 static void enter_smm(struct kvm_vcpu
*vcpu
);
101 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
103 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
104 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
106 static bool __read_mostly ignore_msrs
= 0;
107 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
109 unsigned int min_timer_period_us
= 500;
110 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
112 static bool __read_mostly kvmclock_periodic_sync
= true;
113 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
115 bool __read_mostly kvm_has_tsc_control
;
116 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
117 u32 __read_mostly kvm_max_guest_tsc_khz
;
118 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
119 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
120 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
121 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
122 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
123 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
124 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
126 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
127 static u32 __read_mostly tsc_tolerance_ppm
= 250;
128 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
130 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
131 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
132 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
134 static bool __read_mostly vector_hashing
= true;
135 module_param(vector_hashing
, bool, S_IRUGO
);
137 #define KVM_NR_SHARED_MSRS 16
139 struct kvm_shared_msrs_global
{
141 u32 msrs
[KVM_NR_SHARED_MSRS
];
144 struct kvm_shared_msrs
{
145 struct user_return_notifier urn
;
147 struct kvm_shared_msr_values
{
150 } values
[KVM_NR_SHARED_MSRS
];
153 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
154 static struct kvm_shared_msrs __percpu
*shared_msrs
;
156 struct kvm_stats_debugfs_item debugfs_entries
[] = {
157 { "pf_fixed", VCPU_STAT(pf_fixed
) },
158 { "pf_guest", VCPU_STAT(pf_guest
) },
159 { "tlb_flush", VCPU_STAT(tlb_flush
) },
160 { "invlpg", VCPU_STAT(invlpg
) },
161 { "exits", VCPU_STAT(exits
) },
162 { "io_exits", VCPU_STAT(io_exits
) },
163 { "mmio_exits", VCPU_STAT(mmio_exits
) },
164 { "signal_exits", VCPU_STAT(signal_exits
) },
165 { "irq_window", VCPU_STAT(irq_window_exits
) },
166 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
167 { "halt_exits", VCPU_STAT(halt_exits
) },
168 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
169 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
170 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
171 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
172 { "hypercalls", VCPU_STAT(hypercalls
) },
173 { "request_irq", VCPU_STAT(request_irq_exits
) },
174 { "irq_exits", VCPU_STAT(irq_exits
) },
175 { "host_state_reload", VCPU_STAT(host_state_reload
) },
176 { "efer_reload", VCPU_STAT(efer_reload
) },
177 { "fpu_reload", VCPU_STAT(fpu_reload
) },
178 { "insn_emulation", VCPU_STAT(insn_emulation
) },
179 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
180 { "irq_injections", VCPU_STAT(irq_injections
) },
181 { "nmi_injections", VCPU_STAT(nmi_injections
) },
182 { "req_event", VCPU_STAT(req_event
) },
183 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
184 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
185 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
186 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
187 { "mmu_flooded", VM_STAT(mmu_flooded
) },
188 { "mmu_recycled", VM_STAT(mmu_recycled
) },
189 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
190 { "mmu_unsync", VM_STAT(mmu_unsync
) },
191 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
192 { "largepages", VM_STAT(lpages
) },
193 { "max_mmu_page_hash_collisions",
194 VM_STAT(max_mmu_page_hash_collisions
) },
198 u64 __read_mostly host_xcr0
;
200 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
202 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
205 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
206 vcpu
->arch
.apf
.gfns
[i
] = ~0;
209 static void kvm_on_user_return(struct user_return_notifier
*urn
)
212 struct kvm_shared_msrs
*locals
213 = container_of(urn
, struct kvm_shared_msrs
, urn
);
214 struct kvm_shared_msr_values
*values
;
218 * Disabling irqs at this point since the following code could be
219 * interrupted and executed through kvm_arch_hardware_disable()
221 local_irq_save(flags
);
222 if (locals
->registered
) {
223 locals
->registered
= false;
224 user_return_notifier_unregister(urn
);
226 local_irq_restore(flags
);
227 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
228 values
= &locals
->values
[slot
];
229 if (values
->host
!= values
->curr
) {
230 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
231 values
->curr
= values
->host
;
236 static void shared_msr_update(unsigned slot
, u32 msr
)
239 unsigned int cpu
= smp_processor_id();
240 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
242 /* only read, and nobody should modify it at this time,
243 * so don't need lock */
244 if (slot
>= shared_msrs_global
.nr
) {
245 printk(KERN_ERR
"kvm: invalid MSR slot!");
248 rdmsrl_safe(msr
, &value
);
249 smsr
->values
[slot
].host
= value
;
250 smsr
->values
[slot
].curr
= value
;
253 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
255 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
256 shared_msrs_global
.msrs
[slot
] = msr
;
257 if (slot
>= shared_msrs_global
.nr
)
258 shared_msrs_global
.nr
= slot
+ 1;
260 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
262 static void kvm_shared_msr_cpu_online(void)
266 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
267 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
270 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
272 unsigned int cpu
= smp_processor_id();
273 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
276 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
278 smsr
->values
[slot
].curr
= value
;
279 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
283 if (!smsr
->registered
) {
284 smsr
->urn
.on_user_return
= kvm_on_user_return
;
285 user_return_notifier_register(&smsr
->urn
);
286 smsr
->registered
= true;
290 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
292 static void drop_user_return_notifiers(void)
294 unsigned int cpu
= smp_processor_id();
295 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
297 if (smsr
->registered
)
298 kvm_on_user_return(&smsr
->urn
);
301 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
303 return vcpu
->arch
.apic_base
;
305 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
307 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
309 u64 old_state
= vcpu
->arch
.apic_base
&
310 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
311 u64 new_state
= msr_info
->data
&
312 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
313 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
314 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
316 if (!msr_info
->host_initiated
&&
317 ((msr_info
->data
& reserved_bits
) != 0 ||
318 new_state
== X2APIC_ENABLE
||
319 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
320 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
321 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
325 kvm_lapic_set_base(vcpu
, msr_info
->data
);
328 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
330 asmlinkage __visible
void kvm_spurious_fault(void)
332 /* Fault while not rebooting. We want the trace. */
335 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
337 #define EXCPT_BENIGN 0
338 #define EXCPT_CONTRIBUTORY 1
341 static int exception_class(int vector
)
351 return EXCPT_CONTRIBUTORY
;
358 #define EXCPT_FAULT 0
360 #define EXCPT_ABORT 2
361 #define EXCPT_INTERRUPT 3
363 static int exception_type(int vector
)
367 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
368 return EXCPT_INTERRUPT
;
372 /* #DB is trap, as instruction watchpoints are handled elsewhere */
373 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
376 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
379 /* Reserved exceptions will result in fault */
383 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
384 unsigned nr
, bool has_error
, u32 error_code
,
390 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
392 if (!vcpu
->arch
.exception
.pending
) {
394 if (has_error
&& !is_protmode(vcpu
))
396 vcpu
->arch
.exception
.pending
= true;
397 vcpu
->arch
.exception
.has_error_code
= has_error
;
398 vcpu
->arch
.exception
.nr
= nr
;
399 vcpu
->arch
.exception
.error_code
= error_code
;
400 vcpu
->arch
.exception
.reinject
= reinject
;
404 /* to check exception */
405 prev_nr
= vcpu
->arch
.exception
.nr
;
406 if (prev_nr
== DF_VECTOR
) {
407 /* triple fault -> shutdown */
408 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
411 class1
= exception_class(prev_nr
);
412 class2
= exception_class(nr
);
413 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
414 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
415 /* generate double fault per SDM Table 5-5 */
416 vcpu
->arch
.exception
.pending
= true;
417 vcpu
->arch
.exception
.has_error_code
= true;
418 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
419 vcpu
->arch
.exception
.error_code
= 0;
421 /* replace previous exception with a new one in a hope
422 that instruction re-execution will regenerate lost
427 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
429 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
431 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
433 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
435 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
437 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
439 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
442 kvm_inject_gp(vcpu
, 0);
444 return kvm_skip_emulated_instruction(vcpu
);
448 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
450 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
452 ++vcpu
->stat
.pf_guest
;
453 vcpu
->arch
.exception
.nested_apf
=
454 is_guest_mode(vcpu
) && fault
->async_page_fault
;
455 if (vcpu
->arch
.exception
.nested_apf
)
456 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
458 vcpu
->arch
.cr2
= fault
->address
;
459 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
461 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
463 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
465 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
466 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
468 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
470 return fault
->nested_page_fault
;
473 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
475 atomic_inc(&vcpu
->arch
.nmi_queued
);
476 kvm_make_request(KVM_REQ_NMI
, vcpu
);
478 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
480 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
482 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
484 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
486 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
488 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
490 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
493 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
494 * a #GP and return false.
496 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
498 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
500 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
503 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
505 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
507 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
510 kvm_queue_exception(vcpu
, UD_VECTOR
);
513 EXPORT_SYMBOL_GPL(kvm_require_dr
);
516 * This function will be used to read from the physical memory of the currently
517 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
518 * can read from guest physical or from the guest's guest physical memory.
520 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
521 gfn_t ngfn
, void *data
, int offset
, int len
,
524 struct x86_exception exception
;
528 ngpa
= gfn_to_gpa(ngfn
);
529 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
530 if (real_gfn
== UNMAPPED_GVA
)
533 real_gfn
= gpa_to_gfn(real_gfn
);
535 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
537 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
539 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
540 void *data
, int offset
, int len
, u32 access
)
542 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
543 data
, offset
, len
, access
);
547 * Load the pae pdptrs. Return true is they are all valid.
549 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
551 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
552 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
555 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
557 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
558 offset
* sizeof(u64
), sizeof(pdpte
),
559 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
564 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
565 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
567 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
574 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
575 __set_bit(VCPU_EXREG_PDPTR
,
576 (unsigned long *)&vcpu
->arch
.regs_avail
);
577 __set_bit(VCPU_EXREG_PDPTR
,
578 (unsigned long *)&vcpu
->arch
.regs_dirty
);
583 EXPORT_SYMBOL_GPL(load_pdptrs
);
585 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
587 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
593 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
596 if (!test_bit(VCPU_EXREG_PDPTR
,
597 (unsigned long *)&vcpu
->arch
.regs_avail
))
600 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
601 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
602 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
603 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
606 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
611 EXPORT_SYMBOL_GPL(pdptrs_changed
);
613 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
615 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
616 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
621 if (cr0
& 0xffffffff00000000UL
)
625 cr0
&= ~CR0_RESERVED_BITS
;
627 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
630 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
633 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
635 if ((vcpu
->arch
.efer
& EFER_LME
)) {
640 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
645 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
650 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
653 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
655 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
656 kvm_clear_async_pf_completion_queue(vcpu
);
657 kvm_async_pf_hash_reset(vcpu
);
660 if ((cr0
^ old_cr0
) & update_bits
)
661 kvm_mmu_reset_context(vcpu
);
663 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
664 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
665 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
666 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
670 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
672 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
674 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
676 EXPORT_SYMBOL_GPL(kvm_lmsw
);
678 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
680 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
681 !vcpu
->guest_xcr0_loaded
) {
682 /* kvm_set_xcr() also depends on this */
683 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
684 vcpu
->guest_xcr0_loaded
= 1;
688 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
690 if (vcpu
->guest_xcr0_loaded
) {
691 if (vcpu
->arch
.xcr0
!= host_xcr0
)
692 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
693 vcpu
->guest_xcr0_loaded
= 0;
697 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
700 u64 old_xcr0
= vcpu
->arch
.xcr0
;
703 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
704 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
706 if (!(xcr0
& XFEATURE_MASK_FP
))
708 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
712 * Do not allow the guest to set bits that we do not support
713 * saving. However, xcr0 bit 0 is always set, even if the
714 * emulated CPU does not support XSAVE (see fx_init).
716 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
717 if (xcr0
& ~valid_bits
)
720 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
721 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
724 if (xcr0
& XFEATURE_MASK_AVX512
) {
725 if (!(xcr0
& XFEATURE_MASK_YMM
))
727 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
730 vcpu
->arch
.xcr0
= xcr0
;
732 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
733 kvm_update_cpuid(vcpu
);
737 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
739 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
740 __kvm_set_xcr(vcpu
, index
, xcr
)) {
741 kvm_inject_gp(vcpu
, 0);
746 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
748 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
750 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
751 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
752 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
754 if (cr4
& CR4_RESERVED_BITS
)
757 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
760 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
763 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
766 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
769 if (!guest_cpuid_has_pku(vcpu
) && (cr4
& X86_CR4_PKE
))
772 if (is_long_mode(vcpu
)) {
773 if (!(cr4
& X86_CR4_PAE
))
775 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
776 && ((cr4
^ old_cr4
) & pdptr_bits
)
777 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
781 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
782 if (!guest_cpuid_has_pcid(vcpu
))
785 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
786 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
790 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
793 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
794 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
795 kvm_mmu_reset_context(vcpu
);
797 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
798 kvm_update_cpuid(vcpu
);
802 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
804 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
807 cr3
&= ~CR3_PCID_INVD
;
810 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
811 kvm_mmu_sync_roots(vcpu
);
812 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
816 if (is_long_mode(vcpu
)) {
817 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
819 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
820 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
823 vcpu
->arch
.cr3
= cr3
;
824 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
825 kvm_mmu_new_cr3(vcpu
);
828 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
830 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
832 if (cr8
& CR8_RESERVED_BITS
)
834 if (lapic_in_kernel(vcpu
))
835 kvm_lapic_set_tpr(vcpu
, cr8
);
837 vcpu
->arch
.cr8
= cr8
;
840 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
842 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
844 if (lapic_in_kernel(vcpu
))
845 return kvm_lapic_get_cr8(vcpu
);
847 return vcpu
->arch
.cr8
;
849 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
851 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
855 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
856 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
857 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
858 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
862 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
864 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
865 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
868 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
872 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
873 dr7
= vcpu
->arch
.guest_debug_dr7
;
875 dr7
= vcpu
->arch
.dr7
;
876 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
877 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
878 if (dr7
& DR7_BP_EN_MASK
)
879 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
882 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
884 u64 fixed
= DR6_FIXED_1
;
886 if (!guest_cpuid_has_rtm(vcpu
))
891 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
895 vcpu
->arch
.db
[dr
] = val
;
896 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
897 vcpu
->arch
.eff_db
[dr
] = val
;
902 if (val
& 0xffffffff00000000ULL
)
904 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
905 kvm_update_dr6(vcpu
);
910 if (val
& 0xffffffff00000000ULL
)
912 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
913 kvm_update_dr7(vcpu
);
920 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
922 if (__kvm_set_dr(vcpu
, dr
, val
)) {
923 kvm_inject_gp(vcpu
, 0);
928 EXPORT_SYMBOL_GPL(kvm_set_dr
);
930 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
934 *val
= vcpu
->arch
.db
[dr
];
939 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
940 *val
= vcpu
->arch
.dr6
;
942 *val
= kvm_x86_ops
->get_dr6(vcpu
);
947 *val
= vcpu
->arch
.dr7
;
952 EXPORT_SYMBOL_GPL(kvm_get_dr
);
954 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
956 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
960 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
963 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
964 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
967 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
970 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
971 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
973 * This list is modified at module load time to reflect the
974 * capabilities of the host cpu. This capabilities test skips MSRs that are
975 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
976 * may depend on host virtualization features rather than host cpu features.
979 static u32 msrs_to_save
[] = {
980 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
983 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
985 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
986 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
989 static unsigned num_msrs_to_save
;
991 static u32 emulated_msrs
[] = {
992 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
993 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
994 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
995 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
996 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
997 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1000 HV_X64_MSR_VP_RUNTIME
,
1001 HV_X64_MSR_SCONTROL
,
1002 HV_X64_MSR_STIMER0_CONFIG
,
1003 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1006 MSR_IA32_TSC_ADJUST
,
1007 MSR_IA32_TSCDEADLINE
,
1008 MSR_IA32_MISC_ENABLE
,
1009 MSR_IA32_MCG_STATUS
,
1011 MSR_IA32_MCG_EXT_CTL
,
1014 MSR_MISC_FEATURES_ENABLES
,
1017 static unsigned num_emulated_msrs
;
1019 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1021 if (efer
& efer_reserved_bits
)
1024 if (efer
& EFER_FFXSR
) {
1025 struct kvm_cpuid_entry2
*feat
;
1027 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1028 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
1032 if (efer
& EFER_SVME
) {
1033 struct kvm_cpuid_entry2
*feat
;
1035 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1036 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1042 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1044 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1046 u64 old_efer
= vcpu
->arch
.efer
;
1048 if (!kvm_valid_efer(vcpu
, efer
))
1052 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1056 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1058 kvm_x86_ops
->set_efer(vcpu
, efer
);
1060 /* Update reserved bits */
1061 if ((efer
^ old_efer
) & EFER_NX
)
1062 kvm_mmu_reset_context(vcpu
);
1067 void kvm_enable_efer_bits(u64 mask
)
1069 efer_reserved_bits
&= ~mask
;
1071 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1074 * Writes msr value into into the appropriate "register".
1075 * Returns 0 on success, non-0 otherwise.
1076 * Assumes vcpu_load() was already called.
1078 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1080 switch (msr
->index
) {
1083 case MSR_KERNEL_GS_BASE
:
1086 if (is_noncanonical_address(msr
->data
))
1089 case MSR_IA32_SYSENTER_EIP
:
1090 case MSR_IA32_SYSENTER_ESP
:
1092 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1093 * non-canonical address is written on Intel but not on
1094 * AMD (which ignores the top 32-bits, because it does
1095 * not implement 64-bit SYSENTER).
1097 * 64-bit code should hence be able to write a non-canonical
1098 * value on AMD. Making the address canonical ensures that
1099 * vmentry does not fail on Intel after writing a non-canonical
1100 * value, and that something deterministic happens if the guest
1101 * invokes 64-bit SYSENTER.
1103 msr
->data
= get_canonical(msr
->data
);
1105 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1107 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1110 * Adapt set_msr() to msr_io()'s calling convention
1112 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1114 struct msr_data msr
;
1118 msr
.host_initiated
= true;
1119 r
= kvm_get_msr(vcpu
, &msr
);
1127 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1129 struct msr_data msr
;
1133 msr
.host_initiated
= true;
1134 return kvm_set_msr(vcpu
, &msr
);
1137 #ifdef CONFIG_X86_64
1138 struct pvclock_gtod_data
{
1141 struct { /* extract of a clocksource struct */
1154 static struct pvclock_gtod_data pvclock_gtod_data
;
1156 static void update_pvclock_gtod(struct timekeeper
*tk
)
1158 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1161 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1163 write_seqcount_begin(&vdata
->seq
);
1165 /* copy pvclock gtod data */
1166 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1167 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1168 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1169 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1170 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1172 vdata
->boot_ns
= boot_ns
;
1173 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1175 vdata
->wall_time_sec
= tk
->xtime_sec
;
1177 write_seqcount_end(&vdata
->seq
);
1181 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1184 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1185 * vcpu_enter_guest. This function is only called from
1186 * the physical CPU that is running vcpu.
1188 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1191 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1195 struct pvclock_wall_clock wc
;
1196 struct timespec64 boot
;
1201 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1206 ++version
; /* first time write, random junk */
1210 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1214 * The guest calculates current wall clock time by adding
1215 * system time (updated by kvm_guest_time_update below) to the
1216 * wall clock specified here. guest system time equals host
1217 * system time for us, thus we must fill in host boot time here.
1219 getboottime64(&boot
);
1221 if (kvm
->arch
.kvmclock_offset
) {
1222 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1223 boot
= timespec64_sub(boot
, ts
);
1225 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1226 wc
.nsec
= boot
.tv_nsec
;
1227 wc
.version
= version
;
1229 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1232 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1235 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1237 do_shl32_div32(dividend
, divisor
);
1241 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1242 s8
*pshift
, u32
*pmultiplier
)
1250 scaled64
= scaled_hz
;
1251 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1256 tps32
= (uint32_t)tps64
;
1257 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1258 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1266 *pmultiplier
= div_frac(scaled64
, tps32
);
1268 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1269 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1272 #ifdef CONFIG_X86_64
1273 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1276 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1277 static unsigned long max_tsc_khz
;
1279 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1281 u64 v
= (u64
)khz
* (1000000 + ppm
);
1286 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1290 /* Guest TSC same frequency as host TSC? */
1292 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1296 /* TSC scaling supported? */
1297 if (!kvm_has_tsc_control
) {
1298 if (user_tsc_khz
> tsc_khz
) {
1299 vcpu
->arch
.tsc_catchup
= 1;
1300 vcpu
->arch
.tsc_always_catchup
= 1;
1303 WARN(1, "user requested TSC rate below hardware speed\n");
1308 /* TSC scaling required - calculate ratio */
1309 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1310 user_tsc_khz
, tsc_khz
);
1312 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1313 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1318 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1322 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1324 u32 thresh_lo
, thresh_hi
;
1325 int use_scaling
= 0;
1327 /* tsc_khz can be zero if TSC calibration fails */
1328 if (user_tsc_khz
== 0) {
1329 /* set tsc_scaling_ratio to a safe value */
1330 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1334 /* Compute a scale to convert nanoseconds in TSC cycles */
1335 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1336 &vcpu
->arch
.virtual_tsc_shift
,
1337 &vcpu
->arch
.virtual_tsc_mult
);
1338 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1341 * Compute the variation in TSC rate which is acceptable
1342 * within the range of tolerance and decide if the
1343 * rate being applied is within that bounds of the hardware
1344 * rate. If so, no scaling or compensation need be done.
1346 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1347 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1348 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1349 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1352 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1355 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1357 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1358 vcpu
->arch
.virtual_tsc_mult
,
1359 vcpu
->arch
.virtual_tsc_shift
);
1360 tsc
+= vcpu
->arch
.this_tsc_write
;
1364 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1366 #ifdef CONFIG_X86_64
1368 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1369 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1371 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1372 atomic_read(&vcpu
->kvm
->online_vcpus
));
1375 * Once the masterclock is enabled, always perform request in
1376 * order to update it.
1378 * In order to enable masterclock, the host clocksource must be TSC
1379 * and the vcpus need to have matched TSCs. When that happens,
1380 * perform request to enable masterclock.
1382 if (ka
->use_master_clock
||
1383 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1384 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1386 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1387 atomic_read(&vcpu
->kvm
->online_vcpus
),
1388 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1392 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1394 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1395 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1399 * Multiply tsc by a fixed point number represented by ratio.
1401 * The most significant 64-N bits (mult) of ratio represent the
1402 * integral part of the fixed point number; the remaining N bits
1403 * (frac) represent the fractional part, ie. ratio represents a fixed
1404 * point number (mult + frac * 2^(-N)).
1406 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1408 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1410 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1413 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1416 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1418 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1419 _tsc
= __scale_tsc(ratio
, tsc
);
1423 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1425 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1429 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1431 return target_tsc
- tsc
;
1434 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1436 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1438 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1440 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1442 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1443 vcpu
->arch
.tsc_offset
= offset
;
1446 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1448 struct kvm
*kvm
= vcpu
->kvm
;
1449 u64 offset
, ns
, elapsed
;
1450 unsigned long flags
;
1452 bool already_matched
;
1453 u64 data
= msr
->data
;
1454 bool synchronizing
= false;
1456 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1457 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1458 ns
= ktime_get_boot_ns();
1459 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1461 if (vcpu
->arch
.virtual_tsc_khz
) {
1462 if (data
== 0 && msr
->host_initiated
) {
1464 * detection of vcpu initialization -- need to sync
1465 * with other vCPUs. This particularly helps to keep
1466 * kvm_clock stable after CPU hotplug
1468 synchronizing
= true;
1470 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1471 nsec_to_cycles(vcpu
, elapsed
);
1472 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1474 * Special case: TSC write with a small delta (1 second)
1475 * of virtual cycle time against real time is
1476 * interpreted as an attempt to synchronize the CPU.
1478 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1479 data
+ tsc_hz
> tsc_exp
;
1484 * For a reliable TSC, we can match TSC offsets, and for an unstable
1485 * TSC, we add elapsed time in this computation. We could let the
1486 * compensation code attempt to catch up if we fall behind, but
1487 * it's better to try to match offsets from the beginning.
1489 if (synchronizing
&&
1490 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1491 if (!check_tsc_unstable()) {
1492 offset
= kvm
->arch
.cur_tsc_offset
;
1493 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1495 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1497 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1498 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1501 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1504 * We split periods of matched TSC writes into generations.
1505 * For each generation, we track the original measured
1506 * nanosecond time, offset, and write, so if TSCs are in
1507 * sync, we can match exact offset, and if not, we can match
1508 * exact software computation in compute_guest_tsc()
1510 * These values are tracked in kvm->arch.cur_xxx variables.
1512 kvm
->arch
.cur_tsc_generation
++;
1513 kvm
->arch
.cur_tsc_nsec
= ns
;
1514 kvm
->arch
.cur_tsc_write
= data
;
1515 kvm
->arch
.cur_tsc_offset
= offset
;
1517 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1518 kvm
->arch
.cur_tsc_generation
, data
);
1522 * We also track th most recent recorded KHZ, write and time to
1523 * allow the matching interval to be extended at each write.
1525 kvm
->arch
.last_tsc_nsec
= ns
;
1526 kvm
->arch
.last_tsc_write
= data
;
1527 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1529 vcpu
->arch
.last_guest_tsc
= data
;
1531 /* Keep track of which generation this VCPU has synchronized to */
1532 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1533 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1534 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1536 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1537 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1538 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1539 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1541 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1543 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1544 } else if (!already_matched
) {
1545 kvm
->arch
.nr_vcpus_matched_tsc
++;
1548 kvm_track_tsc_matching(vcpu
);
1549 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1552 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1554 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1557 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1560 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1562 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1563 WARN_ON(adjustment
< 0);
1564 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1565 adjust_tsc_offset_guest(vcpu
, adjustment
);
1568 #ifdef CONFIG_X86_64
1570 static u64
read_tsc(void)
1572 u64 ret
= (u64
)rdtsc_ordered();
1573 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1575 if (likely(ret
>= last
))
1579 * GCC likes to generate cmov here, but this branch is extremely
1580 * predictable (it's just a function of time and the likely is
1581 * very likely) and there's a data dependence, so force GCC
1582 * to generate a branch instead. I don't barrier() because
1583 * we don't actually need a barrier, and if this function
1584 * ever gets inlined it will generate worse code.
1590 static inline u64
vgettsc(u64
*cycle_now
)
1593 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1595 *cycle_now
= read_tsc();
1597 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1598 return v
* gtod
->clock
.mult
;
1601 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1603 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1609 seq
= read_seqcount_begin(>od
->seq
);
1610 mode
= gtod
->clock
.vclock_mode
;
1611 ns
= gtod
->nsec_base
;
1612 ns
+= vgettsc(cycle_now
);
1613 ns
>>= gtod
->clock
.shift
;
1614 ns
+= gtod
->boot_ns
;
1615 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1621 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1623 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1629 seq
= read_seqcount_begin(>od
->seq
);
1630 mode
= gtod
->clock
.vclock_mode
;
1631 ts
->tv_sec
= gtod
->wall_time_sec
;
1632 ns
= gtod
->nsec_base
;
1633 ns
+= vgettsc(cycle_now
);
1634 ns
>>= gtod
->clock
.shift
;
1635 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1637 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1643 /* returns true if host is using tsc clocksource */
1644 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1646 /* checked again under seqlock below */
1647 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1650 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1653 /* returns true if host is using tsc clocksource */
1654 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1657 /* checked again under seqlock below */
1658 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1661 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1667 * Assuming a stable TSC across physical CPUS, and a stable TSC
1668 * across virtual CPUs, the following condition is possible.
1669 * Each numbered line represents an event visible to both
1670 * CPUs at the next numbered event.
1672 * "timespecX" represents host monotonic time. "tscX" represents
1675 * VCPU0 on CPU0 | VCPU1 on CPU1
1677 * 1. read timespec0,tsc0
1678 * 2. | timespec1 = timespec0 + N
1680 * 3. transition to guest | transition to guest
1681 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1682 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1683 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1685 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1688 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1690 * - 0 < N - M => M < N
1692 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1693 * always the case (the difference between two distinct xtime instances
1694 * might be smaller then the difference between corresponding TSC reads,
1695 * when updating guest vcpus pvclock areas).
1697 * To avoid that problem, do not allow visibility of distinct
1698 * system_timestamp/tsc_timestamp values simultaneously: use a master
1699 * copy of host monotonic time values. Update that master copy
1702 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1706 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1708 #ifdef CONFIG_X86_64
1709 struct kvm_arch
*ka
= &kvm
->arch
;
1711 bool host_tsc_clocksource
, vcpus_matched
;
1713 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1714 atomic_read(&kvm
->online_vcpus
));
1717 * If the host uses TSC clock, then passthrough TSC as stable
1720 host_tsc_clocksource
= kvm_get_time_and_clockread(
1721 &ka
->master_kernel_ns
,
1722 &ka
->master_cycle_now
);
1724 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1725 && !ka
->backwards_tsc_observed
1726 && !ka
->boot_vcpu_runs_old_kvmclock
;
1728 if (ka
->use_master_clock
)
1729 atomic_set(&kvm_guest_has_master_clock
, 1);
1731 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1732 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1737 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1739 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1742 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1744 #ifdef CONFIG_X86_64
1746 struct kvm_vcpu
*vcpu
;
1747 struct kvm_arch
*ka
= &kvm
->arch
;
1749 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1750 kvm_make_mclock_inprogress_request(kvm
);
1751 /* no guest entries from this point */
1752 pvclock_update_vm_gtod_copy(kvm
);
1754 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1755 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1757 /* guest entries allowed */
1758 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1759 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1761 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1765 u64
get_kvmclock_ns(struct kvm
*kvm
)
1767 struct kvm_arch
*ka
= &kvm
->arch
;
1768 struct pvclock_vcpu_time_info hv_clock
;
1771 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1772 if (!ka
->use_master_clock
) {
1773 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1774 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1777 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1778 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1779 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1781 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1784 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1785 &hv_clock
.tsc_shift
,
1786 &hv_clock
.tsc_to_system_mul
);
1787 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1794 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1796 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1797 struct pvclock_vcpu_time_info guest_hv_clock
;
1799 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1800 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1803 /* This VCPU is paused, but it's legal for a guest to read another
1804 * VCPU's kvmclock, so we really have to follow the specification where
1805 * it says that version is odd if data is being modified, and even after
1808 * Version field updates must be kept separate. This is because
1809 * kvm_write_guest_cached might use a "rep movs" instruction, and
1810 * writes within a string instruction are weakly ordered. So there
1811 * are three writes overall.
1813 * As a small optimization, only write the version field in the first
1814 * and third write. The vcpu->pv_time cache is still valid, because the
1815 * version field is the first in the struct.
1817 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1819 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1820 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1822 sizeof(vcpu
->hv_clock
.version
));
1826 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1827 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1829 if (vcpu
->pvclock_set_guest_stopped_request
) {
1830 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1831 vcpu
->pvclock_set_guest_stopped_request
= false;
1834 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1836 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1838 sizeof(vcpu
->hv_clock
));
1842 vcpu
->hv_clock
.version
++;
1843 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1845 sizeof(vcpu
->hv_clock
.version
));
1848 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1850 unsigned long flags
, tgt_tsc_khz
;
1851 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1852 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1854 u64 tsc_timestamp
, host_tsc
;
1856 bool use_master_clock
;
1862 * If the host uses TSC clock, then passthrough TSC as stable
1865 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1866 use_master_clock
= ka
->use_master_clock
;
1867 if (use_master_clock
) {
1868 host_tsc
= ka
->master_cycle_now
;
1869 kernel_ns
= ka
->master_kernel_ns
;
1871 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1873 /* Keep irq disabled to prevent changes to the clock */
1874 local_irq_save(flags
);
1875 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1876 if (unlikely(tgt_tsc_khz
== 0)) {
1877 local_irq_restore(flags
);
1878 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1881 if (!use_master_clock
) {
1883 kernel_ns
= ktime_get_boot_ns();
1886 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1889 * We may have to catch up the TSC to match elapsed wall clock
1890 * time for two reasons, even if kvmclock is used.
1891 * 1) CPU could have been running below the maximum TSC rate
1892 * 2) Broken TSC compensation resets the base at each VCPU
1893 * entry to avoid unknown leaps of TSC even when running
1894 * again on the same CPU. This may cause apparent elapsed
1895 * time to disappear, and the guest to stand still or run
1898 if (vcpu
->tsc_catchup
) {
1899 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1900 if (tsc
> tsc_timestamp
) {
1901 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1902 tsc_timestamp
= tsc
;
1906 local_irq_restore(flags
);
1908 /* With all the info we got, fill in the values */
1910 if (kvm_has_tsc_control
)
1911 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1913 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1914 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1915 &vcpu
->hv_clock
.tsc_shift
,
1916 &vcpu
->hv_clock
.tsc_to_system_mul
);
1917 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1920 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1921 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1922 vcpu
->last_guest_tsc
= tsc_timestamp
;
1924 /* If the host uses TSC clocksource, then it is stable */
1926 if (use_master_clock
)
1927 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1929 vcpu
->hv_clock
.flags
= pvclock_flags
;
1931 if (vcpu
->pv_time_enabled
)
1932 kvm_setup_pvclock_page(v
);
1933 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1934 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1939 * kvmclock updates which are isolated to a given vcpu, such as
1940 * vcpu->cpu migration, should not allow system_timestamp from
1941 * the rest of the vcpus to remain static. Otherwise ntp frequency
1942 * correction applies to one vcpu's system_timestamp but not
1945 * So in those cases, request a kvmclock update for all vcpus.
1946 * We need to rate-limit these requests though, as they can
1947 * considerably slow guests that have a large number of vcpus.
1948 * The time for a remote vcpu to update its kvmclock is bound
1949 * by the delay we use to rate-limit the updates.
1952 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1954 static void kvmclock_update_fn(struct work_struct
*work
)
1957 struct delayed_work
*dwork
= to_delayed_work(work
);
1958 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1959 kvmclock_update_work
);
1960 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1961 struct kvm_vcpu
*vcpu
;
1963 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1964 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1965 kvm_vcpu_kick(vcpu
);
1969 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1971 struct kvm
*kvm
= v
->kvm
;
1973 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1974 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1975 KVMCLOCK_UPDATE_DELAY
);
1978 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1980 static void kvmclock_sync_fn(struct work_struct
*work
)
1982 struct delayed_work
*dwork
= to_delayed_work(work
);
1983 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1984 kvmclock_sync_work
);
1985 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1987 if (!kvmclock_periodic_sync
)
1990 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1991 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1992 KVMCLOCK_SYNC_PERIOD
);
1995 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1997 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1998 unsigned bank_num
= mcg_cap
& 0xff;
2001 case MSR_IA32_MCG_STATUS
:
2002 vcpu
->arch
.mcg_status
= data
;
2004 case MSR_IA32_MCG_CTL
:
2005 if (!(mcg_cap
& MCG_CTL_P
))
2007 if (data
!= 0 && data
!= ~(u64
)0)
2009 vcpu
->arch
.mcg_ctl
= data
;
2012 if (msr
>= MSR_IA32_MC0_CTL
&&
2013 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2014 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2015 /* only 0 or all 1s can be written to IA32_MCi_CTL
2016 * some Linux kernels though clear bit 10 in bank 4 to
2017 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2018 * this to avoid an uncatched #GP in the guest
2020 if ((offset
& 0x3) == 0 &&
2021 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2023 vcpu
->arch
.mce_banks
[offset
] = data
;
2031 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2033 struct kvm
*kvm
= vcpu
->kvm
;
2034 int lm
= is_long_mode(vcpu
);
2035 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2036 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2037 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2038 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2039 u32 page_num
= data
& ~PAGE_MASK
;
2040 u64 page_addr
= data
& PAGE_MASK
;
2045 if (page_num
>= blob_size
)
2048 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2053 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2062 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2064 gpa_t gpa
= data
& ~0x3f;
2066 /* Bits 3:5 are reserved, Should be zero */
2070 vcpu
->arch
.apf
.msr_val
= data
;
2072 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2073 kvm_clear_async_pf_completion_queue(vcpu
);
2074 kvm_async_pf_hash_reset(vcpu
);
2078 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2082 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2083 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2084 kvm_async_pf_wakeup_all(vcpu
);
2088 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2090 vcpu
->arch
.pv_time_enabled
= false;
2093 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2095 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2098 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2099 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2102 vcpu
->arch
.st
.steal
.preempted
= 0;
2104 if (vcpu
->arch
.st
.steal
.version
& 1)
2105 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2107 vcpu
->arch
.st
.steal
.version
+= 1;
2109 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2110 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2114 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2115 vcpu
->arch
.st
.last_steal
;
2116 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2118 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2119 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2123 vcpu
->arch
.st
.steal
.version
+= 1;
2125 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2126 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2129 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2132 u32 msr
= msr_info
->index
;
2133 u64 data
= msr_info
->data
;
2136 case MSR_AMD64_NB_CFG
:
2137 case MSR_IA32_UCODE_REV
:
2138 case MSR_IA32_UCODE_WRITE
:
2139 case MSR_VM_HSAVE_PA
:
2140 case MSR_AMD64_PATCH_LOADER
:
2141 case MSR_AMD64_BU_CFG2
:
2142 case MSR_AMD64_DC_CFG
:
2146 return set_efer(vcpu
, data
);
2148 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2149 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2150 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2151 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2153 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2158 case MSR_FAM10H_MMIO_CONF_BASE
:
2160 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2165 case MSR_IA32_DEBUGCTLMSR
:
2167 /* We support the non-activated case already */
2169 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2170 /* Values other than LBR and BTF are vendor-specific,
2171 thus reserved and should throw a #GP */
2174 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2177 case 0x200 ... 0x2ff:
2178 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2179 case MSR_IA32_APICBASE
:
2180 return kvm_set_apic_base(vcpu
, msr_info
);
2181 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2182 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2183 case MSR_IA32_TSCDEADLINE
:
2184 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2186 case MSR_IA32_TSC_ADJUST
:
2187 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2188 if (!msr_info
->host_initiated
) {
2189 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2190 adjust_tsc_offset_guest(vcpu
, adj
);
2192 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2195 case MSR_IA32_MISC_ENABLE
:
2196 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2198 case MSR_IA32_SMBASE
:
2199 if (!msr_info
->host_initiated
)
2201 vcpu
->arch
.smbase
= data
;
2203 case MSR_KVM_WALL_CLOCK_NEW
:
2204 case MSR_KVM_WALL_CLOCK
:
2205 vcpu
->kvm
->arch
.wall_clock
= data
;
2206 kvm_write_wall_clock(vcpu
->kvm
, data
);
2208 case MSR_KVM_SYSTEM_TIME_NEW
:
2209 case MSR_KVM_SYSTEM_TIME
: {
2210 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2212 kvmclock_reset(vcpu
);
2214 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2215 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2217 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2218 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2220 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2223 vcpu
->arch
.time
= data
;
2224 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2226 /* we verify if the enable bit is set... */
2230 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2231 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2232 sizeof(struct pvclock_vcpu_time_info
)))
2233 vcpu
->arch
.pv_time_enabled
= false;
2235 vcpu
->arch
.pv_time_enabled
= true;
2239 case MSR_KVM_ASYNC_PF_EN
:
2240 if (kvm_pv_enable_async_pf(vcpu
, data
))
2243 case MSR_KVM_STEAL_TIME
:
2245 if (unlikely(!sched_info_on()))
2248 if (data
& KVM_STEAL_RESERVED_MASK
)
2251 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2252 data
& KVM_STEAL_VALID_BITS
,
2253 sizeof(struct kvm_steal_time
)))
2256 vcpu
->arch
.st
.msr_val
= data
;
2258 if (!(data
& KVM_MSR_ENABLED
))
2261 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2264 case MSR_KVM_PV_EOI_EN
:
2265 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2269 case MSR_IA32_MCG_CTL
:
2270 case MSR_IA32_MCG_STATUS
:
2271 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2272 return set_msr_mce(vcpu
, msr
, data
);
2274 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2275 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2276 pr
= true; /* fall through */
2277 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2278 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2279 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2280 return kvm_pmu_set_msr(vcpu
, msr_info
);
2282 if (pr
|| data
!= 0)
2283 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2284 "0x%x data 0x%llx\n", msr
, data
);
2286 case MSR_K7_CLK_CTL
:
2288 * Ignore all writes to this no longer documented MSR.
2289 * Writes are only relevant for old K7 processors,
2290 * all pre-dating SVM, but a recommended workaround from
2291 * AMD for these chips. It is possible to specify the
2292 * affected processor models on the command line, hence
2293 * the need to ignore the workaround.
2296 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2297 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2298 case HV_X64_MSR_CRASH_CTL
:
2299 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2300 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2301 msr_info
->host_initiated
);
2302 case MSR_IA32_BBL_CR_CTL3
:
2303 /* Drop writes to this legacy MSR -- see rdmsr
2304 * counterpart for further detail.
2306 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n", msr
, data
);
2308 case MSR_AMD64_OSVW_ID_LENGTH
:
2309 if (!guest_cpuid_has_osvw(vcpu
))
2311 vcpu
->arch
.osvw
.length
= data
;
2313 case MSR_AMD64_OSVW_STATUS
:
2314 if (!guest_cpuid_has_osvw(vcpu
))
2316 vcpu
->arch
.osvw
.status
= data
;
2318 case MSR_PLATFORM_INFO
:
2319 if (!msr_info
->host_initiated
||
2320 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2321 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2322 cpuid_fault_enabled(vcpu
)))
2324 vcpu
->arch
.msr_platform_info
= data
;
2326 case MSR_MISC_FEATURES_ENABLES
:
2327 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2328 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2329 !supports_cpuid_fault(vcpu
)))
2331 vcpu
->arch
.msr_misc_features_enables
= data
;
2334 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2335 return xen_hvm_config(vcpu
, data
);
2336 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2337 return kvm_pmu_set_msr(vcpu
, msr_info
);
2339 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2343 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2350 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2354 * Reads an msr value (of 'msr_index') into 'pdata'.
2355 * Returns 0 on success, non-0 otherwise.
2356 * Assumes vcpu_load() was already called.
2358 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2360 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2362 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2364 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2367 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2368 unsigned bank_num
= mcg_cap
& 0xff;
2371 case MSR_IA32_P5_MC_ADDR
:
2372 case MSR_IA32_P5_MC_TYPE
:
2375 case MSR_IA32_MCG_CAP
:
2376 data
= vcpu
->arch
.mcg_cap
;
2378 case MSR_IA32_MCG_CTL
:
2379 if (!(mcg_cap
& MCG_CTL_P
))
2381 data
= vcpu
->arch
.mcg_ctl
;
2383 case MSR_IA32_MCG_STATUS
:
2384 data
= vcpu
->arch
.mcg_status
;
2387 if (msr
>= MSR_IA32_MC0_CTL
&&
2388 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2389 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2390 data
= vcpu
->arch
.mce_banks
[offset
];
2399 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2401 switch (msr_info
->index
) {
2402 case MSR_IA32_PLATFORM_ID
:
2403 case MSR_IA32_EBL_CR_POWERON
:
2404 case MSR_IA32_DEBUGCTLMSR
:
2405 case MSR_IA32_LASTBRANCHFROMIP
:
2406 case MSR_IA32_LASTBRANCHTOIP
:
2407 case MSR_IA32_LASTINTFROMIP
:
2408 case MSR_IA32_LASTINTTOIP
:
2410 case MSR_K8_TSEG_ADDR
:
2411 case MSR_K8_TSEG_MASK
:
2413 case MSR_VM_HSAVE_PA
:
2414 case MSR_K8_INT_PENDING_MSG
:
2415 case MSR_AMD64_NB_CFG
:
2416 case MSR_FAM10H_MMIO_CONF_BASE
:
2417 case MSR_AMD64_BU_CFG2
:
2418 case MSR_IA32_PERF_CTL
:
2419 case MSR_AMD64_DC_CFG
:
2422 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2423 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2424 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2425 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2426 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2427 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2430 case MSR_IA32_UCODE_REV
:
2431 msr_info
->data
= 0x100000000ULL
;
2434 case 0x200 ... 0x2ff:
2435 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2436 case 0xcd: /* fsb frequency */
2440 * MSR_EBC_FREQUENCY_ID
2441 * Conservative value valid for even the basic CPU models.
2442 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2443 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2444 * and 266MHz for model 3, or 4. Set Core Clock
2445 * Frequency to System Bus Frequency Ratio to 1 (bits
2446 * 31:24) even though these are only valid for CPU
2447 * models > 2, however guests may end up dividing or
2448 * multiplying by zero otherwise.
2450 case MSR_EBC_FREQUENCY_ID
:
2451 msr_info
->data
= 1 << 24;
2453 case MSR_IA32_APICBASE
:
2454 msr_info
->data
= kvm_get_apic_base(vcpu
);
2456 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2457 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2459 case MSR_IA32_TSCDEADLINE
:
2460 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2462 case MSR_IA32_TSC_ADJUST
:
2463 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2465 case MSR_IA32_MISC_ENABLE
:
2466 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2468 case MSR_IA32_SMBASE
:
2469 if (!msr_info
->host_initiated
)
2471 msr_info
->data
= vcpu
->arch
.smbase
;
2473 case MSR_IA32_PERF_STATUS
:
2474 /* TSC increment by tick */
2475 msr_info
->data
= 1000ULL;
2476 /* CPU multiplier */
2477 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2480 msr_info
->data
= vcpu
->arch
.efer
;
2482 case MSR_KVM_WALL_CLOCK
:
2483 case MSR_KVM_WALL_CLOCK_NEW
:
2484 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2486 case MSR_KVM_SYSTEM_TIME
:
2487 case MSR_KVM_SYSTEM_TIME_NEW
:
2488 msr_info
->data
= vcpu
->arch
.time
;
2490 case MSR_KVM_ASYNC_PF_EN
:
2491 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2493 case MSR_KVM_STEAL_TIME
:
2494 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2496 case MSR_KVM_PV_EOI_EN
:
2497 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2499 case MSR_IA32_P5_MC_ADDR
:
2500 case MSR_IA32_P5_MC_TYPE
:
2501 case MSR_IA32_MCG_CAP
:
2502 case MSR_IA32_MCG_CTL
:
2503 case MSR_IA32_MCG_STATUS
:
2504 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2505 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2506 case MSR_K7_CLK_CTL
:
2508 * Provide expected ramp-up count for K7. All other
2509 * are set to zero, indicating minimum divisors for
2512 * This prevents guest kernels on AMD host with CPU
2513 * type 6, model 8 and higher from exploding due to
2514 * the rdmsr failing.
2516 msr_info
->data
= 0x20000000;
2518 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2519 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2520 case HV_X64_MSR_CRASH_CTL
:
2521 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2522 return kvm_hv_get_msr_common(vcpu
,
2523 msr_info
->index
, &msr_info
->data
);
2525 case MSR_IA32_BBL_CR_CTL3
:
2526 /* This legacy MSR exists but isn't fully documented in current
2527 * silicon. It is however accessed by winxp in very narrow
2528 * scenarios where it sets bit #19, itself documented as
2529 * a "reserved" bit. Best effort attempt to source coherent
2530 * read data here should the balance of the register be
2531 * interpreted by the guest:
2533 * L2 cache control register 3: 64GB range, 256KB size,
2534 * enabled, latency 0x1, configured
2536 msr_info
->data
= 0xbe702111;
2538 case MSR_AMD64_OSVW_ID_LENGTH
:
2539 if (!guest_cpuid_has_osvw(vcpu
))
2541 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2543 case MSR_AMD64_OSVW_STATUS
:
2544 if (!guest_cpuid_has_osvw(vcpu
))
2546 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2548 case MSR_PLATFORM_INFO
:
2549 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2551 case MSR_MISC_FEATURES_ENABLES
:
2552 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2555 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2556 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2558 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2562 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2569 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2572 * Read or write a bunch of msrs. All parameters are kernel addresses.
2574 * @return number of msrs set successfully.
2576 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2577 struct kvm_msr_entry
*entries
,
2578 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2579 unsigned index
, u64
*data
))
2583 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2584 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2585 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2587 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2593 * Read or write a bunch of msrs. Parameters are user addresses.
2595 * @return number of msrs set successfully.
2597 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2598 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2599 unsigned index
, u64
*data
),
2602 struct kvm_msrs msrs
;
2603 struct kvm_msr_entry
*entries
;
2608 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2612 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2615 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2616 entries
= memdup_user(user_msrs
->entries
, size
);
2617 if (IS_ERR(entries
)) {
2618 r
= PTR_ERR(entries
);
2622 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2627 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2638 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2643 case KVM_CAP_IRQCHIP
:
2645 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2646 case KVM_CAP_SET_TSS_ADDR
:
2647 case KVM_CAP_EXT_CPUID
:
2648 case KVM_CAP_EXT_EMUL_CPUID
:
2649 case KVM_CAP_CLOCKSOURCE
:
2651 case KVM_CAP_NOP_IO_DELAY
:
2652 case KVM_CAP_MP_STATE
:
2653 case KVM_CAP_SYNC_MMU
:
2654 case KVM_CAP_USER_NMI
:
2655 case KVM_CAP_REINJECT_CONTROL
:
2656 case KVM_CAP_IRQ_INJECT_STATUS
:
2657 case KVM_CAP_IOEVENTFD
:
2658 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2660 case KVM_CAP_PIT_STATE2
:
2661 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2662 case KVM_CAP_XEN_HVM
:
2663 case KVM_CAP_VCPU_EVENTS
:
2664 case KVM_CAP_HYPERV
:
2665 case KVM_CAP_HYPERV_VAPIC
:
2666 case KVM_CAP_HYPERV_SPIN
:
2667 case KVM_CAP_HYPERV_SYNIC
:
2668 case KVM_CAP_HYPERV_SYNIC2
:
2669 case KVM_CAP_HYPERV_VP_INDEX
:
2670 case KVM_CAP_PCI_SEGMENT
:
2671 case KVM_CAP_DEBUGREGS
:
2672 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2674 case KVM_CAP_ASYNC_PF
:
2675 case KVM_CAP_GET_TSC_KHZ
:
2676 case KVM_CAP_KVMCLOCK_CTRL
:
2677 case KVM_CAP_READONLY_MEM
:
2678 case KVM_CAP_HYPERV_TIME
:
2679 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2680 case KVM_CAP_TSC_DEADLINE_TIMER
:
2681 case KVM_CAP_ENABLE_CAP_VM
:
2682 case KVM_CAP_DISABLE_QUIRKS
:
2683 case KVM_CAP_SET_BOOT_CPU_ID
:
2684 case KVM_CAP_SPLIT_IRQCHIP
:
2685 case KVM_CAP_IMMEDIATE_EXIT
:
2688 case KVM_CAP_ADJUST_CLOCK
:
2689 r
= KVM_CLOCK_TSC_STABLE
;
2691 case KVM_CAP_X86_GUEST_MWAIT
:
2692 r
= kvm_mwait_in_guest();
2694 case KVM_CAP_X86_SMM
:
2695 /* SMBASE is usually relocated above 1M on modern chipsets,
2696 * and SMM handlers might indeed rely on 4G segment limits,
2697 * so do not report SMM to be available if real mode is
2698 * emulated via vm86 mode. Still, do not go to great lengths
2699 * to avoid userspace's usage of the feature, because it is a
2700 * fringe case that is not enabled except via specific settings
2701 * of the module parameters.
2703 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2706 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2708 case KVM_CAP_NR_VCPUS
:
2709 r
= KVM_SOFT_MAX_VCPUS
;
2711 case KVM_CAP_MAX_VCPUS
:
2714 case KVM_CAP_NR_MEMSLOTS
:
2715 r
= KVM_USER_MEM_SLOTS
;
2717 case KVM_CAP_PV_MMU
: /* obsolete */
2721 r
= KVM_MAX_MCE_BANKS
;
2724 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2726 case KVM_CAP_TSC_CONTROL
:
2727 r
= kvm_has_tsc_control
;
2729 case KVM_CAP_X2APIC_API
:
2730 r
= KVM_X2APIC_API_VALID_FLAGS
;
2740 long kvm_arch_dev_ioctl(struct file
*filp
,
2741 unsigned int ioctl
, unsigned long arg
)
2743 void __user
*argp
= (void __user
*)arg
;
2747 case KVM_GET_MSR_INDEX_LIST
: {
2748 struct kvm_msr_list __user
*user_msr_list
= argp
;
2749 struct kvm_msr_list msr_list
;
2753 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2756 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2757 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2760 if (n
< msr_list
.nmsrs
)
2763 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2764 num_msrs_to_save
* sizeof(u32
)))
2766 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2768 num_emulated_msrs
* sizeof(u32
)))
2773 case KVM_GET_SUPPORTED_CPUID
:
2774 case KVM_GET_EMULATED_CPUID
: {
2775 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2776 struct kvm_cpuid2 cpuid
;
2779 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2782 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2788 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2793 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2795 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2796 sizeof(kvm_mce_cap_supported
)))
2808 static void wbinvd_ipi(void *garbage
)
2813 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2815 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2818 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2820 /* Address WBINVD may be executed by guest */
2821 if (need_emulate_wbinvd(vcpu
)) {
2822 if (kvm_x86_ops
->has_wbinvd_exit())
2823 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2824 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2825 smp_call_function_single(vcpu
->cpu
,
2826 wbinvd_ipi
, NULL
, 1);
2829 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2831 /* Apply any externally detected TSC adjustments (due to suspend) */
2832 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2833 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2834 vcpu
->arch
.tsc_offset_adjustment
= 0;
2835 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2838 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2839 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2840 rdtsc() - vcpu
->arch
.last_host_tsc
;
2842 mark_tsc_unstable("KVM discovered backwards TSC");
2844 if (check_tsc_unstable()) {
2845 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2846 vcpu
->arch
.last_guest_tsc
);
2847 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2848 vcpu
->arch
.tsc_catchup
= 1;
2851 if (kvm_lapic_hv_timer_in_use(vcpu
))
2852 kvm_lapic_restart_hv_timer(vcpu
);
2855 * On a host with synchronized TSC, there is no need to update
2856 * kvmclock on vcpu->cpu migration
2858 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2859 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2860 if (vcpu
->cpu
!= cpu
)
2861 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
2865 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2868 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2870 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2873 vcpu
->arch
.st
.steal
.preempted
= 1;
2875 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2876 &vcpu
->arch
.st
.steal
.preempted
,
2877 offsetof(struct kvm_steal_time
, preempted
),
2878 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2881 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2885 * Disable page faults because we're in atomic context here.
2886 * kvm_write_guest_offset_cached() would call might_fault()
2887 * that relies on pagefault_disable() to tell if there's a
2888 * bug. NOTE: the write to guest memory may not go through if
2889 * during postcopy live migration or if there's heavy guest
2892 pagefault_disable();
2894 * kvm_memslots() will be called by
2895 * kvm_write_guest_offset_cached() so take the srcu lock.
2897 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2898 kvm_steal_time_set_preempted(vcpu
);
2899 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2901 kvm_x86_ops
->vcpu_put(vcpu
);
2902 kvm_put_guest_fpu(vcpu
);
2903 vcpu
->arch
.last_host_tsc
= rdtsc();
2906 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2907 struct kvm_lapic_state
*s
)
2909 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
2910 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2912 return kvm_apic_get_state(vcpu
, s
);
2915 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2916 struct kvm_lapic_state
*s
)
2920 r
= kvm_apic_set_state(vcpu
, s
);
2923 update_cr8_intercept(vcpu
);
2928 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2930 return (!lapic_in_kernel(vcpu
) ||
2931 kvm_apic_accept_pic_intr(vcpu
));
2935 * if userspace requested an interrupt window, check that the
2936 * interrupt window is open.
2938 * No need to exit to userspace if we already have an interrupt queued.
2940 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2942 return kvm_arch_interrupt_allowed(vcpu
) &&
2943 !kvm_cpu_has_interrupt(vcpu
) &&
2944 !kvm_event_needs_reinjection(vcpu
) &&
2945 kvm_cpu_accept_dm_intr(vcpu
);
2948 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2949 struct kvm_interrupt
*irq
)
2951 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2954 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2955 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2956 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2961 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2962 * fail for in-kernel 8259.
2964 if (pic_in_kernel(vcpu
->kvm
))
2967 if (vcpu
->arch
.pending_external_vector
!= -1)
2970 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2971 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2975 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2977 kvm_inject_nmi(vcpu
);
2982 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2984 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2989 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2990 struct kvm_tpr_access_ctl
*tac
)
2994 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2998 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3002 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3005 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3007 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3010 vcpu
->arch
.mcg_cap
= mcg_cap
;
3011 /* Init IA32_MCG_CTL to all 1s */
3012 if (mcg_cap
& MCG_CTL_P
)
3013 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3014 /* Init IA32_MCi_CTL to all 1s */
3015 for (bank
= 0; bank
< bank_num
; bank
++)
3016 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3018 if (kvm_x86_ops
->setup_mce
)
3019 kvm_x86_ops
->setup_mce(vcpu
);
3024 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3025 struct kvm_x86_mce
*mce
)
3027 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3028 unsigned bank_num
= mcg_cap
& 0xff;
3029 u64
*banks
= vcpu
->arch
.mce_banks
;
3031 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3034 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3035 * reporting is disabled
3037 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3038 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3040 banks
+= 4 * mce
->bank
;
3042 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3043 * reporting is disabled for the bank
3045 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3047 if (mce
->status
& MCI_STATUS_UC
) {
3048 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3049 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3050 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3053 if (banks
[1] & MCI_STATUS_VAL
)
3054 mce
->status
|= MCI_STATUS_OVER
;
3055 banks
[2] = mce
->addr
;
3056 banks
[3] = mce
->misc
;
3057 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3058 banks
[1] = mce
->status
;
3059 kvm_queue_exception(vcpu
, MC_VECTOR
);
3060 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3061 || !(banks
[1] & MCI_STATUS_UC
)) {
3062 if (banks
[1] & MCI_STATUS_VAL
)
3063 mce
->status
|= MCI_STATUS_OVER
;
3064 banks
[2] = mce
->addr
;
3065 banks
[3] = mce
->misc
;
3066 banks
[1] = mce
->status
;
3068 banks
[1] |= MCI_STATUS_OVER
;
3072 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3073 struct kvm_vcpu_events
*events
)
3076 events
->exception
.injected
=
3077 vcpu
->arch
.exception
.pending
&&
3078 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3079 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3080 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3081 events
->exception
.pad
= 0;
3082 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3084 events
->interrupt
.injected
=
3085 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3086 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3087 events
->interrupt
.soft
= 0;
3088 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3090 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3091 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3092 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3093 events
->nmi
.pad
= 0;
3095 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3097 events
->smi
.smm
= is_smm(vcpu
);
3098 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3099 events
->smi
.smm_inside_nmi
=
3100 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3101 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3103 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3104 | KVM_VCPUEVENT_VALID_SHADOW
3105 | KVM_VCPUEVENT_VALID_SMM
);
3106 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3109 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3111 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3112 struct kvm_vcpu_events
*events
)
3114 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3115 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3116 | KVM_VCPUEVENT_VALID_SHADOW
3117 | KVM_VCPUEVENT_VALID_SMM
))
3120 if (events
->exception
.injected
&&
3121 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3122 is_guest_mode(vcpu
)))
3125 /* INITs are latched while in SMM */
3126 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3127 (events
->smi
.smm
|| events
->smi
.pending
) &&
3128 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3132 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3133 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3134 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3135 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3137 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3138 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3139 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3140 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3141 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3142 events
->interrupt
.shadow
);
3144 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3145 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3146 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3147 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3149 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3150 lapic_in_kernel(vcpu
))
3151 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3153 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3154 u32 hflags
= vcpu
->arch
.hflags
;
3155 if (events
->smi
.smm
)
3156 hflags
|= HF_SMM_MASK
;
3158 hflags
&= ~HF_SMM_MASK
;
3159 kvm_set_hflags(vcpu
, hflags
);
3161 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3163 if (events
->smi
.smm
) {
3164 if (events
->smi
.smm_inside_nmi
)
3165 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3167 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3168 if (lapic_in_kernel(vcpu
)) {
3169 if (events
->smi
.latched_init
)
3170 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3172 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3177 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3182 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3183 struct kvm_debugregs
*dbgregs
)
3187 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3188 kvm_get_dr(vcpu
, 6, &val
);
3190 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3192 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3195 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3196 struct kvm_debugregs
*dbgregs
)
3201 if (dbgregs
->dr6
& ~0xffffffffull
)
3203 if (dbgregs
->dr7
& ~0xffffffffull
)
3206 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3207 kvm_update_dr0123(vcpu
);
3208 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3209 kvm_update_dr6(vcpu
);
3210 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3211 kvm_update_dr7(vcpu
);
3216 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3218 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3220 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3221 u64 xstate_bv
= xsave
->header
.xfeatures
;
3225 * Copy legacy XSAVE area, to avoid complications with CPUID
3226 * leaves 0 and 1 in the loop below.
3228 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3231 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3232 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3235 * Copy each region from the possibly compacted offset to the
3236 * non-compacted offset.
3238 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3240 u64 feature
= valid
& -valid
;
3241 int index
= fls64(feature
) - 1;
3242 void *src
= get_xsave_addr(xsave
, feature
);
3245 u32 size
, offset
, ecx
, edx
;
3246 cpuid_count(XSTATE_CPUID
, index
,
3247 &size
, &offset
, &ecx
, &edx
);
3248 memcpy(dest
+ offset
, src
, size
);
3255 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3257 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3258 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3262 * Copy legacy XSAVE area, to avoid complications with CPUID
3263 * leaves 0 and 1 in the loop below.
3265 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3267 /* Set XSTATE_BV and possibly XCOMP_BV. */
3268 xsave
->header
.xfeatures
= xstate_bv
;
3269 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3270 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3273 * Copy each region from the non-compacted offset to the
3274 * possibly compacted offset.
3276 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3278 u64 feature
= valid
& -valid
;
3279 int index
= fls64(feature
) - 1;
3280 void *dest
= get_xsave_addr(xsave
, feature
);
3283 u32 size
, offset
, ecx
, edx
;
3284 cpuid_count(XSTATE_CPUID
, index
,
3285 &size
, &offset
, &ecx
, &edx
);
3286 memcpy(dest
, src
+ offset
, size
);
3293 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3294 struct kvm_xsave
*guest_xsave
)
3296 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3297 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3298 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3300 memcpy(guest_xsave
->region
,
3301 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3302 sizeof(struct fxregs_state
));
3303 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3304 XFEATURE_MASK_FPSSE
;
3308 #define XSAVE_MXCSR_OFFSET 24
3310 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3311 struct kvm_xsave
*guest_xsave
)
3314 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3315 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3317 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3319 * Here we allow setting states that are not present in
3320 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3321 * with old userspace.
3323 if (xstate_bv
& ~kvm_supported_xcr0() ||
3324 mxcsr
& ~mxcsr_feature_mask
)
3326 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3328 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3329 mxcsr
& ~mxcsr_feature_mask
)
3331 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3332 guest_xsave
->region
, sizeof(struct fxregs_state
));
3337 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3338 struct kvm_xcrs
*guest_xcrs
)
3340 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3341 guest_xcrs
->nr_xcrs
= 0;
3345 guest_xcrs
->nr_xcrs
= 1;
3346 guest_xcrs
->flags
= 0;
3347 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3348 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3351 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3352 struct kvm_xcrs
*guest_xcrs
)
3356 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3359 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3362 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3363 /* Only support XCR0 currently */
3364 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3365 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3366 guest_xcrs
->xcrs
[i
].value
);
3375 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3376 * stopped by the hypervisor. This function will be called from the host only.
3377 * EINVAL is returned when the host attempts to set the flag for a guest that
3378 * does not support pv clocks.
3380 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3382 if (!vcpu
->arch
.pv_time_enabled
)
3384 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3385 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3389 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3390 struct kvm_enable_cap
*cap
)
3396 case KVM_CAP_HYPERV_SYNIC2
:
3399 case KVM_CAP_HYPERV_SYNIC
:
3400 if (!irqchip_in_kernel(vcpu
->kvm
))
3402 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3403 KVM_CAP_HYPERV_SYNIC2
);
3409 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3410 unsigned int ioctl
, unsigned long arg
)
3412 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3413 void __user
*argp
= (void __user
*)arg
;
3416 struct kvm_lapic_state
*lapic
;
3417 struct kvm_xsave
*xsave
;
3418 struct kvm_xcrs
*xcrs
;
3424 case KVM_GET_LAPIC
: {
3426 if (!lapic_in_kernel(vcpu
))
3428 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3433 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3437 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3442 case KVM_SET_LAPIC
: {
3444 if (!lapic_in_kernel(vcpu
))
3446 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3447 if (IS_ERR(u
.lapic
))
3448 return PTR_ERR(u
.lapic
);
3450 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3453 case KVM_INTERRUPT
: {
3454 struct kvm_interrupt irq
;
3457 if (copy_from_user(&irq
, argp
, sizeof irq
))
3459 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3463 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3467 r
= kvm_vcpu_ioctl_smi(vcpu
);
3470 case KVM_SET_CPUID
: {
3471 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3472 struct kvm_cpuid cpuid
;
3475 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3477 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3480 case KVM_SET_CPUID2
: {
3481 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3482 struct kvm_cpuid2 cpuid
;
3485 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3487 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3488 cpuid_arg
->entries
);
3491 case KVM_GET_CPUID2
: {
3492 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3493 struct kvm_cpuid2 cpuid
;
3496 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3498 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3499 cpuid_arg
->entries
);
3503 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3509 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3512 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3514 case KVM_TPR_ACCESS_REPORTING
: {
3515 struct kvm_tpr_access_ctl tac
;
3518 if (copy_from_user(&tac
, argp
, sizeof tac
))
3520 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3524 if (copy_to_user(argp
, &tac
, sizeof tac
))
3529 case KVM_SET_VAPIC_ADDR
: {
3530 struct kvm_vapic_addr va
;
3534 if (!lapic_in_kernel(vcpu
))
3537 if (copy_from_user(&va
, argp
, sizeof va
))
3539 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3540 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3541 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3544 case KVM_X86_SETUP_MCE
: {
3548 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3550 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3553 case KVM_X86_SET_MCE
: {
3554 struct kvm_x86_mce mce
;
3557 if (copy_from_user(&mce
, argp
, sizeof mce
))
3559 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3562 case KVM_GET_VCPU_EVENTS
: {
3563 struct kvm_vcpu_events events
;
3565 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3568 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3573 case KVM_SET_VCPU_EVENTS
: {
3574 struct kvm_vcpu_events events
;
3577 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3580 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3583 case KVM_GET_DEBUGREGS
: {
3584 struct kvm_debugregs dbgregs
;
3586 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3589 if (copy_to_user(argp
, &dbgregs
,
3590 sizeof(struct kvm_debugregs
)))
3595 case KVM_SET_DEBUGREGS
: {
3596 struct kvm_debugregs dbgregs
;
3599 if (copy_from_user(&dbgregs
, argp
,
3600 sizeof(struct kvm_debugregs
)))
3603 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3606 case KVM_GET_XSAVE
: {
3607 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3612 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3615 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3620 case KVM_SET_XSAVE
: {
3621 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3622 if (IS_ERR(u
.xsave
))
3623 return PTR_ERR(u
.xsave
);
3625 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3628 case KVM_GET_XCRS
: {
3629 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3634 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3637 if (copy_to_user(argp
, u
.xcrs
,
3638 sizeof(struct kvm_xcrs
)))
3643 case KVM_SET_XCRS
: {
3644 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3646 return PTR_ERR(u
.xcrs
);
3648 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3651 case KVM_SET_TSC_KHZ
: {
3655 user_tsc_khz
= (u32
)arg
;
3657 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3660 if (user_tsc_khz
== 0)
3661 user_tsc_khz
= tsc_khz
;
3663 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3668 case KVM_GET_TSC_KHZ
: {
3669 r
= vcpu
->arch
.virtual_tsc_khz
;
3672 case KVM_KVMCLOCK_CTRL
: {
3673 r
= kvm_set_guest_paused(vcpu
);
3676 case KVM_ENABLE_CAP
: {
3677 struct kvm_enable_cap cap
;
3680 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3682 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3693 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3695 return VM_FAULT_SIGBUS
;
3698 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3702 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3704 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3708 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3711 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3715 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3716 u32 kvm_nr_mmu_pages
)
3718 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3721 mutex_lock(&kvm
->slots_lock
);
3723 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3724 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3726 mutex_unlock(&kvm
->slots_lock
);
3730 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3732 return kvm
->arch
.n_max_mmu_pages
;
3735 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3737 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3741 switch (chip
->chip_id
) {
3742 case KVM_IRQCHIP_PIC_MASTER
:
3743 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3744 sizeof(struct kvm_pic_state
));
3746 case KVM_IRQCHIP_PIC_SLAVE
:
3747 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3748 sizeof(struct kvm_pic_state
));
3750 case KVM_IRQCHIP_IOAPIC
:
3751 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3760 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3762 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3766 switch (chip
->chip_id
) {
3767 case KVM_IRQCHIP_PIC_MASTER
:
3768 spin_lock(&pic
->lock
);
3769 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3770 sizeof(struct kvm_pic_state
));
3771 spin_unlock(&pic
->lock
);
3773 case KVM_IRQCHIP_PIC_SLAVE
:
3774 spin_lock(&pic
->lock
);
3775 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3776 sizeof(struct kvm_pic_state
));
3777 spin_unlock(&pic
->lock
);
3779 case KVM_IRQCHIP_IOAPIC
:
3780 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3786 kvm_pic_update_irq(pic
);
3790 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3792 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3794 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3796 mutex_lock(&kps
->lock
);
3797 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3798 mutex_unlock(&kps
->lock
);
3802 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3805 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3807 mutex_lock(&pit
->pit_state
.lock
);
3808 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3809 for (i
= 0; i
< 3; i
++)
3810 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3811 mutex_unlock(&pit
->pit_state
.lock
);
3815 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3817 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3818 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3819 sizeof(ps
->channels
));
3820 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3821 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3822 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3826 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3830 u32 prev_legacy
, cur_legacy
;
3831 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3833 mutex_lock(&pit
->pit_state
.lock
);
3834 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3835 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3836 if (!prev_legacy
&& cur_legacy
)
3838 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3839 sizeof(pit
->pit_state
.channels
));
3840 pit
->pit_state
.flags
= ps
->flags
;
3841 for (i
= 0; i
< 3; i
++)
3842 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3844 mutex_unlock(&pit
->pit_state
.lock
);
3848 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3849 struct kvm_reinject_control
*control
)
3851 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3856 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3857 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3858 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3860 mutex_lock(&pit
->pit_state
.lock
);
3861 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3862 mutex_unlock(&pit
->pit_state
.lock
);
3868 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3869 * @kvm: kvm instance
3870 * @log: slot id and address to which we copy the log
3872 * Steps 1-4 below provide general overview of dirty page logging. See
3873 * kvm_get_dirty_log_protect() function description for additional details.
3875 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3876 * always flush the TLB (step 4) even if previous step failed and the dirty
3877 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3878 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3879 * writes will be marked dirty for next log read.
3881 * 1. Take a snapshot of the bit and clear it if needed.
3882 * 2. Write protect the corresponding page.
3883 * 3. Copy the snapshot to the userspace.
3884 * 4. Flush TLB's if needed.
3886 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3888 bool is_dirty
= false;
3891 mutex_lock(&kvm
->slots_lock
);
3894 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3896 if (kvm_x86_ops
->flush_log_dirty
)
3897 kvm_x86_ops
->flush_log_dirty(kvm
);
3899 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3902 * All the TLBs can be flushed out of mmu lock, see the comments in
3903 * kvm_mmu_slot_remove_write_access().
3905 lockdep_assert_held(&kvm
->slots_lock
);
3907 kvm_flush_remote_tlbs(kvm
);
3909 mutex_unlock(&kvm
->slots_lock
);
3913 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3916 if (!irqchip_in_kernel(kvm
))
3919 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3920 irq_event
->irq
, irq_event
->level
,
3925 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3926 struct kvm_enable_cap
*cap
)
3934 case KVM_CAP_DISABLE_QUIRKS
:
3935 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3938 case KVM_CAP_SPLIT_IRQCHIP
: {
3939 mutex_lock(&kvm
->lock
);
3941 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3942 goto split_irqchip_unlock
;
3944 if (irqchip_in_kernel(kvm
))
3945 goto split_irqchip_unlock
;
3946 if (kvm
->created_vcpus
)
3947 goto split_irqchip_unlock
;
3948 r
= kvm_setup_empty_irq_routing(kvm
);
3950 goto split_irqchip_unlock
;
3951 /* Pairs with irqchip_in_kernel. */
3953 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
3954 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3956 split_irqchip_unlock
:
3957 mutex_unlock(&kvm
->lock
);
3960 case KVM_CAP_X2APIC_API
:
3962 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
3965 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
3966 kvm
->arch
.x2apic_format
= true;
3967 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
3968 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
3979 long kvm_arch_vm_ioctl(struct file
*filp
,
3980 unsigned int ioctl
, unsigned long arg
)
3982 struct kvm
*kvm
= filp
->private_data
;
3983 void __user
*argp
= (void __user
*)arg
;
3986 * This union makes it completely explicit to gcc-3.x
3987 * that these two variables' stack usage should be
3988 * combined, not added together.
3991 struct kvm_pit_state ps
;
3992 struct kvm_pit_state2 ps2
;
3993 struct kvm_pit_config pit_config
;
3997 case KVM_SET_TSS_ADDR
:
3998 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4000 case KVM_SET_IDENTITY_MAP_ADDR
: {
4004 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4006 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4009 case KVM_SET_NR_MMU_PAGES
:
4010 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4012 case KVM_GET_NR_MMU_PAGES
:
4013 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4015 case KVM_CREATE_IRQCHIP
: {
4016 mutex_lock(&kvm
->lock
);
4019 if (irqchip_in_kernel(kvm
))
4020 goto create_irqchip_unlock
;
4023 if (kvm
->created_vcpus
)
4024 goto create_irqchip_unlock
;
4026 r
= kvm_pic_init(kvm
);
4028 goto create_irqchip_unlock
;
4030 r
= kvm_ioapic_init(kvm
);
4032 kvm_pic_destroy(kvm
);
4033 goto create_irqchip_unlock
;
4036 r
= kvm_setup_default_irq_routing(kvm
);
4038 kvm_ioapic_destroy(kvm
);
4039 kvm_pic_destroy(kvm
);
4040 goto create_irqchip_unlock
;
4042 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4044 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4045 create_irqchip_unlock
:
4046 mutex_unlock(&kvm
->lock
);
4049 case KVM_CREATE_PIT
:
4050 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4052 case KVM_CREATE_PIT2
:
4054 if (copy_from_user(&u
.pit_config
, argp
,
4055 sizeof(struct kvm_pit_config
)))
4058 mutex_lock(&kvm
->lock
);
4061 goto create_pit_unlock
;
4063 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4067 mutex_unlock(&kvm
->lock
);
4069 case KVM_GET_IRQCHIP
: {
4070 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4071 struct kvm_irqchip
*chip
;
4073 chip
= memdup_user(argp
, sizeof(*chip
));
4080 if (!irqchip_kernel(kvm
))
4081 goto get_irqchip_out
;
4082 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4084 goto get_irqchip_out
;
4086 if (copy_to_user(argp
, chip
, sizeof *chip
))
4087 goto get_irqchip_out
;
4093 case KVM_SET_IRQCHIP
: {
4094 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4095 struct kvm_irqchip
*chip
;
4097 chip
= memdup_user(argp
, sizeof(*chip
));
4104 if (!irqchip_kernel(kvm
))
4105 goto set_irqchip_out
;
4106 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4108 goto set_irqchip_out
;
4116 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4119 if (!kvm
->arch
.vpit
)
4121 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4125 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4132 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4135 if (!kvm
->arch
.vpit
)
4137 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4140 case KVM_GET_PIT2
: {
4142 if (!kvm
->arch
.vpit
)
4144 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4148 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4153 case KVM_SET_PIT2
: {
4155 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4158 if (!kvm
->arch
.vpit
)
4160 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4163 case KVM_REINJECT_CONTROL
: {
4164 struct kvm_reinject_control control
;
4166 if (copy_from_user(&control
, argp
, sizeof(control
)))
4168 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4171 case KVM_SET_BOOT_CPU_ID
:
4173 mutex_lock(&kvm
->lock
);
4174 if (kvm
->created_vcpus
)
4177 kvm
->arch
.bsp_vcpu_id
= arg
;
4178 mutex_unlock(&kvm
->lock
);
4180 case KVM_XEN_HVM_CONFIG
: {
4182 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4183 sizeof(struct kvm_xen_hvm_config
)))
4186 if (kvm
->arch
.xen_hvm_config
.flags
)
4191 case KVM_SET_CLOCK
: {
4192 struct kvm_clock_data user_ns
;
4196 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4205 * TODO: userspace has to take care of races with VCPU_RUN, so
4206 * kvm_gen_update_masterclock() can be cut down to locked
4207 * pvclock_update_vm_gtod_copy().
4209 kvm_gen_update_masterclock(kvm
);
4210 now_ns
= get_kvmclock_ns(kvm
);
4211 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4212 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4215 case KVM_GET_CLOCK
: {
4216 struct kvm_clock_data user_ns
;
4219 now_ns
= get_kvmclock_ns(kvm
);
4220 user_ns
.clock
= now_ns
;
4221 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4222 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4225 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4230 case KVM_ENABLE_CAP
: {
4231 struct kvm_enable_cap cap
;
4234 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4236 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4246 static void kvm_init_msr_list(void)
4251 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4252 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4256 * Even MSRs that are valid in the host may not be exposed
4257 * to the guests in some cases.
4259 switch (msrs_to_save
[i
]) {
4260 case MSR_IA32_BNDCFGS
:
4261 if (!kvm_x86_ops
->mpx_supported())
4265 if (!kvm_x86_ops
->rdtscp_supported())
4273 msrs_to_save
[j
] = msrs_to_save
[i
];
4276 num_msrs_to_save
= j
;
4278 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4279 switch (emulated_msrs
[i
]) {
4280 case MSR_IA32_SMBASE
:
4281 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4289 emulated_msrs
[j
] = emulated_msrs
[i
];
4292 num_emulated_msrs
= j
;
4295 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4303 if (!(lapic_in_kernel(vcpu
) &&
4304 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4305 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4316 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4323 if (!(lapic_in_kernel(vcpu
) &&
4324 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4326 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4328 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4338 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4339 struct kvm_segment
*var
, int seg
)
4341 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4344 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4345 struct kvm_segment
*var
, int seg
)
4347 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4350 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4351 struct x86_exception
*exception
)
4355 BUG_ON(!mmu_is_nested(vcpu
));
4357 /* NPT walks are always user-walks */
4358 access
|= PFERR_USER_MASK
;
4359 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4364 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4365 struct x86_exception
*exception
)
4367 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4368 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4371 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4372 struct x86_exception
*exception
)
4374 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4375 access
|= PFERR_FETCH_MASK
;
4376 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4379 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4380 struct x86_exception
*exception
)
4382 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4383 access
|= PFERR_WRITE_MASK
;
4384 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4387 /* uses this to access any guest's mapped memory without checking CPL */
4388 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4389 struct x86_exception
*exception
)
4391 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4394 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4395 struct kvm_vcpu
*vcpu
, u32 access
,
4396 struct x86_exception
*exception
)
4399 int r
= X86EMUL_CONTINUE
;
4402 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4404 unsigned offset
= addr
& (PAGE_SIZE
-1);
4405 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4408 if (gpa
== UNMAPPED_GVA
)
4409 return X86EMUL_PROPAGATE_FAULT
;
4410 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4413 r
= X86EMUL_IO_NEEDED
;
4425 /* used for instruction fetching */
4426 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4427 gva_t addr
, void *val
, unsigned int bytes
,
4428 struct x86_exception
*exception
)
4430 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4431 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4435 /* Inline kvm_read_guest_virt_helper for speed. */
4436 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4438 if (unlikely(gpa
== UNMAPPED_GVA
))
4439 return X86EMUL_PROPAGATE_FAULT
;
4441 offset
= addr
& (PAGE_SIZE
-1);
4442 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4443 bytes
= (unsigned)PAGE_SIZE
- offset
;
4444 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4446 if (unlikely(ret
< 0))
4447 return X86EMUL_IO_NEEDED
;
4449 return X86EMUL_CONTINUE
;
4452 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4453 gva_t addr
, void *val
, unsigned int bytes
,
4454 struct x86_exception
*exception
)
4456 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4457 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4459 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4462 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4464 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4465 gva_t addr
, void *val
, unsigned int bytes
,
4466 struct x86_exception
*exception
)
4468 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4469 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4472 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4473 unsigned long addr
, void *val
, unsigned int bytes
)
4475 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4476 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4478 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4481 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4482 gva_t addr
, void *val
,
4484 struct x86_exception
*exception
)
4486 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4488 int r
= X86EMUL_CONTINUE
;
4491 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4494 unsigned offset
= addr
& (PAGE_SIZE
-1);
4495 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4498 if (gpa
== UNMAPPED_GVA
)
4499 return X86EMUL_PROPAGATE_FAULT
;
4500 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4502 r
= X86EMUL_IO_NEEDED
;
4513 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4515 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4516 gpa_t gpa
, bool write
)
4518 /* For APIC access vmexit */
4519 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4522 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4523 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4530 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4531 gpa_t
*gpa
, struct x86_exception
*exception
,
4534 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4535 | (write
? PFERR_WRITE_MASK
: 0);
4538 * currently PKRU is only applied to ept enabled guest so
4539 * there is no pkey in EPT page table for L1 guest or EPT
4540 * shadow page table for L2 guest.
4542 if (vcpu_match_mmio_gva(vcpu
, gva
)
4543 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4544 vcpu
->arch
.access
, 0, access
)) {
4545 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4546 (gva
& (PAGE_SIZE
- 1));
4547 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4551 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4553 if (*gpa
== UNMAPPED_GVA
)
4556 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4559 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4560 const void *val
, int bytes
)
4564 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4567 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4571 struct read_write_emulator_ops
{
4572 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4574 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4575 void *val
, int bytes
);
4576 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4577 int bytes
, void *val
);
4578 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4579 void *val
, int bytes
);
4583 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4585 if (vcpu
->mmio_read_completed
) {
4586 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4587 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4588 vcpu
->mmio_read_completed
= 0;
4595 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4596 void *val
, int bytes
)
4598 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4601 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4602 void *val
, int bytes
)
4604 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4607 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4609 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4610 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4613 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4614 void *val
, int bytes
)
4616 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4617 return X86EMUL_IO_NEEDED
;
4620 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4621 void *val
, int bytes
)
4623 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4625 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4626 return X86EMUL_CONTINUE
;
4629 static const struct read_write_emulator_ops read_emultor
= {
4630 .read_write_prepare
= read_prepare
,
4631 .read_write_emulate
= read_emulate
,
4632 .read_write_mmio
= vcpu_mmio_read
,
4633 .read_write_exit_mmio
= read_exit_mmio
,
4636 static const struct read_write_emulator_ops write_emultor
= {
4637 .read_write_emulate
= write_emulate
,
4638 .read_write_mmio
= write_mmio
,
4639 .read_write_exit_mmio
= write_exit_mmio
,
4643 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4645 struct x86_exception
*exception
,
4646 struct kvm_vcpu
*vcpu
,
4647 const struct read_write_emulator_ops
*ops
)
4651 bool write
= ops
->write
;
4652 struct kvm_mmio_fragment
*frag
;
4653 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4656 * If the exit was due to a NPF we may already have a GPA.
4657 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4658 * Note, this cannot be used on string operations since string
4659 * operation using rep will only have the initial GPA from the NPF
4662 if (vcpu
->arch
.gpa_available
&&
4663 emulator_can_use_gpa(ctxt
) &&
4664 vcpu_is_mmio_gpa(vcpu
, addr
, exception
->address
, write
) &&
4665 (addr
& ~PAGE_MASK
) == (exception
->address
& ~PAGE_MASK
)) {
4666 gpa
= exception
->address
;
4670 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4673 return X86EMUL_PROPAGATE_FAULT
;
4675 /* For APIC access vmexit */
4679 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4680 return X86EMUL_CONTINUE
;
4684 * Is this MMIO handled locally?
4686 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4687 if (handled
== bytes
)
4688 return X86EMUL_CONTINUE
;
4694 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4695 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4699 return X86EMUL_CONTINUE
;
4702 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4704 void *val
, unsigned int bytes
,
4705 struct x86_exception
*exception
,
4706 const struct read_write_emulator_ops
*ops
)
4708 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4712 if (ops
->read_write_prepare
&&
4713 ops
->read_write_prepare(vcpu
, val
, bytes
))
4714 return X86EMUL_CONTINUE
;
4716 vcpu
->mmio_nr_fragments
= 0;
4718 /* Crossing a page boundary? */
4719 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4722 now
= -addr
& ~PAGE_MASK
;
4723 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4726 if (rc
!= X86EMUL_CONTINUE
)
4729 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4735 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4737 if (rc
!= X86EMUL_CONTINUE
)
4740 if (!vcpu
->mmio_nr_fragments
)
4743 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4745 vcpu
->mmio_needed
= 1;
4746 vcpu
->mmio_cur_fragment
= 0;
4748 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4749 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4750 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4751 vcpu
->run
->mmio
.phys_addr
= gpa
;
4753 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4756 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4760 struct x86_exception
*exception
)
4762 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4763 exception
, &read_emultor
);
4766 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4770 struct x86_exception
*exception
)
4772 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4773 exception
, &write_emultor
);
4776 #define CMPXCHG_TYPE(t, ptr, old, new) \
4777 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4779 #ifdef CONFIG_X86_64
4780 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4782 # define CMPXCHG64(ptr, old, new) \
4783 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4786 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4791 struct x86_exception
*exception
)
4793 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4799 /* guests cmpxchg8b have to be emulated atomically */
4800 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4803 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4805 if (gpa
== UNMAPPED_GVA
||
4806 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4809 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4812 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4813 if (is_error_page(page
))
4816 kaddr
= kmap_atomic(page
);
4817 kaddr
+= offset_in_page(gpa
);
4820 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4823 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4826 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4829 exchanged
= CMPXCHG64(kaddr
, old
, new);
4834 kunmap_atomic(kaddr
);
4835 kvm_release_page_dirty(page
);
4838 return X86EMUL_CMPXCHG_FAILED
;
4840 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4841 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4843 return X86EMUL_CONTINUE
;
4846 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4848 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4851 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4855 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
4856 if (vcpu
->arch
.pio
.in
)
4857 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4858 vcpu
->arch
.pio
.size
, pd
);
4860 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4861 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4865 pd
+= vcpu
->arch
.pio
.size
;
4870 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4871 unsigned short port
, void *val
,
4872 unsigned int count
, bool in
)
4874 vcpu
->arch
.pio
.port
= port
;
4875 vcpu
->arch
.pio
.in
= in
;
4876 vcpu
->arch
.pio
.count
= count
;
4877 vcpu
->arch
.pio
.size
= size
;
4879 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4880 vcpu
->arch
.pio
.count
= 0;
4884 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4885 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4886 vcpu
->run
->io
.size
= size
;
4887 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4888 vcpu
->run
->io
.count
= count
;
4889 vcpu
->run
->io
.port
= port
;
4894 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4895 int size
, unsigned short port
, void *val
,
4898 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4901 if (vcpu
->arch
.pio
.count
)
4904 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
4906 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4909 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4910 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4911 vcpu
->arch
.pio
.count
= 0;
4918 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4919 int size
, unsigned short port
,
4920 const void *val
, unsigned int count
)
4922 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4924 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4925 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4926 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4929 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4931 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4934 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4936 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4939 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4941 if (!need_emulate_wbinvd(vcpu
))
4942 return X86EMUL_CONTINUE
;
4944 if (kvm_x86_ops
->has_wbinvd_exit()) {
4945 int cpu
= get_cpu();
4947 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4948 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4949 wbinvd_ipi
, NULL
, 1);
4951 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4954 return X86EMUL_CONTINUE
;
4957 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4959 kvm_emulate_wbinvd_noskip(vcpu
);
4960 return kvm_skip_emulated_instruction(vcpu
);
4962 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4966 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4968 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4971 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4972 unsigned long *dest
)
4974 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4977 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4978 unsigned long value
)
4981 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4984 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4986 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4989 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4991 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4992 unsigned long value
;
4996 value
= kvm_read_cr0(vcpu
);
4999 value
= vcpu
->arch
.cr2
;
5002 value
= kvm_read_cr3(vcpu
);
5005 value
= kvm_read_cr4(vcpu
);
5008 value
= kvm_get_cr8(vcpu
);
5011 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5018 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5020 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5025 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5028 vcpu
->arch
.cr2
= val
;
5031 res
= kvm_set_cr3(vcpu
, val
);
5034 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5037 res
= kvm_set_cr8(vcpu
, val
);
5040 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5047 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5049 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5052 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5054 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5057 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5059 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5062 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5064 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5067 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5069 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5072 static unsigned long emulator_get_cached_segment_base(
5073 struct x86_emulate_ctxt
*ctxt
, int seg
)
5075 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5078 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5079 struct desc_struct
*desc
, u32
*base3
,
5082 struct kvm_segment var
;
5084 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5085 *selector
= var
.selector
;
5088 memset(desc
, 0, sizeof(*desc
));
5096 set_desc_limit(desc
, var
.limit
);
5097 set_desc_base(desc
, (unsigned long)var
.base
);
5098 #ifdef CONFIG_X86_64
5100 *base3
= var
.base
>> 32;
5102 desc
->type
= var
.type
;
5104 desc
->dpl
= var
.dpl
;
5105 desc
->p
= var
.present
;
5106 desc
->avl
= var
.avl
;
5114 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5115 struct desc_struct
*desc
, u32 base3
,
5118 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5119 struct kvm_segment var
;
5121 var
.selector
= selector
;
5122 var
.base
= get_desc_base(desc
);
5123 #ifdef CONFIG_X86_64
5124 var
.base
|= ((u64
)base3
) << 32;
5126 var
.limit
= get_desc_limit(desc
);
5128 var
.limit
= (var
.limit
<< 12) | 0xfff;
5129 var
.type
= desc
->type
;
5130 var
.dpl
= desc
->dpl
;
5135 var
.avl
= desc
->avl
;
5136 var
.present
= desc
->p
;
5137 var
.unusable
= !var
.present
;
5140 kvm_set_segment(vcpu
, &var
, seg
);
5144 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5145 u32 msr_index
, u64
*pdata
)
5147 struct msr_data msr
;
5150 msr
.index
= msr_index
;
5151 msr
.host_initiated
= false;
5152 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5160 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5161 u32 msr_index
, u64 data
)
5163 struct msr_data msr
;
5166 msr
.index
= msr_index
;
5167 msr
.host_initiated
= false;
5168 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5171 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5173 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5175 return vcpu
->arch
.smbase
;
5178 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5180 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5182 vcpu
->arch
.smbase
= smbase
;
5185 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5188 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5191 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5192 u32 pmc
, u64
*pdata
)
5194 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5197 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5199 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5202 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5205 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5208 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5213 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5214 struct x86_instruction_info
*info
,
5215 enum x86_intercept_stage stage
)
5217 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5220 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5221 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5223 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5226 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5228 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5231 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5233 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5236 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5238 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5241 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5243 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5246 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5248 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5251 static const struct x86_emulate_ops emulate_ops
= {
5252 .read_gpr
= emulator_read_gpr
,
5253 .write_gpr
= emulator_write_gpr
,
5254 .read_std
= kvm_read_guest_virt_system
,
5255 .write_std
= kvm_write_guest_virt_system
,
5256 .read_phys
= kvm_read_guest_phys_system
,
5257 .fetch
= kvm_fetch_guest_virt
,
5258 .read_emulated
= emulator_read_emulated
,
5259 .write_emulated
= emulator_write_emulated
,
5260 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5261 .invlpg
= emulator_invlpg
,
5262 .pio_in_emulated
= emulator_pio_in_emulated
,
5263 .pio_out_emulated
= emulator_pio_out_emulated
,
5264 .get_segment
= emulator_get_segment
,
5265 .set_segment
= emulator_set_segment
,
5266 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5267 .get_gdt
= emulator_get_gdt
,
5268 .get_idt
= emulator_get_idt
,
5269 .set_gdt
= emulator_set_gdt
,
5270 .set_idt
= emulator_set_idt
,
5271 .get_cr
= emulator_get_cr
,
5272 .set_cr
= emulator_set_cr
,
5273 .cpl
= emulator_get_cpl
,
5274 .get_dr
= emulator_get_dr
,
5275 .set_dr
= emulator_set_dr
,
5276 .get_smbase
= emulator_get_smbase
,
5277 .set_smbase
= emulator_set_smbase
,
5278 .set_msr
= emulator_set_msr
,
5279 .get_msr
= emulator_get_msr
,
5280 .check_pmc
= emulator_check_pmc
,
5281 .read_pmc
= emulator_read_pmc
,
5282 .halt
= emulator_halt
,
5283 .wbinvd
= emulator_wbinvd
,
5284 .fix_hypercall
= emulator_fix_hypercall
,
5285 .get_fpu
= emulator_get_fpu
,
5286 .put_fpu
= emulator_put_fpu
,
5287 .intercept
= emulator_intercept
,
5288 .get_cpuid
= emulator_get_cpuid
,
5289 .set_nmi_mask
= emulator_set_nmi_mask
,
5290 .get_hflags
= emulator_get_hflags
,
5291 .set_hflags
= emulator_set_hflags
,
5294 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5296 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5298 * an sti; sti; sequence only disable interrupts for the first
5299 * instruction. So, if the last instruction, be it emulated or
5300 * not, left the system with the INT_STI flag enabled, it
5301 * means that the last instruction is an sti. We should not
5302 * leave the flag on in this case. The same goes for mov ss
5304 if (int_shadow
& mask
)
5306 if (unlikely(int_shadow
|| mask
)) {
5307 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5309 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5313 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5315 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5316 if (ctxt
->exception
.vector
== PF_VECTOR
)
5317 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5319 if (ctxt
->exception
.error_code_valid
)
5320 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5321 ctxt
->exception
.error_code
);
5323 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5327 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5329 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5332 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5334 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5335 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5337 ctxt
->eip
= kvm_rip_read(vcpu
);
5338 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5339 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5340 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5341 cs_db
? X86EMUL_MODE_PROT32
:
5342 X86EMUL_MODE_PROT16
;
5343 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5344 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5345 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5347 init_decode_cache(ctxt
);
5348 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5351 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5353 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5356 init_emulate_ctxt(vcpu
);
5360 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5361 ret
= emulate_int_real(ctxt
, irq
);
5363 if (ret
!= X86EMUL_CONTINUE
)
5364 return EMULATE_FAIL
;
5366 ctxt
->eip
= ctxt
->_eip
;
5367 kvm_rip_write(vcpu
, ctxt
->eip
);
5368 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5370 if (irq
== NMI_VECTOR
)
5371 vcpu
->arch
.nmi_pending
= 0;
5373 vcpu
->arch
.interrupt
.pending
= false;
5375 return EMULATE_DONE
;
5377 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5379 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5381 int r
= EMULATE_DONE
;
5383 ++vcpu
->stat
.insn_emulation_fail
;
5384 trace_kvm_emulate_insn_failed(vcpu
);
5385 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5386 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5387 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5388 vcpu
->run
->internal
.ndata
= 0;
5391 kvm_queue_exception(vcpu
, UD_VECTOR
);
5396 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5397 bool write_fault_to_shadow_pgtable
,
5403 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5406 if (!vcpu
->arch
.mmu
.direct_map
) {
5408 * Write permission should be allowed since only
5409 * write access need to be emulated.
5411 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5414 * If the mapping is invalid in guest, let cpu retry
5415 * it to generate fault.
5417 if (gpa
== UNMAPPED_GVA
)
5422 * Do not retry the unhandleable instruction if it faults on the
5423 * readonly host memory, otherwise it will goto a infinite loop:
5424 * retry instruction -> write #PF -> emulation fail -> retry
5425 * instruction -> ...
5427 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5430 * If the instruction failed on the error pfn, it can not be fixed,
5431 * report the error to userspace.
5433 if (is_error_noslot_pfn(pfn
))
5436 kvm_release_pfn_clean(pfn
);
5438 /* The instructions are well-emulated on direct mmu. */
5439 if (vcpu
->arch
.mmu
.direct_map
) {
5440 unsigned int indirect_shadow_pages
;
5442 spin_lock(&vcpu
->kvm
->mmu_lock
);
5443 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5444 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5446 if (indirect_shadow_pages
)
5447 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5453 * if emulation was due to access to shadowed page table
5454 * and it failed try to unshadow page and re-enter the
5455 * guest to let CPU execute the instruction.
5457 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5460 * If the access faults on its page table, it can not
5461 * be fixed by unprotecting shadow page and it should
5462 * be reported to userspace.
5464 return !write_fault_to_shadow_pgtable
;
5467 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5468 unsigned long cr2
, int emulation_type
)
5470 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5471 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5473 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5474 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5477 * If the emulation is caused by #PF and it is non-page_table
5478 * writing instruction, it means the VM-EXIT is caused by shadow
5479 * page protected, we can zap the shadow page and retry this
5480 * instruction directly.
5482 * Note: if the guest uses a non-page-table modifying instruction
5483 * on the PDE that points to the instruction, then we will unmap
5484 * the instruction and go to an infinite loop. So, we cache the
5485 * last retried eip and the last fault address, if we meet the eip
5486 * and the address again, we can break out of the potential infinite
5489 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5491 if (!(emulation_type
& EMULTYPE_RETRY
))
5494 if (x86_page_table_writing_insn(ctxt
))
5497 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5500 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5501 vcpu
->arch
.last_retry_addr
= cr2
;
5503 if (!vcpu
->arch
.mmu
.direct_map
)
5504 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5506 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5511 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5512 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5514 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5516 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5517 /* This is a good place to trace that we are exiting SMM. */
5518 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5520 /* Process a latched INIT or SMI, if any. */
5521 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5524 kvm_mmu_reset_context(vcpu
);
5527 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5529 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5531 vcpu
->arch
.hflags
= emul_flags
;
5533 if (changed
& HF_SMM_MASK
)
5534 kvm_smm_changed(vcpu
);
5537 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5546 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5547 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5552 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5554 struct kvm_run
*kvm_run
= vcpu
->run
;
5556 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5557 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5558 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5559 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5560 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5561 *r
= EMULATE_USER_EXIT
;
5564 * "Certain debug exceptions may clear bit 0-3. The
5565 * remaining contents of the DR6 register are never
5566 * cleared by the processor".
5568 vcpu
->arch
.dr6
&= ~15;
5569 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5570 kvm_queue_exception(vcpu
, DB_VECTOR
);
5574 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5576 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5577 int r
= EMULATE_DONE
;
5579 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5582 * rflags is the old, "raw" value of the flags. The new value has
5583 * not been saved yet.
5585 * This is correct even for TF set by the guest, because "the
5586 * processor will not generate this exception after the instruction
5587 * that sets the TF flag".
5589 if (unlikely(rflags
& X86_EFLAGS_TF
))
5590 kvm_vcpu_do_singlestep(vcpu
, &r
);
5591 return r
== EMULATE_DONE
;
5593 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5595 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5597 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5598 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5599 struct kvm_run
*kvm_run
= vcpu
->run
;
5600 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5601 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5602 vcpu
->arch
.guest_debug_dr7
,
5606 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5607 kvm_run
->debug
.arch
.pc
= eip
;
5608 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5609 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5610 *r
= EMULATE_USER_EXIT
;
5615 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5616 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5617 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5618 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5623 vcpu
->arch
.dr6
&= ~15;
5624 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5625 kvm_queue_exception(vcpu
, DB_VECTOR
);
5634 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5641 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5642 bool writeback
= true;
5643 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5646 * Clear write_fault_to_shadow_pgtable here to ensure it is
5649 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5650 kvm_clear_exception_queue(vcpu
);
5652 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5653 init_emulate_ctxt(vcpu
);
5656 * We will reenter on the same instruction since
5657 * we do not set complete_userspace_io. This does not
5658 * handle watchpoints yet, those would be handled in
5661 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5664 ctxt
->interruptibility
= 0;
5665 ctxt
->have_exception
= false;
5666 ctxt
->exception
.vector
= -1;
5667 ctxt
->perm_ok
= false;
5669 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5671 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5673 trace_kvm_emulate_insn_start(vcpu
);
5674 ++vcpu
->stat
.insn_emulation
;
5675 if (r
!= EMULATION_OK
) {
5676 if (emulation_type
& EMULTYPE_TRAP_UD
)
5677 return EMULATE_FAIL
;
5678 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5680 return EMULATE_DONE
;
5681 if (emulation_type
& EMULTYPE_SKIP
)
5682 return EMULATE_FAIL
;
5683 return handle_emulation_failure(vcpu
);
5687 if (emulation_type
& EMULTYPE_SKIP
) {
5688 kvm_rip_write(vcpu
, ctxt
->_eip
);
5689 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5690 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5691 return EMULATE_DONE
;
5694 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5695 return EMULATE_DONE
;
5697 /* this is needed for vmware backdoor interface to work since it
5698 changes registers values during IO operation */
5699 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5700 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5701 emulator_invalidate_register_cache(ctxt
);
5705 /* Save the faulting GPA (cr2) in the address field */
5706 ctxt
->exception
.address
= cr2
;
5708 r
= x86_emulate_insn(ctxt
);
5710 if (r
== EMULATION_INTERCEPTED
)
5711 return EMULATE_DONE
;
5713 if (r
== EMULATION_FAILED
) {
5714 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5716 return EMULATE_DONE
;
5718 return handle_emulation_failure(vcpu
);
5721 if (ctxt
->have_exception
) {
5723 if (inject_emulated_exception(vcpu
))
5725 } else if (vcpu
->arch
.pio
.count
) {
5726 if (!vcpu
->arch
.pio
.in
) {
5727 /* FIXME: return into emulator if single-stepping. */
5728 vcpu
->arch
.pio
.count
= 0;
5731 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5733 r
= EMULATE_USER_EXIT
;
5734 } else if (vcpu
->mmio_needed
) {
5735 if (!vcpu
->mmio_is_write
)
5737 r
= EMULATE_USER_EXIT
;
5738 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5739 } else if (r
== EMULATION_RESTART
)
5745 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5746 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5747 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5748 kvm_rip_write(vcpu
, ctxt
->eip
);
5749 if (r
== EMULATE_DONE
&&
5750 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5751 kvm_vcpu_do_singlestep(vcpu
, &r
);
5752 if (!ctxt
->have_exception
||
5753 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5754 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5757 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5758 * do nothing, and it will be requested again as soon as
5759 * the shadow expires. But we still need to check here,
5760 * because POPF has no interrupt shadow.
5762 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5763 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5765 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5769 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5771 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5773 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5774 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5775 size
, port
, &val
, 1);
5776 /* do not return to emulator after return from userspace */
5777 vcpu
->arch
.pio
.count
= 0;
5780 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5782 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5786 /* We should only ever be called with arch.pio.count equal to 1 */
5787 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5789 /* For size less than 4 we merge, else we zero extend */
5790 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5794 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5795 * the copy and tracing
5797 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5798 vcpu
->arch
.pio
.port
, &val
, 1);
5799 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5804 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5809 /* For size less than 4 we merge, else we zero extend */
5810 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5812 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5815 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5819 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5823 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5825 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5827 __this_cpu_write(cpu_tsc_khz
, 0);
5831 static void tsc_khz_changed(void *data
)
5833 struct cpufreq_freqs
*freq
= data
;
5834 unsigned long khz
= 0;
5838 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5839 khz
= cpufreq_quick_get(raw_smp_processor_id());
5842 __this_cpu_write(cpu_tsc_khz
, khz
);
5845 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5848 struct cpufreq_freqs
*freq
= data
;
5850 struct kvm_vcpu
*vcpu
;
5851 int i
, send_ipi
= 0;
5854 * We allow guests to temporarily run on slowing clocks,
5855 * provided we notify them after, or to run on accelerating
5856 * clocks, provided we notify them before. Thus time never
5859 * However, we have a problem. We can't atomically update
5860 * the frequency of a given CPU from this function; it is
5861 * merely a notifier, which can be called from any CPU.
5862 * Changing the TSC frequency at arbitrary points in time
5863 * requires a recomputation of local variables related to
5864 * the TSC for each VCPU. We must flag these local variables
5865 * to be updated and be sure the update takes place with the
5866 * new frequency before any guests proceed.
5868 * Unfortunately, the combination of hotplug CPU and frequency
5869 * change creates an intractable locking scenario; the order
5870 * of when these callouts happen is undefined with respect to
5871 * CPU hotplug, and they can race with each other. As such,
5872 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5873 * undefined; you can actually have a CPU frequency change take
5874 * place in between the computation of X and the setting of the
5875 * variable. To protect against this problem, all updates of
5876 * the per_cpu tsc_khz variable are done in an interrupt
5877 * protected IPI, and all callers wishing to update the value
5878 * must wait for a synchronous IPI to complete (which is trivial
5879 * if the caller is on the CPU already). This establishes the
5880 * necessary total order on variable updates.
5882 * Note that because a guest time update may take place
5883 * anytime after the setting of the VCPU's request bit, the
5884 * correct TSC value must be set before the request. However,
5885 * to ensure the update actually makes it to any guest which
5886 * starts running in hardware virtualization between the set
5887 * and the acquisition of the spinlock, we must also ping the
5888 * CPU after setting the request bit.
5892 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5894 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5897 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5899 spin_lock(&kvm_lock
);
5900 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5901 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5902 if (vcpu
->cpu
!= freq
->cpu
)
5904 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5905 if (vcpu
->cpu
!= smp_processor_id())
5909 spin_unlock(&kvm_lock
);
5911 if (freq
->old
< freq
->new && send_ipi
) {
5913 * We upscale the frequency. Must make the guest
5914 * doesn't see old kvmclock values while running with
5915 * the new frequency, otherwise we risk the guest sees
5916 * time go backwards.
5918 * In case we update the frequency for another cpu
5919 * (which might be in guest context) send an interrupt
5920 * to kick the cpu out of guest context. Next time
5921 * guest context is entered kvmclock will be updated,
5922 * so the guest will not see stale values.
5924 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5929 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5930 .notifier_call
= kvmclock_cpufreq_notifier
5933 static int kvmclock_cpu_online(unsigned int cpu
)
5935 tsc_khz_changed(NULL
);
5939 static void kvm_timer_init(void)
5941 max_tsc_khz
= tsc_khz
;
5943 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5944 #ifdef CONFIG_CPU_FREQ
5945 struct cpufreq_policy policy
;
5948 memset(&policy
, 0, sizeof(policy
));
5950 cpufreq_get_policy(&policy
, cpu
);
5951 if (policy
.cpuinfo
.max_freq
)
5952 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5955 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5956 CPUFREQ_TRANSITION_NOTIFIER
);
5958 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5960 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
5961 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
5964 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5966 int kvm_is_in_guest(void)
5968 return __this_cpu_read(current_vcpu
) != NULL
;
5971 static int kvm_is_user_mode(void)
5975 if (__this_cpu_read(current_vcpu
))
5976 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5978 return user_mode
!= 0;
5981 static unsigned long kvm_get_guest_ip(void)
5983 unsigned long ip
= 0;
5985 if (__this_cpu_read(current_vcpu
))
5986 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5991 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5992 .is_in_guest
= kvm_is_in_guest
,
5993 .is_user_mode
= kvm_is_user_mode
,
5994 .get_guest_ip
= kvm_get_guest_ip
,
5997 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5999 __this_cpu_write(current_vcpu
, vcpu
);
6001 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
6003 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
6005 __this_cpu_write(current_vcpu
, NULL
);
6007 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
6009 static void kvm_set_mmio_spte_mask(void)
6012 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6015 * Set the reserved bits and the present bit of an paging-structure
6016 * entry to generate page fault with PFER.RSV = 1.
6018 /* Mask the reserved physical address bits. */
6019 mask
= rsvd_bits(maxphyaddr
, 51);
6021 /* Set the present bit. */
6024 #ifdef CONFIG_X86_64
6026 * If reserved bit is not supported, clear the present bit to disable
6029 if (maxphyaddr
== 52)
6033 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6036 #ifdef CONFIG_X86_64
6037 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6041 struct kvm_vcpu
*vcpu
;
6044 spin_lock(&kvm_lock
);
6045 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6046 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6047 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6048 atomic_set(&kvm_guest_has_master_clock
, 0);
6049 spin_unlock(&kvm_lock
);
6052 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6055 * Notification about pvclock gtod data update.
6057 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6060 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6061 struct timekeeper
*tk
= priv
;
6063 update_pvclock_gtod(tk
);
6065 /* disable master clock if host does not trust, or does not
6066 * use, TSC clocksource
6068 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6069 atomic_read(&kvm_guest_has_master_clock
) != 0)
6070 queue_work(system_long_wq
, &pvclock_gtod_work
);
6075 static struct notifier_block pvclock_gtod_notifier
= {
6076 .notifier_call
= pvclock_gtod_notify
,
6080 int kvm_arch_init(void *opaque
)
6083 struct kvm_x86_ops
*ops
= opaque
;
6086 printk(KERN_ERR
"kvm: already loaded the other module\n");
6091 if (!ops
->cpu_has_kvm_support()) {
6092 printk(KERN_ERR
"kvm: no hardware support\n");
6096 if (ops
->disabled_by_bios()) {
6097 printk(KERN_ERR
"kvm: disabled by bios\n");
6103 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6105 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6109 r
= kvm_mmu_module_init();
6111 goto out_free_percpu
;
6113 kvm_set_mmio_spte_mask();
6117 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6118 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6119 PT_PRESENT_MASK
, 0);
6122 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6124 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6125 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6128 #ifdef CONFIG_X86_64
6129 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6135 free_percpu(shared_msrs
);
6140 void kvm_arch_exit(void)
6143 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6145 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6146 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6147 CPUFREQ_TRANSITION_NOTIFIER
);
6148 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6149 #ifdef CONFIG_X86_64
6150 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6153 kvm_mmu_module_exit();
6154 free_percpu(shared_msrs
);
6157 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6159 ++vcpu
->stat
.halt_exits
;
6160 if (lapic_in_kernel(vcpu
)) {
6161 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6164 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6168 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6170 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6172 int ret
= kvm_skip_emulated_instruction(vcpu
);
6174 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6175 * KVM_EXIT_DEBUG here.
6177 return kvm_vcpu_halt(vcpu
) && ret
;
6179 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6181 #ifdef CONFIG_X86_64
6182 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6183 unsigned long clock_type
)
6185 struct kvm_clock_pairing clock_pairing
;
6190 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6191 return -KVM_EOPNOTSUPP
;
6193 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6194 return -KVM_EOPNOTSUPP
;
6196 clock_pairing
.sec
= ts
.tv_sec
;
6197 clock_pairing
.nsec
= ts
.tv_nsec
;
6198 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6199 clock_pairing
.flags
= 0;
6202 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6203 sizeof(struct kvm_clock_pairing
)))
6211 * kvm_pv_kick_cpu_op: Kick a vcpu.
6213 * @apicid - apicid of vcpu to be kicked.
6215 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6217 struct kvm_lapic_irq lapic_irq
;
6219 lapic_irq
.shorthand
= 0;
6220 lapic_irq
.dest_mode
= 0;
6221 lapic_irq
.level
= 0;
6222 lapic_irq
.dest_id
= apicid
;
6223 lapic_irq
.msi_redir_hint
= false;
6225 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6226 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6229 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6231 vcpu
->arch
.apicv_active
= false;
6232 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6235 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6237 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6240 r
= kvm_skip_emulated_instruction(vcpu
);
6242 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6243 return kvm_hv_hypercall(vcpu
);
6245 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6246 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6247 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6248 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6249 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6251 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6253 op_64_bit
= is_64_bit_mode(vcpu
);
6262 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6268 case KVM_HC_VAPIC_POLL_IRQ
:
6271 case KVM_HC_KICK_CPU
:
6272 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6275 #ifdef CONFIG_X86_64
6276 case KVM_HC_CLOCK_PAIRING
:
6277 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6287 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6288 ++vcpu
->stat
.hypercalls
;
6291 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6293 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6295 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6296 char instruction
[3];
6297 unsigned long rip
= kvm_rip_read(vcpu
);
6299 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6301 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6305 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6307 return vcpu
->run
->request_interrupt_window
&&
6308 likely(!pic_in_kernel(vcpu
->kvm
));
6311 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6313 struct kvm_run
*kvm_run
= vcpu
->run
;
6315 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6316 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6317 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6318 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6319 kvm_run
->ready_for_interrupt_injection
=
6320 pic_in_kernel(vcpu
->kvm
) ||
6321 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6324 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6328 if (!kvm_x86_ops
->update_cr8_intercept
)
6331 if (!lapic_in_kernel(vcpu
))
6334 if (vcpu
->arch
.apicv_active
)
6337 if (!vcpu
->arch
.apic
->vapic_addr
)
6338 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6345 tpr
= kvm_lapic_get_cr8(vcpu
);
6347 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6350 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6354 /* try to reinject previous events if any */
6355 if (vcpu
->arch
.exception
.pending
) {
6356 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6357 vcpu
->arch
.exception
.has_error_code
,
6358 vcpu
->arch
.exception
.error_code
);
6360 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6361 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6364 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6365 (vcpu
->arch
.dr7
& DR7_GD
)) {
6366 vcpu
->arch
.dr7
&= ~DR7_GD
;
6367 kvm_update_dr7(vcpu
);
6370 kvm_x86_ops
->queue_exception(vcpu
);
6374 if (vcpu
->arch
.nmi_injected
) {
6375 kvm_x86_ops
->set_nmi(vcpu
);
6379 if (vcpu
->arch
.interrupt
.pending
) {
6380 kvm_x86_ops
->set_irq(vcpu
);
6384 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6385 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6390 /* try to inject new event if pending */
6391 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6392 vcpu
->arch
.smi_pending
= false;
6394 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6395 --vcpu
->arch
.nmi_pending
;
6396 vcpu
->arch
.nmi_injected
= true;
6397 kvm_x86_ops
->set_nmi(vcpu
);
6398 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6400 * Because interrupts can be injected asynchronously, we are
6401 * calling check_nested_events again here to avoid a race condition.
6402 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6403 * proposal and current concerns. Perhaps we should be setting
6404 * KVM_REQ_EVENT only on certain events and not unconditionally?
6406 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6407 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6411 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6412 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6414 kvm_x86_ops
->set_irq(vcpu
);
6421 static void process_nmi(struct kvm_vcpu
*vcpu
)
6426 * x86 is limited to one NMI running, and one NMI pending after it.
6427 * If an NMI is already in progress, limit further NMIs to just one.
6428 * Otherwise, allow two (and we'll inject the first one immediately).
6430 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6433 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6434 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6435 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6438 #define put_smstate(type, buf, offset, val) \
6439 *(type *)((buf) + (offset) - 0x7e00) = val
6441 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6444 flags
|= seg
->g
<< 23;
6445 flags
|= seg
->db
<< 22;
6446 flags
|= seg
->l
<< 21;
6447 flags
|= seg
->avl
<< 20;
6448 flags
|= seg
->present
<< 15;
6449 flags
|= seg
->dpl
<< 13;
6450 flags
|= seg
->s
<< 12;
6451 flags
|= seg
->type
<< 8;
6455 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6457 struct kvm_segment seg
;
6460 kvm_get_segment(vcpu
, &seg
, n
);
6461 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6464 offset
= 0x7f84 + n
* 12;
6466 offset
= 0x7f2c + (n
- 3) * 12;
6468 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6469 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6470 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6473 #ifdef CONFIG_X86_64
6474 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6476 struct kvm_segment seg
;
6480 kvm_get_segment(vcpu
, &seg
, n
);
6481 offset
= 0x7e00 + n
* 16;
6483 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6484 put_smstate(u16
, buf
, offset
, seg
.selector
);
6485 put_smstate(u16
, buf
, offset
+ 2, flags
);
6486 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6487 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6491 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6494 struct kvm_segment seg
;
6498 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6499 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6500 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6501 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6503 for (i
= 0; i
< 8; i
++)
6504 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6506 kvm_get_dr(vcpu
, 6, &val
);
6507 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6508 kvm_get_dr(vcpu
, 7, &val
);
6509 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6511 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6512 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6513 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6514 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6515 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6517 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6518 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6519 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6520 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6521 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6523 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6524 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6525 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6527 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6528 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6529 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6531 for (i
= 0; i
< 6; i
++)
6532 enter_smm_save_seg_32(vcpu
, buf
, i
);
6534 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6537 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6538 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6541 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6543 #ifdef CONFIG_X86_64
6545 struct kvm_segment seg
;
6549 for (i
= 0; i
< 16; i
++)
6550 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6552 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6553 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6555 kvm_get_dr(vcpu
, 6, &val
);
6556 put_smstate(u64
, buf
, 0x7f68, val
);
6557 kvm_get_dr(vcpu
, 7, &val
);
6558 put_smstate(u64
, buf
, 0x7f60, val
);
6560 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6561 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6562 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6564 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6567 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6569 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6571 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6572 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6573 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6574 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6575 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6577 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6578 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6579 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6581 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6582 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6583 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6584 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6585 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6587 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6588 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6589 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6591 for (i
= 0; i
< 6; i
++)
6592 enter_smm_save_seg_64(vcpu
, buf
, i
);
6598 static void enter_smm(struct kvm_vcpu
*vcpu
)
6600 struct kvm_segment cs
, ds
;
6605 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6606 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6607 memset(buf
, 0, 512);
6608 if (guest_cpuid_has_longmode(vcpu
))
6609 enter_smm_save_state_64(vcpu
, buf
);
6611 enter_smm_save_state_32(vcpu
, buf
);
6613 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6615 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6616 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6618 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6620 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6621 kvm_rip_write(vcpu
, 0x8000);
6623 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6624 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6625 vcpu
->arch
.cr0
= cr0
;
6627 kvm_x86_ops
->set_cr4(vcpu
, 0);
6629 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6630 dt
.address
= dt
.size
= 0;
6631 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6633 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6635 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6636 cs
.base
= vcpu
->arch
.smbase
;
6641 cs
.limit
= ds
.limit
= 0xffffffff;
6642 cs
.type
= ds
.type
= 0x3;
6643 cs
.dpl
= ds
.dpl
= 0;
6648 cs
.avl
= ds
.avl
= 0;
6649 cs
.present
= ds
.present
= 1;
6650 cs
.unusable
= ds
.unusable
= 0;
6651 cs
.padding
= ds
.padding
= 0;
6653 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6654 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6655 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6656 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6657 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6658 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6660 if (guest_cpuid_has_longmode(vcpu
))
6661 kvm_x86_ops
->set_efer(vcpu
, 0);
6663 kvm_update_cpuid(vcpu
);
6664 kvm_mmu_reset_context(vcpu
);
6667 static void process_smi(struct kvm_vcpu
*vcpu
)
6669 vcpu
->arch
.smi_pending
= true;
6670 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6673 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6675 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6678 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6680 u64 eoi_exit_bitmap
[4];
6682 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6685 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6687 if (irqchip_split(vcpu
->kvm
))
6688 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6690 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6691 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6692 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6694 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6695 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6696 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6699 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6701 ++vcpu
->stat
.tlb_flush
;
6702 kvm_x86_ops
->tlb_flush(vcpu
);
6705 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6707 struct page
*page
= NULL
;
6709 if (!lapic_in_kernel(vcpu
))
6712 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6715 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6716 if (is_error_page(page
))
6718 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6721 * Do not pin apic access page in memory, the MMU notifier
6722 * will call us again if it is migrated or swapped out.
6726 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6728 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6729 unsigned long address
)
6732 * The physical address of apic access page is stored in the VMCS.
6733 * Update it when it becomes invalid.
6735 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6736 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6740 * Returns 1 to let vcpu_run() continue the guest execution loop without
6741 * exiting to the userspace. Otherwise, the value will be returned to the
6744 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6748 dm_request_for_irq_injection(vcpu
) &&
6749 kvm_cpu_accept_dm_intr(vcpu
);
6751 bool req_immediate_exit
= false;
6753 if (kvm_request_pending(vcpu
)) {
6754 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6755 kvm_mmu_unload(vcpu
);
6756 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6757 __kvm_migrate_timers(vcpu
);
6758 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6759 kvm_gen_update_masterclock(vcpu
->kvm
);
6760 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6761 kvm_gen_kvmclock_update(vcpu
);
6762 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6763 r
= kvm_guest_time_update(vcpu
);
6767 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6768 kvm_mmu_sync_roots(vcpu
);
6769 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6770 kvm_vcpu_flush_tlb(vcpu
);
6771 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6772 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6776 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6777 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6781 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6782 /* Page is swapped out. Do synthetic halt */
6783 vcpu
->arch
.apf
.halted
= true;
6787 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6788 record_steal_time(vcpu
);
6789 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6791 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6793 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6794 kvm_pmu_handle_event(vcpu
);
6795 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6796 kvm_pmu_deliver_pmi(vcpu
);
6797 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6798 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6799 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6800 vcpu
->arch
.ioapic_handled_vectors
)) {
6801 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6802 vcpu
->run
->eoi
.vector
=
6803 vcpu
->arch
.pending_ioapic_eoi
;
6808 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6809 vcpu_scan_ioapic(vcpu
);
6810 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6811 kvm_vcpu_reload_apic_access_page(vcpu
);
6812 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6813 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6814 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6818 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6819 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6820 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6824 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6825 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6826 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6832 * KVM_REQ_HV_STIMER has to be processed after
6833 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6834 * depend on the guest clock being up-to-date
6836 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6837 kvm_hv_process_stimers(vcpu
);
6840 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6841 ++vcpu
->stat
.req_event
;
6842 kvm_apic_accept_events(vcpu
);
6843 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6848 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6849 req_immediate_exit
= true;
6851 /* Enable NMI/IRQ window open exits if needed.
6853 * SMIs have two cases: 1) they can be nested, and
6854 * then there is nothing to do here because RSM will
6855 * cause a vmexit anyway; 2) or the SMI can be pending
6856 * because inject_pending_event has completed the
6857 * injection of an IRQ or NMI from the previous vmexit,
6858 * and then we request an immediate exit to inject the SMI.
6860 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6861 req_immediate_exit
= true;
6862 if (vcpu
->arch
.nmi_pending
)
6863 kvm_x86_ops
->enable_nmi_window(vcpu
);
6864 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6865 kvm_x86_ops
->enable_irq_window(vcpu
);
6868 if (kvm_lapic_enabled(vcpu
)) {
6869 update_cr8_intercept(vcpu
);
6870 kvm_lapic_sync_to_vapic(vcpu
);
6874 r
= kvm_mmu_reload(vcpu
);
6876 goto cancel_injection
;
6881 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6882 kvm_load_guest_fpu(vcpu
);
6885 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
6886 * IPI are then delayed after guest entry, which ensures that they
6887 * result in virtual interrupt delivery.
6889 local_irq_disable();
6890 vcpu
->mode
= IN_GUEST_MODE
;
6892 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6895 * 1) We should set ->mode before checking ->requests. Please see
6896 * the comment in kvm_vcpu_exiting_guest_mode().
6898 * 2) For APICv, we should set ->mode before checking PIR.ON. This
6899 * pairs with the memory barrier implicit in pi_test_and_set_on
6900 * (see vmx_deliver_posted_interrupt).
6902 * 3) This also orders the write to mode from any reads to the page
6903 * tables done while the VCPU is running. Please see the comment
6904 * in kvm_flush_remote_tlbs.
6906 smp_mb__after_srcu_read_unlock();
6909 * This handles the case where a posted interrupt was
6910 * notified with kvm_vcpu_kick.
6912 if (kvm_lapic_enabled(vcpu
)) {
6913 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6914 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6917 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
6918 || need_resched() || signal_pending(current
)) {
6919 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6923 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6925 goto cancel_injection
;
6928 kvm_load_guest_xcr0(vcpu
);
6930 if (req_immediate_exit
) {
6931 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6932 smp_send_reschedule(vcpu
->cpu
);
6935 trace_kvm_entry(vcpu
->vcpu_id
);
6936 wait_lapic_expire(vcpu
);
6937 guest_enter_irqoff();
6939 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6941 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6942 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6943 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6944 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6945 set_debugreg(vcpu
->arch
.dr6
, 6);
6946 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6949 kvm_x86_ops
->run(vcpu
);
6952 * Do this here before restoring debug registers on the host. And
6953 * since we do this before handling the vmexit, a DR access vmexit
6954 * can (a) read the correct value of the debug registers, (b) set
6955 * KVM_DEBUGREG_WONT_EXIT again.
6957 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6958 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6959 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6960 kvm_update_dr0123(vcpu
);
6961 kvm_update_dr6(vcpu
);
6962 kvm_update_dr7(vcpu
);
6963 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6967 * If the guest has used debug registers, at least dr7
6968 * will be disabled while returning to the host.
6969 * If we don't have active breakpoints in the host, we don't
6970 * care about the messed up debug address registers. But if
6971 * we have some of them active, restore the old state.
6973 if (hw_breakpoint_active())
6974 hw_breakpoint_restore();
6976 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6978 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6981 kvm_put_guest_xcr0(vcpu
);
6983 kvm_x86_ops
->handle_external_intr(vcpu
);
6987 guest_exit_irqoff();
6992 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6995 * Profile KVM exit RIPs:
6997 if (unlikely(prof_on
== KVM_PROFILING
)) {
6998 unsigned long rip
= kvm_rip_read(vcpu
);
6999 profile_hit(KVM_PROFILING
, (void *)rip
);
7002 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7003 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7005 if (vcpu
->arch
.apic_attention
)
7006 kvm_lapic_sync_from_vapic(vcpu
);
7008 r
= kvm_x86_ops
->handle_exit(vcpu
);
7012 kvm_x86_ops
->cancel_injection(vcpu
);
7013 if (unlikely(vcpu
->arch
.apic_attention
))
7014 kvm_lapic_sync_from_vapic(vcpu
);
7019 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7021 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7022 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7023 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7024 kvm_vcpu_block(vcpu
);
7025 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7027 if (kvm_x86_ops
->post_block
)
7028 kvm_x86_ops
->post_block(vcpu
);
7030 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7034 kvm_apic_accept_events(vcpu
);
7035 switch(vcpu
->arch
.mp_state
) {
7036 case KVM_MP_STATE_HALTED
:
7037 vcpu
->arch
.pv
.pv_unhalted
= false;
7038 vcpu
->arch
.mp_state
=
7039 KVM_MP_STATE_RUNNABLE
;
7040 case KVM_MP_STATE_RUNNABLE
:
7041 vcpu
->arch
.apf
.halted
= false;
7043 case KVM_MP_STATE_INIT_RECEIVED
:
7052 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7054 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7055 kvm_x86_ops
->check_nested_events(vcpu
, false);
7057 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7058 !vcpu
->arch
.apf
.halted
);
7061 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7064 struct kvm
*kvm
= vcpu
->kvm
;
7066 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7069 if (kvm_vcpu_running(vcpu
)) {
7070 r
= vcpu_enter_guest(vcpu
);
7072 r
= vcpu_block(kvm
, vcpu
);
7078 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7079 if (kvm_cpu_has_pending_timer(vcpu
))
7080 kvm_inject_pending_timer_irqs(vcpu
);
7082 if (dm_request_for_irq_injection(vcpu
) &&
7083 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7085 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7086 ++vcpu
->stat
.request_irq_exits
;
7090 kvm_check_async_pf_completion(vcpu
);
7092 if (signal_pending(current
)) {
7094 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7095 ++vcpu
->stat
.signal_exits
;
7098 if (need_resched()) {
7099 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7101 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7105 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7110 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7113 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7114 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7115 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7116 if (r
!= EMULATE_DONE
)
7121 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7123 BUG_ON(!vcpu
->arch
.pio
.count
);
7125 return complete_emulated_io(vcpu
);
7129 * Implements the following, as a state machine:
7133 * for each mmio piece in the fragment
7141 * for each mmio piece in the fragment
7146 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7148 struct kvm_run
*run
= vcpu
->run
;
7149 struct kvm_mmio_fragment
*frag
;
7152 BUG_ON(!vcpu
->mmio_needed
);
7154 /* Complete previous fragment */
7155 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7156 len
= min(8u, frag
->len
);
7157 if (!vcpu
->mmio_is_write
)
7158 memcpy(frag
->data
, run
->mmio
.data
, len
);
7160 if (frag
->len
<= 8) {
7161 /* Switch to the next fragment. */
7163 vcpu
->mmio_cur_fragment
++;
7165 /* Go forward to the next mmio piece. */
7171 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7172 vcpu
->mmio_needed
= 0;
7174 /* FIXME: return into emulator if single-stepping. */
7175 if (vcpu
->mmio_is_write
)
7177 vcpu
->mmio_read_completed
= 1;
7178 return complete_emulated_io(vcpu
);
7181 run
->exit_reason
= KVM_EXIT_MMIO
;
7182 run
->mmio
.phys_addr
= frag
->gpa
;
7183 if (vcpu
->mmio_is_write
)
7184 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7185 run
->mmio
.len
= min(8u, frag
->len
);
7186 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7187 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7192 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7194 struct fpu
*fpu
= ¤t
->thread
.fpu
;
7198 fpu__activate_curr(fpu
);
7200 if (vcpu
->sigset_active
)
7201 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
7203 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7204 kvm_vcpu_block(vcpu
);
7205 kvm_apic_accept_events(vcpu
);
7206 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7211 /* re-sync apic's tpr */
7212 if (!lapic_in_kernel(vcpu
)) {
7213 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7219 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7220 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7221 vcpu
->arch
.complete_userspace_io
= NULL
;
7226 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7228 if (kvm_run
->immediate_exit
)
7234 post_kvm_run_save(vcpu
);
7235 if (vcpu
->sigset_active
)
7236 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
7241 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7243 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7245 * We are here if userspace calls get_regs() in the middle of
7246 * instruction emulation. Registers state needs to be copied
7247 * back from emulation context to vcpu. Userspace shouldn't do
7248 * that usually, but some bad designed PV devices (vmware
7249 * backdoor interface) need this to work
7251 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7252 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7254 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7255 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7256 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7257 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7258 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7259 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7260 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7261 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7262 #ifdef CONFIG_X86_64
7263 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7264 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7265 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7266 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7267 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7268 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7269 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7270 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7273 regs
->rip
= kvm_rip_read(vcpu
);
7274 regs
->rflags
= kvm_get_rflags(vcpu
);
7279 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7281 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7282 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7284 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7285 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7286 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7287 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7288 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7289 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7290 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7291 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7292 #ifdef CONFIG_X86_64
7293 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7294 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7295 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7296 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7297 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7298 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7299 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7300 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7303 kvm_rip_write(vcpu
, regs
->rip
);
7304 kvm_set_rflags(vcpu
, regs
->rflags
);
7306 vcpu
->arch
.exception
.pending
= false;
7308 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7313 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7315 struct kvm_segment cs
;
7317 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7321 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7323 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7324 struct kvm_sregs
*sregs
)
7328 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7329 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7330 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7331 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7332 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7333 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7335 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7336 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7338 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7339 sregs
->idt
.limit
= dt
.size
;
7340 sregs
->idt
.base
= dt
.address
;
7341 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7342 sregs
->gdt
.limit
= dt
.size
;
7343 sregs
->gdt
.base
= dt
.address
;
7345 sregs
->cr0
= kvm_read_cr0(vcpu
);
7346 sregs
->cr2
= vcpu
->arch
.cr2
;
7347 sregs
->cr3
= kvm_read_cr3(vcpu
);
7348 sregs
->cr4
= kvm_read_cr4(vcpu
);
7349 sregs
->cr8
= kvm_get_cr8(vcpu
);
7350 sregs
->efer
= vcpu
->arch
.efer
;
7351 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7353 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7355 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7356 set_bit(vcpu
->arch
.interrupt
.nr
,
7357 (unsigned long *)sregs
->interrupt_bitmap
);
7362 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7363 struct kvm_mp_state
*mp_state
)
7365 kvm_apic_accept_events(vcpu
);
7366 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7367 vcpu
->arch
.pv
.pv_unhalted
)
7368 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7370 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7375 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7376 struct kvm_mp_state
*mp_state
)
7378 if (!lapic_in_kernel(vcpu
) &&
7379 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7382 /* INITs are latched while in SMM */
7383 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7384 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7385 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7388 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7389 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7390 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7392 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7393 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7397 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7398 int reason
, bool has_error_code
, u32 error_code
)
7400 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7403 init_emulate_ctxt(vcpu
);
7405 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7406 has_error_code
, error_code
);
7409 return EMULATE_FAIL
;
7411 kvm_rip_write(vcpu
, ctxt
->eip
);
7412 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7413 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7414 return EMULATE_DONE
;
7416 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7418 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7419 struct kvm_sregs
*sregs
)
7421 struct msr_data apic_base_msr
;
7422 int mmu_reset_needed
= 0;
7423 int pending_vec
, max_bits
, idx
;
7426 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7429 dt
.size
= sregs
->idt
.limit
;
7430 dt
.address
= sregs
->idt
.base
;
7431 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7432 dt
.size
= sregs
->gdt
.limit
;
7433 dt
.address
= sregs
->gdt
.base
;
7434 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7436 vcpu
->arch
.cr2
= sregs
->cr2
;
7437 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7438 vcpu
->arch
.cr3
= sregs
->cr3
;
7439 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7441 kvm_set_cr8(vcpu
, sregs
->cr8
);
7443 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7444 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7445 apic_base_msr
.data
= sregs
->apic_base
;
7446 apic_base_msr
.host_initiated
= true;
7447 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7449 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7450 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7451 vcpu
->arch
.cr0
= sregs
->cr0
;
7453 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7454 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7455 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7456 kvm_update_cpuid(vcpu
);
7458 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7459 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7460 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7461 mmu_reset_needed
= 1;
7463 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7465 if (mmu_reset_needed
)
7466 kvm_mmu_reset_context(vcpu
);
7468 max_bits
= KVM_NR_INTERRUPTS
;
7469 pending_vec
= find_first_bit(
7470 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7471 if (pending_vec
< max_bits
) {
7472 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7473 pr_debug("Set back pending irq %d\n", pending_vec
);
7476 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7477 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7478 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7479 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7480 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7481 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7483 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7484 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7486 update_cr8_intercept(vcpu
);
7488 /* Older userspace won't unhalt the vcpu on reset. */
7489 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7490 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7492 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7494 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7499 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7500 struct kvm_guest_debug
*dbg
)
7502 unsigned long rflags
;
7505 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7507 if (vcpu
->arch
.exception
.pending
)
7509 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7510 kvm_queue_exception(vcpu
, DB_VECTOR
);
7512 kvm_queue_exception(vcpu
, BP_VECTOR
);
7516 * Read rflags as long as potentially injected trace flags are still
7519 rflags
= kvm_get_rflags(vcpu
);
7521 vcpu
->guest_debug
= dbg
->control
;
7522 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7523 vcpu
->guest_debug
= 0;
7525 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7526 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7527 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7528 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7530 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7531 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7533 kvm_update_dr7(vcpu
);
7535 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7536 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7537 get_segment_base(vcpu
, VCPU_SREG_CS
);
7540 * Trigger an rflags update that will inject or remove the trace
7543 kvm_set_rflags(vcpu
, rflags
);
7545 kvm_x86_ops
->update_bp_intercept(vcpu
);
7555 * Translate a guest virtual address to a guest physical address.
7557 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7558 struct kvm_translation
*tr
)
7560 unsigned long vaddr
= tr
->linear_address
;
7564 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7565 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7566 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7567 tr
->physical_address
= gpa
;
7568 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7575 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7577 struct fxregs_state
*fxsave
=
7578 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7580 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7581 fpu
->fcw
= fxsave
->cwd
;
7582 fpu
->fsw
= fxsave
->swd
;
7583 fpu
->ftwx
= fxsave
->twd
;
7584 fpu
->last_opcode
= fxsave
->fop
;
7585 fpu
->last_ip
= fxsave
->rip
;
7586 fpu
->last_dp
= fxsave
->rdp
;
7587 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7592 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7594 struct fxregs_state
*fxsave
=
7595 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7597 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7598 fxsave
->cwd
= fpu
->fcw
;
7599 fxsave
->swd
= fpu
->fsw
;
7600 fxsave
->twd
= fpu
->ftwx
;
7601 fxsave
->fop
= fpu
->last_opcode
;
7602 fxsave
->rip
= fpu
->last_ip
;
7603 fxsave
->rdp
= fpu
->last_dp
;
7604 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7609 static void fx_init(struct kvm_vcpu
*vcpu
)
7611 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7612 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7613 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7614 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7617 * Ensure guest xcr0 is valid for loading
7619 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7621 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7624 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7626 if (vcpu
->guest_fpu_loaded
)
7630 * Restore all possible states in the guest,
7631 * and assume host would use all available bits.
7632 * Guest xcr0 would be loaded later.
7634 vcpu
->guest_fpu_loaded
= 1;
7635 __kernel_fpu_begin();
7636 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7640 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7642 if (!vcpu
->guest_fpu_loaded
)
7645 vcpu
->guest_fpu_loaded
= 0;
7646 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7648 ++vcpu
->stat
.fpu_reload
;
7652 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7654 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7656 kvmclock_reset(vcpu
);
7658 kvm_x86_ops
->vcpu_free(vcpu
);
7659 free_cpumask_var(wbinvd_dirty_mask
);
7662 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7665 struct kvm_vcpu
*vcpu
;
7667 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7668 printk_once(KERN_WARNING
7669 "kvm: SMP vm created on host with unstable TSC; "
7670 "guest TSC will not be reliable\n");
7672 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7677 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7681 kvm_vcpu_mtrr_init(vcpu
);
7682 r
= vcpu_load(vcpu
);
7685 kvm_vcpu_reset(vcpu
, false);
7686 kvm_mmu_setup(vcpu
);
7691 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7693 struct msr_data msr
;
7694 struct kvm
*kvm
= vcpu
->kvm
;
7696 kvm_hv_vcpu_postcreate(vcpu
);
7698 if (vcpu_load(vcpu
))
7701 msr
.index
= MSR_IA32_TSC
;
7702 msr
.host_initiated
= true;
7703 kvm_write_tsc(vcpu
, &msr
);
7706 if (!kvmclock_periodic_sync
)
7709 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7710 KVMCLOCK_SYNC_PERIOD
);
7713 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7716 vcpu
->arch
.apf
.msr_val
= 0;
7718 r
= vcpu_load(vcpu
);
7720 kvm_mmu_unload(vcpu
);
7723 kvm_x86_ops
->vcpu_free(vcpu
);
7726 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7728 vcpu
->arch
.hflags
= 0;
7730 vcpu
->arch
.smi_pending
= 0;
7731 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7732 vcpu
->arch
.nmi_pending
= 0;
7733 vcpu
->arch
.nmi_injected
= false;
7734 kvm_clear_interrupt_queue(vcpu
);
7735 kvm_clear_exception_queue(vcpu
);
7737 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7738 kvm_update_dr0123(vcpu
);
7739 vcpu
->arch
.dr6
= DR6_INIT
;
7740 kvm_update_dr6(vcpu
);
7741 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7742 kvm_update_dr7(vcpu
);
7746 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7747 vcpu
->arch
.apf
.msr_val
= 0;
7748 vcpu
->arch
.st
.msr_val
= 0;
7750 kvmclock_reset(vcpu
);
7752 kvm_clear_async_pf_completion_queue(vcpu
);
7753 kvm_async_pf_hash_reset(vcpu
);
7754 vcpu
->arch
.apf
.halted
= false;
7757 kvm_pmu_reset(vcpu
);
7758 vcpu
->arch
.smbase
= 0x30000;
7760 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
7761 vcpu
->arch
.msr_misc_features_enables
= 0;
7764 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7765 vcpu
->arch
.regs_avail
= ~0;
7766 vcpu
->arch
.regs_dirty
= ~0;
7768 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7771 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7773 struct kvm_segment cs
;
7775 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7776 cs
.selector
= vector
<< 8;
7777 cs
.base
= vector
<< 12;
7778 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7779 kvm_rip_write(vcpu
, 0);
7782 int kvm_arch_hardware_enable(void)
7785 struct kvm_vcpu
*vcpu
;
7790 bool stable
, backwards_tsc
= false;
7792 kvm_shared_msr_cpu_online();
7793 ret
= kvm_x86_ops
->hardware_enable();
7797 local_tsc
= rdtsc();
7798 stable
= !check_tsc_unstable();
7799 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7800 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7801 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7802 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7803 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7804 backwards_tsc
= true;
7805 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7806 max_tsc
= vcpu
->arch
.last_host_tsc
;
7812 * Sometimes, even reliable TSCs go backwards. This happens on
7813 * platforms that reset TSC during suspend or hibernate actions, but
7814 * maintain synchronization. We must compensate. Fortunately, we can
7815 * detect that condition here, which happens early in CPU bringup,
7816 * before any KVM threads can be running. Unfortunately, we can't
7817 * bring the TSCs fully up to date with real time, as we aren't yet far
7818 * enough into CPU bringup that we know how much real time has actually
7819 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7820 * variables that haven't been updated yet.
7822 * So we simply find the maximum observed TSC above, then record the
7823 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7824 * the adjustment will be applied. Note that we accumulate
7825 * adjustments, in case multiple suspend cycles happen before some VCPU
7826 * gets a chance to run again. In the event that no KVM threads get a
7827 * chance to run, we will miss the entire elapsed period, as we'll have
7828 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7829 * loose cycle time. This isn't too big a deal, since the loss will be
7830 * uniform across all VCPUs (not to mention the scenario is extremely
7831 * unlikely). It is possible that a second hibernate recovery happens
7832 * much faster than a first, causing the observed TSC here to be
7833 * smaller; this would require additional padding adjustment, which is
7834 * why we set last_host_tsc to the local tsc observed here.
7836 * N.B. - this code below runs only on platforms with reliable TSC,
7837 * as that is the only way backwards_tsc is set above. Also note
7838 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7839 * have the same delta_cyc adjustment applied if backwards_tsc
7840 * is detected. Note further, this adjustment is only done once,
7841 * as we reset last_host_tsc on all VCPUs to stop this from being
7842 * called multiple times (one for each physical CPU bringup).
7844 * Platforms with unreliable TSCs don't have to deal with this, they
7845 * will be compensated by the logic in vcpu_load, which sets the TSC to
7846 * catchup mode. This will catchup all VCPUs to real time, but cannot
7847 * guarantee that they stay in perfect synchronization.
7849 if (backwards_tsc
) {
7850 u64 delta_cyc
= max_tsc
- local_tsc
;
7851 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7852 kvm
->arch
.backwards_tsc_observed
= true;
7853 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7854 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7855 vcpu
->arch
.last_host_tsc
= local_tsc
;
7856 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7860 * We have to disable TSC offset matching.. if you were
7861 * booting a VM while issuing an S4 host suspend....
7862 * you may have some problem. Solving this issue is
7863 * left as an exercise to the reader.
7865 kvm
->arch
.last_tsc_nsec
= 0;
7866 kvm
->arch
.last_tsc_write
= 0;
7873 void kvm_arch_hardware_disable(void)
7875 kvm_x86_ops
->hardware_disable();
7876 drop_user_return_notifiers();
7879 int kvm_arch_hardware_setup(void)
7883 r
= kvm_x86_ops
->hardware_setup();
7887 if (kvm_has_tsc_control
) {
7889 * Make sure the user can only configure tsc_khz values that
7890 * fit into a signed integer.
7891 * A min value is not calculated needed because it will always
7892 * be 1 on all machines.
7894 u64 max
= min(0x7fffffffULL
,
7895 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7896 kvm_max_guest_tsc_khz
= max
;
7898 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7901 kvm_init_msr_list();
7905 void kvm_arch_hardware_unsetup(void)
7907 kvm_x86_ops
->hardware_unsetup();
7910 void kvm_arch_check_processor_compat(void *rtn
)
7912 kvm_x86_ops
->check_processor_compatibility(rtn
);
7915 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7917 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7919 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7921 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7923 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7926 struct static_key kvm_no_apic_vcpu __read_mostly
;
7927 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7929 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7935 BUG_ON(vcpu
->kvm
== NULL
);
7938 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7939 vcpu
->arch
.pv
.pv_unhalted
= false;
7940 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7941 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7942 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7944 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7946 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7951 vcpu
->arch
.pio_data
= page_address(page
);
7953 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7955 r
= kvm_mmu_create(vcpu
);
7957 goto fail_free_pio_data
;
7959 if (irqchip_in_kernel(kvm
)) {
7960 r
= kvm_create_lapic(vcpu
);
7962 goto fail_mmu_destroy
;
7964 static_key_slow_inc(&kvm_no_apic_vcpu
);
7966 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7968 if (!vcpu
->arch
.mce_banks
) {
7970 goto fail_free_lapic
;
7972 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7974 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7976 goto fail_free_mce_banks
;
7981 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7982 vcpu
->arch
.pv_time_enabled
= false;
7984 vcpu
->arch
.guest_supported_xcr0
= 0;
7985 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7987 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7989 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7991 kvm_async_pf_hash_reset(vcpu
);
7994 vcpu
->arch
.pending_external_vector
= -1;
7996 kvm_hv_vcpu_init(vcpu
);
8000 fail_free_mce_banks
:
8001 kfree(vcpu
->arch
.mce_banks
);
8003 kvm_free_lapic(vcpu
);
8005 kvm_mmu_destroy(vcpu
);
8007 free_page((unsigned long)vcpu
->arch
.pio_data
);
8012 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8016 kvm_hv_vcpu_uninit(vcpu
);
8017 kvm_pmu_destroy(vcpu
);
8018 kfree(vcpu
->arch
.mce_banks
);
8019 kvm_free_lapic(vcpu
);
8020 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8021 kvm_mmu_destroy(vcpu
);
8022 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8023 free_page((unsigned long)vcpu
->arch
.pio_data
);
8024 if (!lapic_in_kernel(vcpu
))
8025 static_key_slow_dec(&kvm_no_apic_vcpu
);
8028 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8030 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8033 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8038 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8039 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8040 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8041 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8042 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8044 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8045 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8046 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8047 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8048 &kvm
->arch
.irq_sources_bitmap
);
8050 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8051 mutex_init(&kvm
->arch
.apic_map_lock
);
8052 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8053 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8055 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8056 pvclock_update_vm_gtod_copy(kvm
);
8058 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8059 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8061 kvm_page_track_init(kvm
);
8062 kvm_mmu_init_vm(kvm
);
8064 if (kvm_x86_ops
->vm_init
)
8065 return kvm_x86_ops
->vm_init(kvm
);
8070 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8073 r
= vcpu_load(vcpu
);
8075 kvm_mmu_unload(vcpu
);
8079 static void kvm_free_vcpus(struct kvm
*kvm
)
8082 struct kvm_vcpu
*vcpu
;
8085 * Unpin any mmu pages first.
8087 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8088 kvm_clear_async_pf_completion_queue(vcpu
);
8089 kvm_unload_vcpu_mmu(vcpu
);
8091 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8092 kvm_arch_vcpu_free(vcpu
);
8094 mutex_lock(&kvm
->lock
);
8095 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8096 kvm
->vcpus
[i
] = NULL
;
8098 atomic_set(&kvm
->online_vcpus
, 0);
8099 mutex_unlock(&kvm
->lock
);
8102 void kvm_arch_sync_events(struct kvm
*kvm
)
8104 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8105 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8109 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8113 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8114 struct kvm_memory_slot
*slot
, old
;
8116 /* Called with kvm->slots_lock held. */
8117 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8120 slot
= id_to_memslot(slots
, id
);
8126 * MAP_SHARED to prevent internal slot pages from being moved
8129 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8130 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8131 if (IS_ERR((void *)hva
))
8132 return PTR_ERR((void *)hva
);
8141 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8142 struct kvm_userspace_memory_region m
;
8144 m
.slot
= id
| (i
<< 16);
8146 m
.guest_phys_addr
= gpa
;
8147 m
.userspace_addr
= hva
;
8148 m
.memory_size
= size
;
8149 r
= __kvm_set_memory_region(kvm
, &m
);
8155 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8161 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8163 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8167 mutex_lock(&kvm
->slots_lock
);
8168 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8169 mutex_unlock(&kvm
->slots_lock
);
8173 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8175 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8177 if (current
->mm
== kvm
->mm
) {
8179 * Free memory regions allocated on behalf of userspace,
8180 * unless the the memory map has changed due to process exit
8183 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8184 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8185 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8187 if (kvm_x86_ops
->vm_destroy
)
8188 kvm_x86_ops
->vm_destroy(kvm
);
8189 kvm_pic_destroy(kvm
);
8190 kvm_ioapic_destroy(kvm
);
8191 kvm_free_vcpus(kvm
);
8192 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8193 kvm_mmu_uninit_vm(kvm
);
8194 kvm_page_track_cleanup(kvm
);
8197 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8198 struct kvm_memory_slot
*dont
)
8202 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8203 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8204 kvfree(free
->arch
.rmap
[i
]);
8205 free
->arch
.rmap
[i
] = NULL
;
8210 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8211 dont
->arch
.lpage_info
[i
- 1]) {
8212 kvfree(free
->arch
.lpage_info
[i
- 1]);
8213 free
->arch
.lpage_info
[i
- 1] = NULL
;
8217 kvm_page_track_free_memslot(free
, dont
);
8220 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8221 unsigned long npages
)
8225 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8226 struct kvm_lpage_info
*linfo
;
8231 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8232 slot
->base_gfn
, level
) + 1;
8234 slot
->arch
.rmap
[i
] =
8235 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8236 if (!slot
->arch
.rmap
[i
])
8241 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8245 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8247 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8248 linfo
[0].disallow_lpage
= 1;
8249 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8250 linfo
[lpages
- 1].disallow_lpage
= 1;
8251 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8253 * If the gfn and userspace address are not aligned wrt each
8254 * other, or if explicitly asked to, disable large page
8255 * support for this slot
8257 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8258 !kvm_largepages_enabled()) {
8261 for (j
= 0; j
< lpages
; ++j
)
8262 linfo
[j
].disallow_lpage
= 1;
8266 if (kvm_page_track_create_memslot(slot
, npages
))
8272 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8273 kvfree(slot
->arch
.rmap
[i
]);
8274 slot
->arch
.rmap
[i
] = NULL
;
8278 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8279 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8284 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8287 * memslots->generation has been incremented.
8288 * mmio generation may have reached its maximum value.
8290 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8293 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8294 struct kvm_memory_slot
*memslot
,
8295 const struct kvm_userspace_memory_region
*mem
,
8296 enum kvm_mr_change change
)
8301 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8302 struct kvm_memory_slot
*new)
8304 /* Still write protect RO slot */
8305 if (new->flags
& KVM_MEM_READONLY
) {
8306 kvm_mmu_slot_remove_write_access(kvm
, new);
8311 * Call kvm_x86_ops dirty logging hooks when they are valid.
8313 * kvm_x86_ops->slot_disable_log_dirty is called when:
8315 * - KVM_MR_CREATE with dirty logging is disabled
8316 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8318 * The reason is, in case of PML, we need to set D-bit for any slots
8319 * with dirty logging disabled in order to eliminate unnecessary GPA
8320 * logging in PML buffer (and potential PML buffer full VMEXT). This
8321 * guarantees leaving PML enabled during guest's lifetime won't have
8322 * any additonal overhead from PML when guest is running with dirty
8323 * logging disabled for memory slots.
8325 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8326 * to dirty logging mode.
8328 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8330 * In case of write protect:
8332 * Write protect all pages for dirty logging.
8334 * All the sptes including the large sptes which point to this
8335 * slot are set to readonly. We can not create any new large
8336 * spte on this slot until the end of the logging.
8338 * See the comments in fast_page_fault().
8340 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8341 if (kvm_x86_ops
->slot_enable_log_dirty
)
8342 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8344 kvm_mmu_slot_remove_write_access(kvm
, new);
8346 if (kvm_x86_ops
->slot_disable_log_dirty
)
8347 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8351 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8352 const struct kvm_userspace_memory_region
*mem
,
8353 const struct kvm_memory_slot
*old
,
8354 const struct kvm_memory_slot
*new,
8355 enum kvm_mr_change change
)
8357 int nr_mmu_pages
= 0;
8359 if (!kvm
->arch
.n_requested_mmu_pages
)
8360 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8363 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8366 * Dirty logging tracks sptes in 4k granularity, meaning that large
8367 * sptes have to be split. If live migration is successful, the guest
8368 * in the source machine will be destroyed and large sptes will be
8369 * created in the destination. However, if the guest continues to run
8370 * in the source machine (for example if live migration fails), small
8371 * sptes will remain around and cause bad performance.
8373 * Scan sptes if dirty logging has been stopped, dropping those
8374 * which can be collapsed into a single large-page spte. Later
8375 * page faults will create the large-page sptes.
8377 if ((change
!= KVM_MR_DELETE
) &&
8378 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8379 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8380 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8383 * Set up write protection and/or dirty logging for the new slot.
8385 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8386 * been zapped so no dirty logging staff is needed for old slot. For
8387 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8388 * new and it's also covered when dealing with the new slot.
8390 * FIXME: const-ify all uses of struct kvm_memory_slot.
8392 if (change
!= KVM_MR_DELETE
)
8393 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8396 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8398 kvm_mmu_invalidate_zap_all_pages(kvm
);
8401 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8402 struct kvm_memory_slot
*slot
)
8404 kvm_page_track_flush_slot(kvm
, slot
);
8407 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8409 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8412 if (kvm_apic_has_events(vcpu
))
8415 if (vcpu
->arch
.pv
.pv_unhalted
)
8418 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8419 (vcpu
->arch
.nmi_pending
&&
8420 kvm_x86_ops
->nmi_allowed(vcpu
)))
8423 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8424 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8427 if (kvm_arch_interrupt_allowed(vcpu
) &&
8428 kvm_cpu_has_interrupt(vcpu
))
8431 if (kvm_hv_has_stimer_pending(vcpu
))
8437 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8439 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8442 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8444 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8447 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8449 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8452 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8454 if (is_64_bit_mode(vcpu
))
8455 return kvm_rip_read(vcpu
);
8456 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8457 kvm_rip_read(vcpu
));
8459 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8461 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8463 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8465 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8467 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8469 unsigned long rflags
;
8471 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8472 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8473 rflags
&= ~X86_EFLAGS_TF
;
8476 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8478 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8480 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8481 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8482 rflags
|= X86_EFLAGS_TF
;
8483 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8486 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8488 __kvm_set_rflags(vcpu
, rflags
);
8489 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8491 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8493 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8497 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8501 r
= kvm_mmu_reload(vcpu
);
8505 if (!vcpu
->arch
.mmu
.direct_map
&&
8506 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8509 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8512 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8514 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8517 static inline u32
kvm_async_pf_next_probe(u32 key
)
8519 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8522 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8524 u32 key
= kvm_async_pf_hash_fn(gfn
);
8526 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8527 key
= kvm_async_pf_next_probe(key
);
8529 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8532 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8535 u32 key
= kvm_async_pf_hash_fn(gfn
);
8537 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8538 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8539 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8540 key
= kvm_async_pf_next_probe(key
);
8545 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8547 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8550 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8554 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8556 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8558 j
= kvm_async_pf_next_probe(j
);
8559 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8561 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8563 * k lies cyclically in ]i,j]
8565 * |....j i.k.| or |.k..j i...|
8567 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8568 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8573 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8576 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8580 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8581 struct kvm_async_pf
*work
)
8583 struct x86_exception fault
;
8585 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8586 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8588 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8589 (vcpu
->arch
.apf
.send_user_only
&&
8590 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8591 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8592 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8593 fault
.vector
= PF_VECTOR
;
8594 fault
.error_code_valid
= true;
8595 fault
.error_code
= 0;
8596 fault
.nested_page_fault
= false;
8597 fault
.address
= work
->arch
.token
;
8598 fault
.async_page_fault
= true;
8599 kvm_inject_page_fault(vcpu
, &fault
);
8603 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8604 struct kvm_async_pf
*work
)
8606 struct x86_exception fault
;
8608 if (work
->wakeup_all
)
8609 work
->arch
.token
= ~0; /* broadcast wakeup */
8611 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8612 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8614 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8615 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8616 fault
.vector
= PF_VECTOR
;
8617 fault
.error_code_valid
= true;
8618 fault
.error_code
= 0;
8619 fault
.nested_page_fault
= false;
8620 fault
.address
= work
->arch
.token
;
8621 fault
.async_page_fault
= true;
8622 kvm_inject_page_fault(vcpu
, &fault
);
8624 vcpu
->arch
.apf
.halted
= false;
8625 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8628 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8630 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8633 return kvm_can_do_async_pf(vcpu
);
8636 void kvm_arch_start_assignment(struct kvm
*kvm
)
8638 atomic_inc(&kvm
->arch
.assigned_device_count
);
8640 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8642 void kvm_arch_end_assignment(struct kvm
*kvm
)
8644 atomic_dec(&kvm
->arch
.assigned_device_count
);
8646 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8648 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8650 return atomic_read(&kvm
->arch
.assigned_device_count
);
8652 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8654 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8656 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8658 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8660 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8662 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8664 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8666 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8668 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8670 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8672 bool kvm_arch_has_irq_bypass(void)
8674 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8677 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8678 struct irq_bypass_producer
*prod
)
8680 struct kvm_kernel_irqfd
*irqfd
=
8681 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8683 irqfd
->producer
= prod
;
8685 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8686 prod
->irq
, irqfd
->gsi
, 1);
8689 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8690 struct irq_bypass_producer
*prod
)
8693 struct kvm_kernel_irqfd
*irqfd
=
8694 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8696 WARN_ON(irqfd
->producer
!= prod
);
8697 irqfd
->producer
= NULL
;
8700 * When producer of consumer is unregistered, we change back to
8701 * remapped mode, so we can re-use the current implementation
8702 * when the irq is masked/disabled or the consumer side (KVM
8703 * int this case doesn't want to receive the interrupts.
8705 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8707 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8708 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8711 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8712 uint32_t guest_irq
, bool set
)
8714 if (!kvm_x86_ops
->update_pi_irte
)
8717 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8720 bool kvm_vector_hashing_enabled(void)
8722 return vector_hashing
;
8724 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8726 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8727 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8728 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8729 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8730 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8731 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8732 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8733 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8734 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8735 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8736 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8737 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8738 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8739 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8740 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8741 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8742 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8743 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8744 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);