2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <trace/events/kvm.h>
59 #include <asm/debugreg.h>
63 #include <linux/kernel_stat.h>
64 #include <asm/fpu/internal.h> /* Ugh! */
65 #include <asm/pvclock.h>
66 #include <asm/div64.h>
67 #include <asm/irq_remapping.h>
69 #define CREATE_TRACE_POINTS
72 #define MAX_IO_MSRS 256
73 #define KVM_MAX_MCE_BANKS 32
74 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
75 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
77 #define emul_to_vcpu(ctxt) \
78 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
81 * - enable syscall per default because its emulated by KVM
82 * - enable LME and LMA per default on 64 bit KVM
86 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
88 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
91 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
92 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
94 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
95 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
97 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
98 static void process_nmi(struct kvm_vcpu
*vcpu
);
99 static void enter_smm(struct kvm_vcpu
*vcpu
);
100 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
102 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
103 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
105 static bool __read_mostly ignore_msrs
= 0;
106 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
108 unsigned int min_timer_period_us
= 500;
109 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
111 static bool __read_mostly kvmclock_periodic_sync
= true;
112 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
114 bool __read_mostly kvm_has_tsc_control
;
115 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
116 u32 __read_mostly kvm_max_guest_tsc_khz
;
117 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
118 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
119 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
120 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
121 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
122 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
123 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
125 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
126 static u32 __read_mostly tsc_tolerance_ppm
= 250;
127 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
129 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
130 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
131 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
133 static bool __read_mostly vector_hashing
= true;
134 module_param(vector_hashing
, bool, S_IRUGO
);
136 static bool __read_mostly backwards_tsc_observed
= false;
138 #define KVM_NR_SHARED_MSRS 16
140 struct kvm_shared_msrs_global
{
142 u32 msrs
[KVM_NR_SHARED_MSRS
];
145 struct kvm_shared_msrs
{
146 struct user_return_notifier urn
;
148 struct kvm_shared_msr_values
{
151 } values
[KVM_NR_SHARED_MSRS
];
154 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
155 static struct kvm_shared_msrs __percpu
*shared_msrs
;
157 struct kvm_stats_debugfs_item debugfs_entries
[] = {
158 { "pf_fixed", VCPU_STAT(pf_fixed
) },
159 { "pf_guest", VCPU_STAT(pf_guest
) },
160 { "tlb_flush", VCPU_STAT(tlb_flush
) },
161 { "invlpg", VCPU_STAT(invlpg
) },
162 { "exits", VCPU_STAT(exits
) },
163 { "io_exits", VCPU_STAT(io_exits
) },
164 { "mmio_exits", VCPU_STAT(mmio_exits
) },
165 { "signal_exits", VCPU_STAT(signal_exits
) },
166 { "irq_window", VCPU_STAT(irq_window_exits
) },
167 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
168 { "halt_exits", VCPU_STAT(halt_exits
) },
169 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
170 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
171 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
172 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
173 { "hypercalls", VCPU_STAT(hypercalls
) },
174 { "request_irq", VCPU_STAT(request_irq_exits
) },
175 { "irq_exits", VCPU_STAT(irq_exits
) },
176 { "host_state_reload", VCPU_STAT(host_state_reload
) },
177 { "efer_reload", VCPU_STAT(efer_reload
) },
178 { "fpu_reload", VCPU_STAT(fpu_reload
) },
179 { "insn_emulation", VCPU_STAT(insn_emulation
) },
180 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
181 { "irq_injections", VCPU_STAT(irq_injections
) },
182 { "nmi_injections", VCPU_STAT(nmi_injections
) },
183 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
184 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
185 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
186 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
187 { "mmu_flooded", VM_STAT(mmu_flooded
) },
188 { "mmu_recycled", VM_STAT(mmu_recycled
) },
189 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
190 { "mmu_unsync", VM_STAT(mmu_unsync
) },
191 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
192 { "largepages", VM_STAT(lpages
) },
193 { "max_mmu_page_hash_collisions",
194 VM_STAT(max_mmu_page_hash_collisions
) },
198 u64 __read_mostly host_xcr0
;
200 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
202 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
205 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
206 vcpu
->arch
.apf
.gfns
[i
] = ~0;
209 static void kvm_on_user_return(struct user_return_notifier
*urn
)
212 struct kvm_shared_msrs
*locals
213 = container_of(urn
, struct kvm_shared_msrs
, urn
);
214 struct kvm_shared_msr_values
*values
;
218 * Disabling irqs at this point since the following code could be
219 * interrupted and executed through kvm_arch_hardware_disable()
221 local_irq_save(flags
);
222 if (locals
->registered
) {
223 locals
->registered
= false;
224 user_return_notifier_unregister(urn
);
226 local_irq_restore(flags
);
227 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
228 values
= &locals
->values
[slot
];
229 if (values
->host
!= values
->curr
) {
230 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
231 values
->curr
= values
->host
;
236 static void shared_msr_update(unsigned slot
, u32 msr
)
239 unsigned int cpu
= smp_processor_id();
240 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
242 /* only read, and nobody should modify it at this time,
243 * so don't need lock */
244 if (slot
>= shared_msrs_global
.nr
) {
245 printk(KERN_ERR
"kvm: invalid MSR slot!");
248 rdmsrl_safe(msr
, &value
);
249 smsr
->values
[slot
].host
= value
;
250 smsr
->values
[slot
].curr
= value
;
253 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
255 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
256 shared_msrs_global
.msrs
[slot
] = msr
;
257 if (slot
>= shared_msrs_global
.nr
)
258 shared_msrs_global
.nr
= slot
+ 1;
260 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
262 static void kvm_shared_msr_cpu_online(void)
266 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
267 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
270 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
272 unsigned int cpu
= smp_processor_id();
273 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
276 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
278 smsr
->values
[slot
].curr
= value
;
279 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
283 if (!smsr
->registered
) {
284 smsr
->urn
.on_user_return
= kvm_on_user_return
;
285 user_return_notifier_register(&smsr
->urn
);
286 smsr
->registered
= true;
290 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
292 static void drop_user_return_notifiers(void)
294 unsigned int cpu
= smp_processor_id();
295 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
297 if (smsr
->registered
)
298 kvm_on_user_return(&smsr
->urn
);
301 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
303 return vcpu
->arch
.apic_base
;
305 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
307 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
309 u64 old_state
= vcpu
->arch
.apic_base
&
310 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
311 u64 new_state
= msr_info
->data
&
312 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
313 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
314 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
316 if (!msr_info
->host_initiated
&&
317 ((msr_info
->data
& reserved_bits
) != 0 ||
318 new_state
== X2APIC_ENABLE
||
319 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
320 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
321 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
325 kvm_lapic_set_base(vcpu
, msr_info
->data
);
328 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
330 asmlinkage __visible
void kvm_spurious_fault(void)
332 /* Fault while not rebooting. We want the trace. */
335 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
337 #define EXCPT_BENIGN 0
338 #define EXCPT_CONTRIBUTORY 1
341 static int exception_class(int vector
)
351 return EXCPT_CONTRIBUTORY
;
358 #define EXCPT_FAULT 0
360 #define EXCPT_ABORT 2
361 #define EXCPT_INTERRUPT 3
363 static int exception_type(int vector
)
367 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
368 return EXCPT_INTERRUPT
;
372 /* #DB is trap, as instruction watchpoints are handled elsewhere */
373 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
376 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
379 /* Reserved exceptions will result in fault */
383 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
384 unsigned nr
, bool has_error
, u32 error_code
,
390 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
392 if (!vcpu
->arch
.exception
.pending
) {
394 if (has_error
&& !is_protmode(vcpu
))
396 vcpu
->arch
.exception
.pending
= true;
397 vcpu
->arch
.exception
.has_error_code
= has_error
;
398 vcpu
->arch
.exception
.nr
= nr
;
399 vcpu
->arch
.exception
.error_code
= error_code
;
400 vcpu
->arch
.exception
.reinject
= reinject
;
404 /* to check exception */
405 prev_nr
= vcpu
->arch
.exception
.nr
;
406 if (prev_nr
== DF_VECTOR
) {
407 /* triple fault -> shutdown */
408 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
411 class1
= exception_class(prev_nr
);
412 class2
= exception_class(nr
);
413 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
414 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
415 /* generate double fault per SDM Table 5-5 */
416 vcpu
->arch
.exception
.pending
= true;
417 vcpu
->arch
.exception
.has_error_code
= true;
418 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
419 vcpu
->arch
.exception
.error_code
= 0;
421 /* replace previous exception with a new one in a hope
422 that instruction re-execution will regenerate lost
427 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
429 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
431 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
433 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
435 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
437 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
439 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
442 kvm_inject_gp(vcpu
, 0);
444 return kvm_skip_emulated_instruction(vcpu
);
448 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
450 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
452 ++vcpu
->stat
.pf_guest
;
453 vcpu
->arch
.cr2
= fault
->address
;
454 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
456 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
458 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
460 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
461 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
463 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
465 return fault
->nested_page_fault
;
468 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
470 atomic_inc(&vcpu
->arch
.nmi_queued
);
471 kvm_make_request(KVM_REQ_NMI
, vcpu
);
473 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
475 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
477 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
479 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
481 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
483 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
485 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
488 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
489 * a #GP and return false.
491 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
493 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
495 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
498 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
500 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
502 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
505 kvm_queue_exception(vcpu
, UD_VECTOR
);
508 EXPORT_SYMBOL_GPL(kvm_require_dr
);
511 * This function will be used to read from the physical memory of the currently
512 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
513 * can read from guest physical or from the guest's guest physical memory.
515 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
516 gfn_t ngfn
, void *data
, int offset
, int len
,
519 struct x86_exception exception
;
523 ngpa
= gfn_to_gpa(ngfn
);
524 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
525 if (real_gfn
== UNMAPPED_GVA
)
528 real_gfn
= gpa_to_gfn(real_gfn
);
530 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
532 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
534 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
535 void *data
, int offset
, int len
, u32 access
)
537 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
538 data
, offset
, len
, access
);
542 * Load the pae pdptrs. Return true is they are all valid.
544 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
546 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
547 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
550 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
552 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
553 offset
* sizeof(u64
), sizeof(pdpte
),
554 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
559 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
560 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
562 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
569 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
570 __set_bit(VCPU_EXREG_PDPTR
,
571 (unsigned long *)&vcpu
->arch
.regs_avail
);
572 __set_bit(VCPU_EXREG_PDPTR
,
573 (unsigned long *)&vcpu
->arch
.regs_dirty
);
578 EXPORT_SYMBOL_GPL(load_pdptrs
);
580 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
582 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
588 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
591 if (!test_bit(VCPU_EXREG_PDPTR
,
592 (unsigned long *)&vcpu
->arch
.regs_avail
))
595 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
596 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
597 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
598 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
601 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
606 EXPORT_SYMBOL_GPL(pdptrs_changed
);
608 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
610 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
611 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
616 if (cr0
& 0xffffffff00000000UL
)
620 cr0
&= ~CR0_RESERVED_BITS
;
622 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
625 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
628 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
630 if ((vcpu
->arch
.efer
& EFER_LME
)) {
635 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
640 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
645 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
648 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
650 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
651 kvm_clear_async_pf_completion_queue(vcpu
);
652 kvm_async_pf_hash_reset(vcpu
);
655 if ((cr0
^ old_cr0
) & update_bits
)
656 kvm_mmu_reset_context(vcpu
);
658 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
659 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
660 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
661 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
665 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
667 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
669 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
671 EXPORT_SYMBOL_GPL(kvm_lmsw
);
673 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
675 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
676 !vcpu
->guest_xcr0_loaded
) {
677 /* kvm_set_xcr() also depends on this */
678 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
679 vcpu
->guest_xcr0_loaded
= 1;
683 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
685 if (vcpu
->guest_xcr0_loaded
) {
686 if (vcpu
->arch
.xcr0
!= host_xcr0
)
687 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
688 vcpu
->guest_xcr0_loaded
= 0;
692 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
695 u64 old_xcr0
= vcpu
->arch
.xcr0
;
698 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
699 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
701 if (!(xcr0
& XFEATURE_MASK_FP
))
703 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
707 * Do not allow the guest to set bits that we do not support
708 * saving. However, xcr0 bit 0 is always set, even if the
709 * emulated CPU does not support XSAVE (see fx_init).
711 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
712 if (xcr0
& ~valid_bits
)
715 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
716 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
719 if (xcr0
& XFEATURE_MASK_AVX512
) {
720 if (!(xcr0
& XFEATURE_MASK_YMM
))
722 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
725 vcpu
->arch
.xcr0
= xcr0
;
727 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
728 kvm_update_cpuid(vcpu
);
732 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
734 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
735 __kvm_set_xcr(vcpu
, index
, xcr
)) {
736 kvm_inject_gp(vcpu
, 0);
741 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
743 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
745 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
746 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
747 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
749 if (cr4
& CR4_RESERVED_BITS
)
752 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
755 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
758 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
761 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
764 if (!guest_cpuid_has_pku(vcpu
) && (cr4
& X86_CR4_PKE
))
767 if (is_long_mode(vcpu
)) {
768 if (!(cr4
& X86_CR4_PAE
))
770 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
771 && ((cr4
^ old_cr4
) & pdptr_bits
)
772 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
776 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
777 if (!guest_cpuid_has_pcid(vcpu
))
780 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
781 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
785 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
788 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
789 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
790 kvm_mmu_reset_context(vcpu
);
792 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
793 kvm_update_cpuid(vcpu
);
797 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
799 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
802 cr3
&= ~CR3_PCID_INVD
;
805 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
806 kvm_mmu_sync_roots(vcpu
);
807 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
811 if (is_long_mode(vcpu
)) {
812 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
814 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
815 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
818 vcpu
->arch
.cr3
= cr3
;
819 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
820 kvm_mmu_new_cr3(vcpu
);
823 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
825 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
827 if (cr8
& CR8_RESERVED_BITS
)
829 if (lapic_in_kernel(vcpu
))
830 kvm_lapic_set_tpr(vcpu
, cr8
);
832 vcpu
->arch
.cr8
= cr8
;
835 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
837 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
839 if (lapic_in_kernel(vcpu
))
840 return kvm_lapic_get_cr8(vcpu
);
842 return vcpu
->arch
.cr8
;
844 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
846 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
850 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
851 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
852 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
853 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
857 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
859 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
860 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
863 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
867 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
868 dr7
= vcpu
->arch
.guest_debug_dr7
;
870 dr7
= vcpu
->arch
.dr7
;
871 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
872 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
873 if (dr7
& DR7_BP_EN_MASK
)
874 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
877 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
879 u64 fixed
= DR6_FIXED_1
;
881 if (!guest_cpuid_has_rtm(vcpu
))
886 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
890 vcpu
->arch
.db
[dr
] = val
;
891 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
892 vcpu
->arch
.eff_db
[dr
] = val
;
897 if (val
& 0xffffffff00000000ULL
)
899 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
900 kvm_update_dr6(vcpu
);
905 if (val
& 0xffffffff00000000ULL
)
907 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
908 kvm_update_dr7(vcpu
);
915 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
917 if (__kvm_set_dr(vcpu
, dr
, val
)) {
918 kvm_inject_gp(vcpu
, 0);
923 EXPORT_SYMBOL_GPL(kvm_set_dr
);
925 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
929 *val
= vcpu
->arch
.db
[dr
];
934 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
935 *val
= vcpu
->arch
.dr6
;
937 *val
= kvm_x86_ops
->get_dr6(vcpu
);
942 *val
= vcpu
->arch
.dr7
;
947 EXPORT_SYMBOL_GPL(kvm_get_dr
);
949 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
951 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
955 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
958 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
959 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
962 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
965 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
966 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
968 * This list is modified at module load time to reflect the
969 * capabilities of the host cpu. This capabilities test skips MSRs that are
970 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
971 * may depend on host virtualization features rather than host cpu features.
974 static u32 msrs_to_save
[] = {
975 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
978 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
980 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
981 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
984 static unsigned num_msrs_to_save
;
986 static u32 emulated_msrs
[] = {
987 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
988 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
989 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
990 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
991 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
992 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
995 HV_X64_MSR_VP_RUNTIME
,
997 HV_X64_MSR_STIMER0_CONFIG
,
998 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1001 MSR_IA32_TSC_ADJUST
,
1002 MSR_IA32_TSCDEADLINE
,
1003 MSR_IA32_MISC_ENABLE
,
1004 MSR_IA32_MCG_STATUS
,
1006 MSR_IA32_MCG_EXT_CTL
,
1010 static unsigned num_emulated_msrs
;
1012 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1014 if (efer
& efer_reserved_bits
)
1017 if (efer
& EFER_FFXSR
) {
1018 struct kvm_cpuid_entry2
*feat
;
1020 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1021 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
1025 if (efer
& EFER_SVME
) {
1026 struct kvm_cpuid_entry2
*feat
;
1028 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1029 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1035 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1037 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1039 u64 old_efer
= vcpu
->arch
.efer
;
1041 if (!kvm_valid_efer(vcpu
, efer
))
1045 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1049 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1051 kvm_x86_ops
->set_efer(vcpu
, efer
);
1053 /* Update reserved bits */
1054 if ((efer
^ old_efer
) & EFER_NX
)
1055 kvm_mmu_reset_context(vcpu
);
1060 void kvm_enable_efer_bits(u64 mask
)
1062 efer_reserved_bits
&= ~mask
;
1064 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1067 * Writes msr value into into the appropriate "register".
1068 * Returns 0 on success, non-0 otherwise.
1069 * Assumes vcpu_load() was already called.
1071 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1073 switch (msr
->index
) {
1076 case MSR_KERNEL_GS_BASE
:
1079 if (is_noncanonical_address(msr
->data
))
1082 case MSR_IA32_SYSENTER_EIP
:
1083 case MSR_IA32_SYSENTER_ESP
:
1085 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1086 * non-canonical address is written on Intel but not on
1087 * AMD (which ignores the top 32-bits, because it does
1088 * not implement 64-bit SYSENTER).
1090 * 64-bit code should hence be able to write a non-canonical
1091 * value on AMD. Making the address canonical ensures that
1092 * vmentry does not fail on Intel after writing a non-canonical
1093 * value, and that something deterministic happens if the guest
1094 * invokes 64-bit SYSENTER.
1096 msr
->data
= get_canonical(msr
->data
);
1098 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1100 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1103 * Adapt set_msr() to msr_io()'s calling convention
1105 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1107 struct msr_data msr
;
1111 msr
.host_initiated
= true;
1112 r
= kvm_get_msr(vcpu
, &msr
);
1120 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1122 struct msr_data msr
;
1126 msr
.host_initiated
= true;
1127 return kvm_set_msr(vcpu
, &msr
);
1130 #ifdef CONFIG_X86_64
1131 struct pvclock_gtod_data
{
1134 struct { /* extract of a clocksource struct */
1146 static struct pvclock_gtod_data pvclock_gtod_data
;
1148 static void update_pvclock_gtod(struct timekeeper
*tk
)
1150 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1153 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1155 write_seqcount_begin(&vdata
->seq
);
1157 /* copy pvclock gtod data */
1158 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1159 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1160 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1161 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1162 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1164 vdata
->boot_ns
= boot_ns
;
1165 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1167 write_seqcount_end(&vdata
->seq
);
1171 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1174 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1175 * vcpu_enter_guest. This function is only called from
1176 * the physical CPU that is running vcpu.
1178 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1181 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1185 struct pvclock_wall_clock wc
;
1186 struct timespec64 boot
;
1191 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1196 ++version
; /* first time write, random junk */
1200 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1204 * The guest calculates current wall clock time by adding
1205 * system time (updated by kvm_guest_time_update below) to the
1206 * wall clock specified here. guest system time equals host
1207 * system time for us, thus we must fill in host boot time here.
1209 getboottime64(&boot
);
1211 if (kvm
->arch
.kvmclock_offset
) {
1212 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1213 boot
= timespec64_sub(boot
, ts
);
1215 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1216 wc
.nsec
= boot
.tv_nsec
;
1217 wc
.version
= version
;
1219 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1222 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1225 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1227 do_shl32_div32(dividend
, divisor
);
1231 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1232 s8
*pshift
, u32
*pmultiplier
)
1240 scaled64
= scaled_hz
;
1241 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1246 tps32
= (uint32_t)tps64
;
1247 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1248 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1256 *pmultiplier
= div_frac(scaled64
, tps32
);
1258 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1259 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1262 #ifdef CONFIG_X86_64
1263 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1266 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1267 static unsigned long max_tsc_khz
;
1269 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1271 u64 v
= (u64
)khz
* (1000000 + ppm
);
1276 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1280 /* Guest TSC same frequency as host TSC? */
1282 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1286 /* TSC scaling supported? */
1287 if (!kvm_has_tsc_control
) {
1288 if (user_tsc_khz
> tsc_khz
) {
1289 vcpu
->arch
.tsc_catchup
= 1;
1290 vcpu
->arch
.tsc_always_catchup
= 1;
1293 WARN(1, "user requested TSC rate below hardware speed\n");
1298 /* TSC scaling required - calculate ratio */
1299 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1300 user_tsc_khz
, tsc_khz
);
1302 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1303 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1308 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1312 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1314 u32 thresh_lo
, thresh_hi
;
1315 int use_scaling
= 0;
1317 /* tsc_khz can be zero if TSC calibration fails */
1318 if (user_tsc_khz
== 0) {
1319 /* set tsc_scaling_ratio to a safe value */
1320 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1324 /* Compute a scale to convert nanoseconds in TSC cycles */
1325 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1326 &vcpu
->arch
.virtual_tsc_shift
,
1327 &vcpu
->arch
.virtual_tsc_mult
);
1328 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1331 * Compute the variation in TSC rate which is acceptable
1332 * within the range of tolerance and decide if the
1333 * rate being applied is within that bounds of the hardware
1334 * rate. If so, no scaling or compensation need be done.
1336 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1337 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1338 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1339 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1342 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1345 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1347 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1348 vcpu
->arch
.virtual_tsc_mult
,
1349 vcpu
->arch
.virtual_tsc_shift
);
1350 tsc
+= vcpu
->arch
.this_tsc_write
;
1354 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1356 #ifdef CONFIG_X86_64
1358 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1359 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1361 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1362 atomic_read(&vcpu
->kvm
->online_vcpus
));
1365 * Once the masterclock is enabled, always perform request in
1366 * order to update it.
1368 * In order to enable masterclock, the host clocksource must be TSC
1369 * and the vcpus need to have matched TSCs. When that happens,
1370 * perform request to enable masterclock.
1372 if (ka
->use_master_clock
||
1373 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1374 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1376 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1377 atomic_read(&vcpu
->kvm
->online_vcpus
),
1378 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1382 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1384 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1385 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1389 * Multiply tsc by a fixed point number represented by ratio.
1391 * The most significant 64-N bits (mult) of ratio represent the
1392 * integral part of the fixed point number; the remaining N bits
1393 * (frac) represent the fractional part, ie. ratio represents a fixed
1394 * point number (mult + frac * 2^(-N)).
1396 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1398 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1400 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1403 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1406 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1408 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1409 _tsc
= __scale_tsc(ratio
, tsc
);
1413 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1415 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1419 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1421 return target_tsc
- tsc
;
1424 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1426 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1428 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1430 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1432 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1433 vcpu
->arch
.tsc_offset
= offset
;
1436 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1438 struct kvm
*kvm
= vcpu
->kvm
;
1439 u64 offset
, ns
, elapsed
;
1440 unsigned long flags
;
1443 bool already_matched
;
1444 u64 data
= msr
->data
;
1446 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1447 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1448 ns
= ktime_get_boot_ns();
1449 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1451 if (vcpu
->arch
.virtual_tsc_khz
) {
1454 /* n.b - signed multiplication and division required */
1455 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1456 #ifdef CONFIG_X86_64
1457 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1459 /* do_div() only does unsigned */
1460 asm("1: idivl %[divisor]\n"
1461 "2: xor %%edx, %%edx\n"
1462 " movl $0, %[faulted]\n"
1464 ".section .fixup,\"ax\"\n"
1465 "4: movl $1, %[faulted]\n"
1469 _ASM_EXTABLE(1b
, 4b
)
1471 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1472 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1475 do_div(elapsed
, 1000);
1480 /* idivl overflow => difference is larger than USEC_PER_SEC */
1482 usdiff
= USEC_PER_SEC
;
1484 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1487 * Special case: TSC write with a small delta (1 second) of virtual
1488 * cycle time against real time is interpreted as an attempt to
1489 * synchronize the CPU.
1491 * For a reliable TSC, we can match TSC offsets, and for an unstable
1492 * TSC, we add elapsed time in this computation. We could let the
1493 * compensation code attempt to catch up if we fall behind, but
1494 * it's better to try to match offsets from the beginning.
1496 if (usdiff
< USEC_PER_SEC
&&
1497 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1498 if (!check_tsc_unstable()) {
1499 offset
= kvm
->arch
.cur_tsc_offset
;
1500 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1502 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1504 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1505 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1508 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1511 * We split periods of matched TSC writes into generations.
1512 * For each generation, we track the original measured
1513 * nanosecond time, offset, and write, so if TSCs are in
1514 * sync, we can match exact offset, and if not, we can match
1515 * exact software computation in compute_guest_tsc()
1517 * These values are tracked in kvm->arch.cur_xxx variables.
1519 kvm
->arch
.cur_tsc_generation
++;
1520 kvm
->arch
.cur_tsc_nsec
= ns
;
1521 kvm
->arch
.cur_tsc_write
= data
;
1522 kvm
->arch
.cur_tsc_offset
= offset
;
1524 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1525 kvm
->arch
.cur_tsc_generation
, data
);
1529 * We also track th most recent recorded KHZ, write and time to
1530 * allow the matching interval to be extended at each write.
1532 kvm
->arch
.last_tsc_nsec
= ns
;
1533 kvm
->arch
.last_tsc_write
= data
;
1534 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1536 vcpu
->arch
.last_guest_tsc
= data
;
1538 /* Keep track of which generation this VCPU has synchronized to */
1539 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1540 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1541 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1543 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1544 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1545 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1546 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1548 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1550 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1551 } else if (!already_matched
) {
1552 kvm
->arch
.nr_vcpus_matched_tsc
++;
1555 kvm_track_tsc_matching(vcpu
);
1556 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1559 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1561 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1564 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1567 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1569 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1570 WARN_ON(adjustment
< 0);
1571 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1572 adjust_tsc_offset_guest(vcpu
, adjustment
);
1575 #ifdef CONFIG_X86_64
1577 static u64
read_tsc(void)
1579 u64 ret
= (u64
)rdtsc_ordered();
1580 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1582 if (likely(ret
>= last
))
1586 * GCC likes to generate cmov here, but this branch is extremely
1587 * predictable (it's just a function of time and the likely is
1588 * very likely) and there's a data dependence, so force GCC
1589 * to generate a branch instead. I don't barrier() because
1590 * we don't actually need a barrier, and if this function
1591 * ever gets inlined it will generate worse code.
1597 static inline u64
vgettsc(u64
*cycle_now
)
1600 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1602 *cycle_now
= read_tsc();
1604 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1605 return v
* gtod
->clock
.mult
;
1608 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1610 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1616 seq
= read_seqcount_begin(>od
->seq
);
1617 mode
= gtod
->clock
.vclock_mode
;
1618 ns
= gtod
->nsec_base
;
1619 ns
+= vgettsc(cycle_now
);
1620 ns
>>= gtod
->clock
.shift
;
1621 ns
+= gtod
->boot_ns
;
1622 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1628 /* returns true if host is using tsc clocksource */
1629 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1631 /* checked again under seqlock below */
1632 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1635 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1641 * Assuming a stable TSC across physical CPUS, and a stable TSC
1642 * across virtual CPUs, the following condition is possible.
1643 * Each numbered line represents an event visible to both
1644 * CPUs at the next numbered event.
1646 * "timespecX" represents host monotonic time. "tscX" represents
1649 * VCPU0 on CPU0 | VCPU1 on CPU1
1651 * 1. read timespec0,tsc0
1652 * 2. | timespec1 = timespec0 + N
1654 * 3. transition to guest | transition to guest
1655 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1656 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1657 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1659 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1662 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1664 * - 0 < N - M => M < N
1666 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1667 * always the case (the difference between two distinct xtime instances
1668 * might be smaller then the difference between corresponding TSC reads,
1669 * when updating guest vcpus pvclock areas).
1671 * To avoid that problem, do not allow visibility of distinct
1672 * system_timestamp/tsc_timestamp values simultaneously: use a master
1673 * copy of host monotonic time values. Update that master copy
1676 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1680 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1682 #ifdef CONFIG_X86_64
1683 struct kvm_arch
*ka
= &kvm
->arch
;
1685 bool host_tsc_clocksource
, vcpus_matched
;
1687 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1688 atomic_read(&kvm
->online_vcpus
));
1691 * If the host uses TSC clock, then passthrough TSC as stable
1694 host_tsc_clocksource
= kvm_get_time_and_clockread(
1695 &ka
->master_kernel_ns
,
1696 &ka
->master_cycle_now
);
1698 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1699 && !backwards_tsc_observed
1700 && !ka
->boot_vcpu_runs_old_kvmclock
;
1702 if (ka
->use_master_clock
)
1703 atomic_set(&kvm_guest_has_master_clock
, 1);
1705 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1706 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1711 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1713 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1716 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1718 #ifdef CONFIG_X86_64
1720 struct kvm_vcpu
*vcpu
;
1721 struct kvm_arch
*ka
= &kvm
->arch
;
1723 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1724 kvm_make_mclock_inprogress_request(kvm
);
1725 /* no guest entries from this point */
1726 pvclock_update_vm_gtod_copy(kvm
);
1728 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1729 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1731 /* guest entries allowed */
1732 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1733 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1735 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1739 static u64
__get_kvmclock_ns(struct kvm
*kvm
)
1741 struct kvm_arch
*ka
= &kvm
->arch
;
1742 struct pvclock_vcpu_time_info hv_clock
;
1744 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1745 if (!ka
->use_master_clock
) {
1746 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1747 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1750 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1751 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1752 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1754 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1755 &hv_clock
.tsc_shift
,
1756 &hv_clock
.tsc_to_system_mul
);
1757 return __pvclock_read_cycles(&hv_clock
, rdtsc());
1760 u64
get_kvmclock_ns(struct kvm
*kvm
)
1762 unsigned long flags
;
1765 local_irq_save(flags
);
1766 ns
= __get_kvmclock_ns(kvm
);
1767 local_irq_restore(flags
);
1772 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1774 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1775 struct pvclock_vcpu_time_info guest_hv_clock
;
1777 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1778 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1781 /* This VCPU is paused, but it's legal for a guest to read another
1782 * VCPU's kvmclock, so we really have to follow the specification where
1783 * it says that version is odd if data is being modified, and even after
1786 * Version field updates must be kept separate. This is because
1787 * kvm_write_guest_cached might use a "rep movs" instruction, and
1788 * writes within a string instruction are weakly ordered. So there
1789 * are three writes overall.
1791 * As a small optimization, only write the version field in the first
1792 * and third write. The vcpu->pv_time cache is still valid, because the
1793 * version field is the first in the struct.
1795 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1797 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1798 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1800 sizeof(vcpu
->hv_clock
.version
));
1804 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1805 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1807 if (vcpu
->pvclock_set_guest_stopped_request
) {
1808 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1809 vcpu
->pvclock_set_guest_stopped_request
= false;
1812 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1814 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1816 sizeof(vcpu
->hv_clock
));
1820 vcpu
->hv_clock
.version
++;
1821 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1823 sizeof(vcpu
->hv_clock
.version
));
1826 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1828 unsigned long flags
, tgt_tsc_khz
;
1829 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1830 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1832 u64 tsc_timestamp
, host_tsc
;
1834 bool use_master_clock
;
1840 * If the host uses TSC clock, then passthrough TSC as stable
1843 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1844 use_master_clock
= ka
->use_master_clock
;
1845 if (use_master_clock
) {
1846 host_tsc
= ka
->master_cycle_now
;
1847 kernel_ns
= ka
->master_kernel_ns
;
1849 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1851 /* Keep irq disabled to prevent changes to the clock */
1852 local_irq_save(flags
);
1853 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1854 if (unlikely(tgt_tsc_khz
== 0)) {
1855 local_irq_restore(flags
);
1856 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1859 if (!use_master_clock
) {
1861 kernel_ns
= ktime_get_boot_ns();
1864 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1867 * We may have to catch up the TSC to match elapsed wall clock
1868 * time for two reasons, even if kvmclock is used.
1869 * 1) CPU could have been running below the maximum TSC rate
1870 * 2) Broken TSC compensation resets the base at each VCPU
1871 * entry to avoid unknown leaps of TSC even when running
1872 * again on the same CPU. This may cause apparent elapsed
1873 * time to disappear, and the guest to stand still or run
1876 if (vcpu
->tsc_catchup
) {
1877 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1878 if (tsc
> tsc_timestamp
) {
1879 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1880 tsc_timestamp
= tsc
;
1884 local_irq_restore(flags
);
1886 /* With all the info we got, fill in the values */
1888 if (kvm_has_tsc_control
)
1889 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1891 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1892 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1893 &vcpu
->hv_clock
.tsc_shift
,
1894 &vcpu
->hv_clock
.tsc_to_system_mul
);
1895 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1898 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1899 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1900 vcpu
->last_guest_tsc
= tsc_timestamp
;
1902 /* If the host uses TSC clocksource, then it is stable */
1904 if (use_master_clock
)
1905 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1907 vcpu
->hv_clock
.flags
= pvclock_flags
;
1909 if (vcpu
->pv_time_enabled
)
1910 kvm_setup_pvclock_page(v
);
1911 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1912 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1917 * kvmclock updates which are isolated to a given vcpu, such as
1918 * vcpu->cpu migration, should not allow system_timestamp from
1919 * the rest of the vcpus to remain static. Otherwise ntp frequency
1920 * correction applies to one vcpu's system_timestamp but not
1923 * So in those cases, request a kvmclock update for all vcpus.
1924 * We need to rate-limit these requests though, as they can
1925 * considerably slow guests that have a large number of vcpus.
1926 * The time for a remote vcpu to update its kvmclock is bound
1927 * by the delay we use to rate-limit the updates.
1930 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1932 static void kvmclock_update_fn(struct work_struct
*work
)
1935 struct delayed_work
*dwork
= to_delayed_work(work
);
1936 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1937 kvmclock_update_work
);
1938 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1939 struct kvm_vcpu
*vcpu
;
1941 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1942 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1943 kvm_vcpu_kick(vcpu
);
1947 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1949 struct kvm
*kvm
= v
->kvm
;
1951 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1952 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1953 KVMCLOCK_UPDATE_DELAY
);
1956 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1958 static void kvmclock_sync_fn(struct work_struct
*work
)
1960 struct delayed_work
*dwork
= to_delayed_work(work
);
1961 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1962 kvmclock_sync_work
);
1963 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1965 if (!kvmclock_periodic_sync
)
1968 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1969 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1970 KVMCLOCK_SYNC_PERIOD
);
1973 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1975 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1976 unsigned bank_num
= mcg_cap
& 0xff;
1979 case MSR_IA32_MCG_STATUS
:
1980 vcpu
->arch
.mcg_status
= data
;
1982 case MSR_IA32_MCG_CTL
:
1983 if (!(mcg_cap
& MCG_CTL_P
))
1985 if (data
!= 0 && data
!= ~(u64
)0)
1987 vcpu
->arch
.mcg_ctl
= data
;
1990 if (msr
>= MSR_IA32_MC0_CTL
&&
1991 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1992 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1993 /* only 0 or all 1s can be written to IA32_MCi_CTL
1994 * some Linux kernels though clear bit 10 in bank 4 to
1995 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1996 * this to avoid an uncatched #GP in the guest
1998 if ((offset
& 0x3) == 0 &&
1999 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2001 vcpu
->arch
.mce_banks
[offset
] = data
;
2009 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2011 struct kvm
*kvm
= vcpu
->kvm
;
2012 int lm
= is_long_mode(vcpu
);
2013 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2014 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2015 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2016 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2017 u32 page_num
= data
& ~PAGE_MASK
;
2018 u64 page_addr
= data
& PAGE_MASK
;
2023 if (page_num
>= blob_size
)
2026 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2031 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2040 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2042 gpa_t gpa
= data
& ~0x3f;
2044 /* Bits 2:5 are reserved, Should be zero */
2048 vcpu
->arch
.apf
.msr_val
= data
;
2050 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2051 kvm_clear_async_pf_completion_queue(vcpu
);
2052 kvm_async_pf_hash_reset(vcpu
);
2056 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2060 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2061 kvm_async_pf_wakeup_all(vcpu
);
2065 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2067 vcpu
->arch
.pv_time_enabled
= false;
2070 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2072 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2075 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2076 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2079 vcpu
->arch
.st
.steal
.preempted
= 0;
2081 if (vcpu
->arch
.st
.steal
.version
& 1)
2082 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2084 vcpu
->arch
.st
.steal
.version
+= 1;
2086 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2087 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2091 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2092 vcpu
->arch
.st
.last_steal
;
2093 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2095 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2096 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2100 vcpu
->arch
.st
.steal
.version
+= 1;
2102 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2103 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2106 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2109 u32 msr
= msr_info
->index
;
2110 u64 data
= msr_info
->data
;
2113 case MSR_AMD64_NB_CFG
:
2114 case MSR_IA32_UCODE_REV
:
2115 case MSR_IA32_UCODE_WRITE
:
2116 case MSR_VM_HSAVE_PA
:
2117 case MSR_AMD64_PATCH_LOADER
:
2118 case MSR_AMD64_BU_CFG2
:
2122 return set_efer(vcpu
, data
);
2124 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2125 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2126 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2127 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2129 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2134 case MSR_FAM10H_MMIO_CONF_BASE
:
2136 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2141 case MSR_IA32_DEBUGCTLMSR
:
2143 /* We support the non-activated case already */
2145 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2146 /* Values other than LBR and BTF are vendor-specific,
2147 thus reserved and should throw a #GP */
2150 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2153 case 0x200 ... 0x2ff:
2154 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2155 case MSR_IA32_APICBASE
:
2156 return kvm_set_apic_base(vcpu
, msr_info
);
2157 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2158 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2159 case MSR_IA32_TSCDEADLINE
:
2160 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2162 case MSR_IA32_TSC_ADJUST
:
2163 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2164 if (!msr_info
->host_initiated
) {
2165 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2166 adjust_tsc_offset_guest(vcpu
, adj
);
2168 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2171 case MSR_IA32_MISC_ENABLE
:
2172 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2174 case MSR_IA32_SMBASE
:
2175 if (!msr_info
->host_initiated
)
2177 vcpu
->arch
.smbase
= data
;
2179 case MSR_KVM_WALL_CLOCK_NEW
:
2180 case MSR_KVM_WALL_CLOCK
:
2181 vcpu
->kvm
->arch
.wall_clock
= data
;
2182 kvm_write_wall_clock(vcpu
->kvm
, data
);
2184 case MSR_KVM_SYSTEM_TIME_NEW
:
2185 case MSR_KVM_SYSTEM_TIME
: {
2186 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2188 kvmclock_reset(vcpu
);
2190 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2191 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2193 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2194 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2197 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2200 vcpu
->arch
.time
= data
;
2201 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2203 /* we verify if the enable bit is set... */
2207 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2208 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2209 sizeof(struct pvclock_vcpu_time_info
)))
2210 vcpu
->arch
.pv_time_enabled
= false;
2212 vcpu
->arch
.pv_time_enabled
= true;
2216 case MSR_KVM_ASYNC_PF_EN
:
2217 if (kvm_pv_enable_async_pf(vcpu
, data
))
2220 case MSR_KVM_STEAL_TIME
:
2222 if (unlikely(!sched_info_on()))
2225 if (data
& KVM_STEAL_RESERVED_MASK
)
2228 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2229 data
& KVM_STEAL_VALID_BITS
,
2230 sizeof(struct kvm_steal_time
)))
2233 vcpu
->arch
.st
.msr_val
= data
;
2235 if (!(data
& KVM_MSR_ENABLED
))
2238 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2241 case MSR_KVM_PV_EOI_EN
:
2242 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2246 case MSR_IA32_MCG_CTL
:
2247 case MSR_IA32_MCG_STATUS
:
2248 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2249 return set_msr_mce(vcpu
, msr
, data
);
2251 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2252 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2253 pr
= true; /* fall through */
2254 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2255 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2256 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2257 return kvm_pmu_set_msr(vcpu
, msr_info
);
2259 if (pr
|| data
!= 0)
2260 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2261 "0x%x data 0x%llx\n", msr
, data
);
2263 case MSR_K7_CLK_CTL
:
2265 * Ignore all writes to this no longer documented MSR.
2266 * Writes are only relevant for old K7 processors,
2267 * all pre-dating SVM, but a recommended workaround from
2268 * AMD for these chips. It is possible to specify the
2269 * affected processor models on the command line, hence
2270 * the need to ignore the workaround.
2273 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2274 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2275 case HV_X64_MSR_CRASH_CTL
:
2276 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2277 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2278 msr_info
->host_initiated
);
2279 case MSR_IA32_BBL_CR_CTL3
:
2280 /* Drop writes to this legacy MSR -- see rdmsr
2281 * counterpart for further detail.
2283 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n", msr
, data
);
2285 case MSR_AMD64_OSVW_ID_LENGTH
:
2286 if (!guest_cpuid_has_osvw(vcpu
))
2288 vcpu
->arch
.osvw
.length
= data
;
2290 case MSR_AMD64_OSVW_STATUS
:
2291 if (!guest_cpuid_has_osvw(vcpu
))
2293 vcpu
->arch
.osvw
.status
= data
;
2296 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2297 return xen_hvm_config(vcpu
, data
);
2298 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2299 return kvm_pmu_set_msr(vcpu
, msr_info
);
2301 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2305 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2312 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2316 * Reads an msr value (of 'msr_index') into 'pdata'.
2317 * Returns 0 on success, non-0 otherwise.
2318 * Assumes vcpu_load() was already called.
2320 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2322 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2324 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2326 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2329 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2330 unsigned bank_num
= mcg_cap
& 0xff;
2333 case MSR_IA32_P5_MC_ADDR
:
2334 case MSR_IA32_P5_MC_TYPE
:
2337 case MSR_IA32_MCG_CAP
:
2338 data
= vcpu
->arch
.mcg_cap
;
2340 case MSR_IA32_MCG_CTL
:
2341 if (!(mcg_cap
& MCG_CTL_P
))
2343 data
= vcpu
->arch
.mcg_ctl
;
2345 case MSR_IA32_MCG_STATUS
:
2346 data
= vcpu
->arch
.mcg_status
;
2349 if (msr
>= MSR_IA32_MC0_CTL
&&
2350 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2351 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2352 data
= vcpu
->arch
.mce_banks
[offset
];
2361 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2363 switch (msr_info
->index
) {
2364 case MSR_IA32_PLATFORM_ID
:
2365 case MSR_IA32_EBL_CR_POWERON
:
2366 case MSR_IA32_DEBUGCTLMSR
:
2367 case MSR_IA32_LASTBRANCHFROMIP
:
2368 case MSR_IA32_LASTBRANCHTOIP
:
2369 case MSR_IA32_LASTINTFROMIP
:
2370 case MSR_IA32_LASTINTTOIP
:
2372 case MSR_K8_TSEG_ADDR
:
2373 case MSR_K8_TSEG_MASK
:
2375 case MSR_VM_HSAVE_PA
:
2376 case MSR_K8_INT_PENDING_MSG
:
2377 case MSR_AMD64_NB_CFG
:
2378 case MSR_FAM10H_MMIO_CONF_BASE
:
2379 case MSR_AMD64_BU_CFG2
:
2380 case MSR_IA32_PERF_CTL
:
2383 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2384 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2385 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2386 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2387 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2388 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2391 case MSR_IA32_UCODE_REV
:
2392 msr_info
->data
= 0x100000000ULL
;
2395 case 0x200 ... 0x2ff:
2396 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2397 case 0xcd: /* fsb frequency */
2401 * MSR_EBC_FREQUENCY_ID
2402 * Conservative value valid for even the basic CPU models.
2403 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2404 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2405 * and 266MHz for model 3, or 4. Set Core Clock
2406 * Frequency to System Bus Frequency Ratio to 1 (bits
2407 * 31:24) even though these are only valid for CPU
2408 * models > 2, however guests may end up dividing or
2409 * multiplying by zero otherwise.
2411 case MSR_EBC_FREQUENCY_ID
:
2412 msr_info
->data
= 1 << 24;
2414 case MSR_IA32_APICBASE
:
2415 msr_info
->data
= kvm_get_apic_base(vcpu
);
2417 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2418 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2420 case MSR_IA32_TSCDEADLINE
:
2421 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2423 case MSR_IA32_TSC_ADJUST
:
2424 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2426 case MSR_IA32_MISC_ENABLE
:
2427 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2429 case MSR_IA32_SMBASE
:
2430 if (!msr_info
->host_initiated
)
2432 msr_info
->data
= vcpu
->arch
.smbase
;
2434 case MSR_IA32_PERF_STATUS
:
2435 /* TSC increment by tick */
2436 msr_info
->data
= 1000ULL;
2437 /* CPU multiplier */
2438 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2441 msr_info
->data
= vcpu
->arch
.efer
;
2443 case MSR_KVM_WALL_CLOCK
:
2444 case MSR_KVM_WALL_CLOCK_NEW
:
2445 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2447 case MSR_KVM_SYSTEM_TIME
:
2448 case MSR_KVM_SYSTEM_TIME_NEW
:
2449 msr_info
->data
= vcpu
->arch
.time
;
2451 case MSR_KVM_ASYNC_PF_EN
:
2452 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2454 case MSR_KVM_STEAL_TIME
:
2455 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2457 case MSR_KVM_PV_EOI_EN
:
2458 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2460 case MSR_IA32_P5_MC_ADDR
:
2461 case MSR_IA32_P5_MC_TYPE
:
2462 case MSR_IA32_MCG_CAP
:
2463 case MSR_IA32_MCG_CTL
:
2464 case MSR_IA32_MCG_STATUS
:
2465 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2466 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2467 case MSR_K7_CLK_CTL
:
2469 * Provide expected ramp-up count for K7. All other
2470 * are set to zero, indicating minimum divisors for
2473 * This prevents guest kernels on AMD host with CPU
2474 * type 6, model 8 and higher from exploding due to
2475 * the rdmsr failing.
2477 msr_info
->data
= 0x20000000;
2479 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2480 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2481 case HV_X64_MSR_CRASH_CTL
:
2482 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2483 return kvm_hv_get_msr_common(vcpu
,
2484 msr_info
->index
, &msr_info
->data
);
2486 case MSR_IA32_BBL_CR_CTL3
:
2487 /* This legacy MSR exists but isn't fully documented in current
2488 * silicon. It is however accessed by winxp in very narrow
2489 * scenarios where it sets bit #19, itself documented as
2490 * a "reserved" bit. Best effort attempt to source coherent
2491 * read data here should the balance of the register be
2492 * interpreted by the guest:
2494 * L2 cache control register 3: 64GB range, 256KB size,
2495 * enabled, latency 0x1, configured
2497 msr_info
->data
= 0xbe702111;
2499 case MSR_AMD64_OSVW_ID_LENGTH
:
2500 if (!guest_cpuid_has_osvw(vcpu
))
2502 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2504 case MSR_AMD64_OSVW_STATUS
:
2505 if (!guest_cpuid_has_osvw(vcpu
))
2507 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2510 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2511 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2513 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2517 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2524 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2527 * Read or write a bunch of msrs. All parameters are kernel addresses.
2529 * @return number of msrs set successfully.
2531 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2532 struct kvm_msr_entry
*entries
,
2533 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2534 unsigned index
, u64
*data
))
2538 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2539 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2540 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2542 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2548 * Read or write a bunch of msrs. Parameters are user addresses.
2550 * @return number of msrs set successfully.
2552 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2553 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2554 unsigned index
, u64
*data
),
2557 struct kvm_msrs msrs
;
2558 struct kvm_msr_entry
*entries
;
2563 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2567 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2570 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2571 entries
= memdup_user(user_msrs
->entries
, size
);
2572 if (IS_ERR(entries
)) {
2573 r
= PTR_ERR(entries
);
2577 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2582 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2593 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2598 case KVM_CAP_IRQCHIP
:
2600 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2601 case KVM_CAP_SET_TSS_ADDR
:
2602 case KVM_CAP_EXT_CPUID
:
2603 case KVM_CAP_EXT_EMUL_CPUID
:
2604 case KVM_CAP_CLOCKSOURCE
:
2606 case KVM_CAP_NOP_IO_DELAY
:
2607 case KVM_CAP_MP_STATE
:
2608 case KVM_CAP_SYNC_MMU
:
2609 case KVM_CAP_USER_NMI
:
2610 case KVM_CAP_REINJECT_CONTROL
:
2611 case KVM_CAP_IRQ_INJECT_STATUS
:
2612 case KVM_CAP_IOEVENTFD
:
2613 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2615 case KVM_CAP_PIT_STATE2
:
2616 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2617 case KVM_CAP_XEN_HVM
:
2618 case KVM_CAP_VCPU_EVENTS
:
2619 case KVM_CAP_HYPERV
:
2620 case KVM_CAP_HYPERV_VAPIC
:
2621 case KVM_CAP_HYPERV_SPIN
:
2622 case KVM_CAP_HYPERV_SYNIC
:
2623 case KVM_CAP_PCI_SEGMENT
:
2624 case KVM_CAP_DEBUGREGS
:
2625 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2627 case KVM_CAP_ASYNC_PF
:
2628 case KVM_CAP_GET_TSC_KHZ
:
2629 case KVM_CAP_KVMCLOCK_CTRL
:
2630 case KVM_CAP_READONLY_MEM
:
2631 case KVM_CAP_HYPERV_TIME
:
2632 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2633 case KVM_CAP_TSC_DEADLINE_TIMER
:
2634 case KVM_CAP_ENABLE_CAP_VM
:
2635 case KVM_CAP_DISABLE_QUIRKS
:
2636 case KVM_CAP_SET_BOOT_CPU_ID
:
2637 case KVM_CAP_SPLIT_IRQCHIP
:
2638 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2639 case KVM_CAP_ASSIGN_DEV_IRQ
:
2640 case KVM_CAP_PCI_2_3
:
2644 case KVM_CAP_ADJUST_CLOCK
:
2645 r
= KVM_CLOCK_TSC_STABLE
;
2647 case KVM_CAP_X86_SMM
:
2648 /* SMBASE is usually relocated above 1M on modern chipsets,
2649 * and SMM handlers might indeed rely on 4G segment limits,
2650 * so do not report SMM to be available if real mode is
2651 * emulated via vm86 mode. Still, do not go to great lengths
2652 * to avoid userspace's usage of the feature, because it is a
2653 * fringe case that is not enabled except via specific settings
2654 * of the module parameters.
2656 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2658 case KVM_CAP_COALESCED_MMIO
:
2659 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2662 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2664 case KVM_CAP_NR_VCPUS
:
2665 r
= KVM_SOFT_MAX_VCPUS
;
2667 case KVM_CAP_MAX_VCPUS
:
2670 case KVM_CAP_NR_MEMSLOTS
:
2671 r
= KVM_USER_MEM_SLOTS
;
2673 case KVM_CAP_PV_MMU
: /* obsolete */
2676 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2678 r
= iommu_present(&pci_bus_type
);
2682 r
= KVM_MAX_MCE_BANKS
;
2685 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2687 case KVM_CAP_TSC_CONTROL
:
2688 r
= kvm_has_tsc_control
;
2690 case KVM_CAP_X2APIC_API
:
2691 r
= KVM_X2APIC_API_VALID_FLAGS
;
2701 long kvm_arch_dev_ioctl(struct file
*filp
,
2702 unsigned int ioctl
, unsigned long arg
)
2704 void __user
*argp
= (void __user
*)arg
;
2708 case KVM_GET_MSR_INDEX_LIST
: {
2709 struct kvm_msr_list __user
*user_msr_list
= argp
;
2710 struct kvm_msr_list msr_list
;
2714 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2717 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2718 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2721 if (n
< msr_list
.nmsrs
)
2724 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2725 num_msrs_to_save
* sizeof(u32
)))
2727 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2729 num_emulated_msrs
* sizeof(u32
)))
2734 case KVM_GET_SUPPORTED_CPUID
:
2735 case KVM_GET_EMULATED_CPUID
: {
2736 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2737 struct kvm_cpuid2 cpuid
;
2740 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2743 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2749 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2754 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2756 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2757 sizeof(kvm_mce_cap_supported
)))
2769 static void wbinvd_ipi(void *garbage
)
2774 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2776 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2779 static inline void kvm_migrate_timers(struct kvm_vcpu
*vcpu
)
2781 set_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
);
2784 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2786 /* Address WBINVD may be executed by guest */
2787 if (need_emulate_wbinvd(vcpu
)) {
2788 if (kvm_x86_ops
->has_wbinvd_exit())
2789 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2790 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2791 smp_call_function_single(vcpu
->cpu
,
2792 wbinvd_ipi
, NULL
, 1);
2795 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2797 /* Apply any externally detected TSC adjustments (due to suspend) */
2798 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2799 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2800 vcpu
->arch
.tsc_offset_adjustment
= 0;
2801 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2804 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2805 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2806 rdtsc() - vcpu
->arch
.last_host_tsc
;
2808 mark_tsc_unstable("KVM discovered backwards TSC");
2810 if (check_tsc_unstable()) {
2811 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2812 vcpu
->arch
.last_guest_tsc
);
2813 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2814 vcpu
->arch
.tsc_catchup
= 1;
2816 if (kvm_lapic_hv_timer_in_use(vcpu
) &&
2817 kvm_x86_ops
->set_hv_timer(vcpu
,
2818 kvm_get_lapic_target_expiration_tsc(vcpu
)))
2819 kvm_lapic_switch_to_sw_timer(vcpu
);
2821 * On a host with synchronized TSC, there is no need to update
2822 * kvmclock on vcpu->cpu migration
2824 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2825 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2826 if (vcpu
->cpu
!= cpu
)
2827 kvm_migrate_timers(vcpu
);
2831 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2834 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2836 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2839 vcpu
->arch
.st
.steal
.preempted
= 1;
2841 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2842 &vcpu
->arch
.st
.steal
.preempted
,
2843 offsetof(struct kvm_steal_time
, preempted
),
2844 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2847 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2851 * Disable page faults because we're in atomic context here.
2852 * kvm_write_guest_offset_cached() would call might_fault()
2853 * that relies on pagefault_disable() to tell if there's a
2854 * bug. NOTE: the write to guest memory may not go through if
2855 * during postcopy live migration or if there's heavy guest
2858 pagefault_disable();
2860 * kvm_memslots() will be called by
2861 * kvm_write_guest_offset_cached() so take the srcu lock.
2863 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2864 kvm_steal_time_set_preempted(vcpu
);
2865 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2867 kvm_x86_ops
->vcpu_put(vcpu
);
2868 kvm_put_guest_fpu(vcpu
);
2869 vcpu
->arch
.last_host_tsc
= rdtsc();
2872 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2873 struct kvm_lapic_state
*s
)
2875 if (vcpu
->arch
.apicv_active
)
2876 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2878 return kvm_apic_get_state(vcpu
, s
);
2881 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2882 struct kvm_lapic_state
*s
)
2886 r
= kvm_apic_set_state(vcpu
, s
);
2889 update_cr8_intercept(vcpu
);
2894 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2896 return (!lapic_in_kernel(vcpu
) ||
2897 kvm_apic_accept_pic_intr(vcpu
));
2901 * if userspace requested an interrupt window, check that the
2902 * interrupt window is open.
2904 * No need to exit to userspace if we already have an interrupt queued.
2906 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2908 return kvm_arch_interrupt_allowed(vcpu
) &&
2909 !kvm_cpu_has_interrupt(vcpu
) &&
2910 !kvm_event_needs_reinjection(vcpu
) &&
2911 kvm_cpu_accept_dm_intr(vcpu
);
2914 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2915 struct kvm_interrupt
*irq
)
2917 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2920 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2921 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2922 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2927 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2928 * fail for in-kernel 8259.
2930 if (pic_in_kernel(vcpu
->kvm
))
2933 if (vcpu
->arch
.pending_external_vector
!= -1)
2936 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2937 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2941 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2943 kvm_inject_nmi(vcpu
);
2948 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2950 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2955 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2956 struct kvm_tpr_access_ctl
*tac
)
2960 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2964 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2968 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2971 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2973 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
2976 vcpu
->arch
.mcg_cap
= mcg_cap
;
2977 /* Init IA32_MCG_CTL to all 1s */
2978 if (mcg_cap
& MCG_CTL_P
)
2979 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2980 /* Init IA32_MCi_CTL to all 1s */
2981 for (bank
= 0; bank
< bank_num
; bank
++)
2982 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2984 if (kvm_x86_ops
->setup_mce
)
2985 kvm_x86_ops
->setup_mce(vcpu
);
2990 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2991 struct kvm_x86_mce
*mce
)
2993 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2994 unsigned bank_num
= mcg_cap
& 0xff;
2995 u64
*banks
= vcpu
->arch
.mce_banks
;
2997 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3000 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3001 * reporting is disabled
3003 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3004 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3006 banks
+= 4 * mce
->bank
;
3008 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3009 * reporting is disabled for the bank
3011 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3013 if (mce
->status
& MCI_STATUS_UC
) {
3014 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3015 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3016 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3019 if (banks
[1] & MCI_STATUS_VAL
)
3020 mce
->status
|= MCI_STATUS_OVER
;
3021 banks
[2] = mce
->addr
;
3022 banks
[3] = mce
->misc
;
3023 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3024 banks
[1] = mce
->status
;
3025 kvm_queue_exception(vcpu
, MC_VECTOR
);
3026 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3027 || !(banks
[1] & MCI_STATUS_UC
)) {
3028 if (banks
[1] & MCI_STATUS_VAL
)
3029 mce
->status
|= MCI_STATUS_OVER
;
3030 banks
[2] = mce
->addr
;
3031 banks
[3] = mce
->misc
;
3032 banks
[1] = mce
->status
;
3034 banks
[1] |= MCI_STATUS_OVER
;
3038 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3039 struct kvm_vcpu_events
*events
)
3042 events
->exception
.injected
=
3043 vcpu
->arch
.exception
.pending
&&
3044 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3045 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3046 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3047 events
->exception
.pad
= 0;
3048 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3050 events
->interrupt
.injected
=
3051 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3052 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3053 events
->interrupt
.soft
= 0;
3054 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3056 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3057 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3058 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3059 events
->nmi
.pad
= 0;
3061 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3063 events
->smi
.smm
= is_smm(vcpu
);
3064 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3065 events
->smi
.smm_inside_nmi
=
3066 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3067 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3069 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3070 | KVM_VCPUEVENT_VALID_SHADOW
3071 | KVM_VCPUEVENT_VALID_SMM
);
3072 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3075 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3077 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3078 struct kvm_vcpu_events
*events
)
3080 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3081 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3082 | KVM_VCPUEVENT_VALID_SHADOW
3083 | KVM_VCPUEVENT_VALID_SMM
))
3086 if (events
->exception
.injected
&&
3087 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
3091 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3092 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3093 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3094 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3096 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3097 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3098 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3099 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3100 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3101 events
->interrupt
.shadow
);
3103 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3104 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3105 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3106 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3108 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3109 lapic_in_kernel(vcpu
))
3110 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3112 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3113 u32 hflags
= vcpu
->arch
.hflags
;
3114 if (events
->smi
.smm
)
3115 hflags
|= HF_SMM_MASK
;
3117 hflags
&= ~HF_SMM_MASK
;
3118 kvm_set_hflags(vcpu
, hflags
);
3120 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3121 if (events
->smi
.smm_inside_nmi
)
3122 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3124 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3125 if (lapic_in_kernel(vcpu
)) {
3126 if (events
->smi
.latched_init
)
3127 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3129 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3133 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3138 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3139 struct kvm_debugregs
*dbgregs
)
3143 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3144 kvm_get_dr(vcpu
, 6, &val
);
3146 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3148 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3151 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3152 struct kvm_debugregs
*dbgregs
)
3157 if (dbgregs
->dr6
& ~0xffffffffull
)
3159 if (dbgregs
->dr7
& ~0xffffffffull
)
3162 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3163 kvm_update_dr0123(vcpu
);
3164 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3165 kvm_update_dr6(vcpu
);
3166 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3167 kvm_update_dr7(vcpu
);
3172 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3174 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3176 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3177 u64 xstate_bv
= xsave
->header
.xfeatures
;
3181 * Copy legacy XSAVE area, to avoid complications with CPUID
3182 * leaves 0 and 1 in the loop below.
3184 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3187 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3190 * Copy each region from the possibly compacted offset to the
3191 * non-compacted offset.
3193 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3195 u64 feature
= valid
& -valid
;
3196 int index
= fls64(feature
) - 1;
3197 void *src
= get_xsave_addr(xsave
, feature
);
3200 u32 size
, offset
, ecx
, edx
;
3201 cpuid_count(XSTATE_CPUID
, index
,
3202 &size
, &offset
, &ecx
, &edx
);
3203 memcpy(dest
+ offset
, src
, size
);
3210 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3212 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3213 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3217 * Copy legacy XSAVE area, to avoid complications with CPUID
3218 * leaves 0 and 1 in the loop below.
3220 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3222 /* Set XSTATE_BV and possibly XCOMP_BV. */
3223 xsave
->header
.xfeatures
= xstate_bv
;
3224 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3225 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3228 * Copy each region from the non-compacted offset to the
3229 * possibly compacted offset.
3231 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3233 u64 feature
= valid
& -valid
;
3234 int index
= fls64(feature
) - 1;
3235 void *dest
= get_xsave_addr(xsave
, feature
);
3238 u32 size
, offset
, ecx
, edx
;
3239 cpuid_count(XSTATE_CPUID
, index
,
3240 &size
, &offset
, &ecx
, &edx
);
3241 memcpy(dest
, src
+ offset
, size
);
3248 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3249 struct kvm_xsave
*guest_xsave
)
3251 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3252 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3253 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3255 memcpy(guest_xsave
->region
,
3256 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3257 sizeof(struct fxregs_state
));
3258 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3259 XFEATURE_MASK_FPSSE
;
3263 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3264 struct kvm_xsave
*guest_xsave
)
3267 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3269 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3271 * Here we allow setting states that are not present in
3272 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3273 * with old userspace.
3275 if (xstate_bv
& ~kvm_supported_xcr0())
3277 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3279 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
)
3281 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3282 guest_xsave
->region
, sizeof(struct fxregs_state
));
3287 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3288 struct kvm_xcrs
*guest_xcrs
)
3290 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3291 guest_xcrs
->nr_xcrs
= 0;
3295 guest_xcrs
->nr_xcrs
= 1;
3296 guest_xcrs
->flags
= 0;
3297 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3298 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3301 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3302 struct kvm_xcrs
*guest_xcrs
)
3306 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3309 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3312 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3313 /* Only support XCR0 currently */
3314 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3315 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3316 guest_xcrs
->xcrs
[i
].value
);
3325 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3326 * stopped by the hypervisor. This function will be called from the host only.
3327 * EINVAL is returned when the host attempts to set the flag for a guest that
3328 * does not support pv clocks.
3330 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3332 if (!vcpu
->arch
.pv_time_enabled
)
3334 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3335 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3339 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3340 struct kvm_enable_cap
*cap
)
3346 case KVM_CAP_HYPERV_SYNIC
:
3347 return kvm_hv_activate_synic(vcpu
);
3353 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3354 unsigned int ioctl
, unsigned long arg
)
3356 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3357 void __user
*argp
= (void __user
*)arg
;
3360 struct kvm_lapic_state
*lapic
;
3361 struct kvm_xsave
*xsave
;
3362 struct kvm_xcrs
*xcrs
;
3368 case KVM_GET_LAPIC
: {
3370 if (!lapic_in_kernel(vcpu
))
3372 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3377 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3381 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3386 case KVM_SET_LAPIC
: {
3388 if (!lapic_in_kernel(vcpu
))
3390 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3391 if (IS_ERR(u
.lapic
))
3392 return PTR_ERR(u
.lapic
);
3394 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3397 case KVM_INTERRUPT
: {
3398 struct kvm_interrupt irq
;
3401 if (copy_from_user(&irq
, argp
, sizeof irq
))
3403 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3407 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3411 r
= kvm_vcpu_ioctl_smi(vcpu
);
3414 case KVM_SET_CPUID
: {
3415 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3416 struct kvm_cpuid cpuid
;
3419 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3421 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3424 case KVM_SET_CPUID2
: {
3425 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3426 struct kvm_cpuid2 cpuid
;
3429 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3431 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3432 cpuid_arg
->entries
);
3435 case KVM_GET_CPUID2
: {
3436 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3437 struct kvm_cpuid2 cpuid
;
3440 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3442 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3443 cpuid_arg
->entries
);
3447 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3453 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3456 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3458 case KVM_TPR_ACCESS_REPORTING
: {
3459 struct kvm_tpr_access_ctl tac
;
3462 if (copy_from_user(&tac
, argp
, sizeof tac
))
3464 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3468 if (copy_to_user(argp
, &tac
, sizeof tac
))
3473 case KVM_SET_VAPIC_ADDR
: {
3474 struct kvm_vapic_addr va
;
3478 if (!lapic_in_kernel(vcpu
))
3481 if (copy_from_user(&va
, argp
, sizeof va
))
3483 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3484 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3485 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3488 case KVM_X86_SETUP_MCE
: {
3492 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3494 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3497 case KVM_X86_SET_MCE
: {
3498 struct kvm_x86_mce mce
;
3501 if (copy_from_user(&mce
, argp
, sizeof mce
))
3503 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3506 case KVM_GET_VCPU_EVENTS
: {
3507 struct kvm_vcpu_events events
;
3509 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3512 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3517 case KVM_SET_VCPU_EVENTS
: {
3518 struct kvm_vcpu_events events
;
3521 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3524 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3527 case KVM_GET_DEBUGREGS
: {
3528 struct kvm_debugregs dbgregs
;
3530 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3533 if (copy_to_user(argp
, &dbgregs
,
3534 sizeof(struct kvm_debugregs
)))
3539 case KVM_SET_DEBUGREGS
: {
3540 struct kvm_debugregs dbgregs
;
3543 if (copy_from_user(&dbgregs
, argp
,
3544 sizeof(struct kvm_debugregs
)))
3547 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3550 case KVM_GET_XSAVE
: {
3551 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3556 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3559 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3564 case KVM_SET_XSAVE
: {
3565 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3566 if (IS_ERR(u
.xsave
))
3567 return PTR_ERR(u
.xsave
);
3569 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3572 case KVM_GET_XCRS
: {
3573 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3578 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3581 if (copy_to_user(argp
, u
.xcrs
,
3582 sizeof(struct kvm_xcrs
)))
3587 case KVM_SET_XCRS
: {
3588 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3590 return PTR_ERR(u
.xcrs
);
3592 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3595 case KVM_SET_TSC_KHZ
: {
3599 user_tsc_khz
= (u32
)arg
;
3601 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3604 if (user_tsc_khz
== 0)
3605 user_tsc_khz
= tsc_khz
;
3607 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3612 case KVM_GET_TSC_KHZ
: {
3613 r
= vcpu
->arch
.virtual_tsc_khz
;
3616 case KVM_KVMCLOCK_CTRL
: {
3617 r
= kvm_set_guest_paused(vcpu
);
3620 case KVM_ENABLE_CAP
: {
3621 struct kvm_enable_cap cap
;
3624 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3626 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3637 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3639 return VM_FAULT_SIGBUS
;
3642 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3646 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3648 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3652 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3655 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3659 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3660 u32 kvm_nr_mmu_pages
)
3662 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3665 mutex_lock(&kvm
->slots_lock
);
3667 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3668 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3670 mutex_unlock(&kvm
->slots_lock
);
3674 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3676 return kvm
->arch
.n_max_mmu_pages
;
3679 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3684 switch (chip
->chip_id
) {
3685 case KVM_IRQCHIP_PIC_MASTER
:
3686 memcpy(&chip
->chip
.pic
,
3687 &pic_irqchip(kvm
)->pics
[0],
3688 sizeof(struct kvm_pic_state
));
3690 case KVM_IRQCHIP_PIC_SLAVE
:
3691 memcpy(&chip
->chip
.pic
,
3692 &pic_irqchip(kvm
)->pics
[1],
3693 sizeof(struct kvm_pic_state
));
3695 case KVM_IRQCHIP_IOAPIC
:
3696 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3705 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3710 switch (chip
->chip_id
) {
3711 case KVM_IRQCHIP_PIC_MASTER
:
3712 spin_lock(&pic_irqchip(kvm
)->lock
);
3713 memcpy(&pic_irqchip(kvm
)->pics
[0],
3715 sizeof(struct kvm_pic_state
));
3716 spin_unlock(&pic_irqchip(kvm
)->lock
);
3718 case KVM_IRQCHIP_PIC_SLAVE
:
3719 spin_lock(&pic_irqchip(kvm
)->lock
);
3720 memcpy(&pic_irqchip(kvm
)->pics
[1],
3722 sizeof(struct kvm_pic_state
));
3723 spin_unlock(&pic_irqchip(kvm
)->lock
);
3725 case KVM_IRQCHIP_IOAPIC
:
3726 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3732 kvm_pic_update_irq(pic_irqchip(kvm
));
3736 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3738 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3740 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3742 mutex_lock(&kps
->lock
);
3743 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3744 mutex_unlock(&kps
->lock
);
3748 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3751 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3753 mutex_lock(&pit
->pit_state
.lock
);
3754 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3755 for (i
= 0; i
< 3; i
++)
3756 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3757 mutex_unlock(&pit
->pit_state
.lock
);
3761 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3763 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3764 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3765 sizeof(ps
->channels
));
3766 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3767 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3768 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3772 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3776 u32 prev_legacy
, cur_legacy
;
3777 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3779 mutex_lock(&pit
->pit_state
.lock
);
3780 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3781 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3782 if (!prev_legacy
&& cur_legacy
)
3784 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3785 sizeof(pit
->pit_state
.channels
));
3786 pit
->pit_state
.flags
= ps
->flags
;
3787 for (i
= 0; i
< 3; i
++)
3788 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3790 mutex_unlock(&pit
->pit_state
.lock
);
3794 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3795 struct kvm_reinject_control
*control
)
3797 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3802 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3803 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3804 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3806 mutex_lock(&pit
->pit_state
.lock
);
3807 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3808 mutex_unlock(&pit
->pit_state
.lock
);
3814 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3815 * @kvm: kvm instance
3816 * @log: slot id and address to which we copy the log
3818 * Steps 1-4 below provide general overview of dirty page logging. See
3819 * kvm_get_dirty_log_protect() function description for additional details.
3821 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3822 * always flush the TLB (step 4) even if previous step failed and the dirty
3823 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3824 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3825 * writes will be marked dirty for next log read.
3827 * 1. Take a snapshot of the bit and clear it if needed.
3828 * 2. Write protect the corresponding page.
3829 * 3. Copy the snapshot to the userspace.
3830 * 4. Flush TLB's if needed.
3832 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3834 bool is_dirty
= false;
3837 mutex_lock(&kvm
->slots_lock
);
3840 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3842 if (kvm_x86_ops
->flush_log_dirty
)
3843 kvm_x86_ops
->flush_log_dirty(kvm
);
3845 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3848 * All the TLBs can be flushed out of mmu lock, see the comments in
3849 * kvm_mmu_slot_remove_write_access().
3851 lockdep_assert_held(&kvm
->slots_lock
);
3853 kvm_flush_remote_tlbs(kvm
);
3855 mutex_unlock(&kvm
->slots_lock
);
3859 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3862 if (!irqchip_in_kernel(kvm
))
3865 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3866 irq_event
->irq
, irq_event
->level
,
3871 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3872 struct kvm_enable_cap
*cap
)
3880 case KVM_CAP_DISABLE_QUIRKS
:
3881 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3884 case KVM_CAP_SPLIT_IRQCHIP
: {
3885 mutex_lock(&kvm
->lock
);
3887 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3888 goto split_irqchip_unlock
;
3890 if (irqchip_in_kernel(kvm
))
3891 goto split_irqchip_unlock
;
3892 if (kvm
->created_vcpus
)
3893 goto split_irqchip_unlock
;
3894 r
= kvm_setup_empty_irq_routing(kvm
);
3896 goto split_irqchip_unlock
;
3897 /* Pairs with irqchip_in_kernel. */
3899 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
3900 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3902 split_irqchip_unlock
:
3903 mutex_unlock(&kvm
->lock
);
3906 case KVM_CAP_X2APIC_API
:
3908 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
3911 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
3912 kvm
->arch
.x2apic_format
= true;
3913 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
3914 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
3925 long kvm_arch_vm_ioctl(struct file
*filp
,
3926 unsigned int ioctl
, unsigned long arg
)
3928 struct kvm
*kvm
= filp
->private_data
;
3929 void __user
*argp
= (void __user
*)arg
;
3932 * This union makes it completely explicit to gcc-3.x
3933 * that these two variables' stack usage should be
3934 * combined, not added together.
3937 struct kvm_pit_state ps
;
3938 struct kvm_pit_state2 ps2
;
3939 struct kvm_pit_config pit_config
;
3943 case KVM_SET_TSS_ADDR
:
3944 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3946 case KVM_SET_IDENTITY_MAP_ADDR
: {
3950 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3952 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3955 case KVM_SET_NR_MMU_PAGES
:
3956 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3958 case KVM_GET_NR_MMU_PAGES
:
3959 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3961 case KVM_CREATE_IRQCHIP
: {
3962 mutex_lock(&kvm
->lock
);
3965 if (irqchip_in_kernel(kvm
))
3966 goto create_irqchip_unlock
;
3969 if (kvm
->created_vcpus
)
3970 goto create_irqchip_unlock
;
3972 r
= kvm_pic_init(kvm
);
3974 goto create_irqchip_unlock
;
3976 r
= kvm_ioapic_init(kvm
);
3978 mutex_lock(&kvm
->slots_lock
);
3979 kvm_pic_destroy(kvm
);
3980 mutex_unlock(&kvm
->slots_lock
);
3981 goto create_irqchip_unlock
;
3984 r
= kvm_setup_default_irq_routing(kvm
);
3986 mutex_lock(&kvm
->slots_lock
);
3987 mutex_lock(&kvm
->irq_lock
);
3988 kvm_ioapic_destroy(kvm
);
3989 kvm_pic_destroy(kvm
);
3990 mutex_unlock(&kvm
->irq_lock
);
3991 mutex_unlock(&kvm
->slots_lock
);
3992 goto create_irqchip_unlock
;
3994 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
3996 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
3997 create_irqchip_unlock
:
3998 mutex_unlock(&kvm
->lock
);
4001 case KVM_CREATE_PIT
:
4002 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4004 case KVM_CREATE_PIT2
:
4006 if (copy_from_user(&u
.pit_config
, argp
,
4007 sizeof(struct kvm_pit_config
)))
4010 mutex_lock(&kvm
->lock
);
4013 goto create_pit_unlock
;
4015 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4019 mutex_unlock(&kvm
->lock
);
4021 case KVM_GET_IRQCHIP
: {
4022 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4023 struct kvm_irqchip
*chip
;
4025 chip
= memdup_user(argp
, sizeof(*chip
));
4032 if (!irqchip_kernel(kvm
))
4033 goto get_irqchip_out
;
4034 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4036 goto get_irqchip_out
;
4038 if (copy_to_user(argp
, chip
, sizeof *chip
))
4039 goto get_irqchip_out
;
4045 case KVM_SET_IRQCHIP
: {
4046 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4047 struct kvm_irqchip
*chip
;
4049 chip
= memdup_user(argp
, sizeof(*chip
));
4056 if (!irqchip_kernel(kvm
))
4057 goto set_irqchip_out
;
4058 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4060 goto set_irqchip_out
;
4068 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4071 if (!kvm
->arch
.vpit
)
4073 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4077 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4084 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4087 if (!kvm
->arch
.vpit
)
4089 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4092 case KVM_GET_PIT2
: {
4094 if (!kvm
->arch
.vpit
)
4096 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4100 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4105 case KVM_SET_PIT2
: {
4107 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4110 if (!kvm
->arch
.vpit
)
4112 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4115 case KVM_REINJECT_CONTROL
: {
4116 struct kvm_reinject_control control
;
4118 if (copy_from_user(&control
, argp
, sizeof(control
)))
4120 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4123 case KVM_SET_BOOT_CPU_ID
:
4125 mutex_lock(&kvm
->lock
);
4126 if (kvm
->created_vcpus
)
4129 kvm
->arch
.bsp_vcpu_id
= arg
;
4130 mutex_unlock(&kvm
->lock
);
4132 case KVM_XEN_HVM_CONFIG
: {
4134 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4135 sizeof(struct kvm_xen_hvm_config
)))
4138 if (kvm
->arch
.xen_hvm_config
.flags
)
4143 case KVM_SET_CLOCK
: {
4144 struct kvm_clock_data user_ns
;
4148 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4156 local_irq_disable();
4157 now_ns
= __get_kvmclock_ns(kvm
);
4158 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4160 kvm_gen_update_masterclock(kvm
);
4163 case KVM_GET_CLOCK
: {
4164 struct kvm_clock_data user_ns
;
4167 local_irq_disable();
4168 now_ns
= __get_kvmclock_ns(kvm
);
4169 user_ns
.clock
= now_ns
;
4170 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4172 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4175 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4180 case KVM_ENABLE_CAP
: {
4181 struct kvm_enable_cap cap
;
4184 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4186 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4190 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4196 static void kvm_init_msr_list(void)
4201 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4202 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4206 * Even MSRs that are valid in the host may not be exposed
4207 * to the guests in some cases.
4209 switch (msrs_to_save
[i
]) {
4210 case MSR_IA32_BNDCFGS
:
4211 if (!kvm_x86_ops
->mpx_supported())
4215 if (!kvm_x86_ops
->rdtscp_supported())
4223 msrs_to_save
[j
] = msrs_to_save
[i
];
4226 num_msrs_to_save
= j
;
4228 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4229 switch (emulated_msrs
[i
]) {
4230 case MSR_IA32_SMBASE
:
4231 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4239 emulated_msrs
[j
] = emulated_msrs
[i
];
4242 num_emulated_msrs
= j
;
4245 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4253 if (!(lapic_in_kernel(vcpu
) &&
4254 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4255 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4266 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4273 if (!(lapic_in_kernel(vcpu
) &&
4274 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4276 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4278 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4288 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4289 struct kvm_segment
*var
, int seg
)
4291 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4294 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4295 struct kvm_segment
*var
, int seg
)
4297 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4300 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4301 struct x86_exception
*exception
)
4305 BUG_ON(!mmu_is_nested(vcpu
));
4307 /* NPT walks are always user-walks */
4308 access
|= PFERR_USER_MASK
;
4309 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4314 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4315 struct x86_exception
*exception
)
4317 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4318 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4321 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4322 struct x86_exception
*exception
)
4324 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4325 access
|= PFERR_FETCH_MASK
;
4326 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4329 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4330 struct x86_exception
*exception
)
4332 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4333 access
|= PFERR_WRITE_MASK
;
4334 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4337 /* uses this to access any guest's mapped memory without checking CPL */
4338 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4339 struct x86_exception
*exception
)
4341 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4344 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4345 struct kvm_vcpu
*vcpu
, u32 access
,
4346 struct x86_exception
*exception
)
4349 int r
= X86EMUL_CONTINUE
;
4352 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4354 unsigned offset
= addr
& (PAGE_SIZE
-1);
4355 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4358 if (gpa
== UNMAPPED_GVA
)
4359 return X86EMUL_PROPAGATE_FAULT
;
4360 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4363 r
= X86EMUL_IO_NEEDED
;
4375 /* used for instruction fetching */
4376 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4377 gva_t addr
, void *val
, unsigned int bytes
,
4378 struct x86_exception
*exception
)
4380 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4381 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4385 /* Inline kvm_read_guest_virt_helper for speed. */
4386 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4388 if (unlikely(gpa
== UNMAPPED_GVA
))
4389 return X86EMUL_PROPAGATE_FAULT
;
4391 offset
= addr
& (PAGE_SIZE
-1);
4392 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4393 bytes
= (unsigned)PAGE_SIZE
- offset
;
4394 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4396 if (unlikely(ret
< 0))
4397 return X86EMUL_IO_NEEDED
;
4399 return X86EMUL_CONTINUE
;
4402 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4403 gva_t addr
, void *val
, unsigned int bytes
,
4404 struct x86_exception
*exception
)
4406 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4407 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4409 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4412 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4414 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4415 gva_t addr
, void *val
, unsigned int bytes
,
4416 struct x86_exception
*exception
)
4418 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4419 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4422 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4423 unsigned long addr
, void *val
, unsigned int bytes
)
4425 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4426 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4428 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4431 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4432 gva_t addr
, void *val
,
4434 struct x86_exception
*exception
)
4436 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4438 int r
= X86EMUL_CONTINUE
;
4441 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4444 unsigned offset
= addr
& (PAGE_SIZE
-1);
4445 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4448 if (gpa
== UNMAPPED_GVA
)
4449 return X86EMUL_PROPAGATE_FAULT
;
4450 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4452 r
= X86EMUL_IO_NEEDED
;
4463 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4465 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4466 gpa_t
*gpa
, struct x86_exception
*exception
,
4469 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4470 | (write
? PFERR_WRITE_MASK
: 0);
4473 * currently PKRU is only applied to ept enabled guest so
4474 * there is no pkey in EPT page table for L1 guest or EPT
4475 * shadow page table for L2 guest.
4477 if (vcpu_match_mmio_gva(vcpu
, gva
)
4478 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4479 vcpu
->arch
.access
, 0, access
)) {
4480 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4481 (gva
& (PAGE_SIZE
- 1));
4482 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4486 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4488 if (*gpa
== UNMAPPED_GVA
)
4491 /* For APIC access vmexit */
4492 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4495 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4496 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4503 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4504 const void *val
, int bytes
)
4508 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4511 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4515 struct read_write_emulator_ops
{
4516 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4518 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4519 void *val
, int bytes
);
4520 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4521 int bytes
, void *val
);
4522 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4523 void *val
, int bytes
);
4527 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4529 if (vcpu
->mmio_read_completed
) {
4530 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4531 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4532 vcpu
->mmio_read_completed
= 0;
4539 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4540 void *val
, int bytes
)
4542 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4545 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4546 void *val
, int bytes
)
4548 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4551 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4553 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4554 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4557 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4558 void *val
, int bytes
)
4560 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4561 return X86EMUL_IO_NEEDED
;
4564 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4565 void *val
, int bytes
)
4567 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4569 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4570 return X86EMUL_CONTINUE
;
4573 static const struct read_write_emulator_ops read_emultor
= {
4574 .read_write_prepare
= read_prepare
,
4575 .read_write_emulate
= read_emulate
,
4576 .read_write_mmio
= vcpu_mmio_read
,
4577 .read_write_exit_mmio
= read_exit_mmio
,
4580 static const struct read_write_emulator_ops write_emultor
= {
4581 .read_write_emulate
= write_emulate
,
4582 .read_write_mmio
= write_mmio
,
4583 .read_write_exit_mmio
= write_exit_mmio
,
4587 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4589 struct x86_exception
*exception
,
4590 struct kvm_vcpu
*vcpu
,
4591 const struct read_write_emulator_ops
*ops
)
4595 bool write
= ops
->write
;
4596 struct kvm_mmio_fragment
*frag
;
4598 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4601 return X86EMUL_PROPAGATE_FAULT
;
4603 /* For APIC access vmexit */
4607 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4608 return X86EMUL_CONTINUE
;
4612 * Is this MMIO handled locally?
4614 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4615 if (handled
== bytes
)
4616 return X86EMUL_CONTINUE
;
4622 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4623 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4627 return X86EMUL_CONTINUE
;
4630 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4632 void *val
, unsigned int bytes
,
4633 struct x86_exception
*exception
,
4634 const struct read_write_emulator_ops
*ops
)
4636 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4640 if (ops
->read_write_prepare
&&
4641 ops
->read_write_prepare(vcpu
, val
, bytes
))
4642 return X86EMUL_CONTINUE
;
4644 vcpu
->mmio_nr_fragments
= 0;
4646 /* Crossing a page boundary? */
4647 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4650 now
= -addr
& ~PAGE_MASK
;
4651 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4654 if (rc
!= X86EMUL_CONTINUE
)
4657 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4663 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4665 if (rc
!= X86EMUL_CONTINUE
)
4668 if (!vcpu
->mmio_nr_fragments
)
4671 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4673 vcpu
->mmio_needed
= 1;
4674 vcpu
->mmio_cur_fragment
= 0;
4676 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4677 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4678 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4679 vcpu
->run
->mmio
.phys_addr
= gpa
;
4681 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4684 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4688 struct x86_exception
*exception
)
4690 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4691 exception
, &read_emultor
);
4694 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4698 struct x86_exception
*exception
)
4700 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4701 exception
, &write_emultor
);
4704 #define CMPXCHG_TYPE(t, ptr, old, new) \
4705 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4707 #ifdef CONFIG_X86_64
4708 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4710 # define CMPXCHG64(ptr, old, new) \
4711 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4714 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4719 struct x86_exception
*exception
)
4721 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4727 /* guests cmpxchg8b have to be emulated atomically */
4728 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4731 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4733 if (gpa
== UNMAPPED_GVA
||
4734 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4737 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4740 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4741 if (is_error_page(page
))
4744 kaddr
= kmap_atomic(page
);
4745 kaddr
+= offset_in_page(gpa
);
4748 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4751 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4754 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4757 exchanged
= CMPXCHG64(kaddr
, old
, new);
4762 kunmap_atomic(kaddr
);
4763 kvm_release_page_dirty(page
);
4766 return X86EMUL_CMPXCHG_FAILED
;
4768 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4769 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4771 return X86EMUL_CONTINUE
;
4774 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4776 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4779 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4781 /* TODO: String I/O for in kernel device */
4784 if (vcpu
->arch
.pio
.in
)
4785 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4786 vcpu
->arch
.pio
.size
, pd
);
4788 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4789 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4794 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4795 unsigned short port
, void *val
,
4796 unsigned int count
, bool in
)
4798 vcpu
->arch
.pio
.port
= port
;
4799 vcpu
->arch
.pio
.in
= in
;
4800 vcpu
->arch
.pio
.count
= count
;
4801 vcpu
->arch
.pio
.size
= size
;
4803 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4804 vcpu
->arch
.pio
.count
= 0;
4808 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4809 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4810 vcpu
->run
->io
.size
= size
;
4811 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4812 vcpu
->run
->io
.count
= count
;
4813 vcpu
->run
->io
.port
= port
;
4818 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4819 int size
, unsigned short port
, void *val
,
4822 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4825 if (vcpu
->arch
.pio
.count
)
4828 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4831 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4832 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4833 vcpu
->arch
.pio
.count
= 0;
4840 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4841 int size
, unsigned short port
,
4842 const void *val
, unsigned int count
)
4844 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4846 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4847 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4848 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4851 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4853 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4856 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4858 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4861 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4863 if (!need_emulate_wbinvd(vcpu
))
4864 return X86EMUL_CONTINUE
;
4866 if (kvm_x86_ops
->has_wbinvd_exit()) {
4867 int cpu
= get_cpu();
4869 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4870 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4871 wbinvd_ipi
, NULL
, 1);
4873 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4876 return X86EMUL_CONTINUE
;
4879 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4881 kvm_emulate_wbinvd_noskip(vcpu
);
4882 return kvm_skip_emulated_instruction(vcpu
);
4884 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4888 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4890 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4893 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4894 unsigned long *dest
)
4896 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4899 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4900 unsigned long value
)
4903 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4906 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4908 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4911 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4913 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4914 unsigned long value
;
4918 value
= kvm_read_cr0(vcpu
);
4921 value
= vcpu
->arch
.cr2
;
4924 value
= kvm_read_cr3(vcpu
);
4927 value
= kvm_read_cr4(vcpu
);
4930 value
= kvm_get_cr8(vcpu
);
4933 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4940 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4942 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4947 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4950 vcpu
->arch
.cr2
= val
;
4953 res
= kvm_set_cr3(vcpu
, val
);
4956 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4959 res
= kvm_set_cr8(vcpu
, val
);
4962 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4969 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4971 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4974 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4976 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4979 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4981 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4984 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4986 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4989 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4991 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4994 static unsigned long emulator_get_cached_segment_base(
4995 struct x86_emulate_ctxt
*ctxt
, int seg
)
4997 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5000 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5001 struct desc_struct
*desc
, u32
*base3
,
5004 struct kvm_segment var
;
5006 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5007 *selector
= var
.selector
;
5010 memset(desc
, 0, sizeof(*desc
));
5016 set_desc_limit(desc
, var
.limit
);
5017 set_desc_base(desc
, (unsigned long)var
.base
);
5018 #ifdef CONFIG_X86_64
5020 *base3
= var
.base
>> 32;
5022 desc
->type
= var
.type
;
5024 desc
->dpl
= var
.dpl
;
5025 desc
->p
= var
.present
;
5026 desc
->avl
= var
.avl
;
5034 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5035 struct desc_struct
*desc
, u32 base3
,
5038 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5039 struct kvm_segment var
;
5041 var
.selector
= selector
;
5042 var
.base
= get_desc_base(desc
);
5043 #ifdef CONFIG_X86_64
5044 var
.base
|= ((u64
)base3
) << 32;
5046 var
.limit
= get_desc_limit(desc
);
5048 var
.limit
= (var
.limit
<< 12) | 0xfff;
5049 var
.type
= desc
->type
;
5050 var
.dpl
= desc
->dpl
;
5055 var
.avl
= desc
->avl
;
5056 var
.present
= desc
->p
;
5057 var
.unusable
= !var
.present
;
5060 kvm_set_segment(vcpu
, &var
, seg
);
5064 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5065 u32 msr_index
, u64
*pdata
)
5067 struct msr_data msr
;
5070 msr
.index
= msr_index
;
5071 msr
.host_initiated
= false;
5072 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5080 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5081 u32 msr_index
, u64 data
)
5083 struct msr_data msr
;
5086 msr
.index
= msr_index
;
5087 msr
.host_initiated
= false;
5088 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5091 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5093 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5095 return vcpu
->arch
.smbase
;
5098 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5100 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5102 vcpu
->arch
.smbase
= smbase
;
5105 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5108 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5111 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5112 u32 pmc
, u64
*pdata
)
5114 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5117 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5119 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5122 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5125 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5128 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5133 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5134 struct x86_instruction_info
*info
,
5135 enum x86_intercept_stage stage
)
5137 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5140 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5141 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5143 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5146 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5148 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5151 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5153 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5156 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5158 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5161 static const struct x86_emulate_ops emulate_ops
= {
5162 .read_gpr
= emulator_read_gpr
,
5163 .write_gpr
= emulator_write_gpr
,
5164 .read_std
= kvm_read_guest_virt_system
,
5165 .write_std
= kvm_write_guest_virt_system
,
5166 .read_phys
= kvm_read_guest_phys_system
,
5167 .fetch
= kvm_fetch_guest_virt
,
5168 .read_emulated
= emulator_read_emulated
,
5169 .write_emulated
= emulator_write_emulated
,
5170 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5171 .invlpg
= emulator_invlpg
,
5172 .pio_in_emulated
= emulator_pio_in_emulated
,
5173 .pio_out_emulated
= emulator_pio_out_emulated
,
5174 .get_segment
= emulator_get_segment
,
5175 .set_segment
= emulator_set_segment
,
5176 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5177 .get_gdt
= emulator_get_gdt
,
5178 .get_idt
= emulator_get_idt
,
5179 .set_gdt
= emulator_set_gdt
,
5180 .set_idt
= emulator_set_idt
,
5181 .get_cr
= emulator_get_cr
,
5182 .set_cr
= emulator_set_cr
,
5183 .cpl
= emulator_get_cpl
,
5184 .get_dr
= emulator_get_dr
,
5185 .set_dr
= emulator_set_dr
,
5186 .get_smbase
= emulator_get_smbase
,
5187 .set_smbase
= emulator_set_smbase
,
5188 .set_msr
= emulator_set_msr
,
5189 .get_msr
= emulator_get_msr
,
5190 .check_pmc
= emulator_check_pmc
,
5191 .read_pmc
= emulator_read_pmc
,
5192 .halt
= emulator_halt
,
5193 .wbinvd
= emulator_wbinvd
,
5194 .fix_hypercall
= emulator_fix_hypercall
,
5195 .get_fpu
= emulator_get_fpu
,
5196 .put_fpu
= emulator_put_fpu
,
5197 .intercept
= emulator_intercept
,
5198 .get_cpuid
= emulator_get_cpuid
,
5199 .set_nmi_mask
= emulator_set_nmi_mask
,
5202 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5204 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5206 * an sti; sti; sequence only disable interrupts for the first
5207 * instruction. So, if the last instruction, be it emulated or
5208 * not, left the system with the INT_STI flag enabled, it
5209 * means that the last instruction is an sti. We should not
5210 * leave the flag on in this case. The same goes for mov ss
5212 if (int_shadow
& mask
)
5214 if (unlikely(int_shadow
|| mask
)) {
5215 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5217 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5221 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5223 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5224 if (ctxt
->exception
.vector
== PF_VECTOR
)
5225 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5227 if (ctxt
->exception
.error_code_valid
)
5228 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5229 ctxt
->exception
.error_code
);
5231 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5235 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5237 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5240 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5242 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5243 ctxt
->eip
= kvm_rip_read(vcpu
);
5244 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5245 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5246 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5247 cs_db
? X86EMUL_MODE_PROT32
:
5248 X86EMUL_MODE_PROT16
;
5249 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5250 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5251 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5252 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
5254 init_decode_cache(ctxt
);
5255 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5258 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5260 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5263 init_emulate_ctxt(vcpu
);
5267 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5268 ret
= emulate_int_real(ctxt
, irq
);
5270 if (ret
!= X86EMUL_CONTINUE
)
5271 return EMULATE_FAIL
;
5273 ctxt
->eip
= ctxt
->_eip
;
5274 kvm_rip_write(vcpu
, ctxt
->eip
);
5275 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5277 if (irq
== NMI_VECTOR
)
5278 vcpu
->arch
.nmi_pending
= 0;
5280 vcpu
->arch
.interrupt
.pending
= false;
5282 return EMULATE_DONE
;
5284 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5286 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5288 int r
= EMULATE_DONE
;
5290 ++vcpu
->stat
.insn_emulation_fail
;
5291 trace_kvm_emulate_insn_failed(vcpu
);
5292 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5293 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5294 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5295 vcpu
->run
->internal
.ndata
= 0;
5298 kvm_queue_exception(vcpu
, UD_VECTOR
);
5303 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5304 bool write_fault_to_shadow_pgtable
,
5310 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5313 if (!vcpu
->arch
.mmu
.direct_map
) {
5315 * Write permission should be allowed since only
5316 * write access need to be emulated.
5318 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5321 * If the mapping is invalid in guest, let cpu retry
5322 * it to generate fault.
5324 if (gpa
== UNMAPPED_GVA
)
5329 * Do not retry the unhandleable instruction if it faults on the
5330 * readonly host memory, otherwise it will goto a infinite loop:
5331 * retry instruction -> write #PF -> emulation fail -> retry
5332 * instruction -> ...
5334 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5337 * If the instruction failed on the error pfn, it can not be fixed,
5338 * report the error to userspace.
5340 if (is_error_noslot_pfn(pfn
))
5343 kvm_release_pfn_clean(pfn
);
5345 /* The instructions are well-emulated on direct mmu. */
5346 if (vcpu
->arch
.mmu
.direct_map
) {
5347 unsigned int indirect_shadow_pages
;
5349 spin_lock(&vcpu
->kvm
->mmu_lock
);
5350 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5351 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5353 if (indirect_shadow_pages
)
5354 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5360 * if emulation was due to access to shadowed page table
5361 * and it failed try to unshadow page and re-enter the
5362 * guest to let CPU execute the instruction.
5364 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5367 * If the access faults on its page table, it can not
5368 * be fixed by unprotecting shadow page and it should
5369 * be reported to userspace.
5371 return !write_fault_to_shadow_pgtable
;
5374 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5375 unsigned long cr2
, int emulation_type
)
5377 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5378 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5380 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5381 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5384 * If the emulation is caused by #PF and it is non-page_table
5385 * writing instruction, it means the VM-EXIT is caused by shadow
5386 * page protected, we can zap the shadow page and retry this
5387 * instruction directly.
5389 * Note: if the guest uses a non-page-table modifying instruction
5390 * on the PDE that points to the instruction, then we will unmap
5391 * the instruction and go to an infinite loop. So, we cache the
5392 * last retried eip and the last fault address, if we meet the eip
5393 * and the address again, we can break out of the potential infinite
5396 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5398 if (!(emulation_type
& EMULTYPE_RETRY
))
5401 if (x86_page_table_writing_insn(ctxt
))
5404 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5407 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5408 vcpu
->arch
.last_retry_addr
= cr2
;
5410 if (!vcpu
->arch
.mmu
.direct_map
)
5411 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5413 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5418 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5419 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5421 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5423 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5424 /* This is a good place to trace that we are exiting SMM. */
5425 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5427 /* Process a latched INIT or SMI, if any. */
5428 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5431 kvm_mmu_reset_context(vcpu
);
5434 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5436 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5438 vcpu
->arch
.hflags
= emul_flags
;
5440 if (changed
& HF_SMM_MASK
)
5441 kvm_smm_changed(vcpu
);
5444 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5453 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5454 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5459 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5461 struct kvm_run
*kvm_run
= vcpu
->run
;
5464 * rflags is the old, "raw" value of the flags. The new value has
5465 * not been saved yet.
5467 * This is correct even for TF set by the guest, because "the
5468 * processor will not generate this exception after the instruction
5469 * that sets the TF flag".
5471 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5472 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5473 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5475 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5476 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5477 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5478 *r
= EMULATE_USER_EXIT
;
5481 * "Certain debug exceptions may clear bit 0-3. The
5482 * remaining contents of the DR6 register are never
5483 * cleared by the processor".
5485 vcpu
->arch
.dr6
&= ~15;
5486 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5487 kvm_queue_exception(vcpu
, DB_VECTOR
);
5492 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5494 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5495 int r
= EMULATE_DONE
;
5497 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5498 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5499 return r
== EMULATE_DONE
;
5501 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5503 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5505 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5506 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5507 struct kvm_run
*kvm_run
= vcpu
->run
;
5508 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5509 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5510 vcpu
->arch
.guest_debug_dr7
,
5514 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5515 kvm_run
->debug
.arch
.pc
= eip
;
5516 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5517 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5518 *r
= EMULATE_USER_EXIT
;
5523 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5524 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5525 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5526 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5531 vcpu
->arch
.dr6
&= ~15;
5532 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5533 kvm_queue_exception(vcpu
, DB_VECTOR
);
5542 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5549 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5550 bool writeback
= true;
5551 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5554 * Clear write_fault_to_shadow_pgtable here to ensure it is
5557 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5558 kvm_clear_exception_queue(vcpu
);
5560 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5561 init_emulate_ctxt(vcpu
);
5564 * We will reenter on the same instruction since
5565 * we do not set complete_userspace_io. This does not
5566 * handle watchpoints yet, those would be handled in
5569 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5572 ctxt
->interruptibility
= 0;
5573 ctxt
->have_exception
= false;
5574 ctxt
->exception
.vector
= -1;
5575 ctxt
->perm_ok
= false;
5577 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5579 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5581 trace_kvm_emulate_insn_start(vcpu
);
5582 ++vcpu
->stat
.insn_emulation
;
5583 if (r
!= EMULATION_OK
) {
5584 if (emulation_type
& EMULTYPE_TRAP_UD
)
5585 return EMULATE_FAIL
;
5586 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5588 return EMULATE_DONE
;
5589 if (emulation_type
& EMULTYPE_SKIP
)
5590 return EMULATE_FAIL
;
5591 return handle_emulation_failure(vcpu
);
5595 if (emulation_type
& EMULTYPE_SKIP
) {
5596 kvm_rip_write(vcpu
, ctxt
->_eip
);
5597 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5598 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5599 return EMULATE_DONE
;
5602 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5603 return EMULATE_DONE
;
5605 /* this is needed for vmware backdoor interface to work since it
5606 changes registers values during IO operation */
5607 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5608 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5609 emulator_invalidate_register_cache(ctxt
);
5613 r
= x86_emulate_insn(ctxt
);
5615 if (r
== EMULATION_INTERCEPTED
)
5616 return EMULATE_DONE
;
5618 if (r
== EMULATION_FAILED
) {
5619 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5621 return EMULATE_DONE
;
5623 return handle_emulation_failure(vcpu
);
5626 if (ctxt
->have_exception
) {
5628 if (inject_emulated_exception(vcpu
))
5630 } else if (vcpu
->arch
.pio
.count
) {
5631 if (!vcpu
->arch
.pio
.in
) {
5632 /* FIXME: return into emulator if single-stepping. */
5633 vcpu
->arch
.pio
.count
= 0;
5636 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5638 r
= EMULATE_USER_EXIT
;
5639 } else if (vcpu
->mmio_needed
) {
5640 if (!vcpu
->mmio_is_write
)
5642 r
= EMULATE_USER_EXIT
;
5643 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5644 } else if (r
== EMULATION_RESTART
)
5650 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5651 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5652 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5653 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5654 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5655 kvm_rip_write(vcpu
, ctxt
->eip
);
5656 if (r
== EMULATE_DONE
)
5657 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5658 if (!ctxt
->have_exception
||
5659 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5660 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5663 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5664 * do nothing, and it will be requested again as soon as
5665 * the shadow expires. But we still need to check here,
5666 * because POPF has no interrupt shadow.
5668 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5669 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5671 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5675 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5677 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5679 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5680 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5681 size
, port
, &val
, 1);
5682 /* do not return to emulator after return from userspace */
5683 vcpu
->arch
.pio
.count
= 0;
5686 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5688 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5692 /* We should only ever be called with arch.pio.count equal to 1 */
5693 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5695 /* For size less than 4 we merge, else we zero extend */
5696 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5700 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5701 * the copy and tracing
5703 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5704 vcpu
->arch
.pio
.port
, &val
, 1);
5705 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5710 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5715 /* For size less than 4 we merge, else we zero extend */
5716 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5718 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5721 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5725 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5729 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5731 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5733 __this_cpu_write(cpu_tsc_khz
, 0);
5737 static void tsc_khz_changed(void *data
)
5739 struct cpufreq_freqs
*freq
= data
;
5740 unsigned long khz
= 0;
5744 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5745 khz
= cpufreq_quick_get(raw_smp_processor_id());
5748 __this_cpu_write(cpu_tsc_khz
, khz
);
5751 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5754 struct cpufreq_freqs
*freq
= data
;
5756 struct kvm_vcpu
*vcpu
;
5757 int i
, send_ipi
= 0;
5760 * We allow guests to temporarily run on slowing clocks,
5761 * provided we notify them after, or to run on accelerating
5762 * clocks, provided we notify them before. Thus time never
5765 * However, we have a problem. We can't atomically update
5766 * the frequency of a given CPU from this function; it is
5767 * merely a notifier, which can be called from any CPU.
5768 * Changing the TSC frequency at arbitrary points in time
5769 * requires a recomputation of local variables related to
5770 * the TSC for each VCPU. We must flag these local variables
5771 * to be updated and be sure the update takes place with the
5772 * new frequency before any guests proceed.
5774 * Unfortunately, the combination of hotplug CPU and frequency
5775 * change creates an intractable locking scenario; the order
5776 * of when these callouts happen is undefined with respect to
5777 * CPU hotplug, and they can race with each other. As such,
5778 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5779 * undefined; you can actually have a CPU frequency change take
5780 * place in between the computation of X and the setting of the
5781 * variable. To protect against this problem, all updates of
5782 * the per_cpu tsc_khz variable are done in an interrupt
5783 * protected IPI, and all callers wishing to update the value
5784 * must wait for a synchronous IPI to complete (which is trivial
5785 * if the caller is on the CPU already). This establishes the
5786 * necessary total order on variable updates.
5788 * Note that because a guest time update may take place
5789 * anytime after the setting of the VCPU's request bit, the
5790 * correct TSC value must be set before the request. However,
5791 * to ensure the update actually makes it to any guest which
5792 * starts running in hardware virtualization between the set
5793 * and the acquisition of the spinlock, we must also ping the
5794 * CPU after setting the request bit.
5798 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5800 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5803 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5805 spin_lock(&kvm_lock
);
5806 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5807 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5808 if (vcpu
->cpu
!= freq
->cpu
)
5810 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5811 if (vcpu
->cpu
!= smp_processor_id())
5815 spin_unlock(&kvm_lock
);
5817 if (freq
->old
< freq
->new && send_ipi
) {
5819 * We upscale the frequency. Must make the guest
5820 * doesn't see old kvmclock values while running with
5821 * the new frequency, otherwise we risk the guest sees
5822 * time go backwards.
5824 * In case we update the frequency for another cpu
5825 * (which might be in guest context) send an interrupt
5826 * to kick the cpu out of guest context. Next time
5827 * guest context is entered kvmclock will be updated,
5828 * so the guest will not see stale values.
5830 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5835 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5836 .notifier_call
= kvmclock_cpufreq_notifier
5839 static int kvmclock_cpu_online(unsigned int cpu
)
5841 tsc_khz_changed(NULL
);
5845 static void kvm_timer_init(void)
5847 max_tsc_khz
= tsc_khz
;
5849 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5850 #ifdef CONFIG_CPU_FREQ
5851 struct cpufreq_policy policy
;
5854 memset(&policy
, 0, sizeof(policy
));
5856 cpufreq_get_policy(&policy
, cpu
);
5857 if (policy
.cpuinfo
.max_freq
)
5858 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5861 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5862 CPUFREQ_TRANSITION_NOTIFIER
);
5864 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5866 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
5867 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
5870 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5872 int kvm_is_in_guest(void)
5874 return __this_cpu_read(current_vcpu
) != NULL
;
5877 static int kvm_is_user_mode(void)
5881 if (__this_cpu_read(current_vcpu
))
5882 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5884 return user_mode
!= 0;
5887 static unsigned long kvm_get_guest_ip(void)
5889 unsigned long ip
= 0;
5891 if (__this_cpu_read(current_vcpu
))
5892 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5897 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5898 .is_in_guest
= kvm_is_in_guest
,
5899 .is_user_mode
= kvm_is_user_mode
,
5900 .get_guest_ip
= kvm_get_guest_ip
,
5903 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5905 __this_cpu_write(current_vcpu
, vcpu
);
5907 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5909 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5911 __this_cpu_write(current_vcpu
, NULL
);
5913 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5915 static void kvm_set_mmio_spte_mask(void)
5918 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5921 * Set the reserved bits and the present bit of an paging-structure
5922 * entry to generate page fault with PFER.RSV = 1.
5924 /* Mask the reserved physical address bits. */
5925 mask
= rsvd_bits(maxphyaddr
, 51);
5927 /* Bit 62 is always reserved for 32bit host. */
5928 mask
|= 0x3ull
<< 62;
5930 /* Set the present bit. */
5933 #ifdef CONFIG_X86_64
5935 * If reserved bit is not supported, clear the present bit to disable
5938 if (maxphyaddr
== 52)
5942 kvm_mmu_set_mmio_spte_mask(mask
);
5945 #ifdef CONFIG_X86_64
5946 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5950 struct kvm_vcpu
*vcpu
;
5953 spin_lock(&kvm_lock
);
5954 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5955 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5956 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5957 atomic_set(&kvm_guest_has_master_clock
, 0);
5958 spin_unlock(&kvm_lock
);
5961 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5964 * Notification about pvclock gtod data update.
5966 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5969 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5970 struct timekeeper
*tk
= priv
;
5972 update_pvclock_gtod(tk
);
5974 /* disable master clock if host does not trust, or does not
5975 * use, TSC clocksource
5977 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5978 atomic_read(&kvm_guest_has_master_clock
) != 0)
5979 queue_work(system_long_wq
, &pvclock_gtod_work
);
5984 static struct notifier_block pvclock_gtod_notifier
= {
5985 .notifier_call
= pvclock_gtod_notify
,
5989 int kvm_arch_init(void *opaque
)
5992 struct kvm_x86_ops
*ops
= opaque
;
5995 printk(KERN_ERR
"kvm: already loaded the other module\n");
6000 if (!ops
->cpu_has_kvm_support()) {
6001 printk(KERN_ERR
"kvm: no hardware support\n");
6005 if (ops
->disabled_by_bios()) {
6006 printk(KERN_ERR
"kvm: disabled by bios\n");
6012 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6014 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6018 r
= kvm_mmu_module_init();
6020 goto out_free_percpu
;
6022 kvm_set_mmio_spte_mask();
6026 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6027 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6028 PT_PRESENT_MASK
, 0);
6031 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6033 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6034 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6037 #ifdef CONFIG_X86_64
6038 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6044 free_percpu(shared_msrs
);
6049 void kvm_arch_exit(void)
6051 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6053 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6054 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6055 CPUFREQ_TRANSITION_NOTIFIER
);
6056 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6057 #ifdef CONFIG_X86_64
6058 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6061 kvm_mmu_module_exit();
6062 free_percpu(shared_msrs
);
6065 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6067 ++vcpu
->stat
.halt_exits
;
6068 if (lapic_in_kernel(vcpu
)) {
6069 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6072 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6076 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6078 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6080 int ret
= kvm_skip_emulated_instruction(vcpu
);
6082 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6083 * KVM_EXIT_DEBUG here.
6085 return kvm_vcpu_halt(vcpu
) && ret
;
6087 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6090 * kvm_pv_kick_cpu_op: Kick a vcpu.
6092 * @apicid - apicid of vcpu to be kicked.
6094 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6096 struct kvm_lapic_irq lapic_irq
;
6098 lapic_irq
.shorthand
= 0;
6099 lapic_irq
.dest_mode
= 0;
6100 lapic_irq
.dest_id
= apicid
;
6101 lapic_irq
.msi_redir_hint
= false;
6103 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6104 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6107 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6109 vcpu
->arch
.apicv_active
= false;
6110 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6113 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6115 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6118 r
= kvm_skip_emulated_instruction(vcpu
);
6120 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6121 return kvm_hv_hypercall(vcpu
);
6123 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6124 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6125 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6126 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6127 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6129 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6131 op_64_bit
= is_64_bit_mode(vcpu
);
6140 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6146 case KVM_HC_VAPIC_POLL_IRQ
:
6149 case KVM_HC_KICK_CPU
:
6150 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6160 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6161 ++vcpu
->stat
.hypercalls
;
6164 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6166 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6168 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6169 char instruction
[3];
6170 unsigned long rip
= kvm_rip_read(vcpu
);
6172 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6174 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
6177 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6179 return vcpu
->run
->request_interrupt_window
&&
6180 likely(!pic_in_kernel(vcpu
->kvm
));
6183 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6185 struct kvm_run
*kvm_run
= vcpu
->run
;
6187 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6188 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6189 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6190 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6191 kvm_run
->ready_for_interrupt_injection
=
6192 pic_in_kernel(vcpu
->kvm
) ||
6193 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6196 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6200 if (!kvm_x86_ops
->update_cr8_intercept
)
6203 if (!lapic_in_kernel(vcpu
))
6206 if (vcpu
->arch
.apicv_active
)
6209 if (!vcpu
->arch
.apic
->vapic_addr
)
6210 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6217 tpr
= kvm_lapic_get_cr8(vcpu
);
6219 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6222 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6226 /* try to reinject previous events if any */
6227 if (vcpu
->arch
.exception
.pending
) {
6228 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6229 vcpu
->arch
.exception
.has_error_code
,
6230 vcpu
->arch
.exception
.error_code
);
6232 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6233 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6236 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6237 (vcpu
->arch
.dr7
& DR7_GD
)) {
6238 vcpu
->arch
.dr7
&= ~DR7_GD
;
6239 kvm_update_dr7(vcpu
);
6242 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6243 vcpu
->arch
.exception
.has_error_code
,
6244 vcpu
->arch
.exception
.error_code
,
6245 vcpu
->arch
.exception
.reinject
);
6249 if (vcpu
->arch
.nmi_injected
) {
6250 kvm_x86_ops
->set_nmi(vcpu
);
6254 if (vcpu
->arch
.interrupt
.pending
) {
6255 kvm_x86_ops
->set_irq(vcpu
);
6259 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6260 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6265 /* try to inject new event if pending */
6266 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6267 vcpu
->arch
.smi_pending
= false;
6269 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6270 --vcpu
->arch
.nmi_pending
;
6271 vcpu
->arch
.nmi_injected
= true;
6272 kvm_x86_ops
->set_nmi(vcpu
);
6273 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6275 * Because interrupts can be injected asynchronously, we are
6276 * calling check_nested_events again here to avoid a race condition.
6277 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6278 * proposal and current concerns. Perhaps we should be setting
6279 * KVM_REQ_EVENT only on certain events and not unconditionally?
6281 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6282 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6286 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6287 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6289 kvm_x86_ops
->set_irq(vcpu
);
6296 static void process_nmi(struct kvm_vcpu
*vcpu
)
6301 * x86 is limited to one NMI running, and one NMI pending after it.
6302 * If an NMI is already in progress, limit further NMIs to just one.
6303 * Otherwise, allow two (and we'll inject the first one immediately).
6305 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6308 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6309 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6310 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6313 #define put_smstate(type, buf, offset, val) \
6314 *(type *)((buf) + (offset) - 0x7e00) = val
6316 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6319 flags
|= seg
->g
<< 23;
6320 flags
|= seg
->db
<< 22;
6321 flags
|= seg
->l
<< 21;
6322 flags
|= seg
->avl
<< 20;
6323 flags
|= seg
->present
<< 15;
6324 flags
|= seg
->dpl
<< 13;
6325 flags
|= seg
->s
<< 12;
6326 flags
|= seg
->type
<< 8;
6330 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6332 struct kvm_segment seg
;
6335 kvm_get_segment(vcpu
, &seg
, n
);
6336 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6339 offset
= 0x7f84 + n
* 12;
6341 offset
= 0x7f2c + (n
- 3) * 12;
6343 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6344 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6345 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6348 #ifdef CONFIG_X86_64
6349 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6351 struct kvm_segment seg
;
6355 kvm_get_segment(vcpu
, &seg
, n
);
6356 offset
= 0x7e00 + n
* 16;
6358 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6359 put_smstate(u16
, buf
, offset
, seg
.selector
);
6360 put_smstate(u16
, buf
, offset
+ 2, flags
);
6361 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6362 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6366 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6369 struct kvm_segment seg
;
6373 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6374 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6375 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6376 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6378 for (i
= 0; i
< 8; i
++)
6379 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6381 kvm_get_dr(vcpu
, 6, &val
);
6382 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6383 kvm_get_dr(vcpu
, 7, &val
);
6384 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6386 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6387 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6388 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6389 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6390 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6392 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6393 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6394 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6395 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6396 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6398 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6399 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6400 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6402 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6403 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6404 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6406 for (i
= 0; i
< 6; i
++)
6407 enter_smm_save_seg_32(vcpu
, buf
, i
);
6409 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6412 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6413 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6416 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6418 #ifdef CONFIG_X86_64
6420 struct kvm_segment seg
;
6424 for (i
= 0; i
< 16; i
++)
6425 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6427 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6428 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6430 kvm_get_dr(vcpu
, 6, &val
);
6431 put_smstate(u64
, buf
, 0x7f68, val
);
6432 kvm_get_dr(vcpu
, 7, &val
);
6433 put_smstate(u64
, buf
, 0x7f60, val
);
6435 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6436 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6437 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6439 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6442 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6444 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6446 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6447 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6448 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6449 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6450 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6452 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6453 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6454 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6456 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6457 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6458 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6459 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6460 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6462 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6463 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6464 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6466 for (i
= 0; i
< 6; i
++)
6467 enter_smm_save_seg_64(vcpu
, buf
, i
);
6473 static void enter_smm(struct kvm_vcpu
*vcpu
)
6475 struct kvm_segment cs
, ds
;
6480 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6481 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6482 memset(buf
, 0, 512);
6483 if (guest_cpuid_has_longmode(vcpu
))
6484 enter_smm_save_state_64(vcpu
, buf
);
6486 enter_smm_save_state_32(vcpu
, buf
);
6488 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6490 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6491 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6493 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6495 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6496 kvm_rip_write(vcpu
, 0x8000);
6498 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6499 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6500 vcpu
->arch
.cr0
= cr0
;
6502 kvm_x86_ops
->set_cr4(vcpu
, 0);
6504 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6505 dt
.address
= dt
.size
= 0;
6506 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6508 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6510 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6511 cs
.base
= vcpu
->arch
.smbase
;
6516 cs
.limit
= ds
.limit
= 0xffffffff;
6517 cs
.type
= ds
.type
= 0x3;
6518 cs
.dpl
= ds
.dpl
= 0;
6523 cs
.avl
= ds
.avl
= 0;
6524 cs
.present
= ds
.present
= 1;
6525 cs
.unusable
= ds
.unusable
= 0;
6526 cs
.padding
= ds
.padding
= 0;
6528 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6529 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6530 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6531 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6532 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6533 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6535 if (guest_cpuid_has_longmode(vcpu
))
6536 kvm_x86_ops
->set_efer(vcpu
, 0);
6538 kvm_update_cpuid(vcpu
);
6539 kvm_mmu_reset_context(vcpu
);
6542 static void process_smi(struct kvm_vcpu
*vcpu
)
6544 vcpu
->arch
.smi_pending
= true;
6545 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6548 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6550 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6553 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6555 u64 eoi_exit_bitmap
[4];
6557 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6560 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6562 if (irqchip_split(vcpu
->kvm
))
6563 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6565 if (vcpu
->arch
.apicv_active
)
6566 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6567 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6569 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6570 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6571 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6574 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6576 ++vcpu
->stat
.tlb_flush
;
6577 kvm_x86_ops
->tlb_flush(vcpu
);
6580 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6582 struct page
*page
= NULL
;
6584 if (!lapic_in_kernel(vcpu
))
6587 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6590 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6591 if (is_error_page(page
))
6593 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6596 * Do not pin apic access page in memory, the MMU notifier
6597 * will call us again if it is migrated or swapped out.
6601 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6603 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6604 unsigned long address
)
6607 * The physical address of apic access page is stored in the VMCS.
6608 * Update it when it becomes invalid.
6610 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6611 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6615 * Returns 1 to let vcpu_run() continue the guest execution loop without
6616 * exiting to the userspace. Otherwise, the value will be returned to the
6619 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6623 dm_request_for_irq_injection(vcpu
) &&
6624 kvm_cpu_accept_dm_intr(vcpu
);
6626 bool req_immediate_exit
= false;
6628 if (vcpu
->requests
) {
6629 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6630 kvm_mmu_unload(vcpu
);
6631 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6632 __kvm_migrate_timers(vcpu
);
6633 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6634 kvm_gen_update_masterclock(vcpu
->kvm
);
6635 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6636 kvm_gen_kvmclock_update(vcpu
);
6637 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6638 r
= kvm_guest_time_update(vcpu
);
6642 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6643 kvm_mmu_sync_roots(vcpu
);
6644 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6645 kvm_vcpu_flush_tlb(vcpu
);
6646 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6647 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6651 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6652 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6656 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6657 vcpu
->fpu_active
= 0;
6658 kvm_x86_ops
->fpu_deactivate(vcpu
);
6660 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6661 /* Page is swapped out. Do synthetic halt */
6662 vcpu
->arch
.apf
.halted
= true;
6666 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6667 record_steal_time(vcpu
);
6668 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6670 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6672 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6673 kvm_pmu_handle_event(vcpu
);
6674 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6675 kvm_pmu_deliver_pmi(vcpu
);
6676 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6677 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6678 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6679 vcpu
->arch
.ioapic_handled_vectors
)) {
6680 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6681 vcpu
->run
->eoi
.vector
=
6682 vcpu
->arch
.pending_ioapic_eoi
;
6687 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6688 vcpu_scan_ioapic(vcpu
);
6689 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6690 kvm_vcpu_reload_apic_access_page(vcpu
);
6691 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6692 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6693 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6697 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6698 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6699 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6703 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6704 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6705 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6711 * KVM_REQ_HV_STIMER has to be processed after
6712 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6713 * depend on the guest clock being up-to-date
6715 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6716 kvm_hv_process_stimers(vcpu
);
6720 * KVM_REQ_EVENT is not set when posted interrupts are set by
6721 * VT-d hardware, so we have to update RVI unconditionally.
6723 if (kvm_lapic_enabled(vcpu
)) {
6725 * Update architecture specific hints for APIC
6726 * virtual interrupt delivery.
6728 if (vcpu
->arch
.apicv_active
)
6729 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6730 kvm_lapic_find_highest_irr(vcpu
));
6733 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6734 kvm_apic_accept_events(vcpu
);
6735 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6740 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6741 req_immediate_exit
= true;
6743 /* Enable NMI/IRQ window open exits if needed.
6745 * SMIs have two cases: 1) they can be nested, and
6746 * then there is nothing to do here because RSM will
6747 * cause a vmexit anyway; 2) or the SMI can be pending
6748 * because inject_pending_event has completed the
6749 * injection of an IRQ or NMI from the previous vmexit,
6750 * and then we request an immediate exit to inject the SMI.
6752 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6753 req_immediate_exit
= true;
6754 if (vcpu
->arch
.nmi_pending
)
6755 kvm_x86_ops
->enable_nmi_window(vcpu
);
6756 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6757 kvm_x86_ops
->enable_irq_window(vcpu
);
6760 if (kvm_lapic_enabled(vcpu
)) {
6761 update_cr8_intercept(vcpu
);
6762 kvm_lapic_sync_to_vapic(vcpu
);
6766 r
= kvm_mmu_reload(vcpu
);
6768 goto cancel_injection
;
6773 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6774 if (vcpu
->fpu_active
)
6775 kvm_load_guest_fpu(vcpu
);
6776 vcpu
->mode
= IN_GUEST_MODE
;
6778 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6781 * We should set ->mode before check ->requests,
6782 * Please see the comment in kvm_make_all_cpus_request.
6783 * This also orders the write to mode from any reads
6784 * to the page tables done while the VCPU is running.
6785 * Please see the comment in kvm_flush_remote_tlbs.
6787 smp_mb__after_srcu_read_unlock();
6789 local_irq_disable();
6791 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6792 || need_resched() || signal_pending(current
)) {
6793 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6797 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6799 goto cancel_injection
;
6802 kvm_load_guest_xcr0(vcpu
);
6804 if (req_immediate_exit
) {
6805 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6806 smp_send_reschedule(vcpu
->cpu
);
6809 trace_kvm_entry(vcpu
->vcpu_id
);
6810 wait_lapic_expire(vcpu
);
6811 guest_enter_irqoff();
6813 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6815 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6816 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6817 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6818 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6819 set_debugreg(vcpu
->arch
.dr6
, 6);
6820 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6823 kvm_x86_ops
->run(vcpu
);
6826 * Do this here before restoring debug registers on the host. And
6827 * since we do this before handling the vmexit, a DR access vmexit
6828 * can (a) read the correct value of the debug registers, (b) set
6829 * KVM_DEBUGREG_WONT_EXIT again.
6831 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6832 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6833 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6834 kvm_update_dr0123(vcpu
);
6835 kvm_update_dr6(vcpu
);
6836 kvm_update_dr7(vcpu
);
6837 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6841 * If the guest has used debug registers, at least dr7
6842 * will be disabled while returning to the host.
6843 * If we don't have active breakpoints in the host, we don't
6844 * care about the messed up debug address registers. But if
6845 * we have some of them active, restore the old state.
6847 if (hw_breakpoint_active())
6848 hw_breakpoint_restore();
6850 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6852 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6855 kvm_put_guest_xcr0(vcpu
);
6857 kvm_x86_ops
->handle_external_intr(vcpu
);
6861 guest_exit_irqoff();
6866 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6869 * Profile KVM exit RIPs:
6871 if (unlikely(prof_on
== KVM_PROFILING
)) {
6872 unsigned long rip
= kvm_rip_read(vcpu
);
6873 profile_hit(KVM_PROFILING
, (void *)rip
);
6876 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6877 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6879 if (vcpu
->arch
.apic_attention
)
6880 kvm_lapic_sync_from_vapic(vcpu
);
6882 r
= kvm_x86_ops
->handle_exit(vcpu
);
6886 kvm_x86_ops
->cancel_injection(vcpu
);
6887 if (unlikely(vcpu
->arch
.apic_attention
))
6888 kvm_lapic_sync_from_vapic(vcpu
);
6893 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6895 if (!kvm_arch_vcpu_runnable(vcpu
) &&
6896 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
6897 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6898 kvm_vcpu_block(vcpu
);
6899 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6901 if (kvm_x86_ops
->post_block
)
6902 kvm_x86_ops
->post_block(vcpu
);
6904 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6908 kvm_apic_accept_events(vcpu
);
6909 switch(vcpu
->arch
.mp_state
) {
6910 case KVM_MP_STATE_HALTED
:
6911 vcpu
->arch
.pv
.pv_unhalted
= false;
6912 vcpu
->arch
.mp_state
=
6913 KVM_MP_STATE_RUNNABLE
;
6914 case KVM_MP_STATE_RUNNABLE
:
6915 vcpu
->arch
.apf
.halted
= false;
6917 case KVM_MP_STATE_INIT_RECEIVED
:
6926 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
6928 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6929 !vcpu
->arch
.apf
.halted
);
6932 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6935 struct kvm
*kvm
= vcpu
->kvm
;
6937 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6940 if (kvm_vcpu_running(vcpu
)) {
6941 r
= vcpu_enter_guest(vcpu
);
6943 r
= vcpu_block(kvm
, vcpu
);
6949 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6950 if (kvm_cpu_has_pending_timer(vcpu
))
6951 kvm_inject_pending_timer_irqs(vcpu
);
6953 if (dm_request_for_irq_injection(vcpu
) &&
6954 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
6956 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
6957 ++vcpu
->stat
.request_irq_exits
;
6961 kvm_check_async_pf_completion(vcpu
);
6963 if (signal_pending(current
)) {
6965 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6966 ++vcpu
->stat
.signal_exits
;
6969 if (need_resched()) {
6970 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6972 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6976 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6981 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6984 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6985 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6986 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6987 if (r
!= EMULATE_DONE
)
6992 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6994 BUG_ON(!vcpu
->arch
.pio
.count
);
6996 return complete_emulated_io(vcpu
);
7000 * Implements the following, as a state machine:
7004 * for each mmio piece in the fragment
7012 * for each mmio piece in the fragment
7017 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7019 struct kvm_run
*run
= vcpu
->run
;
7020 struct kvm_mmio_fragment
*frag
;
7023 BUG_ON(!vcpu
->mmio_needed
);
7025 /* Complete previous fragment */
7026 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7027 len
= min(8u, frag
->len
);
7028 if (!vcpu
->mmio_is_write
)
7029 memcpy(frag
->data
, run
->mmio
.data
, len
);
7031 if (frag
->len
<= 8) {
7032 /* Switch to the next fragment. */
7034 vcpu
->mmio_cur_fragment
++;
7036 /* Go forward to the next mmio piece. */
7042 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7043 vcpu
->mmio_needed
= 0;
7045 /* FIXME: return into emulator if single-stepping. */
7046 if (vcpu
->mmio_is_write
)
7048 vcpu
->mmio_read_completed
= 1;
7049 return complete_emulated_io(vcpu
);
7052 run
->exit_reason
= KVM_EXIT_MMIO
;
7053 run
->mmio
.phys_addr
= frag
->gpa
;
7054 if (vcpu
->mmio_is_write
)
7055 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7056 run
->mmio
.len
= min(8u, frag
->len
);
7057 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7058 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7063 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7065 struct fpu
*fpu
= ¤t
->thread
.fpu
;
7069 fpu__activate_curr(fpu
);
7071 if (vcpu
->sigset_active
)
7072 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
7074 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7075 kvm_vcpu_block(vcpu
);
7076 kvm_apic_accept_events(vcpu
);
7077 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
7082 /* re-sync apic's tpr */
7083 if (!lapic_in_kernel(vcpu
)) {
7084 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7090 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7091 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7092 vcpu
->arch
.complete_userspace_io
= NULL
;
7097 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7102 post_kvm_run_save(vcpu
);
7103 if (vcpu
->sigset_active
)
7104 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
7109 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7111 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7113 * We are here if userspace calls get_regs() in the middle of
7114 * instruction emulation. Registers state needs to be copied
7115 * back from emulation context to vcpu. Userspace shouldn't do
7116 * that usually, but some bad designed PV devices (vmware
7117 * backdoor interface) need this to work
7119 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7120 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7122 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7123 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7124 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7125 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7126 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7127 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7128 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7129 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7130 #ifdef CONFIG_X86_64
7131 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7132 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7133 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7134 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7135 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7136 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7137 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7138 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7141 regs
->rip
= kvm_rip_read(vcpu
);
7142 regs
->rflags
= kvm_get_rflags(vcpu
);
7147 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7149 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7150 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7152 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7153 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7154 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7155 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7156 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7157 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7158 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7159 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7160 #ifdef CONFIG_X86_64
7161 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7162 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7163 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7164 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7165 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7166 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7167 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7168 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7171 kvm_rip_write(vcpu
, regs
->rip
);
7172 kvm_set_rflags(vcpu
, regs
->rflags
);
7174 vcpu
->arch
.exception
.pending
= false;
7176 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7181 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7183 struct kvm_segment cs
;
7185 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7189 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7191 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7192 struct kvm_sregs
*sregs
)
7196 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7197 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7198 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7199 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7200 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7201 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7203 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7204 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7206 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7207 sregs
->idt
.limit
= dt
.size
;
7208 sregs
->idt
.base
= dt
.address
;
7209 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7210 sregs
->gdt
.limit
= dt
.size
;
7211 sregs
->gdt
.base
= dt
.address
;
7213 sregs
->cr0
= kvm_read_cr0(vcpu
);
7214 sregs
->cr2
= vcpu
->arch
.cr2
;
7215 sregs
->cr3
= kvm_read_cr3(vcpu
);
7216 sregs
->cr4
= kvm_read_cr4(vcpu
);
7217 sregs
->cr8
= kvm_get_cr8(vcpu
);
7218 sregs
->efer
= vcpu
->arch
.efer
;
7219 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7221 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7223 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7224 set_bit(vcpu
->arch
.interrupt
.nr
,
7225 (unsigned long *)sregs
->interrupt_bitmap
);
7230 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7231 struct kvm_mp_state
*mp_state
)
7233 kvm_apic_accept_events(vcpu
);
7234 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7235 vcpu
->arch
.pv
.pv_unhalted
)
7236 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7238 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7243 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7244 struct kvm_mp_state
*mp_state
)
7246 if (!lapic_in_kernel(vcpu
) &&
7247 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7250 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7251 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7252 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7254 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7255 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7259 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7260 int reason
, bool has_error_code
, u32 error_code
)
7262 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7265 init_emulate_ctxt(vcpu
);
7267 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7268 has_error_code
, error_code
);
7271 return EMULATE_FAIL
;
7273 kvm_rip_write(vcpu
, ctxt
->eip
);
7274 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7275 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7276 return EMULATE_DONE
;
7278 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7280 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7281 struct kvm_sregs
*sregs
)
7283 struct msr_data apic_base_msr
;
7284 int mmu_reset_needed
= 0;
7285 int pending_vec
, max_bits
, idx
;
7288 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7291 dt
.size
= sregs
->idt
.limit
;
7292 dt
.address
= sregs
->idt
.base
;
7293 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7294 dt
.size
= sregs
->gdt
.limit
;
7295 dt
.address
= sregs
->gdt
.base
;
7296 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7298 vcpu
->arch
.cr2
= sregs
->cr2
;
7299 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7300 vcpu
->arch
.cr3
= sregs
->cr3
;
7301 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7303 kvm_set_cr8(vcpu
, sregs
->cr8
);
7305 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7306 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7307 apic_base_msr
.data
= sregs
->apic_base
;
7308 apic_base_msr
.host_initiated
= true;
7309 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7311 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7312 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7313 vcpu
->arch
.cr0
= sregs
->cr0
;
7315 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7316 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7317 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7318 kvm_update_cpuid(vcpu
);
7320 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7321 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7322 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7323 mmu_reset_needed
= 1;
7325 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7327 if (mmu_reset_needed
)
7328 kvm_mmu_reset_context(vcpu
);
7330 max_bits
= KVM_NR_INTERRUPTS
;
7331 pending_vec
= find_first_bit(
7332 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7333 if (pending_vec
< max_bits
) {
7334 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7335 pr_debug("Set back pending irq %d\n", pending_vec
);
7338 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7339 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7340 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7341 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7342 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7343 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7345 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7346 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7348 update_cr8_intercept(vcpu
);
7350 /* Older userspace won't unhalt the vcpu on reset. */
7351 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7352 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7354 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7356 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7361 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7362 struct kvm_guest_debug
*dbg
)
7364 unsigned long rflags
;
7367 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7369 if (vcpu
->arch
.exception
.pending
)
7371 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7372 kvm_queue_exception(vcpu
, DB_VECTOR
);
7374 kvm_queue_exception(vcpu
, BP_VECTOR
);
7378 * Read rflags as long as potentially injected trace flags are still
7381 rflags
= kvm_get_rflags(vcpu
);
7383 vcpu
->guest_debug
= dbg
->control
;
7384 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7385 vcpu
->guest_debug
= 0;
7387 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7388 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7389 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7390 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7392 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7393 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7395 kvm_update_dr7(vcpu
);
7397 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7398 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7399 get_segment_base(vcpu
, VCPU_SREG_CS
);
7402 * Trigger an rflags update that will inject or remove the trace
7405 kvm_set_rflags(vcpu
, rflags
);
7407 kvm_x86_ops
->update_bp_intercept(vcpu
);
7417 * Translate a guest virtual address to a guest physical address.
7419 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7420 struct kvm_translation
*tr
)
7422 unsigned long vaddr
= tr
->linear_address
;
7426 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7427 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7428 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7429 tr
->physical_address
= gpa
;
7430 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7437 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7439 struct fxregs_state
*fxsave
=
7440 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7442 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7443 fpu
->fcw
= fxsave
->cwd
;
7444 fpu
->fsw
= fxsave
->swd
;
7445 fpu
->ftwx
= fxsave
->twd
;
7446 fpu
->last_opcode
= fxsave
->fop
;
7447 fpu
->last_ip
= fxsave
->rip
;
7448 fpu
->last_dp
= fxsave
->rdp
;
7449 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7454 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7456 struct fxregs_state
*fxsave
=
7457 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7459 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7460 fxsave
->cwd
= fpu
->fcw
;
7461 fxsave
->swd
= fpu
->fsw
;
7462 fxsave
->twd
= fpu
->ftwx
;
7463 fxsave
->fop
= fpu
->last_opcode
;
7464 fxsave
->rip
= fpu
->last_ip
;
7465 fxsave
->rdp
= fpu
->last_dp
;
7466 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7471 static void fx_init(struct kvm_vcpu
*vcpu
)
7473 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7474 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7475 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7476 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7479 * Ensure guest xcr0 is valid for loading
7481 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7483 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7486 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7488 if (vcpu
->guest_fpu_loaded
)
7492 * Restore all possible states in the guest,
7493 * and assume host would use all available bits.
7494 * Guest xcr0 would be loaded later.
7496 vcpu
->guest_fpu_loaded
= 1;
7497 __kernel_fpu_begin();
7498 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7502 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7504 if (!vcpu
->guest_fpu_loaded
)
7507 vcpu
->guest_fpu_loaded
= 0;
7508 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7510 ++vcpu
->stat
.fpu_reload
;
7514 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7516 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7518 kvmclock_reset(vcpu
);
7520 kvm_x86_ops
->vcpu_free(vcpu
);
7521 free_cpumask_var(wbinvd_dirty_mask
);
7524 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7527 struct kvm_vcpu
*vcpu
;
7529 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7530 printk_once(KERN_WARNING
7531 "kvm: SMP vm created on host with unstable TSC; "
7532 "guest TSC will not be reliable\n");
7534 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7539 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7543 kvm_vcpu_mtrr_init(vcpu
);
7544 r
= vcpu_load(vcpu
);
7547 kvm_vcpu_reset(vcpu
, false);
7548 kvm_mmu_setup(vcpu
);
7553 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7555 struct msr_data msr
;
7556 struct kvm
*kvm
= vcpu
->kvm
;
7558 if (vcpu_load(vcpu
))
7561 msr
.index
= MSR_IA32_TSC
;
7562 msr
.host_initiated
= true;
7563 kvm_write_tsc(vcpu
, &msr
);
7566 if (!kvmclock_periodic_sync
)
7569 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7570 KVMCLOCK_SYNC_PERIOD
);
7573 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7576 vcpu
->arch
.apf
.msr_val
= 0;
7578 r
= vcpu_load(vcpu
);
7580 kvm_mmu_unload(vcpu
);
7583 kvm_x86_ops
->vcpu_free(vcpu
);
7586 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7588 vcpu
->arch
.hflags
= 0;
7590 vcpu
->arch
.smi_pending
= 0;
7591 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7592 vcpu
->arch
.nmi_pending
= 0;
7593 vcpu
->arch
.nmi_injected
= false;
7594 kvm_clear_interrupt_queue(vcpu
);
7595 kvm_clear_exception_queue(vcpu
);
7597 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7598 kvm_update_dr0123(vcpu
);
7599 vcpu
->arch
.dr6
= DR6_INIT
;
7600 kvm_update_dr6(vcpu
);
7601 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7602 kvm_update_dr7(vcpu
);
7606 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7607 vcpu
->arch
.apf
.msr_val
= 0;
7608 vcpu
->arch
.st
.msr_val
= 0;
7610 kvmclock_reset(vcpu
);
7612 kvm_clear_async_pf_completion_queue(vcpu
);
7613 kvm_async_pf_hash_reset(vcpu
);
7614 vcpu
->arch
.apf
.halted
= false;
7617 kvm_pmu_reset(vcpu
);
7618 vcpu
->arch
.smbase
= 0x30000;
7621 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7622 vcpu
->arch
.regs_avail
= ~0;
7623 vcpu
->arch
.regs_dirty
= ~0;
7625 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7628 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7630 struct kvm_segment cs
;
7632 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7633 cs
.selector
= vector
<< 8;
7634 cs
.base
= vector
<< 12;
7635 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7636 kvm_rip_write(vcpu
, 0);
7639 int kvm_arch_hardware_enable(void)
7642 struct kvm_vcpu
*vcpu
;
7647 bool stable
, backwards_tsc
= false;
7649 kvm_shared_msr_cpu_online();
7650 ret
= kvm_x86_ops
->hardware_enable();
7654 local_tsc
= rdtsc();
7655 stable
= !check_tsc_unstable();
7656 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7657 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7658 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7659 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7660 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7661 backwards_tsc
= true;
7662 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7663 max_tsc
= vcpu
->arch
.last_host_tsc
;
7669 * Sometimes, even reliable TSCs go backwards. This happens on
7670 * platforms that reset TSC during suspend or hibernate actions, but
7671 * maintain synchronization. We must compensate. Fortunately, we can
7672 * detect that condition here, which happens early in CPU bringup,
7673 * before any KVM threads can be running. Unfortunately, we can't
7674 * bring the TSCs fully up to date with real time, as we aren't yet far
7675 * enough into CPU bringup that we know how much real time has actually
7676 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7677 * variables that haven't been updated yet.
7679 * So we simply find the maximum observed TSC above, then record the
7680 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7681 * the adjustment will be applied. Note that we accumulate
7682 * adjustments, in case multiple suspend cycles happen before some VCPU
7683 * gets a chance to run again. In the event that no KVM threads get a
7684 * chance to run, we will miss the entire elapsed period, as we'll have
7685 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7686 * loose cycle time. This isn't too big a deal, since the loss will be
7687 * uniform across all VCPUs (not to mention the scenario is extremely
7688 * unlikely). It is possible that a second hibernate recovery happens
7689 * much faster than a first, causing the observed TSC here to be
7690 * smaller; this would require additional padding adjustment, which is
7691 * why we set last_host_tsc to the local tsc observed here.
7693 * N.B. - this code below runs only on platforms with reliable TSC,
7694 * as that is the only way backwards_tsc is set above. Also note
7695 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7696 * have the same delta_cyc adjustment applied if backwards_tsc
7697 * is detected. Note further, this adjustment is only done once,
7698 * as we reset last_host_tsc on all VCPUs to stop this from being
7699 * called multiple times (one for each physical CPU bringup).
7701 * Platforms with unreliable TSCs don't have to deal with this, they
7702 * will be compensated by the logic in vcpu_load, which sets the TSC to
7703 * catchup mode. This will catchup all VCPUs to real time, but cannot
7704 * guarantee that they stay in perfect synchronization.
7706 if (backwards_tsc
) {
7707 u64 delta_cyc
= max_tsc
- local_tsc
;
7708 backwards_tsc_observed
= true;
7709 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7710 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7711 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7712 vcpu
->arch
.last_host_tsc
= local_tsc
;
7713 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7717 * We have to disable TSC offset matching.. if you were
7718 * booting a VM while issuing an S4 host suspend....
7719 * you may have some problem. Solving this issue is
7720 * left as an exercise to the reader.
7722 kvm
->arch
.last_tsc_nsec
= 0;
7723 kvm
->arch
.last_tsc_write
= 0;
7730 void kvm_arch_hardware_disable(void)
7732 kvm_x86_ops
->hardware_disable();
7733 drop_user_return_notifiers();
7736 int kvm_arch_hardware_setup(void)
7740 r
= kvm_x86_ops
->hardware_setup();
7744 if (kvm_has_tsc_control
) {
7746 * Make sure the user can only configure tsc_khz values that
7747 * fit into a signed integer.
7748 * A min value is not calculated needed because it will always
7749 * be 1 on all machines.
7751 u64 max
= min(0x7fffffffULL
,
7752 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7753 kvm_max_guest_tsc_khz
= max
;
7755 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7758 kvm_init_msr_list();
7762 void kvm_arch_hardware_unsetup(void)
7764 kvm_x86_ops
->hardware_unsetup();
7767 void kvm_arch_check_processor_compat(void *rtn
)
7769 kvm_x86_ops
->check_processor_compatibility(rtn
);
7772 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7774 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7776 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7778 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7780 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7783 struct static_key kvm_no_apic_vcpu __read_mostly
;
7784 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7786 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7792 BUG_ON(vcpu
->kvm
== NULL
);
7795 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7796 vcpu
->arch
.pv
.pv_unhalted
= false;
7797 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7798 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7799 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7801 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7803 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7808 vcpu
->arch
.pio_data
= page_address(page
);
7810 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7812 r
= kvm_mmu_create(vcpu
);
7814 goto fail_free_pio_data
;
7816 if (irqchip_in_kernel(kvm
)) {
7817 r
= kvm_create_lapic(vcpu
);
7819 goto fail_mmu_destroy
;
7821 static_key_slow_inc(&kvm_no_apic_vcpu
);
7823 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7825 if (!vcpu
->arch
.mce_banks
) {
7827 goto fail_free_lapic
;
7829 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7831 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7833 goto fail_free_mce_banks
;
7838 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7839 vcpu
->arch
.pv_time_enabled
= false;
7841 vcpu
->arch
.guest_supported_xcr0
= 0;
7842 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7844 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7846 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7848 kvm_async_pf_hash_reset(vcpu
);
7851 vcpu
->arch
.pending_external_vector
= -1;
7853 kvm_hv_vcpu_init(vcpu
);
7857 fail_free_mce_banks
:
7858 kfree(vcpu
->arch
.mce_banks
);
7860 kvm_free_lapic(vcpu
);
7862 kvm_mmu_destroy(vcpu
);
7864 free_page((unsigned long)vcpu
->arch
.pio_data
);
7869 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7873 kvm_hv_vcpu_uninit(vcpu
);
7874 kvm_pmu_destroy(vcpu
);
7875 kfree(vcpu
->arch
.mce_banks
);
7876 kvm_free_lapic(vcpu
);
7877 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7878 kvm_mmu_destroy(vcpu
);
7879 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7880 free_page((unsigned long)vcpu
->arch
.pio_data
);
7881 if (!lapic_in_kernel(vcpu
))
7882 static_key_slow_dec(&kvm_no_apic_vcpu
);
7885 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7887 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7890 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7895 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7896 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7897 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7898 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7899 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7901 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7902 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7903 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7904 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7905 &kvm
->arch
.irq_sources_bitmap
);
7907 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7908 mutex_init(&kvm
->arch
.apic_map_lock
);
7909 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
7910 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7912 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
7913 pvclock_update_vm_gtod_copy(kvm
);
7915 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7916 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7918 kvm_page_track_init(kvm
);
7919 kvm_mmu_init_vm(kvm
);
7921 if (kvm_x86_ops
->vm_init
)
7922 return kvm_x86_ops
->vm_init(kvm
);
7927 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7930 r
= vcpu_load(vcpu
);
7932 kvm_mmu_unload(vcpu
);
7936 static void kvm_free_vcpus(struct kvm
*kvm
)
7939 struct kvm_vcpu
*vcpu
;
7942 * Unpin any mmu pages first.
7944 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7945 kvm_clear_async_pf_completion_queue(vcpu
);
7946 kvm_unload_vcpu_mmu(vcpu
);
7948 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7949 kvm_arch_vcpu_free(vcpu
);
7951 mutex_lock(&kvm
->lock
);
7952 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7953 kvm
->vcpus
[i
] = NULL
;
7955 atomic_set(&kvm
->online_vcpus
, 0);
7956 mutex_unlock(&kvm
->lock
);
7959 void kvm_arch_sync_events(struct kvm
*kvm
)
7961 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7962 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7963 kvm_free_all_assigned_devices(kvm
);
7967 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7971 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
7972 struct kvm_memory_slot
*slot
, old
;
7974 /* Called with kvm->slots_lock held. */
7975 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
7978 slot
= id_to_memslot(slots
, id
);
7984 * MAP_SHARED to prevent internal slot pages from being moved
7987 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
7988 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7989 if (IS_ERR((void *)hva
))
7990 return PTR_ERR((void *)hva
);
7999 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8000 struct kvm_userspace_memory_region m
;
8002 m
.slot
= id
| (i
<< 16);
8004 m
.guest_phys_addr
= gpa
;
8005 m
.userspace_addr
= hva
;
8006 m
.memory_size
= size
;
8007 r
= __kvm_set_memory_region(kvm
, &m
);
8013 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8019 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8021 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8025 mutex_lock(&kvm
->slots_lock
);
8026 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8027 mutex_unlock(&kvm
->slots_lock
);
8031 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8033 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8035 if (current
->mm
== kvm
->mm
) {
8037 * Free memory regions allocated on behalf of userspace,
8038 * unless the the memory map has changed due to process exit
8041 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8042 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8043 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8045 if (kvm_x86_ops
->vm_destroy
)
8046 kvm_x86_ops
->vm_destroy(kvm
);
8047 kvm_iommu_unmap_guest(kvm
);
8048 kfree(kvm
->arch
.vpic
);
8049 kfree(kvm
->arch
.vioapic
);
8050 kvm_free_vcpus(kvm
);
8051 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8052 kvm_mmu_uninit_vm(kvm
);
8055 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8056 struct kvm_memory_slot
*dont
)
8060 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8061 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8062 kvfree(free
->arch
.rmap
[i
]);
8063 free
->arch
.rmap
[i
] = NULL
;
8068 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8069 dont
->arch
.lpage_info
[i
- 1]) {
8070 kvfree(free
->arch
.lpage_info
[i
- 1]);
8071 free
->arch
.lpage_info
[i
- 1] = NULL
;
8075 kvm_page_track_free_memslot(free
, dont
);
8078 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8079 unsigned long npages
)
8083 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8084 struct kvm_lpage_info
*linfo
;
8089 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8090 slot
->base_gfn
, level
) + 1;
8092 slot
->arch
.rmap
[i
] =
8093 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
8094 if (!slot
->arch
.rmap
[i
])
8099 linfo
= kvm_kvzalloc(lpages
* sizeof(*linfo
));
8103 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8105 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8106 linfo
[0].disallow_lpage
= 1;
8107 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8108 linfo
[lpages
- 1].disallow_lpage
= 1;
8109 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8111 * If the gfn and userspace address are not aligned wrt each
8112 * other, or if explicitly asked to, disable large page
8113 * support for this slot
8115 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8116 !kvm_largepages_enabled()) {
8119 for (j
= 0; j
< lpages
; ++j
)
8120 linfo
[j
].disallow_lpage
= 1;
8124 if (kvm_page_track_create_memslot(slot
, npages
))
8130 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8131 kvfree(slot
->arch
.rmap
[i
]);
8132 slot
->arch
.rmap
[i
] = NULL
;
8136 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8137 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8142 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8145 * memslots->generation has been incremented.
8146 * mmio generation may have reached its maximum value.
8148 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8151 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8152 struct kvm_memory_slot
*memslot
,
8153 const struct kvm_userspace_memory_region
*mem
,
8154 enum kvm_mr_change change
)
8159 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8160 struct kvm_memory_slot
*new)
8162 /* Still write protect RO slot */
8163 if (new->flags
& KVM_MEM_READONLY
) {
8164 kvm_mmu_slot_remove_write_access(kvm
, new);
8169 * Call kvm_x86_ops dirty logging hooks when they are valid.
8171 * kvm_x86_ops->slot_disable_log_dirty is called when:
8173 * - KVM_MR_CREATE with dirty logging is disabled
8174 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8176 * The reason is, in case of PML, we need to set D-bit for any slots
8177 * with dirty logging disabled in order to eliminate unnecessary GPA
8178 * logging in PML buffer (and potential PML buffer full VMEXT). This
8179 * guarantees leaving PML enabled during guest's lifetime won't have
8180 * any additonal overhead from PML when guest is running with dirty
8181 * logging disabled for memory slots.
8183 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8184 * to dirty logging mode.
8186 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8188 * In case of write protect:
8190 * Write protect all pages for dirty logging.
8192 * All the sptes including the large sptes which point to this
8193 * slot are set to readonly. We can not create any new large
8194 * spte on this slot until the end of the logging.
8196 * See the comments in fast_page_fault().
8198 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8199 if (kvm_x86_ops
->slot_enable_log_dirty
)
8200 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8202 kvm_mmu_slot_remove_write_access(kvm
, new);
8204 if (kvm_x86_ops
->slot_disable_log_dirty
)
8205 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8209 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8210 const struct kvm_userspace_memory_region
*mem
,
8211 const struct kvm_memory_slot
*old
,
8212 const struct kvm_memory_slot
*new,
8213 enum kvm_mr_change change
)
8215 int nr_mmu_pages
= 0;
8217 if (!kvm
->arch
.n_requested_mmu_pages
)
8218 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8221 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8224 * Dirty logging tracks sptes in 4k granularity, meaning that large
8225 * sptes have to be split. If live migration is successful, the guest
8226 * in the source machine will be destroyed and large sptes will be
8227 * created in the destination. However, if the guest continues to run
8228 * in the source machine (for example if live migration fails), small
8229 * sptes will remain around and cause bad performance.
8231 * Scan sptes if dirty logging has been stopped, dropping those
8232 * which can be collapsed into a single large-page spte. Later
8233 * page faults will create the large-page sptes.
8235 if ((change
!= KVM_MR_DELETE
) &&
8236 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8237 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8238 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8241 * Set up write protection and/or dirty logging for the new slot.
8243 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8244 * been zapped so no dirty logging staff is needed for old slot. For
8245 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8246 * new and it's also covered when dealing with the new slot.
8248 * FIXME: const-ify all uses of struct kvm_memory_slot.
8250 if (change
!= KVM_MR_DELETE
)
8251 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8254 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8256 kvm_mmu_invalidate_zap_all_pages(kvm
);
8259 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8260 struct kvm_memory_slot
*slot
)
8262 kvm_page_track_flush_slot(kvm
, slot
);
8265 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8267 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8270 if (kvm_apic_has_events(vcpu
))
8273 if (vcpu
->arch
.pv
.pv_unhalted
)
8276 if (atomic_read(&vcpu
->arch
.nmi_queued
))
8279 if (test_bit(KVM_REQ_SMI
, &vcpu
->requests
))
8282 if (kvm_arch_interrupt_allowed(vcpu
) &&
8283 kvm_cpu_has_interrupt(vcpu
))
8286 if (kvm_hv_has_stimer_pending(vcpu
))
8292 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8294 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
8295 kvm_x86_ops
->check_nested_events(vcpu
, false);
8297 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8300 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8302 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8305 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8307 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8310 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8312 if (is_64_bit_mode(vcpu
))
8313 return kvm_rip_read(vcpu
);
8314 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8315 kvm_rip_read(vcpu
));
8317 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8319 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8321 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8323 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8325 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8327 unsigned long rflags
;
8329 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8330 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8331 rflags
&= ~X86_EFLAGS_TF
;
8334 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8336 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8338 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8339 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8340 rflags
|= X86_EFLAGS_TF
;
8341 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8344 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8346 __kvm_set_rflags(vcpu
, rflags
);
8347 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8349 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8351 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8355 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8359 r
= kvm_mmu_reload(vcpu
);
8363 if (!vcpu
->arch
.mmu
.direct_map
&&
8364 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8367 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8370 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8372 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8375 static inline u32
kvm_async_pf_next_probe(u32 key
)
8377 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8380 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8382 u32 key
= kvm_async_pf_hash_fn(gfn
);
8384 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8385 key
= kvm_async_pf_next_probe(key
);
8387 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8390 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8393 u32 key
= kvm_async_pf_hash_fn(gfn
);
8395 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8396 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8397 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8398 key
= kvm_async_pf_next_probe(key
);
8403 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8405 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8408 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8412 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8414 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8416 j
= kvm_async_pf_next_probe(j
);
8417 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8419 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8421 * k lies cyclically in ]i,j]
8423 * |....j i.k.| or |.k..j i...|
8425 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8426 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8431 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8434 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8438 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8439 struct kvm_async_pf
*work
)
8441 struct x86_exception fault
;
8443 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8444 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8446 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8447 (vcpu
->arch
.apf
.send_user_only
&&
8448 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8449 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8450 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8451 fault
.vector
= PF_VECTOR
;
8452 fault
.error_code_valid
= true;
8453 fault
.error_code
= 0;
8454 fault
.nested_page_fault
= false;
8455 fault
.address
= work
->arch
.token
;
8456 kvm_inject_page_fault(vcpu
, &fault
);
8460 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8461 struct kvm_async_pf
*work
)
8463 struct x86_exception fault
;
8465 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8466 if (work
->wakeup_all
)
8467 work
->arch
.token
= ~0; /* broadcast wakeup */
8469 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8471 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8472 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8473 fault
.vector
= PF_VECTOR
;
8474 fault
.error_code_valid
= true;
8475 fault
.error_code
= 0;
8476 fault
.nested_page_fault
= false;
8477 fault
.address
= work
->arch
.token
;
8478 kvm_inject_page_fault(vcpu
, &fault
);
8480 vcpu
->arch
.apf
.halted
= false;
8481 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8484 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8486 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8489 return !kvm_event_needs_reinjection(vcpu
) &&
8490 kvm_x86_ops
->interrupt_allowed(vcpu
);
8493 void kvm_arch_start_assignment(struct kvm
*kvm
)
8495 atomic_inc(&kvm
->arch
.assigned_device_count
);
8497 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8499 void kvm_arch_end_assignment(struct kvm
*kvm
)
8501 atomic_dec(&kvm
->arch
.assigned_device_count
);
8503 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8505 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8507 return atomic_read(&kvm
->arch
.assigned_device_count
);
8509 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8511 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8513 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8515 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8517 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8519 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8521 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8523 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8525 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8527 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8529 bool kvm_arch_has_irq_bypass(void)
8531 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8534 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8535 struct irq_bypass_producer
*prod
)
8537 struct kvm_kernel_irqfd
*irqfd
=
8538 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8540 irqfd
->producer
= prod
;
8542 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8543 prod
->irq
, irqfd
->gsi
, 1);
8546 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8547 struct irq_bypass_producer
*prod
)
8550 struct kvm_kernel_irqfd
*irqfd
=
8551 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8553 WARN_ON(irqfd
->producer
!= prod
);
8554 irqfd
->producer
= NULL
;
8557 * When producer of consumer is unregistered, we change back to
8558 * remapped mode, so we can re-use the current implementation
8559 * when the irq is masked/disabled or the consumer side (KVM
8560 * int this case doesn't want to receive the interrupts.
8562 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8564 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8565 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8568 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8569 uint32_t guest_irq
, bool set
)
8571 if (!kvm_x86_ops
->update_pi_irte
)
8574 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8577 bool kvm_vector_hashing_enabled(void)
8579 return vector_hashing
;
8581 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8583 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8584 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8585 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8586 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8587 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8588 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8589 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8590 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8591 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8592 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8593 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8594 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8595 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8596 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8597 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8598 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8599 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8600 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8601 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);