2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <linux/timekeeper_internal.h>
50 #include <linux/pvclock_gtod.h>
51 #include <trace/events/kvm.h>
53 #define CREATE_TRACE_POINTS
56 #include <asm/debugreg.h>
62 #include <asm/fpu-internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
82 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
89 static void process_nmi(struct kvm_vcpu
*vcpu
);
91 struct kvm_x86_ops
*kvm_x86_ops
;
92 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
94 static bool ignore_msrs
= 0;
95 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
97 unsigned int min_timer_period_us
= 500;
98 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
100 bool kvm_has_tsc_control
;
101 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
102 u32 kvm_max_guest_tsc_khz
;
103 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
105 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
106 static u32 tsc_tolerance_ppm
= 250;
107 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
109 #define KVM_NR_SHARED_MSRS 16
111 struct kvm_shared_msrs_global
{
113 u32 msrs
[KVM_NR_SHARED_MSRS
];
116 struct kvm_shared_msrs
{
117 struct user_return_notifier urn
;
119 struct kvm_shared_msr_values
{
122 } values
[KVM_NR_SHARED_MSRS
];
125 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
126 static struct kvm_shared_msrs __percpu
*shared_msrs
;
128 struct kvm_stats_debugfs_item debugfs_entries
[] = {
129 { "pf_fixed", VCPU_STAT(pf_fixed
) },
130 { "pf_guest", VCPU_STAT(pf_guest
) },
131 { "tlb_flush", VCPU_STAT(tlb_flush
) },
132 { "invlpg", VCPU_STAT(invlpg
) },
133 { "exits", VCPU_STAT(exits
) },
134 { "io_exits", VCPU_STAT(io_exits
) },
135 { "mmio_exits", VCPU_STAT(mmio_exits
) },
136 { "signal_exits", VCPU_STAT(signal_exits
) },
137 { "irq_window", VCPU_STAT(irq_window_exits
) },
138 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
139 { "halt_exits", VCPU_STAT(halt_exits
) },
140 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
141 { "hypercalls", VCPU_STAT(hypercalls
) },
142 { "request_irq", VCPU_STAT(request_irq_exits
) },
143 { "irq_exits", VCPU_STAT(irq_exits
) },
144 { "host_state_reload", VCPU_STAT(host_state_reload
) },
145 { "efer_reload", VCPU_STAT(efer_reload
) },
146 { "fpu_reload", VCPU_STAT(fpu_reload
) },
147 { "insn_emulation", VCPU_STAT(insn_emulation
) },
148 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
149 { "irq_injections", VCPU_STAT(irq_injections
) },
150 { "nmi_injections", VCPU_STAT(nmi_injections
) },
151 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
152 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
153 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
154 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
155 { "mmu_flooded", VM_STAT(mmu_flooded
) },
156 { "mmu_recycled", VM_STAT(mmu_recycled
) },
157 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
158 { "mmu_unsync", VM_STAT(mmu_unsync
) },
159 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
160 { "largepages", VM_STAT(lpages
) },
164 u64 __read_mostly host_xcr0
;
166 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
168 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
171 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
172 vcpu
->arch
.apf
.gfns
[i
] = ~0;
175 static void kvm_on_user_return(struct user_return_notifier
*urn
)
178 struct kvm_shared_msrs
*locals
179 = container_of(urn
, struct kvm_shared_msrs
, urn
);
180 struct kvm_shared_msr_values
*values
;
182 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
183 values
= &locals
->values
[slot
];
184 if (values
->host
!= values
->curr
) {
185 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
186 values
->curr
= values
->host
;
189 locals
->registered
= false;
190 user_return_notifier_unregister(urn
);
193 static void shared_msr_update(unsigned slot
, u32 msr
)
196 unsigned int cpu
= smp_processor_id();
197 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
199 /* only read, and nobody should modify it at this time,
200 * so don't need lock */
201 if (slot
>= shared_msrs_global
.nr
) {
202 printk(KERN_ERR
"kvm: invalid MSR slot!");
205 rdmsrl_safe(msr
, &value
);
206 smsr
->values
[slot
].host
= value
;
207 smsr
->values
[slot
].curr
= value
;
210 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
212 if (slot
>= shared_msrs_global
.nr
)
213 shared_msrs_global
.nr
= slot
+ 1;
214 shared_msrs_global
.msrs
[slot
] = msr
;
215 /* we need ensured the shared_msr_global have been updated */
218 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
220 static void kvm_shared_msr_cpu_online(void)
224 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
225 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
228 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
230 unsigned int cpu
= smp_processor_id();
231 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
233 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
235 smsr
->values
[slot
].curr
= value
;
236 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
237 if (!smsr
->registered
) {
238 smsr
->urn
.on_user_return
= kvm_on_user_return
;
239 user_return_notifier_register(&smsr
->urn
);
240 smsr
->registered
= true;
243 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
245 static void drop_user_return_notifiers(void *ignore
)
247 unsigned int cpu
= smp_processor_id();
248 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
250 if (smsr
->registered
)
251 kvm_on_user_return(&smsr
->urn
);
254 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
256 return vcpu
->arch
.apic_base
;
258 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
260 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
262 u64 old_state
= vcpu
->arch
.apic_base
&
263 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
264 u64 new_state
= msr_info
->data
&
265 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
266 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
267 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
269 if (!msr_info
->host_initiated
&&
270 ((msr_info
->data
& reserved_bits
) != 0 ||
271 new_state
== X2APIC_ENABLE
||
272 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
273 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
274 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
278 kvm_lapic_set_base(vcpu
, msr_info
->data
);
281 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
283 asmlinkage
void kvm_spurious_fault(void)
285 /* Fault while not rebooting. We want the trace. */
288 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
290 #define EXCPT_BENIGN 0
291 #define EXCPT_CONTRIBUTORY 1
294 static int exception_class(int vector
)
304 return EXCPT_CONTRIBUTORY
;
311 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
312 unsigned nr
, bool has_error
, u32 error_code
,
318 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
320 if (!vcpu
->arch
.exception
.pending
) {
322 vcpu
->arch
.exception
.pending
= true;
323 vcpu
->arch
.exception
.has_error_code
= has_error
;
324 vcpu
->arch
.exception
.nr
= nr
;
325 vcpu
->arch
.exception
.error_code
= error_code
;
326 vcpu
->arch
.exception
.reinject
= reinject
;
330 /* to check exception */
331 prev_nr
= vcpu
->arch
.exception
.nr
;
332 if (prev_nr
== DF_VECTOR
) {
333 /* triple fault -> shutdown */
334 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
337 class1
= exception_class(prev_nr
);
338 class2
= exception_class(nr
);
339 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
340 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
341 /* generate double fault per SDM Table 5-5 */
342 vcpu
->arch
.exception
.pending
= true;
343 vcpu
->arch
.exception
.has_error_code
= true;
344 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
345 vcpu
->arch
.exception
.error_code
= 0;
347 /* replace previous exception with a new one in a hope
348 that instruction re-execution will regenerate lost
353 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
355 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
357 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
359 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
361 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
363 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
365 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
368 kvm_inject_gp(vcpu
, 0);
370 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
372 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
374 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
376 ++vcpu
->stat
.pf_guest
;
377 vcpu
->arch
.cr2
= fault
->address
;
378 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
380 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
382 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
384 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
385 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
387 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
390 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
392 atomic_inc(&vcpu
->arch
.nmi_queued
);
393 kvm_make_request(KVM_REQ_NMI
, vcpu
);
395 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
397 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
399 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
401 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
403 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
405 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
407 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
410 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
411 * a #GP and return false.
413 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
415 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
417 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
420 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
423 * This function will be used to read from the physical memory of the currently
424 * running guest. The difference to kvm_read_guest_page is that this function
425 * can read from guest physical or from the guest's guest physical memory.
427 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
428 gfn_t ngfn
, void *data
, int offset
, int len
,
434 ngpa
= gfn_to_gpa(ngfn
);
435 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
436 if (real_gfn
== UNMAPPED_GVA
)
439 real_gfn
= gpa_to_gfn(real_gfn
);
441 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
443 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
445 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
446 void *data
, int offset
, int len
, u32 access
)
448 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
449 data
, offset
, len
, access
);
453 * Load the pae pdptrs. Return true is they are all valid.
455 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
457 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
458 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
461 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
463 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
464 offset
* sizeof(u64
), sizeof(pdpte
),
465 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
470 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
471 if (is_present_gpte(pdpte
[i
]) &&
472 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
479 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
480 __set_bit(VCPU_EXREG_PDPTR
,
481 (unsigned long *)&vcpu
->arch
.regs_avail
);
482 __set_bit(VCPU_EXREG_PDPTR
,
483 (unsigned long *)&vcpu
->arch
.regs_dirty
);
488 EXPORT_SYMBOL_GPL(load_pdptrs
);
490 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
492 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
498 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
501 if (!test_bit(VCPU_EXREG_PDPTR
,
502 (unsigned long *)&vcpu
->arch
.regs_avail
))
505 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
506 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
507 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
508 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
511 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
517 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
519 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
520 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
521 X86_CR0_CD
| X86_CR0_NW
;
526 if (cr0
& 0xffffffff00000000UL
)
530 cr0
&= ~CR0_RESERVED_BITS
;
532 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
535 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
538 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
540 if ((vcpu
->arch
.efer
& EFER_LME
)) {
545 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
550 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
555 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
558 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
560 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
561 kvm_clear_async_pf_completion_queue(vcpu
);
562 kvm_async_pf_hash_reset(vcpu
);
565 if ((cr0
^ old_cr0
) & update_bits
)
566 kvm_mmu_reset_context(vcpu
);
569 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
571 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
573 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
575 EXPORT_SYMBOL_GPL(kvm_lmsw
);
577 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
579 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
580 !vcpu
->guest_xcr0_loaded
) {
581 /* kvm_set_xcr() also depends on this */
582 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
583 vcpu
->guest_xcr0_loaded
= 1;
587 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
589 if (vcpu
->guest_xcr0_loaded
) {
590 if (vcpu
->arch
.xcr0
!= host_xcr0
)
591 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
592 vcpu
->guest_xcr0_loaded
= 0;
596 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
599 u64 old_xcr0
= vcpu
->arch
.xcr0
;
602 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
603 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
605 if (!(xcr0
& XSTATE_FP
))
607 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
611 * Do not allow the guest to set bits that we do not support
612 * saving. However, xcr0 bit 0 is always set, even if the
613 * emulated CPU does not support XSAVE (see fx_init).
615 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
616 if (xcr0
& ~valid_bits
)
619 if ((!(xcr0
& XSTATE_BNDREGS
)) != (!(xcr0
& XSTATE_BNDCSR
)))
622 kvm_put_guest_xcr0(vcpu
);
623 vcpu
->arch
.xcr0
= xcr0
;
625 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
626 kvm_update_cpuid(vcpu
);
630 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
632 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
633 __kvm_set_xcr(vcpu
, index
, xcr
)) {
634 kvm_inject_gp(vcpu
, 0);
639 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
641 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
643 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
644 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
645 X86_CR4_PAE
| X86_CR4_SMEP
;
646 if (cr4
& CR4_RESERVED_BITS
)
649 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
652 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
655 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
658 if (is_long_mode(vcpu
)) {
659 if (!(cr4
& X86_CR4_PAE
))
661 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
662 && ((cr4
^ old_cr4
) & pdptr_bits
)
663 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
667 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
668 if (!guest_cpuid_has_pcid(vcpu
))
671 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
672 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
676 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
679 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
680 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
681 kvm_mmu_reset_context(vcpu
);
683 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
684 kvm_update_cpuid(vcpu
);
688 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
690 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
692 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
693 kvm_mmu_sync_roots(vcpu
);
694 kvm_mmu_flush_tlb(vcpu
);
698 if (is_long_mode(vcpu
)) {
699 if (kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
)) {
700 if (cr3
& CR3_PCID_ENABLED_RESERVED_BITS
)
703 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
707 if (cr3
& CR3_PAE_RESERVED_BITS
)
709 if (is_paging(vcpu
) &&
710 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
714 * We don't check reserved bits in nonpae mode, because
715 * this isn't enforced, and VMware depends on this.
719 vcpu
->arch
.cr3
= cr3
;
720 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
721 kvm_mmu_new_cr3(vcpu
);
724 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
726 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
728 if (cr8
& CR8_RESERVED_BITS
)
730 if (irqchip_in_kernel(vcpu
->kvm
))
731 kvm_lapic_set_tpr(vcpu
, cr8
);
733 vcpu
->arch
.cr8
= cr8
;
736 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
738 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
740 if (irqchip_in_kernel(vcpu
->kvm
))
741 return kvm_lapic_get_cr8(vcpu
);
743 return vcpu
->arch
.cr8
;
745 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
747 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
749 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
750 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
753 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
757 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
758 dr7
= vcpu
->arch
.guest_debug_dr7
;
760 dr7
= vcpu
->arch
.dr7
;
761 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
762 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
763 if (dr7
& DR7_BP_EN_MASK
)
764 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
767 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
771 vcpu
->arch
.db
[dr
] = val
;
772 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
773 vcpu
->arch
.eff_db
[dr
] = val
;
776 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
780 if (val
& 0xffffffff00000000ULL
)
782 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
783 kvm_update_dr6(vcpu
);
786 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
790 if (val
& 0xffffffff00000000ULL
)
792 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
793 kvm_update_dr7(vcpu
);
800 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
804 res
= __kvm_set_dr(vcpu
, dr
, val
);
806 kvm_queue_exception(vcpu
, UD_VECTOR
);
808 kvm_inject_gp(vcpu
, 0);
812 EXPORT_SYMBOL_GPL(kvm_set_dr
);
814 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
818 *val
= vcpu
->arch
.db
[dr
];
821 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
825 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
826 *val
= vcpu
->arch
.dr6
;
828 *val
= kvm_x86_ops
->get_dr6(vcpu
);
831 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
835 *val
= vcpu
->arch
.dr7
;
842 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
844 if (_kvm_get_dr(vcpu
, dr
, val
)) {
845 kvm_queue_exception(vcpu
, UD_VECTOR
);
850 EXPORT_SYMBOL_GPL(kvm_get_dr
);
852 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
854 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
858 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
861 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
862 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
865 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
868 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
869 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
871 * This list is modified at module load time to reflect the
872 * capabilities of the host cpu. This capabilities test skips MSRs that are
873 * kvm-specific. Those are put in the beginning of the list.
876 #define KVM_SAVE_MSRS_BEGIN 12
877 static u32 msrs_to_save
[] = {
878 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
879 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
880 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
881 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
882 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
884 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
887 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
889 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
890 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
893 static unsigned num_msrs_to_save
;
895 static const u32 emulated_msrs
[] = {
897 MSR_IA32_TSCDEADLINE
,
898 MSR_IA32_MISC_ENABLE
,
903 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
905 if (efer
& efer_reserved_bits
)
908 if (efer
& EFER_FFXSR
) {
909 struct kvm_cpuid_entry2
*feat
;
911 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
912 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
916 if (efer
& EFER_SVME
) {
917 struct kvm_cpuid_entry2
*feat
;
919 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
920 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
926 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
928 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
930 u64 old_efer
= vcpu
->arch
.efer
;
932 if (!kvm_valid_efer(vcpu
, efer
))
936 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
940 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
942 kvm_x86_ops
->set_efer(vcpu
, efer
);
944 /* Update reserved bits */
945 if ((efer
^ old_efer
) & EFER_NX
)
946 kvm_mmu_reset_context(vcpu
);
951 void kvm_enable_efer_bits(u64 mask
)
953 efer_reserved_bits
&= ~mask
;
955 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
959 * Writes msr value into into the appropriate "register".
960 * Returns 0 on success, non-0 otherwise.
961 * Assumes vcpu_load() was already called.
963 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
965 return kvm_x86_ops
->set_msr(vcpu
, msr
);
969 * Adapt set_msr() to msr_io()'s calling convention
971 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
977 msr
.host_initiated
= true;
978 return kvm_set_msr(vcpu
, &msr
);
982 struct pvclock_gtod_data
{
985 struct { /* extract of a clocksource struct */
993 /* open coded 'struct timespec' */
994 u64 monotonic_time_snsec
;
995 time_t monotonic_time_sec
;
998 static struct pvclock_gtod_data pvclock_gtod_data
;
1000 static void update_pvclock_gtod(struct timekeeper
*tk
)
1002 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1004 write_seqcount_begin(&vdata
->seq
);
1006 /* copy pvclock gtod data */
1007 vdata
->clock
.vclock_mode
= tk
->clock
->archdata
.vclock_mode
;
1008 vdata
->clock
.cycle_last
= tk
->clock
->cycle_last
;
1009 vdata
->clock
.mask
= tk
->clock
->mask
;
1010 vdata
->clock
.mult
= tk
->mult
;
1011 vdata
->clock
.shift
= tk
->shift
;
1013 vdata
->monotonic_time_sec
= tk
->xtime_sec
1014 + tk
->wall_to_monotonic
.tv_sec
;
1015 vdata
->monotonic_time_snsec
= tk
->xtime_nsec
1016 + (tk
->wall_to_monotonic
.tv_nsec
1018 while (vdata
->monotonic_time_snsec
>=
1019 (((u64
)NSEC_PER_SEC
) << tk
->shift
)) {
1020 vdata
->monotonic_time_snsec
-=
1021 ((u64
)NSEC_PER_SEC
) << tk
->shift
;
1022 vdata
->monotonic_time_sec
++;
1025 write_seqcount_end(&vdata
->seq
);
1030 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1034 struct pvclock_wall_clock wc
;
1035 struct timespec boot
;
1040 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1045 ++version
; /* first time write, random junk */
1049 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1052 * The guest calculates current wall clock time by adding
1053 * system time (updated by kvm_guest_time_update below) to the
1054 * wall clock specified here. guest system time equals host
1055 * system time for us, thus we must fill in host boot time here.
1059 if (kvm
->arch
.kvmclock_offset
) {
1060 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1061 boot
= timespec_sub(boot
, ts
);
1063 wc
.sec
= boot
.tv_sec
;
1064 wc
.nsec
= boot
.tv_nsec
;
1065 wc
.version
= version
;
1067 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1070 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1073 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1075 uint32_t quotient
, remainder
;
1077 /* Don't try to replace with do_div(), this one calculates
1078 * "(dividend << 32) / divisor" */
1080 : "=a" (quotient
), "=d" (remainder
)
1081 : "0" (0), "1" (dividend
), "r" (divisor
) );
1085 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1086 s8
*pshift
, u32
*pmultiplier
)
1093 tps64
= base_khz
* 1000LL;
1094 scaled64
= scaled_khz
* 1000LL;
1095 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1100 tps32
= (uint32_t)tps64
;
1101 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1102 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1110 *pmultiplier
= div_frac(scaled64
, tps32
);
1112 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1113 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1116 static inline u64
get_kernel_ns(void)
1120 WARN_ON(preemptible());
1122 monotonic_to_bootbased(&ts
);
1123 return timespec_to_ns(&ts
);
1126 #ifdef CONFIG_X86_64
1127 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1130 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1131 unsigned long max_tsc_khz
;
1133 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1135 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1136 vcpu
->arch
.virtual_tsc_shift
);
1139 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1141 u64 v
= (u64
)khz
* (1000000 + ppm
);
1146 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1148 u32 thresh_lo
, thresh_hi
;
1149 int use_scaling
= 0;
1151 /* tsc_khz can be zero if TSC calibration fails */
1152 if (this_tsc_khz
== 0)
1155 /* Compute a scale to convert nanoseconds in TSC cycles */
1156 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1157 &vcpu
->arch
.virtual_tsc_shift
,
1158 &vcpu
->arch
.virtual_tsc_mult
);
1159 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1162 * Compute the variation in TSC rate which is acceptable
1163 * within the range of tolerance and decide if the
1164 * rate being applied is within that bounds of the hardware
1165 * rate. If so, no scaling or compensation need be done.
1167 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1168 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1169 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1170 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1173 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1176 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1178 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1179 vcpu
->arch
.virtual_tsc_mult
,
1180 vcpu
->arch
.virtual_tsc_shift
);
1181 tsc
+= vcpu
->arch
.this_tsc_write
;
1185 void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1187 #ifdef CONFIG_X86_64
1189 bool do_request
= false;
1190 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1191 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1193 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1194 atomic_read(&vcpu
->kvm
->online_vcpus
));
1196 if (vcpus_matched
&& gtod
->clock
.vclock_mode
== VCLOCK_TSC
)
1197 if (!ka
->use_master_clock
)
1200 if (!vcpus_matched
&& ka
->use_master_clock
)
1204 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1206 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1207 atomic_read(&vcpu
->kvm
->online_vcpus
),
1208 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1212 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1214 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1215 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1218 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1220 struct kvm
*kvm
= vcpu
->kvm
;
1221 u64 offset
, ns
, elapsed
;
1222 unsigned long flags
;
1225 u64 data
= msr
->data
;
1227 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1228 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1229 ns
= get_kernel_ns();
1230 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1232 if (vcpu
->arch
.virtual_tsc_khz
) {
1235 /* n.b - signed multiplication and division required */
1236 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1237 #ifdef CONFIG_X86_64
1238 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1240 /* do_div() only does unsigned */
1241 asm("1: idivl %[divisor]\n"
1242 "2: xor %%edx, %%edx\n"
1243 " movl $0, %[faulted]\n"
1245 ".section .fixup,\"ax\"\n"
1246 "4: movl $1, %[faulted]\n"
1250 _ASM_EXTABLE(1b
, 4b
)
1252 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1253 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1256 do_div(elapsed
, 1000);
1261 /* idivl overflow => difference is larger than USEC_PER_SEC */
1263 usdiff
= USEC_PER_SEC
;
1265 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1268 * Special case: TSC write with a small delta (1 second) of virtual
1269 * cycle time against real time is interpreted as an attempt to
1270 * synchronize the CPU.
1272 * For a reliable TSC, we can match TSC offsets, and for an unstable
1273 * TSC, we add elapsed time in this computation. We could let the
1274 * compensation code attempt to catch up if we fall behind, but
1275 * it's better to try to match offsets from the beginning.
1277 if (usdiff
< USEC_PER_SEC
&&
1278 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1279 if (!check_tsc_unstable()) {
1280 offset
= kvm
->arch
.cur_tsc_offset
;
1281 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1283 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1285 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1286 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1291 * We split periods of matched TSC writes into generations.
1292 * For each generation, we track the original measured
1293 * nanosecond time, offset, and write, so if TSCs are in
1294 * sync, we can match exact offset, and if not, we can match
1295 * exact software computation in compute_guest_tsc()
1297 * These values are tracked in kvm->arch.cur_xxx variables.
1299 kvm
->arch
.cur_tsc_generation
++;
1300 kvm
->arch
.cur_tsc_nsec
= ns
;
1301 kvm
->arch
.cur_tsc_write
= data
;
1302 kvm
->arch
.cur_tsc_offset
= offset
;
1304 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1305 kvm
->arch
.cur_tsc_generation
, data
);
1309 * We also track th most recent recorded KHZ, write and time to
1310 * allow the matching interval to be extended at each write.
1312 kvm
->arch
.last_tsc_nsec
= ns
;
1313 kvm
->arch
.last_tsc_write
= data
;
1314 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1316 vcpu
->arch
.last_guest_tsc
= data
;
1318 /* Keep track of which generation this VCPU has synchronized to */
1319 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1320 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1321 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1323 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1324 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1325 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1326 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1328 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1330 kvm
->arch
.nr_vcpus_matched_tsc
++;
1332 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1334 kvm_track_tsc_matching(vcpu
);
1335 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1338 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1340 #ifdef CONFIG_X86_64
1342 static cycle_t
read_tsc(void)
1348 * Empirically, a fence (of type that depends on the CPU)
1349 * before rdtsc is enough to ensure that rdtsc is ordered
1350 * with respect to loads. The various CPU manuals are unclear
1351 * as to whether rdtsc can be reordered with later loads,
1352 * but no one has ever seen it happen.
1355 ret
= (cycle_t
)vget_cycles();
1357 last
= pvclock_gtod_data
.clock
.cycle_last
;
1359 if (likely(ret
>= last
))
1363 * GCC likes to generate cmov here, but this branch is extremely
1364 * predictable (it's just a funciton of time and the likely is
1365 * very likely) and there's a data dependence, so force GCC
1366 * to generate a branch instead. I don't barrier() because
1367 * we don't actually need a barrier, and if this function
1368 * ever gets inlined it will generate worse code.
1374 static inline u64
vgettsc(cycle_t
*cycle_now
)
1377 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1379 *cycle_now
= read_tsc();
1381 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1382 return v
* gtod
->clock
.mult
;
1385 static int do_monotonic(struct timespec
*ts
, cycle_t
*cycle_now
)
1390 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1394 seq
= read_seqcount_begin(>od
->seq
);
1395 mode
= gtod
->clock
.vclock_mode
;
1396 ts
->tv_sec
= gtod
->monotonic_time_sec
;
1397 ns
= gtod
->monotonic_time_snsec
;
1398 ns
+= vgettsc(cycle_now
);
1399 ns
>>= gtod
->clock
.shift
;
1400 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1401 timespec_add_ns(ts
, ns
);
1406 /* returns true if host is using tsc clocksource */
1407 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1411 /* checked again under seqlock below */
1412 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1415 if (do_monotonic(&ts
, cycle_now
) != VCLOCK_TSC
)
1418 monotonic_to_bootbased(&ts
);
1419 *kernel_ns
= timespec_to_ns(&ts
);
1427 * Assuming a stable TSC across physical CPUS, and a stable TSC
1428 * across virtual CPUs, the following condition is possible.
1429 * Each numbered line represents an event visible to both
1430 * CPUs at the next numbered event.
1432 * "timespecX" represents host monotonic time. "tscX" represents
1435 * VCPU0 on CPU0 | VCPU1 on CPU1
1437 * 1. read timespec0,tsc0
1438 * 2. | timespec1 = timespec0 + N
1440 * 3. transition to guest | transition to guest
1441 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1442 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1443 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1445 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1448 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1450 * - 0 < N - M => M < N
1452 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1453 * always the case (the difference between two distinct xtime instances
1454 * might be smaller then the difference between corresponding TSC reads,
1455 * when updating guest vcpus pvclock areas).
1457 * To avoid that problem, do not allow visibility of distinct
1458 * system_timestamp/tsc_timestamp values simultaneously: use a master
1459 * copy of host monotonic time values. Update that master copy
1462 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1466 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1468 #ifdef CONFIG_X86_64
1469 struct kvm_arch
*ka
= &kvm
->arch
;
1471 bool host_tsc_clocksource
, vcpus_matched
;
1473 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1474 atomic_read(&kvm
->online_vcpus
));
1477 * If the host uses TSC clock, then passthrough TSC as stable
1480 host_tsc_clocksource
= kvm_get_time_and_clockread(
1481 &ka
->master_kernel_ns
,
1482 &ka
->master_cycle_now
);
1484 ka
->use_master_clock
= host_tsc_clocksource
& vcpus_matched
;
1486 if (ka
->use_master_clock
)
1487 atomic_set(&kvm_guest_has_master_clock
, 1);
1489 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1490 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1495 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1497 #ifdef CONFIG_X86_64
1499 struct kvm_vcpu
*vcpu
;
1500 struct kvm_arch
*ka
= &kvm
->arch
;
1502 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1503 kvm_make_mclock_inprogress_request(kvm
);
1504 /* no guest entries from this point */
1505 pvclock_update_vm_gtod_copy(kvm
);
1507 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1508 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
1510 /* guest entries allowed */
1511 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1512 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1514 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1518 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1520 unsigned long flags
, this_tsc_khz
;
1521 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1522 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1524 u64 tsc_timestamp
, host_tsc
;
1525 struct pvclock_vcpu_time_info guest_hv_clock
;
1527 bool use_master_clock
;
1533 * If the host uses TSC clock, then passthrough TSC as stable
1536 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1537 use_master_clock
= ka
->use_master_clock
;
1538 if (use_master_clock
) {
1539 host_tsc
= ka
->master_cycle_now
;
1540 kernel_ns
= ka
->master_kernel_ns
;
1542 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1544 /* Keep irq disabled to prevent changes to the clock */
1545 local_irq_save(flags
);
1546 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1547 if (unlikely(this_tsc_khz
== 0)) {
1548 local_irq_restore(flags
);
1549 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1552 if (!use_master_clock
) {
1553 host_tsc
= native_read_tsc();
1554 kernel_ns
= get_kernel_ns();
1557 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1560 * We may have to catch up the TSC to match elapsed wall clock
1561 * time for two reasons, even if kvmclock is used.
1562 * 1) CPU could have been running below the maximum TSC rate
1563 * 2) Broken TSC compensation resets the base at each VCPU
1564 * entry to avoid unknown leaps of TSC even when running
1565 * again on the same CPU. This may cause apparent elapsed
1566 * time to disappear, and the guest to stand still or run
1569 if (vcpu
->tsc_catchup
) {
1570 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1571 if (tsc
> tsc_timestamp
) {
1572 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1573 tsc_timestamp
= tsc
;
1577 local_irq_restore(flags
);
1579 if (!vcpu
->pv_time_enabled
)
1582 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1583 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1584 &vcpu
->hv_clock
.tsc_shift
,
1585 &vcpu
->hv_clock
.tsc_to_system_mul
);
1586 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1589 /* With all the info we got, fill in the values */
1590 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1591 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1592 vcpu
->last_guest_tsc
= tsc_timestamp
;
1595 * The interface expects us to write an even number signaling that the
1596 * update is finished. Since the guest won't see the intermediate
1597 * state, we just increase by 2 at the end.
1599 vcpu
->hv_clock
.version
+= 2;
1601 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1602 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1605 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1606 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1608 if (vcpu
->pvclock_set_guest_stopped_request
) {
1609 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1610 vcpu
->pvclock_set_guest_stopped_request
= false;
1613 /* If the host uses TSC clocksource, then it is stable */
1614 if (use_master_clock
)
1615 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1617 vcpu
->hv_clock
.flags
= pvclock_flags
;
1619 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1621 sizeof(vcpu
->hv_clock
));
1626 * kvmclock updates which are isolated to a given vcpu, such as
1627 * vcpu->cpu migration, should not allow system_timestamp from
1628 * the rest of the vcpus to remain static. Otherwise ntp frequency
1629 * correction applies to one vcpu's system_timestamp but not
1632 * So in those cases, request a kvmclock update for all vcpus.
1633 * We need to rate-limit these requests though, as they can
1634 * considerably slow guests that have a large number of vcpus.
1635 * The time for a remote vcpu to update its kvmclock is bound
1636 * by the delay we use to rate-limit the updates.
1639 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1641 static void kvmclock_update_fn(struct work_struct
*work
)
1644 struct delayed_work
*dwork
= to_delayed_work(work
);
1645 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1646 kvmclock_update_work
);
1647 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1648 struct kvm_vcpu
*vcpu
;
1650 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1651 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
1652 kvm_vcpu_kick(vcpu
);
1656 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1658 struct kvm
*kvm
= v
->kvm
;
1660 set_bit(KVM_REQ_CLOCK_UPDATE
, &v
->requests
);
1661 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1662 KVMCLOCK_UPDATE_DELAY
);
1665 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1667 static void kvmclock_sync_fn(struct work_struct
*work
)
1669 struct delayed_work
*dwork
= to_delayed_work(work
);
1670 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1671 kvmclock_sync_work
);
1672 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1674 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1675 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1676 KVMCLOCK_SYNC_PERIOD
);
1679 static bool msr_mtrr_valid(unsigned msr
)
1682 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1683 case MSR_MTRRfix64K_00000
:
1684 case MSR_MTRRfix16K_80000
:
1685 case MSR_MTRRfix16K_A0000
:
1686 case MSR_MTRRfix4K_C0000
:
1687 case MSR_MTRRfix4K_C8000
:
1688 case MSR_MTRRfix4K_D0000
:
1689 case MSR_MTRRfix4K_D8000
:
1690 case MSR_MTRRfix4K_E0000
:
1691 case MSR_MTRRfix4K_E8000
:
1692 case MSR_MTRRfix4K_F0000
:
1693 case MSR_MTRRfix4K_F8000
:
1694 case MSR_MTRRdefType
:
1695 case MSR_IA32_CR_PAT
:
1703 static bool valid_pat_type(unsigned t
)
1705 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1708 static bool valid_mtrr_type(unsigned t
)
1710 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1713 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1717 if (!msr_mtrr_valid(msr
))
1720 if (msr
== MSR_IA32_CR_PAT
) {
1721 for (i
= 0; i
< 8; i
++)
1722 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1725 } else if (msr
== MSR_MTRRdefType
) {
1728 return valid_mtrr_type(data
& 0xff);
1729 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1730 for (i
= 0; i
< 8 ; i
++)
1731 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1736 /* variable MTRRs */
1737 return valid_mtrr_type(data
& 0xff);
1740 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1742 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1744 if (!mtrr_valid(vcpu
, msr
, data
))
1747 if (msr
== MSR_MTRRdefType
) {
1748 vcpu
->arch
.mtrr_state
.def_type
= data
;
1749 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1750 } else if (msr
== MSR_MTRRfix64K_00000
)
1752 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1753 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1754 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1755 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1756 else if (msr
== MSR_IA32_CR_PAT
)
1757 vcpu
->arch
.pat
= data
;
1758 else { /* Variable MTRRs */
1759 int idx
, is_mtrr_mask
;
1762 idx
= (msr
- 0x200) / 2;
1763 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1766 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1769 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1773 kvm_mmu_reset_context(vcpu
);
1777 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1779 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1780 unsigned bank_num
= mcg_cap
& 0xff;
1783 case MSR_IA32_MCG_STATUS
:
1784 vcpu
->arch
.mcg_status
= data
;
1786 case MSR_IA32_MCG_CTL
:
1787 if (!(mcg_cap
& MCG_CTL_P
))
1789 if (data
!= 0 && data
!= ~(u64
)0)
1791 vcpu
->arch
.mcg_ctl
= data
;
1794 if (msr
>= MSR_IA32_MC0_CTL
&&
1795 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1796 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1797 /* only 0 or all 1s can be written to IA32_MCi_CTL
1798 * some Linux kernels though clear bit 10 in bank 4 to
1799 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1800 * this to avoid an uncatched #GP in the guest
1802 if ((offset
& 0x3) == 0 &&
1803 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1805 vcpu
->arch
.mce_banks
[offset
] = data
;
1813 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1815 struct kvm
*kvm
= vcpu
->kvm
;
1816 int lm
= is_long_mode(vcpu
);
1817 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1818 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1819 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1820 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1821 u32 page_num
= data
& ~PAGE_MASK
;
1822 u64 page_addr
= data
& PAGE_MASK
;
1827 if (page_num
>= blob_size
)
1830 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1835 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1844 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1846 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1849 static bool kvm_hv_msr_partition_wide(u32 msr
)
1853 case HV_X64_MSR_GUEST_OS_ID
:
1854 case HV_X64_MSR_HYPERCALL
:
1855 case HV_X64_MSR_REFERENCE_TSC
:
1856 case HV_X64_MSR_TIME_REF_COUNT
:
1864 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1866 struct kvm
*kvm
= vcpu
->kvm
;
1869 case HV_X64_MSR_GUEST_OS_ID
:
1870 kvm
->arch
.hv_guest_os_id
= data
;
1871 /* setting guest os id to zero disables hypercall page */
1872 if (!kvm
->arch
.hv_guest_os_id
)
1873 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1875 case HV_X64_MSR_HYPERCALL
: {
1880 /* if guest os id is not set hypercall should remain disabled */
1881 if (!kvm
->arch
.hv_guest_os_id
)
1883 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1884 kvm
->arch
.hv_hypercall
= data
;
1887 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1888 addr
= gfn_to_hva(kvm
, gfn
);
1889 if (kvm_is_error_hva(addr
))
1891 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1892 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1893 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1895 kvm
->arch
.hv_hypercall
= data
;
1896 mark_page_dirty(kvm
, gfn
);
1899 case HV_X64_MSR_REFERENCE_TSC
: {
1901 HV_REFERENCE_TSC_PAGE tsc_ref
;
1902 memset(&tsc_ref
, 0, sizeof(tsc_ref
));
1903 kvm
->arch
.hv_tsc_page
= data
;
1904 if (!(data
& HV_X64_MSR_TSC_REFERENCE_ENABLE
))
1906 gfn
= data
>> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
;
1907 if (kvm_write_guest(kvm
, data
,
1908 &tsc_ref
, sizeof(tsc_ref
)))
1910 mark_page_dirty(kvm
, gfn
);
1914 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1915 "data 0x%llx\n", msr
, data
);
1921 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1924 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1928 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1929 vcpu
->arch
.hv_vapic
= data
;
1932 gfn
= data
>> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
;
1933 addr
= gfn_to_hva(vcpu
->kvm
, gfn
);
1934 if (kvm_is_error_hva(addr
))
1936 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1938 vcpu
->arch
.hv_vapic
= data
;
1939 mark_page_dirty(vcpu
->kvm
, gfn
);
1942 case HV_X64_MSR_EOI
:
1943 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1944 case HV_X64_MSR_ICR
:
1945 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1946 case HV_X64_MSR_TPR
:
1947 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1949 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1950 "data 0x%llx\n", msr
, data
);
1957 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1959 gpa_t gpa
= data
& ~0x3f;
1961 /* Bits 2:5 are reserved, Should be zero */
1965 vcpu
->arch
.apf
.msr_val
= data
;
1967 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1968 kvm_clear_async_pf_completion_queue(vcpu
);
1969 kvm_async_pf_hash_reset(vcpu
);
1973 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
1977 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1978 kvm_async_pf_wakeup_all(vcpu
);
1982 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1984 vcpu
->arch
.pv_time_enabled
= false;
1987 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
1991 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1994 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
1995 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1996 vcpu
->arch
.st
.accum_steal
= delta
;
1999 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2001 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2004 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2005 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2008 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
2009 vcpu
->arch
.st
.steal
.version
+= 2;
2010 vcpu
->arch
.st
.accum_steal
= 0;
2012 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2013 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2016 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2019 u32 msr
= msr_info
->index
;
2020 u64 data
= msr_info
->data
;
2023 case MSR_AMD64_NB_CFG
:
2024 case MSR_IA32_UCODE_REV
:
2025 case MSR_IA32_UCODE_WRITE
:
2026 case MSR_VM_HSAVE_PA
:
2027 case MSR_AMD64_PATCH_LOADER
:
2028 case MSR_AMD64_BU_CFG2
:
2032 return set_efer(vcpu
, data
);
2034 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2035 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2036 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2038 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2043 case MSR_FAM10H_MMIO_CONF_BASE
:
2045 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2050 case MSR_IA32_DEBUGCTLMSR
:
2052 /* We support the non-activated case already */
2054 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2055 /* Values other than LBR and BTF are vendor-specific,
2056 thus reserved and should throw a #GP */
2059 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2062 case 0x200 ... 0x2ff:
2063 return set_msr_mtrr(vcpu
, msr
, data
);
2064 case MSR_IA32_APICBASE
:
2065 return kvm_set_apic_base(vcpu
, msr_info
);
2066 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2067 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2068 case MSR_IA32_TSCDEADLINE
:
2069 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2071 case MSR_IA32_TSC_ADJUST
:
2072 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2073 if (!msr_info
->host_initiated
) {
2074 u64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2075 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
2077 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2080 case MSR_IA32_MISC_ENABLE
:
2081 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2083 case MSR_KVM_WALL_CLOCK_NEW
:
2084 case MSR_KVM_WALL_CLOCK
:
2085 vcpu
->kvm
->arch
.wall_clock
= data
;
2086 kvm_write_wall_clock(vcpu
->kvm
, data
);
2088 case MSR_KVM_SYSTEM_TIME_NEW
:
2089 case MSR_KVM_SYSTEM_TIME
: {
2091 kvmclock_reset(vcpu
);
2093 vcpu
->arch
.time
= data
;
2094 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2096 /* we verify if the enable bit is set... */
2100 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2102 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2103 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2104 sizeof(struct pvclock_vcpu_time_info
)))
2105 vcpu
->arch
.pv_time_enabled
= false;
2107 vcpu
->arch
.pv_time_enabled
= true;
2111 case MSR_KVM_ASYNC_PF_EN
:
2112 if (kvm_pv_enable_async_pf(vcpu
, data
))
2115 case MSR_KVM_STEAL_TIME
:
2117 if (unlikely(!sched_info_on()))
2120 if (data
& KVM_STEAL_RESERVED_MASK
)
2123 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2124 data
& KVM_STEAL_VALID_BITS
,
2125 sizeof(struct kvm_steal_time
)))
2128 vcpu
->arch
.st
.msr_val
= data
;
2130 if (!(data
& KVM_MSR_ENABLED
))
2133 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2136 accumulate_steal_time(vcpu
);
2139 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2142 case MSR_KVM_PV_EOI_EN
:
2143 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2147 case MSR_IA32_MCG_CTL
:
2148 case MSR_IA32_MCG_STATUS
:
2149 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2150 return set_msr_mce(vcpu
, msr
, data
);
2152 /* Performance counters are not protected by a CPUID bit,
2153 * so we should check all of them in the generic path for the sake of
2154 * cross vendor migration.
2155 * Writing a zero into the event select MSRs disables them,
2156 * which we perfectly emulate ;-). Any other value should be at least
2157 * reported, some guests depend on them.
2159 case MSR_K7_EVNTSEL0
:
2160 case MSR_K7_EVNTSEL1
:
2161 case MSR_K7_EVNTSEL2
:
2162 case MSR_K7_EVNTSEL3
:
2164 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2165 "0x%x data 0x%llx\n", msr
, data
);
2167 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2168 * so we ignore writes to make it happy.
2170 case MSR_K7_PERFCTR0
:
2171 case MSR_K7_PERFCTR1
:
2172 case MSR_K7_PERFCTR2
:
2173 case MSR_K7_PERFCTR3
:
2174 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2175 "0x%x data 0x%llx\n", msr
, data
);
2177 case MSR_P6_PERFCTR0
:
2178 case MSR_P6_PERFCTR1
:
2180 case MSR_P6_EVNTSEL0
:
2181 case MSR_P6_EVNTSEL1
:
2182 if (kvm_pmu_msr(vcpu
, msr
))
2183 return kvm_pmu_set_msr(vcpu
, msr_info
);
2185 if (pr
|| data
!= 0)
2186 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2187 "0x%x data 0x%llx\n", msr
, data
);
2189 case MSR_K7_CLK_CTL
:
2191 * Ignore all writes to this no longer documented MSR.
2192 * Writes are only relevant for old K7 processors,
2193 * all pre-dating SVM, but a recommended workaround from
2194 * AMD for these chips. It is possible to specify the
2195 * affected processor models on the command line, hence
2196 * the need to ignore the workaround.
2199 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2200 if (kvm_hv_msr_partition_wide(msr
)) {
2202 mutex_lock(&vcpu
->kvm
->lock
);
2203 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2204 mutex_unlock(&vcpu
->kvm
->lock
);
2207 return set_msr_hyperv(vcpu
, msr
, data
);
2209 case MSR_IA32_BBL_CR_CTL3
:
2210 /* Drop writes to this legacy MSR -- see rdmsr
2211 * counterpart for further detail.
2213 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2215 case MSR_AMD64_OSVW_ID_LENGTH
:
2216 if (!guest_cpuid_has_osvw(vcpu
))
2218 vcpu
->arch
.osvw
.length
= data
;
2220 case MSR_AMD64_OSVW_STATUS
:
2221 if (!guest_cpuid_has_osvw(vcpu
))
2223 vcpu
->arch
.osvw
.status
= data
;
2226 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2227 return xen_hvm_config(vcpu
, data
);
2228 if (kvm_pmu_msr(vcpu
, msr
))
2229 return kvm_pmu_set_msr(vcpu
, msr_info
);
2231 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2235 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2242 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2246 * Reads an msr value (of 'msr_index') into 'pdata'.
2247 * Returns 0 on success, non-0 otherwise.
2248 * Assumes vcpu_load() was already called.
2250 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
2252 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
2255 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2257 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
2259 if (!msr_mtrr_valid(msr
))
2262 if (msr
== MSR_MTRRdefType
)
2263 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
2264 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
2265 else if (msr
== MSR_MTRRfix64K_00000
)
2267 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
2268 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
2269 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
2270 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
2271 else if (msr
== MSR_IA32_CR_PAT
)
2272 *pdata
= vcpu
->arch
.pat
;
2273 else { /* Variable MTRRs */
2274 int idx
, is_mtrr_mask
;
2277 idx
= (msr
- 0x200) / 2;
2278 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
2281 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
2284 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
2291 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2294 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2295 unsigned bank_num
= mcg_cap
& 0xff;
2298 case MSR_IA32_P5_MC_ADDR
:
2299 case MSR_IA32_P5_MC_TYPE
:
2302 case MSR_IA32_MCG_CAP
:
2303 data
= vcpu
->arch
.mcg_cap
;
2305 case MSR_IA32_MCG_CTL
:
2306 if (!(mcg_cap
& MCG_CTL_P
))
2308 data
= vcpu
->arch
.mcg_ctl
;
2310 case MSR_IA32_MCG_STATUS
:
2311 data
= vcpu
->arch
.mcg_status
;
2314 if (msr
>= MSR_IA32_MC0_CTL
&&
2315 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
2316 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2317 data
= vcpu
->arch
.mce_banks
[offset
];
2326 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2329 struct kvm
*kvm
= vcpu
->kvm
;
2332 case HV_X64_MSR_GUEST_OS_ID
:
2333 data
= kvm
->arch
.hv_guest_os_id
;
2335 case HV_X64_MSR_HYPERCALL
:
2336 data
= kvm
->arch
.hv_hypercall
;
2338 case HV_X64_MSR_TIME_REF_COUNT
: {
2340 div_u64(get_kernel_ns() + kvm
->arch
.kvmclock_offset
, 100);
2343 case HV_X64_MSR_REFERENCE_TSC
:
2344 data
= kvm
->arch
.hv_tsc_page
;
2347 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2355 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2360 case HV_X64_MSR_VP_INDEX
: {
2363 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
) {
2371 case HV_X64_MSR_EOI
:
2372 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2373 case HV_X64_MSR_ICR
:
2374 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2375 case HV_X64_MSR_TPR
:
2376 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2377 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2378 data
= vcpu
->arch
.hv_vapic
;
2381 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2388 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2393 case MSR_IA32_PLATFORM_ID
:
2394 case MSR_IA32_EBL_CR_POWERON
:
2395 case MSR_IA32_DEBUGCTLMSR
:
2396 case MSR_IA32_LASTBRANCHFROMIP
:
2397 case MSR_IA32_LASTBRANCHTOIP
:
2398 case MSR_IA32_LASTINTFROMIP
:
2399 case MSR_IA32_LASTINTTOIP
:
2402 case MSR_VM_HSAVE_PA
:
2403 case MSR_K7_EVNTSEL0
:
2404 case MSR_K7_PERFCTR0
:
2405 case MSR_K8_INT_PENDING_MSG
:
2406 case MSR_AMD64_NB_CFG
:
2407 case MSR_FAM10H_MMIO_CONF_BASE
:
2408 case MSR_AMD64_BU_CFG2
:
2411 case MSR_P6_PERFCTR0
:
2412 case MSR_P6_PERFCTR1
:
2413 case MSR_P6_EVNTSEL0
:
2414 case MSR_P6_EVNTSEL1
:
2415 if (kvm_pmu_msr(vcpu
, msr
))
2416 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2419 case MSR_IA32_UCODE_REV
:
2420 data
= 0x100000000ULL
;
2423 data
= 0x500 | KVM_NR_VAR_MTRR
;
2425 case 0x200 ... 0x2ff:
2426 return get_msr_mtrr(vcpu
, msr
, pdata
);
2427 case 0xcd: /* fsb frequency */
2431 * MSR_EBC_FREQUENCY_ID
2432 * Conservative value valid for even the basic CPU models.
2433 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2434 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2435 * and 266MHz for model 3, or 4. Set Core Clock
2436 * Frequency to System Bus Frequency Ratio to 1 (bits
2437 * 31:24) even though these are only valid for CPU
2438 * models > 2, however guests may end up dividing or
2439 * multiplying by zero otherwise.
2441 case MSR_EBC_FREQUENCY_ID
:
2444 case MSR_IA32_APICBASE
:
2445 data
= kvm_get_apic_base(vcpu
);
2447 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2448 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
2450 case MSR_IA32_TSCDEADLINE
:
2451 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2453 case MSR_IA32_TSC_ADJUST
:
2454 data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2456 case MSR_IA32_MISC_ENABLE
:
2457 data
= vcpu
->arch
.ia32_misc_enable_msr
;
2459 case MSR_IA32_PERF_STATUS
:
2460 /* TSC increment by tick */
2462 /* CPU multiplier */
2463 data
|= (((uint64_t)4ULL) << 40);
2466 data
= vcpu
->arch
.efer
;
2468 case MSR_KVM_WALL_CLOCK
:
2469 case MSR_KVM_WALL_CLOCK_NEW
:
2470 data
= vcpu
->kvm
->arch
.wall_clock
;
2472 case MSR_KVM_SYSTEM_TIME
:
2473 case MSR_KVM_SYSTEM_TIME_NEW
:
2474 data
= vcpu
->arch
.time
;
2476 case MSR_KVM_ASYNC_PF_EN
:
2477 data
= vcpu
->arch
.apf
.msr_val
;
2479 case MSR_KVM_STEAL_TIME
:
2480 data
= vcpu
->arch
.st
.msr_val
;
2482 case MSR_KVM_PV_EOI_EN
:
2483 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2485 case MSR_IA32_P5_MC_ADDR
:
2486 case MSR_IA32_P5_MC_TYPE
:
2487 case MSR_IA32_MCG_CAP
:
2488 case MSR_IA32_MCG_CTL
:
2489 case MSR_IA32_MCG_STATUS
:
2490 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2491 return get_msr_mce(vcpu
, msr
, pdata
);
2492 case MSR_K7_CLK_CTL
:
2494 * Provide expected ramp-up count for K7. All other
2495 * are set to zero, indicating minimum divisors for
2498 * This prevents guest kernels on AMD host with CPU
2499 * type 6, model 8 and higher from exploding due to
2500 * the rdmsr failing.
2504 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2505 if (kvm_hv_msr_partition_wide(msr
)) {
2507 mutex_lock(&vcpu
->kvm
->lock
);
2508 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2509 mutex_unlock(&vcpu
->kvm
->lock
);
2512 return get_msr_hyperv(vcpu
, msr
, pdata
);
2514 case MSR_IA32_BBL_CR_CTL3
:
2515 /* This legacy MSR exists but isn't fully documented in current
2516 * silicon. It is however accessed by winxp in very narrow
2517 * scenarios where it sets bit #19, itself documented as
2518 * a "reserved" bit. Best effort attempt to source coherent
2519 * read data here should the balance of the register be
2520 * interpreted by the guest:
2522 * L2 cache control register 3: 64GB range, 256KB size,
2523 * enabled, latency 0x1, configured
2527 case MSR_AMD64_OSVW_ID_LENGTH
:
2528 if (!guest_cpuid_has_osvw(vcpu
))
2530 data
= vcpu
->arch
.osvw
.length
;
2532 case MSR_AMD64_OSVW_STATUS
:
2533 if (!guest_cpuid_has_osvw(vcpu
))
2535 data
= vcpu
->arch
.osvw
.status
;
2538 if (kvm_pmu_msr(vcpu
, msr
))
2539 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2541 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2544 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2552 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2555 * Read or write a bunch of msrs. All parameters are kernel addresses.
2557 * @return number of msrs set successfully.
2559 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2560 struct kvm_msr_entry
*entries
,
2561 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2562 unsigned index
, u64
*data
))
2566 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2567 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2568 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2570 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2576 * Read or write a bunch of msrs. Parameters are user addresses.
2578 * @return number of msrs set successfully.
2580 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2581 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2582 unsigned index
, u64
*data
),
2585 struct kvm_msrs msrs
;
2586 struct kvm_msr_entry
*entries
;
2591 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2595 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2598 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2599 entries
= memdup_user(user_msrs
->entries
, size
);
2600 if (IS_ERR(entries
)) {
2601 r
= PTR_ERR(entries
);
2605 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2610 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2621 int kvm_dev_ioctl_check_extension(long ext
)
2626 case KVM_CAP_IRQCHIP
:
2628 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2629 case KVM_CAP_SET_TSS_ADDR
:
2630 case KVM_CAP_EXT_CPUID
:
2631 case KVM_CAP_EXT_EMUL_CPUID
:
2632 case KVM_CAP_CLOCKSOURCE
:
2634 case KVM_CAP_NOP_IO_DELAY
:
2635 case KVM_CAP_MP_STATE
:
2636 case KVM_CAP_SYNC_MMU
:
2637 case KVM_CAP_USER_NMI
:
2638 case KVM_CAP_REINJECT_CONTROL
:
2639 case KVM_CAP_IRQ_INJECT_STATUS
:
2641 case KVM_CAP_IOEVENTFD
:
2643 case KVM_CAP_PIT_STATE2
:
2644 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2645 case KVM_CAP_XEN_HVM
:
2646 case KVM_CAP_ADJUST_CLOCK
:
2647 case KVM_CAP_VCPU_EVENTS
:
2648 case KVM_CAP_HYPERV
:
2649 case KVM_CAP_HYPERV_VAPIC
:
2650 case KVM_CAP_HYPERV_SPIN
:
2651 case KVM_CAP_PCI_SEGMENT
:
2652 case KVM_CAP_DEBUGREGS
:
2653 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2655 case KVM_CAP_ASYNC_PF
:
2656 case KVM_CAP_GET_TSC_KHZ
:
2657 case KVM_CAP_KVMCLOCK_CTRL
:
2658 case KVM_CAP_READONLY_MEM
:
2659 case KVM_CAP_HYPERV_TIME
:
2660 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2661 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2662 case KVM_CAP_ASSIGN_DEV_IRQ
:
2663 case KVM_CAP_PCI_2_3
:
2667 case KVM_CAP_COALESCED_MMIO
:
2668 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2671 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2673 case KVM_CAP_NR_VCPUS
:
2674 r
= KVM_SOFT_MAX_VCPUS
;
2676 case KVM_CAP_MAX_VCPUS
:
2679 case KVM_CAP_NR_MEMSLOTS
:
2680 r
= KVM_USER_MEM_SLOTS
;
2682 case KVM_CAP_PV_MMU
: /* obsolete */
2685 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2687 r
= iommu_present(&pci_bus_type
);
2691 r
= KVM_MAX_MCE_BANKS
;
2696 case KVM_CAP_TSC_CONTROL
:
2697 r
= kvm_has_tsc_control
;
2699 case KVM_CAP_TSC_DEADLINE_TIMER
:
2700 r
= boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER
);
2710 long kvm_arch_dev_ioctl(struct file
*filp
,
2711 unsigned int ioctl
, unsigned long arg
)
2713 void __user
*argp
= (void __user
*)arg
;
2717 case KVM_GET_MSR_INDEX_LIST
: {
2718 struct kvm_msr_list __user
*user_msr_list
= argp
;
2719 struct kvm_msr_list msr_list
;
2723 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2726 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2727 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2730 if (n
< msr_list
.nmsrs
)
2733 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2734 num_msrs_to_save
* sizeof(u32
)))
2736 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2738 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2743 case KVM_GET_SUPPORTED_CPUID
:
2744 case KVM_GET_EMULATED_CPUID
: {
2745 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2746 struct kvm_cpuid2 cpuid
;
2749 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2752 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2758 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2763 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2766 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2768 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2780 static void wbinvd_ipi(void *garbage
)
2785 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2787 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2790 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2792 /* Address WBINVD may be executed by guest */
2793 if (need_emulate_wbinvd(vcpu
)) {
2794 if (kvm_x86_ops
->has_wbinvd_exit())
2795 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2796 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2797 smp_call_function_single(vcpu
->cpu
,
2798 wbinvd_ipi
, NULL
, 1);
2801 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2803 /* Apply any externally detected TSC adjustments (due to suspend) */
2804 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2805 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2806 vcpu
->arch
.tsc_offset_adjustment
= 0;
2807 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
2810 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2811 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2812 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2814 mark_tsc_unstable("KVM discovered backwards TSC");
2815 if (check_tsc_unstable()) {
2816 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2817 vcpu
->arch
.last_guest_tsc
);
2818 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2819 vcpu
->arch
.tsc_catchup
= 1;
2822 * On a host with synchronized TSC, there is no need to update
2823 * kvmclock on vcpu->cpu migration
2825 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2826 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2827 if (vcpu
->cpu
!= cpu
)
2828 kvm_migrate_timers(vcpu
);
2832 accumulate_steal_time(vcpu
);
2833 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2836 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2838 kvm_x86_ops
->vcpu_put(vcpu
);
2839 kvm_put_guest_fpu(vcpu
);
2840 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2843 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2844 struct kvm_lapic_state
*s
)
2846 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2847 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2852 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2853 struct kvm_lapic_state
*s
)
2855 kvm_apic_post_state_restore(vcpu
, s
);
2856 update_cr8_intercept(vcpu
);
2861 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2862 struct kvm_interrupt
*irq
)
2864 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2866 if (irqchip_in_kernel(vcpu
->kvm
))
2869 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2870 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2875 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2877 kvm_inject_nmi(vcpu
);
2882 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2883 struct kvm_tpr_access_ctl
*tac
)
2887 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2891 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2895 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2898 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2900 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2903 vcpu
->arch
.mcg_cap
= mcg_cap
;
2904 /* Init IA32_MCG_CTL to all 1s */
2905 if (mcg_cap
& MCG_CTL_P
)
2906 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2907 /* Init IA32_MCi_CTL to all 1s */
2908 for (bank
= 0; bank
< bank_num
; bank
++)
2909 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2914 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2915 struct kvm_x86_mce
*mce
)
2917 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2918 unsigned bank_num
= mcg_cap
& 0xff;
2919 u64
*banks
= vcpu
->arch
.mce_banks
;
2921 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2924 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2925 * reporting is disabled
2927 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2928 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2930 banks
+= 4 * mce
->bank
;
2932 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2933 * reporting is disabled for the bank
2935 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2937 if (mce
->status
& MCI_STATUS_UC
) {
2938 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2939 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2940 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2943 if (banks
[1] & MCI_STATUS_VAL
)
2944 mce
->status
|= MCI_STATUS_OVER
;
2945 banks
[2] = mce
->addr
;
2946 banks
[3] = mce
->misc
;
2947 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2948 banks
[1] = mce
->status
;
2949 kvm_queue_exception(vcpu
, MC_VECTOR
);
2950 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2951 || !(banks
[1] & MCI_STATUS_UC
)) {
2952 if (banks
[1] & MCI_STATUS_VAL
)
2953 mce
->status
|= MCI_STATUS_OVER
;
2954 banks
[2] = mce
->addr
;
2955 banks
[3] = mce
->misc
;
2956 banks
[1] = mce
->status
;
2958 banks
[1] |= MCI_STATUS_OVER
;
2962 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2963 struct kvm_vcpu_events
*events
)
2966 events
->exception
.injected
=
2967 vcpu
->arch
.exception
.pending
&&
2968 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2969 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2970 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2971 events
->exception
.pad
= 0;
2972 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2974 events
->interrupt
.injected
=
2975 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2976 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2977 events
->interrupt
.soft
= 0;
2978 events
->interrupt
.shadow
=
2979 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2980 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2982 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2983 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2984 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2985 events
->nmi
.pad
= 0;
2987 events
->sipi_vector
= 0; /* never valid when reporting to user space */
2989 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2990 | KVM_VCPUEVENT_VALID_SHADOW
);
2991 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2994 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2995 struct kvm_vcpu_events
*events
)
2997 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2998 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2999 | KVM_VCPUEVENT_VALID_SHADOW
))
3003 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3004 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3005 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3006 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3008 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3009 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3010 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3011 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3012 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3013 events
->interrupt
.shadow
);
3015 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3016 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3017 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3018 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3020 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3021 kvm_vcpu_has_lapic(vcpu
))
3022 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3024 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3029 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3030 struct kvm_debugregs
*dbgregs
)
3034 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3035 _kvm_get_dr(vcpu
, 6, &val
);
3037 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3039 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3042 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3043 struct kvm_debugregs
*dbgregs
)
3048 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3049 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3050 kvm_update_dr6(vcpu
);
3051 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3052 kvm_update_dr7(vcpu
);
3057 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3058 struct kvm_xsave
*guest_xsave
)
3060 if (cpu_has_xsave
) {
3061 memcpy(guest_xsave
->region
,
3062 &vcpu
->arch
.guest_fpu
.state
->xsave
,
3063 vcpu
->arch
.guest_xstate_size
);
3064 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] &=
3065 vcpu
->arch
.guest_supported_xcr0
| XSTATE_FPSSE
;
3067 memcpy(guest_xsave
->region
,
3068 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
3069 sizeof(struct i387_fxsave_struct
));
3070 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3075 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3076 struct kvm_xsave
*guest_xsave
)
3079 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3081 if (cpu_has_xsave
) {
3083 * Here we allow setting states that are not present in
3084 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3085 * with old userspace.
3087 if (xstate_bv
& ~kvm_supported_xcr0())
3089 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
3090 guest_xsave
->region
, vcpu
->arch
.guest_xstate_size
);
3092 if (xstate_bv
& ~XSTATE_FPSSE
)
3094 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
3095 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
3100 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3101 struct kvm_xcrs
*guest_xcrs
)
3103 if (!cpu_has_xsave
) {
3104 guest_xcrs
->nr_xcrs
= 0;
3108 guest_xcrs
->nr_xcrs
= 1;
3109 guest_xcrs
->flags
= 0;
3110 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3111 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3114 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3115 struct kvm_xcrs
*guest_xcrs
)
3122 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3125 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3126 /* Only support XCR0 currently */
3127 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3128 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3129 guest_xcrs
->xcrs
[i
].value
);
3138 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3139 * stopped by the hypervisor. This function will be called from the host only.
3140 * EINVAL is returned when the host attempts to set the flag for a guest that
3141 * does not support pv clocks.
3143 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3145 if (!vcpu
->arch
.pv_time_enabled
)
3147 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3148 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3152 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3153 unsigned int ioctl
, unsigned long arg
)
3155 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3156 void __user
*argp
= (void __user
*)arg
;
3159 struct kvm_lapic_state
*lapic
;
3160 struct kvm_xsave
*xsave
;
3161 struct kvm_xcrs
*xcrs
;
3167 case KVM_GET_LAPIC
: {
3169 if (!vcpu
->arch
.apic
)
3171 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3176 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3180 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3185 case KVM_SET_LAPIC
: {
3187 if (!vcpu
->arch
.apic
)
3189 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3190 if (IS_ERR(u
.lapic
))
3191 return PTR_ERR(u
.lapic
);
3193 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3196 case KVM_INTERRUPT
: {
3197 struct kvm_interrupt irq
;
3200 if (copy_from_user(&irq
, argp
, sizeof irq
))
3202 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3206 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3209 case KVM_SET_CPUID
: {
3210 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3211 struct kvm_cpuid cpuid
;
3214 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3216 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3219 case KVM_SET_CPUID2
: {
3220 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3221 struct kvm_cpuid2 cpuid
;
3224 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3226 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3227 cpuid_arg
->entries
);
3230 case KVM_GET_CPUID2
: {
3231 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3232 struct kvm_cpuid2 cpuid
;
3235 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3237 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3238 cpuid_arg
->entries
);
3242 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3248 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
3251 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3253 case KVM_TPR_ACCESS_REPORTING
: {
3254 struct kvm_tpr_access_ctl tac
;
3257 if (copy_from_user(&tac
, argp
, sizeof tac
))
3259 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3263 if (copy_to_user(argp
, &tac
, sizeof tac
))
3268 case KVM_SET_VAPIC_ADDR
: {
3269 struct kvm_vapic_addr va
;
3272 if (!irqchip_in_kernel(vcpu
->kvm
))
3275 if (copy_from_user(&va
, argp
, sizeof va
))
3277 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3280 case KVM_X86_SETUP_MCE
: {
3284 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3286 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3289 case KVM_X86_SET_MCE
: {
3290 struct kvm_x86_mce mce
;
3293 if (copy_from_user(&mce
, argp
, sizeof mce
))
3295 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3298 case KVM_GET_VCPU_EVENTS
: {
3299 struct kvm_vcpu_events events
;
3301 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3304 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3309 case KVM_SET_VCPU_EVENTS
: {
3310 struct kvm_vcpu_events events
;
3313 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3316 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3319 case KVM_GET_DEBUGREGS
: {
3320 struct kvm_debugregs dbgregs
;
3322 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3325 if (copy_to_user(argp
, &dbgregs
,
3326 sizeof(struct kvm_debugregs
)))
3331 case KVM_SET_DEBUGREGS
: {
3332 struct kvm_debugregs dbgregs
;
3335 if (copy_from_user(&dbgregs
, argp
,
3336 sizeof(struct kvm_debugregs
)))
3339 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3342 case KVM_GET_XSAVE
: {
3343 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3348 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3351 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3356 case KVM_SET_XSAVE
: {
3357 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3358 if (IS_ERR(u
.xsave
))
3359 return PTR_ERR(u
.xsave
);
3361 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3364 case KVM_GET_XCRS
: {
3365 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3370 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3373 if (copy_to_user(argp
, u
.xcrs
,
3374 sizeof(struct kvm_xcrs
)))
3379 case KVM_SET_XCRS
: {
3380 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3382 return PTR_ERR(u
.xcrs
);
3384 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3387 case KVM_SET_TSC_KHZ
: {
3391 user_tsc_khz
= (u32
)arg
;
3393 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3396 if (user_tsc_khz
== 0)
3397 user_tsc_khz
= tsc_khz
;
3399 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3404 case KVM_GET_TSC_KHZ
: {
3405 r
= vcpu
->arch
.virtual_tsc_khz
;
3408 case KVM_KVMCLOCK_CTRL
: {
3409 r
= kvm_set_guest_paused(vcpu
);
3420 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3422 return VM_FAULT_SIGBUS
;
3425 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3429 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3431 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3435 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3438 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3442 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3443 u32 kvm_nr_mmu_pages
)
3445 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3448 mutex_lock(&kvm
->slots_lock
);
3450 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3451 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3453 mutex_unlock(&kvm
->slots_lock
);
3457 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3459 return kvm
->arch
.n_max_mmu_pages
;
3462 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3467 switch (chip
->chip_id
) {
3468 case KVM_IRQCHIP_PIC_MASTER
:
3469 memcpy(&chip
->chip
.pic
,
3470 &pic_irqchip(kvm
)->pics
[0],
3471 sizeof(struct kvm_pic_state
));
3473 case KVM_IRQCHIP_PIC_SLAVE
:
3474 memcpy(&chip
->chip
.pic
,
3475 &pic_irqchip(kvm
)->pics
[1],
3476 sizeof(struct kvm_pic_state
));
3478 case KVM_IRQCHIP_IOAPIC
:
3479 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3488 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3493 switch (chip
->chip_id
) {
3494 case KVM_IRQCHIP_PIC_MASTER
:
3495 spin_lock(&pic_irqchip(kvm
)->lock
);
3496 memcpy(&pic_irqchip(kvm
)->pics
[0],
3498 sizeof(struct kvm_pic_state
));
3499 spin_unlock(&pic_irqchip(kvm
)->lock
);
3501 case KVM_IRQCHIP_PIC_SLAVE
:
3502 spin_lock(&pic_irqchip(kvm
)->lock
);
3503 memcpy(&pic_irqchip(kvm
)->pics
[1],
3505 sizeof(struct kvm_pic_state
));
3506 spin_unlock(&pic_irqchip(kvm
)->lock
);
3508 case KVM_IRQCHIP_IOAPIC
:
3509 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3515 kvm_pic_update_irq(pic_irqchip(kvm
));
3519 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3523 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3524 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3525 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3529 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3533 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3534 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3535 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3536 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3540 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3544 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3545 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3546 sizeof(ps
->channels
));
3547 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3548 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3549 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3553 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3555 int r
= 0, start
= 0;
3556 u32 prev_legacy
, cur_legacy
;
3557 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3558 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3559 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3560 if (!prev_legacy
&& cur_legacy
)
3562 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3563 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3564 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3565 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3566 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3570 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3571 struct kvm_reinject_control
*control
)
3573 if (!kvm
->arch
.vpit
)
3575 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3576 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3577 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3582 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3583 * @kvm: kvm instance
3584 * @log: slot id and address to which we copy the log
3586 * We need to keep it in mind that VCPU threads can write to the bitmap
3587 * concurrently. So, to avoid losing data, we keep the following order for
3590 * 1. Take a snapshot of the bit and clear it if needed.
3591 * 2. Write protect the corresponding page.
3592 * 3. Flush TLB's if needed.
3593 * 4. Copy the snapshot to the userspace.
3595 * Between 2 and 3, the guest may write to the page using the remaining TLB
3596 * entry. This is not a problem because the page will be reported dirty at
3597 * step 4 using the snapshot taken before and step 3 ensures that successive
3598 * writes will be logged for the next call.
3600 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3603 struct kvm_memory_slot
*memslot
;
3605 unsigned long *dirty_bitmap
;
3606 unsigned long *dirty_bitmap_buffer
;
3607 bool is_dirty
= false;
3609 mutex_lock(&kvm
->slots_lock
);
3612 if (log
->slot
>= KVM_USER_MEM_SLOTS
)
3615 memslot
= id_to_memslot(kvm
->memslots
, log
->slot
);
3617 dirty_bitmap
= memslot
->dirty_bitmap
;
3622 n
= kvm_dirty_bitmap_bytes(memslot
);
3624 dirty_bitmap_buffer
= dirty_bitmap
+ n
/ sizeof(long);
3625 memset(dirty_bitmap_buffer
, 0, n
);
3627 spin_lock(&kvm
->mmu_lock
);
3629 for (i
= 0; i
< n
/ sizeof(long); i
++) {
3633 if (!dirty_bitmap
[i
])
3638 mask
= xchg(&dirty_bitmap
[i
], 0);
3639 dirty_bitmap_buffer
[i
] = mask
;
3641 offset
= i
* BITS_PER_LONG
;
3642 kvm_mmu_write_protect_pt_masked(kvm
, memslot
, offset
, mask
);
3645 kvm_flush_remote_tlbs(kvm
);
3647 spin_unlock(&kvm
->mmu_lock
);
3650 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap_buffer
, n
))
3655 mutex_unlock(&kvm
->slots_lock
);
3659 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3662 if (!irqchip_in_kernel(kvm
))
3665 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3666 irq_event
->irq
, irq_event
->level
,
3671 long kvm_arch_vm_ioctl(struct file
*filp
,
3672 unsigned int ioctl
, unsigned long arg
)
3674 struct kvm
*kvm
= filp
->private_data
;
3675 void __user
*argp
= (void __user
*)arg
;
3678 * This union makes it completely explicit to gcc-3.x
3679 * that these two variables' stack usage should be
3680 * combined, not added together.
3683 struct kvm_pit_state ps
;
3684 struct kvm_pit_state2 ps2
;
3685 struct kvm_pit_config pit_config
;
3689 case KVM_SET_TSS_ADDR
:
3690 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3692 case KVM_SET_IDENTITY_MAP_ADDR
: {
3696 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3698 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3701 case KVM_SET_NR_MMU_PAGES
:
3702 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3704 case KVM_GET_NR_MMU_PAGES
:
3705 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3707 case KVM_CREATE_IRQCHIP
: {
3708 struct kvm_pic
*vpic
;
3710 mutex_lock(&kvm
->lock
);
3713 goto create_irqchip_unlock
;
3715 if (atomic_read(&kvm
->online_vcpus
))
3716 goto create_irqchip_unlock
;
3718 vpic
= kvm_create_pic(kvm
);
3720 r
= kvm_ioapic_init(kvm
);
3722 mutex_lock(&kvm
->slots_lock
);
3723 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3725 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3727 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3729 mutex_unlock(&kvm
->slots_lock
);
3731 goto create_irqchip_unlock
;
3734 goto create_irqchip_unlock
;
3736 kvm
->arch
.vpic
= vpic
;
3738 r
= kvm_setup_default_irq_routing(kvm
);
3740 mutex_lock(&kvm
->slots_lock
);
3741 mutex_lock(&kvm
->irq_lock
);
3742 kvm_ioapic_destroy(kvm
);
3743 kvm_destroy_pic(kvm
);
3744 mutex_unlock(&kvm
->irq_lock
);
3745 mutex_unlock(&kvm
->slots_lock
);
3747 create_irqchip_unlock
:
3748 mutex_unlock(&kvm
->lock
);
3751 case KVM_CREATE_PIT
:
3752 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3754 case KVM_CREATE_PIT2
:
3756 if (copy_from_user(&u
.pit_config
, argp
,
3757 sizeof(struct kvm_pit_config
)))
3760 mutex_lock(&kvm
->slots_lock
);
3763 goto create_pit_unlock
;
3765 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3769 mutex_unlock(&kvm
->slots_lock
);
3771 case KVM_GET_IRQCHIP
: {
3772 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3773 struct kvm_irqchip
*chip
;
3775 chip
= memdup_user(argp
, sizeof(*chip
));
3782 if (!irqchip_in_kernel(kvm
))
3783 goto get_irqchip_out
;
3784 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3786 goto get_irqchip_out
;
3788 if (copy_to_user(argp
, chip
, sizeof *chip
))
3789 goto get_irqchip_out
;
3795 case KVM_SET_IRQCHIP
: {
3796 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3797 struct kvm_irqchip
*chip
;
3799 chip
= memdup_user(argp
, sizeof(*chip
));
3806 if (!irqchip_in_kernel(kvm
))
3807 goto set_irqchip_out
;
3808 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3810 goto set_irqchip_out
;
3818 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3821 if (!kvm
->arch
.vpit
)
3823 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3827 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3834 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3837 if (!kvm
->arch
.vpit
)
3839 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3842 case KVM_GET_PIT2
: {
3844 if (!kvm
->arch
.vpit
)
3846 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3850 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3855 case KVM_SET_PIT2
: {
3857 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3860 if (!kvm
->arch
.vpit
)
3862 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3865 case KVM_REINJECT_CONTROL
: {
3866 struct kvm_reinject_control control
;
3868 if (copy_from_user(&control
, argp
, sizeof(control
)))
3870 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3873 case KVM_XEN_HVM_CONFIG
: {
3875 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3876 sizeof(struct kvm_xen_hvm_config
)))
3879 if (kvm
->arch
.xen_hvm_config
.flags
)
3884 case KVM_SET_CLOCK
: {
3885 struct kvm_clock_data user_ns
;
3890 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3898 local_irq_disable();
3899 now_ns
= get_kernel_ns();
3900 delta
= user_ns
.clock
- now_ns
;
3902 kvm
->arch
.kvmclock_offset
= delta
;
3903 kvm_gen_update_masterclock(kvm
);
3906 case KVM_GET_CLOCK
: {
3907 struct kvm_clock_data user_ns
;
3910 local_irq_disable();
3911 now_ns
= get_kernel_ns();
3912 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3915 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3918 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3931 static void kvm_init_msr_list(void)
3936 /* skip the first msrs in the list. KVM-specific */
3937 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3938 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3942 * Even MSRs that are valid in the host may not be exposed
3943 * to the guests in some cases. We could work around this
3944 * in VMX with the generic MSR save/load machinery, but it
3945 * is not really worthwhile since it will really only
3946 * happen with nested virtualization.
3948 switch (msrs_to_save
[i
]) {
3949 case MSR_IA32_BNDCFGS
:
3950 if (!kvm_x86_ops
->mpx_supported())
3958 msrs_to_save
[j
] = msrs_to_save
[i
];
3961 num_msrs_to_save
= j
;
3964 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3972 if (!(vcpu
->arch
.apic
&&
3973 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3974 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3985 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3992 if (!(vcpu
->arch
.apic
&&
3993 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3994 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3996 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4006 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4007 struct kvm_segment
*var
, int seg
)
4009 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4012 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4013 struct kvm_segment
*var
, int seg
)
4015 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4018 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
4021 struct x86_exception exception
;
4023 BUG_ON(!mmu_is_nested(vcpu
));
4025 /* NPT walks are always user-walks */
4026 access
|= PFERR_USER_MASK
;
4027 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
4032 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4033 struct x86_exception
*exception
)
4035 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4036 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4039 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4040 struct x86_exception
*exception
)
4042 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4043 access
|= PFERR_FETCH_MASK
;
4044 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4047 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4048 struct x86_exception
*exception
)
4050 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4051 access
|= PFERR_WRITE_MASK
;
4052 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4055 /* uses this to access any guest's mapped memory without checking CPL */
4056 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4057 struct x86_exception
*exception
)
4059 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4062 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4063 struct kvm_vcpu
*vcpu
, u32 access
,
4064 struct x86_exception
*exception
)
4067 int r
= X86EMUL_CONTINUE
;
4070 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4072 unsigned offset
= addr
& (PAGE_SIZE
-1);
4073 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4076 if (gpa
== UNMAPPED_GVA
)
4077 return X86EMUL_PROPAGATE_FAULT
;
4078 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
4080 r
= X86EMUL_IO_NEEDED
;
4092 /* used for instruction fetching */
4093 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4094 gva_t addr
, void *val
, unsigned int bytes
,
4095 struct x86_exception
*exception
)
4097 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4098 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4100 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4101 access
| PFERR_FETCH_MASK
,
4105 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4106 gva_t addr
, void *val
, unsigned int bytes
,
4107 struct x86_exception
*exception
)
4109 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4110 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4112 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4115 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4117 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4118 gva_t addr
, void *val
, unsigned int bytes
,
4119 struct x86_exception
*exception
)
4121 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4122 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4125 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4126 gva_t addr
, void *val
,
4128 struct x86_exception
*exception
)
4130 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4132 int r
= X86EMUL_CONTINUE
;
4135 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4138 unsigned offset
= addr
& (PAGE_SIZE
-1);
4139 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4142 if (gpa
== UNMAPPED_GVA
)
4143 return X86EMUL_PROPAGATE_FAULT
;
4144 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
4146 r
= X86EMUL_IO_NEEDED
;
4157 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4159 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4160 gpa_t
*gpa
, struct x86_exception
*exception
,
4163 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4164 | (write
? PFERR_WRITE_MASK
: 0);
4166 if (vcpu_match_mmio_gva(vcpu
, gva
)
4167 && !permission_fault(vcpu
->arch
.walk_mmu
, vcpu
->arch
.access
, access
)) {
4168 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4169 (gva
& (PAGE_SIZE
- 1));
4170 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4174 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4176 if (*gpa
== UNMAPPED_GVA
)
4179 /* For APIC access vmexit */
4180 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4183 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4184 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4191 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4192 const void *val
, int bytes
)
4196 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4199 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4203 struct read_write_emulator_ops
{
4204 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4206 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4207 void *val
, int bytes
);
4208 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4209 int bytes
, void *val
);
4210 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4211 void *val
, int bytes
);
4215 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4217 if (vcpu
->mmio_read_completed
) {
4218 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4219 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4220 vcpu
->mmio_read_completed
= 0;
4227 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4228 void *val
, int bytes
)
4230 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4233 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4234 void *val
, int bytes
)
4236 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4239 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4241 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4242 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4245 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4246 void *val
, int bytes
)
4248 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4249 return X86EMUL_IO_NEEDED
;
4252 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4253 void *val
, int bytes
)
4255 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4257 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4258 return X86EMUL_CONTINUE
;
4261 static const struct read_write_emulator_ops read_emultor
= {
4262 .read_write_prepare
= read_prepare
,
4263 .read_write_emulate
= read_emulate
,
4264 .read_write_mmio
= vcpu_mmio_read
,
4265 .read_write_exit_mmio
= read_exit_mmio
,
4268 static const struct read_write_emulator_ops write_emultor
= {
4269 .read_write_emulate
= write_emulate
,
4270 .read_write_mmio
= write_mmio
,
4271 .read_write_exit_mmio
= write_exit_mmio
,
4275 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4277 struct x86_exception
*exception
,
4278 struct kvm_vcpu
*vcpu
,
4279 const struct read_write_emulator_ops
*ops
)
4283 bool write
= ops
->write
;
4284 struct kvm_mmio_fragment
*frag
;
4286 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4289 return X86EMUL_PROPAGATE_FAULT
;
4291 /* For APIC access vmexit */
4295 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4296 return X86EMUL_CONTINUE
;
4300 * Is this MMIO handled locally?
4302 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4303 if (handled
== bytes
)
4304 return X86EMUL_CONTINUE
;
4310 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4311 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4315 return X86EMUL_CONTINUE
;
4318 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
4319 void *val
, unsigned int bytes
,
4320 struct x86_exception
*exception
,
4321 const struct read_write_emulator_ops
*ops
)
4323 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4327 if (ops
->read_write_prepare
&&
4328 ops
->read_write_prepare(vcpu
, val
, bytes
))
4329 return X86EMUL_CONTINUE
;
4331 vcpu
->mmio_nr_fragments
= 0;
4333 /* Crossing a page boundary? */
4334 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4337 now
= -addr
& ~PAGE_MASK
;
4338 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4341 if (rc
!= X86EMUL_CONTINUE
)
4348 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4350 if (rc
!= X86EMUL_CONTINUE
)
4353 if (!vcpu
->mmio_nr_fragments
)
4356 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4358 vcpu
->mmio_needed
= 1;
4359 vcpu
->mmio_cur_fragment
= 0;
4361 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4362 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4363 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4364 vcpu
->run
->mmio
.phys_addr
= gpa
;
4366 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4369 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4373 struct x86_exception
*exception
)
4375 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4376 exception
, &read_emultor
);
4379 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4383 struct x86_exception
*exception
)
4385 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4386 exception
, &write_emultor
);
4389 #define CMPXCHG_TYPE(t, ptr, old, new) \
4390 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4392 #ifdef CONFIG_X86_64
4393 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4395 # define CMPXCHG64(ptr, old, new) \
4396 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4399 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4404 struct x86_exception
*exception
)
4406 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4412 /* guests cmpxchg8b have to be emulated atomically */
4413 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4416 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4418 if (gpa
== UNMAPPED_GVA
||
4419 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4422 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4425 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4426 if (is_error_page(page
))
4429 kaddr
= kmap_atomic(page
);
4430 kaddr
+= offset_in_page(gpa
);
4433 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4436 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4439 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4442 exchanged
= CMPXCHG64(kaddr
, old
, new);
4447 kunmap_atomic(kaddr
);
4448 kvm_release_page_dirty(page
);
4451 return X86EMUL_CMPXCHG_FAILED
;
4453 mark_page_dirty(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4454 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4456 return X86EMUL_CONTINUE
;
4459 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4461 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4464 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4466 /* TODO: String I/O for in kernel device */
4469 if (vcpu
->arch
.pio
.in
)
4470 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4471 vcpu
->arch
.pio
.size
, pd
);
4473 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4474 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4479 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4480 unsigned short port
, void *val
,
4481 unsigned int count
, bool in
)
4483 trace_kvm_pio(!in
, port
, size
, count
);
4485 vcpu
->arch
.pio
.port
= port
;
4486 vcpu
->arch
.pio
.in
= in
;
4487 vcpu
->arch
.pio
.count
= count
;
4488 vcpu
->arch
.pio
.size
= size
;
4490 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4491 vcpu
->arch
.pio
.count
= 0;
4495 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4496 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4497 vcpu
->run
->io
.size
= size
;
4498 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4499 vcpu
->run
->io
.count
= count
;
4500 vcpu
->run
->io
.port
= port
;
4505 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4506 int size
, unsigned short port
, void *val
,
4509 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4512 if (vcpu
->arch
.pio
.count
)
4515 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4518 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4519 vcpu
->arch
.pio
.count
= 0;
4526 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4527 int size
, unsigned short port
,
4528 const void *val
, unsigned int count
)
4530 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4532 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4533 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4536 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4538 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4541 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4543 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4546 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4548 if (!need_emulate_wbinvd(vcpu
))
4549 return X86EMUL_CONTINUE
;
4551 if (kvm_x86_ops
->has_wbinvd_exit()) {
4552 int cpu
= get_cpu();
4554 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4555 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4556 wbinvd_ipi
, NULL
, 1);
4558 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4561 return X86EMUL_CONTINUE
;
4563 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4565 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4567 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4570 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4572 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4575 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4578 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4581 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4583 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4586 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4588 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4589 unsigned long value
;
4593 value
= kvm_read_cr0(vcpu
);
4596 value
= vcpu
->arch
.cr2
;
4599 value
= kvm_read_cr3(vcpu
);
4602 value
= kvm_read_cr4(vcpu
);
4605 value
= kvm_get_cr8(vcpu
);
4608 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4615 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4617 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4622 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4625 vcpu
->arch
.cr2
= val
;
4628 res
= kvm_set_cr3(vcpu
, val
);
4631 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4634 res
= kvm_set_cr8(vcpu
, val
);
4637 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4644 static void emulator_set_rflags(struct x86_emulate_ctxt
*ctxt
, ulong val
)
4646 kvm_set_rflags(emul_to_vcpu(ctxt
), val
);
4649 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4651 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4654 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4656 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4659 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4661 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4664 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4666 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4669 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4671 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4674 static unsigned long emulator_get_cached_segment_base(
4675 struct x86_emulate_ctxt
*ctxt
, int seg
)
4677 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4680 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4681 struct desc_struct
*desc
, u32
*base3
,
4684 struct kvm_segment var
;
4686 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4687 *selector
= var
.selector
;
4690 memset(desc
, 0, sizeof(*desc
));
4696 set_desc_limit(desc
, var
.limit
);
4697 set_desc_base(desc
, (unsigned long)var
.base
);
4698 #ifdef CONFIG_X86_64
4700 *base3
= var
.base
>> 32;
4702 desc
->type
= var
.type
;
4704 desc
->dpl
= var
.dpl
;
4705 desc
->p
= var
.present
;
4706 desc
->avl
= var
.avl
;
4714 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4715 struct desc_struct
*desc
, u32 base3
,
4718 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4719 struct kvm_segment var
;
4721 var
.selector
= selector
;
4722 var
.base
= get_desc_base(desc
);
4723 #ifdef CONFIG_X86_64
4724 var
.base
|= ((u64
)base3
) << 32;
4726 var
.limit
= get_desc_limit(desc
);
4728 var
.limit
= (var
.limit
<< 12) | 0xfff;
4729 var
.type
= desc
->type
;
4730 var
.present
= desc
->p
;
4731 var
.dpl
= desc
->dpl
;
4736 var
.avl
= desc
->avl
;
4737 var
.present
= desc
->p
;
4738 var
.unusable
= !var
.present
;
4741 kvm_set_segment(vcpu
, &var
, seg
);
4745 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4746 u32 msr_index
, u64
*pdata
)
4748 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4751 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4752 u32 msr_index
, u64 data
)
4754 struct msr_data msr
;
4757 msr
.index
= msr_index
;
4758 msr
.host_initiated
= false;
4759 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4762 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4763 u32 pmc
, u64
*pdata
)
4765 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4768 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4770 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4773 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4776 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4778 * CR0.TS may reference the host fpu state, not the guest fpu state,
4779 * so it may be clear at this point.
4784 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4789 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4790 struct x86_instruction_info
*info
,
4791 enum x86_intercept_stage stage
)
4793 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4796 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4797 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4799 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4802 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4804 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4807 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4809 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4812 static const struct x86_emulate_ops emulate_ops
= {
4813 .read_gpr
= emulator_read_gpr
,
4814 .write_gpr
= emulator_write_gpr
,
4815 .read_std
= kvm_read_guest_virt_system
,
4816 .write_std
= kvm_write_guest_virt_system
,
4817 .fetch
= kvm_fetch_guest_virt
,
4818 .read_emulated
= emulator_read_emulated
,
4819 .write_emulated
= emulator_write_emulated
,
4820 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4821 .invlpg
= emulator_invlpg
,
4822 .pio_in_emulated
= emulator_pio_in_emulated
,
4823 .pio_out_emulated
= emulator_pio_out_emulated
,
4824 .get_segment
= emulator_get_segment
,
4825 .set_segment
= emulator_set_segment
,
4826 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4827 .get_gdt
= emulator_get_gdt
,
4828 .get_idt
= emulator_get_idt
,
4829 .set_gdt
= emulator_set_gdt
,
4830 .set_idt
= emulator_set_idt
,
4831 .get_cr
= emulator_get_cr
,
4832 .set_cr
= emulator_set_cr
,
4833 .set_rflags
= emulator_set_rflags
,
4834 .cpl
= emulator_get_cpl
,
4835 .get_dr
= emulator_get_dr
,
4836 .set_dr
= emulator_set_dr
,
4837 .set_msr
= emulator_set_msr
,
4838 .get_msr
= emulator_get_msr
,
4839 .read_pmc
= emulator_read_pmc
,
4840 .halt
= emulator_halt
,
4841 .wbinvd
= emulator_wbinvd
,
4842 .fix_hypercall
= emulator_fix_hypercall
,
4843 .get_fpu
= emulator_get_fpu
,
4844 .put_fpu
= emulator_put_fpu
,
4845 .intercept
= emulator_intercept
,
4846 .get_cpuid
= emulator_get_cpuid
,
4849 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4851 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4853 * an sti; sti; sequence only disable interrupts for the first
4854 * instruction. So, if the last instruction, be it emulated or
4855 * not, left the system with the INT_STI flag enabled, it
4856 * means that the last instruction is an sti. We should not
4857 * leave the flag on in this case. The same goes for mov ss
4859 if (!(int_shadow
& mask
))
4860 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4863 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4865 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4866 if (ctxt
->exception
.vector
== PF_VECTOR
)
4867 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4868 else if (ctxt
->exception
.error_code_valid
)
4869 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4870 ctxt
->exception
.error_code
);
4872 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4875 static void init_decode_cache(struct x86_emulate_ctxt
*ctxt
)
4877 memset(&ctxt
->opcode_len
, 0,
4878 (void *)&ctxt
->_regs
- (void *)&ctxt
->opcode_len
);
4880 ctxt
->fetch
.start
= 0;
4881 ctxt
->fetch
.end
= 0;
4882 ctxt
->io_read
.pos
= 0;
4883 ctxt
->io_read
.end
= 0;
4884 ctxt
->mem_read
.pos
= 0;
4885 ctxt
->mem_read
.end
= 0;
4888 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4890 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4893 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4895 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4896 ctxt
->eip
= kvm_rip_read(vcpu
);
4897 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4898 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4899 cs_l
? X86EMUL_MODE_PROT64
:
4900 cs_db
? X86EMUL_MODE_PROT32
:
4901 X86EMUL_MODE_PROT16
;
4902 ctxt
->guest_mode
= is_guest_mode(vcpu
);
4904 init_decode_cache(ctxt
);
4905 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4908 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4910 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4913 init_emulate_ctxt(vcpu
);
4917 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4918 ret
= emulate_int_real(ctxt
, irq
);
4920 if (ret
!= X86EMUL_CONTINUE
)
4921 return EMULATE_FAIL
;
4923 ctxt
->eip
= ctxt
->_eip
;
4924 kvm_rip_write(vcpu
, ctxt
->eip
);
4925 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4927 if (irq
== NMI_VECTOR
)
4928 vcpu
->arch
.nmi_pending
= 0;
4930 vcpu
->arch
.interrupt
.pending
= false;
4932 return EMULATE_DONE
;
4934 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4936 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4938 int r
= EMULATE_DONE
;
4940 ++vcpu
->stat
.insn_emulation_fail
;
4941 trace_kvm_emulate_insn_failed(vcpu
);
4942 if (!is_guest_mode(vcpu
)) {
4943 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4944 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4945 vcpu
->run
->internal
.ndata
= 0;
4948 kvm_queue_exception(vcpu
, UD_VECTOR
);
4953 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
4954 bool write_fault_to_shadow_pgtable
,
4960 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
4963 if (!vcpu
->arch
.mmu
.direct_map
) {
4965 * Write permission should be allowed since only
4966 * write access need to be emulated.
4968 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4971 * If the mapping is invalid in guest, let cpu retry
4972 * it to generate fault.
4974 if (gpa
== UNMAPPED_GVA
)
4979 * Do not retry the unhandleable instruction if it faults on the
4980 * readonly host memory, otherwise it will goto a infinite loop:
4981 * retry instruction -> write #PF -> emulation fail -> retry
4982 * instruction -> ...
4984 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
4987 * If the instruction failed on the error pfn, it can not be fixed,
4988 * report the error to userspace.
4990 if (is_error_noslot_pfn(pfn
))
4993 kvm_release_pfn_clean(pfn
);
4995 /* The instructions are well-emulated on direct mmu. */
4996 if (vcpu
->arch
.mmu
.direct_map
) {
4997 unsigned int indirect_shadow_pages
;
4999 spin_lock(&vcpu
->kvm
->mmu_lock
);
5000 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5001 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5003 if (indirect_shadow_pages
)
5004 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5010 * if emulation was due to access to shadowed page table
5011 * and it failed try to unshadow page and re-enter the
5012 * guest to let CPU execute the instruction.
5014 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5017 * If the access faults on its page table, it can not
5018 * be fixed by unprotecting shadow page and it should
5019 * be reported to userspace.
5021 return !write_fault_to_shadow_pgtable
;
5024 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5025 unsigned long cr2
, int emulation_type
)
5027 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5028 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5030 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5031 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5034 * If the emulation is caused by #PF and it is non-page_table
5035 * writing instruction, it means the VM-EXIT is caused by shadow
5036 * page protected, we can zap the shadow page and retry this
5037 * instruction directly.
5039 * Note: if the guest uses a non-page-table modifying instruction
5040 * on the PDE that points to the instruction, then we will unmap
5041 * the instruction and go to an infinite loop. So, we cache the
5042 * last retried eip and the last fault address, if we meet the eip
5043 * and the address again, we can break out of the potential infinite
5046 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5048 if (!(emulation_type
& EMULTYPE_RETRY
))
5051 if (x86_page_table_writing_insn(ctxt
))
5054 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5057 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5058 vcpu
->arch
.last_retry_addr
= cr2
;
5060 if (!vcpu
->arch
.mmu
.direct_map
)
5061 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5063 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5068 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5069 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5071 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5080 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5081 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5086 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5088 struct kvm_run
*kvm_run
= vcpu
->run
;
5091 * Use the "raw" value to see if TF was passed to the processor.
5092 * Note that the new value of the flags has not been saved yet.
5094 * This is correct even for TF set by the guest, because "the
5095 * processor will not generate this exception after the instruction
5096 * that sets the TF flag".
5098 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5100 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5101 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5102 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
;
5103 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5104 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5105 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5106 *r
= EMULATE_USER_EXIT
;
5108 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5110 * "Certain debug exceptions may clear bit 0-3. The
5111 * remaining contents of the DR6 register are never
5112 * cleared by the processor".
5114 vcpu
->arch
.dr6
&= ~15;
5115 vcpu
->arch
.dr6
|= DR6_BS
;
5116 kvm_queue_exception(vcpu
, DB_VECTOR
);
5121 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5123 struct kvm_run
*kvm_run
= vcpu
->run
;
5124 unsigned long eip
= vcpu
->arch
.emulate_ctxt
.eip
;
5127 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5128 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5129 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5130 vcpu
->arch
.guest_debug_dr7
,
5134 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
;
5135 kvm_run
->debug
.arch
.pc
= kvm_rip_read(vcpu
) +
5136 get_segment_base(vcpu
, VCPU_SREG_CS
);
5138 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5139 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5140 *r
= EMULATE_USER_EXIT
;
5145 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
)) {
5146 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5151 vcpu
->arch
.dr6
&= ~15;
5152 vcpu
->arch
.dr6
|= dr6
;
5153 kvm_queue_exception(vcpu
, DB_VECTOR
);
5162 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5169 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5170 bool writeback
= true;
5171 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5174 * Clear write_fault_to_shadow_pgtable here to ensure it is
5177 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5178 kvm_clear_exception_queue(vcpu
);
5180 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5181 init_emulate_ctxt(vcpu
);
5184 * We will reenter on the same instruction since
5185 * we do not set complete_userspace_io. This does not
5186 * handle watchpoints yet, those would be handled in
5189 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5192 ctxt
->interruptibility
= 0;
5193 ctxt
->have_exception
= false;
5194 ctxt
->perm_ok
= false;
5196 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5198 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5200 trace_kvm_emulate_insn_start(vcpu
);
5201 ++vcpu
->stat
.insn_emulation
;
5202 if (r
!= EMULATION_OK
) {
5203 if (emulation_type
& EMULTYPE_TRAP_UD
)
5204 return EMULATE_FAIL
;
5205 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5207 return EMULATE_DONE
;
5208 if (emulation_type
& EMULTYPE_SKIP
)
5209 return EMULATE_FAIL
;
5210 return handle_emulation_failure(vcpu
);
5214 if (emulation_type
& EMULTYPE_SKIP
) {
5215 kvm_rip_write(vcpu
, ctxt
->_eip
);
5216 return EMULATE_DONE
;
5219 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5220 return EMULATE_DONE
;
5222 /* this is needed for vmware backdoor interface to work since it
5223 changes registers values during IO operation */
5224 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5225 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5226 emulator_invalidate_register_cache(ctxt
);
5230 r
= x86_emulate_insn(ctxt
);
5232 if (r
== EMULATION_INTERCEPTED
)
5233 return EMULATE_DONE
;
5235 if (r
== EMULATION_FAILED
) {
5236 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5238 return EMULATE_DONE
;
5240 return handle_emulation_failure(vcpu
);
5243 if (ctxt
->have_exception
) {
5244 inject_emulated_exception(vcpu
);
5246 } else if (vcpu
->arch
.pio
.count
) {
5247 if (!vcpu
->arch
.pio
.in
) {
5248 /* FIXME: return into emulator if single-stepping. */
5249 vcpu
->arch
.pio
.count
= 0;
5252 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5254 r
= EMULATE_USER_EXIT
;
5255 } else if (vcpu
->mmio_needed
) {
5256 if (!vcpu
->mmio_is_write
)
5258 r
= EMULATE_USER_EXIT
;
5259 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5260 } else if (r
== EMULATION_RESTART
)
5266 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5267 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5268 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5269 kvm_rip_write(vcpu
, ctxt
->eip
);
5270 if (r
== EMULATE_DONE
)
5271 kvm_vcpu_check_singlestep(vcpu
, &r
);
5272 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5274 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5278 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5280 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5282 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5283 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5284 size
, port
, &val
, 1);
5285 /* do not return to emulator after return from userspace */
5286 vcpu
->arch
.pio
.count
= 0;
5289 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5291 static void tsc_bad(void *info
)
5293 __this_cpu_write(cpu_tsc_khz
, 0);
5296 static void tsc_khz_changed(void *data
)
5298 struct cpufreq_freqs
*freq
= data
;
5299 unsigned long khz
= 0;
5303 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5304 khz
= cpufreq_quick_get(raw_smp_processor_id());
5307 __this_cpu_write(cpu_tsc_khz
, khz
);
5310 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5313 struct cpufreq_freqs
*freq
= data
;
5315 struct kvm_vcpu
*vcpu
;
5316 int i
, send_ipi
= 0;
5319 * We allow guests to temporarily run on slowing clocks,
5320 * provided we notify them after, or to run on accelerating
5321 * clocks, provided we notify them before. Thus time never
5324 * However, we have a problem. We can't atomically update
5325 * the frequency of a given CPU from this function; it is
5326 * merely a notifier, which can be called from any CPU.
5327 * Changing the TSC frequency at arbitrary points in time
5328 * requires a recomputation of local variables related to
5329 * the TSC for each VCPU. We must flag these local variables
5330 * to be updated and be sure the update takes place with the
5331 * new frequency before any guests proceed.
5333 * Unfortunately, the combination of hotplug CPU and frequency
5334 * change creates an intractable locking scenario; the order
5335 * of when these callouts happen is undefined with respect to
5336 * CPU hotplug, and they can race with each other. As such,
5337 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5338 * undefined; you can actually have a CPU frequency change take
5339 * place in between the computation of X and the setting of the
5340 * variable. To protect against this problem, all updates of
5341 * the per_cpu tsc_khz variable are done in an interrupt
5342 * protected IPI, and all callers wishing to update the value
5343 * must wait for a synchronous IPI to complete (which is trivial
5344 * if the caller is on the CPU already). This establishes the
5345 * necessary total order on variable updates.
5347 * Note that because a guest time update may take place
5348 * anytime after the setting of the VCPU's request bit, the
5349 * correct TSC value must be set before the request. However,
5350 * to ensure the update actually makes it to any guest which
5351 * starts running in hardware virtualization between the set
5352 * and the acquisition of the spinlock, we must also ping the
5353 * CPU after setting the request bit.
5357 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5359 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5362 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5364 spin_lock(&kvm_lock
);
5365 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5366 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5367 if (vcpu
->cpu
!= freq
->cpu
)
5369 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5370 if (vcpu
->cpu
!= smp_processor_id())
5374 spin_unlock(&kvm_lock
);
5376 if (freq
->old
< freq
->new && send_ipi
) {
5378 * We upscale the frequency. Must make the guest
5379 * doesn't see old kvmclock values while running with
5380 * the new frequency, otherwise we risk the guest sees
5381 * time go backwards.
5383 * In case we update the frequency for another cpu
5384 * (which might be in guest context) send an interrupt
5385 * to kick the cpu out of guest context. Next time
5386 * guest context is entered kvmclock will be updated,
5387 * so the guest will not see stale values.
5389 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5394 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5395 .notifier_call
= kvmclock_cpufreq_notifier
5398 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5399 unsigned long action
, void *hcpu
)
5401 unsigned int cpu
= (unsigned long)hcpu
;
5405 case CPU_DOWN_FAILED
:
5406 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5408 case CPU_DOWN_PREPARE
:
5409 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5415 static struct notifier_block kvmclock_cpu_notifier_block
= {
5416 .notifier_call
= kvmclock_cpu_notifier
,
5417 .priority
= -INT_MAX
5420 static void kvm_timer_init(void)
5424 max_tsc_khz
= tsc_khz
;
5425 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5426 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5427 #ifdef CONFIG_CPU_FREQ
5428 struct cpufreq_policy policy
;
5429 memset(&policy
, 0, sizeof(policy
));
5431 cpufreq_get_policy(&policy
, cpu
);
5432 if (policy
.cpuinfo
.max_freq
)
5433 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5436 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5437 CPUFREQ_TRANSITION_NOTIFIER
);
5439 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5440 for_each_online_cpu(cpu
)
5441 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5444 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5446 int kvm_is_in_guest(void)
5448 return __this_cpu_read(current_vcpu
) != NULL
;
5451 static int kvm_is_user_mode(void)
5455 if (__this_cpu_read(current_vcpu
))
5456 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5458 return user_mode
!= 0;
5461 static unsigned long kvm_get_guest_ip(void)
5463 unsigned long ip
= 0;
5465 if (__this_cpu_read(current_vcpu
))
5466 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5471 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5472 .is_in_guest
= kvm_is_in_guest
,
5473 .is_user_mode
= kvm_is_user_mode
,
5474 .get_guest_ip
= kvm_get_guest_ip
,
5477 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5479 __this_cpu_write(current_vcpu
, vcpu
);
5481 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5483 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5485 __this_cpu_write(current_vcpu
, NULL
);
5487 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5489 static void kvm_set_mmio_spte_mask(void)
5492 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5495 * Set the reserved bits and the present bit of an paging-structure
5496 * entry to generate page fault with PFER.RSV = 1.
5498 /* Mask the reserved physical address bits. */
5499 mask
= ((1ull << (51 - maxphyaddr
+ 1)) - 1) << maxphyaddr
;
5501 /* Bit 62 is always reserved for 32bit host. */
5502 mask
|= 0x3ull
<< 62;
5504 /* Set the present bit. */
5507 #ifdef CONFIG_X86_64
5509 * If reserved bit is not supported, clear the present bit to disable
5512 if (maxphyaddr
== 52)
5516 kvm_mmu_set_mmio_spte_mask(mask
);
5519 #ifdef CONFIG_X86_64
5520 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5524 struct kvm_vcpu
*vcpu
;
5527 spin_lock(&kvm_lock
);
5528 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5529 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5530 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
, &vcpu
->requests
);
5531 atomic_set(&kvm_guest_has_master_clock
, 0);
5532 spin_unlock(&kvm_lock
);
5535 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5538 * Notification about pvclock gtod data update.
5540 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5543 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5544 struct timekeeper
*tk
= priv
;
5546 update_pvclock_gtod(tk
);
5548 /* disable master clock if host does not trust, or does not
5549 * use, TSC clocksource
5551 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5552 atomic_read(&kvm_guest_has_master_clock
) != 0)
5553 queue_work(system_long_wq
, &pvclock_gtod_work
);
5558 static struct notifier_block pvclock_gtod_notifier
= {
5559 .notifier_call
= pvclock_gtod_notify
,
5563 int kvm_arch_init(void *opaque
)
5566 struct kvm_x86_ops
*ops
= opaque
;
5569 printk(KERN_ERR
"kvm: already loaded the other module\n");
5574 if (!ops
->cpu_has_kvm_support()) {
5575 printk(KERN_ERR
"kvm: no hardware support\n");
5579 if (ops
->disabled_by_bios()) {
5580 printk(KERN_ERR
"kvm: disabled by bios\n");
5586 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5588 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5592 r
= kvm_mmu_module_init();
5594 goto out_free_percpu
;
5596 kvm_set_mmio_spte_mask();
5599 kvm_init_msr_list();
5601 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5602 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5606 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5609 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5612 #ifdef CONFIG_X86_64
5613 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5619 free_percpu(shared_msrs
);
5624 void kvm_arch_exit(void)
5626 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5628 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5629 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5630 CPUFREQ_TRANSITION_NOTIFIER
);
5631 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5632 #ifdef CONFIG_X86_64
5633 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5636 kvm_mmu_module_exit();
5637 free_percpu(shared_msrs
);
5640 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5642 ++vcpu
->stat
.halt_exits
;
5643 if (irqchip_in_kernel(vcpu
->kvm
)) {
5644 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5647 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5651 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5653 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5655 u64 param
, ingpa
, outgpa
, ret
;
5656 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5657 bool fast
, longmode
;
5661 * hypercall generates UD from non zero cpl and real mode
5664 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5665 kvm_queue_exception(vcpu
, UD_VECTOR
);
5669 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5670 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
5673 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5674 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5675 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5676 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5677 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5678 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5680 #ifdef CONFIG_X86_64
5682 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5683 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5684 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5688 code
= param
& 0xffff;
5689 fast
= (param
>> 16) & 0x1;
5690 rep_cnt
= (param
>> 32) & 0xfff;
5691 rep_idx
= (param
>> 48) & 0xfff;
5693 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5696 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5697 kvm_vcpu_on_spin(vcpu
);
5700 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5704 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5706 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5708 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5709 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5716 * kvm_pv_kick_cpu_op: Kick a vcpu.
5718 * @apicid - apicid of vcpu to be kicked.
5720 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5722 struct kvm_lapic_irq lapic_irq
;
5724 lapic_irq
.shorthand
= 0;
5725 lapic_irq
.dest_mode
= 0;
5726 lapic_irq
.dest_id
= apicid
;
5728 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5729 kvm_irq_delivery_to_apic(kvm
, 0, &lapic_irq
, NULL
);
5732 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5734 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5737 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5738 return kvm_hv_hypercall(vcpu
);
5740 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5741 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5742 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5743 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5744 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5746 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5748 if (!is_long_mode(vcpu
)) {
5756 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5762 case KVM_HC_VAPIC_POLL_IRQ
:
5765 case KVM_HC_KICK_CPU
:
5766 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5774 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5775 ++vcpu
->stat
.hypercalls
;
5778 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5780 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5782 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5783 char instruction
[3];
5784 unsigned long rip
= kvm_rip_read(vcpu
);
5786 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5788 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5792 * Check if userspace requested an interrupt window, and that the
5793 * interrupt window is open.
5795 * No need to exit to userspace if we already have an interrupt queued.
5797 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5799 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5800 vcpu
->run
->request_interrupt_window
&&
5801 kvm_arch_interrupt_allowed(vcpu
));
5804 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5806 struct kvm_run
*kvm_run
= vcpu
->run
;
5808 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5809 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5810 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5811 if (irqchip_in_kernel(vcpu
->kvm
))
5812 kvm_run
->ready_for_interrupt_injection
= 1;
5814 kvm_run
->ready_for_interrupt_injection
=
5815 kvm_arch_interrupt_allowed(vcpu
) &&
5816 !kvm_cpu_has_interrupt(vcpu
) &&
5817 !kvm_event_needs_reinjection(vcpu
);
5820 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5824 if (!kvm_x86_ops
->update_cr8_intercept
)
5827 if (!vcpu
->arch
.apic
)
5830 if (!vcpu
->arch
.apic
->vapic_addr
)
5831 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5838 tpr
= kvm_lapic_get_cr8(vcpu
);
5840 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5843 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
5847 /* try to reinject previous events if any */
5848 if (vcpu
->arch
.exception
.pending
) {
5849 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5850 vcpu
->arch
.exception
.has_error_code
,
5851 vcpu
->arch
.exception
.error_code
);
5852 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5853 vcpu
->arch
.exception
.has_error_code
,
5854 vcpu
->arch
.exception
.error_code
,
5855 vcpu
->arch
.exception
.reinject
);
5859 if (vcpu
->arch
.nmi_injected
) {
5860 kvm_x86_ops
->set_nmi(vcpu
);
5864 if (vcpu
->arch
.interrupt
.pending
) {
5865 kvm_x86_ops
->set_irq(vcpu
);
5869 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
5870 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
5875 /* try to inject new event if pending */
5876 if (vcpu
->arch
.nmi_pending
) {
5877 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5878 --vcpu
->arch
.nmi_pending
;
5879 vcpu
->arch
.nmi_injected
= true;
5880 kvm_x86_ops
->set_nmi(vcpu
);
5882 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
5883 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5884 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5886 kvm_x86_ops
->set_irq(vcpu
);
5892 static void process_nmi(struct kvm_vcpu
*vcpu
)
5897 * x86 is limited to one NMI running, and one NMI pending after it.
5898 * If an NMI is already in progress, limit further NMIs to just one.
5899 * Otherwise, allow two (and we'll inject the first one immediately).
5901 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5904 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5905 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5906 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5909 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
5911 u64 eoi_exit_bitmap
[4];
5914 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
5917 memset(eoi_exit_bitmap
, 0, 32);
5920 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
5921 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
5922 kvm_apic_update_tmr(vcpu
, tmr
);
5926 * Returns 1 to let __vcpu_run() continue the guest execution loop without
5927 * exiting to the userspace. Otherwise, the value will be returned to the
5930 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5933 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5934 vcpu
->run
->request_interrupt_window
;
5935 bool req_immediate_exit
= false;
5937 if (vcpu
->requests
) {
5938 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5939 kvm_mmu_unload(vcpu
);
5940 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5941 __kvm_migrate_timers(vcpu
);
5942 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
5943 kvm_gen_update_masterclock(vcpu
->kvm
);
5944 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
5945 kvm_gen_kvmclock_update(vcpu
);
5946 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5947 r
= kvm_guest_time_update(vcpu
);
5951 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5952 kvm_mmu_sync_roots(vcpu
);
5953 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5954 kvm_x86_ops
->tlb_flush(vcpu
);
5955 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5956 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5960 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5961 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5965 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5966 vcpu
->fpu_active
= 0;
5967 kvm_x86_ops
->fpu_deactivate(vcpu
);
5969 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5970 /* Page is swapped out. Do synthetic halt */
5971 vcpu
->arch
.apf
.halted
= true;
5975 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
5976 record_steal_time(vcpu
);
5977 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
5979 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
5980 kvm_handle_pmu_event(vcpu
);
5981 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
5982 kvm_deliver_pmi(vcpu
);
5983 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
5984 vcpu_scan_ioapic(vcpu
);
5987 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5988 kvm_apic_accept_events(vcpu
);
5989 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
5994 if (inject_pending_event(vcpu
, req_int_win
) != 0)
5995 req_immediate_exit
= true;
5996 /* enable NMI/IRQ window open exits if needed */
5997 else if (vcpu
->arch
.nmi_pending
)
5998 kvm_x86_ops
->enable_nmi_window(vcpu
);
5999 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6000 kvm_x86_ops
->enable_irq_window(vcpu
);
6002 if (kvm_lapic_enabled(vcpu
)) {
6004 * Update architecture specific hints for APIC
6005 * virtual interrupt delivery.
6007 if (kvm_x86_ops
->hwapic_irr_update
)
6008 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6009 kvm_lapic_find_highest_irr(vcpu
));
6010 update_cr8_intercept(vcpu
);
6011 kvm_lapic_sync_to_vapic(vcpu
);
6015 r
= kvm_mmu_reload(vcpu
);
6017 goto cancel_injection
;
6022 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6023 if (vcpu
->fpu_active
)
6024 kvm_load_guest_fpu(vcpu
);
6025 kvm_load_guest_xcr0(vcpu
);
6027 vcpu
->mode
= IN_GUEST_MODE
;
6029 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6031 /* We should set ->mode before check ->requests,
6032 * see the comment in make_all_cpus_request.
6034 smp_mb__after_srcu_read_unlock();
6036 local_irq_disable();
6038 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6039 || need_resched() || signal_pending(current
)) {
6040 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6044 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6046 goto cancel_injection
;
6049 if (req_immediate_exit
)
6050 smp_send_reschedule(vcpu
->cpu
);
6054 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6056 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6057 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6058 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6059 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6060 set_debugreg(vcpu
->arch
.dr6
, 6);
6063 trace_kvm_entry(vcpu
->vcpu_id
);
6064 kvm_x86_ops
->run(vcpu
);
6067 * Do this here before restoring debug registers on the host. And
6068 * since we do this before handling the vmexit, a DR access vmexit
6069 * can (a) read the correct value of the debug registers, (b) set
6070 * KVM_DEBUGREG_WONT_EXIT again.
6072 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6075 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6076 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6077 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6078 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6082 * If the guest has used debug registers, at least dr7
6083 * will be disabled while returning to the host.
6084 * If we don't have active breakpoints in the host, we don't
6085 * care about the messed up debug address registers. But if
6086 * we have some of them active, restore the old state.
6088 if (hw_breakpoint_active())
6089 hw_breakpoint_restore();
6091 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6094 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6097 /* Interrupt is enabled by handle_external_intr() */
6098 kvm_x86_ops
->handle_external_intr(vcpu
);
6103 * We must have an instruction between local_irq_enable() and
6104 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6105 * the interrupt shadow. The stat.exits increment will do nicely.
6106 * But we need to prevent reordering, hence this barrier():
6114 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6117 * Profile KVM exit RIPs:
6119 if (unlikely(prof_on
== KVM_PROFILING
)) {
6120 unsigned long rip
= kvm_rip_read(vcpu
);
6121 profile_hit(KVM_PROFILING
, (void *)rip
);
6124 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6125 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6127 if (vcpu
->arch
.apic_attention
)
6128 kvm_lapic_sync_from_vapic(vcpu
);
6130 r
= kvm_x86_ops
->handle_exit(vcpu
);
6134 kvm_x86_ops
->cancel_injection(vcpu
);
6135 if (unlikely(vcpu
->arch
.apic_attention
))
6136 kvm_lapic_sync_from_vapic(vcpu
);
6142 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
6145 struct kvm
*kvm
= vcpu
->kvm
;
6147 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6151 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6152 !vcpu
->arch
.apf
.halted
)
6153 r
= vcpu_enter_guest(vcpu
);
6155 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6156 kvm_vcpu_block(vcpu
);
6157 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6158 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
)) {
6159 kvm_apic_accept_events(vcpu
);
6160 switch(vcpu
->arch
.mp_state
) {
6161 case KVM_MP_STATE_HALTED
:
6162 vcpu
->arch
.pv
.pv_unhalted
= false;
6163 vcpu
->arch
.mp_state
=
6164 KVM_MP_STATE_RUNNABLE
;
6165 case KVM_MP_STATE_RUNNABLE
:
6166 vcpu
->arch
.apf
.halted
= false;
6168 case KVM_MP_STATE_INIT_RECEIVED
:
6180 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6181 if (kvm_cpu_has_pending_timer(vcpu
))
6182 kvm_inject_pending_timer_irqs(vcpu
);
6184 if (dm_request_for_irq_injection(vcpu
)) {
6186 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6187 ++vcpu
->stat
.request_irq_exits
;
6190 kvm_check_async_pf_completion(vcpu
);
6192 if (signal_pending(current
)) {
6194 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6195 ++vcpu
->stat
.signal_exits
;
6197 if (need_resched()) {
6198 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6200 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6204 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6209 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6212 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6213 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6214 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6215 if (r
!= EMULATE_DONE
)
6220 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6222 BUG_ON(!vcpu
->arch
.pio
.count
);
6224 return complete_emulated_io(vcpu
);
6228 * Implements the following, as a state machine:
6232 * for each mmio piece in the fragment
6240 * for each mmio piece in the fragment
6245 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6247 struct kvm_run
*run
= vcpu
->run
;
6248 struct kvm_mmio_fragment
*frag
;
6251 BUG_ON(!vcpu
->mmio_needed
);
6253 /* Complete previous fragment */
6254 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6255 len
= min(8u, frag
->len
);
6256 if (!vcpu
->mmio_is_write
)
6257 memcpy(frag
->data
, run
->mmio
.data
, len
);
6259 if (frag
->len
<= 8) {
6260 /* Switch to the next fragment. */
6262 vcpu
->mmio_cur_fragment
++;
6264 /* Go forward to the next mmio piece. */
6270 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6271 vcpu
->mmio_needed
= 0;
6273 /* FIXME: return into emulator if single-stepping. */
6274 if (vcpu
->mmio_is_write
)
6276 vcpu
->mmio_read_completed
= 1;
6277 return complete_emulated_io(vcpu
);
6280 run
->exit_reason
= KVM_EXIT_MMIO
;
6281 run
->mmio
.phys_addr
= frag
->gpa
;
6282 if (vcpu
->mmio_is_write
)
6283 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6284 run
->mmio
.len
= min(8u, frag
->len
);
6285 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6286 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6291 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6296 if (!tsk_used_math(current
) && init_fpu(current
))
6299 if (vcpu
->sigset_active
)
6300 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6302 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6303 kvm_vcpu_block(vcpu
);
6304 kvm_apic_accept_events(vcpu
);
6305 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6310 /* re-sync apic's tpr */
6311 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6312 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6318 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6319 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6320 vcpu
->arch
.complete_userspace_io
= NULL
;
6325 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6327 r
= __vcpu_run(vcpu
);
6330 post_kvm_run_save(vcpu
);
6331 if (vcpu
->sigset_active
)
6332 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6337 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6339 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6341 * We are here if userspace calls get_regs() in the middle of
6342 * instruction emulation. Registers state needs to be copied
6343 * back from emulation context to vcpu. Userspace shouldn't do
6344 * that usually, but some bad designed PV devices (vmware
6345 * backdoor interface) need this to work
6347 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6348 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6350 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6351 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6352 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6353 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6354 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6355 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6356 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6357 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6358 #ifdef CONFIG_X86_64
6359 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6360 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6361 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6362 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6363 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6364 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6365 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6366 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6369 regs
->rip
= kvm_rip_read(vcpu
);
6370 regs
->rflags
= kvm_get_rflags(vcpu
);
6375 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6377 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6378 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6380 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6381 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6382 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6383 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6384 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6385 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6386 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6387 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6388 #ifdef CONFIG_X86_64
6389 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6390 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6391 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6392 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6393 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6394 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6395 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6396 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6399 kvm_rip_write(vcpu
, regs
->rip
);
6400 kvm_set_rflags(vcpu
, regs
->rflags
);
6402 vcpu
->arch
.exception
.pending
= false;
6404 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6409 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6411 struct kvm_segment cs
;
6413 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6417 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6419 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6420 struct kvm_sregs
*sregs
)
6424 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6425 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6426 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6427 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6428 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6429 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6431 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6432 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6434 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6435 sregs
->idt
.limit
= dt
.size
;
6436 sregs
->idt
.base
= dt
.address
;
6437 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6438 sregs
->gdt
.limit
= dt
.size
;
6439 sregs
->gdt
.base
= dt
.address
;
6441 sregs
->cr0
= kvm_read_cr0(vcpu
);
6442 sregs
->cr2
= vcpu
->arch
.cr2
;
6443 sregs
->cr3
= kvm_read_cr3(vcpu
);
6444 sregs
->cr4
= kvm_read_cr4(vcpu
);
6445 sregs
->cr8
= kvm_get_cr8(vcpu
);
6446 sregs
->efer
= vcpu
->arch
.efer
;
6447 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6449 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6451 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6452 set_bit(vcpu
->arch
.interrupt
.nr
,
6453 (unsigned long *)sregs
->interrupt_bitmap
);
6458 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6459 struct kvm_mp_state
*mp_state
)
6461 kvm_apic_accept_events(vcpu
);
6462 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6463 vcpu
->arch
.pv
.pv_unhalted
)
6464 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6466 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6471 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6472 struct kvm_mp_state
*mp_state
)
6474 if (!kvm_vcpu_has_lapic(vcpu
) &&
6475 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6478 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6479 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6480 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6482 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6483 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6487 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6488 int reason
, bool has_error_code
, u32 error_code
)
6490 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6493 init_emulate_ctxt(vcpu
);
6495 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6496 has_error_code
, error_code
);
6499 return EMULATE_FAIL
;
6501 kvm_rip_write(vcpu
, ctxt
->eip
);
6502 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6503 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6504 return EMULATE_DONE
;
6506 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6508 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6509 struct kvm_sregs
*sregs
)
6511 struct msr_data apic_base_msr
;
6512 int mmu_reset_needed
= 0;
6513 int pending_vec
, max_bits
, idx
;
6516 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6519 dt
.size
= sregs
->idt
.limit
;
6520 dt
.address
= sregs
->idt
.base
;
6521 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6522 dt
.size
= sregs
->gdt
.limit
;
6523 dt
.address
= sregs
->gdt
.base
;
6524 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6526 vcpu
->arch
.cr2
= sregs
->cr2
;
6527 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6528 vcpu
->arch
.cr3
= sregs
->cr3
;
6529 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6531 kvm_set_cr8(vcpu
, sregs
->cr8
);
6533 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6534 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6535 apic_base_msr
.data
= sregs
->apic_base
;
6536 apic_base_msr
.host_initiated
= true;
6537 kvm_set_apic_base(vcpu
, &apic_base_msr
);
6539 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6540 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6541 vcpu
->arch
.cr0
= sregs
->cr0
;
6543 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6544 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6545 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6546 kvm_update_cpuid(vcpu
);
6548 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6549 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6550 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6551 mmu_reset_needed
= 1;
6553 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6555 if (mmu_reset_needed
)
6556 kvm_mmu_reset_context(vcpu
);
6558 max_bits
= KVM_NR_INTERRUPTS
;
6559 pending_vec
= find_first_bit(
6560 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6561 if (pending_vec
< max_bits
) {
6562 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6563 pr_debug("Set back pending irq %d\n", pending_vec
);
6566 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6567 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6568 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6569 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6570 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6571 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6573 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6574 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6576 update_cr8_intercept(vcpu
);
6578 /* Older userspace won't unhalt the vcpu on reset. */
6579 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6580 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6582 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6584 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6589 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6590 struct kvm_guest_debug
*dbg
)
6592 unsigned long rflags
;
6595 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6597 if (vcpu
->arch
.exception
.pending
)
6599 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6600 kvm_queue_exception(vcpu
, DB_VECTOR
);
6602 kvm_queue_exception(vcpu
, BP_VECTOR
);
6606 * Read rflags as long as potentially injected trace flags are still
6609 rflags
= kvm_get_rflags(vcpu
);
6611 vcpu
->guest_debug
= dbg
->control
;
6612 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6613 vcpu
->guest_debug
= 0;
6615 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6616 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6617 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
6618 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
6620 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6621 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6623 kvm_update_dr7(vcpu
);
6625 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6626 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
6627 get_segment_base(vcpu
, VCPU_SREG_CS
);
6630 * Trigger an rflags update that will inject or remove the trace
6633 kvm_set_rflags(vcpu
, rflags
);
6635 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
6645 * Translate a guest virtual address to a guest physical address.
6647 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6648 struct kvm_translation
*tr
)
6650 unsigned long vaddr
= tr
->linear_address
;
6654 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6655 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6656 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6657 tr
->physical_address
= gpa
;
6658 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6665 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6667 struct i387_fxsave_struct
*fxsave
=
6668 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6670 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6671 fpu
->fcw
= fxsave
->cwd
;
6672 fpu
->fsw
= fxsave
->swd
;
6673 fpu
->ftwx
= fxsave
->twd
;
6674 fpu
->last_opcode
= fxsave
->fop
;
6675 fpu
->last_ip
= fxsave
->rip
;
6676 fpu
->last_dp
= fxsave
->rdp
;
6677 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6682 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6684 struct i387_fxsave_struct
*fxsave
=
6685 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6687 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6688 fxsave
->cwd
= fpu
->fcw
;
6689 fxsave
->swd
= fpu
->fsw
;
6690 fxsave
->twd
= fpu
->ftwx
;
6691 fxsave
->fop
= fpu
->last_opcode
;
6692 fxsave
->rip
= fpu
->last_ip
;
6693 fxsave
->rdp
= fpu
->last_dp
;
6694 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
6699 int fx_init(struct kvm_vcpu
*vcpu
)
6703 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
6707 fpu_finit(&vcpu
->arch
.guest_fpu
);
6710 * Ensure guest xcr0 is valid for loading
6712 vcpu
->arch
.xcr0
= XSTATE_FP
;
6714 vcpu
->arch
.cr0
|= X86_CR0_ET
;
6718 EXPORT_SYMBOL_GPL(fx_init
);
6720 static void fx_free(struct kvm_vcpu
*vcpu
)
6722 fpu_free(&vcpu
->arch
.guest_fpu
);
6725 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
6727 if (vcpu
->guest_fpu_loaded
)
6731 * Restore all possible states in the guest,
6732 * and assume host would use all available bits.
6733 * Guest xcr0 would be loaded later.
6735 kvm_put_guest_xcr0(vcpu
);
6736 vcpu
->guest_fpu_loaded
= 1;
6737 __kernel_fpu_begin();
6738 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
6742 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
6744 kvm_put_guest_xcr0(vcpu
);
6746 if (!vcpu
->guest_fpu_loaded
)
6749 vcpu
->guest_fpu_loaded
= 0;
6750 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6752 ++vcpu
->stat
.fpu_reload
;
6753 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6757 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6759 kvmclock_reset(vcpu
);
6761 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6763 kvm_x86_ops
->vcpu_free(vcpu
);
6766 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
6769 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
6770 printk_once(KERN_WARNING
6771 "kvm: SMP vm created on host with unstable TSC; "
6772 "guest TSC will not be reliable\n");
6773 return kvm_x86_ops
->vcpu_create(kvm
, id
);
6776 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6780 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6781 r
= vcpu_load(vcpu
);
6784 kvm_vcpu_reset(vcpu
);
6785 kvm_mmu_setup(vcpu
);
6791 int kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
6794 struct msr_data msr
;
6795 struct kvm
*kvm
= vcpu
->kvm
;
6797 r
= vcpu_load(vcpu
);
6801 msr
.index
= MSR_IA32_TSC
;
6802 msr
.host_initiated
= true;
6803 kvm_write_tsc(vcpu
, &msr
);
6806 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
6807 KVMCLOCK_SYNC_PERIOD
);
6812 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6815 vcpu
->arch
.apf
.msr_val
= 0;
6817 r
= vcpu_load(vcpu
);
6819 kvm_mmu_unload(vcpu
);
6823 kvm_x86_ops
->vcpu_free(vcpu
);
6826 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
)
6828 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
6829 vcpu
->arch
.nmi_pending
= 0;
6830 vcpu
->arch
.nmi_injected
= false;
6832 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6833 vcpu
->arch
.dr6
= DR6_FIXED_1
;
6834 kvm_update_dr6(vcpu
);
6835 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6836 kvm_update_dr7(vcpu
);
6838 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6839 vcpu
->arch
.apf
.msr_val
= 0;
6840 vcpu
->arch
.st
.msr_val
= 0;
6842 kvmclock_reset(vcpu
);
6844 kvm_clear_async_pf_completion_queue(vcpu
);
6845 kvm_async_pf_hash_reset(vcpu
);
6846 vcpu
->arch
.apf
.halted
= false;
6848 kvm_pmu_reset(vcpu
);
6850 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
6851 vcpu
->arch
.regs_avail
= ~0;
6852 vcpu
->arch
.regs_dirty
= ~0;
6854 kvm_x86_ops
->vcpu_reset(vcpu
);
6857 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, unsigned int vector
)
6859 struct kvm_segment cs
;
6861 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6862 cs
.selector
= vector
<< 8;
6863 cs
.base
= vector
<< 12;
6864 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6865 kvm_rip_write(vcpu
, 0);
6868 int kvm_arch_hardware_enable(void *garbage
)
6871 struct kvm_vcpu
*vcpu
;
6876 bool stable
, backwards_tsc
= false;
6878 kvm_shared_msr_cpu_online();
6879 ret
= kvm_x86_ops
->hardware_enable(garbage
);
6883 local_tsc
= native_read_tsc();
6884 stable
= !check_tsc_unstable();
6885 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6886 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6887 if (!stable
&& vcpu
->cpu
== smp_processor_id())
6888 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
6889 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
6890 backwards_tsc
= true;
6891 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
6892 max_tsc
= vcpu
->arch
.last_host_tsc
;
6898 * Sometimes, even reliable TSCs go backwards. This happens on
6899 * platforms that reset TSC during suspend or hibernate actions, but
6900 * maintain synchronization. We must compensate. Fortunately, we can
6901 * detect that condition here, which happens early in CPU bringup,
6902 * before any KVM threads can be running. Unfortunately, we can't
6903 * bring the TSCs fully up to date with real time, as we aren't yet far
6904 * enough into CPU bringup that we know how much real time has actually
6905 * elapsed; our helper function, get_kernel_ns() will be using boot
6906 * variables that haven't been updated yet.
6908 * So we simply find the maximum observed TSC above, then record the
6909 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6910 * the adjustment will be applied. Note that we accumulate
6911 * adjustments, in case multiple suspend cycles happen before some VCPU
6912 * gets a chance to run again. In the event that no KVM threads get a
6913 * chance to run, we will miss the entire elapsed period, as we'll have
6914 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6915 * loose cycle time. This isn't too big a deal, since the loss will be
6916 * uniform across all VCPUs (not to mention the scenario is extremely
6917 * unlikely). It is possible that a second hibernate recovery happens
6918 * much faster than a first, causing the observed TSC here to be
6919 * smaller; this would require additional padding adjustment, which is
6920 * why we set last_host_tsc to the local tsc observed here.
6922 * N.B. - this code below runs only on platforms with reliable TSC,
6923 * as that is the only way backwards_tsc is set above. Also note
6924 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6925 * have the same delta_cyc adjustment applied if backwards_tsc
6926 * is detected. Note further, this adjustment is only done once,
6927 * as we reset last_host_tsc on all VCPUs to stop this from being
6928 * called multiple times (one for each physical CPU bringup).
6930 * Platforms with unreliable TSCs don't have to deal with this, they
6931 * will be compensated by the logic in vcpu_load, which sets the TSC to
6932 * catchup mode. This will catchup all VCPUs to real time, but cannot
6933 * guarantee that they stay in perfect synchronization.
6935 if (backwards_tsc
) {
6936 u64 delta_cyc
= max_tsc
- local_tsc
;
6937 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6938 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6939 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
6940 vcpu
->arch
.last_host_tsc
= local_tsc
;
6941 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
6946 * We have to disable TSC offset matching.. if you were
6947 * booting a VM while issuing an S4 host suspend....
6948 * you may have some problem. Solving this issue is
6949 * left as an exercise to the reader.
6951 kvm
->arch
.last_tsc_nsec
= 0;
6952 kvm
->arch
.last_tsc_write
= 0;
6959 void kvm_arch_hardware_disable(void *garbage
)
6961 kvm_x86_ops
->hardware_disable(garbage
);
6962 drop_user_return_notifiers(garbage
);
6965 int kvm_arch_hardware_setup(void)
6967 return kvm_x86_ops
->hardware_setup();
6970 void kvm_arch_hardware_unsetup(void)
6972 kvm_x86_ops
->hardware_unsetup();
6975 void kvm_arch_check_processor_compat(void *rtn
)
6977 kvm_x86_ops
->check_processor_compatibility(rtn
);
6980 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
6982 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
6985 struct static_key kvm_no_apic_vcpu __read_mostly
;
6987 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
6993 BUG_ON(vcpu
->kvm
== NULL
);
6996 vcpu
->arch
.pv
.pv_unhalted
= false;
6997 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
6998 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
6999 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7001 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7003 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7008 vcpu
->arch
.pio_data
= page_address(page
);
7010 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7012 r
= kvm_mmu_create(vcpu
);
7014 goto fail_free_pio_data
;
7016 if (irqchip_in_kernel(kvm
)) {
7017 r
= kvm_create_lapic(vcpu
);
7019 goto fail_mmu_destroy
;
7021 static_key_slow_inc(&kvm_no_apic_vcpu
);
7023 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7025 if (!vcpu
->arch
.mce_banks
) {
7027 goto fail_free_lapic
;
7029 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7031 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7033 goto fail_free_mce_banks
;
7038 goto fail_free_wbinvd_dirty_mask
;
7040 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7041 vcpu
->arch
.pv_time_enabled
= false;
7043 vcpu
->arch
.guest_supported_xcr0
= 0;
7044 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7046 kvm_async_pf_hash_reset(vcpu
);
7050 fail_free_wbinvd_dirty_mask
:
7051 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7052 fail_free_mce_banks
:
7053 kfree(vcpu
->arch
.mce_banks
);
7055 kvm_free_lapic(vcpu
);
7057 kvm_mmu_destroy(vcpu
);
7059 free_page((unsigned long)vcpu
->arch
.pio_data
);
7064 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7068 kvm_pmu_destroy(vcpu
);
7069 kfree(vcpu
->arch
.mce_banks
);
7070 kvm_free_lapic(vcpu
);
7071 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7072 kvm_mmu_destroy(vcpu
);
7073 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7074 free_page((unsigned long)vcpu
->arch
.pio_data
);
7075 if (!irqchip_in_kernel(vcpu
->kvm
))
7076 static_key_slow_dec(&kvm_no_apic_vcpu
);
7079 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7084 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7085 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7086 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7087 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7089 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7090 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7091 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7092 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7093 &kvm
->arch
.irq_sources_bitmap
);
7095 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7096 mutex_init(&kvm
->arch
.apic_map_lock
);
7097 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7099 pvclock_update_vm_gtod_copy(kvm
);
7101 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7102 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7107 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7110 r
= vcpu_load(vcpu
);
7112 kvm_mmu_unload(vcpu
);
7116 static void kvm_free_vcpus(struct kvm
*kvm
)
7119 struct kvm_vcpu
*vcpu
;
7122 * Unpin any mmu pages first.
7124 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7125 kvm_clear_async_pf_completion_queue(vcpu
);
7126 kvm_unload_vcpu_mmu(vcpu
);
7128 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7129 kvm_arch_vcpu_free(vcpu
);
7131 mutex_lock(&kvm
->lock
);
7132 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7133 kvm
->vcpus
[i
] = NULL
;
7135 atomic_set(&kvm
->online_vcpus
, 0);
7136 mutex_unlock(&kvm
->lock
);
7139 void kvm_arch_sync_events(struct kvm
*kvm
)
7141 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7142 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7143 kvm_free_all_assigned_devices(kvm
);
7147 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7149 if (current
->mm
== kvm
->mm
) {
7151 * Free memory regions allocated on behalf of userspace,
7152 * unless the the memory map has changed due to process exit
7155 struct kvm_userspace_memory_region mem
;
7156 memset(&mem
, 0, sizeof(mem
));
7157 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7158 kvm_set_memory_region(kvm
, &mem
);
7160 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7161 kvm_set_memory_region(kvm
, &mem
);
7163 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7164 kvm_set_memory_region(kvm
, &mem
);
7166 kvm_iommu_unmap_guest(kvm
);
7167 kfree(kvm
->arch
.vpic
);
7168 kfree(kvm
->arch
.vioapic
);
7169 kvm_free_vcpus(kvm
);
7170 if (kvm
->arch
.apic_access_page
)
7171 put_page(kvm
->arch
.apic_access_page
);
7172 if (kvm
->arch
.ept_identity_pagetable
)
7173 put_page(kvm
->arch
.ept_identity_pagetable
);
7174 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7177 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7178 struct kvm_memory_slot
*dont
)
7182 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7183 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7184 kvm_kvfree(free
->arch
.rmap
[i
]);
7185 free
->arch
.rmap
[i
] = NULL
;
7190 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7191 dont
->arch
.lpage_info
[i
- 1]) {
7192 kvm_kvfree(free
->arch
.lpage_info
[i
- 1]);
7193 free
->arch
.lpage_info
[i
- 1] = NULL
;
7198 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7199 unsigned long npages
)
7203 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7208 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7209 slot
->base_gfn
, level
) + 1;
7211 slot
->arch
.rmap
[i
] =
7212 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7213 if (!slot
->arch
.rmap
[i
])
7218 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7219 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7220 if (!slot
->arch
.lpage_info
[i
- 1])
7223 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7224 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7225 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7226 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7227 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7229 * If the gfn and userspace address are not aligned wrt each
7230 * other, or if explicitly asked to, disable large page
7231 * support for this slot
7233 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7234 !kvm_largepages_enabled()) {
7237 for (j
= 0; j
< lpages
; ++j
)
7238 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7245 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7246 kvm_kvfree(slot
->arch
.rmap
[i
]);
7247 slot
->arch
.rmap
[i
] = NULL
;
7251 kvm_kvfree(slot
->arch
.lpage_info
[i
- 1]);
7252 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7257 void kvm_arch_memslots_updated(struct kvm
*kvm
)
7260 * memslots->generation has been incremented.
7261 * mmio generation may have reached its maximum value.
7263 kvm_mmu_invalidate_mmio_sptes(kvm
);
7266 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7267 struct kvm_memory_slot
*memslot
,
7268 struct kvm_userspace_memory_region
*mem
,
7269 enum kvm_mr_change change
)
7272 * Only private memory slots need to be mapped here since
7273 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7275 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7276 unsigned long userspace_addr
;
7279 * MAP_SHARED to prevent internal slot pages from being moved
7282 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7283 PROT_READ
| PROT_WRITE
,
7284 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7286 if (IS_ERR((void *)userspace_addr
))
7287 return PTR_ERR((void *)userspace_addr
);
7289 memslot
->userspace_addr
= userspace_addr
;
7295 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7296 struct kvm_userspace_memory_region
*mem
,
7297 const struct kvm_memory_slot
*old
,
7298 enum kvm_mr_change change
)
7301 int nr_mmu_pages
= 0;
7303 if ((mem
->slot
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_DELETE
)) {
7306 ret
= vm_munmap(old
->userspace_addr
,
7307 old
->npages
* PAGE_SIZE
);
7310 "kvm_vm_ioctl_set_memory_region: "
7311 "failed to munmap memory\n");
7314 if (!kvm
->arch
.n_requested_mmu_pages
)
7315 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7318 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7320 * Write protect all pages for dirty logging.
7321 * Existing largepage mappings are destroyed here and new ones will
7322 * not be created until the end of the logging.
7324 if ((change
!= KVM_MR_DELETE
) && (mem
->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7325 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
7328 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7330 kvm_mmu_invalidate_zap_all_pages(kvm
);
7333 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7334 struct kvm_memory_slot
*slot
)
7336 kvm_mmu_invalidate_zap_all_pages(kvm
);
7339 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7341 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7342 kvm_x86_ops
->check_nested_events(vcpu
, false);
7344 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7345 !vcpu
->arch
.apf
.halted
)
7346 || !list_empty_careful(&vcpu
->async_pf
.done
)
7347 || kvm_apic_has_events(vcpu
)
7348 || vcpu
->arch
.pv
.pv_unhalted
7349 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
7350 (kvm_arch_interrupt_allowed(vcpu
) &&
7351 kvm_cpu_has_interrupt(vcpu
));
7354 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7356 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7359 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7361 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7364 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7366 unsigned long current_rip
= kvm_rip_read(vcpu
) +
7367 get_segment_base(vcpu
, VCPU_SREG_CS
);
7369 return current_rip
== linear_rip
;
7371 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7373 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7375 unsigned long rflags
;
7377 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7378 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7379 rflags
&= ~X86_EFLAGS_TF
;
7382 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7384 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7386 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7387 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7388 rflags
|= X86_EFLAGS_TF
;
7389 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7390 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7392 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7394 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7398 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7402 r
= kvm_mmu_reload(vcpu
);
7406 if (!vcpu
->arch
.mmu
.direct_map
&&
7407 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7410 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7413 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7415 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7418 static inline u32
kvm_async_pf_next_probe(u32 key
)
7420 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7423 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7425 u32 key
= kvm_async_pf_hash_fn(gfn
);
7427 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7428 key
= kvm_async_pf_next_probe(key
);
7430 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7433 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7436 u32 key
= kvm_async_pf_hash_fn(gfn
);
7438 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7439 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7440 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7441 key
= kvm_async_pf_next_probe(key
);
7446 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7448 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7451 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7455 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
7457 vcpu
->arch
.apf
.gfns
[i
] = ~0;
7459 j
= kvm_async_pf_next_probe(j
);
7460 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
7462 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
7464 * k lies cyclically in ]i,j]
7466 * |....j i.k.| or |.k..j i...|
7468 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
7469 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
7474 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
7477 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
7481 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
7482 struct kvm_async_pf
*work
)
7484 struct x86_exception fault
;
7486 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
7487 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7489 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
7490 (vcpu
->arch
.apf
.send_user_only
&&
7491 kvm_x86_ops
->get_cpl(vcpu
) == 0))
7492 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
7493 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
7494 fault
.vector
= PF_VECTOR
;
7495 fault
.error_code_valid
= true;
7496 fault
.error_code
= 0;
7497 fault
.nested_page_fault
= false;
7498 fault
.address
= work
->arch
.token
;
7499 kvm_inject_page_fault(vcpu
, &fault
);
7503 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
7504 struct kvm_async_pf
*work
)
7506 struct x86_exception fault
;
7508 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
7509 if (work
->wakeup_all
)
7510 work
->arch
.token
= ~0; /* broadcast wakeup */
7512 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7514 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
7515 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
7516 fault
.vector
= PF_VECTOR
;
7517 fault
.error_code_valid
= true;
7518 fault
.error_code
= 0;
7519 fault
.nested_page_fault
= false;
7520 fault
.address
= work
->arch
.token
;
7521 kvm_inject_page_fault(vcpu
, &fault
);
7523 vcpu
->arch
.apf
.halted
= false;
7524 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7527 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
7529 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
7532 return !kvm_event_needs_reinjection(vcpu
) &&
7533 kvm_x86_ops
->interrupt_allowed(vcpu
);
7536 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
7538 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
7540 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
7542 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
7544 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
7546 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
7548 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
7550 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
7552 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
7554 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
7555 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
7556 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
7557 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
7558 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
7559 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
7560 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
7561 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
7562 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
7563 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
7564 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
7565 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
7566 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);