2 #include <linux/initrd.h>
3 #include <linux/ioport.h>
4 #include <linux/swap.h>
5 #include <linux/memblock.h>
6 #include <linux/bootmem.h> /* for max_low_pfn */
8 #include <asm/set_memory.h>
9 #include <asm/e820/api.h>
12 #include <asm/page_types.h>
13 #include <asm/sections.h>
14 #include <asm/setup.h>
15 #include <asm/tlbflush.h>
17 #include <asm/proto.h>
18 #include <asm/dma.h> /* for MAX_DMA_PFN */
19 #include <asm/microcode.h>
20 #include <asm/kaslr.h>
21 #include <asm/hypervisor.h>
22 #include <asm/cpufeature.h>
25 * We need to define the tracepoints somewhere, and tlb.c
26 * is only compied when SMP=y.
28 #define CREATE_TRACE_POINTS
29 #include <trace/events/tlb.h>
31 #include "mm_internal.h"
34 * Tables translating between page_cache_type_t and pte encoding.
36 * The default values are defined statically as minimal supported mode;
37 * WC and WT fall back to UC-. pat_init() updates these values to support
38 * more cache modes, WC and WT, when it is safe to do so. See pat_init()
39 * for the details. Note, __early_ioremap() used during early boot-time
40 * takes pgprot_t (pte encoding) and does not use these tables.
42 * Index into __cachemode2pte_tbl[] is the cachemode.
44 * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
45 * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
47 uint16_t __cachemode2pte_tbl
[_PAGE_CACHE_MODE_NUM
] = {
48 [_PAGE_CACHE_MODE_WB
] = 0 | 0 ,
49 [_PAGE_CACHE_MODE_WC
] = 0 | _PAGE_PCD
,
50 [_PAGE_CACHE_MODE_UC_MINUS
] = 0 | _PAGE_PCD
,
51 [_PAGE_CACHE_MODE_UC
] = _PAGE_PWT
| _PAGE_PCD
,
52 [_PAGE_CACHE_MODE_WT
] = 0 | _PAGE_PCD
,
53 [_PAGE_CACHE_MODE_WP
] = 0 | _PAGE_PCD
,
55 EXPORT_SYMBOL(__cachemode2pte_tbl
);
57 uint8_t __pte2cachemode_tbl
[8] = {
58 [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB
,
59 [__pte2cm_idx(_PAGE_PWT
| 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS
,
60 [__pte2cm_idx( 0 | _PAGE_PCD
| 0 )] = _PAGE_CACHE_MODE_UC_MINUS
,
61 [__pte2cm_idx(_PAGE_PWT
| _PAGE_PCD
| 0 )] = _PAGE_CACHE_MODE_UC
,
62 [__pte2cm_idx( 0 | 0 | _PAGE_PAT
)] = _PAGE_CACHE_MODE_WB
,
63 [__pte2cm_idx(_PAGE_PWT
| 0 | _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC_MINUS
,
64 [__pte2cm_idx(0 | _PAGE_PCD
| _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC_MINUS
,
65 [__pte2cm_idx(_PAGE_PWT
| _PAGE_PCD
| _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC
,
67 EXPORT_SYMBOL(__pte2cachemode_tbl
);
69 static unsigned long __initdata pgt_buf_start
;
70 static unsigned long __initdata pgt_buf_end
;
71 static unsigned long __initdata pgt_buf_top
;
73 static unsigned long min_pfn_mapped
;
75 static bool __initdata can_use_brk_pgt
= true;
78 * Pages returned are already directly mapped.
80 * Changing that is likely to break Xen, see commit:
82 * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
84 * for detailed information.
86 __ref
void *alloc_low_pages(unsigned int num
)
94 order
= get_order((unsigned long)num
<< PAGE_SHIFT
);
95 return (void *)__get_free_pages(GFP_ATOMIC
| __GFP_NOTRACK
|
99 if ((pgt_buf_end
+ num
) > pgt_buf_top
|| !can_use_brk_pgt
) {
101 if (min_pfn_mapped
>= max_pfn_mapped
)
102 panic("alloc_low_pages: ran out of memory");
103 ret
= memblock_find_in_range(min_pfn_mapped
<< PAGE_SHIFT
,
104 max_pfn_mapped
<< PAGE_SHIFT
,
105 PAGE_SIZE
* num
, PAGE_SIZE
);
107 panic("alloc_low_pages: can not alloc memory");
108 memblock_reserve(ret
, PAGE_SIZE
* num
);
109 pfn
= ret
>> PAGE_SHIFT
;
113 printk(KERN_DEBUG
"BRK [%#010lx, %#010lx] PGTABLE\n",
114 pfn
<< PAGE_SHIFT
, (pgt_buf_end
<< PAGE_SHIFT
) - 1);
117 for (i
= 0; i
< num
; i
++) {
120 adr
= __va((pfn
+ i
) << PAGE_SHIFT
);
124 return __va(pfn
<< PAGE_SHIFT
);
128 * By default need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS.
129 * With KASLR memory randomization, depending on the machine e820 memory
130 * and the PUD alignment. We may need twice more pages when KASLR memory
131 * randomization is enabled.
133 #ifndef CONFIG_RANDOMIZE_MEMORY
134 #define INIT_PGD_PAGE_COUNT 6
136 #define INIT_PGD_PAGE_COUNT 12
138 #define INIT_PGT_BUF_SIZE (INIT_PGD_PAGE_COUNT * PAGE_SIZE)
139 RESERVE_BRK(early_pgt_alloc
, INIT_PGT_BUF_SIZE
);
140 void __init
early_alloc_pgt_buf(void)
142 unsigned long tables
= INIT_PGT_BUF_SIZE
;
145 base
= __pa(extend_brk(tables
, PAGE_SIZE
));
147 pgt_buf_start
= base
>> PAGE_SHIFT
;
148 pgt_buf_end
= pgt_buf_start
;
149 pgt_buf_top
= pgt_buf_start
+ (tables
>> PAGE_SHIFT
);
154 early_param_on_off("gbpages", "nogbpages", direct_gbpages
, CONFIG_X86_DIRECT_GBPAGES
);
159 unsigned page_size_mask
;
162 static int page_size_mask
;
164 static void __init
probe_page_size_mask(void)
167 * For CONFIG_KMEMCHECK or pagealloc debugging, identity mapping will
169 * This will simplify cpa(), which otherwise needs to support splitting
170 * large pages into small in interrupt context, etc.
172 if (boot_cpu_has(X86_FEATURE_PSE
) && !debug_pagealloc_enabled() && !IS_ENABLED(CONFIG_KMEMCHECK
))
173 page_size_mask
|= 1 << PG_LEVEL_2M
;
177 /* Enable PSE if available */
178 if (boot_cpu_has(X86_FEATURE_PSE
))
179 cr4_set_bits_and_update_boot(X86_CR4_PSE
);
181 /* Enable PGE if available */
182 if (boot_cpu_has(X86_FEATURE_PGE
)) {
183 cr4_set_bits_and_update_boot(X86_CR4_PGE
);
184 __supported_pte_mask
|= _PAGE_GLOBAL
;
186 __supported_pte_mask
&= ~_PAGE_GLOBAL
;
188 /* Enable 1 GB linear kernel mappings if available: */
189 if (direct_gbpages
&& boot_cpu_has(X86_FEATURE_GBPAGES
)) {
190 printk(KERN_INFO
"Using GB pages for direct mapping\n");
191 page_size_mask
|= 1 << PG_LEVEL_1G
;
197 static void setup_pcid(void)
200 if (boot_cpu_has(X86_FEATURE_PCID
)) {
201 if (boot_cpu_has(X86_FEATURE_PGE
)) {
203 * This can't be cr4_set_bits_and_update_boot() --
204 * the trampoline code can't handle CR4.PCIDE and
205 * it wouldn't do any good anyway. Despite the name,
206 * cr4_set_bits_and_update_boot() doesn't actually
207 * cause the bits in question to remain set all the
208 * way through the secondary boot asm.
210 * Instead, we brute-force it and set CR4.PCIDE
211 * manually in start_secondary().
213 cr4_set_bits(X86_CR4_PCIDE
);
216 * flush_tlb_all(), as currently implemented, won't
217 * work if PCID is on but PGE is not. Since that
218 * combination doesn't exist on real hardware, there's
219 * no reason to try to fully support it, but it's
220 * polite to avoid corrupting data if we're on
221 * an improperly configured VM.
223 setup_clear_cpu_cap(X86_FEATURE_PCID
);
230 #define NR_RANGE_MR 3
231 #else /* CONFIG_X86_64 */
232 #define NR_RANGE_MR 5
235 static int __meminit
save_mr(struct map_range
*mr
, int nr_range
,
236 unsigned long start_pfn
, unsigned long end_pfn
,
237 unsigned long page_size_mask
)
239 if (start_pfn
< end_pfn
) {
240 if (nr_range
>= NR_RANGE_MR
)
241 panic("run out of range for init_memory_mapping\n");
242 mr
[nr_range
].start
= start_pfn
<<PAGE_SHIFT
;
243 mr
[nr_range
].end
= end_pfn
<<PAGE_SHIFT
;
244 mr
[nr_range
].page_size_mask
= page_size_mask
;
252 * adjust the page_size_mask for small range to go with
253 * big page size instead small one if nearby are ram too.
255 static void __ref
adjust_range_page_size_mask(struct map_range
*mr
,
260 for (i
= 0; i
< nr_range
; i
++) {
261 if ((page_size_mask
& (1<<PG_LEVEL_2M
)) &&
262 !(mr
[i
].page_size_mask
& (1<<PG_LEVEL_2M
))) {
263 unsigned long start
= round_down(mr
[i
].start
, PMD_SIZE
);
264 unsigned long end
= round_up(mr
[i
].end
, PMD_SIZE
);
267 if ((end
>> PAGE_SHIFT
) > max_low_pfn
)
271 if (memblock_is_region_memory(start
, end
- start
))
272 mr
[i
].page_size_mask
|= 1<<PG_LEVEL_2M
;
274 if ((page_size_mask
& (1<<PG_LEVEL_1G
)) &&
275 !(mr
[i
].page_size_mask
& (1<<PG_LEVEL_1G
))) {
276 unsigned long start
= round_down(mr
[i
].start
, PUD_SIZE
);
277 unsigned long end
= round_up(mr
[i
].end
, PUD_SIZE
);
279 if (memblock_is_region_memory(start
, end
- start
))
280 mr
[i
].page_size_mask
|= 1<<PG_LEVEL_1G
;
285 static const char *page_size_string(struct map_range
*mr
)
287 static const char str_1g
[] = "1G";
288 static const char str_2m
[] = "2M";
289 static const char str_4m
[] = "4M";
290 static const char str_4k
[] = "4k";
292 if (mr
->page_size_mask
& (1<<PG_LEVEL_1G
))
295 * 32-bit without PAE has a 4M large page size.
296 * PG_LEVEL_2M is misnamed, but we can at least
297 * print out the right size in the string.
299 if (IS_ENABLED(CONFIG_X86_32
) &&
300 !IS_ENABLED(CONFIG_X86_PAE
) &&
301 mr
->page_size_mask
& (1<<PG_LEVEL_2M
))
304 if (mr
->page_size_mask
& (1<<PG_LEVEL_2M
))
310 static int __meminit
split_mem_range(struct map_range
*mr
, int nr_range
,
314 unsigned long start_pfn
, end_pfn
, limit_pfn
;
318 limit_pfn
= PFN_DOWN(end
);
320 /* head if not big page alignment ? */
321 pfn
= start_pfn
= PFN_DOWN(start
);
324 * Don't use a large page for the first 2/4MB of memory
325 * because there are often fixed size MTRRs in there
326 * and overlapping MTRRs into large pages can cause
330 end_pfn
= PFN_DOWN(PMD_SIZE
);
332 end_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
333 #else /* CONFIG_X86_64 */
334 end_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
336 if (end_pfn
> limit_pfn
)
338 if (start_pfn
< end_pfn
) {
339 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
, 0);
343 /* big page (2M) range */
344 start_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
346 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
347 #else /* CONFIG_X86_64 */
348 end_pfn
= round_up(pfn
, PFN_DOWN(PUD_SIZE
));
349 if (end_pfn
> round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
)))
350 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
353 if (start_pfn
< end_pfn
) {
354 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
355 page_size_mask
& (1<<PG_LEVEL_2M
));
360 /* big page (1G) range */
361 start_pfn
= round_up(pfn
, PFN_DOWN(PUD_SIZE
));
362 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PUD_SIZE
));
363 if (start_pfn
< end_pfn
) {
364 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
366 ((1<<PG_LEVEL_2M
)|(1<<PG_LEVEL_1G
)));
370 /* tail is not big page (1G) alignment */
371 start_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
372 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
373 if (start_pfn
< end_pfn
) {
374 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
375 page_size_mask
& (1<<PG_LEVEL_2M
));
380 /* tail is not big page (2M) alignment */
383 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
, 0);
386 adjust_range_page_size_mask(mr
, nr_range
);
388 /* try to merge same page size and continuous */
389 for (i
= 0; nr_range
> 1 && i
< nr_range
- 1; i
++) {
390 unsigned long old_start
;
391 if (mr
[i
].end
!= mr
[i
+1].start
||
392 mr
[i
].page_size_mask
!= mr
[i
+1].page_size_mask
)
395 old_start
= mr
[i
].start
;
396 memmove(&mr
[i
], &mr
[i
+1],
397 (nr_range
- 1 - i
) * sizeof(struct map_range
));
398 mr
[i
--].start
= old_start
;
402 for (i
= 0; i
< nr_range
; i
++)
403 pr_debug(" [mem %#010lx-%#010lx] page %s\n",
404 mr
[i
].start
, mr
[i
].end
- 1,
405 page_size_string(&mr
[i
]));
410 struct range pfn_mapped
[E820_MAX_ENTRIES
];
413 static void add_pfn_range_mapped(unsigned long start_pfn
, unsigned long end_pfn
)
415 nr_pfn_mapped
= add_range_with_merge(pfn_mapped
, E820_MAX_ENTRIES
,
416 nr_pfn_mapped
, start_pfn
, end_pfn
);
417 nr_pfn_mapped
= clean_sort_range(pfn_mapped
, E820_MAX_ENTRIES
);
419 max_pfn_mapped
= max(max_pfn_mapped
, end_pfn
);
421 if (start_pfn
< (1UL<<(32-PAGE_SHIFT
)))
422 max_low_pfn_mapped
= max(max_low_pfn_mapped
,
423 min(end_pfn
, 1UL<<(32-PAGE_SHIFT
)));
426 bool pfn_range_is_mapped(unsigned long start_pfn
, unsigned long end_pfn
)
430 for (i
= 0; i
< nr_pfn_mapped
; i
++)
431 if ((start_pfn
>= pfn_mapped
[i
].start
) &&
432 (end_pfn
<= pfn_mapped
[i
].end
))
439 * Setup the direct mapping of the physical memory at PAGE_OFFSET.
440 * This runs before bootmem is initialized and gets pages directly from
441 * the physical memory. To access them they are temporarily mapped.
443 unsigned long __ref
init_memory_mapping(unsigned long start
,
446 struct map_range mr
[NR_RANGE_MR
];
447 unsigned long ret
= 0;
450 pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n",
453 memset(mr
, 0, sizeof(mr
));
454 nr_range
= split_mem_range(mr
, 0, start
, end
);
456 for (i
= 0; i
< nr_range
; i
++)
457 ret
= kernel_physical_mapping_init(mr
[i
].start
, mr
[i
].end
,
458 mr
[i
].page_size_mask
);
460 add_pfn_range_mapped(start
>> PAGE_SHIFT
, ret
>> PAGE_SHIFT
);
462 return ret
>> PAGE_SHIFT
;
466 * We need to iterate through the E820 memory map and create direct mappings
467 * for only E820_TYPE_RAM and E820_KERN_RESERVED regions. We cannot simply
468 * create direct mappings for all pfns from [0 to max_low_pfn) and
469 * [4GB to max_pfn) because of possible memory holes in high addresses
470 * that cannot be marked as UC by fixed/variable range MTRRs.
471 * Depending on the alignment of E820 ranges, this may possibly result
472 * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
474 * init_mem_mapping() calls init_range_memory_mapping() with big range.
475 * That range would have hole in the middle or ends, and only ram parts
476 * will be mapped in init_range_memory_mapping().
478 static unsigned long __init
init_range_memory_mapping(
479 unsigned long r_start
,
482 unsigned long start_pfn
, end_pfn
;
483 unsigned long mapped_ram_size
= 0;
486 for_each_mem_pfn_range(i
, MAX_NUMNODES
, &start_pfn
, &end_pfn
, NULL
) {
487 u64 start
= clamp_val(PFN_PHYS(start_pfn
), r_start
, r_end
);
488 u64 end
= clamp_val(PFN_PHYS(end_pfn
), r_start
, r_end
);
493 * if it is overlapping with brk pgt, we need to
494 * alloc pgt buf from memblock instead.
496 can_use_brk_pgt
= max(start
, (u64
)pgt_buf_end
<<PAGE_SHIFT
) >=
497 min(end
, (u64
)pgt_buf_top
<<PAGE_SHIFT
);
498 init_memory_mapping(start
, end
);
499 mapped_ram_size
+= end
- start
;
500 can_use_brk_pgt
= true;
503 return mapped_ram_size
;
506 static unsigned long __init
get_new_step_size(unsigned long step_size
)
509 * Initial mapped size is PMD_SIZE (2M).
510 * We can not set step_size to be PUD_SIZE (1G) yet.
511 * In worse case, when we cross the 1G boundary, and
512 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
513 * to map 1G range with PTE. Hence we use one less than the
514 * difference of page table level shifts.
516 * Don't need to worry about overflow in the top-down case, on 32bit,
517 * when step_size is 0, round_down() returns 0 for start, and that
518 * turns it into 0x100000000ULL.
519 * In the bottom-up case, round_up(x, 0) returns 0 though too, which
520 * needs to be taken into consideration by the code below.
522 return step_size
<< (PMD_SHIFT
- PAGE_SHIFT
- 1);
526 * memory_map_top_down - Map [map_start, map_end) top down
527 * @map_start: start address of the target memory range
528 * @map_end: end address of the target memory range
530 * This function will setup direct mapping for memory range
531 * [map_start, map_end) in top-down. That said, the page tables
532 * will be allocated at the end of the memory, and we map the
533 * memory in top-down.
535 static void __init
memory_map_top_down(unsigned long map_start
,
536 unsigned long map_end
)
538 unsigned long real_end
, start
, last_start
;
539 unsigned long step_size
;
541 unsigned long mapped_ram_size
= 0;
543 /* xen has big range in reserved near end of ram, skip it at first.*/
544 addr
= memblock_find_in_range(map_start
, map_end
, PMD_SIZE
, PMD_SIZE
);
545 real_end
= addr
+ PMD_SIZE
;
547 /* step_size need to be small so pgt_buf from BRK could cover it */
548 step_size
= PMD_SIZE
;
549 max_pfn_mapped
= 0; /* will get exact value next */
550 min_pfn_mapped
= real_end
>> PAGE_SHIFT
;
551 last_start
= start
= real_end
;
554 * We start from the top (end of memory) and go to the bottom.
555 * The memblock_find_in_range() gets us a block of RAM from the
556 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
559 while (last_start
> map_start
) {
560 if (last_start
> step_size
) {
561 start
= round_down(last_start
- 1, step_size
);
562 if (start
< map_start
)
566 mapped_ram_size
+= init_range_memory_mapping(start
,
569 min_pfn_mapped
= last_start
>> PAGE_SHIFT
;
570 if (mapped_ram_size
>= step_size
)
571 step_size
= get_new_step_size(step_size
);
574 if (real_end
< map_end
)
575 init_range_memory_mapping(real_end
, map_end
);
579 * memory_map_bottom_up - Map [map_start, map_end) bottom up
580 * @map_start: start address of the target memory range
581 * @map_end: end address of the target memory range
583 * This function will setup direct mapping for memory range
584 * [map_start, map_end) in bottom-up. Since we have limited the
585 * bottom-up allocation above the kernel, the page tables will
586 * be allocated just above the kernel and we map the memory
587 * in [map_start, map_end) in bottom-up.
589 static void __init
memory_map_bottom_up(unsigned long map_start
,
590 unsigned long map_end
)
592 unsigned long next
, start
;
593 unsigned long mapped_ram_size
= 0;
594 /* step_size need to be small so pgt_buf from BRK could cover it */
595 unsigned long step_size
= PMD_SIZE
;
598 min_pfn_mapped
= start
>> PAGE_SHIFT
;
601 * We start from the bottom (@map_start) and go to the top (@map_end).
602 * The memblock_find_in_range() gets us a block of RAM from the
603 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
606 while (start
< map_end
) {
607 if (step_size
&& map_end
- start
> step_size
) {
608 next
= round_up(start
+ 1, step_size
);
615 mapped_ram_size
+= init_range_memory_mapping(start
, next
);
618 if (mapped_ram_size
>= step_size
)
619 step_size
= get_new_step_size(step_size
);
623 void __init
init_mem_mapping(void)
627 probe_page_size_mask();
631 end
= max_pfn
<< PAGE_SHIFT
;
633 end
= max_low_pfn
<< PAGE_SHIFT
;
636 /* the ISA range is always mapped regardless of memory holes */
637 init_memory_mapping(0, ISA_END_ADDRESS
);
639 /* Init the trampoline, possibly with KASLR memory offset */
643 * If the allocation is in bottom-up direction, we setup direct mapping
644 * in bottom-up, otherwise we setup direct mapping in top-down.
646 if (memblock_bottom_up()) {
647 unsigned long kernel_end
= __pa_symbol(_end
);
650 * we need two separate calls here. This is because we want to
651 * allocate page tables above the kernel. So we first map
652 * [kernel_end, end) to make memory above the kernel be mapped
653 * as soon as possible. And then use page tables allocated above
654 * the kernel to map [ISA_END_ADDRESS, kernel_end).
656 memory_map_bottom_up(kernel_end
, end
);
657 memory_map_bottom_up(ISA_END_ADDRESS
, kernel_end
);
659 memory_map_top_down(ISA_END_ADDRESS
, end
);
663 if (max_pfn
> max_low_pfn
) {
664 /* can we preseve max_low_pfn ?*/
665 max_low_pfn
= max_pfn
;
668 early_ioremap_page_table_range_init();
671 load_cr3(swapper_pg_dir
);
674 x86_init
.hyper
.init_mem_mapping();
676 early_memtest(0, max_pfn_mapped
<< PAGE_SHIFT
);
680 * devmem_is_allowed() checks to see if /dev/mem access to a certain address
681 * is valid. The argument is a physical page number.
683 * On x86, access has to be given to the first megabyte of RAM because that
684 * area traditionally contains BIOS code and data regions used by X, dosemu,
685 * and similar apps. Since they map the entire memory range, the whole range
686 * must be allowed (for mapping), but any areas that would otherwise be
687 * disallowed are flagged as being "zero filled" instead of rejected.
688 * Access has to be given to non-kernel-ram areas as well, these contain the
689 * PCI mmio resources as well as potential bios/acpi data regions.
691 int devmem_is_allowed(unsigned long pagenr
)
693 if (page_is_ram(pagenr
)) {
695 * For disallowed memory regions in the low 1MB range,
696 * request that the page be shown as all zeros.
705 * This must follow RAM test, since System RAM is considered a
706 * restricted resource under CONFIG_STRICT_IOMEM.
708 if (iomem_is_exclusive(pagenr
<< PAGE_SHIFT
)) {
709 /* Low 1MB bypasses iomem restrictions. */
719 void free_init_pages(char *what
, unsigned long begin
, unsigned long end
)
721 unsigned long begin_aligned
, end_aligned
;
723 /* Make sure boundaries are page aligned */
724 begin_aligned
= PAGE_ALIGN(begin
);
725 end_aligned
= end
& PAGE_MASK
;
727 if (WARN_ON(begin_aligned
!= begin
|| end_aligned
!= end
)) {
728 begin
= begin_aligned
;
736 * If debugging page accesses then do not free this memory but
737 * mark them not present - any buggy init-section access will
738 * create a kernel page fault:
740 if (debug_pagealloc_enabled()) {
741 pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n",
743 set_memory_np(begin
, (end
- begin
) >> PAGE_SHIFT
);
746 * We just marked the kernel text read only above, now that
747 * we are going to free part of that, we need to make that
748 * writeable and non-executable first.
750 set_memory_nx(begin
, (end
- begin
) >> PAGE_SHIFT
);
751 set_memory_rw(begin
, (end
- begin
) >> PAGE_SHIFT
);
753 free_reserved_area((void *)begin
, (void *)end
,
754 POISON_FREE_INITMEM
, what
);
758 void __ref
free_initmem(void)
760 e820__reallocate_tables();
762 free_init_pages("unused kernel",
763 (unsigned long)(&__init_begin
),
764 (unsigned long)(&__init_end
));
767 #ifdef CONFIG_BLK_DEV_INITRD
768 void __init
free_initrd_mem(unsigned long start
, unsigned long end
)
771 * end could be not aligned, and We can not align that,
772 * decompresser could be confused by aligned initrd_end
773 * We already reserve the end partial page before in
774 * - i386_start_kernel()
775 * - x86_64_start_kernel()
776 * - relocate_initrd()
777 * So here We can do PAGE_ALIGN() safely to get partial page to be freed
779 free_init_pages("initrd", start
, PAGE_ALIGN(end
));
784 * Calculate the precise size of the DMA zone (first 16 MB of RAM),
785 * and pass it to the MM layer - to help it set zone watermarks more
788 * Done on 64-bit systems only for the time being, although 32-bit systems
789 * might benefit from this as well.
791 void __init
memblock_find_dma_reserve(void)
794 u64 nr_pages
= 0, nr_free_pages
= 0;
795 unsigned long start_pfn
, end_pfn
;
796 phys_addr_t start_addr
, end_addr
;
801 * Iterate over all memory ranges (free and reserved ones alike),
802 * to calculate the total number of pages in the first 16 MB of RAM:
805 for_each_mem_pfn_range(i
, MAX_NUMNODES
, &start_pfn
, &end_pfn
, NULL
) {
806 start_pfn
= min(start_pfn
, MAX_DMA_PFN
);
807 end_pfn
= min(end_pfn
, MAX_DMA_PFN
);
809 nr_pages
+= end_pfn
- start_pfn
;
813 * Iterate over free memory ranges to calculate the number of free
814 * pages in the DMA zone, while not counting potential partial
815 * pages at the beginning or the end of the range:
818 for_each_free_mem_range(u
, NUMA_NO_NODE
, MEMBLOCK_NONE
, &start_addr
, &end_addr
, NULL
) {
819 start_pfn
= min_t(unsigned long, PFN_UP(start_addr
), MAX_DMA_PFN
);
820 end_pfn
= min_t(unsigned long, PFN_DOWN(end_addr
), MAX_DMA_PFN
);
822 if (start_pfn
< end_pfn
)
823 nr_free_pages
+= end_pfn
- start_pfn
;
826 set_dma_reserve(nr_pages
- nr_free_pages
);
830 void __init
zone_sizes_init(void)
832 unsigned long max_zone_pfns
[MAX_NR_ZONES
];
834 memset(max_zone_pfns
, 0, sizeof(max_zone_pfns
));
836 #ifdef CONFIG_ZONE_DMA
837 max_zone_pfns
[ZONE_DMA
] = min(MAX_DMA_PFN
, max_low_pfn
);
839 #ifdef CONFIG_ZONE_DMA32
840 max_zone_pfns
[ZONE_DMA32
] = min(MAX_DMA32_PFN
, max_low_pfn
);
842 max_zone_pfns
[ZONE_NORMAL
] = max_low_pfn
;
843 #ifdef CONFIG_HIGHMEM
844 max_zone_pfns
[ZONE_HIGHMEM
] = max_pfn
;
847 free_area_init_nodes(max_zone_pfns
);
850 DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state
, cpu_tlbstate
) = {
851 .loaded_mm
= &init_mm
,
853 .cr4
= ~0UL, /* fail hard if we screw up cr4 shadow initialization */
855 EXPORT_SYMBOL_GPL(cpu_tlbstate
);
857 void update_cache_mode_entry(unsigned entry
, enum page_cache_mode cache
)
859 /* entry 0 MUST be WB (hardwired to speed up translations) */
860 BUG_ON(!entry
&& cache
!= _PAGE_CACHE_MODE_WB
);
862 __cachemode2pte_tbl
[cache
] = __cm_idx2pte(entry
);
863 __pte2cachemode_tbl
[entry
] = cache
;