2 #include <linux/initrd.h>
3 #include <linux/ioport.h>
4 #include <linux/swap.h>
5 #include <linux/memblock.h>
6 #include <linux/bootmem.h> /* for max_low_pfn */
8 #include <asm/set_memory.h>
9 #include <asm/e820/api.h>
12 #include <asm/page_types.h>
13 #include <asm/sections.h>
14 #include <asm/setup.h>
15 #include <asm/tlbflush.h>
17 #include <asm/proto.h>
18 #include <asm/dma.h> /* for MAX_DMA_PFN */
19 #include <asm/microcode.h>
20 #include <asm/kaslr.h>
21 #include <asm/hypervisor.h>
22 #include <asm/cpufeature.h>
25 * We need to define the tracepoints somewhere, and tlb.c
26 * is only compied when SMP=y.
28 #define CREATE_TRACE_POINTS
29 #include <trace/events/tlb.h>
31 #include "mm_internal.h"
34 * Tables translating between page_cache_type_t and pte encoding.
36 * The default values are defined statically as minimal supported mode;
37 * WC and WT fall back to UC-. pat_init() updates these values to support
38 * more cache modes, WC and WT, when it is safe to do so. See pat_init()
39 * for the details. Note, __early_ioremap() used during early boot-time
40 * takes pgprot_t (pte encoding) and does not use these tables.
42 * Index into __cachemode2pte_tbl[] is the cachemode.
44 * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
45 * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
47 uint16_t __cachemode2pte_tbl
[_PAGE_CACHE_MODE_NUM
] = {
48 [_PAGE_CACHE_MODE_WB
] = 0 | 0 ,
49 [_PAGE_CACHE_MODE_WC
] = 0 | _PAGE_PCD
,
50 [_PAGE_CACHE_MODE_UC_MINUS
] = 0 | _PAGE_PCD
,
51 [_PAGE_CACHE_MODE_UC
] = _PAGE_PWT
| _PAGE_PCD
,
52 [_PAGE_CACHE_MODE_WT
] = 0 | _PAGE_PCD
,
53 [_PAGE_CACHE_MODE_WP
] = 0 | _PAGE_PCD
,
55 EXPORT_SYMBOL(__cachemode2pte_tbl
);
57 uint8_t __pte2cachemode_tbl
[8] = {
58 [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB
,
59 [__pte2cm_idx(_PAGE_PWT
| 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS
,
60 [__pte2cm_idx( 0 | _PAGE_PCD
| 0 )] = _PAGE_CACHE_MODE_UC_MINUS
,
61 [__pte2cm_idx(_PAGE_PWT
| _PAGE_PCD
| 0 )] = _PAGE_CACHE_MODE_UC
,
62 [__pte2cm_idx( 0 | 0 | _PAGE_PAT
)] = _PAGE_CACHE_MODE_WB
,
63 [__pte2cm_idx(_PAGE_PWT
| 0 | _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC_MINUS
,
64 [__pte2cm_idx(0 | _PAGE_PCD
| _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC_MINUS
,
65 [__pte2cm_idx(_PAGE_PWT
| _PAGE_PCD
| _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC
,
67 EXPORT_SYMBOL(__pte2cachemode_tbl
);
69 static unsigned long __initdata pgt_buf_start
;
70 static unsigned long __initdata pgt_buf_end
;
71 static unsigned long __initdata pgt_buf_top
;
73 static unsigned long min_pfn_mapped
;
75 static bool __initdata can_use_brk_pgt
= true;
78 * Pages returned are already directly mapped.
80 * Changing that is likely to break Xen, see commit:
82 * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
84 * for detailed information.
86 __ref
void *alloc_low_pages(unsigned int num
)
94 order
= get_order((unsigned long)num
<< PAGE_SHIFT
);
95 return (void *)__get_free_pages(GFP_ATOMIC
| __GFP_ZERO
, order
);
98 if ((pgt_buf_end
+ num
) > pgt_buf_top
|| !can_use_brk_pgt
) {
100 if (min_pfn_mapped
>= max_pfn_mapped
)
101 panic("alloc_low_pages: ran out of memory");
102 ret
= memblock_find_in_range(min_pfn_mapped
<< PAGE_SHIFT
,
103 max_pfn_mapped
<< PAGE_SHIFT
,
104 PAGE_SIZE
* num
, PAGE_SIZE
);
106 panic("alloc_low_pages: can not alloc memory");
107 memblock_reserve(ret
, PAGE_SIZE
* num
);
108 pfn
= ret
>> PAGE_SHIFT
;
112 printk(KERN_DEBUG
"BRK [%#010lx, %#010lx] PGTABLE\n",
113 pfn
<< PAGE_SHIFT
, (pgt_buf_end
<< PAGE_SHIFT
) - 1);
116 for (i
= 0; i
< num
; i
++) {
119 adr
= __va((pfn
+ i
) << PAGE_SHIFT
);
123 return __va(pfn
<< PAGE_SHIFT
);
127 * By default need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS.
128 * With KASLR memory randomization, depending on the machine e820 memory
129 * and the PUD alignment. We may need twice more pages when KASLR memory
130 * randomization is enabled.
132 #ifndef CONFIG_RANDOMIZE_MEMORY
133 #define INIT_PGD_PAGE_COUNT 6
135 #define INIT_PGD_PAGE_COUNT 12
137 #define INIT_PGT_BUF_SIZE (INIT_PGD_PAGE_COUNT * PAGE_SIZE)
138 RESERVE_BRK(early_pgt_alloc
, INIT_PGT_BUF_SIZE
);
139 void __init
early_alloc_pgt_buf(void)
141 unsigned long tables
= INIT_PGT_BUF_SIZE
;
144 base
= __pa(extend_brk(tables
, PAGE_SIZE
));
146 pgt_buf_start
= base
>> PAGE_SHIFT
;
147 pgt_buf_end
= pgt_buf_start
;
148 pgt_buf_top
= pgt_buf_start
+ (tables
>> PAGE_SHIFT
);
153 early_param_on_off("gbpages", "nogbpages", direct_gbpages
, CONFIG_X86_DIRECT_GBPAGES
);
158 unsigned page_size_mask
;
161 static int page_size_mask
;
163 static void __init
probe_page_size_mask(void)
166 * For pagealloc debugging, identity mapping will use small pages.
167 * This will simplify cpa(), which otherwise needs to support splitting
168 * large pages into small in interrupt context, etc.
170 if (boot_cpu_has(X86_FEATURE_PSE
) && !debug_pagealloc_enabled())
171 page_size_mask
|= 1 << PG_LEVEL_2M
;
175 /* Enable PSE if available */
176 if (boot_cpu_has(X86_FEATURE_PSE
))
177 cr4_set_bits_and_update_boot(X86_CR4_PSE
);
179 /* Enable PGE if available */
180 if (boot_cpu_has(X86_FEATURE_PGE
)) {
181 cr4_set_bits_and_update_boot(X86_CR4_PGE
);
182 __supported_pte_mask
|= _PAGE_GLOBAL
;
184 __supported_pte_mask
&= ~_PAGE_GLOBAL
;
186 /* Enable 1 GB linear kernel mappings if available: */
187 if (direct_gbpages
&& boot_cpu_has(X86_FEATURE_GBPAGES
)) {
188 printk(KERN_INFO
"Using GB pages for direct mapping\n");
189 page_size_mask
|= 1 << PG_LEVEL_1G
;
195 static void setup_pcid(void)
198 if (boot_cpu_has(X86_FEATURE_PCID
)) {
199 if (boot_cpu_has(X86_FEATURE_PGE
)) {
201 * This can't be cr4_set_bits_and_update_boot() --
202 * the trampoline code can't handle CR4.PCIDE and
203 * it wouldn't do any good anyway. Despite the name,
204 * cr4_set_bits_and_update_boot() doesn't actually
205 * cause the bits in question to remain set all the
206 * way through the secondary boot asm.
208 * Instead, we brute-force it and set CR4.PCIDE
209 * manually in start_secondary().
211 cr4_set_bits(X86_CR4_PCIDE
);
214 * flush_tlb_all(), as currently implemented, won't
215 * work if PCID is on but PGE is not. Since that
216 * combination doesn't exist on real hardware, there's
217 * no reason to try to fully support it, but it's
218 * polite to avoid corrupting data if we're on
219 * an improperly configured VM.
221 setup_clear_cpu_cap(X86_FEATURE_PCID
);
228 #define NR_RANGE_MR 3
229 #else /* CONFIG_X86_64 */
230 #define NR_RANGE_MR 5
233 static int __meminit
save_mr(struct map_range
*mr
, int nr_range
,
234 unsigned long start_pfn
, unsigned long end_pfn
,
235 unsigned long page_size_mask
)
237 if (start_pfn
< end_pfn
) {
238 if (nr_range
>= NR_RANGE_MR
)
239 panic("run out of range for init_memory_mapping\n");
240 mr
[nr_range
].start
= start_pfn
<<PAGE_SHIFT
;
241 mr
[nr_range
].end
= end_pfn
<<PAGE_SHIFT
;
242 mr
[nr_range
].page_size_mask
= page_size_mask
;
250 * adjust the page_size_mask for small range to go with
251 * big page size instead small one if nearby are ram too.
253 static void __ref
adjust_range_page_size_mask(struct map_range
*mr
,
258 for (i
= 0; i
< nr_range
; i
++) {
259 if ((page_size_mask
& (1<<PG_LEVEL_2M
)) &&
260 !(mr
[i
].page_size_mask
& (1<<PG_LEVEL_2M
))) {
261 unsigned long start
= round_down(mr
[i
].start
, PMD_SIZE
);
262 unsigned long end
= round_up(mr
[i
].end
, PMD_SIZE
);
265 if ((end
>> PAGE_SHIFT
) > max_low_pfn
)
269 if (memblock_is_region_memory(start
, end
- start
))
270 mr
[i
].page_size_mask
|= 1<<PG_LEVEL_2M
;
272 if ((page_size_mask
& (1<<PG_LEVEL_1G
)) &&
273 !(mr
[i
].page_size_mask
& (1<<PG_LEVEL_1G
))) {
274 unsigned long start
= round_down(mr
[i
].start
, PUD_SIZE
);
275 unsigned long end
= round_up(mr
[i
].end
, PUD_SIZE
);
277 if (memblock_is_region_memory(start
, end
- start
))
278 mr
[i
].page_size_mask
|= 1<<PG_LEVEL_1G
;
283 static const char *page_size_string(struct map_range
*mr
)
285 static const char str_1g
[] = "1G";
286 static const char str_2m
[] = "2M";
287 static const char str_4m
[] = "4M";
288 static const char str_4k
[] = "4k";
290 if (mr
->page_size_mask
& (1<<PG_LEVEL_1G
))
293 * 32-bit without PAE has a 4M large page size.
294 * PG_LEVEL_2M is misnamed, but we can at least
295 * print out the right size in the string.
297 if (IS_ENABLED(CONFIG_X86_32
) &&
298 !IS_ENABLED(CONFIG_X86_PAE
) &&
299 mr
->page_size_mask
& (1<<PG_LEVEL_2M
))
302 if (mr
->page_size_mask
& (1<<PG_LEVEL_2M
))
308 static int __meminit
split_mem_range(struct map_range
*mr
, int nr_range
,
312 unsigned long start_pfn
, end_pfn
, limit_pfn
;
316 limit_pfn
= PFN_DOWN(end
);
318 /* head if not big page alignment ? */
319 pfn
= start_pfn
= PFN_DOWN(start
);
322 * Don't use a large page for the first 2/4MB of memory
323 * because there are often fixed size MTRRs in there
324 * and overlapping MTRRs into large pages can cause
328 end_pfn
= PFN_DOWN(PMD_SIZE
);
330 end_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
331 #else /* CONFIG_X86_64 */
332 end_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
334 if (end_pfn
> limit_pfn
)
336 if (start_pfn
< end_pfn
) {
337 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
, 0);
341 /* big page (2M) range */
342 start_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
344 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
345 #else /* CONFIG_X86_64 */
346 end_pfn
= round_up(pfn
, PFN_DOWN(PUD_SIZE
));
347 if (end_pfn
> round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
)))
348 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
351 if (start_pfn
< end_pfn
) {
352 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
353 page_size_mask
& (1<<PG_LEVEL_2M
));
358 /* big page (1G) range */
359 start_pfn
= round_up(pfn
, PFN_DOWN(PUD_SIZE
));
360 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PUD_SIZE
));
361 if (start_pfn
< end_pfn
) {
362 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
364 ((1<<PG_LEVEL_2M
)|(1<<PG_LEVEL_1G
)));
368 /* tail is not big page (1G) alignment */
369 start_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
370 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
371 if (start_pfn
< end_pfn
) {
372 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
373 page_size_mask
& (1<<PG_LEVEL_2M
));
378 /* tail is not big page (2M) alignment */
381 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
, 0);
384 adjust_range_page_size_mask(mr
, nr_range
);
386 /* try to merge same page size and continuous */
387 for (i
= 0; nr_range
> 1 && i
< nr_range
- 1; i
++) {
388 unsigned long old_start
;
389 if (mr
[i
].end
!= mr
[i
+1].start
||
390 mr
[i
].page_size_mask
!= mr
[i
+1].page_size_mask
)
393 old_start
= mr
[i
].start
;
394 memmove(&mr
[i
], &mr
[i
+1],
395 (nr_range
- 1 - i
) * sizeof(struct map_range
));
396 mr
[i
--].start
= old_start
;
400 for (i
= 0; i
< nr_range
; i
++)
401 pr_debug(" [mem %#010lx-%#010lx] page %s\n",
402 mr
[i
].start
, mr
[i
].end
- 1,
403 page_size_string(&mr
[i
]));
408 struct range pfn_mapped
[E820_MAX_ENTRIES
];
411 static void add_pfn_range_mapped(unsigned long start_pfn
, unsigned long end_pfn
)
413 nr_pfn_mapped
= add_range_with_merge(pfn_mapped
, E820_MAX_ENTRIES
,
414 nr_pfn_mapped
, start_pfn
, end_pfn
);
415 nr_pfn_mapped
= clean_sort_range(pfn_mapped
, E820_MAX_ENTRIES
);
417 max_pfn_mapped
= max(max_pfn_mapped
, end_pfn
);
419 if (start_pfn
< (1UL<<(32-PAGE_SHIFT
)))
420 max_low_pfn_mapped
= max(max_low_pfn_mapped
,
421 min(end_pfn
, 1UL<<(32-PAGE_SHIFT
)));
424 bool pfn_range_is_mapped(unsigned long start_pfn
, unsigned long end_pfn
)
428 for (i
= 0; i
< nr_pfn_mapped
; i
++)
429 if ((start_pfn
>= pfn_mapped
[i
].start
) &&
430 (end_pfn
<= pfn_mapped
[i
].end
))
437 * Setup the direct mapping of the physical memory at PAGE_OFFSET.
438 * This runs before bootmem is initialized and gets pages directly from
439 * the physical memory. To access them they are temporarily mapped.
441 unsigned long __ref
init_memory_mapping(unsigned long start
,
444 struct map_range mr
[NR_RANGE_MR
];
445 unsigned long ret
= 0;
448 pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n",
451 memset(mr
, 0, sizeof(mr
));
452 nr_range
= split_mem_range(mr
, 0, start
, end
);
454 for (i
= 0; i
< nr_range
; i
++)
455 ret
= kernel_physical_mapping_init(mr
[i
].start
, mr
[i
].end
,
456 mr
[i
].page_size_mask
);
458 add_pfn_range_mapped(start
>> PAGE_SHIFT
, ret
>> PAGE_SHIFT
);
460 return ret
>> PAGE_SHIFT
;
464 * We need to iterate through the E820 memory map and create direct mappings
465 * for only E820_TYPE_RAM and E820_KERN_RESERVED regions. We cannot simply
466 * create direct mappings for all pfns from [0 to max_low_pfn) and
467 * [4GB to max_pfn) because of possible memory holes in high addresses
468 * that cannot be marked as UC by fixed/variable range MTRRs.
469 * Depending on the alignment of E820 ranges, this may possibly result
470 * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
472 * init_mem_mapping() calls init_range_memory_mapping() with big range.
473 * That range would have hole in the middle or ends, and only ram parts
474 * will be mapped in init_range_memory_mapping().
476 static unsigned long __init
init_range_memory_mapping(
477 unsigned long r_start
,
480 unsigned long start_pfn
, end_pfn
;
481 unsigned long mapped_ram_size
= 0;
484 for_each_mem_pfn_range(i
, MAX_NUMNODES
, &start_pfn
, &end_pfn
, NULL
) {
485 u64 start
= clamp_val(PFN_PHYS(start_pfn
), r_start
, r_end
);
486 u64 end
= clamp_val(PFN_PHYS(end_pfn
), r_start
, r_end
);
491 * if it is overlapping with brk pgt, we need to
492 * alloc pgt buf from memblock instead.
494 can_use_brk_pgt
= max(start
, (u64
)pgt_buf_end
<<PAGE_SHIFT
) >=
495 min(end
, (u64
)pgt_buf_top
<<PAGE_SHIFT
);
496 init_memory_mapping(start
, end
);
497 mapped_ram_size
+= end
- start
;
498 can_use_brk_pgt
= true;
501 return mapped_ram_size
;
504 static unsigned long __init
get_new_step_size(unsigned long step_size
)
507 * Initial mapped size is PMD_SIZE (2M).
508 * We can not set step_size to be PUD_SIZE (1G) yet.
509 * In worse case, when we cross the 1G boundary, and
510 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
511 * to map 1G range with PTE. Hence we use one less than the
512 * difference of page table level shifts.
514 * Don't need to worry about overflow in the top-down case, on 32bit,
515 * when step_size is 0, round_down() returns 0 for start, and that
516 * turns it into 0x100000000ULL.
517 * In the bottom-up case, round_up(x, 0) returns 0 though too, which
518 * needs to be taken into consideration by the code below.
520 return step_size
<< (PMD_SHIFT
- PAGE_SHIFT
- 1);
524 * memory_map_top_down - Map [map_start, map_end) top down
525 * @map_start: start address of the target memory range
526 * @map_end: end address of the target memory range
528 * This function will setup direct mapping for memory range
529 * [map_start, map_end) in top-down. That said, the page tables
530 * will be allocated at the end of the memory, and we map the
531 * memory in top-down.
533 static void __init
memory_map_top_down(unsigned long map_start
,
534 unsigned long map_end
)
536 unsigned long real_end
, start
, last_start
;
537 unsigned long step_size
;
539 unsigned long mapped_ram_size
= 0;
541 /* xen has big range in reserved near end of ram, skip it at first.*/
542 addr
= memblock_find_in_range(map_start
, map_end
, PMD_SIZE
, PMD_SIZE
);
543 real_end
= addr
+ PMD_SIZE
;
545 /* step_size need to be small so pgt_buf from BRK could cover it */
546 step_size
= PMD_SIZE
;
547 max_pfn_mapped
= 0; /* will get exact value next */
548 min_pfn_mapped
= real_end
>> PAGE_SHIFT
;
549 last_start
= start
= real_end
;
552 * We start from the top (end of memory) and go to the bottom.
553 * The memblock_find_in_range() gets us a block of RAM from the
554 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
557 while (last_start
> map_start
) {
558 if (last_start
> step_size
) {
559 start
= round_down(last_start
- 1, step_size
);
560 if (start
< map_start
)
564 mapped_ram_size
+= init_range_memory_mapping(start
,
567 min_pfn_mapped
= last_start
>> PAGE_SHIFT
;
568 if (mapped_ram_size
>= step_size
)
569 step_size
= get_new_step_size(step_size
);
572 if (real_end
< map_end
)
573 init_range_memory_mapping(real_end
, map_end
);
577 * memory_map_bottom_up - Map [map_start, map_end) bottom up
578 * @map_start: start address of the target memory range
579 * @map_end: end address of the target memory range
581 * This function will setup direct mapping for memory range
582 * [map_start, map_end) in bottom-up. Since we have limited the
583 * bottom-up allocation above the kernel, the page tables will
584 * be allocated just above the kernel and we map the memory
585 * in [map_start, map_end) in bottom-up.
587 static void __init
memory_map_bottom_up(unsigned long map_start
,
588 unsigned long map_end
)
590 unsigned long next
, start
;
591 unsigned long mapped_ram_size
= 0;
592 /* step_size need to be small so pgt_buf from BRK could cover it */
593 unsigned long step_size
= PMD_SIZE
;
596 min_pfn_mapped
= start
>> PAGE_SHIFT
;
599 * We start from the bottom (@map_start) and go to the top (@map_end).
600 * The memblock_find_in_range() gets us a block of RAM from the
601 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
604 while (start
< map_end
) {
605 if (step_size
&& map_end
- start
> step_size
) {
606 next
= round_up(start
+ 1, step_size
);
613 mapped_ram_size
+= init_range_memory_mapping(start
, next
);
616 if (mapped_ram_size
>= step_size
)
617 step_size
= get_new_step_size(step_size
);
621 void __init
init_mem_mapping(void)
625 probe_page_size_mask();
629 end
= max_pfn
<< PAGE_SHIFT
;
631 end
= max_low_pfn
<< PAGE_SHIFT
;
634 /* the ISA range is always mapped regardless of memory holes */
635 init_memory_mapping(0, ISA_END_ADDRESS
);
637 /* Init the trampoline, possibly with KASLR memory offset */
641 * If the allocation is in bottom-up direction, we setup direct mapping
642 * in bottom-up, otherwise we setup direct mapping in top-down.
644 if (memblock_bottom_up()) {
645 unsigned long kernel_end
= __pa_symbol(_end
);
648 * we need two separate calls here. This is because we want to
649 * allocate page tables above the kernel. So we first map
650 * [kernel_end, end) to make memory above the kernel be mapped
651 * as soon as possible. And then use page tables allocated above
652 * the kernel to map [ISA_END_ADDRESS, kernel_end).
654 memory_map_bottom_up(kernel_end
, end
);
655 memory_map_bottom_up(ISA_END_ADDRESS
, kernel_end
);
657 memory_map_top_down(ISA_END_ADDRESS
, end
);
661 if (max_pfn
> max_low_pfn
) {
662 /* can we preseve max_low_pfn ?*/
663 max_low_pfn
= max_pfn
;
666 early_ioremap_page_table_range_init();
669 load_cr3(swapper_pg_dir
);
672 x86_init
.hyper
.init_mem_mapping();
674 early_memtest(0, max_pfn_mapped
<< PAGE_SHIFT
);
678 * devmem_is_allowed() checks to see if /dev/mem access to a certain address
679 * is valid. The argument is a physical page number.
681 * On x86, access has to be given to the first megabyte of RAM because that
682 * area traditionally contains BIOS code and data regions used by X, dosemu,
683 * and similar apps. Since they map the entire memory range, the whole range
684 * must be allowed (for mapping), but any areas that would otherwise be
685 * disallowed are flagged as being "zero filled" instead of rejected.
686 * Access has to be given to non-kernel-ram areas as well, these contain the
687 * PCI mmio resources as well as potential bios/acpi data regions.
689 int devmem_is_allowed(unsigned long pagenr
)
691 if (page_is_ram(pagenr
)) {
693 * For disallowed memory regions in the low 1MB range,
694 * request that the page be shown as all zeros.
703 * This must follow RAM test, since System RAM is considered a
704 * restricted resource under CONFIG_STRICT_IOMEM.
706 if (iomem_is_exclusive(pagenr
<< PAGE_SHIFT
)) {
707 /* Low 1MB bypasses iomem restrictions. */
717 void free_init_pages(char *what
, unsigned long begin
, unsigned long end
)
719 unsigned long begin_aligned
, end_aligned
;
721 /* Make sure boundaries are page aligned */
722 begin_aligned
= PAGE_ALIGN(begin
);
723 end_aligned
= end
& PAGE_MASK
;
725 if (WARN_ON(begin_aligned
!= begin
|| end_aligned
!= end
)) {
726 begin
= begin_aligned
;
734 * If debugging page accesses then do not free this memory but
735 * mark them not present - any buggy init-section access will
736 * create a kernel page fault:
738 if (debug_pagealloc_enabled()) {
739 pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n",
741 set_memory_np(begin
, (end
- begin
) >> PAGE_SHIFT
);
744 * We just marked the kernel text read only above, now that
745 * we are going to free part of that, we need to make that
746 * writeable and non-executable first.
748 set_memory_nx(begin
, (end
- begin
) >> PAGE_SHIFT
);
749 set_memory_rw(begin
, (end
- begin
) >> PAGE_SHIFT
);
751 free_reserved_area((void *)begin
, (void *)end
,
752 POISON_FREE_INITMEM
, what
);
756 void __ref
free_initmem(void)
758 e820__reallocate_tables();
760 free_init_pages("unused kernel",
761 (unsigned long)(&__init_begin
),
762 (unsigned long)(&__init_end
));
765 #ifdef CONFIG_BLK_DEV_INITRD
766 void __init
free_initrd_mem(unsigned long start
, unsigned long end
)
769 * end could be not aligned, and We can not align that,
770 * decompresser could be confused by aligned initrd_end
771 * We already reserve the end partial page before in
772 * - i386_start_kernel()
773 * - x86_64_start_kernel()
774 * - relocate_initrd()
775 * So here We can do PAGE_ALIGN() safely to get partial page to be freed
777 free_init_pages("initrd", start
, PAGE_ALIGN(end
));
782 * Calculate the precise size of the DMA zone (first 16 MB of RAM),
783 * and pass it to the MM layer - to help it set zone watermarks more
786 * Done on 64-bit systems only for the time being, although 32-bit systems
787 * might benefit from this as well.
789 void __init
memblock_find_dma_reserve(void)
792 u64 nr_pages
= 0, nr_free_pages
= 0;
793 unsigned long start_pfn
, end_pfn
;
794 phys_addr_t start_addr
, end_addr
;
799 * Iterate over all memory ranges (free and reserved ones alike),
800 * to calculate the total number of pages in the first 16 MB of RAM:
803 for_each_mem_pfn_range(i
, MAX_NUMNODES
, &start_pfn
, &end_pfn
, NULL
) {
804 start_pfn
= min(start_pfn
, MAX_DMA_PFN
);
805 end_pfn
= min(end_pfn
, MAX_DMA_PFN
);
807 nr_pages
+= end_pfn
- start_pfn
;
811 * Iterate over free memory ranges to calculate the number of free
812 * pages in the DMA zone, while not counting potential partial
813 * pages at the beginning or the end of the range:
816 for_each_free_mem_range(u
, NUMA_NO_NODE
, MEMBLOCK_NONE
, &start_addr
, &end_addr
, NULL
) {
817 start_pfn
= min_t(unsigned long, PFN_UP(start_addr
), MAX_DMA_PFN
);
818 end_pfn
= min_t(unsigned long, PFN_DOWN(end_addr
), MAX_DMA_PFN
);
820 if (start_pfn
< end_pfn
)
821 nr_free_pages
+= end_pfn
- start_pfn
;
824 set_dma_reserve(nr_pages
- nr_free_pages
);
828 void __init
zone_sizes_init(void)
830 unsigned long max_zone_pfns
[MAX_NR_ZONES
];
832 memset(max_zone_pfns
, 0, sizeof(max_zone_pfns
));
834 #ifdef CONFIG_ZONE_DMA
835 max_zone_pfns
[ZONE_DMA
] = min(MAX_DMA_PFN
, max_low_pfn
);
837 #ifdef CONFIG_ZONE_DMA32
838 max_zone_pfns
[ZONE_DMA32
] = min(MAX_DMA32_PFN
, max_low_pfn
);
840 max_zone_pfns
[ZONE_NORMAL
] = max_low_pfn
;
841 #ifdef CONFIG_HIGHMEM
842 max_zone_pfns
[ZONE_HIGHMEM
] = max_pfn
;
845 free_area_init_nodes(max_zone_pfns
);
848 DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state
, cpu_tlbstate
) = {
849 .loaded_mm
= &init_mm
,
851 .cr4
= ~0UL, /* fail hard if we screw up cr4 shadow initialization */
853 EXPORT_SYMBOL_GPL(cpu_tlbstate
);
855 void update_cache_mode_entry(unsigned entry
, enum page_cache_mode cache
)
857 /* entry 0 MUST be WB (hardwired to speed up translations) */
858 BUG_ON(!entry
&& cache
!= _PAGE_CACHE_MODE_WB
);
860 __cachemode2pte_tbl
[cache
] = __cm_idx2pte(entry
);
861 __pte2cachemode_tbl
[entry
] = cache
;