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1 /*
2 * linux/arch/x86_64/mm/init.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz>
6 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
7 */
8
9 #include <linux/signal.h>
10 #include <linux/sched.h>
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/string.h>
14 #include <linux/types.h>
15 #include <linux/ptrace.h>
16 #include <linux/mman.h>
17 #include <linux/mm.h>
18 #include <linux/swap.h>
19 #include <linux/smp.h>
20 #include <linux/init.h>
21 #include <linux/initrd.h>
22 #include <linux/pagemap.h>
23 #include <linux/bootmem.h>
24 #include <linux/memblock.h>
25 #include <linux/proc_fs.h>
26 #include <linux/pci.h>
27 #include <linux/pfn.h>
28 #include <linux/poison.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/memory.h>
31 #include <linux/memory_hotplug.h>
32 #include <linux/memremap.h>
33 #include <linux/nmi.h>
34 #include <linux/gfp.h>
35 #include <linux/kcore.h>
36
37 #include <asm/processor.h>
38 #include <asm/bios_ebda.h>
39 #include <linux/uaccess.h>
40 #include <asm/pgtable.h>
41 #include <asm/pgalloc.h>
42 #include <asm/dma.h>
43 #include <asm/fixmap.h>
44 #include <asm/e820/api.h>
45 #include <asm/apic.h>
46 #include <asm/tlb.h>
47 #include <asm/mmu_context.h>
48 #include <asm/proto.h>
49 #include <asm/smp.h>
50 #include <asm/sections.h>
51 #include <asm/kdebug.h>
52 #include <asm/numa.h>
53 #include <asm/set_memory.h>
54 #include <asm/init.h>
55 #include <asm/uv/uv.h>
56 #include <asm/setup.h>
57
58 #include "mm_internal.h"
59
60 #include "ident_map.c"
61
62 /*
63 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
64 * physical space so we can cache the place of the first one and move
65 * around without checking the pgd every time.
66 */
67
68 pteval_t __supported_pte_mask __read_mostly = ~0;
69 EXPORT_SYMBOL_GPL(__supported_pte_mask);
70
71 int force_personality32;
72
73 /*
74 * noexec32=on|off
75 * Control non executable heap for 32bit processes.
76 * To control the stack too use noexec=off
77 *
78 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
79 * off PROT_READ implies PROT_EXEC
80 */
81 static int __init nonx32_setup(char *str)
82 {
83 if (!strcmp(str, "on"))
84 force_personality32 &= ~READ_IMPLIES_EXEC;
85 else if (!strcmp(str, "off"))
86 force_personality32 |= READ_IMPLIES_EXEC;
87 return 1;
88 }
89 __setup("noexec32=", nonx32_setup);
90
91 /*
92 * When memory was added make sure all the processes MM have
93 * suitable PGD entries in the local PGD level page.
94 */
95 void sync_global_pgds(unsigned long start, unsigned long end)
96 {
97 unsigned long addr;
98
99 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) {
100 pgd_t *pgd_ref = pgd_offset_k(addr);
101 const p4d_t *p4d_ref;
102 struct page *page;
103
104 /*
105 * With folded p4d, pgd_none() is always false, we need to
106 * handle synchonization on p4d level.
107 */
108 BUILD_BUG_ON(pgd_none(*pgd_ref));
109 p4d_ref = p4d_offset(pgd_ref, addr);
110
111 if (p4d_none(*p4d_ref))
112 continue;
113
114 spin_lock(&pgd_lock);
115 list_for_each_entry(page, &pgd_list, lru) {
116 pgd_t *pgd;
117 p4d_t *p4d;
118 spinlock_t *pgt_lock;
119
120 pgd = (pgd_t *)page_address(page) + pgd_index(addr);
121 p4d = p4d_offset(pgd, addr);
122 /* the pgt_lock only for Xen */
123 pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
124 spin_lock(pgt_lock);
125
126 if (!p4d_none(*p4d_ref) && !p4d_none(*p4d))
127 BUG_ON(p4d_page_vaddr(*p4d)
128 != p4d_page_vaddr(*p4d_ref));
129
130 if (p4d_none(*p4d))
131 set_p4d(p4d, *p4d_ref);
132
133 spin_unlock(pgt_lock);
134 }
135 spin_unlock(&pgd_lock);
136 }
137 }
138
139 /*
140 * NOTE: This function is marked __ref because it calls __init function
141 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
142 */
143 static __ref void *spp_getpage(void)
144 {
145 void *ptr;
146
147 if (after_bootmem)
148 ptr = (void *) get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
149 else
150 ptr = alloc_bootmem_pages(PAGE_SIZE);
151
152 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
153 panic("set_pte_phys: cannot allocate page data %s\n",
154 after_bootmem ? "after bootmem" : "");
155 }
156
157 pr_debug("spp_getpage %p\n", ptr);
158
159 return ptr;
160 }
161
162 static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr)
163 {
164 if (pgd_none(*pgd)) {
165 p4d_t *p4d = (p4d_t *)spp_getpage();
166 pgd_populate(&init_mm, pgd, p4d);
167 if (p4d != p4d_offset(pgd, 0))
168 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
169 p4d, p4d_offset(pgd, 0));
170 }
171 return p4d_offset(pgd, vaddr);
172 }
173
174 static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr)
175 {
176 if (p4d_none(*p4d)) {
177 pud_t *pud = (pud_t *)spp_getpage();
178 p4d_populate(&init_mm, p4d, pud);
179 if (pud != pud_offset(p4d, 0))
180 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
181 pud, pud_offset(p4d, 0));
182 }
183 return pud_offset(p4d, vaddr);
184 }
185
186 static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
187 {
188 if (pud_none(*pud)) {
189 pmd_t *pmd = (pmd_t *) spp_getpage();
190 pud_populate(&init_mm, pud, pmd);
191 if (pmd != pmd_offset(pud, 0))
192 printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n",
193 pmd, pmd_offset(pud, 0));
194 }
195 return pmd_offset(pud, vaddr);
196 }
197
198 static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
199 {
200 if (pmd_none(*pmd)) {
201 pte_t *pte = (pte_t *) spp_getpage();
202 pmd_populate_kernel(&init_mm, pmd, pte);
203 if (pte != pte_offset_kernel(pmd, 0))
204 printk(KERN_ERR "PAGETABLE BUG #03!\n");
205 }
206 return pte_offset_kernel(pmd, vaddr);
207 }
208
209 static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte)
210 {
211 pmd_t *pmd = fill_pmd(pud, vaddr);
212 pte_t *pte = fill_pte(pmd, vaddr);
213
214 set_pte(pte, new_pte);
215
216 /*
217 * It's enough to flush this one mapping.
218 * (PGE mappings get flushed as well)
219 */
220 __flush_tlb_one(vaddr);
221 }
222
223 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte)
224 {
225 p4d_t *p4d = p4d_page + p4d_index(vaddr);
226 pud_t *pud = fill_pud(p4d, vaddr);
227
228 __set_pte_vaddr(pud, vaddr, new_pte);
229 }
230
231 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
232 {
233 pud_t *pud = pud_page + pud_index(vaddr);
234
235 __set_pte_vaddr(pud, vaddr, new_pte);
236 }
237
238 void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
239 {
240 pgd_t *pgd;
241 p4d_t *p4d_page;
242
243 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
244
245 pgd = pgd_offset_k(vaddr);
246 if (pgd_none(*pgd)) {
247 printk(KERN_ERR
248 "PGD FIXMAP MISSING, it should be setup in head.S!\n");
249 return;
250 }
251
252 p4d_page = p4d_offset(pgd, 0);
253 set_pte_vaddr_p4d(p4d_page, vaddr, pteval);
254 }
255
256 pmd_t * __init populate_extra_pmd(unsigned long vaddr)
257 {
258 pgd_t *pgd;
259 p4d_t *p4d;
260 pud_t *pud;
261
262 pgd = pgd_offset_k(vaddr);
263 p4d = fill_p4d(pgd, vaddr);
264 pud = fill_pud(p4d, vaddr);
265 return fill_pmd(pud, vaddr);
266 }
267
268 pte_t * __init populate_extra_pte(unsigned long vaddr)
269 {
270 pmd_t *pmd;
271
272 pmd = populate_extra_pmd(vaddr);
273 return fill_pte(pmd, vaddr);
274 }
275
276 /*
277 * Create large page table mappings for a range of physical addresses.
278 */
279 static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
280 enum page_cache_mode cache)
281 {
282 pgd_t *pgd;
283 p4d_t *p4d;
284 pud_t *pud;
285 pmd_t *pmd;
286 pgprot_t prot;
287
288 pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) |
289 pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache)));
290 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
291 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
292 pgd = pgd_offset_k((unsigned long)__va(phys));
293 if (pgd_none(*pgd)) {
294 p4d = (p4d_t *) spp_getpage();
295 set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE |
296 _PAGE_USER));
297 }
298 p4d = p4d_offset(pgd, (unsigned long)__va(phys));
299 if (p4d_none(*p4d)) {
300 pud = (pud_t *) spp_getpage();
301 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE |
302 _PAGE_USER));
303 }
304 pud = pud_offset(p4d, (unsigned long)__va(phys));
305 if (pud_none(*pud)) {
306 pmd = (pmd_t *) spp_getpage();
307 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
308 _PAGE_USER));
309 }
310 pmd = pmd_offset(pud, phys);
311 BUG_ON(!pmd_none(*pmd));
312 set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
313 }
314 }
315
316 void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
317 {
318 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB);
319 }
320
321 void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
322 {
323 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC);
324 }
325
326 /*
327 * The head.S code sets up the kernel high mapping:
328 *
329 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
330 *
331 * phys_base holds the negative offset to the kernel, which is added
332 * to the compile time generated pmds. This results in invalid pmds up
333 * to the point where we hit the physaddr 0 mapping.
334 *
335 * We limit the mappings to the region from _text to _brk_end. _brk_end
336 * is rounded up to the 2MB boundary. This catches the invalid pmds as
337 * well, as they are located before _text:
338 */
339 void __init cleanup_highmap(void)
340 {
341 unsigned long vaddr = __START_KERNEL_map;
342 unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE;
343 unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
344 pmd_t *pmd = level2_kernel_pgt;
345
346 /*
347 * Native path, max_pfn_mapped is not set yet.
348 * Xen has valid max_pfn_mapped set in
349 * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable().
350 */
351 if (max_pfn_mapped)
352 vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
353
354 for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
355 if (pmd_none(*pmd))
356 continue;
357 if (vaddr < (unsigned long) _text || vaddr > end)
358 set_pmd(pmd, __pmd(0));
359 }
360 }
361
362 /*
363 * Create PTE level page table mapping for physical addresses.
364 * It returns the last physical address mapped.
365 */
366 static unsigned long __meminit
367 phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end,
368 pgprot_t prot)
369 {
370 unsigned long pages = 0, paddr_next;
371 unsigned long paddr_last = paddr_end;
372 pte_t *pte;
373 int i;
374
375 pte = pte_page + pte_index(paddr);
376 i = pte_index(paddr);
377
378 for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) {
379 paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE;
380 if (paddr >= paddr_end) {
381 if (!after_bootmem &&
382 !e820__mapped_any(paddr & PAGE_MASK, paddr_next,
383 E820_TYPE_RAM) &&
384 !e820__mapped_any(paddr & PAGE_MASK, paddr_next,
385 E820_TYPE_RESERVED_KERN))
386 set_pte(pte, __pte(0));
387 continue;
388 }
389
390 /*
391 * We will re-use the existing mapping.
392 * Xen for example has some special requirements, like mapping
393 * pagetable pages as RO. So assume someone who pre-setup
394 * these mappings are more intelligent.
395 */
396 if (!pte_none(*pte)) {
397 if (!after_bootmem)
398 pages++;
399 continue;
400 }
401
402 if (0)
403 pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr,
404 pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte);
405 pages++;
406 set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, prot));
407 paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE;
408 }
409
410 update_page_count(PG_LEVEL_4K, pages);
411
412 return paddr_last;
413 }
414
415 /*
416 * Create PMD level page table mapping for physical addresses. The virtual
417 * and physical address have to be aligned at this level.
418 * It returns the last physical address mapped.
419 */
420 static unsigned long __meminit
421 phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end,
422 unsigned long page_size_mask, pgprot_t prot)
423 {
424 unsigned long pages = 0, paddr_next;
425 unsigned long paddr_last = paddr_end;
426
427 int i = pmd_index(paddr);
428
429 for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) {
430 pmd_t *pmd = pmd_page + pmd_index(paddr);
431 pte_t *pte;
432 pgprot_t new_prot = prot;
433
434 paddr_next = (paddr & PMD_MASK) + PMD_SIZE;
435 if (paddr >= paddr_end) {
436 if (!after_bootmem &&
437 !e820__mapped_any(paddr & PMD_MASK, paddr_next,
438 E820_TYPE_RAM) &&
439 !e820__mapped_any(paddr & PMD_MASK, paddr_next,
440 E820_TYPE_RESERVED_KERN))
441 set_pmd(pmd, __pmd(0));
442 continue;
443 }
444
445 if (!pmd_none(*pmd)) {
446 if (!pmd_large(*pmd)) {
447 spin_lock(&init_mm.page_table_lock);
448 pte = (pte_t *)pmd_page_vaddr(*pmd);
449 paddr_last = phys_pte_init(pte, paddr,
450 paddr_end, prot);
451 spin_unlock(&init_mm.page_table_lock);
452 continue;
453 }
454 /*
455 * If we are ok with PG_LEVEL_2M mapping, then we will
456 * use the existing mapping,
457 *
458 * Otherwise, we will split the large page mapping but
459 * use the same existing protection bits except for
460 * large page, so that we don't violate Intel's TLB
461 * Application note (317080) which says, while changing
462 * the page sizes, new and old translations should
463 * not differ with respect to page frame and
464 * attributes.
465 */
466 if (page_size_mask & (1 << PG_LEVEL_2M)) {
467 if (!after_bootmem)
468 pages++;
469 paddr_last = paddr_next;
470 continue;
471 }
472 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
473 }
474
475 if (page_size_mask & (1<<PG_LEVEL_2M)) {
476 pages++;
477 spin_lock(&init_mm.page_table_lock);
478 set_pte((pte_t *)pmd,
479 pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT,
480 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
481 spin_unlock(&init_mm.page_table_lock);
482 paddr_last = paddr_next;
483 continue;
484 }
485
486 pte = alloc_low_page();
487 paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot);
488
489 spin_lock(&init_mm.page_table_lock);
490 pmd_populate_kernel(&init_mm, pmd, pte);
491 spin_unlock(&init_mm.page_table_lock);
492 }
493 update_page_count(PG_LEVEL_2M, pages);
494 return paddr_last;
495 }
496
497 /*
498 * Create PUD level page table mapping for physical addresses. The virtual
499 * and physical address do not have to be aligned at this level. KASLR can
500 * randomize virtual addresses up to this level.
501 * It returns the last physical address mapped.
502 */
503 static unsigned long __meminit
504 phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end,
505 unsigned long page_size_mask)
506 {
507 unsigned long pages = 0, paddr_next;
508 unsigned long paddr_last = paddr_end;
509 unsigned long vaddr = (unsigned long)__va(paddr);
510 int i = pud_index(vaddr);
511
512 for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) {
513 pud_t *pud;
514 pmd_t *pmd;
515 pgprot_t prot = PAGE_KERNEL;
516
517 vaddr = (unsigned long)__va(paddr);
518 pud = pud_page + pud_index(vaddr);
519 paddr_next = (paddr & PUD_MASK) + PUD_SIZE;
520
521 if (paddr >= paddr_end) {
522 if (!after_bootmem &&
523 !e820__mapped_any(paddr & PUD_MASK, paddr_next,
524 E820_TYPE_RAM) &&
525 !e820__mapped_any(paddr & PUD_MASK, paddr_next,
526 E820_TYPE_RESERVED_KERN))
527 set_pud(pud, __pud(0));
528 continue;
529 }
530
531 if (!pud_none(*pud)) {
532 if (!pud_large(*pud)) {
533 pmd = pmd_offset(pud, 0);
534 paddr_last = phys_pmd_init(pmd, paddr,
535 paddr_end,
536 page_size_mask,
537 prot);
538 __flush_tlb_all();
539 continue;
540 }
541 /*
542 * If we are ok with PG_LEVEL_1G mapping, then we will
543 * use the existing mapping.
544 *
545 * Otherwise, we will split the gbpage mapping but use
546 * the same existing protection bits except for large
547 * page, so that we don't violate Intel's TLB
548 * Application note (317080) which says, while changing
549 * the page sizes, new and old translations should
550 * not differ with respect to page frame and
551 * attributes.
552 */
553 if (page_size_mask & (1 << PG_LEVEL_1G)) {
554 if (!after_bootmem)
555 pages++;
556 paddr_last = paddr_next;
557 continue;
558 }
559 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
560 }
561
562 if (page_size_mask & (1<<PG_LEVEL_1G)) {
563 pages++;
564 spin_lock(&init_mm.page_table_lock);
565 set_pte((pte_t *)pud,
566 pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT,
567 PAGE_KERNEL_LARGE));
568 spin_unlock(&init_mm.page_table_lock);
569 paddr_last = paddr_next;
570 continue;
571 }
572
573 pmd = alloc_low_page();
574 paddr_last = phys_pmd_init(pmd, paddr, paddr_end,
575 page_size_mask, prot);
576
577 spin_lock(&init_mm.page_table_lock);
578 pud_populate(&init_mm, pud, pmd);
579 spin_unlock(&init_mm.page_table_lock);
580 }
581 __flush_tlb_all();
582
583 update_page_count(PG_LEVEL_1G, pages);
584
585 return paddr_last;
586 }
587
588 /*
589 * Create page table mapping for the physical memory for specific physical
590 * addresses. The virtual and physical addresses have to be aligned on PMD level
591 * down. It returns the last physical address mapped.
592 */
593 unsigned long __meminit
594 kernel_physical_mapping_init(unsigned long paddr_start,
595 unsigned long paddr_end,
596 unsigned long page_size_mask)
597 {
598 bool pgd_changed = false;
599 unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last;
600
601 paddr_last = paddr_end;
602 vaddr = (unsigned long)__va(paddr_start);
603 vaddr_end = (unsigned long)__va(paddr_end);
604 vaddr_start = vaddr;
605
606 for (; vaddr < vaddr_end; vaddr = vaddr_next) {
607 pgd_t *pgd = pgd_offset_k(vaddr);
608 p4d_t *p4d;
609 pud_t *pud;
610
611 vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE;
612
613 BUILD_BUG_ON(pgd_none(*pgd));
614 p4d = p4d_offset(pgd, vaddr);
615 if (p4d_val(*p4d)) {
616 pud = (pud_t *)p4d_page_vaddr(*p4d);
617 paddr_last = phys_pud_init(pud, __pa(vaddr),
618 __pa(vaddr_end),
619 page_size_mask);
620 continue;
621 }
622
623 pud = alloc_low_page();
624 paddr_last = phys_pud_init(pud, __pa(vaddr), __pa(vaddr_end),
625 page_size_mask);
626
627 spin_lock(&init_mm.page_table_lock);
628 p4d_populate(&init_mm, p4d, pud);
629 spin_unlock(&init_mm.page_table_lock);
630 pgd_changed = true;
631 }
632
633 if (pgd_changed)
634 sync_global_pgds(vaddr_start, vaddr_end - 1);
635
636 __flush_tlb_all();
637
638 return paddr_last;
639 }
640
641 #ifndef CONFIG_NUMA
642 void __init initmem_init(void)
643 {
644 memblock_set_node(0, (phys_addr_t)ULLONG_MAX, &memblock.memory, 0);
645 }
646 #endif
647
648 void __init paging_init(void)
649 {
650 sparse_memory_present_with_active_regions(MAX_NUMNODES);
651 sparse_init();
652
653 /*
654 * clear the default setting with node 0
655 * note: don't use nodes_clear here, that is really clearing when
656 * numa support is not compiled in, and later node_set_state
657 * will not set it back.
658 */
659 node_clear_state(0, N_MEMORY);
660 if (N_MEMORY != N_NORMAL_MEMORY)
661 node_clear_state(0, N_NORMAL_MEMORY);
662
663 zone_sizes_init();
664 }
665
666 /*
667 * Memory hotplug specific functions
668 */
669 #ifdef CONFIG_MEMORY_HOTPLUG
670 /*
671 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
672 * updating.
673 */
674 static void update_end_of_memory_vars(u64 start, u64 size)
675 {
676 unsigned long end_pfn = PFN_UP(start + size);
677
678 if (end_pfn > max_pfn) {
679 max_pfn = end_pfn;
680 max_low_pfn = end_pfn;
681 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
682 }
683 }
684
685 /*
686 * Memory is added always to NORMAL zone. This means you will never get
687 * additional DMA/DMA32 memory.
688 */
689 int arch_add_memory(int nid, u64 start, u64 size, bool for_device)
690 {
691 struct pglist_data *pgdat = NODE_DATA(nid);
692 struct zone *zone = pgdat->node_zones +
693 zone_for_memory(nid, start, size, ZONE_NORMAL, for_device);
694 unsigned long start_pfn = start >> PAGE_SHIFT;
695 unsigned long nr_pages = size >> PAGE_SHIFT;
696 int ret;
697
698 init_memory_mapping(start, start + size);
699
700 ret = __add_pages(nid, zone, start_pfn, nr_pages);
701 WARN_ON_ONCE(ret);
702
703 /* update max_pfn, max_low_pfn and high_memory */
704 update_end_of_memory_vars(start, size);
705
706 return ret;
707 }
708 EXPORT_SYMBOL_GPL(arch_add_memory);
709
710 #define PAGE_INUSE 0xFD
711
712 static void __meminit free_pagetable(struct page *page, int order)
713 {
714 unsigned long magic;
715 unsigned int nr_pages = 1 << order;
716 struct vmem_altmap *altmap = to_vmem_altmap((unsigned long) page);
717
718 if (altmap) {
719 vmem_altmap_free(altmap, nr_pages);
720 return;
721 }
722
723 /* bootmem page has reserved flag */
724 if (PageReserved(page)) {
725 __ClearPageReserved(page);
726
727 magic = (unsigned long)page->freelist;
728 if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) {
729 while (nr_pages--)
730 put_page_bootmem(page++);
731 } else
732 while (nr_pages--)
733 free_reserved_page(page++);
734 } else
735 free_pages((unsigned long)page_address(page), order);
736 }
737
738 static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd)
739 {
740 pte_t *pte;
741 int i;
742
743 for (i = 0; i < PTRS_PER_PTE; i++) {
744 pte = pte_start + i;
745 if (!pte_none(*pte))
746 return;
747 }
748
749 /* free a pte talbe */
750 free_pagetable(pmd_page(*pmd), 0);
751 spin_lock(&init_mm.page_table_lock);
752 pmd_clear(pmd);
753 spin_unlock(&init_mm.page_table_lock);
754 }
755
756 static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud)
757 {
758 pmd_t *pmd;
759 int i;
760
761 for (i = 0; i < PTRS_PER_PMD; i++) {
762 pmd = pmd_start + i;
763 if (!pmd_none(*pmd))
764 return;
765 }
766
767 /* free a pmd talbe */
768 free_pagetable(pud_page(*pud), 0);
769 spin_lock(&init_mm.page_table_lock);
770 pud_clear(pud);
771 spin_unlock(&init_mm.page_table_lock);
772 }
773
774 static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d)
775 {
776 pud_t *pud;
777 int i;
778
779 for (i = 0; i < PTRS_PER_PUD; i++) {
780 pud = pud_start + i;
781 if (!pud_none(*pud))
782 return;
783 }
784
785 /* free a pud talbe */
786 free_pagetable(p4d_page(*p4d), 0);
787 spin_lock(&init_mm.page_table_lock);
788 p4d_clear(p4d);
789 spin_unlock(&init_mm.page_table_lock);
790 }
791
792 static void __meminit
793 remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
794 bool direct)
795 {
796 unsigned long next, pages = 0;
797 pte_t *pte;
798 void *page_addr;
799 phys_addr_t phys_addr;
800
801 pte = pte_start + pte_index(addr);
802 for (; addr < end; addr = next, pte++) {
803 next = (addr + PAGE_SIZE) & PAGE_MASK;
804 if (next > end)
805 next = end;
806
807 if (!pte_present(*pte))
808 continue;
809
810 /*
811 * We mapped [0,1G) memory as identity mapping when
812 * initializing, in arch/x86/kernel/head_64.S. These
813 * pagetables cannot be removed.
814 */
815 phys_addr = pte_val(*pte) + (addr & PAGE_MASK);
816 if (phys_addr < (phys_addr_t)0x40000000)
817 return;
818
819 if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) {
820 /*
821 * Do not free direct mapping pages since they were
822 * freed when offlining, or simplely not in use.
823 */
824 if (!direct)
825 free_pagetable(pte_page(*pte), 0);
826
827 spin_lock(&init_mm.page_table_lock);
828 pte_clear(&init_mm, addr, pte);
829 spin_unlock(&init_mm.page_table_lock);
830
831 /* For non-direct mapping, pages means nothing. */
832 pages++;
833 } else {
834 /*
835 * If we are here, we are freeing vmemmap pages since
836 * direct mapped memory ranges to be freed are aligned.
837 *
838 * If we are not removing the whole page, it means
839 * other page structs in this page are being used and
840 * we canot remove them. So fill the unused page_structs
841 * with 0xFD, and remove the page when it is wholly
842 * filled with 0xFD.
843 */
844 memset((void *)addr, PAGE_INUSE, next - addr);
845
846 page_addr = page_address(pte_page(*pte));
847 if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) {
848 free_pagetable(pte_page(*pte), 0);
849
850 spin_lock(&init_mm.page_table_lock);
851 pte_clear(&init_mm, addr, pte);
852 spin_unlock(&init_mm.page_table_lock);
853 }
854 }
855 }
856
857 /* Call free_pte_table() in remove_pmd_table(). */
858 flush_tlb_all();
859 if (direct)
860 update_page_count(PG_LEVEL_4K, -pages);
861 }
862
863 static void __meminit
864 remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
865 bool direct)
866 {
867 unsigned long next, pages = 0;
868 pte_t *pte_base;
869 pmd_t *pmd;
870 void *page_addr;
871
872 pmd = pmd_start + pmd_index(addr);
873 for (; addr < end; addr = next, pmd++) {
874 next = pmd_addr_end(addr, end);
875
876 if (!pmd_present(*pmd))
877 continue;
878
879 if (pmd_large(*pmd)) {
880 if (IS_ALIGNED(addr, PMD_SIZE) &&
881 IS_ALIGNED(next, PMD_SIZE)) {
882 if (!direct)
883 free_pagetable(pmd_page(*pmd),
884 get_order(PMD_SIZE));
885
886 spin_lock(&init_mm.page_table_lock);
887 pmd_clear(pmd);
888 spin_unlock(&init_mm.page_table_lock);
889 pages++;
890 } else {
891 /* If here, we are freeing vmemmap pages. */
892 memset((void *)addr, PAGE_INUSE, next - addr);
893
894 page_addr = page_address(pmd_page(*pmd));
895 if (!memchr_inv(page_addr, PAGE_INUSE,
896 PMD_SIZE)) {
897 free_pagetable(pmd_page(*pmd),
898 get_order(PMD_SIZE));
899
900 spin_lock(&init_mm.page_table_lock);
901 pmd_clear(pmd);
902 spin_unlock(&init_mm.page_table_lock);
903 }
904 }
905
906 continue;
907 }
908
909 pte_base = (pte_t *)pmd_page_vaddr(*pmd);
910 remove_pte_table(pte_base, addr, next, direct);
911 free_pte_table(pte_base, pmd);
912 }
913
914 /* Call free_pmd_table() in remove_pud_table(). */
915 if (direct)
916 update_page_count(PG_LEVEL_2M, -pages);
917 }
918
919 static void __meminit
920 remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
921 bool direct)
922 {
923 unsigned long next, pages = 0;
924 pmd_t *pmd_base;
925 pud_t *pud;
926 void *page_addr;
927
928 pud = pud_start + pud_index(addr);
929 for (; addr < end; addr = next, pud++) {
930 next = pud_addr_end(addr, end);
931
932 if (!pud_present(*pud))
933 continue;
934
935 if (pud_large(*pud)) {
936 if (IS_ALIGNED(addr, PUD_SIZE) &&
937 IS_ALIGNED(next, PUD_SIZE)) {
938 if (!direct)
939 free_pagetable(pud_page(*pud),
940 get_order(PUD_SIZE));
941
942 spin_lock(&init_mm.page_table_lock);
943 pud_clear(pud);
944 spin_unlock(&init_mm.page_table_lock);
945 pages++;
946 } else {
947 /* If here, we are freeing vmemmap pages. */
948 memset((void *)addr, PAGE_INUSE, next - addr);
949
950 page_addr = page_address(pud_page(*pud));
951 if (!memchr_inv(page_addr, PAGE_INUSE,
952 PUD_SIZE)) {
953 free_pagetable(pud_page(*pud),
954 get_order(PUD_SIZE));
955
956 spin_lock(&init_mm.page_table_lock);
957 pud_clear(pud);
958 spin_unlock(&init_mm.page_table_lock);
959 }
960 }
961
962 continue;
963 }
964
965 pmd_base = pmd_offset(pud, 0);
966 remove_pmd_table(pmd_base, addr, next, direct);
967 free_pmd_table(pmd_base, pud);
968 }
969
970 if (direct)
971 update_page_count(PG_LEVEL_1G, -pages);
972 }
973
974 static void __meminit
975 remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end,
976 bool direct)
977 {
978 unsigned long next, pages = 0;
979 pud_t *pud_base;
980 p4d_t *p4d;
981
982 p4d = p4d_start + p4d_index(addr);
983 for (; addr < end; addr = next, p4d++) {
984 next = p4d_addr_end(addr, end);
985
986 if (!p4d_present(*p4d))
987 continue;
988
989 BUILD_BUG_ON(p4d_large(*p4d));
990
991 pud_base = pud_offset(p4d, 0);
992 remove_pud_table(pud_base, addr, next, direct);
993 /*
994 * For 4-level page tables we do not want to free PUDs, but in the
995 * 5-level case we should free them. This code will have to change
996 * to adapt for boot-time switching between 4 and 5 level page tables.
997 */
998 if (CONFIG_PGTABLE_LEVELS == 5)
999 free_pud_table(pud_base, p4d);
1000 }
1001
1002 if (direct)
1003 update_page_count(PG_LEVEL_512G, -pages);
1004 }
1005
1006 /* start and end are both virtual address. */
1007 static void __meminit
1008 remove_pagetable(unsigned long start, unsigned long end, bool direct)
1009 {
1010 unsigned long next;
1011 unsigned long addr;
1012 pgd_t *pgd;
1013 p4d_t *p4d;
1014
1015 for (addr = start; addr < end; addr = next) {
1016 next = pgd_addr_end(addr, end);
1017
1018 pgd = pgd_offset_k(addr);
1019 if (!pgd_present(*pgd))
1020 continue;
1021
1022 p4d = p4d_offset(pgd, 0);
1023 remove_p4d_table(p4d, addr, next, direct);
1024 }
1025
1026 flush_tlb_all();
1027 }
1028
1029 void __ref vmemmap_free(unsigned long start, unsigned long end)
1030 {
1031 remove_pagetable(start, end, false);
1032 }
1033
1034 #ifdef CONFIG_MEMORY_HOTREMOVE
1035 static void __meminit
1036 kernel_physical_mapping_remove(unsigned long start, unsigned long end)
1037 {
1038 start = (unsigned long)__va(start);
1039 end = (unsigned long)__va(end);
1040
1041 remove_pagetable(start, end, true);
1042 }
1043
1044 int __ref arch_remove_memory(u64 start, u64 size)
1045 {
1046 unsigned long start_pfn = start >> PAGE_SHIFT;
1047 unsigned long nr_pages = size >> PAGE_SHIFT;
1048 struct page *page = pfn_to_page(start_pfn);
1049 struct vmem_altmap *altmap;
1050 struct zone *zone;
1051 int ret;
1052
1053 /* With altmap the first mapped page is offset from @start */
1054 altmap = to_vmem_altmap((unsigned long) page);
1055 if (altmap)
1056 page += vmem_altmap_offset(altmap);
1057 zone = page_zone(page);
1058 ret = __remove_pages(zone, start_pfn, nr_pages);
1059 WARN_ON_ONCE(ret);
1060 kernel_physical_mapping_remove(start, start + size);
1061
1062 return ret;
1063 }
1064 #endif
1065 #endif /* CONFIG_MEMORY_HOTPLUG */
1066
1067 static struct kcore_list kcore_vsyscall;
1068
1069 static void __init register_page_bootmem_info(void)
1070 {
1071 #ifdef CONFIG_NUMA
1072 int i;
1073
1074 for_each_online_node(i)
1075 register_page_bootmem_info_node(NODE_DATA(i));
1076 #endif
1077 }
1078
1079 void __init mem_init(void)
1080 {
1081 pci_iommu_alloc();
1082
1083 /* clear_bss() already clear the empty_zero_page */
1084
1085 register_page_bootmem_info();
1086
1087 /* this will put all memory onto the freelists */
1088 free_all_bootmem();
1089 after_bootmem = 1;
1090
1091 /* Register memory areas for /proc/kcore */
1092 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR,
1093 PAGE_SIZE, KCORE_OTHER);
1094
1095 mem_init_print_info(NULL);
1096 }
1097
1098 int kernel_set_to_readonly;
1099
1100 void set_kernel_text_rw(void)
1101 {
1102 unsigned long start = PFN_ALIGN(_text);
1103 unsigned long end = PFN_ALIGN(__stop___ex_table);
1104
1105 if (!kernel_set_to_readonly)
1106 return;
1107
1108 pr_debug("Set kernel text: %lx - %lx for read write\n",
1109 start, end);
1110
1111 /*
1112 * Make the kernel identity mapping for text RW. Kernel text
1113 * mapping will always be RO. Refer to the comment in
1114 * static_protections() in pageattr.c
1115 */
1116 set_memory_rw(start, (end - start) >> PAGE_SHIFT);
1117 }
1118
1119 void set_kernel_text_ro(void)
1120 {
1121 unsigned long start = PFN_ALIGN(_text);
1122 unsigned long end = PFN_ALIGN(__stop___ex_table);
1123
1124 if (!kernel_set_to_readonly)
1125 return;
1126
1127 pr_debug("Set kernel text: %lx - %lx for read only\n",
1128 start, end);
1129
1130 /*
1131 * Set the kernel identity mapping for text RO.
1132 */
1133 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
1134 }
1135
1136 void mark_rodata_ro(void)
1137 {
1138 unsigned long start = PFN_ALIGN(_text);
1139 unsigned long rodata_start = PFN_ALIGN(__start_rodata);
1140 unsigned long end = (unsigned long) &__end_rodata_hpage_align;
1141 unsigned long text_end = PFN_ALIGN(&__stop___ex_table);
1142 unsigned long rodata_end = PFN_ALIGN(&__end_rodata);
1143 unsigned long all_end;
1144
1145 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
1146 (end - start) >> 10);
1147 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
1148
1149 kernel_set_to_readonly = 1;
1150
1151 /*
1152 * The rodata/data/bss/brk section (but not the kernel text!)
1153 * should also be not-executable.
1154 *
1155 * We align all_end to PMD_SIZE because the existing mapping
1156 * is a full PMD. If we would align _brk_end to PAGE_SIZE we
1157 * split the PMD and the reminder between _brk_end and the end
1158 * of the PMD will remain mapped executable.
1159 *
1160 * Any PMD which was setup after the one which covers _brk_end
1161 * has been zapped already via cleanup_highmem().
1162 */
1163 all_end = roundup((unsigned long)_brk_end, PMD_SIZE);
1164 set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT);
1165
1166 #ifdef CONFIG_CPA_DEBUG
1167 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
1168 set_memory_rw(start, (end-start) >> PAGE_SHIFT);
1169
1170 printk(KERN_INFO "Testing CPA: again\n");
1171 set_memory_ro(start, (end-start) >> PAGE_SHIFT);
1172 #endif
1173
1174 free_init_pages("unused kernel",
1175 (unsigned long) __va(__pa_symbol(text_end)),
1176 (unsigned long) __va(__pa_symbol(rodata_start)));
1177 free_init_pages("unused kernel",
1178 (unsigned long) __va(__pa_symbol(rodata_end)),
1179 (unsigned long) __va(__pa_symbol(_sdata)));
1180
1181 debug_checkwx();
1182 }
1183
1184 int kern_addr_valid(unsigned long addr)
1185 {
1186 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
1187 pgd_t *pgd;
1188 p4d_t *p4d;
1189 pud_t *pud;
1190 pmd_t *pmd;
1191 pte_t *pte;
1192
1193 if (above != 0 && above != -1UL)
1194 return 0;
1195
1196 pgd = pgd_offset_k(addr);
1197 if (pgd_none(*pgd))
1198 return 0;
1199
1200 p4d = p4d_offset(pgd, addr);
1201 if (p4d_none(*p4d))
1202 return 0;
1203
1204 pud = pud_offset(p4d, addr);
1205 if (pud_none(*pud))
1206 return 0;
1207
1208 if (pud_large(*pud))
1209 return pfn_valid(pud_pfn(*pud));
1210
1211 pmd = pmd_offset(pud, addr);
1212 if (pmd_none(*pmd))
1213 return 0;
1214
1215 if (pmd_large(*pmd))
1216 return pfn_valid(pmd_pfn(*pmd));
1217
1218 pte = pte_offset_kernel(pmd, addr);
1219 if (pte_none(*pte))
1220 return 0;
1221
1222 return pfn_valid(pte_pfn(*pte));
1223 }
1224
1225 static unsigned long probe_memory_block_size(void)
1226 {
1227 unsigned long bz = MIN_MEMORY_BLOCK_SIZE;
1228
1229 /* if system is UV or has 64GB of RAM or more, use large blocks */
1230 if (is_uv_system() || ((max_pfn << PAGE_SHIFT) >= (64UL << 30)))
1231 bz = 2UL << 30; /* 2GB */
1232
1233 pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20);
1234
1235 return bz;
1236 }
1237
1238 static unsigned long memory_block_size_probed;
1239 unsigned long memory_block_size_bytes(void)
1240 {
1241 if (!memory_block_size_probed)
1242 memory_block_size_probed = probe_memory_block_size();
1243
1244 return memory_block_size_probed;
1245 }
1246
1247 #ifdef CONFIG_SPARSEMEM_VMEMMAP
1248 /*
1249 * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
1250 */
1251 static long __meminitdata addr_start, addr_end;
1252 static void __meminitdata *p_start, *p_end;
1253 static int __meminitdata node_start;
1254
1255 static int __meminit vmemmap_populate_hugepages(unsigned long start,
1256 unsigned long end, int node, struct vmem_altmap *altmap)
1257 {
1258 unsigned long addr;
1259 unsigned long next;
1260 pgd_t *pgd;
1261 p4d_t *p4d;
1262 pud_t *pud;
1263 pmd_t *pmd;
1264
1265 for (addr = start; addr < end; addr = next) {
1266 next = pmd_addr_end(addr, end);
1267
1268 pgd = vmemmap_pgd_populate(addr, node);
1269 if (!pgd)
1270 return -ENOMEM;
1271
1272 p4d = vmemmap_p4d_populate(pgd, addr, node);
1273 if (!p4d)
1274 return -ENOMEM;
1275
1276 pud = vmemmap_pud_populate(p4d, addr, node);
1277 if (!pud)
1278 return -ENOMEM;
1279
1280 pmd = pmd_offset(pud, addr);
1281 if (pmd_none(*pmd)) {
1282 void *p;
1283
1284 p = __vmemmap_alloc_block_buf(PMD_SIZE, node, altmap);
1285 if (p) {
1286 pte_t entry;
1287
1288 entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
1289 PAGE_KERNEL_LARGE);
1290 set_pmd(pmd, __pmd(pte_val(entry)));
1291
1292 /* check to see if we have contiguous blocks */
1293 if (p_end != p || node_start != node) {
1294 if (p_start)
1295 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
1296 addr_start, addr_end-1, p_start, p_end-1, node_start);
1297 addr_start = addr;
1298 node_start = node;
1299 p_start = p;
1300 }
1301
1302 addr_end = addr + PMD_SIZE;
1303 p_end = p + PMD_SIZE;
1304 continue;
1305 } else if (altmap)
1306 return -ENOMEM; /* no fallback */
1307 } else if (pmd_large(*pmd)) {
1308 vmemmap_verify((pte_t *)pmd, node, addr, next);
1309 continue;
1310 }
1311 pr_warn_once("vmemmap: falling back to regular page backing\n");
1312 if (vmemmap_populate_basepages(addr, next, node))
1313 return -ENOMEM;
1314 }
1315 return 0;
1316 }
1317
1318 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
1319 {
1320 struct vmem_altmap *altmap = to_vmem_altmap(start);
1321 int err;
1322
1323 if (boot_cpu_has(X86_FEATURE_PSE))
1324 err = vmemmap_populate_hugepages(start, end, node, altmap);
1325 else if (altmap) {
1326 pr_err_once("%s: no cpu support for altmap allocations\n",
1327 __func__);
1328 err = -ENOMEM;
1329 } else
1330 err = vmemmap_populate_basepages(start, end, node);
1331 if (!err)
1332 sync_global_pgds(start, end - 1);
1333 return err;
1334 }
1335
1336 #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE)
1337 void register_page_bootmem_memmap(unsigned long section_nr,
1338 struct page *start_page, unsigned long size)
1339 {
1340 unsigned long addr = (unsigned long)start_page;
1341 unsigned long end = (unsigned long)(start_page + size);
1342 unsigned long next;
1343 pgd_t *pgd;
1344 p4d_t *p4d;
1345 pud_t *pud;
1346 pmd_t *pmd;
1347 unsigned int nr_pages;
1348 struct page *page;
1349
1350 for (; addr < end; addr = next) {
1351 pte_t *pte = NULL;
1352
1353 pgd = pgd_offset_k(addr);
1354 if (pgd_none(*pgd)) {
1355 next = (addr + PAGE_SIZE) & PAGE_MASK;
1356 continue;
1357 }
1358 get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO);
1359
1360 p4d = p4d_offset(pgd, addr);
1361 if (p4d_none(*p4d)) {
1362 next = (addr + PAGE_SIZE) & PAGE_MASK;
1363 continue;
1364 }
1365 get_page_bootmem(section_nr, p4d_page(*p4d), MIX_SECTION_INFO);
1366
1367 pud = pud_offset(p4d, addr);
1368 if (pud_none(*pud)) {
1369 next = (addr + PAGE_SIZE) & PAGE_MASK;
1370 continue;
1371 }
1372 get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO);
1373
1374 if (!boot_cpu_has(X86_FEATURE_PSE)) {
1375 next = (addr + PAGE_SIZE) & PAGE_MASK;
1376 pmd = pmd_offset(pud, addr);
1377 if (pmd_none(*pmd))
1378 continue;
1379 get_page_bootmem(section_nr, pmd_page(*pmd),
1380 MIX_SECTION_INFO);
1381
1382 pte = pte_offset_kernel(pmd, addr);
1383 if (pte_none(*pte))
1384 continue;
1385 get_page_bootmem(section_nr, pte_page(*pte),
1386 SECTION_INFO);
1387 } else {
1388 next = pmd_addr_end(addr, end);
1389
1390 pmd = pmd_offset(pud, addr);
1391 if (pmd_none(*pmd))
1392 continue;
1393
1394 nr_pages = 1 << (get_order(PMD_SIZE));
1395 page = pmd_page(*pmd);
1396 while (nr_pages--)
1397 get_page_bootmem(section_nr, page++,
1398 SECTION_INFO);
1399 }
1400 }
1401 }
1402 #endif
1403
1404 void __meminit vmemmap_populate_print_last(void)
1405 {
1406 if (p_start) {
1407 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
1408 addr_start, addr_end-1, p_start, p_end-1, node_start);
1409 p_start = NULL;
1410 p_end = NULL;
1411 node_start = 0;
1412 }
1413 }
1414 #endif