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Merge branch 'akpm' (patches from Andrew)
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1 /*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
4 */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
8 #include <linux/mm.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
17
18 #include <asm/e820.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
26 #include <asm/pat.h>
27
28 /*
29 * The current flushing context - we pass it instead of 5 arguments:
30 */
31 struct cpa_data {
32 unsigned long *vaddr;
33 pgd_t *pgd;
34 pgprot_t mask_set;
35 pgprot_t mask_clr;
36 unsigned long numpages;
37 int flags;
38 unsigned long pfn;
39 unsigned force_split : 1;
40 int curpage;
41 struct page **pages;
42 };
43
44 /*
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
49 */
50 static DEFINE_SPINLOCK(cpa_lock);
51
52 #define CPA_FLUSHTLB 1
53 #define CPA_ARRAY 2
54 #define CPA_PAGES_ARRAY 4
55
56 #ifdef CONFIG_PROC_FS
57 static unsigned long direct_pages_count[PG_LEVEL_NUM];
58
59 void update_page_count(int level, unsigned long pages)
60 {
61 /* Protect against CPA */
62 spin_lock(&pgd_lock);
63 direct_pages_count[level] += pages;
64 spin_unlock(&pgd_lock);
65 }
66
67 static void split_page_count(int level)
68 {
69 if (direct_pages_count[level] == 0)
70 return;
71
72 direct_pages_count[level]--;
73 direct_pages_count[level - 1] += PTRS_PER_PTE;
74 }
75
76 void arch_report_meminfo(struct seq_file *m)
77 {
78 seq_printf(m, "DirectMap4k: %8lu kB\n",
79 direct_pages_count[PG_LEVEL_4K] << 2);
80 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
81 seq_printf(m, "DirectMap2M: %8lu kB\n",
82 direct_pages_count[PG_LEVEL_2M] << 11);
83 #else
84 seq_printf(m, "DirectMap4M: %8lu kB\n",
85 direct_pages_count[PG_LEVEL_2M] << 12);
86 #endif
87 if (direct_gbpages)
88 seq_printf(m, "DirectMap1G: %8lu kB\n",
89 direct_pages_count[PG_LEVEL_1G] << 20);
90 }
91 #else
92 static inline void split_page_count(int level) { }
93 #endif
94
95 #ifdef CONFIG_X86_64
96
97 static inline unsigned long highmap_start_pfn(void)
98 {
99 return __pa_symbol(_text) >> PAGE_SHIFT;
100 }
101
102 static inline unsigned long highmap_end_pfn(void)
103 {
104 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
105 }
106
107 #endif
108
109 static inline int
110 within(unsigned long addr, unsigned long start, unsigned long end)
111 {
112 return addr >= start && addr < end;
113 }
114
115 /*
116 * Flushing functions
117 */
118
119 /**
120 * clflush_cache_range - flush a cache range with clflush
121 * @vaddr: virtual start address
122 * @size: number of bytes to flush
123 *
124 * clflushopt is an unordered instruction which needs fencing with mfence or
125 * sfence to avoid ordering issues.
126 */
127 void clflush_cache_range(void *vaddr, unsigned int size)
128 {
129 const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
130 void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
131 void *vend = vaddr + size;
132
133 if (p >= vend)
134 return;
135
136 mb();
137
138 for (; p < vend; p += clflush_size)
139 clflushopt(p);
140
141 mb();
142 }
143 EXPORT_SYMBOL_GPL(clflush_cache_range);
144
145 static void __cpa_flush_all(void *arg)
146 {
147 unsigned long cache = (unsigned long)arg;
148
149 /*
150 * Flush all to work around Errata in early athlons regarding
151 * large page flushing.
152 */
153 __flush_tlb_all();
154
155 if (cache && boot_cpu_data.x86 >= 4)
156 wbinvd();
157 }
158
159 static void cpa_flush_all(unsigned long cache)
160 {
161 BUG_ON(irqs_disabled());
162
163 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
164 }
165
166 static void __cpa_flush_range(void *arg)
167 {
168 /*
169 * We could optimize that further and do individual per page
170 * tlb invalidates for a low number of pages. Caveat: we must
171 * flush the high aliases on 64bit as well.
172 */
173 __flush_tlb_all();
174 }
175
176 static void cpa_flush_range(unsigned long start, int numpages, int cache)
177 {
178 unsigned int i, level;
179 unsigned long addr;
180
181 BUG_ON(irqs_disabled());
182 WARN_ON(PAGE_ALIGN(start) != start);
183
184 on_each_cpu(__cpa_flush_range, NULL, 1);
185
186 if (!cache)
187 return;
188
189 /*
190 * We only need to flush on one CPU,
191 * clflush is a MESI-coherent instruction that
192 * will cause all other CPUs to flush the same
193 * cachelines:
194 */
195 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
196 pte_t *pte = lookup_address(addr, &level);
197
198 /*
199 * Only flush present addresses:
200 */
201 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
202 clflush_cache_range((void *) addr, PAGE_SIZE);
203 }
204 }
205
206 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
207 int in_flags, struct page **pages)
208 {
209 unsigned int i, level;
210 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
211
212 BUG_ON(irqs_disabled());
213
214 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
215
216 if (!cache || do_wbinvd)
217 return;
218
219 /*
220 * We only need to flush on one CPU,
221 * clflush is a MESI-coherent instruction that
222 * will cause all other CPUs to flush the same
223 * cachelines:
224 */
225 for (i = 0; i < numpages; i++) {
226 unsigned long addr;
227 pte_t *pte;
228
229 if (in_flags & CPA_PAGES_ARRAY)
230 addr = (unsigned long)page_address(pages[i]);
231 else
232 addr = start[i];
233
234 pte = lookup_address(addr, &level);
235
236 /*
237 * Only flush present addresses:
238 */
239 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
240 clflush_cache_range((void *)addr, PAGE_SIZE);
241 }
242 }
243
244 /*
245 * Certain areas of memory on x86 require very specific protection flags,
246 * for example the BIOS area or kernel text. Callers don't always get this
247 * right (again, ioremap() on BIOS memory is not uncommon) so this function
248 * checks and fixes these known static required protection bits.
249 */
250 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
251 unsigned long pfn)
252 {
253 pgprot_t forbidden = __pgprot(0);
254
255 /*
256 * The BIOS area between 640k and 1Mb needs to be executable for
257 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
258 */
259 #ifdef CONFIG_PCI_BIOS
260 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
261 pgprot_val(forbidden) |= _PAGE_NX;
262 #endif
263
264 /*
265 * The kernel text needs to be executable for obvious reasons
266 * Does not cover __inittext since that is gone later on. On
267 * 64bit we do not enforce !NX on the low mapping
268 */
269 if (within(address, (unsigned long)_text, (unsigned long)_etext))
270 pgprot_val(forbidden) |= _PAGE_NX;
271
272 /*
273 * The .rodata section needs to be read-only. Using the pfn
274 * catches all aliases.
275 */
276 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
277 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
278 pgprot_val(forbidden) |= _PAGE_RW;
279
280 #if defined(CONFIG_X86_64)
281 /*
282 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
283 * kernel text mappings for the large page aligned text, rodata sections
284 * will be always read-only. For the kernel identity mappings covering
285 * the holes caused by this alignment can be anything that user asks.
286 *
287 * This will preserve the large page mappings for kernel text/data
288 * at no extra cost.
289 */
290 if (kernel_set_to_readonly &&
291 within(address, (unsigned long)_text,
292 (unsigned long)__end_rodata_hpage_align)) {
293 unsigned int level;
294
295 /*
296 * Don't enforce the !RW mapping for the kernel text mapping,
297 * if the current mapping is already using small page mapping.
298 * No need to work hard to preserve large page mappings in this
299 * case.
300 *
301 * This also fixes the Linux Xen paravirt guest boot failure
302 * (because of unexpected read-only mappings for kernel identity
303 * mappings). In this paravirt guest case, the kernel text
304 * mapping and the kernel identity mapping share the same
305 * page-table pages. Thus we can't really use different
306 * protections for the kernel text and identity mappings. Also,
307 * these shared mappings are made of small page mappings.
308 * Thus this don't enforce !RW mapping for small page kernel
309 * text mapping logic will help Linux Xen parvirt guest boot
310 * as well.
311 */
312 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
313 pgprot_val(forbidden) |= _PAGE_RW;
314 }
315 #endif
316
317 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
318
319 return prot;
320 }
321
322 /*
323 * Lookup the page table entry for a virtual address in a specific pgd.
324 * Return a pointer to the entry and the level of the mapping.
325 */
326 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
327 unsigned int *level)
328 {
329 pud_t *pud;
330 pmd_t *pmd;
331
332 *level = PG_LEVEL_NONE;
333
334 if (pgd_none(*pgd))
335 return NULL;
336
337 pud = pud_offset(pgd, address);
338 if (pud_none(*pud))
339 return NULL;
340
341 *level = PG_LEVEL_1G;
342 if (pud_large(*pud) || !pud_present(*pud))
343 return (pte_t *)pud;
344
345 pmd = pmd_offset(pud, address);
346 if (pmd_none(*pmd))
347 return NULL;
348
349 *level = PG_LEVEL_2M;
350 if (pmd_large(*pmd) || !pmd_present(*pmd))
351 return (pte_t *)pmd;
352
353 *level = PG_LEVEL_4K;
354
355 return pte_offset_kernel(pmd, address);
356 }
357
358 /*
359 * Lookup the page table entry for a virtual address. Return a pointer
360 * to the entry and the level of the mapping.
361 *
362 * Note: We return pud and pmd either when the entry is marked large
363 * or when the present bit is not set. Otherwise we would return a
364 * pointer to a nonexisting mapping.
365 */
366 pte_t *lookup_address(unsigned long address, unsigned int *level)
367 {
368 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
369 }
370 EXPORT_SYMBOL_GPL(lookup_address);
371
372 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
373 unsigned int *level)
374 {
375 if (cpa->pgd)
376 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
377 address, level);
378
379 return lookup_address(address, level);
380 }
381
382 /*
383 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
384 * or NULL if not present.
385 */
386 pmd_t *lookup_pmd_address(unsigned long address)
387 {
388 pgd_t *pgd;
389 pud_t *pud;
390
391 pgd = pgd_offset_k(address);
392 if (pgd_none(*pgd))
393 return NULL;
394
395 pud = pud_offset(pgd, address);
396 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
397 return NULL;
398
399 return pmd_offset(pud, address);
400 }
401
402 /*
403 * This is necessary because __pa() does not work on some
404 * kinds of memory, like vmalloc() or the alloc_remap()
405 * areas on 32-bit NUMA systems. The percpu areas can
406 * end up in this kind of memory, for instance.
407 *
408 * This could be optimized, but it is only intended to be
409 * used at inititalization time, and keeping it
410 * unoptimized should increase the testing coverage for
411 * the more obscure platforms.
412 */
413 phys_addr_t slow_virt_to_phys(void *__virt_addr)
414 {
415 unsigned long virt_addr = (unsigned long)__virt_addr;
416 phys_addr_t phys_addr;
417 unsigned long offset;
418 enum pg_level level;
419 pte_t *pte;
420
421 pte = lookup_address(virt_addr, &level);
422 BUG_ON(!pte);
423
424 /*
425 * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
426 * before being left-shifted PAGE_SHIFT bits -- this trick is to
427 * make 32-PAE kernel work correctly.
428 */
429 switch (level) {
430 case PG_LEVEL_1G:
431 phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
432 offset = virt_addr & ~PUD_PAGE_MASK;
433 break;
434 case PG_LEVEL_2M:
435 phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
436 offset = virt_addr & ~PMD_PAGE_MASK;
437 break;
438 default:
439 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
440 offset = virt_addr & ~PAGE_MASK;
441 }
442
443 return (phys_addr_t)(phys_addr | offset);
444 }
445 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
446
447 /*
448 * Set the new pmd in all the pgds we know about:
449 */
450 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
451 {
452 /* change init_mm */
453 set_pte_atomic(kpte, pte);
454 #ifdef CONFIG_X86_32
455 if (!SHARED_KERNEL_PMD) {
456 struct page *page;
457
458 list_for_each_entry(page, &pgd_list, lru) {
459 pgd_t *pgd;
460 pud_t *pud;
461 pmd_t *pmd;
462
463 pgd = (pgd_t *)page_address(page) + pgd_index(address);
464 pud = pud_offset(pgd, address);
465 pmd = pmd_offset(pud, address);
466 set_pte_atomic((pte_t *)pmd, pte);
467 }
468 }
469 #endif
470 }
471
472 static int
473 try_preserve_large_page(pte_t *kpte, unsigned long address,
474 struct cpa_data *cpa)
475 {
476 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
477 pte_t new_pte, old_pte, *tmp;
478 pgprot_t old_prot, new_prot, req_prot;
479 int i, do_split = 1;
480 enum pg_level level;
481
482 if (cpa->force_split)
483 return 1;
484
485 spin_lock(&pgd_lock);
486 /*
487 * Check for races, another CPU might have split this page
488 * up already:
489 */
490 tmp = _lookup_address_cpa(cpa, address, &level);
491 if (tmp != kpte)
492 goto out_unlock;
493
494 switch (level) {
495 case PG_LEVEL_2M:
496 old_prot = pmd_pgprot(*(pmd_t *)kpte);
497 old_pfn = pmd_pfn(*(pmd_t *)kpte);
498 break;
499 case PG_LEVEL_1G:
500 old_prot = pud_pgprot(*(pud_t *)kpte);
501 old_pfn = pud_pfn(*(pud_t *)kpte);
502 break;
503 default:
504 do_split = -EINVAL;
505 goto out_unlock;
506 }
507
508 psize = page_level_size(level);
509 pmask = page_level_mask(level);
510
511 /*
512 * Calculate the number of pages, which fit into this large
513 * page starting at address:
514 */
515 nextpage_addr = (address + psize) & pmask;
516 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
517 if (numpages < cpa->numpages)
518 cpa->numpages = numpages;
519
520 /*
521 * We are safe now. Check whether the new pgprot is the same:
522 * Convert protection attributes to 4k-format, as cpa->mask* are set
523 * up accordingly.
524 */
525 old_pte = *kpte;
526 req_prot = pgprot_large_2_4k(old_prot);
527
528 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
529 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
530
531 /*
532 * req_prot is in format of 4k pages. It must be converted to large
533 * page format: the caching mode includes the PAT bit located at
534 * different bit positions in the two formats.
535 */
536 req_prot = pgprot_4k_2_large(req_prot);
537
538 /*
539 * Set the PSE and GLOBAL flags only if the PRESENT flag is
540 * set otherwise pmd_present/pmd_huge will return true even on
541 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
542 * for the ancient hardware that doesn't support it.
543 */
544 if (pgprot_val(req_prot) & _PAGE_PRESENT)
545 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
546 else
547 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
548
549 req_prot = canon_pgprot(req_prot);
550
551 /*
552 * old_pfn points to the large page base pfn. So we need
553 * to add the offset of the virtual address:
554 */
555 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
556 cpa->pfn = pfn;
557
558 new_prot = static_protections(req_prot, address, pfn);
559
560 /*
561 * We need to check the full range, whether
562 * static_protection() requires a different pgprot for one of
563 * the pages in the range we try to preserve:
564 */
565 addr = address & pmask;
566 pfn = old_pfn;
567 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
568 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
569
570 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
571 goto out_unlock;
572 }
573
574 /*
575 * If there are no changes, return. maxpages has been updated
576 * above:
577 */
578 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
579 do_split = 0;
580 goto out_unlock;
581 }
582
583 /*
584 * We need to change the attributes. Check, whether we can
585 * change the large page in one go. We request a split, when
586 * the address is not aligned and the number of pages is
587 * smaller than the number of pages in the large page. Note
588 * that we limited the number of possible pages already to
589 * the number of pages in the large page.
590 */
591 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
592 /*
593 * The address is aligned and the number of pages
594 * covers the full page.
595 */
596 new_pte = pfn_pte(old_pfn, new_prot);
597 __set_pmd_pte(kpte, address, new_pte);
598 cpa->flags |= CPA_FLUSHTLB;
599 do_split = 0;
600 }
601
602 out_unlock:
603 spin_unlock(&pgd_lock);
604
605 return do_split;
606 }
607
608 static int
609 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
610 struct page *base)
611 {
612 pte_t *pbase = (pte_t *)page_address(base);
613 unsigned long ref_pfn, pfn, pfninc = 1;
614 unsigned int i, level;
615 pte_t *tmp;
616 pgprot_t ref_prot;
617
618 spin_lock(&pgd_lock);
619 /*
620 * Check for races, another CPU might have split this page
621 * up for us already:
622 */
623 tmp = _lookup_address_cpa(cpa, address, &level);
624 if (tmp != kpte) {
625 spin_unlock(&pgd_lock);
626 return 1;
627 }
628
629 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
630
631 switch (level) {
632 case PG_LEVEL_2M:
633 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
634 /* clear PSE and promote PAT bit to correct position */
635 ref_prot = pgprot_large_2_4k(ref_prot);
636 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
637 break;
638
639 case PG_LEVEL_1G:
640 ref_prot = pud_pgprot(*(pud_t *)kpte);
641 ref_pfn = pud_pfn(*(pud_t *)kpte);
642 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
643
644 /*
645 * Clear the PSE flags if the PRESENT flag is not set
646 * otherwise pmd_present/pmd_huge will return true
647 * even on a non present pmd.
648 */
649 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
650 pgprot_val(ref_prot) &= ~_PAGE_PSE;
651 break;
652
653 default:
654 spin_unlock(&pgd_lock);
655 return 1;
656 }
657
658 /*
659 * Set the GLOBAL flags only if the PRESENT flag is set
660 * otherwise pmd/pte_present will return true even on a non
661 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
662 * for the ancient hardware that doesn't support it.
663 */
664 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
665 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
666 else
667 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
668
669 /*
670 * Get the target pfn from the original entry:
671 */
672 pfn = ref_pfn;
673 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
674 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
675
676 if (virt_addr_valid(address)) {
677 unsigned long pfn = PFN_DOWN(__pa(address));
678
679 if (pfn_range_is_mapped(pfn, pfn + 1))
680 split_page_count(level);
681 }
682
683 /*
684 * Install the new, split up pagetable.
685 *
686 * We use the standard kernel pagetable protections for the new
687 * pagetable protections, the actual ptes set above control the
688 * primary protection behavior:
689 */
690 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
691
692 /*
693 * Intel Atom errata AAH41 workaround.
694 *
695 * The real fix should be in hw or in a microcode update, but
696 * we also probabilistically try to reduce the window of having
697 * a large TLB mixed with 4K TLBs while instruction fetches are
698 * going on.
699 */
700 __flush_tlb_all();
701 spin_unlock(&pgd_lock);
702
703 return 0;
704 }
705
706 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
707 unsigned long address)
708 {
709 struct page *base;
710
711 if (!debug_pagealloc_enabled())
712 spin_unlock(&cpa_lock);
713 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
714 if (!debug_pagealloc_enabled())
715 spin_lock(&cpa_lock);
716 if (!base)
717 return -ENOMEM;
718
719 if (__split_large_page(cpa, kpte, address, base))
720 __free_page(base);
721
722 return 0;
723 }
724
725 static bool try_to_free_pte_page(pte_t *pte)
726 {
727 int i;
728
729 for (i = 0; i < PTRS_PER_PTE; i++)
730 if (!pte_none(pte[i]))
731 return false;
732
733 free_page((unsigned long)pte);
734 return true;
735 }
736
737 static bool try_to_free_pmd_page(pmd_t *pmd)
738 {
739 int i;
740
741 for (i = 0; i < PTRS_PER_PMD; i++)
742 if (!pmd_none(pmd[i]))
743 return false;
744
745 free_page((unsigned long)pmd);
746 return true;
747 }
748
749 static bool try_to_free_pud_page(pud_t *pud)
750 {
751 int i;
752
753 for (i = 0; i < PTRS_PER_PUD; i++)
754 if (!pud_none(pud[i]))
755 return false;
756
757 free_page((unsigned long)pud);
758 return true;
759 }
760
761 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
762 {
763 pte_t *pte = pte_offset_kernel(pmd, start);
764
765 while (start < end) {
766 set_pte(pte, __pte(0));
767
768 start += PAGE_SIZE;
769 pte++;
770 }
771
772 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
773 pmd_clear(pmd);
774 return true;
775 }
776 return false;
777 }
778
779 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
780 unsigned long start, unsigned long end)
781 {
782 if (unmap_pte_range(pmd, start, end))
783 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
784 pud_clear(pud);
785 }
786
787 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
788 {
789 pmd_t *pmd = pmd_offset(pud, start);
790
791 /*
792 * Not on a 2MB page boundary?
793 */
794 if (start & (PMD_SIZE - 1)) {
795 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
796 unsigned long pre_end = min_t(unsigned long, end, next_page);
797
798 __unmap_pmd_range(pud, pmd, start, pre_end);
799
800 start = pre_end;
801 pmd++;
802 }
803
804 /*
805 * Try to unmap in 2M chunks.
806 */
807 while (end - start >= PMD_SIZE) {
808 if (pmd_large(*pmd))
809 pmd_clear(pmd);
810 else
811 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
812
813 start += PMD_SIZE;
814 pmd++;
815 }
816
817 /*
818 * 4K leftovers?
819 */
820 if (start < end)
821 return __unmap_pmd_range(pud, pmd, start, end);
822
823 /*
824 * Try again to free the PMD page if haven't succeeded above.
825 */
826 if (!pud_none(*pud))
827 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
828 pud_clear(pud);
829 }
830
831 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
832 {
833 pud_t *pud = pud_offset(pgd, start);
834
835 /*
836 * Not on a GB page boundary?
837 */
838 if (start & (PUD_SIZE - 1)) {
839 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
840 unsigned long pre_end = min_t(unsigned long, end, next_page);
841
842 unmap_pmd_range(pud, start, pre_end);
843
844 start = pre_end;
845 pud++;
846 }
847
848 /*
849 * Try to unmap in 1G chunks?
850 */
851 while (end - start >= PUD_SIZE) {
852
853 if (pud_large(*pud))
854 pud_clear(pud);
855 else
856 unmap_pmd_range(pud, start, start + PUD_SIZE);
857
858 start += PUD_SIZE;
859 pud++;
860 }
861
862 /*
863 * 2M leftovers?
864 */
865 if (start < end)
866 unmap_pmd_range(pud, start, end);
867
868 /*
869 * No need to try to free the PUD page because we'll free it in
870 * populate_pgd's error path
871 */
872 }
873
874 static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
875 {
876 pgd_t *pgd_entry = root + pgd_index(addr);
877
878 unmap_pud_range(pgd_entry, addr, end);
879
880 if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
881 pgd_clear(pgd_entry);
882 }
883
884 static int alloc_pte_page(pmd_t *pmd)
885 {
886 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
887 if (!pte)
888 return -1;
889
890 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
891 return 0;
892 }
893
894 static int alloc_pmd_page(pud_t *pud)
895 {
896 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
897 if (!pmd)
898 return -1;
899
900 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
901 return 0;
902 }
903
904 static void populate_pte(struct cpa_data *cpa,
905 unsigned long start, unsigned long end,
906 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
907 {
908 pte_t *pte;
909
910 pte = pte_offset_kernel(pmd, start);
911
912 while (num_pages-- && start < end) {
913
914 /* deal with the NX bit */
915 if (!(pgprot_val(pgprot) & _PAGE_NX))
916 cpa->pfn &= ~_PAGE_NX;
917
918 set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
919
920 start += PAGE_SIZE;
921 cpa->pfn += PAGE_SIZE;
922 pte++;
923 }
924 }
925
926 static int populate_pmd(struct cpa_data *cpa,
927 unsigned long start, unsigned long end,
928 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
929 {
930 unsigned int cur_pages = 0;
931 pmd_t *pmd;
932 pgprot_t pmd_pgprot;
933
934 /*
935 * Not on a 2M boundary?
936 */
937 if (start & (PMD_SIZE - 1)) {
938 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
939 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
940
941 pre_end = min_t(unsigned long, pre_end, next_page);
942 cur_pages = (pre_end - start) >> PAGE_SHIFT;
943 cur_pages = min_t(unsigned int, num_pages, cur_pages);
944
945 /*
946 * Need a PTE page?
947 */
948 pmd = pmd_offset(pud, start);
949 if (pmd_none(*pmd))
950 if (alloc_pte_page(pmd))
951 return -1;
952
953 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
954
955 start = pre_end;
956 }
957
958 /*
959 * We mapped them all?
960 */
961 if (num_pages == cur_pages)
962 return cur_pages;
963
964 pmd_pgprot = pgprot_4k_2_large(pgprot);
965
966 while (end - start >= PMD_SIZE) {
967
968 /*
969 * We cannot use a 1G page so allocate a PMD page if needed.
970 */
971 if (pud_none(*pud))
972 if (alloc_pmd_page(pud))
973 return -1;
974
975 pmd = pmd_offset(pud, start);
976
977 set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE |
978 massage_pgprot(pmd_pgprot)));
979
980 start += PMD_SIZE;
981 cpa->pfn += PMD_SIZE;
982 cur_pages += PMD_SIZE >> PAGE_SHIFT;
983 }
984
985 /*
986 * Map trailing 4K pages.
987 */
988 if (start < end) {
989 pmd = pmd_offset(pud, start);
990 if (pmd_none(*pmd))
991 if (alloc_pte_page(pmd))
992 return -1;
993
994 populate_pte(cpa, start, end, num_pages - cur_pages,
995 pmd, pgprot);
996 }
997 return num_pages;
998 }
999
1000 static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
1001 pgprot_t pgprot)
1002 {
1003 pud_t *pud;
1004 unsigned long end;
1005 int cur_pages = 0;
1006 pgprot_t pud_pgprot;
1007
1008 end = start + (cpa->numpages << PAGE_SHIFT);
1009
1010 /*
1011 * Not on a Gb page boundary? => map everything up to it with
1012 * smaller pages.
1013 */
1014 if (start & (PUD_SIZE - 1)) {
1015 unsigned long pre_end;
1016 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1017
1018 pre_end = min_t(unsigned long, end, next_page);
1019 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1020 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1021
1022 pud = pud_offset(pgd, start);
1023
1024 /*
1025 * Need a PMD page?
1026 */
1027 if (pud_none(*pud))
1028 if (alloc_pmd_page(pud))
1029 return -1;
1030
1031 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1032 pud, pgprot);
1033 if (cur_pages < 0)
1034 return cur_pages;
1035
1036 start = pre_end;
1037 }
1038
1039 /* We mapped them all? */
1040 if (cpa->numpages == cur_pages)
1041 return cur_pages;
1042
1043 pud = pud_offset(pgd, start);
1044 pud_pgprot = pgprot_4k_2_large(pgprot);
1045
1046 /*
1047 * Map everything starting from the Gb boundary, possibly with 1G pages
1048 */
1049 while (end - start >= PUD_SIZE) {
1050 set_pud(pud, __pud(cpa->pfn | _PAGE_PSE |
1051 massage_pgprot(pud_pgprot)));
1052
1053 start += PUD_SIZE;
1054 cpa->pfn += PUD_SIZE;
1055 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1056 pud++;
1057 }
1058
1059 /* Map trailing leftover */
1060 if (start < end) {
1061 int tmp;
1062
1063 pud = pud_offset(pgd, start);
1064 if (pud_none(*pud))
1065 if (alloc_pmd_page(pud))
1066 return -1;
1067
1068 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1069 pud, pgprot);
1070 if (tmp < 0)
1071 return cur_pages;
1072
1073 cur_pages += tmp;
1074 }
1075 return cur_pages;
1076 }
1077
1078 /*
1079 * Restrictions for kernel page table do not necessarily apply when mapping in
1080 * an alternate PGD.
1081 */
1082 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1083 {
1084 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1085 pud_t *pud = NULL; /* shut up gcc */
1086 pgd_t *pgd_entry;
1087 int ret;
1088
1089 pgd_entry = cpa->pgd + pgd_index(addr);
1090
1091 /*
1092 * Allocate a PUD page and hand it down for mapping.
1093 */
1094 if (pgd_none(*pgd_entry)) {
1095 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1096 if (!pud)
1097 return -1;
1098
1099 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1100 }
1101
1102 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1103 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1104
1105 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1106 if (ret < 0) {
1107 unmap_pgd_range(cpa->pgd, addr,
1108 addr + (cpa->numpages << PAGE_SHIFT));
1109 return ret;
1110 }
1111
1112 cpa->numpages = ret;
1113 return 0;
1114 }
1115
1116 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1117 int primary)
1118 {
1119 if (cpa->pgd)
1120 return populate_pgd(cpa, vaddr);
1121
1122 /*
1123 * Ignore all non primary paths.
1124 */
1125 if (!primary) {
1126 cpa->numpages = 1;
1127 return 0;
1128 }
1129
1130 /*
1131 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1132 * to have holes.
1133 * Also set numpages to '1' indicating that we processed cpa req for
1134 * one virtual address page and its pfn. TBD: numpages can be set based
1135 * on the initial value and the level returned by lookup_address().
1136 */
1137 if (within(vaddr, PAGE_OFFSET,
1138 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1139 cpa->numpages = 1;
1140 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1141 return 0;
1142 } else {
1143 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1144 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1145 *cpa->vaddr);
1146
1147 return -EFAULT;
1148 }
1149 }
1150
1151 static int __change_page_attr(struct cpa_data *cpa, int primary)
1152 {
1153 unsigned long address;
1154 int do_split, err;
1155 unsigned int level;
1156 pte_t *kpte, old_pte;
1157
1158 if (cpa->flags & CPA_PAGES_ARRAY) {
1159 struct page *page = cpa->pages[cpa->curpage];
1160 if (unlikely(PageHighMem(page)))
1161 return 0;
1162 address = (unsigned long)page_address(page);
1163 } else if (cpa->flags & CPA_ARRAY)
1164 address = cpa->vaddr[cpa->curpage];
1165 else
1166 address = *cpa->vaddr;
1167 repeat:
1168 kpte = _lookup_address_cpa(cpa, address, &level);
1169 if (!kpte)
1170 return __cpa_process_fault(cpa, address, primary);
1171
1172 old_pte = *kpte;
1173 if (!pte_val(old_pte))
1174 return __cpa_process_fault(cpa, address, primary);
1175
1176 if (level == PG_LEVEL_4K) {
1177 pte_t new_pte;
1178 pgprot_t new_prot = pte_pgprot(old_pte);
1179 unsigned long pfn = pte_pfn(old_pte);
1180
1181 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1182 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1183
1184 new_prot = static_protections(new_prot, address, pfn);
1185
1186 /*
1187 * Set the GLOBAL flags only if the PRESENT flag is
1188 * set otherwise pte_present will return true even on
1189 * a non present pte. The canon_pgprot will clear
1190 * _PAGE_GLOBAL for the ancient hardware that doesn't
1191 * support it.
1192 */
1193 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1194 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1195 else
1196 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1197
1198 /*
1199 * We need to keep the pfn from the existing PTE,
1200 * after all we're only going to change it's attributes
1201 * not the memory it points to
1202 */
1203 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1204 cpa->pfn = pfn;
1205 /*
1206 * Do we really change anything ?
1207 */
1208 if (pte_val(old_pte) != pte_val(new_pte)) {
1209 set_pte_atomic(kpte, new_pte);
1210 cpa->flags |= CPA_FLUSHTLB;
1211 }
1212 cpa->numpages = 1;
1213 return 0;
1214 }
1215
1216 /*
1217 * Check, whether we can keep the large page intact
1218 * and just change the pte:
1219 */
1220 do_split = try_preserve_large_page(kpte, address, cpa);
1221 /*
1222 * When the range fits into the existing large page,
1223 * return. cp->numpages and cpa->tlbflush have been updated in
1224 * try_large_page:
1225 */
1226 if (do_split <= 0)
1227 return do_split;
1228
1229 /*
1230 * We have to split the large page:
1231 */
1232 err = split_large_page(cpa, kpte, address);
1233 if (!err) {
1234 /*
1235 * Do a global flush tlb after splitting the large page
1236 * and before we do the actual change page attribute in the PTE.
1237 *
1238 * With out this, we violate the TLB application note, that says
1239 * "The TLBs may contain both ordinary and large-page
1240 * translations for a 4-KByte range of linear addresses. This
1241 * may occur if software modifies the paging structures so that
1242 * the page size used for the address range changes. If the two
1243 * translations differ with respect to page frame or attributes
1244 * (e.g., permissions), processor behavior is undefined and may
1245 * be implementation-specific."
1246 *
1247 * We do this global tlb flush inside the cpa_lock, so that we
1248 * don't allow any other cpu, with stale tlb entries change the
1249 * page attribute in parallel, that also falls into the
1250 * just split large page entry.
1251 */
1252 flush_tlb_all();
1253 goto repeat;
1254 }
1255
1256 return err;
1257 }
1258
1259 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1260
1261 static int cpa_process_alias(struct cpa_data *cpa)
1262 {
1263 struct cpa_data alias_cpa;
1264 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1265 unsigned long vaddr;
1266 int ret;
1267
1268 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1269 return 0;
1270
1271 /*
1272 * No need to redo, when the primary call touched the direct
1273 * mapping already:
1274 */
1275 if (cpa->flags & CPA_PAGES_ARRAY) {
1276 struct page *page = cpa->pages[cpa->curpage];
1277 if (unlikely(PageHighMem(page)))
1278 return 0;
1279 vaddr = (unsigned long)page_address(page);
1280 } else if (cpa->flags & CPA_ARRAY)
1281 vaddr = cpa->vaddr[cpa->curpage];
1282 else
1283 vaddr = *cpa->vaddr;
1284
1285 if (!(within(vaddr, PAGE_OFFSET,
1286 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1287
1288 alias_cpa = *cpa;
1289 alias_cpa.vaddr = &laddr;
1290 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1291
1292 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1293 if (ret)
1294 return ret;
1295 }
1296
1297 #ifdef CONFIG_X86_64
1298 /*
1299 * If the primary call didn't touch the high mapping already
1300 * and the physical address is inside the kernel map, we need
1301 * to touch the high mapped kernel as well:
1302 */
1303 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1304 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1305 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1306 __START_KERNEL_map - phys_base;
1307 alias_cpa = *cpa;
1308 alias_cpa.vaddr = &temp_cpa_vaddr;
1309 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1310
1311 /*
1312 * The high mapping range is imprecise, so ignore the
1313 * return value.
1314 */
1315 __change_page_attr_set_clr(&alias_cpa, 0);
1316 }
1317 #endif
1318
1319 return 0;
1320 }
1321
1322 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1323 {
1324 int ret, numpages = cpa->numpages;
1325
1326 while (numpages) {
1327 /*
1328 * Store the remaining nr of pages for the large page
1329 * preservation check.
1330 */
1331 cpa->numpages = numpages;
1332 /* for array changes, we can't use large page */
1333 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1334 cpa->numpages = 1;
1335
1336 if (!debug_pagealloc_enabled())
1337 spin_lock(&cpa_lock);
1338 ret = __change_page_attr(cpa, checkalias);
1339 if (!debug_pagealloc_enabled())
1340 spin_unlock(&cpa_lock);
1341 if (ret)
1342 return ret;
1343
1344 if (checkalias) {
1345 ret = cpa_process_alias(cpa);
1346 if (ret)
1347 return ret;
1348 }
1349
1350 /*
1351 * Adjust the number of pages with the result of the
1352 * CPA operation. Either a large page has been
1353 * preserved or a single page update happened.
1354 */
1355 BUG_ON(cpa->numpages > numpages || !cpa->numpages);
1356 numpages -= cpa->numpages;
1357 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1358 cpa->curpage++;
1359 else
1360 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1361
1362 }
1363 return 0;
1364 }
1365
1366 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1367 pgprot_t mask_set, pgprot_t mask_clr,
1368 int force_split, int in_flag,
1369 struct page **pages)
1370 {
1371 struct cpa_data cpa;
1372 int ret, cache, checkalias;
1373 unsigned long baddr = 0;
1374
1375 memset(&cpa, 0, sizeof(cpa));
1376
1377 /*
1378 * Check, if we are requested to change a not supported
1379 * feature:
1380 */
1381 mask_set = canon_pgprot(mask_set);
1382 mask_clr = canon_pgprot(mask_clr);
1383 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1384 return 0;
1385
1386 /* Ensure we are PAGE_SIZE aligned */
1387 if (in_flag & CPA_ARRAY) {
1388 int i;
1389 for (i = 0; i < numpages; i++) {
1390 if (addr[i] & ~PAGE_MASK) {
1391 addr[i] &= PAGE_MASK;
1392 WARN_ON_ONCE(1);
1393 }
1394 }
1395 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1396 /*
1397 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1398 * No need to cehck in that case
1399 */
1400 if (*addr & ~PAGE_MASK) {
1401 *addr &= PAGE_MASK;
1402 /*
1403 * People should not be passing in unaligned addresses:
1404 */
1405 WARN_ON_ONCE(1);
1406 }
1407 /*
1408 * Save address for cache flush. *addr is modified in the call
1409 * to __change_page_attr_set_clr() below.
1410 */
1411 baddr = *addr;
1412 }
1413
1414 /* Must avoid aliasing mappings in the highmem code */
1415 kmap_flush_unused();
1416
1417 vm_unmap_aliases();
1418
1419 cpa.vaddr = addr;
1420 cpa.pages = pages;
1421 cpa.numpages = numpages;
1422 cpa.mask_set = mask_set;
1423 cpa.mask_clr = mask_clr;
1424 cpa.flags = 0;
1425 cpa.curpage = 0;
1426 cpa.force_split = force_split;
1427
1428 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1429 cpa.flags |= in_flag;
1430
1431 /* No alias checking for _NX bit modifications */
1432 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1433
1434 ret = __change_page_attr_set_clr(&cpa, checkalias);
1435
1436 /*
1437 * Check whether we really changed something:
1438 */
1439 if (!(cpa.flags & CPA_FLUSHTLB))
1440 goto out;
1441
1442 /*
1443 * No need to flush, when we did not set any of the caching
1444 * attributes:
1445 */
1446 cache = !!pgprot2cachemode(mask_set);
1447
1448 /*
1449 * On success we use CLFLUSH, when the CPU supports it to
1450 * avoid the WBINVD. If the CPU does not support it and in the
1451 * error case we fall back to cpa_flush_all (which uses
1452 * WBINVD):
1453 */
1454 if (!ret && cpu_has_clflush) {
1455 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1456 cpa_flush_array(addr, numpages, cache,
1457 cpa.flags, pages);
1458 } else
1459 cpa_flush_range(baddr, numpages, cache);
1460 } else
1461 cpa_flush_all(cache);
1462
1463 out:
1464 return ret;
1465 }
1466
1467 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1468 pgprot_t mask, int array)
1469 {
1470 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1471 (array ? CPA_ARRAY : 0), NULL);
1472 }
1473
1474 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1475 pgprot_t mask, int array)
1476 {
1477 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1478 (array ? CPA_ARRAY : 0), NULL);
1479 }
1480
1481 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1482 pgprot_t mask)
1483 {
1484 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1485 CPA_PAGES_ARRAY, pages);
1486 }
1487
1488 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1489 pgprot_t mask)
1490 {
1491 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1492 CPA_PAGES_ARRAY, pages);
1493 }
1494
1495 int _set_memory_uc(unsigned long addr, int numpages)
1496 {
1497 /*
1498 * for now UC MINUS. see comments in ioremap_nocache()
1499 * If you really need strong UC use ioremap_uc(), but note
1500 * that you cannot override IO areas with set_memory_*() as
1501 * these helpers cannot work with IO memory.
1502 */
1503 return change_page_attr_set(&addr, numpages,
1504 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1505 0);
1506 }
1507
1508 int set_memory_uc(unsigned long addr, int numpages)
1509 {
1510 int ret;
1511
1512 /*
1513 * for now UC MINUS. see comments in ioremap_nocache()
1514 */
1515 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1516 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1517 if (ret)
1518 goto out_err;
1519
1520 ret = _set_memory_uc(addr, numpages);
1521 if (ret)
1522 goto out_free;
1523
1524 return 0;
1525
1526 out_free:
1527 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1528 out_err:
1529 return ret;
1530 }
1531 EXPORT_SYMBOL(set_memory_uc);
1532
1533 static int _set_memory_array(unsigned long *addr, int addrinarray,
1534 enum page_cache_mode new_type)
1535 {
1536 enum page_cache_mode set_type;
1537 int i, j;
1538 int ret;
1539
1540 for (i = 0; i < addrinarray; i++) {
1541 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1542 new_type, NULL);
1543 if (ret)
1544 goto out_free;
1545 }
1546
1547 /* If WC, set to UC- first and then WC */
1548 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1549 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1550
1551 ret = change_page_attr_set(addr, addrinarray,
1552 cachemode2pgprot(set_type), 1);
1553
1554 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1555 ret = change_page_attr_set_clr(addr, addrinarray,
1556 cachemode2pgprot(
1557 _PAGE_CACHE_MODE_WC),
1558 __pgprot(_PAGE_CACHE_MASK),
1559 0, CPA_ARRAY, NULL);
1560 if (ret)
1561 goto out_free;
1562
1563 return 0;
1564
1565 out_free:
1566 for (j = 0; j < i; j++)
1567 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1568
1569 return ret;
1570 }
1571
1572 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1573 {
1574 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1575 }
1576 EXPORT_SYMBOL(set_memory_array_uc);
1577
1578 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1579 {
1580 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1581 }
1582 EXPORT_SYMBOL(set_memory_array_wc);
1583
1584 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1585 {
1586 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1587 }
1588 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1589
1590 int _set_memory_wc(unsigned long addr, int numpages)
1591 {
1592 int ret;
1593 unsigned long addr_copy = addr;
1594
1595 ret = change_page_attr_set(&addr, numpages,
1596 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1597 0);
1598 if (!ret) {
1599 ret = change_page_attr_set_clr(&addr_copy, numpages,
1600 cachemode2pgprot(
1601 _PAGE_CACHE_MODE_WC),
1602 __pgprot(_PAGE_CACHE_MASK),
1603 0, 0, NULL);
1604 }
1605 return ret;
1606 }
1607
1608 int set_memory_wc(unsigned long addr, int numpages)
1609 {
1610 int ret;
1611
1612 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1613 _PAGE_CACHE_MODE_WC, NULL);
1614 if (ret)
1615 return ret;
1616
1617 ret = _set_memory_wc(addr, numpages);
1618 if (ret)
1619 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1620
1621 return ret;
1622 }
1623 EXPORT_SYMBOL(set_memory_wc);
1624
1625 int _set_memory_wt(unsigned long addr, int numpages)
1626 {
1627 return change_page_attr_set(&addr, numpages,
1628 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1629 }
1630
1631 int set_memory_wt(unsigned long addr, int numpages)
1632 {
1633 int ret;
1634
1635 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1636 _PAGE_CACHE_MODE_WT, NULL);
1637 if (ret)
1638 return ret;
1639
1640 ret = _set_memory_wt(addr, numpages);
1641 if (ret)
1642 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1643
1644 return ret;
1645 }
1646 EXPORT_SYMBOL_GPL(set_memory_wt);
1647
1648 int _set_memory_wb(unsigned long addr, int numpages)
1649 {
1650 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1651 return change_page_attr_clear(&addr, numpages,
1652 __pgprot(_PAGE_CACHE_MASK), 0);
1653 }
1654
1655 int set_memory_wb(unsigned long addr, int numpages)
1656 {
1657 int ret;
1658
1659 ret = _set_memory_wb(addr, numpages);
1660 if (ret)
1661 return ret;
1662
1663 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1664 return 0;
1665 }
1666 EXPORT_SYMBOL(set_memory_wb);
1667
1668 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1669 {
1670 int i;
1671 int ret;
1672
1673 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1674 ret = change_page_attr_clear(addr, addrinarray,
1675 __pgprot(_PAGE_CACHE_MASK), 1);
1676 if (ret)
1677 return ret;
1678
1679 for (i = 0; i < addrinarray; i++)
1680 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1681
1682 return 0;
1683 }
1684 EXPORT_SYMBOL(set_memory_array_wb);
1685
1686 int set_memory_x(unsigned long addr, int numpages)
1687 {
1688 if (!(__supported_pte_mask & _PAGE_NX))
1689 return 0;
1690
1691 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1692 }
1693 EXPORT_SYMBOL(set_memory_x);
1694
1695 int set_memory_nx(unsigned long addr, int numpages)
1696 {
1697 if (!(__supported_pte_mask & _PAGE_NX))
1698 return 0;
1699
1700 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1701 }
1702 EXPORT_SYMBOL(set_memory_nx);
1703
1704 int set_memory_ro(unsigned long addr, int numpages)
1705 {
1706 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1707 }
1708
1709 int set_memory_rw(unsigned long addr, int numpages)
1710 {
1711 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1712 }
1713
1714 int set_memory_np(unsigned long addr, int numpages)
1715 {
1716 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1717 }
1718
1719 int set_memory_4k(unsigned long addr, int numpages)
1720 {
1721 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1722 __pgprot(0), 1, 0, NULL);
1723 }
1724
1725 int set_pages_uc(struct page *page, int numpages)
1726 {
1727 unsigned long addr = (unsigned long)page_address(page);
1728
1729 return set_memory_uc(addr, numpages);
1730 }
1731 EXPORT_SYMBOL(set_pages_uc);
1732
1733 static int _set_pages_array(struct page **pages, int addrinarray,
1734 enum page_cache_mode new_type)
1735 {
1736 unsigned long start;
1737 unsigned long end;
1738 enum page_cache_mode set_type;
1739 int i;
1740 int free_idx;
1741 int ret;
1742
1743 for (i = 0; i < addrinarray; i++) {
1744 if (PageHighMem(pages[i]))
1745 continue;
1746 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1747 end = start + PAGE_SIZE;
1748 if (reserve_memtype(start, end, new_type, NULL))
1749 goto err_out;
1750 }
1751
1752 /* If WC, set to UC- first and then WC */
1753 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1754 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1755
1756 ret = cpa_set_pages_array(pages, addrinarray,
1757 cachemode2pgprot(set_type));
1758 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1759 ret = change_page_attr_set_clr(NULL, addrinarray,
1760 cachemode2pgprot(
1761 _PAGE_CACHE_MODE_WC),
1762 __pgprot(_PAGE_CACHE_MASK),
1763 0, CPA_PAGES_ARRAY, pages);
1764 if (ret)
1765 goto err_out;
1766 return 0; /* Success */
1767 err_out:
1768 free_idx = i;
1769 for (i = 0; i < free_idx; i++) {
1770 if (PageHighMem(pages[i]))
1771 continue;
1772 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1773 end = start + PAGE_SIZE;
1774 free_memtype(start, end);
1775 }
1776 return -EINVAL;
1777 }
1778
1779 int set_pages_array_uc(struct page **pages, int addrinarray)
1780 {
1781 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1782 }
1783 EXPORT_SYMBOL(set_pages_array_uc);
1784
1785 int set_pages_array_wc(struct page **pages, int addrinarray)
1786 {
1787 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1788 }
1789 EXPORT_SYMBOL(set_pages_array_wc);
1790
1791 int set_pages_array_wt(struct page **pages, int addrinarray)
1792 {
1793 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1794 }
1795 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1796
1797 int set_pages_wb(struct page *page, int numpages)
1798 {
1799 unsigned long addr = (unsigned long)page_address(page);
1800
1801 return set_memory_wb(addr, numpages);
1802 }
1803 EXPORT_SYMBOL(set_pages_wb);
1804
1805 int set_pages_array_wb(struct page **pages, int addrinarray)
1806 {
1807 int retval;
1808 unsigned long start;
1809 unsigned long end;
1810 int i;
1811
1812 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1813 retval = cpa_clear_pages_array(pages, addrinarray,
1814 __pgprot(_PAGE_CACHE_MASK));
1815 if (retval)
1816 return retval;
1817
1818 for (i = 0; i < addrinarray; i++) {
1819 if (PageHighMem(pages[i]))
1820 continue;
1821 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1822 end = start + PAGE_SIZE;
1823 free_memtype(start, end);
1824 }
1825
1826 return 0;
1827 }
1828 EXPORT_SYMBOL(set_pages_array_wb);
1829
1830 int set_pages_x(struct page *page, int numpages)
1831 {
1832 unsigned long addr = (unsigned long)page_address(page);
1833
1834 return set_memory_x(addr, numpages);
1835 }
1836 EXPORT_SYMBOL(set_pages_x);
1837
1838 int set_pages_nx(struct page *page, int numpages)
1839 {
1840 unsigned long addr = (unsigned long)page_address(page);
1841
1842 return set_memory_nx(addr, numpages);
1843 }
1844 EXPORT_SYMBOL(set_pages_nx);
1845
1846 int set_pages_ro(struct page *page, int numpages)
1847 {
1848 unsigned long addr = (unsigned long)page_address(page);
1849
1850 return set_memory_ro(addr, numpages);
1851 }
1852
1853 int set_pages_rw(struct page *page, int numpages)
1854 {
1855 unsigned long addr = (unsigned long)page_address(page);
1856
1857 return set_memory_rw(addr, numpages);
1858 }
1859
1860 #ifdef CONFIG_DEBUG_PAGEALLOC
1861
1862 static int __set_pages_p(struct page *page, int numpages)
1863 {
1864 unsigned long tempaddr = (unsigned long) page_address(page);
1865 struct cpa_data cpa = { .vaddr = &tempaddr,
1866 .pgd = NULL,
1867 .numpages = numpages,
1868 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1869 .mask_clr = __pgprot(0),
1870 .flags = 0};
1871
1872 /*
1873 * No alias checking needed for setting present flag. otherwise,
1874 * we may need to break large pages for 64-bit kernel text
1875 * mappings (this adds to complexity if we want to do this from
1876 * atomic context especially). Let's keep it simple!
1877 */
1878 return __change_page_attr_set_clr(&cpa, 0);
1879 }
1880
1881 static int __set_pages_np(struct page *page, int numpages)
1882 {
1883 unsigned long tempaddr = (unsigned long) page_address(page);
1884 struct cpa_data cpa = { .vaddr = &tempaddr,
1885 .pgd = NULL,
1886 .numpages = numpages,
1887 .mask_set = __pgprot(0),
1888 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1889 .flags = 0};
1890
1891 /*
1892 * No alias checking needed for setting not present flag. otherwise,
1893 * we may need to break large pages for 64-bit kernel text
1894 * mappings (this adds to complexity if we want to do this from
1895 * atomic context especially). Let's keep it simple!
1896 */
1897 return __change_page_attr_set_clr(&cpa, 0);
1898 }
1899
1900 void __kernel_map_pages(struct page *page, int numpages, int enable)
1901 {
1902 if (PageHighMem(page))
1903 return;
1904 if (!enable) {
1905 debug_check_no_locks_freed(page_address(page),
1906 numpages * PAGE_SIZE);
1907 }
1908
1909 /*
1910 * The return value is ignored as the calls cannot fail.
1911 * Large pages for identity mappings are not used at boot time
1912 * and hence no memory allocations during large page split.
1913 */
1914 if (enable)
1915 __set_pages_p(page, numpages);
1916 else
1917 __set_pages_np(page, numpages);
1918
1919 /*
1920 * We should perform an IPI and flush all tlbs,
1921 * but that can deadlock->flush only current cpu:
1922 */
1923 __flush_tlb_all();
1924
1925 arch_flush_lazy_mmu_mode();
1926 }
1927
1928 #ifdef CONFIG_HIBERNATION
1929
1930 bool kernel_page_present(struct page *page)
1931 {
1932 unsigned int level;
1933 pte_t *pte;
1934
1935 if (PageHighMem(page))
1936 return false;
1937
1938 pte = lookup_address((unsigned long)page_address(page), &level);
1939 return (pte_val(*pte) & _PAGE_PRESENT);
1940 }
1941
1942 #endif /* CONFIG_HIBERNATION */
1943
1944 #endif /* CONFIG_DEBUG_PAGEALLOC */
1945
1946 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1947 unsigned numpages, unsigned long page_flags)
1948 {
1949 int retval = -EINVAL;
1950
1951 struct cpa_data cpa = {
1952 .vaddr = &address,
1953 .pfn = pfn,
1954 .pgd = pgd,
1955 .numpages = numpages,
1956 .mask_set = __pgprot(0),
1957 .mask_clr = __pgprot(0),
1958 .flags = 0,
1959 };
1960
1961 if (!(__supported_pte_mask & _PAGE_NX))
1962 goto out;
1963
1964 if (!(page_flags & _PAGE_NX))
1965 cpa.mask_clr = __pgprot(_PAGE_NX);
1966
1967 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1968
1969 retval = __change_page_attr_set_clr(&cpa, 0);
1970 __flush_tlb_all();
1971
1972 out:
1973 return retval;
1974 }
1975
1976 void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1977 unsigned numpages)
1978 {
1979 unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1980 }
1981
1982 /*
1983 * The testcases use internal knowledge of the implementation that shouldn't
1984 * be exposed to the rest of the kernel. Include these directly here.
1985 */
1986 #ifdef CONFIG_CPA_DEBUG
1987 #include "pageattr-test.c"
1988 #endif