]>
git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blob - arch/x86/mm/pageattr.c
2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/sections.h>
16 #include <asm/uaccess.h>
17 #include <asm/pgalloc.h>
20 * The current flushing context - we pass it instead of 5 arguments:
31 within(unsigned long addr
, unsigned long start
, unsigned long end
)
33 return addr
>= start
&& addr
< end
;
41 * clflush_cache_range - flush a cache range with clflush
42 * @addr: virtual start address
43 * @size: number of bytes to flush
45 * clflush is an unordered instruction which needs fencing with mfence
46 * to avoid ordering issues.
48 void clflush_cache_range(void *vaddr
, unsigned int size
)
50 void *vend
= vaddr
+ size
- 1;
54 for (; vaddr
< vend
; vaddr
+= boot_cpu_data
.x86_clflush_size
)
57 * Flush any possible final partial cacheline:
64 static void __cpa_flush_all(void *arg
)
66 unsigned long cache
= (unsigned long)arg
;
69 * Flush all to work around Errata in early athlons regarding
70 * large page flushing.
74 if (cache
&& boot_cpu_data
.x86_model
>= 4)
78 static void cpa_flush_all(unsigned long cache
)
80 BUG_ON(irqs_disabled());
82 on_each_cpu(__cpa_flush_all
, (void *) cache
, 1, 1);
85 static void __cpa_flush_range(void *arg
)
88 * We could optimize that further and do individual per page
89 * tlb invalidates for a low number of pages. Caveat: we must
90 * flush the high aliases on 64bit as well.
95 static void cpa_flush_range(unsigned long start
, int numpages
, int cache
)
97 unsigned int i
, level
;
100 BUG_ON(irqs_disabled());
101 WARN_ON(PAGE_ALIGN(start
) != start
);
103 on_each_cpu(__cpa_flush_range
, NULL
, 1, 1);
109 * We only need to flush on one CPU,
110 * clflush is a MESI-coherent instruction that
111 * will cause all other CPUs to flush the same
114 for (i
= 0, addr
= start
; i
< numpages
; i
++, addr
+= PAGE_SIZE
) {
115 pte_t
*pte
= lookup_address(addr
, &level
);
118 * Only flush present addresses:
120 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
121 clflush_cache_range((void *) addr
, PAGE_SIZE
);
125 #define HIGH_MAP_START __START_KERNEL_map
126 #define HIGH_MAP_END (__START_KERNEL_map + KERNEL_TEXT_SIZE)
130 * Converts a virtual address to a X86-64 highmap address
132 static unsigned long virt_to_highmap(void *address
)
135 return __pa((unsigned long)address
) + HIGH_MAP_START
- phys_base
;
137 return (unsigned long)address
;
142 * Certain areas of memory on x86 require very specific protection flags,
143 * for example the BIOS area or kernel text. Callers don't always get this
144 * right (again, ioremap() on BIOS memory is not uncommon) so this function
145 * checks and fixes these known static required protection bits.
147 static inline pgprot_t
static_protections(pgprot_t prot
, unsigned long address
)
149 pgprot_t forbidden
= __pgprot(0);
152 * The BIOS area between 640k and 1Mb needs to be executable for
153 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
155 if (within(__pa(address
), BIOS_BEGIN
, BIOS_END
))
156 pgprot_val(forbidden
) |= _PAGE_NX
;
159 * The kernel text needs to be executable for obvious reasons
160 * Does not cover __inittext since that is gone later on
162 if (within(address
, (unsigned long)_text
, (unsigned long)_etext
))
163 pgprot_val(forbidden
) |= _PAGE_NX
;
165 * Do the same for the x86-64 high kernel mapping
167 if (within(address
, virt_to_highmap(_text
), virt_to_highmap(_etext
)))
168 pgprot_val(forbidden
) |= _PAGE_NX
;
170 /* The .rodata section needs to be read-only */
171 if (within(address
, (unsigned long)__start_rodata
,
172 (unsigned long)__end_rodata
))
173 pgprot_val(forbidden
) |= _PAGE_RW
;
175 * Do the same for the x86-64 high kernel mapping
177 if (within(address
, virt_to_highmap(__start_rodata
),
178 virt_to_highmap(__end_rodata
)))
179 pgprot_val(forbidden
) |= _PAGE_RW
;
181 prot
= __pgprot(pgprot_val(prot
) & ~pgprot_val(forbidden
));
187 * Lookup the page table entry for a virtual address. Return a pointer
188 * to the entry and the level of the mapping.
190 * Note: We return pud and pmd either when the entry is marked large
191 * or when the present bit is not set. Otherwise we would return a
192 * pointer to a nonexisting mapping.
194 pte_t
*lookup_address(unsigned long address
, int *level
)
196 pgd_t
*pgd
= pgd_offset_k(address
);
200 *level
= PG_LEVEL_NONE
;
205 pud
= pud_offset(pgd
, address
);
209 *level
= PG_LEVEL_1G
;
210 if (pud_large(*pud
) || !pud_present(*pud
))
213 pmd
= pmd_offset(pud
, address
);
217 *level
= PG_LEVEL_2M
;
218 if (pmd_large(*pmd
) || !pmd_present(*pmd
))
221 *level
= PG_LEVEL_4K
;
223 return pte_offset_kernel(pmd
, address
);
227 * Set the new pmd in all the pgds we know about:
229 static void __set_pmd_pte(pte_t
*kpte
, unsigned long address
, pte_t pte
)
232 set_pte_atomic(kpte
, pte
);
234 if (!SHARED_KERNEL_PMD
) {
237 list_for_each_entry(page
, &pgd_list
, lru
) {
242 pgd
= (pgd_t
*)page_address(page
) + pgd_index(address
);
243 pud
= pud_offset(pgd
, address
);
244 pmd
= pmd_offset(pud
, address
);
245 set_pte_atomic((pte_t
*)pmd
, pte
);
252 try_preserve_large_page(pte_t
*kpte
, unsigned long address
,
253 struct cpa_data
*cpa
)
255 unsigned long nextpage_addr
, numpages
, pmask
, psize
, flags
;
256 pte_t new_pte
, old_pte
, *tmp
;
257 pgprot_t old_prot
, new_prot
;
258 int level
, do_split
= 1;
260 spin_lock_irqsave(&pgd_lock
, flags
);
262 * Check for races, another CPU might have split this page
265 tmp
= lookup_address(address
, &level
);
271 psize
= PMD_PAGE_SIZE
;
272 pmask
= PMD_PAGE_MASK
;
276 psize
= PMD_PAGE_SIZE
;
277 pmask
= PMD_PAGE_MASK
;
286 * Calculate the number of pages, which fit into this large
287 * page starting at address:
289 nextpage_addr
= (address
+ psize
) & pmask
;
290 numpages
= (nextpage_addr
- address
) >> PAGE_SHIFT
;
291 if (numpages
< cpa
->numpages
)
292 cpa
->numpages
= numpages
;
295 * We are safe now. Check whether the new pgprot is the same:
298 old_prot
= new_prot
= pte_pgprot(old_pte
);
300 pgprot_val(new_prot
) &= ~pgprot_val(cpa
->mask_clr
);
301 pgprot_val(new_prot
) |= pgprot_val(cpa
->mask_set
);
302 new_prot
= static_protections(new_prot
, address
);
305 * If there are no changes, return. maxpages has been updated
308 if (pgprot_val(new_prot
) == pgprot_val(old_prot
)) {
314 * We need to change the attributes. Check, whether we can
315 * change the large page in one go. We request a split, when
316 * the address is not aligned and the number of pages is
317 * smaller than the number of pages in the large page. Note
318 * that we limited the number of possible pages already to
319 * the number of pages in the large page.
321 if (address
== (nextpage_addr
- psize
) && cpa
->numpages
== numpages
) {
323 * The address is aligned and the number of pages
324 * covers the full page.
326 new_pte
= pfn_pte(pte_pfn(old_pte
), canon_pgprot(new_prot
));
327 __set_pmd_pte(kpte
, address
, new_pte
);
333 spin_unlock_irqrestore(&pgd_lock
, flags
);
338 static int split_large_page(pte_t
*kpte
, unsigned long address
)
340 unsigned long flags
, pfn
, pfninc
= 1;
341 gfp_t gfp_flags
= GFP_KERNEL
;
342 unsigned int i
, level
;
347 #ifdef CONFIG_DEBUG_PAGEALLOC
348 gfp_flags
= GFP_ATOMIC
| __GFP_NOWARN
;
350 base
= alloc_pages(gfp_flags
, 0);
354 spin_lock_irqsave(&pgd_lock
, flags
);
356 * Check for races, another CPU might have split this page
359 tmp
= lookup_address(address
, &level
);
363 pbase
= (pte_t
*)page_address(base
);
365 paravirt_alloc_pt(&init_mm
, page_to_pfn(base
));
367 ref_prot
= pte_pgprot(pte_clrhuge(*kpte
));
370 if (level
== PG_LEVEL_1G
) {
371 pfninc
= PMD_PAGE_SIZE
>> PAGE_SHIFT
;
372 pgprot_val(ref_prot
) |= _PAGE_PSE
;
377 * Get the target pfn from the original entry:
379 pfn
= pte_pfn(*kpte
);
380 for (i
= 0; i
< PTRS_PER_PTE
; i
++, pfn
+= pfninc
)
381 set_pte(&pbase
[i
], pfn_pte(pfn
, ref_prot
));
384 * Install the new, split up pagetable. Important details here:
386 * On Intel the NX bit of all levels must be cleared to make a
387 * page executable. See section 4.13.2 of Intel 64 and IA-32
388 * Architectures Software Developer's Manual).
390 * Mark the entry present. The current mapping might be
391 * set to not present, which we preserved above.
393 ref_prot
= pte_pgprot(pte_mkexec(pte_clrhuge(*kpte
)));
394 pgprot_val(ref_prot
) |= _PAGE_PRESENT
;
395 __set_pmd_pte(kpte
, address
, mk_pte(base
, ref_prot
));
399 spin_unlock_irqrestore(&pgd_lock
, flags
);
402 __free_pages(base
, 0);
407 static int __change_page_attr(unsigned long address
, struct cpa_data
*cpa
)
409 int level
, do_split
, err
;
410 struct page
*kpte_page
;
414 kpte
= lookup_address(address
, &level
);
418 kpte_page
= virt_to_page(kpte
);
419 BUG_ON(PageLRU(kpte_page
));
420 BUG_ON(PageCompound(kpte_page
));
422 if (level
== PG_LEVEL_4K
) {
423 pte_t new_pte
, old_pte
= *kpte
;
424 pgprot_t new_prot
= pte_pgprot(old_pte
);
426 if(!pte_val(old_pte
)) {
427 printk(KERN_WARNING
"CPA: called for zero pte. "
428 "vaddr = %lx cpa->vaddr = %lx\n", address
,
434 pgprot_val(new_prot
) &= ~pgprot_val(cpa
->mask_clr
);
435 pgprot_val(new_prot
) |= pgprot_val(cpa
->mask_set
);
437 new_prot
= static_protections(new_prot
, address
);
440 * We need to keep the pfn from the existing PTE,
441 * after all we're only going to change it's attributes
442 * not the memory it points to
444 new_pte
= pfn_pte(pte_pfn(old_pte
), canon_pgprot(new_prot
));
447 * Do we really change anything ?
449 if (pte_val(old_pte
) != pte_val(new_pte
)) {
450 set_pte_atomic(kpte
, new_pte
);
458 * Check, whether we can keep the large page intact
459 * and just change the pte:
461 do_split
= try_preserve_large_page(kpte
, address
, cpa
);
463 * When the range fits into the existing large page,
464 * return. cp->numpages and cpa->tlbflush have been updated in
471 * We have to split the large page:
473 err
= split_large_page(kpte
, address
);
483 * change_page_attr_addr - Change page table attributes in linear mapping
484 * @address: Virtual address in linear mapping.
485 * @prot: New page table attribute (PAGE_*)
487 * Change page attributes of a page in the direct mapping. This is a variant
488 * of change_page_attr() that also works on memory holes that do not have
489 * mem_map entry (pfn_valid() is false).
491 * See change_page_attr() documentation for more details.
493 * Modules and drivers should use the set_memory_* APIs instead.
495 static int change_page_attr_addr(struct cpa_data
*cpa
)
498 unsigned long address
= cpa
->vaddr
;
501 unsigned long phys_addr
= __pa(address
);
504 * If we are inside the high mapped kernel range, then we
505 * fixup the low mapping first. __va() returns the virtual
506 * address in the linear mapping:
508 if (within(address
, HIGH_MAP_START
, HIGH_MAP_END
))
509 address
= (unsigned long) __va(phys_addr
);
512 err
= __change_page_attr(address
, cpa
);
518 * If the physical address is inside the kernel map, we need
519 * to touch the high mapped kernel as well:
521 if (within(phys_addr
, 0, KERNEL_TEXT_SIZE
)) {
523 * Calc the high mapping address. See __phys_addr()
524 * for the non obvious details.
526 * Note that NX and other required permissions are
527 * checked in static_protections().
529 address
= phys_addr
+ HIGH_MAP_START
- phys_base
;
532 * Our high aliases are imprecise, because we check
533 * everything between 0 and KERNEL_TEXT_SIZE, so do
534 * not propagate lookup failures back to users:
536 __change_page_attr(address
, cpa
);
542 static int __change_page_attr_set_clr(struct cpa_data
*cpa
)
544 int ret
, numpages
= cpa
->numpages
;
548 * Store the remaining nr of pages for the large page
549 * preservation check.
551 cpa
->numpages
= numpages
;
552 ret
= change_page_attr_addr(cpa
);
557 * Adjust the number of pages with the result of the
558 * CPA operation. Either a large page has been
559 * preserved or a single page update happened.
561 BUG_ON(cpa
->numpages
> numpages
);
562 numpages
-= cpa
->numpages
;
563 cpa
->vaddr
+= cpa
->numpages
* PAGE_SIZE
;
568 static inline int cache_attr(pgprot_t attr
)
570 return pgprot_val(attr
) &
571 (_PAGE_PAT
| _PAGE_PAT_LARGE
| _PAGE_PWT
| _PAGE_PCD
);
574 static int change_page_attr_set_clr(unsigned long addr
, int numpages
,
575 pgprot_t mask_set
, pgprot_t mask_clr
)
581 * Check, if we are requested to change a not supported
584 mask_set
= canon_pgprot(mask_set
);
585 mask_clr
= canon_pgprot(mask_clr
);
586 if (!pgprot_val(mask_set
) && !pgprot_val(mask_clr
))
590 cpa
.numpages
= numpages
;
591 cpa
.mask_set
= mask_set
;
592 cpa
.mask_clr
= mask_clr
;
595 ret
= __change_page_attr_set_clr(&cpa
);
598 * Check whether we really changed something:
604 * No need to flush, when we did not set any of the caching
607 cache
= cache_attr(mask_set
);
610 * On success we use clflush, when the CPU supports it to
611 * avoid the wbindv. If the CPU does not support it and in the
612 * error case we fall back to cpa_flush_all (which uses
615 if (!ret
&& cpu_has_clflush
)
616 cpa_flush_range(addr
, numpages
, cache
);
618 cpa_flush_all(cache
);
623 static inline int change_page_attr_set(unsigned long addr
, int numpages
,
626 return change_page_attr_set_clr(addr
, numpages
, mask
, __pgprot(0));
629 static inline int change_page_attr_clear(unsigned long addr
, int numpages
,
632 return change_page_attr_set_clr(addr
, numpages
, __pgprot(0), mask
);
635 int set_memory_uc(unsigned long addr
, int numpages
)
637 return change_page_attr_set(addr
, numpages
,
638 __pgprot(_PAGE_PCD
| _PAGE_PWT
));
640 EXPORT_SYMBOL(set_memory_uc
);
642 int set_memory_wb(unsigned long addr
, int numpages
)
644 return change_page_attr_clear(addr
, numpages
,
645 __pgprot(_PAGE_PCD
| _PAGE_PWT
));
647 EXPORT_SYMBOL(set_memory_wb
);
649 int set_memory_x(unsigned long addr
, int numpages
)
651 return change_page_attr_clear(addr
, numpages
, __pgprot(_PAGE_NX
));
653 EXPORT_SYMBOL(set_memory_x
);
655 int set_memory_nx(unsigned long addr
, int numpages
)
657 return change_page_attr_set(addr
, numpages
, __pgprot(_PAGE_NX
));
659 EXPORT_SYMBOL(set_memory_nx
);
661 int set_memory_ro(unsigned long addr
, int numpages
)
663 return change_page_attr_clear(addr
, numpages
, __pgprot(_PAGE_RW
));
666 int set_memory_rw(unsigned long addr
, int numpages
)
668 return change_page_attr_set(addr
, numpages
, __pgprot(_PAGE_RW
));
671 int set_memory_np(unsigned long addr
, int numpages
)
673 return change_page_attr_clear(addr
, numpages
, __pgprot(_PAGE_PRESENT
));
676 int set_pages_uc(struct page
*page
, int numpages
)
678 unsigned long addr
= (unsigned long)page_address(page
);
680 return set_memory_uc(addr
, numpages
);
682 EXPORT_SYMBOL(set_pages_uc
);
684 int set_pages_wb(struct page
*page
, int numpages
)
686 unsigned long addr
= (unsigned long)page_address(page
);
688 return set_memory_wb(addr
, numpages
);
690 EXPORT_SYMBOL(set_pages_wb
);
692 int set_pages_x(struct page
*page
, int numpages
)
694 unsigned long addr
= (unsigned long)page_address(page
);
696 return set_memory_x(addr
, numpages
);
698 EXPORT_SYMBOL(set_pages_x
);
700 int set_pages_nx(struct page
*page
, int numpages
)
702 unsigned long addr
= (unsigned long)page_address(page
);
704 return set_memory_nx(addr
, numpages
);
706 EXPORT_SYMBOL(set_pages_nx
);
708 int set_pages_ro(struct page
*page
, int numpages
)
710 unsigned long addr
= (unsigned long)page_address(page
);
712 return set_memory_ro(addr
, numpages
);
715 int set_pages_rw(struct page
*page
, int numpages
)
717 unsigned long addr
= (unsigned long)page_address(page
);
719 return set_memory_rw(addr
, numpages
);
722 #ifdef CONFIG_DEBUG_PAGEALLOC
724 static int __set_pages_p(struct page
*page
, int numpages
)
726 struct cpa_data cpa
= { .vaddr
= (unsigned long) page_address(page
),
727 .numpages
= numpages
,
728 .mask_set
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
729 .mask_clr
= __pgprot(0)};
731 return __change_page_attr_set_clr(&cpa
);
734 static int __set_pages_np(struct page
*page
, int numpages
)
736 struct cpa_data cpa
= { .vaddr
= (unsigned long) page_address(page
),
737 .numpages
= numpages
,
738 .mask_set
= __pgprot(0),
739 .mask_clr
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
)};
741 return __change_page_attr_set_clr(&cpa
);
744 void kernel_map_pages(struct page
*page
, int numpages
, int enable
)
746 if (PageHighMem(page
))
749 debug_check_no_locks_freed(page_address(page
),
750 numpages
* PAGE_SIZE
);
754 * If page allocator is not up yet then do not call c_p_a():
756 if (!debug_pagealloc_enabled
)
760 * The return value is ignored - the calls cannot fail,
761 * large pages are disabled at boot time:
764 __set_pages_p(page
, numpages
);
766 __set_pages_np(page
, numpages
);
769 * We should perform an IPI and flush all tlbs,
770 * but that can deadlock->flush only current cpu:
777 * The testcases use internal knowledge of the implementation that shouldn't
778 * be exposed to the rest of the kernel. Include these directly here.
780 #ifdef CONFIG_CPA_DEBUG
781 #include "pageattr-test.c"