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1 /*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
4 */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
10 #include <linux/mm.h>
11
12 #include <asm/e820.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/sections.h>
16 #include <asm/uaccess.h>
17 #include <asm/pgalloc.h>
18
19 /*
20 * The current flushing context - we pass it instead of 5 arguments:
21 */
22 struct cpa_data {
23 unsigned long vaddr;
24 pgprot_t mask_set;
25 pgprot_t mask_clr;
26 int numpages;
27 int flushtlb;
28 };
29
30 static inline int
31 within(unsigned long addr, unsigned long start, unsigned long end)
32 {
33 return addr >= start && addr < end;
34 }
35
36 /*
37 * Flushing functions
38 */
39
40 /**
41 * clflush_cache_range - flush a cache range with clflush
42 * @addr: virtual start address
43 * @size: number of bytes to flush
44 *
45 * clflush is an unordered instruction which needs fencing with mfence
46 * to avoid ordering issues.
47 */
48 void clflush_cache_range(void *vaddr, unsigned int size)
49 {
50 void *vend = vaddr + size - 1;
51
52 mb();
53
54 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
55 clflush(vaddr);
56 /*
57 * Flush any possible final partial cacheline:
58 */
59 clflush(vend);
60
61 mb();
62 }
63
64 static void __cpa_flush_all(void *arg)
65 {
66 unsigned long cache = (unsigned long)arg;
67
68 /*
69 * Flush all to work around Errata in early athlons regarding
70 * large page flushing.
71 */
72 __flush_tlb_all();
73
74 if (cache && boot_cpu_data.x86_model >= 4)
75 wbinvd();
76 }
77
78 static void cpa_flush_all(unsigned long cache)
79 {
80 BUG_ON(irqs_disabled());
81
82 on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
83 }
84
85 static void __cpa_flush_range(void *arg)
86 {
87 /*
88 * We could optimize that further and do individual per page
89 * tlb invalidates for a low number of pages. Caveat: we must
90 * flush the high aliases on 64bit as well.
91 */
92 __flush_tlb_all();
93 }
94
95 static void cpa_flush_range(unsigned long start, int numpages, int cache)
96 {
97 unsigned int i, level;
98 unsigned long addr;
99
100 BUG_ON(irqs_disabled());
101 WARN_ON(PAGE_ALIGN(start) != start);
102
103 on_each_cpu(__cpa_flush_range, NULL, 1, 1);
104
105 if (!cache)
106 return;
107
108 /*
109 * We only need to flush on one CPU,
110 * clflush is a MESI-coherent instruction that
111 * will cause all other CPUs to flush the same
112 * cachelines:
113 */
114 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
115 pte_t *pte = lookup_address(addr, &level);
116
117 /*
118 * Only flush present addresses:
119 */
120 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
121 clflush_cache_range((void *) addr, PAGE_SIZE);
122 }
123 }
124
125 #define HIGH_MAP_START __START_KERNEL_map
126 #define HIGH_MAP_END (__START_KERNEL_map + KERNEL_TEXT_SIZE)
127
128
129 /*
130 * Converts a virtual address to a X86-64 highmap address
131 */
132 static unsigned long virt_to_highmap(void *address)
133 {
134 #ifdef CONFIG_X86_64
135 return __pa((unsigned long)address) + HIGH_MAP_START - phys_base;
136 #else
137 return (unsigned long)address;
138 #endif
139 }
140
141 /*
142 * Certain areas of memory on x86 require very specific protection flags,
143 * for example the BIOS area or kernel text. Callers don't always get this
144 * right (again, ioremap() on BIOS memory is not uncommon) so this function
145 * checks and fixes these known static required protection bits.
146 */
147 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
148 {
149 pgprot_t forbidden = __pgprot(0);
150
151 /*
152 * The BIOS area between 640k and 1Mb needs to be executable for
153 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
154 */
155 if (within(__pa(address), BIOS_BEGIN, BIOS_END))
156 pgprot_val(forbidden) |= _PAGE_NX;
157
158 /*
159 * The kernel text needs to be executable for obvious reasons
160 * Does not cover __inittext since that is gone later on
161 */
162 if (within(address, (unsigned long)_text, (unsigned long)_etext))
163 pgprot_val(forbidden) |= _PAGE_NX;
164 /*
165 * Do the same for the x86-64 high kernel mapping
166 */
167 if (within(address, virt_to_highmap(_text), virt_to_highmap(_etext)))
168 pgprot_val(forbidden) |= _PAGE_NX;
169
170 /* The .rodata section needs to be read-only */
171 if (within(address, (unsigned long)__start_rodata,
172 (unsigned long)__end_rodata))
173 pgprot_val(forbidden) |= _PAGE_RW;
174 /*
175 * Do the same for the x86-64 high kernel mapping
176 */
177 if (within(address, virt_to_highmap(__start_rodata),
178 virt_to_highmap(__end_rodata)))
179 pgprot_val(forbidden) |= _PAGE_RW;
180
181 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
182
183 return prot;
184 }
185
186 /*
187 * Lookup the page table entry for a virtual address. Return a pointer
188 * to the entry and the level of the mapping.
189 *
190 * Note: We return pud and pmd either when the entry is marked large
191 * or when the present bit is not set. Otherwise we would return a
192 * pointer to a nonexisting mapping.
193 */
194 pte_t *lookup_address(unsigned long address, int *level)
195 {
196 pgd_t *pgd = pgd_offset_k(address);
197 pud_t *pud;
198 pmd_t *pmd;
199
200 *level = PG_LEVEL_NONE;
201
202 if (pgd_none(*pgd))
203 return NULL;
204
205 pud = pud_offset(pgd, address);
206 if (pud_none(*pud))
207 return NULL;
208
209 *level = PG_LEVEL_1G;
210 if (pud_large(*pud) || !pud_present(*pud))
211 return (pte_t *)pud;
212
213 pmd = pmd_offset(pud, address);
214 if (pmd_none(*pmd))
215 return NULL;
216
217 *level = PG_LEVEL_2M;
218 if (pmd_large(*pmd) || !pmd_present(*pmd))
219 return (pte_t *)pmd;
220
221 *level = PG_LEVEL_4K;
222
223 return pte_offset_kernel(pmd, address);
224 }
225
226 /*
227 * Set the new pmd in all the pgds we know about:
228 */
229 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
230 {
231 /* change init_mm */
232 set_pte_atomic(kpte, pte);
233 #ifdef CONFIG_X86_32
234 if (!SHARED_KERNEL_PMD) {
235 struct page *page;
236
237 list_for_each_entry(page, &pgd_list, lru) {
238 pgd_t *pgd;
239 pud_t *pud;
240 pmd_t *pmd;
241
242 pgd = (pgd_t *)page_address(page) + pgd_index(address);
243 pud = pud_offset(pgd, address);
244 pmd = pmd_offset(pud, address);
245 set_pte_atomic((pte_t *)pmd, pte);
246 }
247 }
248 #endif
249 }
250
251 static int
252 try_preserve_large_page(pte_t *kpte, unsigned long address,
253 struct cpa_data *cpa)
254 {
255 unsigned long nextpage_addr, numpages, pmask, psize, flags;
256 pte_t new_pte, old_pte, *tmp;
257 pgprot_t old_prot, new_prot;
258 int level, do_split = 1;
259
260 spin_lock_irqsave(&pgd_lock, flags);
261 /*
262 * Check for races, another CPU might have split this page
263 * up already:
264 */
265 tmp = lookup_address(address, &level);
266 if (tmp != kpte)
267 goto out_unlock;
268
269 switch (level) {
270 case PG_LEVEL_2M:
271 psize = PMD_PAGE_SIZE;
272 pmask = PMD_PAGE_MASK;
273 break;
274 #ifdef CONFIG_X86_64
275 case PG_LEVEL_1G:
276 psize = PMD_PAGE_SIZE;
277 pmask = PMD_PAGE_MASK;
278 break;
279 #endif
280 default:
281 do_split = -EINVAL;
282 goto out_unlock;
283 }
284
285 /*
286 * Calculate the number of pages, which fit into this large
287 * page starting at address:
288 */
289 nextpage_addr = (address + psize) & pmask;
290 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
291 if (numpages < cpa->numpages)
292 cpa->numpages = numpages;
293
294 /*
295 * We are safe now. Check whether the new pgprot is the same:
296 */
297 old_pte = *kpte;
298 old_prot = new_prot = pte_pgprot(old_pte);
299
300 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
301 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
302 new_prot = static_protections(new_prot, address);
303
304 /*
305 * If there are no changes, return. maxpages has been updated
306 * above:
307 */
308 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
309 do_split = 0;
310 goto out_unlock;
311 }
312
313 /*
314 * We need to change the attributes. Check, whether we can
315 * change the large page in one go. We request a split, when
316 * the address is not aligned and the number of pages is
317 * smaller than the number of pages in the large page. Note
318 * that we limited the number of possible pages already to
319 * the number of pages in the large page.
320 */
321 if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
322 /*
323 * The address is aligned and the number of pages
324 * covers the full page.
325 */
326 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
327 __set_pmd_pte(kpte, address, new_pte);
328 cpa->flushtlb = 1;
329 do_split = 0;
330 }
331
332 out_unlock:
333 spin_unlock_irqrestore(&pgd_lock, flags);
334
335 return do_split;
336 }
337
338 static int split_large_page(pte_t *kpte, unsigned long address)
339 {
340 unsigned long flags, pfn, pfninc = 1;
341 gfp_t gfp_flags = GFP_KERNEL;
342 unsigned int i, level;
343 pte_t *pbase, *tmp;
344 pgprot_t ref_prot;
345 struct page *base;
346
347 #ifdef CONFIG_DEBUG_PAGEALLOC
348 gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
349 #endif
350 base = alloc_pages(gfp_flags, 0);
351 if (!base)
352 return -ENOMEM;
353
354 spin_lock_irqsave(&pgd_lock, flags);
355 /*
356 * Check for races, another CPU might have split this page
357 * up for us already:
358 */
359 tmp = lookup_address(address, &level);
360 if (tmp != kpte)
361 goto out_unlock;
362
363 pbase = (pte_t *)page_address(base);
364 #ifdef CONFIG_X86_32
365 paravirt_alloc_pt(&init_mm, page_to_pfn(base));
366 #endif
367 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
368
369 #ifdef CONFIG_X86_64
370 if (level == PG_LEVEL_1G) {
371 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
372 pgprot_val(ref_prot) |= _PAGE_PSE;
373 }
374 #endif
375
376 /*
377 * Get the target pfn from the original entry:
378 */
379 pfn = pte_pfn(*kpte);
380 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
381 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
382
383 /*
384 * Install the new, split up pagetable. Important details here:
385 *
386 * On Intel the NX bit of all levels must be cleared to make a
387 * page executable. See section 4.13.2 of Intel 64 and IA-32
388 * Architectures Software Developer's Manual).
389 *
390 * Mark the entry present. The current mapping might be
391 * set to not present, which we preserved above.
392 */
393 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
394 pgprot_val(ref_prot) |= _PAGE_PRESENT;
395 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
396 base = NULL;
397
398 out_unlock:
399 spin_unlock_irqrestore(&pgd_lock, flags);
400
401 if (base)
402 __free_pages(base, 0);
403
404 return 0;
405 }
406
407 static int __change_page_attr(unsigned long address, struct cpa_data *cpa)
408 {
409 int level, do_split, err;
410 struct page *kpte_page;
411 pte_t *kpte;
412
413 repeat:
414 kpte = lookup_address(address, &level);
415 if (!kpte)
416 return -EINVAL;
417
418 kpte_page = virt_to_page(kpte);
419 BUG_ON(PageLRU(kpte_page));
420 BUG_ON(PageCompound(kpte_page));
421
422 if (level == PG_LEVEL_4K) {
423 pte_t new_pte, old_pte = *kpte;
424 pgprot_t new_prot = pte_pgprot(old_pte);
425
426 if(!pte_val(old_pte)) {
427 printk(KERN_WARNING "CPA: called for zero pte. "
428 "vaddr = %lx cpa->vaddr = %lx\n", address,
429 cpa->vaddr);
430 WARN_ON(1);
431 return -EINVAL;
432 }
433
434 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
435 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
436
437 new_prot = static_protections(new_prot, address);
438
439 /*
440 * We need to keep the pfn from the existing PTE,
441 * after all we're only going to change it's attributes
442 * not the memory it points to
443 */
444 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
445
446 /*
447 * Do we really change anything ?
448 */
449 if (pte_val(old_pte) != pte_val(new_pte)) {
450 set_pte_atomic(kpte, new_pte);
451 cpa->flushtlb = 1;
452 }
453 cpa->numpages = 1;
454 return 0;
455 }
456
457 /*
458 * Check, whether we can keep the large page intact
459 * and just change the pte:
460 */
461 do_split = try_preserve_large_page(kpte, address, cpa);
462 /*
463 * When the range fits into the existing large page,
464 * return. cp->numpages and cpa->tlbflush have been updated in
465 * try_large_page:
466 */
467 if (do_split <= 0)
468 return do_split;
469
470 /*
471 * We have to split the large page:
472 */
473 err = split_large_page(kpte, address);
474 if (!err) {
475 cpa->flushtlb = 1;
476 goto repeat;
477 }
478
479 return err;
480 }
481
482 /**
483 * change_page_attr_addr - Change page table attributes in linear mapping
484 * @address: Virtual address in linear mapping.
485 * @prot: New page table attribute (PAGE_*)
486 *
487 * Change page attributes of a page in the direct mapping. This is a variant
488 * of change_page_attr() that also works on memory holes that do not have
489 * mem_map entry (pfn_valid() is false).
490 *
491 * See change_page_attr() documentation for more details.
492 *
493 * Modules and drivers should use the set_memory_* APIs instead.
494 */
495 static int change_page_attr_addr(struct cpa_data *cpa)
496 {
497 int err;
498 unsigned long address = cpa->vaddr;
499
500 #ifdef CONFIG_X86_64
501 unsigned long phys_addr = __pa(address);
502
503 /*
504 * If we are inside the high mapped kernel range, then we
505 * fixup the low mapping first. __va() returns the virtual
506 * address in the linear mapping:
507 */
508 if (within(address, HIGH_MAP_START, HIGH_MAP_END))
509 address = (unsigned long) __va(phys_addr);
510 #endif
511
512 err = __change_page_attr(address, cpa);
513 if (err)
514 return err;
515
516 #ifdef CONFIG_X86_64
517 /*
518 * If the physical address is inside the kernel map, we need
519 * to touch the high mapped kernel as well:
520 */
521 if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
522 /*
523 * Calc the high mapping address. See __phys_addr()
524 * for the non obvious details.
525 *
526 * Note that NX and other required permissions are
527 * checked in static_protections().
528 */
529 address = phys_addr + HIGH_MAP_START - phys_base;
530
531 /*
532 * Our high aliases are imprecise, because we check
533 * everything between 0 and KERNEL_TEXT_SIZE, so do
534 * not propagate lookup failures back to users:
535 */
536 __change_page_attr(address, cpa);
537 }
538 #endif
539 return err;
540 }
541
542 static int __change_page_attr_set_clr(struct cpa_data *cpa)
543 {
544 int ret, numpages = cpa->numpages;
545
546 while (numpages) {
547 /*
548 * Store the remaining nr of pages for the large page
549 * preservation check.
550 */
551 cpa->numpages = numpages;
552 ret = change_page_attr_addr(cpa);
553 if (ret)
554 return ret;
555
556 /*
557 * Adjust the number of pages with the result of the
558 * CPA operation. Either a large page has been
559 * preserved or a single page update happened.
560 */
561 BUG_ON(cpa->numpages > numpages);
562 numpages -= cpa->numpages;
563 cpa->vaddr += cpa->numpages * PAGE_SIZE;
564 }
565 return 0;
566 }
567
568 static inline int cache_attr(pgprot_t attr)
569 {
570 return pgprot_val(attr) &
571 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
572 }
573
574 static int change_page_attr_set_clr(unsigned long addr, int numpages,
575 pgprot_t mask_set, pgprot_t mask_clr)
576 {
577 struct cpa_data cpa;
578 int ret, cache;
579
580 /*
581 * Check, if we are requested to change a not supported
582 * feature:
583 */
584 mask_set = canon_pgprot(mask_set);
585 mask_clr = canon_pgprot(mask_clr);
586 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr))
587 return 0;
588
589 cpa.vaddr = addr;
590 cpa.numpages = numpages;
591 cpa.mask_set = mask_set;
592 cpa.mask_clr = mask_clr;
593 cpa.flushtlb = 0;
594
595 ret = __change_page_attr_set_clr(&cpa);
596
597 /*
598 * Check whether we really changed something:
599 */
600 if (!cpa.flushtlb)
601 return ret;
602
603 /*
604 * No need to flush, when we did not set any of the caching
605 * attributes:
606 */
607 cache = cache_attr(mask_set);
608
609 /*
610 * On success we use clflush, when the CPU supports it to
611 * avoid the wbindv. If the CPU does not support it and in the
612 * error case we fall back to cpa_flush_all (which uses
613 * wbindv):
614 */
615 if (!ret && cpu_has_clflush)
616 cpa_flush_range(addr, numpages, cache);
617 else
618 cpa_flush_all(cache);
619
620 return ret;
621 }
622
623 static inline int change_page_attr_set(unsigned long addr, int numpages,
624 pgprot_t mask)
625 {
626 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
627 }
628
629 static inline int change_page_attr_clear(unsigned long addr, int numpages,
630 pgprot_t mask)
631 {
632 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
633 }
634
635 int set_memory_uc(unsigned long addr, int numpages)
636 {
637 return change_page_attr_set(addr, numpages,
638 __pgprot(_PAGE_PCD | _PAGE_PWT));
639 }
640 EXPORT_SYMBOL(set_memory_uc);
641
642 int set_memory_wb(unsigned long addr, int numpages)
643 {
644 return change_page_attr_clear(addr, numpages,
645 __pgprot(_PAGE_PCD | _PAGE_PWT));
646 }
647 EXPORT_SYMBOL(set_memory_wb);
648
649 int set_memory_x(unsigned long addr, int numpages)
650 {
651 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
652 }
653 EXPORT_SYMBOL(set_memory_x);
654
655 int set_memory_nx(unsigned long addr, int numpages)
656 {
657 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
658 }
659 EXPORT_SYMBOL(set_memory_nx);
660
661 int set_memory_ro(unsigned long addr, int numpages)
662 {
663 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
664 }
665
666 int set_memory_rw(unsigned long addr, int numpages)
667 {
668 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
669 }
670
671 int set_memory_np(unsigned long addr, int numpages)
672 {
673 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
674 }
675
676 int set_pages_uc(struct page *page, int numpages)
677 {
678 unsigned long addr = (unsigned long)page_address(page);
679
680 return set_memory_uc(addr, numpages);
681 }
682 EXPORT_SYMBOL(set_pages_uc);
683
684 int set_pages_wb(struct page *page, int numpages)
685 {
686 unsigned long addr = (unsigned long)page_address(page);
687
688 return set_memory_wb(addr, numpages);
689 }
690 EXPORT_SYMBOL(set_pages_wb);
691
692 int set_pages_x(struct page *page, int numpages)
693 {
694 unsigned long addr = (unsigned long)page_address(page);
695
696 return set_memory_x(addr, numpages);
697 }
698 EXPORT_SYMBOL(set_pages_x);
699
700 int set_pages_nx(struct page *page, int numpages)
701 {
702 unsigned long addr = (unsigned long)page_address(page);
703
704 return set_memory_nx(addr, numpages);
705 }
706 EXPORT_SYMBOL(set_pages_nx);
707
708 int set_pages_ro(struct page *page, int numpages)
709 {
710 unsigned long addr = (unsigned long)page_address(page);
711
712 return set_memory_ro(addr, numpages);
713 }
714
715 int set_pages_rw(struct page *page, int numpages)
716 {
717 unsigned long addr = (unsigned long)page_address(page);
718
719 return set_memory_rw(addr, numpages);
720 }
721
722 #ifdef CONFIG_DEBUG_PAGEALLOC
723
724 static int __set_pages_p(struct page *page, int numpages)
725 {
726 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
727 .numpages = numpages,
728 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
729 .mask_clr = __pgprot(0)};
730
731 return __change_page_attr_set_clr(&cpa);
732 }
733
734 static int __set_pages_np(struct page *page, int numpages)
735 {
736 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
737 .numpages = numpages,
738 .mask_set = __pgprot(0),
739 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
740
741 return __change_page_attr_set_clr(&cpa);
742 }
743
744 void kernel_map_pages(struct page *page, int numpages, int enable)
745 {
746 if (PageHighMem(page))
747 return;
748 if (!enable) {
749 debug_check_no_locks_freed(page_address(page),
750 numpages * PAGE_SIZE);
751 }
752
753 /*
754 * If page allocator is not up yet then do not call c_p_a():
755 */
756 if (!debug_pagealloc_enabled)
757 return;
758
759 /*
760 * The return value is ignored - the calls cannot fail,
761 * large pages are disabled at boot time:
762 */
763 if (enable)
764 __set_pages_p(page, numpages);
765 else
766 __set_pages_np(page, numpages);
767
768 /*
769 * We should perform an IPI and flush all tlbs,
770 * but that can deadlock->flush only current cpu:
771 */
772 __flush_tlb_all();
773 }
774 #endif
775
776 /*
777 * The testcases use internal knowledge of the implementation that shouldn't
778 * be exposed to the rest of the kernel. Include these directly here.
779 */
780 #ifdef CONFIG_CPA_DEBUG
781 #include "pageattr-test.c"
782 #endif