2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
29 * The current flushing context - we pass it instead of 5 arguments:
36 unsigned long numpages
;
39 unsigned force_split
: 1;
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
50 static DEFINE_SPINLOCK(cpa_lock
);
52 #define CPA_FLUSHTLB 1
54 #define CPA_PAGES_ARRAY 4
57 static unsigned long direct_pages_count
[PG_LEVEL_NUM
];
59 void update_page_count(int level
, unsigned long pages
)
61 /* Protect against CPA */
63 direct_pages_count
[level
] += pages
;
64 spin_unlock(&pgd_lock
);
67 static void split_page_count(int level
)
69 if (direct_pages_count
[level
] == 0)
72 direct_pages_count
[level
]--;
73 direct_pages_count
[level
- 1] += PTRS_PER_PTE
;
76 void arch_report_meminfo(struct seq_file
*m
)
78 seq_printf(m
, "DirectMap4k: %8lu kB\n",
79 direct_pages_count
[PG_LEVEL_4K
] << 2);
80 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
81 seq_printf(m
, "DirectMap2M: %8lu kB\n",
82 direct_pages_count
[PG_LEVEL_2M
] << 11);
84 seq_printf(m
, "DirectMap4M: %8lu kB\n",
85 direct_pages_count
[PG_LEVEL_2M
] << 12);
88 seq_printf(m
, "DirectMap1G: %8lu kB\n",
89 direct_pages_count
[PG_LEVEL_1G
] << 20);
92 static inline void split_page_count(int level
) { }
97 static inline unsigned long highmap_start_pfn(void)
99 return __pa_symbol(_text
) >> PAGE_SHIFT
;
102 static inline unsigned long highmap_end_pfn(void)
104 /* Do not reference physical address outside the kernel. */
105 return __pa_symbol(roundup(_brk_end
, PMD_SIZE
) - 1) >> PAGE_SHIFT
;
111 within(unsigned long addr
, unsigned long start
, unsigned long end
)
113 return addr
>= start
&& addr
< end
;
117 within_inclusive(unsigned long addr
, unsigned long start
, unsigned long end
)
119 return addr
>= start
&& addr
<= end
;
127 * clflush_cache_range - flush a cache range with clflush
128 * @vaddr: virtual start address
129 * @size: number of bytes to flush
131 * clflushopt is an unordered instruction which needs fencing with mfence or
132 * sfence to avoid ordering issues.
134 void clflush_cache_range(void *vaddr
, unsigned int size
)
136 const unsigned long clflush_size
= boot_cpu_data
.x86_clflush_size
;
137 void *p
= (void *)((unsigned long)vaddr
& ~(clflush_size
- 1));
138 void *vend
= vaddr
+ size
;
145 for (; p
< vend
; p
+= clflush_size
)
150 EXPORT_SYMBOL_GPL(clflush_cache_range
);
152 static void __cpa_flush_all(void *arg
)
154 unsigned long cache
= (unsigned long)arg
;
157 * Flush all to work around Errata in early athlons regarding
158 * large page flushing.
162 if (cache
&& boot_cpu_data
.x86
>= 4)
166 static void cpa_flush_all(unsigned long cache
)
168 BUG_ON(irqs_disabled());
170 on_each_cpu(__cpa_flush_all
, (void *) cache
, 1);
173 static void __cpa_flush_range(void *arg
)
176 * We could optimize that further and do individual per page
177 * tlb invalidates for a low number of pages. Caveat: we must
178 * flush the high aliases on 64bit as well.
183 static void cpa_flush_range(unsigned long start
, int numpages
, int cache
)
185 unsigned int i
, level
;
188 BUG_ON(irqs_disabled());
189 WARN_ON(PAGE_ALIGN(start
) != start
);
191 on_each_cpu(__cpa_flush_range
, NULL
, 1);
197 * We only need to flush on one CPU,
198 * clflush is a MESI-coherent instruction that
199 * will cause all other CPUs to flush the same
202 for (i
= 0, addr
= start
; i
< numpages
; i
++, addr
+= PAGE_SIZE
) {
203 pte_t
*pte
= lookup_address(addr
, &level
);
206 * Only flush present addresses:
208 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
209 clflush_cache_range((void *) addr
, PAGE_SIZE
);
213 static void cpa_flush_array(unsigned long *start
, int numpages
, int cache
,
214 int in_flags
, struct page
**pages
)
216 unsigned int i
, level
;
217 unsigned long do_wbinvd
= cache
&& numpages
>= 1024; /* 4M threshold */
219 BUG_ON(irqs_disabled());
221 on_each_cpu(__cpa_flush_all
, (void *) do_wbinvd
, 1);
223 if (!cache
|| do_wbinvd
)
227 * We only need to flush on one CPU,
228 * clflush is a MESI-coherent instruction that
229 * will cause all other CPUs to flush the same
232 for (i
= 0; i
< numpages
; i
++) {
236 if (in_flags
& CPA_PAGES_ARRAY
)
237 addr
= (unsigned long)page_address(pages
[i
]);
241 pte
= lookup_address(addr
, &level
);
244 * Only flush present addresses:
246 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
247 clflush_cache_range((void *)addr
, PAGE_SIZE
);
252 * Certain areas of memory on x86 require very specific protection flags,
253 * for example the BIOS area or kernel text. Callers don't always get this
254 * right (again, ioremap() on BIOS memory is not uncommon) so this function
255 * checks and fixes these known static required protection bits.
257 static inline pgprot_t
static_protections(pgprot_t prot
, unsigned long address
,
260 pgprot_t forbidden
= __pgprot(0);
263 * The BIOS area between 640k and 1Mb needs to be executable for
264 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
266 #ifdef CONFIG_PCI_BIOS
267 if (pcibios_enabled
&& within(pfn
, BIOS_BEGIN
>> PAGE_SHIFT
, BIOS_END
>> PAGE_SHIFT
))
268 pgprot_val(forbidden
) |= _PAGE_NX
;
272 * The kernel text needs to be executable for obvious reasons
273 * Does not cover __inittext since that is gone later on. On
274 * 64bit we do not enforce !NX on the low mapping
276 if (within(address
, (unsigned long)_text
, (unsigned long)_etext
))
277 pgprot_val(forbidden
) |= _PAGE_NX
;
280 * The .rodata section needs to be read-only. Using the pfn
281 * catches all aliases.
283 if (within(pfn
, __pa_symbol(__start_rodata
) >> PAGE_SHIFT
,
284 __pa_symbol(__end_rodata
) >> PAGE_SHIFT
))
285 pgprot_val(forbidden
) |= _PAGE_RW
;
287 #if defined(CONFIG_X86_64)
289 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
290 * kernel text mappings for the large page aligned text, rodata sections
291 * will be always read-only. For the kernel identity mappings covering
292 * the holes caused by this alignment can be anything that user asks.
294 * This will preserve the large page mappings for kernel text/data
297 if (kernel_set_to_readonly
&&
298 within(address
, (unsigned long)_text
,
299 (unsigned long)__end_rodata_hpage_align
)) {
303 * Don't enforce the !RW mapping for the kernel text mapping,
304 * if the current mapping is already using small page mapping.
305 * No need to work hard to preserve large page mappings in this
308 * This also fixes the Linux Xen paravirt guest boot failure
309 * (because of unexpected read-only mappings for kernel identity
310 * mappings). In this paravirt guest case, the kernel text
311 * mapping and the kernel identity mapping share the same
312 * page-table pages. Thus we can't really use different
313 * protections for the kernel text and identity mappings. Also,
314 * these shared mappings are made of small page mappings.
315 * Thus this don't enforce !RW mapping for small page kernel
316 * text mapping logic will help Linux Xen parvirt guest boot
319 if (lookup_address(address
, &level
) && (level
!= PG_LEVEL_4K
))
320 pgprot_val(forbidden
) |= _PAGE_RW
;
324 prot
= __pgprot(pgprot_val(prot
) & ~pgprot_val(forbidden
));
330 * Lookup the page table entry for a virtual address in a specific pgd.
331 * Return a pointer to the entry and the level of the mapping.
333 pte_t
*lookup_address_in_pgd(pgd_t
*pgd
, unsigned long address
,
339 *level
= PG_LEVEL_NONE
;
344 pud
= pud_offset(pgd
, address
);
348 *level
= PG_LEVEL_1G
;
349 if (pud_large(*pud
) || !pud_present(*pud
))
352 pmd
= pmd_offset(pud
, address
);
356 *level
= PG_LEVEL_2M
;
357 if (pmd_large(*pmd
) || !pmd_present(*pmd
))
360 *level
= PG_LEVEL_4K
;
362 return pte_offset_kernel(pmd
, address
);
366 * Lookup the page table entry for a virtual address. Return a pointer
367 * to the entry and the level of the mapping.
369 * Note: We return pud and pmd either when the entry is marked large
370 * or when the present bit is not set. Otherwise we would return a
371 * pointer to a nonexisting mapping.
373 pte_t
*lookup_address(unsigned long address
, unsigned int *level
)
375 return lookup_address_in_pgd(pgd_offset_k(address
), address
, level
);
377 EXPORT_SYMBOL_GPL(lookup_address
);
379 static pte_t
*_lookup_address_cpa(struct cpa_data
*cpa
, unsigned long address
,
383 return lookup_address_in_pgd(cpa
->pgd
+ pgd_index(address
),
386 return lookup_address(address
, level
);
390 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
391 * or NULL if not present.
393 pmd_t
*lookup_pmd_address(unsigned long address
)
398 pgd
= pgd_offset_k(address
);
402 pud
= pud_offset(pgd
, address
);
403 if (pud_none(*pud
) || pud_large(*pud
) || !pud_present(*pud
))
406 return pmd_offset(pud
, address
);
410 * This is necessary because __pa() does not work on some
411 * kinds of memory, like vmalloc() or the alloc_remap()
412 * areas on 32-bit NUMA systems. The percpu areas can
413 * end up in this kind of memory, for instance.
415 * This could be optimized, but it is only intended to be
416 * used at inititalization time, and keeping it
417 * unoptimized should increase the testing coverage for
418 * the more obscure platforms.
420 phys_addr_t
slow_virt_to_phys(void *__virt_addr
)
422 unsigned long virt_addr
= (unsigned long)__virt_addr
;
423 phys_addr_t phys_addr
;
424 unsigned long offset
;
428 pte
= lookup_address(virt_addr
, &level
);
432 * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
433 * before being left-shifted PAGE_SHIFT bits -- this trick is to
434 * make 32-PAE kernel work correctly.
438 phys_addr
= (phys_addr_t
)pud_pfn(*(pud_t
*)pte
) << PAGE_SHIFT
;
439 offset
= virt_addr
& ~PUD_PAGE_MASK
;
442 phys_addr
= (phys_addr_t
)pmd_pfn(*(pmd_t
*)pte
) << PAGE_SHIFT
;
443 offset
= virt_addr
& ~PMD_PAGE_MASK
;
446 phys_addr
= (phys_addr_t
)pte_pfn(*pte
) << PAGE_SHIFT
;
447 offset
= virt_addr
& ~PAGE_MASK
;
450 return (phys_addr_t
)(phys_addr
| offset
);
452 EXPORT_SYMBOL_GPL(slow_virt_to_phys
);
455 * Set the new pmd in all the pgds we know about:
457 static void __set_pmd_pte(pte_t
*kpte
, unsigned long address
, pte_t pte
)
460 set_pte_atomic(kpte
, pte
);
462 if (!SHARED_KERNEL_PMD
) {
465 list_for_each_entry(page
, &pgd_list
, lru
) {
470 pgd
= (pgd_t
*)page_address(page
) + pgd_index(address
);
471 pud
= pud_offset(pgd
, address
);
472 pmd
= pmd_offset(pud
, address
);
473 set_pte_atomic((pte_t
*)pmd
, pte
);
480 try_preserve_large_page(pte_t
*kpte
, unsigned long address
,
481 struct cpa_data
*cpa
)
483 unsigned long nextpage_addr
, numpages
, pmask
, psize
, addr
, pfn
, old_pfn
;
484 pte_t new_pte
, old_pte
, *tmp
;
485 pgprot_t old_prot
, new_prot
, req_prot
;
489 if (cpa
->force_split
)
492 spin_lock(&pgd_lock
);
494 * Check for races, another CPU might have split this page
497 tmp
= _lookup_address_cpa(cpa
, address
, &level
);
503 old_prot
= pmd_pgprot(*(pmd_t
*)kpte
);
504 old_pfn
= pmd_pfn(*(pmd_t
*)kpte
);
507 old_prot
= pud_pgprot(*(pud_t
*)kpte
);
508 old_pfn
= pud_pfn(*(pud_t
*)kpte
);
515 psize
= page_level_size(level
);
516 pmask
= page_level_mask(level
);
519 * Calculate the number of pages, which fit into this large
520 * page starting at address:
522 nextpage_addr
= (address
+ psize
) & pmask
;
523 numpages
= (nextpage_addr
- address
) >> PAGE_SHIFT
;
524 if (numpages
< cpa
->numpages
)
525 cpa
->numpages
= numpages
;
528 * We are safe now. Check whether the new pgprot is the same:
529 * Convert protection attributes to 4k-format, as cpa->mask* are set
533 req_prot
= pgprot_large_2_4k(old_prot
);
535 pgprot_val(req_prot
) &= ~pgprot_val(cpa
->mask_clr
);
536 pgprot_val(req_prot
) |= pgprot_val(cpa
->mask_set
);
539 * req_prot is in format of 4k pages. It must be converted to large
540 * page format: the caching mode includes the PAT bit located at
541 * different bit positions in the two formats.
543 req_prot
= pgprot_4k_2_large(req_prot
);
546 * Set the PSE and GLOBAL flags only if the PRESENT flag is
547 * set otherwise pmd_present/pmd_huge will return true even on
548 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
549 * for the ancient hardware that doesn't support it.
551 if (pgprot_val(req_prot
) & _PAGE_PRESENT
)
552 pgprot_val(req_prot
) |= _PAGE_PSE
| _PAGE_GLOBAL
;
554 pgprot_val(req_prot
) &= ~(_PAGE_PSE
| _PAGE_GLOBAL
);
556 req_prot
= canon_pgprot(req_prot
);
559 * old_pfn points to the large page base pfn. So we need
560 * to add the offset of the virtual address:
562 pfn
= old_pfn
+ ((address
& (psize
- 1)) >> PAGE_SHIFT
);
565 new_prot
= static_protections(req_prot
, address
, pfn
);
568 * We need to check the full range, whether
569 * static_protection() requires a different pgprot for one of
570 * the pages in the range we try to preserve:
572 addr
= address
& pmask
;
574 for (i
= 0; i
< (psize
>> PAGE_SHIFT
); i
++, addr
+= PAGE_SIZE
, pfn
++) {
575 pgprot_t chk_prot
= static_protections(req_prot
, addr
, pfn
);
577 if (pgprot_val(chk_prot
) != pgprot_val(new_prot
))
582 * If there are no changes, return. maxpages has been updated
585 if (pgprot_val(new_prot
) == pgprot_val(old_prot
)) {
591 * We need to change the attributes. Check, whether we can
592 * change the large page in one go. We request a split, when
593 * the address is not aligned and the number of pages is
594 * smaller than the number of pages in the large page. Note
595 * that we limited the number of possible pages already to
596 * the number of pages in the large page.
598 if (address
== (address
& pmask
) && cpa
->numpages
== (psize
>> PAGE_SHIFT
)) {
600 * The address is aligned and the number of pages
601 * covers the full page.
603 new_pte
= pfn_pte(old_pfn
, new_prot
);
604 __set_pmd_pte(kpte
, address
, new_pte
);
605 cpa
->flags
|= CPA_FLUSHTLB
;
610 spin_unlock(&pgd_lock
);
616 __split_large_page(struct cpa_data
*cpa
, pte_t
*kpte
, unsigned long address
,
619 pte_t
*pbase
= (pte_t
*)page_address(base
);
620 unsigned long ref_pfn
, pfn
, pfninc
= 1;
621 unsigned int i
, level
;
625 spin_lock(&pgd_lock
);
627 * Check for races, another CPU might have split this page
630 tmp
= _lookup_address_cpa(cpa
, address
, &level
);
632 spin_unlock(&pgd_lock
);
636 paravirt_alloc_pte(&init_mm
, page_to_pfn(base
));
640 ref_prot
= pmd_pgprot(*(pmd_t
*)kpte
);
641 /* clear PSE and promote PAT bit to correct position */
642 ref_prot
= pgprot_large_2_4k(ref_prot
);
643 ref_pfn
= pmd_pfn(*(pmd_t
*)kpte
);
647 ref_prot
= pud_pgprot(*(pud_t
*)kpte
);
648 ref_pfn
= pud_pfn(*(pud_t
*)kpte
);
649 pfninc
= PMD_PAGE_SIZE
>> PAGE_SHIFT
;
652 * Clear the PSE flags if the PRESENT flag is not set
653 * otherwise pmd_present/pmd_huge will return true
654 * even on a non present pmd.
656 if (!(pgprot_val(ref_prot
) & _PAGE_PRESENT
))
657 pgprot_val(ref_prot
) &= ~_PAGE_PSE
;
661 spin_unlock(&pgd_lock
);
666 * Set the GLOBAL flags only if the PRESENT flag is set
667 * otherwise pmd/pte_present will return true even on a non
668 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
669 * for the ancient hardware that doesn't support it.
671 if (pgprot_val(ref_prot
) & _PAGE_PRESENT
)
672 pgprot_val(ref_prot
) |= _PAGE_GLOBAL
;
674 pgprot_val(ref_prot
) &= ~_PAGE_GLOBAL
;
677 * Get the target pfn from the original entry:
680 for (i
= 0; i
< PTRS_PER_PTE
; i
++, pfn
+= pfninc
)
681 set_pte(&pbase
[i
], pfn_pte(pfn
, canon_pgprot(ref_prot
)));
683 if (virt_addr_valid(address
)) {
684 unsigned long pfn
= PFN_DOWN(__pa(address
));
686 if (pfn_range_is_mapped(pfn
, pfn
+ 1))
687 split_page_count(level
);
691 * Install the new, split up pagetable.
693 * We use the standard kernel pagetable protections for the new
694 * pagetable protections, the actual ptes set above control the
695 * primary protection behavior:
697 __set_pmd_pte(kpte
, address
, mk_pte(base
, __pgprot(_KERNPG_TABLE
)));
700 * Intel Atom errata AAH41 workaround.
702 * The real fix should be in hw or in a microcode update, but
703 * we also probabilistically try to reduce the window of having
704 * a large TLB mixed with 4K TLBs while instruction fetches are
708 spin_unlock(&pgd_lock
);
713 static int split_large_page(struct cpa_data
*cpa
, pte_t
*kpte
,
714 unsigned long address
)
718 if (!debug_pagealloc_enabled())
719 spin_unlock(&cpa_lock
);
720 base
= alloc_pages(GFP_KERNEL
| __GFP_NOTRACK
, 0);
721 if (!debug_pagealloc_enabled())
722 spin_lock(&cpa_lock
);
726 if (__split_large_page(cpa
, kpte
, address
, base
))
732 static bool try_to_free_pte_page(pte_t
*pte
)
736 for (i
= 0; i
< PTRS_PER_PTE
; i
++)
737 if (!pte_none(pte
[i
]))
740 free_page((unsigned long)pte
);
744 static bool try_to_free_pmd_page(pmd_t
*pmd
)
748 for (i
= 0; i
< PTRS_PER_PMD
; i
++)
749 if (!pmd_none(pmd
[i
]))
752 free_page((unsigned long)pmd
);
756 static bool unmap_pte_range(pmd_t
*pmd
, unsigned long start
, unsigned long end
)
758 pte_t
*pte
= pte_offset_kernel(pmd
, start
);
760 while (start
< end
) {
761 set_pte(pte
, __pte(0));
767 if (try_to_free_pte_page((pte_t
*)pmd_page_vaddr(*pmd
))) {
774 static void __unmap_pmd_range(pud_t
*pud
, pmd_t
*pmd
,
775 unsigned long start
, unsigned long end
)
777 if (unmap_pte_range(pmd
, start
, end
))
778 if (try_to_free_pmd_page((pmd_t
*)pud_page_vaddr(*pud
)))
782 static void unmap_pmd_range(pud_t
*pud
, unsigned long start
, unsigned long end
)
784 pmd_t
*pmd
= pmd_offset(pud
, start
);
787 * Not on a 2MB page boundary?
789 if (start
& (PMD_SIZE
- 1)) {
790 unsigned long next_page
= (start
+ PMD_SIZE
) & PMD_MASK
;
791 unsigned long pre_end
= min_t(unsigned long, end
, next_page
);
793 __unmap_pmd_range(pud
, pmd
, start
, pre_end
);
800 * Try to unmap in 2M chunks.
802 while (end
- start
>= PMD_SIZE
) {
806 __unmap_pmd_range(pud
, pmd
, start
, start
+ PMD_SIZE
);
816 return __unmap_pmd_range(pud
, pmd
, start
, end
);
819 * Try again to free the PMD page if haven't succeeded above.
822 if (try_to_free_pmd_page((pmd_t
*)pud_page_vaddr(*pud
)))
826 static void unmap_pud_range(pgd_t
*pgd
, unsigned long start
, unsigned long end
)
828 pud_t
*pud
= pud_offset(pgd
, start
);
831 * Not on a GB page boundary?
833 if (start
& (PUD_SIZE
- 1)) {
834 unsigned long next_page
= (start
+ PUD_SIZE
) & PUD_MASK
;
835 unsigned long pre_end
= min_t(unsigned long, end
, next_page
);
837 unmap_pmd_range(pud
, start
, pre_end
);
844 * Try to unmap in 1G chunks?
846 while (end
- start
>= PUD_SIZE
) {
851 unmap_pmd_range(pud
, start
, start
+ PUD_SIZE
);
861 unmap_pmd_range(pud
, start
, end
);
864 * No need to try to free the PUD page because we'll free it in
865 * populate_pgd's error path
869 static int alloc_pte_page(pmd_t
*pmd
)
871 pte_t
*pte
= (pte_t
*)get_zeroed_page(GFP_KERNEL
| __GFP_NOTRACK
);
875 set_pmd(pmd
, __pmd(__pa(pte
) | _KERNPG_TABLE
));
879 static int alloc_pmd_page(pud_t
*pud
)
881 pmd_t
*pmd
= (pmd_t
*)get_zeroed_page(GFP_KERNEL
| __GFP_NOTRACK
);
885 set_pud(pud
, __pud(__pa(pmd
) | _KERNPG_TABLE
));
889 static void populate_pte(struct cpa_data
*cpa
,
890 unsigned long start
, unsigned long end
,
891 unsigned num_pages
, pmd_t
*pmd
, pgprot_t pgprot
)
895 pte
= pte_offset_kernel(pmd
, start
);
898 * Set the GLOBAL flags only if the PRESENT flag is
899 * set otherwise pte_present will return true even on
900 * a non present pte. The canon_pgprot will clear
901 * _PAGE_GLOBAL for the ancient hardware that doesn't
904 if (pgprot_val(pgprot
) & _PAGE_PRESENT
)
905 pgprot_val(pgprot
) |= _PAGE_GLOBAL
;
907 pgprot_val(pgprot
) &= ~_PAGE_GLOBAL
;
909 pgprot
= canon_pgprot(pgprot
);
911 while (num_pages
-- && start
< end
) {
912 set_pte(pte
, pfn_pte(cpa
->pfn
, pgprot
));
920 static int populate_pmd(struct cpa_data
*cpa
,
921 unsigned long start
, unsigned long end
,
922 unsigned num_pages
, pud_t
*pud
, pgprot_t pgprot
)
924 unsigned int cur_pages
= 0;
929 * Not on a 2M boundary?
931 if (start
& (PMD_SIZE
- 1)) {
932 unsigned long pre_end
= start
+ (num_pages
<< PAGE_SHIFT
);
933 unsigned long next_page
= (start
+ PMD_SIZE
) & PMD_MASK
;
935 pre_end
= min_t(unsigned long, pre_end
, next_page
);
936 cur_pages
= (pre_end
- start
) >> PAGE_SHIFT
;
937 cur_pages
= min_t(unsigned int, num_pages
, cur_pages
);
942 pmd
= pmd_offset(pud
, start
);
944 if (alloc_pte_page(pmd
))
947 populate_pte(cpa
, start
, pre_end
, cur_pages
, pmd
, pgprot
);
953 * We mapped them all?
955 if (num_pages
== cur_pages
)
958 pmd_pgprot
= pgprot_4k_2_large(pgprot
);
960 while (end
- start
>= PMD_SIZE
) {
963 * We cannot use a 1G page so allocate a PMD page if needed.
966 if (alloc_pmd_page(pud
))
969 pmd
= pmd_offset(pud
, start
);
971 set_pmd(pmd
, __pmd(cpa
->pfn
<< PAGE_SHIFT
| _PAGE_PSE
|
972 massage_pgprot(pmd_pgprot
)));
975 cpa
->pfn
+= PMD_SIZE
>> PAGE_SHIFT
;
976 cur_pages
+= PMD_SIZE
>> PAGE_SHIFT
;
980 * Map trailing 4K pages.
983 pmd
= pmd_offset(pud
, start
);
985 if (alloc_pte_page(pmd
))
988 populate_pte(cpa
, start
, end
, num_pages
- cur_pages
,
994 static int populate_pud(struct cpa_data
*cpa
, unsigned long start
, pgd_t
*pgd
,
1000 pgprot_t pud_pgprot
;
1002 end
= start
+ (cpa
->numpages
<< PAGE_SHIFT
);
1005 * Not on a Gb page boundary? => map everything up to it with
1008 if (start
& (PUD_SIZE
- 1)) {
1009 unsigned long pre_end
;
1010 unsigned long next_page
= (start
+ PUD_SIZE
) & PUD_MASK
;
1012 pre_end
= min_t(unsigned long, end
, next_page
);
1013 cur_pages
= (pre_end
- start
) >> PAGE_SHIFT
;
1014 cur_pages
= min_t(int, (int)cpa
->numpages
, cur_pages
);
1016 pud
= pud_offset(pgd
, start
);
1022 if (alloc_pmd_page(pud
))
1025 cur_pages
= populate_pmd(cpa
, start
, pre_end
, cur_pages
,
1033 /* We mapped them all? */
1034 if (cpa
->numpages
== cur_pages
)
1037 pud
= pud_offset(pgd
, start
);
1038 pud_pgprot
= pgprot_4k_2_large(pgprot
);
1041 * Map everything starting from the Gb boundary, possibly with 1G pages
1043 while (boot_cpu_has(X86_FEATURE_GBPAGES
) && end
- start
>= PUD_SIZE
) {
1044 set_pud(pud
, __pud(cpa
->pfn
<< PAGE_SHIFT
| _PAGE_PSE
|
1045 massage_pgprot(pud_pgprot
)));
1048 cpa
->pfn
+= PUD_SIZE
>> PAGE_SHIFT
;
1049 cur_pages
+= PUD_SIZE
>> PAGE_SHIFT
;
1053 /* Map trailing leftover */
1057 pud
= pud_offset(pgd
, start
);
1059 if (alloc_pmd_page(pud
))
1062 tmp
= populate_pmd(cpa
, start
, end
, cpa
->numpages
- cur_pages
,
1073 * Restrictions for kernel page table do not necessarily apply when mapping in
1076 static int populate_pgd(struct cpa_data
*cpa
, unsigned long addr
)
1078 pgprot_t pgprot
= __pgprot(_KERNPG_TABLE
);
1079 pud_t
*pud
= NULL
; /* shut up gcc */
1083 pgd_entry
= cpa
->pgd
+ pgd_index(addr
);
1086 * Allocate a PUD page and hand it down for mapping.
1088 if (pgd_none(*pgd_entry
)) {
1089 pud
= (pud_t
*)get_zeroed_page(GFP_KERNEL
| __GFP_NOTRACK
);
1093 set_pgd(pgd_entry
, __pgd(__pa(pud
) | _KERNPG_TABLE
));
1096 pgprot_val(pgprot
) &= ~pgprot_val(cpa
->mask_clr
);
1097 pgprot_val(pgprot
) |= pgprot_val(cpa
->mask_set
);
1099 ret
= populate_pud(cpa
, addr
, pgd_entry
, pgprot
);
1102 * Leave the PUD page in place in case some other CPU or thread
1103 * already found it, but remove any useless entries we just
1106 unmap_pud_range(pgd_entry
, addr
,
1107 addr
+ (cpa
->numpages
<< PAGE_SHIFT
));
1111 cpa
->numpages
= ret
;
1115 static int __cpa_process_fault(struct cpa_data
*cpa
, unsigned long vaddr
,
1120 * Right now, we only execute this code path when mapping
1121 * the EFI virtual memory map regions, no other users
1122 * provide a ->pgd value. This may change in the future.
1124 return populate_pgd(cpa
, vaddr
);
1128 * Ignore all non primary paths.
1136 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1138 * Also set numpages to '1' indicating that we processed cpa req for
1139 * one virtual address page and its pfn. TBD: numpages can be set based
1140 * on the initial value and the level returned by lookup_address().
1142 if (within(vaddr
, PAGE_OFFSET
,
1143 PAGE_OFFSET
+ (max_pfn_mapped
<< PAGE_SHIFT
))) {
1145 cpa
->pfn
= __pa(vaddr
) >> PAGE_SHIFT
;
1148 WARN(1, KERN_WARNING
"CPA: called for zero pte. "
1149 "vaddr = %lx cpa->vaddr = %lx\n", vaddr
,
1156 static int __change_page_attr(struct cpa_data
*cpa
, int primary
)
1158 unsigned long address
;
1161 pte_t
*kpte
, old_pte
;
1163 if (cpa
->flags
& CPA_PAGES_ARRAY
) {
1164 struct page
*page
= cpa
->pages
[cpa
->curpage
];
1165 if (unlikely(PageHighMem(page
)))
1167 address
= (unsigned long)page_address(page
);
1168 } else if (cpa
->flags
& CPA_ARRAY
)
1169 address
= cpa
->vaddr
[cpa
->curpage
];
1171 address
= *cpa
->vaddr
;
1173 kpte
= _lookup_address_cpa(cpa
, address
, &level
);
1175 return __cpa_process_fault(cpa
, address
, primary
);
1178 if (pte_none(old_pte
))
1179 return __cpa_process_fault(cpa
, address
, primary
);
1181 if (level
== PG_LEVEL_4K
) {
1183 pgprot_t new_prot
= pte_pgprot(old_pte
);
1184 unsigned long pfn
= pte_pfn(old_pte
);
1186 pgprot_val(new_prot
) &= ~pgprot_val(cpa
->mask_clr
);
1187 pgprot_val(new_prot
) |= pgprot_val(cpa
->mask_set
);
1189 new_prot
= static_protections(new_prot
, address
, pfn
);
1192 * Set the GLOBAL flags only if the PRESENT flag is
1193 * set otherwise pte_present will return true even on
1194 * a non present pte. The canon_pgprot will clear
1195 * _PAGE_GLOBAL for the ancient hardware that doesn't
1198 if (pgprot_val(new_prot
) & _PAGE_PRESENT
)
1199 pgprot_val(new_prot
) |= _PAGE_GLOBAL
;
1201 pgprot_val(new_prot
) &= ~_PAGE_GLOBAL
;
1204 * We need to keep the pfn from the existing PTE,
1205 * after all we're only going to change it's attributes
1206 * not the memory it points to
1208 new_pte
= pfn_pte(pfn
, canon_pgprot(new_prot
));
1211 * Do we really change anything ?
1213 if (pte_val(old_pte
) != pte_val(new_pte
)) {
1214 set_pte_atomic(kpte
, new_pte
);
1215 cpa
->flags
|= CPA_FLUSHTLB
;
1222 * Check, whether we can keep the large page intact
1223 * and just change the pte:
1225 do_split
= try_preserve_large_page(kpte
, address
, cpa
);
1227 * When the range fits into the existing large page,
1228 * return. cp->numpages and cpa->tlbflush have been updated in
1235 * We have to split the large page:
1237 err
= split_large_page(cpa
, kpte
, address
);
1240 * Do a global flush tlb after splitting the large page
1241 * and before we do the actual change page attribute in the PTE.
1243 * With out this, we violate the TLB application note, that says
1244 * "The TLBs may contain both ordinary and large-page
1245 * translations for a 4-KByte range of linear addresses. This
1246 * may occur if software modifies the paging structures so that
1247 * the page size used for the address range changes. If the two
1248 * translations differ with respect to page frame or attributes
1249 * (e.g., permissions), processor behavior is undefined and may
1250 * be implementation-specific."
1252 * We do this global tlb flush inside the cpa_lock, so that we
1253 * don't allow any other cpu, with stale tlb entries change the
1254 * page attribute in parallel, that also falls into the
1255 * just split large page entry.
1264 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
);
1266 static int cpa_process_alias(struct cpa_data
*cpa
)
1268 struct cpa_data alias_cpa
;
1269 unsigned long laddr
= (unsigned long)__va(cpa
->pfn
<< PAGE_SHIFT
);
1270 unsigned long vaddr
;
1273 if (!pfn_range_is_mapped(cpa
->pfn
, cpa
->pfn
+ 1))
1277 * No need to redo, when the primary call touched the direct
1280 if (cpa
->flags
& CPA_PAGES_ARRAY
) {
1281 struct page
*page
= cpa
->pages
[cpa
->curpage
];
1282 if (unlikely(PageHighMem(page
)))
1284 vaddr
= (unsigned long)page_address(page
);
1285 } else if (cpa
->flags
& CPA_ARRAY
)
1286 vaddr
= cpa
->vaddr
[cpa
->curpage
];
1288 vaddr
= *cpa
->vaddr
;
1290 if (!(within(vaddr
, PAGE_OFFSET
,
1291 PAGE_OFFSET
+ (max_pfn_mapped
<< PAGE_SHIFT
)))) {
1294 alias_cpa
.vaddr
= &laddr
;
1295 alias_cpa
.flags
&= ~(CPA_PAGES_ARRAY
| CPA_ARRAY
);
1297 ret
= __change_page_attr_set_clr(&alias_cpa
, 0);
1302 #ifdef CONFIG_X86_64
1304 * If the primary call didn't touch the high mapping already
1305 * and the physical address is inside the kernel map, we need
1306 * to touch the high mapped kernel as well:
1308 if (!within(vaddr
, (unsigned long)_text
, _brk_end
) &&
1309 within_inclusive(cpa
->pfn
, highmap_start_pfn(),
1310 highmap_end_pfn())) {
1311 unsigned long temp_cpa_vaddr
= (cpa
->pfn
<< PAGE_SHIFT
) +
1312 __START_KERNEL_map
- phys_base
;
1314 alias_cpa
.vaddr
= &temp_cpa_vaddr
;
1315 alias_cpa
.flags
&= ~(CPA_PAGES_ARRAY
| CPA_ARRAY
);
1318 * The high mapping range is imprecise, so ignore the
1321 __change_page_attr_set_clr(&alias_cpa
, 0);
1328 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
)
1330 int ret
, numpages
= cpa
->numpages
;
1334 * Store the remaining nr of pages for the large page
1335 * preservation check.
1337 cpa
->numpages
= numpages
;
1338 /* for array changes, we can't use large page */
1339 if (cpa
->flags
& (CPA_ARRAY
| CPA_PAGES_ARRAY
))
1342 if (!debug_pagealloc_enabled())
1343 spin_lock(&cpa_lock
);
1344 ret
= __change_page_attr(cpa
, checkalias
);
1345 if (!debug_pagealloc_enabled())
1346 spin_unlock(&cpa_lock
);
1351 ret
= cpa_process_alias(cpa
);
1357 * Adjust the number of pages with the result of the
1358 * CPA operation. Either a large page has been
1359 * preserved or a single page update happened.
1361 BUG_ON(cpa
->numpages
> numpages
|| !cpa
->numpages
);
1362 numpages
-= cpa
->numpages
;
1363 if (cpa
->flags
& (CPA_PAGES_ARRAY
| CPA_ARRAY
))
1366 *cpa
->vaddr
+= cpa
->numpages
* PAGE_SIZE
;
1372 static int change_page_attr_set_clr(unsigned long *addr
, int numpages
,
1373 pgprot_t mask_set
, pgprot_t mask_clr
,
1374 int force_split
, int in_flag
,
1375 struct page
**pages
)
1377 struct cpa_data cpa
;
1378 int ret
, cache
, checkalias
;
1379 unsigned long baddr
= 0;
1381 memset(&cpa
, 0, sizeof(cpa
));
1384 * Check, if we are requested to change a not supported
1387 mask_set
= canon_pgprot(mask_set
);
1388 mask_clr
= canon_pgprot(mask_clr
);
1389 if (!pgprot_val(mask_set
) && !pgprot_val(mask_clr
) && !force_split
)
1392 /* Ensure we are PAGE_SIZE aligned */
1393 if (in_flag
& CPA_ARRAY
) {
1395 for (i
= 0; i
< numpages
; i
++) {
1396 if (addr
[i
] & ~PAGE_MASK
) {
1397 addr
[i
] &= PAGE_MASK
;
1401 } else if (!(in_flag
& CPA_PAGES_ARRAY
)) {
1403 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1404 * No need to cehck in that case
1406 if (*addr
& ~PAGE_MASK
) {
1409 * People should not be passing in unaligned addresses:
1414 * Save address for cache flush. *addr is modified in the call
1415 * to __change_page_attr_set_clr() below.
1420 /* Must avoid aliasing mappings in the highmem code */
1421 kmap_flush_unused();
1427 cpa
.numpages
= numpages
;
1428 cpa
.mask_set
= mask_set
;
1429 cpa
.mask_clr
= mask_clr
;
1432 cpa
.force_split
= force_split
;
1434 if (in_flag
& (CPA_ARRAY
| CPA_PAGES_ARRAY
))
1435 cpa
.flags
|= in_flag
;
1437 /* No alias checking for _NX bit modifications */
1438 checkalias
= (pgprot_val(mask_set
) | pgprot_val(mask_clr
)) != _PAGE_NX
;
1440 ret
= __change_page_attr_set_clr(&cpa
, checkalias
);
1443 * Check whether we really changed something:
1445 if (!(cpa
.flags
& CPA_FLUSHTLB
))
1449 * No need to flush, when we did not set any of the caching
1452 cache
= !!pgprot2cachemode(mask_set
);
1455 * On success we use CLFLUSH, when the CPU supports it to
1456 * avoid the WBINVD. If the CPU does not support it and in the
1457 * error case we fall back to cpa_flush_all (which uses
1460 if (!ret
&& boot_cpu_has(X86_FEATURE_CLFLUSH
)) {
1461 if (cpa
.flags
& (CPA_PAGES_ARRAY
| CPA_ARRAY
)) {
1462 cpa_flush_array(addr
, numpages
, cache
,
1465 cpa_flush_range(baddr
, numpages
, cache
);
1467 cpa_flush_all(cache
);
1473 static inline int change_page_attr_set(unsigned long *addr
, int numpages
,
1474 pgprot_t mask
, int array
)
1476 return change_page_attr_set_clr(addr
, numpages
, mask
, __pgprot(0), 0,
1477 (array
? CPA_ARRAY
: 0), NULL
);
1480 static inline int change_page_attr_clear(unsigned long *addr
, int numpages
,
1481 pgprot_t mask
, int array
)
1483 return change_page_attr_set_clr(addr
, numpages
, __pgprot(0), mask
, 0,
1484 (array
? CPA_ARRAY
: 0), NULL
);
1487 static inline int cpa_set_pages_array(struct page
**pages
, int numpages
,
1490 return change_page_attr_set_clr(NULL
, numpages
, mask
, __pgprot(0), 0,
1491 CPA_PAGES_ARRAY
, pages
);
1494 static inline int cpa_clear_pages_array(struct page
**pages
, int numpages
,
1497 return change_page_attr_set_clr(NULL
, numpages
, __pgprot(0), mask
, 0,
1498 CPA_PAGES_ARRAY
, pages
);
1501 int _set_memory_uc(unsigned long addr
, int numpages
)
1504 * for now UC MINUS. see comments in ioremap_nocache()
1505 * If you really need strong UC use ioremap_uc(), but note
1506 * that you cannot override IO areas with set_memory_*() as
1507 * these helpers cannot work with IO memory.
1509 return change_page_attr_set(&addr
, numpages
,
1510 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS
),
1514 int set_memory_uc(unsigned long addr
, int numpages
)
1519 * for now UC MINUS. see comments in ioremap_nocache()
1521 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
1522 _PAGE_CACHE_MODE_UC_MINUS
, NULL
);
1526 ret
= _set_memory_uc(addr
, numpages
);
1533 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1537 EXPORT_SYMBOL(set_memory_uc
);
1539 static int _set_memory_array(unsigned long *addr
, int addrinarray
,
1540 enum page_cache_mode new_type
)
1542 enum page_cache_mode set_type
;
1546 for (i
= 0; i
< addrinarray
; i
++) {
1547 ret
= reserve_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
,
1553 /* If WC, set to UC- first and then WC */
1554 set_type
= (new_type
== _PAGE_CACHE_MODE_WC
) ?
1555 _PAGE_CACHE_MODE_UC_MINUS
: new_type
;
1557 ret
= change_page_attr_set(addr
, addrinarray
,
1558 cachemode2pgprot(set_type
), 1);
1560 if (!ret
&& new_type
== _PAGE_CACHE_MODE_WC
)
1561 ret
= change_page_attr_set_clr(addr
, addrinarray
,
1563 _PAGE_CACHE_MODE_WC
),
1564 __pgprot(_PAGE_CACHE_MASK
),
1565 0, CPA_ARRAY
, NULL
);
1572 for (j
= 0; j
< i
; j
++)
1573 free_memtype(__pa(addr
[j
]), __pa(addr
[j
]) + PAGE_SIZE
);
1578 int set_memory_array_uc(unsigned long *addr
, int addrinarray
)
1580 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_MODE_UC_MINUS
);
1582 EXPORT_SYMBOL(set_memory_array_uc
);
1584 int set_memory_array_wc(unsigned long *addr
, int addrinarray
)
1586 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_MODE_WC
);
1588 EXPORT_SYMBOL(set_memory_array_wc
);
1590 int set_memory_array_wt(unsigned long *addr
, int addrinarray
)
1592 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_MODE_WT
);
1594 EXPORT_SYMBOL_GPL(set_memory_array_wt
);
1596 int _set_memory_wc(unsigned long addr
, int numpages
)
1599 unsigned long addr_copy
= addr
;
1601 ret
= change_page_attr_set(&addr
, numpages
,
1602 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS
),
1605 ret
= change_page_attr_set_clr(&addr_copy
, numpages
,
1607 _PAGE_CACHE_MODE_WC
),
1608 __pgprot(_PAGE_CACHE_MASK
),
1614 int set_memory_wc(unsigned long addr
, int numpages
)
1618 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
1619 _PAGE_CACHE_MODE_WC
, NULL
);
1623 ret
= _set_memory_wc(addr
, numpages
);
1625 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1629 EXPORT_SYMBOL(set_memory_wc
);
1631 int _set_memory_wt(unsigned long addr
, int numpages
)
1633 return change_page_attr_set(&addr
, numpages
,
1634 cachemode2pgprot(_PAGE_CACHE_MODE_WT
), 0);
1637 int set_memory_wt(unsigned long addr
, int numpages
)
1641 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
1642 _PAGE_CACHE_MODE_WT
, NULL
);
1646 ret
= _set_memory_wt(addr
, numpages
);
1648 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1652 EXPORT_SYMBOL_GPL(set_memory_wt
);
1654 int _set_memory_wb(unsigned long addr
, int numpages
)
1656 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1657 return change_page_attr_clear(&addr
, numpages
,
1658 __pgprot(_PAGE_CACHE_MASK
), 0);
1661 int set_memory_wb(unsigned long addr
, int numpages
)
1665 ret
= _set_memory_wb(addr
, numpages
);
1669 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1672 EXPORT_SYMBOL(set_memory_wb
);
1674 int set_memory_array_wb(unsigned long *addr
, int addrinarray
)
1679 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1680 ret
= change_page_attr_clear(addr
, addrinarray
,
1681 __pgprot(_PAGE_CACHE_MASK
), 1);
1685 for (i
= 0; i
< addrinarray
; i
++)
1686 free_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
);
1690 EXPORT_SYMBOL(set_memory_array_wb
);
1692 int set_memory_x(unsigned long addr
, int numpages
)
1694 if (!(__supported_pte_mask
& _PAGE_NX
))
1697 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_NX
), 0);
1699 EXPORT_SYMBOL(set_memory_x
);
1701 int set_memory_nx(unsigned long addr
, int numpages
)
1703 if (!(__supported_pte_mask
& _PAGE_NX
))
1706 return change_page_attr_set(&addr
, numpages
, __pgprot(_PAGE_NX
), 0);
1708 EXPORT_SYMBOL(set_memory_nx
);
1710 int set_memory_ro(unsigned long addr
, int numpages
)
1712 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_RW
), 0);
1715 int set_memory_rw(unsigned long addr
, int numpages
)
1717 return change_page_attr_set(&addr
, numpages
, __pgprot(_PAGE_RW
), 0);
1720 int set_memory_np(unsigned long addr
, int numpages
)
1722 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_PRESENT
), 0);
1725 int set_memory_4k(unsigned long addr
, int numpages
)
1727 return change_page_attr_set_clr(&addr
, numpages
, __pgprot(0),
1728 __pgprot(0), 1, 0, NULL
);
1731 int set_pages_uc(struct page
*page
, int numpages
)
1733 unsigned long addr
= (unsigned long)page_address(page
);
1735 return set_memory_uc(addr
, numpages
);
1737 EXPORT_SYMBOL(set_pages_uc
);
1739 static int _set_pages_array(struct page
**pages
, int addrinarray
,
1740 enum page_cache_mode new_type
)
1742 unsigned long start
;
1744 enum page_cache_mode set_type
;
1749 for (i
= 0; i
< addrinarray
; i
++) {
1750 if (PageHighMem(pages
[i
]))
1752 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
1753 end
= start
+ PAGE_SIZE
;
1754 if (reserve_memtype(start
, end
, new_type
, NULL
))
1758 /* If WC, set to UC- first and then WC */
1759 set_type
= (new_type
== _PAGE_CACHE_MODE_WC
) ?
1760 _PAGE_CACHE_MODE_UC_MINUS
: new_type
;
1762 ret
= cpa_set_pages_array(pages
, addrinarray
,
1763 cachemode2pgprot(set_type
));
1764 if (!ret
&& new_type
== _PAGE_CACHE_MODE_WC
)
1765 ret
= change_page_attr_set_clr(NULL
, addrinarray
,
1767 _PAGE_CACHE_MODE_WC
),
1768 __pgprot(_PAGE_CACHE_MASK
),
1769 0, CPA_PAGES_ARRAY
, pages
);
1772 return 0; /* Success */
1775 for (i
= 0; i
< free_idx
; i
++) {
1776 if (PageHighMem(pages
[i
]))
1778 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
1779 end
= start
+ PAGE_SIZE
;
1780 free_memtype(start
, end
);
1785 int set_pages_array_uc(struct page
**pages
, int addrinarray
)
1787 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_MODE_UC_MINUS
);
1789 EXPORT_SYMBOL(set_pages_array_uc
);
1791 int set_pages_array_wc(struct page
**pages
, int addrinarray
)
1793 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_MODE_WC
);
1795 EXPORT_SYMBOL(set_pages_array_wc
);
1797 int set_pages_array_wt(struct page
**pages
, int addrinarray
)
1799 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_MODE_WT
);
1801 EXPORT_SYMBOL_GPL(set_pages_array_wt
);
1803 int set_pages_wb(struct page
*page
, int numpages
)
1805 unsigned long addr
= (unsigned long)page_address(page
);
1807 return set_memory_wb(addr
, numpages
);
1809 EXPORT_SYMBOL(set_pages_wb
);
1811 int set_pages_array_wb(struct page
**pages
, int addrinarray
)
1814 unsigned long start
;
1818 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1819 retval
= cpa_clear_pages_array(pages
, addrinarray
,
1820 __pgprot(_PAGE_CACHE_MASK
));
1824 for (i
= 0; i
< addrinarray
; i
++) {
1825 if (PageHighMem(pages
[i
]))
1827 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
1828 end
= start
+ PAGE_SIZE
;
1829 free_memtype(start
, end
);
1834 EXPORT_SYMBOL(set_pages_array_wb
);
1836 int set_pages_x(struct page
*page
, int numpages
)
1838 unsigned long addr
= (unsigned long)page_address(page
);
1840 return set_memory_x(addr
, numpages
);
1842 EXPORT_SYMBOL(set_pages_x
);
1844 int set_pages_nx(struct page
*page
, int numpages
)
1846 unsigned long addr
= (unsigned long)page_address(page
);
1848 return set_memory_nx(addr
, numpages
);
1850 EXPORT_SYMBOL(set_pages_nx
);
1852 int set_pages_ro(struct page
*page
, int numpages
)
1854 unsigned long addr
= (unsigned long)page_address(page
);
1856 return set_memory_ro(addr
, numpages
);
1859 int set_pages_rw(struct page
*page
, int numpages
)
1861 unsigned long addr
= (unsigned long)page_address(page
);
1863 return set_memory_rw(addr
, numpages
);
1866 #ifdef CONFIG_DEBUG_PAGEALLOC
1868 static int __set_pages_p(struct page
*page
, int numpages
)
1870 unsigned long tempaddr
= (unsigned long) page_address(page
);
1871 struct cpa_data cpa
= { .vaddr
= &tempaddr
,
1873 .numpages
= numpages
,
1874 .mask_set
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
1875 .mask_clr
= __pgprot(0),
1879 * No alias checking needed for setting present flag. otherwise,
1880 * we may need to break large pages for 64-bit kernel text
1881 * mappings (this adds to complexity if we want to do this from
1882 * atomic context especially). Let's keep it simple!
1884 return __change_page_attr_set_clr(&cpa
, 0);
1887 static int __set_pages_np(struct page
*page
, int numpages
)
1889 unsigned long tempaddr
= (unsigned long) page_address(page
);
1890 struct cpa_data cpa
= { .vaddr
= &tempaddr
,
1892 .numpages
= numpages
,
1893 .mask_set
= __pgprot(0),
1894 .mask_clr
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
1898 * No alias checking needed for setting not present flag. otherwise,
1899 * we may need to break large pages for 64-bit kernel text
1900 * mappings (this adds to complexity if we want to do this from
1901 * atomic context especially). Let's keep it simple!
1903 return __change_page_attr_set_clr(&cpa
, 0);
1906 void __kernel_map_pages(struct page
*page
, int numpages
, int enable
)
1908 if (PageHighMem(page
))
1911 debug_check_no_locks_freed(page_address(page
),
1912 numpages
* PAGE_SIZE
);
1916 * The return value is ignored as the calls cannot fail.
1917 * Large pages for identity mappings are not used at boot time
1918 * and hence no memory allocations during large page split.
1921 __set_pages_p(page
, numpages
);
1923 __set_pages_np(page
, numpages
);
1926 * We should perform an IPI and flush all tlbs,
1927 * but that can deadlock->flush only current cpu:
1931 arch_flush_lazy_mmu_mode();
1934 #ifdef CONFIG_HIBERNATION
1936 bool kernel_page_present(struct page
*page
)
1941 if (PageHighMem(page
))
1944 pte
= lookup_address((unsigned long)page_address(page
), &level
);
1945 return (pte_val(*pte
) & _PAGE_PRESENT
);
1948 #endif /* CONFIG_HIBERNATION */
1950 #endif /* CONFIG_DEBUG_PAGEALLOC */
1952 int kernel_map_pages_in_pgd(pgd_t
*pgd
, u64 pfn
, unsigned long address
,
1953 unsigned numpages
, unsigned long page_flags
)
1955 int retval
= -EINVAL
;
1957 struct cpa_data cpa
= {
1961 .numpages
= numpages
,
1962 .mask_set
= __pgprot(0),
1963 .mask_clr
= __pgprot(0),
1967 if (!(__supported_pte_mask
& _PAGE_NX
))
1970 if (!(page_flags
& _PAGE_NX
))
1971 cpa
.mask_clr
= __pgprot(_PAGE_NX
);
1973 if (!(page_flags
& _PAGE_RW
))
1974 cpa
.mask_clr
= __pgprot(_PAGE_RW
);
1976 cpa
.mask_set
= __pgprot(_PAGE_PRESENT
| page_flags
);
1978 retval
= __change_page_attr_set_clr(&cpa
, 0);
1986 * The testcases use internal knowledge of the implementation that shouldn't
1987 * be exposed to the rest of the kernel. Include these directly here.
1989 #ifdef CONFIG_CPA_DEBUG
1990 #include "pageattr-test.c"