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1 /*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
4 */
5 #include <linux/highmem.h>
6 #include <linux/memblock.h>
7 #include <linux/sched.h>
8 #include <linux/mm.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
17
18 #include <asm/e820/api.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <linux/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
26 #include <asm/pat.h>
27 #include <asm/set_memory.h>
28
29 /*
30 * The current flushing context - we pass it instead of 5 arguments:
31 */
32 struct cpa_data {
33 unsigned long *vaddr;
34 pgd_t *pgd;
35 pgprot_t mask_set;
36 pgprot_t mask_clr;
37 unsigned long numpages;
38 int flags;
39 unsigned long pfn;
40 unsigned force_split : 1,
41 force_static_prot : 1;
42 int curpage;
43 struct page **pages;
44 };
45
46 enum cpa_warn {
47 CPA_CONFLICT,
48 CPA_PROTECT,
49 CPA_DETECT,
50 };
51
52 static const int cpa_warn_level = CPA_PROTECT;
53
54 /*
55 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
56 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
57 * entries change the page attribute in parallel to some other cpu
58 * splitting a large page entry along with changing the attribute.
59 */
60 static DEFINE_SPINLOCK(cpa_lock);
61
62 #define CPA_FLUSHTLB 1
63 #define CPA_ARRAY 2
64 #define CPA_PAGES_ARRAY 4
65 #define CPA_NO_CHECK_ALIAS 8 /* Do not search for aliases */
66
67 #ifdef CONFIG_PROC_FS
68 static unsigned long direct_pages_count[PG_LEVEL_NUM];
69
70 void update_page_count(int level, unsigned long pages)
71 {
72 /* Protect against CPA */
73 spin_lock(&pgd_lock);
74 direct_pages_count[level] += pages;
75 spin_unlock(&pgd_lock);
76 }
77
78 static void split_page_count(int level)
79 {
80 if (direct_pages_count[level] == 0)
81 return;
82
83 direct_pages_count[level]--;
84 direct_pages_count[level - 1] += PTRS_PER_PTE;
85 }
86
87 void arch_report_meminfo(struct seq_file *m)
88 {
89 seq_printf(m, "DirectMap4k: %8lu kB\n",
90 direct_pages_count[PG_LEVEL_4K] << 2);
91 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
92 seq_printf(m, "DirectMap2M: %8lu kB\n",
93 direct_pages_count[PG_LEVEL_2M] << 11);
94 #else
95 seq_printf(m, "DirectMap4M: %8lu kB\n",
96 direct_pages_count[PG_LEVEL_2M] << 12);
97 #endif
98 if (direct_gbpages)
99 seq_printf(m, "DirectMap1G: %8lu kB\n",
100 direct_pages_count[PG_LEVEL_1G] << 20);
101 }
102 #else
103 static inline void split_page_count(int level) { }
104 #endif
105
106 #ifdef CONFIG_X86_CPA_STATISTICS
107
108 static unsigned long cpa_1g_checked;
109 static unsigned long cpa_1g_sameprot;
110 static unsigned long cpa_1g_preserved;
111 static unsigned long cpa_2m_checked;
112 static unsigned long cpa_2m_sameprot;
113 static unsigned long cpa_2m_preserved;
114 static unsigned long cpa_4k_install;
115
116 static inline void cpa_inc_1g_checked(void)
117 {
118 cpa_1g_checked++;
119 }
120
121 static inline void cpa_inc_2m_checked(void)
122 {
123 cpa_2m_checked++;
124 }
125
126 static inline void cpa_inc_4k_install(void)
127 {
128 cpa_4k_install++;
129 }
130
131 static inline void cpa_inc_lp_sameprot(int level)
132 {
133 if (level == PG_LEVEL_1G)
134 cpa_1g_sameprot++;
135 else
136 cpa_2m_sameprot++;
137 }
138
139 static inline void cpa_inc_lp_preserved(int level)
140 {
141 if (level == PG_LEVEL_1G)
142 cpa_1g_preserved++;
143 else
144 cpa_2m_preserved++;
145 }
146
147 static int cpastats_show(struct seq_file *m, void *p)
148 {
149 seq_printf(m, "1G pages checked: %16lu\n", cpa_1g_checked);
150 seq_printf(m, "1G pages sameprot: %16lu\n", cpa_1g_sameprot);
151 seq_printf(m, "1G pages preserved: %16lu\n", cpa_1g_preserved);
152 seq_printf(m, "2M pages checked: %16lu\n", cpa_2m_checked);
153 seq_printf(m, "2M pages sameprot: %16lu\n", cpa_2m_sameprot);
154 seq_printf(m, "2M pages preserved: %16lu\n", cpa_2m_preserved);
155 seq_printf(m, "4K pages set-checked: %16lu\n", cpa_4k_install);
156 return 0;
157 }
158
159 static int cpastats_open(struct inode *inode, struct file *file)
160 {
161 return single_open(file, cpastats_show, NULL);
162 }
163
164 static const struct file_operations cpastats_fops = {
165 .open = cpastats_open,
166 .read = seq_read,
167 .llseek = seq_lseek,
168 .release = single_release,
169 };
170
171 static int __init cpa_stats_init(void)
172 {
173 debugfs_create_file("cpa_stats", S_IRUSR, arch_debugfs_dir, NULL,
174 &cpastats_fops);
175 return 0;
176 }
177 late_initcall(cpa_stats_init);
178 #else
179 static inline void cpa_inc_1g_checked(void) { }
180 static inline void cpa_inc_2m_checked(void) { }
181 static inline void cpa_inc_4k_install(void) { }
182 static inline void cpa_inc_lp_sameprot(int level) { }
183 static inline void cpa_inc_lp_preserved(int level) { }
184 #endif
185
186
187 static inline int
188 within(unsigned long addr, unsigned long start, unsigned long end)
189 {
190 return addr >= start && addr < end;
191 }
192
193 static inline int
194 within_inclusive(unsigned long addr, unsigned long start, unsigned long end)
195 {
196 return addr >= start && addr <= end;
197 }
198
199 #ifdef CONFIG_X86_64
200
201 static inline unsigned long highmap_start_pfn(void)
202 {
203 return __pa_symbol(_text) >> PAGE_SHIFT;
204 }
205
206 static inline unsigned long highmap_end_pfn(void)
207 {
208 /* Do not reference physical address outside the kernel. */
209 return __pa_symbol(roundup(_brk_end, PMD_SIZE) - 1) >> PAGE_SHIFT;
210 }
211
212 static bool __cpa_pfn_in_highmap(unsigned long pfn)
213 {
214 /*
215 * Kernel text has an alias mapping at a high address, known
216 * here as "highmap".
217 */
218 return within_inclusive(pfn, highmap_start_pfn(), highmap_end_pfn());
219 }
220
221 #else
222
223 static bool __cpa_pfn_in_highmap(unsigned long pfn)
224 {
225 /* There is no highmap on 32-bit */
226 return false;
227 }
228
229 #endif
230
231 /*
232 * Flushing functions
233 */
234
235 /**
236 * clflush_cache_range - flush a cache range with clflush
237 * @vaddr: virtual start address
238 * @size: number of bytes to flush
239 *
240 * clflushopt is an unordered instruction which needs fencing with mfence or
241 * sfence to avoid ordering issues.
242 */
243 void clflush_cache_range(void *vaddr, unsigned int size)
244 {
245 const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
246 void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
247 void *vend = vaddr + size;
248
249 if (p >= vend)
250 return;
251
252 mb();
253
254 for (; p < vend; p += clflush_size)
255 clflushopt(p);
256
257 mb();
258 }
259 EXPORT_SYMBOL_GPL(clflush_cache_range);
260
261 void arch_invalidate_pmem(void *addr, size_t size)
262 {
263 clflush_cache_range(addr, size);
264 }
265 EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
266
267 static void __cpa_flush_all(void *arg)
268 {
269 unsigned long cache = (unsigned long)arg;
270
271 /*
272 * Flush all to work around Errata in early athlons regarding
273 * large page flushing.
274 */
275 __flush_tlb_all();
276
277 if (cache && boot_cpu_data.x86 >= 4)
278 wbinvd();
279 }
280
281 static void cpa_flush_all(unsigned long cache)
282 {
283 BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
284
285 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
286 }
287
288 static bool __inv_flush_all(int cache)
289 {
290 BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
291
292 if (cache && !static_cpu_has(X86_FEATURE_CLFLUSH)) {
293 cpa_flush_all(cache);
294 return true;
295 }
296
297 return false;
298 }
299
300 static void cpa_flush_range(unsigned long start, int numpages, int cache)
301 {
302 unsigned int i, level;
303 unsigned long addr;
304
305 WARN_ON(PAGE_ALIGN(start) != start);
306
307 if (__inv_flush_all(cache))
308 return;
309
310 flush_tlb_kernel_range(start, start + PAGE_SIZE * numpages);
311
312 if (!cache)
313 return;
314
315 /*
316 * We only need to flush on one CPU,
317 * clflush is a MESI-coherent instruction that
318 * will cause all other CPUs to flush the same
319 * cachelines:
320 */
321 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
322 pte_t *pte = lookup_address(addr, &level);
323
324 /*
325 * Only flush present addresses:
326 */
327 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
328 clflush_cache_range((void *) addr, PAGE_SIZE);
329 }
330 }
331
332 static void cpa_flush_array(unsigned long baddr, unsigned long *start,
333 int numpages, int cache,
334 int in_flags, struct page **pages)
335 {
336 unsigned int i, level;
337
338 if (__inv_flush_all(cache))
339 return;
340
341 flush_tlb_all();
342
343 if (!cache)
344 return;
345
346 /*
347 * We only need to flush on one CPU,
348 * clflush is a MESI-coherent instruction that
349 * will cause all other CPUs to flush the same
350 * cachelines:
351 */
352 for (i = 0; i < numpages; i++) {
353 unsigned long addr;
354 pte_t *pte;
355
356 if (in_flags & CPA_PAGES_ARRAY)
357 addr = (unsigned long)page_address(pages[i]);
358 else
359 addr = start[i];
360
361 pte = lookup_address(addr, &level);
362
363 /*
364 * Only flush present addresses:
365 */
366 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
367 clflush_cache_range((void *)addr, PAGE_SIZE);
368 }
369 }
370
371 static bool overlaps(unsigned long r1_start, unsigned long r1_end,
372 unsigned long r2_start, unsigned long r2_end)
373 {
374 return (r1_start <= r2_end && r1_end >= r2_start) ||
375 (r2_start <= r1_end && r2_end >= r1_start);
376 }
377
378 #ifdef CONFIG_PCI_BIOS
379 /*
380 * The BIOS area between 640k and 1Mb needs to be executable for PCI BIOS
381 * based config access (CONFIG_PCI_GOBIOS) support.
382 */
383 #define BIOS_PFN PFN_DOWN(BIOS_BEGIN)
384 #define BIOS_PFN_END PFN_DOWN(BIOS_END - 1)
385
386 static pgprotval_t protect_pci_bios(unsigned long spfn, unsigned long epfn)
387 {
388 if (pcibios_enabled && overlaps(spfn, epfn, BIOS_PFN, BIOS_PFN_END))
389 return _PAGE_NX;
390 return 0;
391 }
392 #else
393 static pgprotval_t protect_pci_bios(unsigned long spfn, unsigned long epfn)
394 {
395 return 0;
396 }
397 #endif
398
399 /*
400 * The .rodata section needs to be read-only. Using the pfn catches all
401 * aliases. This also includes __ro_after_init, so do not enforce until
402 * kernel_set_to_readonly is true.
403 */
404 static pgprotval_t protect_rodata(unsigned long spfn, unsigned long epfn)
405 {
406 unsigned long epfn_ro, spfn_ro = PFN_DOWN(__pa_symbol(__start_rodata));
407
408 /*
409 * Note: __end_rodata is at page aligned and not inclusive, so
410 * subtract 1 to get the last enforced PFN in the rodata area.
411 */
412 epfn_ro = PFN_DOWN(__pa_symbol(__end_rodata)) - 1;
413
414 if (kernel_set_to_readonly && overlaps(spfn, epfn, spfn_ro, epfn_ro))
415 return _PAGE_RW;
416 return 0;
417 }
418
419 /*
420 * Protect kernel text against becoming non executable by forbidding
421 * _PAGE_NX. This protects only the high kernel mapping (_text -> _etext)
422 * out of which the kernel actually executes. Do not protect the low
423 * mapping.
424 *
425 * This does not cover __inittext since that is gone after boot.
426 */
427 static pgprotval_t protect_kernel_text(unsigned long start, unsigned long end)
428 {
429 unsigned long t_end = (unsigned long)_etext - 1;
430 unsigned long t_start = (unsigned long)_text;
431
432 if (overlaps(start, end, t_start, t_end))
433 return _PAGE_NX;
434 return 0;
435 }
436
437 #if defined(CONFIG_X86_64)
438 /*
439 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
440 * kernel text mappings for the large page aligned text, rodata sections
441 * will be always read-only. For the kernel identity mappings covering the
442 * holes caused by this alignment can be anything that user asks.
443 *
444 * This will preserve the large page mappings for kernel text/data at no
445 * extra cost.
446 */
447 static pgprotval_t protect_kernel_text_ro(unsigned long start,
448 unsigned long end)
449 {
450 unsigned long t_end = (unsigned long)__end_rodata_hpage_align - 1;
451 unsigned long t_start = (unsigned long)_text;
452 unsigned int level;
453
454 if (!kernel_set_to_readonly || !overlaps(start, end, t_start, t_end))
455 return 0;
456 /*
457 * Don't enforce the !RW mapping for the kernel text mapping, if
458 * the current mapping is already using small page mapping. No
459 * need to work hard to preserve large page mappings in this case.
460 *
461 * This also fixes the Linux Xen paravirt guest boot failure caused
462 * by unexpected read-only mappings for kernel identity
463 * mappings. In this paravirt guest case, the kernel text mapping
464 * and the kernel identity mapping share the same page-table pages,
465 * so the protections for kernel text and identity mappings have to
466 * be the same.
467 */
468 if (lookup_address(start, &level) && (level != PG_LEVEL_4K))
469 return _PAGE_RW;
470 return 0;
471 }
472 #else
473 static pgprotval_t protect_kernel_text_ro(unsigned long start,
474 unsigned long end)
475 {
476 return 0;
477 }
478 #endif
479
480 static inline bool conflicts(pgprot_t prot, pgprotval_t val)
481 {
482 return (pgprot_val(prot) & ~val) != pgprot_val(prot);
483 }
484
485 static inline void check_conflict(int warnlvl, pgprot_t prot, pgprotval_t val,
486 unsigned long start, unsigned long end,
487 unsigned long pfn, const char *txt)
488 {
489 static const char *lvltxt[] = {
490 [CPA_CONFLICT] = "conflict",
491 [CPA_PROTECT] = "protect",
492 [CPA_DETECT] = "detect",
493 };
494
495 if (warnlvl > cpa_warn_level || !conflicts(prot, val))
496 return;
497
498 pr_warn("CPA %8s %10s: 0x%016lx - 0x%016lx PFN %lx req %016llx prevent %016llx\n",
499 lvltxt[warnlvl], txt, start, end, pfn, (unsigned long long)pgprot_val(prot),
500 (unsigned long long)val);
501 }
502
503 /*
504 * Certain areas of memory on x86 require very specific protection flags,
505 * for example the BIOS area or kernel text. Callers don't always get this
506 * right (again, ioremap() on BIOS memory is not uncommon) so this function
507 * checks and fixes these known static required protection bits.
508 */
509 static inline pgprot_t static_protections(pgprot_t prot, unsigned long start,
510 unsigned long pfn, unsigned long npg,
511 int warnlvl)
512 {
513 pgprotval_t forbidden, res;
514 unsigned long end;
515
516 /*
517 * There is no point in checking RW/NX conflicts when the requested
518 * mapping is setting the page !PRESENT.
519 */
520 if (!(pgprot_val(prot) & _PAGE_PRESENT))
521 return prot;
522
523 /* Operate on the virtual address */
524 end = start + npg * PAGE_SIZE - 1;
525
526 res = protect_kernel_text(start, end);
527 check_conflict(warnlvl, prot, res, start, end, pfn, "Text NX");
528 forbidden = res;
529
530 res = protect_kernel_text_ro(start, end);
531 check_conflict(warnlvl, prot, res, start, end, pfn, "Text RO");
532 forbidden |= res;
533
534 /* Check the PFN directly */
535 res = protect_pci_bios(pfn, pfn + npg - 1);
536 check_conflict(warnlvl, prot, res, start, end, pfn, "PCIBIOS NX");
537 forbidden |= res;
538
539 res = protect_rodata(pfn, pfn + npg - 1);
540 check_conflict(warnlvl, prot, res, start, end, pfn, "Rodata RO");
541 forbidden |= res;
542
543 return __pgprot(pgprot_val(prot) & ~forbidden);
544 }
545
546 /*
547 * Lookup the page table entry for a virtual address in a specific pgd.
548 * Return a pointer to the entry and the level of the mapping.
549 */
550 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
551 unsigned int *level)
552 {
553 p4d_t *p4d;
554 pud_t *pud;
555 pmd_t *pmd;
556
557 *level = PG_LEVEL_NONE;
558
559 if (pgd_none(*pgd))
560 return NULL;
561
562 p4d = p4d_offset(pgd, address);
563 if (p4d_none(*p4d))
564 return NULL;
565
566 *level = PG_LEVEL_512G;
567 if (p4d_large(*p4d) || !p4d_present(*p4d))
568 return (pte_t *)p4d;
569
570 pud = pud_offset(p4d, address);
571 if (pud_none(*pud))
572 return NULL;
573
574 *level = PG_LEVEL_1G;
575 if (pud_large(*pud) || !pud_present(*pud))
576 return (pte_t *)pud;
577
578 pmd = pmd_offset(pud, address);
579 if (pmd_none(*pmd))
580 return NULL;
581
582 *level = PG_LEVEL_2M;
583 if (pmd_large(*pmd) || !pmd_present(*pmd))
584 return (pte_t *)pmd;
585
586 *level = PG_LEVEL_4K;
587
588 return pte_offset_kernel(pmd, address);
589 }
590
591 /*
592 * Lookup the page table entry for a virtual address. Return a pointer
593 * to the entry and the level of the mapping.
594 *
595 * Note: We return pud and pmd either when the entry is marked large
596 * or when the present bit is not set. Otherwise we would return a
597 * pointer to a nonexisting mapping.
598 */
599 pte_t *lookup_address(unsigned long address, unsigned int *level)
600 {
601 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
602 }
603 EXPORT_SYMBOL_GPL(lookup_address);
604
605 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
606 unsigned int *level)
607 {
608 if (cpa->pgd)
609 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
610 address, level);
611
612 return lookup_address(address, level);
613 }
614
615 /*
616 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
617 * or NULL if not present.
618 */
619 pmd_t *lookup_pmd_address(unsigned long address)
620 {
621 pgd_t *pgd;
622 p4d_t *p4d;
623 pud_t *pud;
624
625 pgd = pgd_offset_k(address);
626 if (pgd_none(*pgd))
627 return NULL;
628
629 p4d = p4d_offset(pgd, address);
630 if (p4d_none(*p4d) || p4d_large(*p4d) || !p4d_present(*p4d))
631 return NULL;
632
633 pud = pud_offset(p4d, address);
634 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
635 return NULL;
636
637 return pmd_offset(pud, address);
638 }
639
640 /*
641 * This is necessary because __pa() does not work on some
642 * kinds of memory, like vmalloc() or the alloc_remap()
643 * areas on 32-bit NUMA systems. The percpu areas can
644 * end up in this kind of memory, for instance.
645 *
646 * This could be optimized, but it is only intended to be
647 * used at inititalization time, and keeping it
648 * unoptimized should increase the testing coverage for
649 * the more obscure platforms.
650 */
651 phys_addr_t slow_virt_to_phys(void *__virt_addr)
652 {
653 unsigned long virt_addr = (unsigned long)__virt_addr;
654 phys_addr_t phys_addr;
655 unsigned long offset;
656 enum pg_level level;
657 pte_t *pte;
658
659 pte = lookup_address(virt_addr, &level);
660 BUG_ON(!pte);
661
662 /*
663 * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
664 * before being left-shifted PAGE_SHIFT bits -- this trick is to
665 * make 32-PAE kernel work correctly.
666 */
667 switch (level) {
668 case PG_LEVEL_1G:
669 phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
670 offset = virt_addr & ~PUD_PAGE_MASK;
671 break;
672 case PG_LEVEL_2M:
673 phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
674 offset = virt_addr & ~PMD_PAGE_MASK;
675 break;
676 default:
677 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
678 offset = virt_addr & ~PAGE_MASK;
679 }
680
681 return (phys_addr_t)(phys_addr | offset);
682 }
683 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
684
685 /*
686 * Set the new pmd in all the pgds we know about:
687 */
688 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
689 {
690 /* change init_mm */
691 set_pte_atomic(kpte, pte);
692 #ifdef CONFIG_X86_32
693 if (!SHARED_KERNEL_PMD) {
694 struct page *page;
695
696 list_for_each_entry(page, &pgd_list, lru) {
697 pgd_t *pgd;
698 p4d_t *p4d;
699 pud_t *pud;
700 pmd_t *pmd;
701
702 pgd = (pgd_t *)page_address(page) + pgd_index(address);
703 p4d = p4d_offset(pgd, address);
704 pud = pud_offset(p4d, address);
705 pmd = pmd_offset(pud, address);
706 set_pte_atomic((pte_t *)pmd, pte);
707 }
708 }
709 #endif
710 }
711
712 static pgprot_t pgprot_clear_protnone_bits(pgprot_t prot)
713 {
714 /*
715 * _PAGE_GLOBAL means "global page" for present PTEs.
716 * But, it is also used to indicate _PAGE_PROTNONE
717 * for non-present PTEs.
718 *
719 * This ensures that a _PAGE_GLOBAL PTE going from
720 * present to non-present is not confused as
721 * _PAGE_PROTNONE.
722 */
723 if (!(pgprot_val(prot) & _PAGE_PRESENT))
724 pgprot_val(prot) &= ~_PAGE_GLOBAL;
725
726 return prot;
727 }
728
729 static int __should_split_large_page(pte_t *kpte, unsigned long address,
730 struct cpa_data *cpa)
731 {
732 unsigned long numpages, pmask, psize, lpaddr, pfn, old_pfn;
733 pgprot_t old_prot, new_prot, req_prot, chk_prot;
734 pte_t new_pte, old_pte, *tmp;
735 enum pg_level level;
736
737 /*
738 * Check for races, another CPU might have split this page
739 * up already:
740 */
741 tmp = _lookup_address_cpa(cpa, address, &level);
742 if (tmp != kpte)
743 return 1;
744
745 switch (level) {
746 case PG_LEVEL_2M:
747 old_prot = pmd_pgprot(*(pmd_t *)kpte);
748 old_pfn = pmd_pfn(*(pmd_t *)kpte);
749 cpa_inc_2m_checked();
750 break;
751 case PG_LEVEL_1G:
752 old_prot = pud_pgprot(*(pud_t *)kpte);
753 old_pfn = pud_pfn(*(pud_t *)kpte);
754 cpa_inc_1g_checked();
755 break;
756 default:
757 return -EINVAL;
758 }
759
760 psize = page_level_size(level);
761 pmask = page_level_mask(level);
762
763 /*
764 * Calculate the number of pages, which fit into this large
765 * page starting at address:
766 */
767 lpaddr = (address + psize) & pmask;
768 numpages = (lpaddr - address) >> PAGE_SHIFT;
769 if (numpages < cpa->numpages)
770 cpa->numpages = numpages;
771
772 /*
773 * We are safe now. Check whether the new pgprot is the same:
774 * Convert protection attributes to 4k-format, as cpa->mask* are set
775 * up accordingly.
776 */
777 old_pte = *kpte;
778 /* Clear PSE (aka _PAGE_PAT) and move PAT bit to correct position */
779 req_prot = pgprot_large_2_4k(old_prot);
780
781 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
782 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
783
784 /*
785 * req_prot is in format of 4k pages. It must be converted to large
786 * page format: the caching mode includes the PAT bit located at
787 * different bit positions in the two formats.
788 */
789 req_prot = pgprot_4k_2_large(req_prot);
790 req_prot = pgprot_clear_protnone_bits(req_prot);
791 if (pgprot_val(req_prot) & _PAGE_PRESENT)
792 pgprot_val(req_prot) |= _PAGE_PSE;
793
794 /*
795 * old_pfn points to the large page base pfn. So we need to add the
796 * offset of the virtual address:
797 */
798 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
799 cpa->pfn = pfn;
800
801 /*
802 * Calculate the large page base address and the number of 4K pages
803 * in the large page
804 */
805 lpaddr = address & pmask;
806 numpages = psize >> PAGE_SHIFT;
807
808 /*
809 * Sanity check that the existing mapping is correct versus the static
810 * protections. static_protections() guards against !PRESENT, so no
811 * extra conditional required here.
812 */
813 chk_prot = static_protections(old_prot, lpaddr, old_pfn, numpages,
814 CPA_CONFLICT);
815
816 if (WARN_ON_ONCE(pgprot_val(chk_prot) != pgprot_val(old_prot))) {
817 /*
818 * Split the large page and tell the split code to
819 * enforce static protections.
820 */
821 cpa->force_static_prot = 1;
822 return 1;
823 }
824
825 /*
826 * Optimization: If the requested pgprot is the same as the current
827 * pgprot, then the large page can be preserved and no updates are
828 * required independent of alignment and length of the requested
829 * range. The above already established that the current pgprot is
830 * correct, which in consequence makes the requested pgprot correct
831 * as well if it is the same. The static protection scan below will
832 * not come to a different conclusion.
833 */
834 if (pgprot_val(req_prot) == pgprot_val(old_prot)) {
835 cpa_inc_lp_sameprot(level);
836 return 0;
837 }
838
839 /*
840 * If the requested range does not cover the full page, split it up
841 */
842 if (address != lpaddr || cpa->numpages != numpages)
843 return 1;
844
845 /*
846 * Check whether the requested pgprot is conflicting with a static
847 * protection requirement in the large page.
848 */
849 new_prot = static_protections(req_prot, lpaddr, old_pfn, numpages,
850 CPA_DETECT);
851
852 /*
853 * If there is a conflict, split the large page.
854 *
855 * There used to be a 4k wise evaluation trying really hard to
856 * preserve the large pages, but experimentation has shown, that this
857 * does not help at all. There might be corner cases which would
858 * preserve one large page occasionally, but it's really not worth the
859 * extra code and cycles for the common case.
860 */
861 if (pgprot_val(req_prot) != pgprot_val(new_prot))
862 return 1;
863
864 /* All checks passed. Update the large page mapping. */
865 new_pte = pfn_pte(old_pfn, new_prot);
866 __set_pmd_pte(kpte, address, new_pte);
867 cpa->flags |= CPA_FLUSHTLB;
868 cpa_inc_lp_preserved(level);
869 return 0;
870 }
871
872 static int should_split_large_page(pte_t *kpte, unsigned long address,
873 struct cpa_data *cpa)
874 {
875 int do_split;
876
877 if (cpa->force_split)
878 return 1;
879
880 spin_lock(&pgd_lock);
881 do_split = __should_split_large_page(kpte, address, cpa);
882 spin_unlock(&pgd_lock);
883
884 return do_split;
885 }
886
887 static void split_set_pte(struct cpa_data *cpa, pte_t *pte, unsigned long pfn,
888 pgprot_t ref_prot, unsigned long address,
889 unsigned long size)
890 {
891 unsigned int npg = PFN_DOWN(size);
892 pgprot_t prot;
893
894 /*
895 * If should_split_large_page() discovered an inconsistent mapping,
896 * remove the invalid protection in the split mapping.
897 */
898 if (!cpa->force_static_prot)
899 goto set;
900
901 prot = static_protections(ref_prot, address, pfn, npg, CPA_PROTECT);
902
903 if (pgprot_val(prot) == pgprot_val(ref_prot))
904 goto set;
905
906 /*
907 * If this is splitting a PMD, fix it up. PUD splits cannot be
908 * fixed trivially as that would require to rescan the newly
909 * installed PMD mappings after returning from split_large_page()
910 * so an eventual further split can allocate the necessary PTE
911 * pages. Warn for now and revisit it in case this actually
912 * happens.
913 */
914 if (size == PAGE_SIZE)
915 ref_prot = prot;
916 else
917 pr_warn_once("CPA: Cannot fixup static protections for PUD split\n");
918 set:
919 set_pte(pte, pfn_pte(pfn, ref_prot));
920 }
921
922 static int
923 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
924 struct page *base)
925 {
926 unsigned long lpaddr, lpinc, ref_pfn, pfn, pfninc = 1;
927 pte_t *pbase = (pte_t *)page_address(base);
928 unsigned int i, level;
929 pgprot_t ref_prot;
930 pte_t *tmp;
931
932 spin_lock(&pgd_lock);
933 /*
934 * Check for races, another CPU might have split this page
935 * up for us already:
936 */
937 tmp = _lookup_address_cpa(cpa, address, &level);
938 if (tmp != kpte) {
939 spin_unlock(&pgd_lock);
940 return 1;
941 }
942
943 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
944
945 switch (level) {
946 case PG_LEVEL_2M:
947 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
948 /*
949 * Clear PSE (aka _PAGE_PAT) and move
950 * PAT bit to correct position.
951 */
952 ref_prot = pgprot_large_2_4k(ref_prot);
953 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
954 lpaddr = address & PMD_MASK;
955 lpinc = PAGE_SIZE;
956 break;
957
958 case PG_LEVEL_1G:
959 ref_prot = pud_pgprot(*(pud_t *)kpte);
960 ref_pfn = pud_pfn(*(pud_t *)kpte);
961 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
962 lpaddr = address & PUD_MASK;
963 lpinc = PMD_SIZE;
964 /*
965 * Clear the PSE flags if the PRESENT flag is not set
966 * otherwise pmd_present/pmd_huge will return true
967 * even on a non present pmd.
968 */
969 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
970 pgprot_val(ref_prot) &= ~_PAGE_PSE;
971 break;
972
973 default:
974 spin_unlock(&pgd_lock);
975 return 1;
976 }
977
978 ref_prot = pgprot_clear_protnone_bits(ref_prot);
979
980 /*
981 * Get the target pfn from the original entry:
982 */
983 pfn = ref_pfn;
984 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc, lpaddr += lpinc)
985 split_set_pte(cpa, pbase + i, pfn, ref_prot, lpaddr, lpinc);
986
987 if (virt_addr_valid(address)) {
988 unsigned long pfn = PFN_DOWN(__pa(address));
989
990 if (pfn_range_is_mapped(pfn, pfn + 1))
991 split_page_count(level);
992 }
993
994 /*
995 * Install the new, split up pagetable.
996 *
997 * We use the standard kernel pagetable protections for the new
998 * pagetable protections, the actual ptes set above control the
999 * primary protection behavior:
1000 */
1001 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
1002
1003 /*
1004 * Do a global flush tlb after splitting the large page
1005 * and before we do the actual change page attribute in the PTE.
1006 *
1007 * Without this, we violate the TLB application note, that says:
1008 * "The TLBs may contain both ordinary and large-page
1009 * translations for a 4-KByte range of linear addresses. This
1010 * may occur if software modifies the paging structures so that
1011 * the page size used for the address range changes. If the two
1012 * translations differ with respect to page frame or attributes
1013 * (e.g., permissions), processor behavior is undefined and may
1014 * be implementation-specific."
1015 *
1016 * We do this global tlb flush inside the cpa_lock, so that we
1017 * don't allow any other cpu, with stale tlb entries change the
1018 * page attribute in parallel, that also falls into the
1019 * just split large page entry.
1020 */
1021 flush_tlb_all();
1022 spin_unlock(&pgd_lock);
1023
1024 return 0;
1025 }
1026
1027 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
1028 unsigned long address)
1029 {
1030 struct page *base;
1031
1032 if (!debug_pagealloc_enabled())
1033 spin_unlock(&cpa_lock);
1034 base = alloc_pages(GFP_KERNEL, 0);
1035 if (!debug_pagealloc_enabled())
1036 spin_lock(&cpa_lock);
1037 if (!base)
1038 return -ENOMEM;
1039
1040 if (__split_large_page(cpa, kpte, address, base))
1041 __free_page(base);
1042
1043 return 0;
1044 }
1045
1046 static bool try_to_free_pte_page(pte_t *pte)
1047 {
1048 int i;
1049
1050 for (i = 0; i < PTRS_PER_PTE; i++)
1051 if (!pte_none(pte[i]))
1052 return false;
1053
1054 free_page((unsigned long)pte);
1055 return true;
1056 }
1057
1058 static bool try_to_free_pmd_page(pmd_t *pmd)
1059 {
1060 int i;
1061
1062 for (i = 0; i < PTRS_PER_PMD; i++)
1063 if (!pmd_none(pmd[i]))
1064 return false;
1065
1066 free_page((unsigned long)pmd);
1067 return true;
1068 }
1069
1070 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
1071 {
1072 pte_t *pte = pte_offset_kernel(pmd, start);
1073
1074 while (start < end) {
1075 set_pte(pte, __pte(0));
1076
1077 start += PAGE_SIZE;
1078 pte++;
1079 }
1080
1081 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
1082 pmd_clear(pmd);
1083 return true;
1084 }
1085 return false;
1086 }
1087
1088 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
1089 unsigned long start, unsigned long end)
1090 {
1091 if (unmap_pte_range(pmd, start, end))
1092 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
1093 pud_clear(pud);
1094 }
1095
1096 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
1097 {
1098 pmd_t *pmd = pmd_offset(pud, start);
1099
1100 /*
1101 * Not on a 2MB page boundary?
1102 */
1103 if (start & (PMD_SIZE - 1)) {
1104 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
1105 unsigned long pre_end = min_t(unsigned long, end, next_page);
1106
1107 __unmap_pmd_range(pud, pmd, start, pre_end);
1108
1109 start = pre_end;
1110 pmd++;
1111 }
1112
1113 /*
1114 * Try to unmap in 2M chunks.
1115 */
1116 while (end - start >= PMD_SIZE) {
1117 if (pmd_large(*pmd))
1118 pmd_clear(pmd);
1119 else
1120 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
1121
1122 start += PMD_SIZE;
1123 pmd++;
1124 }
1125
1126 /*
1127 * 4K leftovers?
1128 */
1129 if (start < end)
1130 return __unmap_pmd_range(pud, pmd, start, end);
1131
1132 /*
1133 * Try again to free the PMD page if haven't succeeded above.
1134 */
1135 if (!pud_none(*pud))
1136 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
1137 pud_clear(pud);
1138 }
1139
1140 static void unmap_pud_range(p4d_t *p4d, unsigned long start, unsigned long end)
1141 {
1142 pud_t *pud = pud_offset(p4d, start);
1143
1144 /*
1145 * Not on a GB page boundary?
1146 */
1147 if (start & (PUD_SIZE - 1)) {
1148 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1149 unsigned long pre_end = min_t(unsigned long, end, next_page);
1150
1151 unmap_pmd_range(pud, start, pre_end);
1152
1153 start = pre_end;
1154 pud++;
1155 }
1156
1157 /*
1158 * Try to unmap in 1G chunks?
1159 */
1160 while (end - start >= PUD_SIZE) {
1161
1162 if (pud_large(*pud))
1163 pud_clear(pud);
1164 else
1165 unmap_pmd_range(pud, start, start + PUD_SIZE);
1166
1167 start += PUD_SIZE;
1168 pud++;
1169 }
1170
1171 /*
1172 * 2M leftovers?
1173 */
1174 if (start < end)
1175 unmap_pmd_range(pud, start, end);
1176
1177 /*
1178 * No need to try to free the PUD page because we'll free it in
1179 * populate_pgd's error path
1180 */
1181 }
1182
1183 static int alloc_pte_page(pmd_t *pmd)
1184 {
1185 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL);
1186 if (!pte)
1187 return -1;
1188
1189 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
1190 return 0;
1191 }
1192
1193 static int alloc_pmd_page(pud_t *pud)
1194 {
1195 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL);
1196 if (!pmd)
1197 return -1;
1198
1199 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
1200 return 0;
1201 }
1202
1203 static void populate_pte(struct cpa_data *cpa,
1204 unsigned long start, unsigned long end,
1205 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
1206 {
1207 pte_t *pte;
1208
1209 pte = pte_offset_kernel(pmd, start);
1210
1211 pgprot = pgprot_clear_protnone_bits(pgprot);
1212
1213 while (num_pages-- && start < end) {
1214 set_pte(pte, pfn_pte(cpa->pfn, pgprot));
1215
1216 start += PAGE_SIZE;
1217 cpa->pfn++;
1218 pte++;
1219 }
1220 }
1221
1222 static long populate_pmd(struct cpa_data *cpa,
1223 unsigned long start, unsigned long end,
1224 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
1225 {
1226 long cur_pages = 0;
1227 pmd_t *pmd;
1228 pgprot_t pmd_pgprot;
1229
1230 /*
1231 * Not on a 2M boundary?
1232 */
1233 if (start & (PMD_SIZE - 1)) {
1234 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
1235 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
1236
1237 pre_end = min_t(unsigned long, pre_end, next_page);
1238 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1239 cur_pages = min_t(unsigned int, num_pages, cur_pages);
1240
1241 /*
1242 * Need a PTE page?
1243 */
1244 pmd = pmd_offset(pud, start);
1245 if (pmd_none(*pmd))
1246 if (alloc_pte_page(pmd))
1247 return -1;
1248
1249 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
1250
1251 start = pre_end;
1252 }
1253
1254 /*
1255 * We mapped them all?
1256 */
1257 if (num_pages == cur_pages)
1258 return cur_pages;
1259
1260 pmd_pgprot = pgprot_4k_2_large(pgprot);
1261
1262 while (end - start >= PMD_SIZE) {
1263
1264 /*
1265 * We cannot use a 1G page so allocate a PMD page if needed.
1266 */
1267 if (pud_none(*pud))
1268 if (alloc_pmd_page(pud))
1269 return -1;
1270
1271 pmd = pmd_offset(pud, start);
1272
1273 set_pmd(pmd, pmd_mkhuge(pfn_pmd(cpa->pfn,
1274 canon_pgprot(pmd_pgprot))));
1275
1276 start += PMD_SIZE;
1277 cpa->pfn += PMD_SIZE >> PAGE_SHIFT;
1278 cur_pages += PMD_SIZE >> PAGE_SHIFT;
1279 }
1280
1281 /*
1282 * Map trailing 4K pages.
1283 */
1284 if (start < end) {
1285 pmd = pmd_offset(pud, start);
1286 if (pmd_none(*pmd))
1287 if (alloc_pte_page(pmd))
1288 return -1;
1289
1290 populate_pte(cpa, start, end, num_pages - cur_pages,
1291 pmd, pgprot);
1292 }
1293 return num_pages;
1294 }
1295
1296 static int populate_pud(struct cpa_data *cpa, unsigned long start, p4d_t *p4d,
1297 pgprot_t pgprot)
1298 {
1299 pud_t *pud;
1300 unsigned long end;
1301 long cur_pages = 0;
1302 pgprot_t pud_pgprot;
1303
1304 end = start + (cpa->numpages << PAGE_SHIFT);
1305
1306 /*
1307 * Not on a Gb page boundary? => map everything up to it with
1308 * smaller pages.
1309 */
1310 if (start & (PUD_SIZE - 1)) {
1311 unsigned long pre_end;
1312 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1313
1314 pre_end = min_t(unsigned long, end, next_page);
1315 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1316 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1317
1318 pud = pud_offset(p4d, start);
1319
1320 /*
1321 * Need a PMD page?
1322 */
1323 if (pud_none(*pud))
1324 if (alloc_pmd_page(pud))
1325 return -1;
1326
1327 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1328 pud, pgprot);
1329 if (cur_pages < 0)
1330 return cur_pages;
1331
1332 start = pre_end;
1333 }
1334
1335 /* We mapped them all? */
1336 if (cpa->numpages == cur_pages)
1337 return cur_pages;
1338
1339 pud = pud_offset(p4d, start);
1340 pud_pgprot = pgprot_4k_2_large(pgprot);
1341
1342 /*
1343 * Map everything starting from the Gb boundary, possibly with 1G pages
1344 */
1345 while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {
1346 set_pud(pud, pud_mkhuge(pfn_pud(cpa->pfn,
1347 canon_pgprot(pud_pgprot))));
1348
1349 start += PUD_SIZE;
1350 cpa->pfn += PUD_SIZE >> PAGE_SHIFT;
1351 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1352 pud++;
1353 }
1354
1355 /* Map trailing leftover */
1356 if (start < end) {
1357 long tmp;
1358
1359 pud = pud_offset(p4d, start);
1360 if (pud_none(*pud))
1361 if (alloc_pmd_page(pud))
1362 return -1;
1363
1364 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1365 pud, pgprot);
1366 if (tmp < 0)
1367 return cur_pages;
1368
1369 cur_pages += tmp;
1370 }
1371 return cur_pages;
1372 }
1373
1374 /*
1375 * Restrictions for kernel page table do not necessarily apply when mapping in
1376 * an alternate PGD.
1377 */
1378 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1379 {
1380 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1381 pud_t *pud = NULL; /* shut up gcc */
1382 p4d_t *p4d;
1383 pgd_t *pgd_entry;
1384 long ret;
1385
1386 pgd_entry = cpa->pgd + pgd_index(addr);
1387
1388 if (pgd_none(*pgd_entry)) {
1389 p4d = (p4d_t *)get_zeroed_page(GFP_KERNEL);
1390 if (!p4d)
1391 return -1;
1392
1393 set_pgd(pgd_entry, __pgd(__pa(p4d) | _KERNPG_TABLE));
1394 }
1395
1396 /*
1397 * Allocate a PUD page and hand it down for mapping.
1398 */
1399 p4d = p4d_offset(pgd_entry, addr);
1400 if (p4d_none(*p4d)) {
1401 pud = (pud_t *)get_zeroed_page(GFP_KERNEL);
1402 if (!pud)
1403 return -1;
1404
1405 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE));
1406 }
1407
1408 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1409 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1410
1411 ret = populate_pud(cpa, addr, p4d, pgprot);
1412 if (ret < 0) {
1413 /*
1414 * Leave the PUD page in place in case some other CPU or thread
1415 * already found it, but remove any useless entries we just
1416 * added to it.
1417 */
1418 unmap_pud_range(p4d, addr,
1419 addr + (cpa->numpages << PAGE_SHIFT));
1420 return ret;
1421 }
1422
1423 cpa->numpages = ret;
1424 return 0;
1425 }
1426
1427 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1428 int primary)
1429 {
1430 if (cpa->pgd) {
1431 /*
1432 * Right now, we only execute this code path when mapping
1433 * the EFI virtual memory map regions, no other users
1434 * provide a ->pgd value. This may change in the future.
1435 */
1436 return populate_pgd(cpa, vaddr);
1437 }
1438
1439 /*
1440 * Ignore all non primary paths.
1441 */
1442 if (!primary) {
1443 cpa->numpages = 1;
1444 return 0;
1445 }
1446
1447 /*
1448 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1449 * to have holes.
1450 * Also set numpages to '1' indicating that we processed cpa req for
1451 * one virtual address page and its pfn. TBD: numpages can be set based
1452 * on the initial value and the level returned by lookup_address().
1453 */
1454 if (within(vaddr, PAGE_OFFSET,
1455 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1456 cpa->numpages = 1;
1457 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1458 return 0;
1459
1460 } else if (__cpa_pfn_in_highmap(cpa->pfn)) {
1461 /* Faults in the highmap are OK, so do not warn: */
1462 return -EFAULT;
1463 } else {
1464 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1465 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1466 *cpa->vaddr);
1467
1468 return -EFAULT;
1469 }
1470 }
1471
1472 static int __change_page_attr(struct cpa_data *cpa, int primary)
1473 {
1474 unsigned long address;
1475 int do_split, err;
1476 unsigned int level;
1477 pte_t *kpte, old_pte;
1478
1479 if (cpa->flags & CPA_PAGES_ARRAY) {
1480 struct page *page = cpa->pages[cpa->curpage];
1481 if (unlikely(PageHighMem(page)))
1482 return 0;
1483 address = (unsigned long)page_address(page);
1484 } else if (cpa->flags & CPA_ARRAY)
1485 address = cpa->vaddr[cpa->curpage];
1486 else
1487 address = *cpa->vaddr;
1488 repeat:
1489 kpte = _lookup_address_cpa(cpa, address, &level);
1490 if (!kpte)
1491 return __cpa_process_fault(cpa, address, primary);
1492
1493 old_pte = *kpte;
1494 if (pte_none(old_pte))
1495 return __cpa_process_fault(cpa, address, primary);
1496
1497 if (level == PG_LEVEL_4K) {
1498 pte_t new_pte;
1499 pgprot_t new_prot = pte_pgprot(old_pte);
1500 unsigned long pfn = pte_pfn(old_pte);
1501
1502 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1503 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1504
1505 cpa_inc_4k_install();
1506 new_prot = static_protections(new_prot, address, pfn, 1,
1507 CPA_PROTECT);
1508
1509 new_prot = pgprot_clear_protnone_bits(new_prot);
1510
1511 /*
1512 * We need to keep the pfn from the existing PTE,
1513 * after all we're only going to change it's attributes
1514 * not the memory it points to
1515 */
1516 new_pte = pfn_pte(pfn, new_prot);
1517 cpa->pfn = pfn;
1518 /*
1519 * Do we really change anything ?
1520 */
1521 if (pte_val(old_pte) != pte_val(new_pte)) {
1522 set_pte_atomic(kpte, new_pte);
1523 cpa->flags |= CPA_FLUSHTLB;
1524 }
1525 cpa->numpages = 1;
1526 return 0;
1527 }
1528
1529 /*
1530 * Check, whether we can keep the large page intact
1531 * and just change the pte:
1532 */
1533 do_split = should_split_large_page(kpte, address, cpa);
1534 /*
1535 * When the range fits into the existing large page,
1536 * return. cp->numpages and cpa->tlbflush have been updated in
1537 * try_large_page:
1538 */
1539 if (do_split <= 0)
1540 return do_split;
1541
1542 /*
1543 * We have to split the large page:
1544 */
1545 err = split_large_page(cpa, kpte, address);
1546 if (!err)
1547 goto repeat;
1548
1549 return err;
1550 }
1551
1552 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1553
1554 static int cpa_process_alias(struct cpa_data *cpa)
1555 {
1556 struct cpa_data alias_cpa;
1557 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1558 unsigned long vaddr;
1559 int ret;
1560
1561 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1562 return 0;
1563
1564 /*
1565 * No need to redo, when the primary call touched the direct
1566 * mapping already:
1567 */
1568 if (cpa->flags & CPA_PAGES_ARRAY) {
1569 struct page *page = cpa->pages[cpa->curpage];
1570 if (unlikely(PageHighMem(page)))
1571 return 0;
1572 vaddr = (unsigned long)page_address(page);
1573 } else if (cpa->flags & CPA_ARRAY)
1574 vaddr = cpa->vaddr[cpa->curpage];
1575 else
1576 vaddr = *cpa->vaddr;
1577
1578 if (!(within(vaddr, PAGE_OFFSET,
1579 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1580
1581 alias_cpa = *cpa;
1582 alias_cpa.vaddr = &laddr;
1583 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1584
1585 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1586 if (ret)
1587 return ret;
1588 }
1589
1590 #ifdef CONFIG_X86_64
1591 /*
1592 * If the primary call didn't touch the high mapping already
1593 * and the physical address is inside the kernel map, we need
1594 * to touch the high mapped kernel as well:
1595 */
1596 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1597 __cpa_pfn_in_highmap(cpa->pfn)) {
1598 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1599 __START_KERNEL_map - phys_base;
1600 alias_cpa = *cpa;
1601 alias_cpa.vaddr = &temp_cpa_vaddr;
1602 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1603
1604 /*
1605 * The high mapping range is imprecise, so ignore the
1606 * return value.
1607 */
1608 __change_page_attr_set_clr(&alias_cpa, 0);
1609 }
1610 #endif
1611
1612 return 0;
1613 }
1614
1615 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1616 {
1617 unsigned long numpages = cpa->numpages;
1618 int ret;
1619
1620 while (numpages) {
1621 /*
1622 * Store the remaining nr of pages for the large page
1623 * preservation check.
1624 */
1625 cpa->numpages = numpages;
1626 /* for array changes, we can't use large page */
1627 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1628 cpa->numpages = 1;
1629
1630 if (!debug_pagealloc_enabled())
1631 spin_lock(&cpa_lock);
1632 ret = __change_page_attr(cpa, checkalias);
1633 if (!debug_pagealloc_enabled())
1634 spin_unlock(&cpa_lock);
1635 if (ret)
1636 return ret;
1637
1638 if (checkalias) {
1639 ret = cpa_process_alias(cpa);
1640 if (ret)
1641 return ret;
1642 }
1643
1644 /*
1645 * Adjust the number of pages with the result of the
1646 * CPA operation. Either a large page has been
1647 * preserved or a single page update happened.
1648 */
1649 BUG_ON(cpa->numpages > numpages || !cpa->numpages);
1650 numpages -= cpa->numpages;
1651 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1652 cpa->curpage++;
1653 else
1654 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1655
1656 }
1657 return 0;
1658 }
1659
1660 /*
1661 * Machine check recovery code needs to change cache mode of poisoned
1662 * pages to UC to avoid speculative access logging another error. But
1663 * passing the address of the 1:1 mapping to set_memory_uc() is a fine
1664 * way to encourage a speculative access. So we cheat and flip the top
1665 * bit of the address. This works fine for the code that updates the
1666 * page tables. But at the end of the process we need to flush the cache
1667 * and the non-canonical address causes a #GP fault when used by the
1668 * CLFLUSH instruction.
1669 *
1670 * But in the common case we already have a canonical address. This code
1671 * will fix the top bit if needed and is a no-op otherwise.
1672 */
1673 static inline unsigned long make_addr_canonical_again(unsigned long addr)
1674 {
1675 #ifdef CONFIG_X86_64
1676 return (long)(addr << 1) >> 1;
1677 #else
1678 return addr;
1679 #endif
1680 }
1681
1682
1683 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1684 pgprot_t mask_set, pgprot_t mask_clr,
1685 int force_split, int in_flag,
1686 struct page **pages)
1687 {
1688 struct cpa_data cpa;
1689 int ret, cache, checkalias;
1690 unsigned long baddr = 0;
1691
1692 memset(&cpa, 0, sizeof(cpa));
1693
1694 /*
1695 * Check, if we are requested to set a not supported
1696 * feature. Clearing non-supported features is OK.
1697 */
1698 mask_set = canon_pgprot(mask_set);
1699
1700 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1701 return 0;
1702
1703 /* Ensure we are PAGE_SIZE aligned */
1704 if (in_flag & CPA_ARRAY) {
1705 int i;
1706 for (i = 0; i < numpages; i++) {
1707 if (addr[i] & ~PAGE_MASK) {
1708 addr[i] &= PAGE_MASK;
1709 WARN_ON_ONCE(1);
1710 }
1711 }
1712 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1713 /*
1714 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1715 * No need to cehck in that case
1716 */
1717 if (*addr & ~PAGE_MASK) {
1718 *addr &= PAGE_MASK;
1719 /*
1720 * People should not be passing in unaligned addresses:
1721 */
1722 WARN_ON_ONCE(1);
1723 }
1724 /*
1725 * Save address for cache flush. *addr is modified in the call
1726 * to __change_page_attr_set_clr() below.
1727 */
1728 baddr = make_addr_canonical_again(*addr);
1729 }
1730
1731 /* Must avoid aliasing mappings in the highmem code */
1732 kmap_flush_unused();
1733
1734 vm_unmap_aliases();
1735
1736 cpa.vaddr = addr;
1737 cpa.pages = pages;
1738 cpa.numpages = numpages;
1739 cpa.mask_set = mask_set;
1740 cpa.mask_clr = mask_clr;
1741 cpa.flags = 0;
1742 cpa.curpage = 0;
1743 cpa.force_split = force_split;
1744
1745 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1746 cpa.flags |= in_flag;
1747
1748 /* No alias checking for _NX bit modifications */
1749 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1750 /* Has caller explicitly disabled alias checking? */
1751 if (in_flag & CPA_NO_CHECK_ALIAS)
1752 checkalias = 0;
1753
1754 ret = __change_page_attr_set_clr(&cpa, checkalias);
1755
1756 /*
1757 * Check whether we really changed something:
1758 */
1759 if (!(cpa.flags & CPA_FLUSHTLB))
1760 goto out;
1761
1762 /*
1763 * No need to flush, when we did not set any of the caching
1764 * attributes:
1765 */
1766 cache = !!pgprot2cachemode(mask_set);
1767
1768 /*
1769 * On error; flush everything to be sure.
1770 */
1771 if (ret) {
1772 cpa_flush_all(cache);
1773 goto out;
1774 }
1775
1776 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1777 cpa_flush_array(baddr, addr, numpages, cache,
1778 cpa.flags, pages);
1779 } else {
1780 cpa_flush_range(baddr, numpages, cache);
1781 }
1782
1783 out:
1784 return ret;
1785 }
1786
1787 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1788 pgprot_t mask, int array)
1789 {
1790 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1791 (array ? CPA_ARRAY : 0), NULL);
1792 }
1793
1794 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1795 pgprot_t mask, int array)
1796 {
1797 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1798 (array ? CPA_ARRAY : 0), NULL);
1799 }
1800
1801 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1802 pgprot_t mask)
1803 {
1804 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1805 CPA_PAGES_ARRAY, pages);
1806 }
1807
1808 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1809 pgprot_t mask)
1810 {
1811 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1812 CPA_PAGES_ARRAY, pages);
1813 }
1814
1815 int _set_memory_uc(unsigned long addr, int numpages)
1816 {
1817 /*
1818 * for now UC MINUS. see comments in ioremap_nocache()
1819 * If you really need strong UC use ioremap_uc(), but note
1820 * that you cannot override IO areas with set_memory_*() as
1821 * these helpers cannot work with IO memory.
1822 */
1823 return change_page_attr_set(&addr, numpages,
1824 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1825 0);
1826 }
1827
1828 int set_memory_uc(unsigned long addr, int numpages)
1829 {
1830 int ret;
1831
1832 /*
1833 * for now UC MINUS. see comments in ioremap_nocache()
1834 */
1835 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1836 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1837 if (ret)
1838 goto out_err;
1839
1840 ret = _set_memory_uc(addr, numpages);
1841 if (ret)
1842 goto out_free;
1843
1844 return 0;
1845
1846 out_free:
1847 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1848 out_err:
1849 return ret;
1850 }
1851 EXPORT_SYMBOL(set_memory_uc);
1852
1853 static int _set_memory_array(unsigned long *addr, int addrinarray,
1854 enum page_cache_mode new_type)
1855 {
1856 enum page_cache_mode set_type;
1857 int i, j;
1858 int ret;
1859
1860 for (i = 0; i < addrinarray; i++) {
1861 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1862 new_type, NULL);
1863 if (ret)
1864 goto out_free;
1865 }
1866
1867 /* If WC, set to UC- first and then WC */
1868 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1869 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1870
1871 ret = change_page_attr_set(addr, addrinarray,
1872 cachemode2pgprot(set_type), 1);
1873
1874 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1875 ret = change_page_attr_set_clr(addr, addrinarray,
1876 cachemode2pgprot(
1877 _PAGE_CACHE_MODE_WC),
1878 __pgprot(_PAGE_CACHE_MASK),
1879 0, CPA_ARRAY, NULL);
1880 if (ret)
1881 goto out_free;
1882
1883 return 0;
1884
1885 out_free:
1886 for (j = 0; j < i; j++)
1887 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1888
1889 return ret;
1890 }
1891
1892 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1893 {
1894 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1895 }
1896 EXPORT_SYMBOL(set_memory_array_uc);
1897
1898 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1899 {
1900 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1901 }
1902 EXPORT_SYMBOL(set_memory_array_wc);
1903
1904 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1905 {
1906 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1907 }
1908 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1909
1910 int _set_memory_wc(unsigned long addr, int numpages)
1911 {
1912 int ret;
1913 unsigned long addr_copy = addr;
1914
1915 ret = change_page_attr_set(&addr, numpages,
1916 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1917 0);
1918 if (!ret) {
1919 ret = change_page_attr_set_clr(&addr_copy, numpages,
1920 cachemode2pgprot(
1921 _PAGE_CACHE_MODE_WC),
1922 __pgprot(_PAGE_CACHE_MASK),
1923 0, 0, NULL);
1924 }
1925 return ret;
1926 }
1927
1928 int set_memory_wc(unsigned long addr, int numpages)
1929 {
1930 int ret;
1931
1932 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1933 _PAGE_CACHE_MODE_WC, NULL);
1934 if (ret)
1935 return ret;
1936
1937 ret = _set_memory_wc(addr, numpages);
1938 if (ret)
1939 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1940
1941 return ret;
1942 }
1943 EXPORT_SYMBOL(set_memory_wc);
1944
1945 int _set_memory_wt(unsigned long addr, int numpages)
1946 {
1947 return change_page_attr_set(&addr, numpages,
1948 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1949 }
1950
1951 int set_memory_wt(unsigned long addr, int numpages)
1952 {
1953 int ret;
1954
1955 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1956 _PAGE_CACHE_MODE_WT, NULL);
1957 if (ret)
1958 return ret;
1959
1960 ret = _set_memory_wt(addr, numpages);
1961 if (ret)
1962 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1963
1964 return ret;
1965 }
1966 EXPORT_SYMBOL_GPL(set_memory_wt);
1967
1968 int _set_memory_wb(unsigned long addr, int numpages)
1969 {
1970 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1971 return change_page_attr_clear(&addr, numpages,
1972 __pgprot(_PAGE_CACHE_MASK), 0);
1973 }
1974
1975 int set_memory_wb(unsigned long addr, int numpages)
1976 {
1977 int ret;
1978
1979 ret = _set_memory_wb(addr, numpages);
1980 if (ret)
1981 return ret;
1982
1983 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1984 return 0;
1985 }
1986 EXPORT_SYMBOL(set_memory_wb);
1987
1988 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1989 {
1990 int i;
1991 int ret;
1992
1993 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1994 ret = change_page_attr_clear(addr, addrinarray,
1995 __pgprot(_PAGE_CACHE_MASK), 1);
1996 if (ret)
1997 return ret;
1998
1999 for (i = 0; i < addrinarray; i++)
2000 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
2001
2002 return 0;
2003 }
2004 EXPORT_SYMBOL(set_memory_array_wb);
2005
2006 int set_memory_x(unsigned long addr, int numpages)
2007 {
2008 if (!(__supported_pte_mask & _PAGE_NX))
2009 return 0;
2010
2011 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
2012 }
2013 EXPORT_SYMBOL(set_memory_x);
2014
2015 int set_memory_nx(unsigned long addr, int numpages)
2016 {
2017 if (!(__supported_pte_mask & _PAGE_NX))
2018 return 0;
2019
2020 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
2021 }
2022 EXPORT_SYMBOL(set_memory_nx);
2023
2024 int set_memory_ro(unsigned long addr, int numpages)
2025 {
2026 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
2027 }
2028
2029 int set_memory_rw(unsigned long addr, int numpages)
2030 {
2031 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
2032 }
2033
2034 int set_memory_np(unsigned long addr, int numpages)
2035 {
2036 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
2037 }
2038
2039 int set_memory_np_noalias(unsigned long addr, int numpages)
2040 {
2041 int cpa_flags = CPA_NO_CHECK_ALIAS;
2042
2043 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
2044 __pgprot(_PAGE_PRESENT), 0,
2045 cpa_flags, NULL);
2046 }
2047
2048 int set_memory_4k(unsigned long addr, int numpages)
2049 {
2050 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
2051 __pgprot(0), 1, 0, NULL);
2052 }
2053
2054 int set_memory_nonglobal(unsigned long addr, int numpages)
2055 {
2056 return change_page_attr_clear(&addr, numpages,
2057 __pgprot(_PAGE_GLOBAL), 0);
2058 }
2059
2060 int set_memory_global(unsigned long addr, int numpages)
2061 {
2062 return change_page_attr_set(&addr, numpages,
2063 __pgprot(_PAGE_GLOBAL), 0);
2064 }
2065
2066 static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc)
2067 {
2068 struct cpa_data cpa;
2069 unsigned long start;
2070 int ret;
2071
2072 /* Nothing to do if memory encryption is not active */
2073 if (!mem_encrypt_active())
2074 return 0;
2075
2076 /* Should not be working on unaligned addresses */
2077 if (WARN_ONCE(addr & ~PAGE_MASK, "misaligned address: %#lx\n", addr))
2078 addr &= PAGE_MASK;
2079
2080 start = addr;
2081
2082 memset(&cpa, 0, sizeof(cpa));
2083 cpa.vaddr = &addr;
2084 cpa.numpages = numpages;
2085 cpa.mask_set = enc ? __pgprot(_PAGE_ENC) : __pgprot(0);
2086 cpa.mask_clr = enc ? __pgprot(0) : __pgprot(_PAGE_ENC);
2087 cpa.pgd = init_mm.pgd;
2088
2089 /* Must avoid aliasing mappings in the highmem code */
2090 kmap_flush_unused();
2091 vm_unmap_aliases();
2092
2093 /*
2094 * Before changing the encryption attribute, we need to flush caches.
2095 */
2096 cpa_flush_range(start, numpages, 1);
2097
2098 ret = __change_page_attr_set_clr(&cpa, 1);
2099
2100 /*
2101 * After changing the encryption attribute, we need to flush TLBs
2102 * again in case any speculative TLB caching occurred (but no need
2103 * to flush caches again). We could just use cpa_flush_all(), but
2104 * in case TLB flushing gets optimized in the cpa_flush_range()
2105 * path use the same logic as above.
2106 */
2107 cpa_flush_range(start, numpages, 0);
2108
2109 return ret;
2110 }
2111
2112 int set_memory_encrypted(unsigned long addr, int numpages)
2113 {
2114 return __set_memory_enc_dec(addr, numpages, true);
2115 }
2116 EXPORT_SYMBOL_GPL(set_memory_encrypted);
2117
2118 int set_memory_decrypted(unsigned long addr, int numpages)
2119 {
2120 return __set_memory_enc_dec(addr, numpages, false);
2121 }
2122 EXPORT_SYMBOL_GPL(set_memory_decrypted);
2123
2124 int set_pages_uc(struct page *page, int numpages)
2125 {
2126 unsigned long addr = (unsigned long)page_address(page);
2127
2128 return set_memory_uc(addr, numpages);
2129 }
2130 EXPORT_SYMBOL(set_pages_uc);
2131
2132 static int _set_pages_array(struct page **pages, int addrinarray,
2133 enum page_cache_mode new_type)
2134 {
2135 unsigned long start;
2136 unsigned long end;
2137 enum page_cache_mode set_type;
2138 int i;
2139 int free_idx;
2140 int ret;
2141
2142 for (i = 0; i < addrinarray; i++) {
2143 if (PageHighMem(pages[i]))
2144 continue;
2145 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
2146 end = start + PAGE_SIZE;
2147 if (reserve_memtype(start, end, new_type, NULL))
2148 goto err_out;
2149 }
2150
2151 /* If WC, set to UC- first and then WC */
2152 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
2153 _PAGE_CACHE_MODE_UC_MINUS : new_type;
2154
2155 ret = cpa_set_pages_array(pages, addrinarray,
2156 cachemode2pgprot(set_type));
2157 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
2158 ret = change_page_attr_set_clr(NULL, addrinarray,
2159 cachemode2pgprot(
2160 _PAGE_CACHE_MODE_WC),
2161 __pgprot(_PAGE_CACHE_MASK),
2162 0, CPA_PAGES_ARRAY, pages);
2163 if (ret)
2164 goto err_out;
2165 return 0; /* Success */
2166 err_out:
2167 free_idx = i;
2168 for (i = 0; i < free_idx; i++) {
2169 if (PageHighMem(pages[i]))
2170 continue;
2171 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
2172 end = start + PAGE_SIZE;
2173 free_memtype(start, end);
2174 }
2175 return -EINVAL;
2176 }
2177
2178 int set_pages_array_uc(struct page **pages, int addrinarray)
2179 {
2180 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
2181 }
2182 EXPORT_SYMBOL(set_pages_array_uc);
2183
2184 int set_pages_array_wc(struct page **pages, int addrinarray)
2185 {
2186 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
2187 }
2188 EXPORT_SYMBOL(set_pages_array_wc);
2189
2190 int set_pages_array_wt(struct page **pages, int addrinarray)
2191 {
2192 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
2193 }
2194 EXPORT_SYMBOL_GPL(set_pages_array_wt);
2195
2196 int set_pages_wb(struct page *page, int numpages)
2197 {
2198 unsigned long addr = (unsigned long)page_address(page);
2199
2200 return set_memory_wb(addr, numpages);
2201 }
2202 EXPORT_SYMBOL(set_pages_wb);
2203
2204 int set_pages_array_wb(struct page **pages, int addrinarray)
2205 {
2206 int retval;
2207 unsigned long start;
2208 unsigned long end;
2209 int i;
2210
2211 /* WB cache mode is hard wired to all cache attribute bits being 0 */
2212 retval = cpa_clear_pages_array(pages, addrinarray,
2213 __pgprot(_PAGE_CACHE_MASK));
2214 if (retval)
2215 return retval;
2216
2217 for (i = 0; i < addrinarray; i++) {
2218 if (PageHighMem(pages[i]))
2219 continue;
2220 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
2221 end = start + PAGE_SIZE;
2222 free_memtype(start, end);
2223 }
2224
2225 return 0;
2226 }
2227 EXPORT_SYMBOL(set_pages_array_wb);
2228
2229 int set_pages_x(struct page *page, int numpages)
2230 {
2231 unsigned long addr = (unsigned long)page_address(page);
2232
2233 return set_memory_x(addr, numpages);
2234 }
2235 EXPORT_SYMBOL(set_pages_x);
2236
2237 int set_pages_nx(struct page *page, int numpages)
2238 {
2239 unsigned long addr = (unsigned long)page_address(page);
2240
2241 return set_memory_nx(addr, numpages);
2242 }
2243 EXPORT_SYMBOL(set_pages_nx);
2244
2245 int set_pages_ro(struct page *page, int numpages)
2246 {
2247 unsigned long addr = (unsigned long)page_address(page);
2248
2249 return set_memory_ro(addr, numpages);
2250 }
2251
2252 int set_pages_rw(struct page *page, int numpages)
2253 {
2254 unsigned long addr = (unsigned long)page_address(page);
2255
2256 return set_memory_rw(addr, numpages);
2257 }
2258
2259 #ifdef CONFIG_DEBUG_PAGEALLOC
2260
2261 static int __set_pages_p(struct page *page, int numpages)
2262 {
2263 unsigned long tempaddr = (unsigned long) page_address(page);
2264 struct cpa_data cpa = { .vaddr = &tempaddr,
2265 .pgd = NULL,
2266 .numpages = numpages,
2267 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2268 .mask_clr = __pgprot(0),
2269 .flags = 0};
2270
2271 /*
2272 * No alias checking needed for setting present flag. otherwise,
2273 * we may need to break large pages for 64-bit kernel text
2274 * mappings (this adds to complexity if we want to do this from
2275 * atomic context especially). Let's keep it simple!
2276 */
2277 return __change_page_attr_set_clr(&cpa, 0);
2278 }
2279
2280 static int __set_pages_np(struct page *page, int numpages)
2281 {
2282 unsigned long tempaddr = (unsigned long) page_address(page);
2283 struct cpa_data cpa = { .vaddr = &tempaddr,
2284 .pgd = NULL,
2285 .numpages = numpages,
2286 .mask_set = __pgprot(0),
2287 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2288 .flags = 0};
2289
2290 /*
2291 * No alias checking needed for setting not present flag. otherwise,
2292 * we may need to break large pages for 64-bit kernel text
2293 * mappings (this adds to complexity if we want to do this from
2294 * atomic context especially). Let's keep it simple!
2295 */
2296 return __change_page_attr_set_clr(&cpa, 0);
2297 }
2298
2299 void __kernel_map_pages(struct page *page, int numpages, int enable)
2300 {
2301 if (PageHighMem(page))
2302 return;
2303 if (!enable) {
2304 debug_check_no_locks_freed(page_address(page),
2305 numpages * PAGE_SIZE);
2306 }
2307
2308 /*
2309 * The return value is ignored as the calls cannot fail.
2310 * Large pages for identity mappings are not used at boot time
2311 * and hence no memory allocations during large page split.
2312 */
2313 if (enable)
2314 __set_pages_p(page, numpages);
2315 else
2316 __set_pages_np(page, numpages);
2317
2318 /*
2319 * We should perform an IPI and flush all tlbs,
2320 * but that can deadlock->flush only current cpu.
2321 * Preemption needs to be disabled around __flush_tlb_all() due to
2322 * CR3 reload in __native_flush_tlb().
2323 */
2324 preempt_disable();
2325 __flush_tlb_all();
2326 preempt_enable();
2327
2328 arch_flush_lazy_mmu_mode();
2329 }
2330
2331 #ifdef CONFIG_HIBERNATION
2332
2333 bool kernel_page_present(struct page *page)
2334 {
2335 unsigned int level;
2336 pte_t *pte;
2337
2338 if (PageHighMem(page))
2339 return false;
2340
2341 pte = lookup_address((unsigned long)page_address(page), &level);
2342 return (pte_val(*pte) & _PAGE_PRESENT);
2343 }
2344
2345 #endif /* CONFIG_HIBERNATION */
2346
2347 #endif /* CONFIG_DEBUG_PAGEALLOC */
2348
2349 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
2350 unsigned numpages, unsigned long page_flags)
2351 {
2352 int retval = -EINVAL;
2353
2354 struct cpa_data cpa = {
2355 .vaddr = &address,
2356 .pfn = pfn,
2357 .pgd = pgd,
2358 .numpages = numpages,
2359 .mask_set = __pgprot(0),
2360 .mask_clr = __pgprot(0),
2361 .flags = 0,
2362 };
2363
2364 if (!(__supported_pte_mask & _PAGE_NX))
2365 goto out;
2366
2367 if (!(page_flags & _PAGE_NX))
2368 cpa.mask_clr = __pgprot(_PAGE_NX);
2369
2370 if (!(page_flags & _PAGE_RW))
2371 cpa.mask_clr = __pgprot(_PAGE_RW);
2372
2373 if (!(page_flags & _PAGE_ENC))
2374 cpa.mask_clr = pgprot_encrypted(cpa.mask_clr);
2375
2376 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
2377
2378 retval = __change_page_attr_set_clr(&cpa, 0);
2379 __flush_tlb_all();
2380
2381 out:
2382 return retval;
2383 }
2384
2385 /*
2386 * The testcases use internal knowledge of the implementation that shouldn't
2387 * be exposed to the rest of the kernel. Include these directly here.
2388 */
2389 #ifdef CONFIG_CPA_DEBUG
2390 #include "pageattr-test.c"
2391 #endif