2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/memblock.h>
7 #include <linux/sched.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
18 #include <asm/e820/api.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <linux/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
27 #include <asm/set_memory.h>
30 * The current flushing context - we pass it instead of 5 arguments:
37 unsigned long numpages
;
40 unsigned force_split
: 1,
41 force_static_prot
: 1;
52 static const int cpa_warn_level
= CPA_PROTECT
;
55 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
56 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
57 * entries change the page attribute in parallel to some other cpu
58 * splitting a large page entry along with changing the attribute.
60 static DEFINE_SPINLOCK(cpa_lock
);
62 #define CPA_FLUSHTLB 1
64 #define CPA_PAGES_ARRAY 4
65 #define CPA_NO_CHECK_ALIAS 8 /* Do not search for aliases */
68 static unsigned long direct_pages_count
[PG_LEVEL_NUM
];
70 void update_page_count(int level
, unsigned long pages
)
72 /* Protect against CPA */
74 direct_pages_count
[level
] += pages
;
75 spin_unlock(&pgd_lock
);
78 static void split_page_count(int level
)
80 if (direct_pages_count
[level
] == 0)
83 direct_pages_count
[level
]--;
84 direct_pages_count
[level
- 1] += PTRS_PER_PTE
;
87 void arch_report_meminfo(struct seq_file
*m
)
89 seq_printf(m
, "DirectMap4k: %8lu kB\n",
90 direct_pages_count
[PG_LEVEL_4K
] << 2);
91 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
92 seq_printf(m
, "DirectMap2M: %8lu kB\n",
93 direct_pages_count
[PG_LEVEL_2M
] << 11);
95 seq_printf(m
, "DirectMap4M: %8lu kB\n",
96 direct_pages_count
[PG_LEVEL_2M
] << 12);
99 seq_printf(m
, "DirectMap1G: %8lu kB\n",
100 direct_pages_count
[PG_LEVEL_1G
] << 20);
103 static inline void split_page_count(int level
) { }
106 #ifdef CONFIG_X86_CPA_STATISTICS
108 static unsigned long cpa_1g_checked
;
109 static unsigned long cpa_1g_sameprot
;
110 static unsigned long cpa_1g_preserved
;
111 static unsigned long cpa_2m_checked
;
112 static unsigned long cpa_2m_sameprot
;
113 static unsigned long cpa_2m_preserved
;
114 static unsigned long cpa_4k_install
;
116 static inline void cpa_inc_1g_checked(void)
121 static inline void cpa_inc_2m_checked(void)
126 static inline void cpa_inc_4k_install(void)
131 static inline void cpa_inc_lp_sameprot(int level
)
133 if (level
== PG_LEVEL_1G
)
139 static inline void cpa_inc_lp_preserved(int level
)
141 if (level
== PG_LEVEL_1G
)
147 static int cpastats_show(struct seq_file
*m
, void *p
)
149 seq_printf(m
, "1G pages checked: %16lu\n", cpa_1g_checked
);
150 seq_printf(m
, "1G pages sameprot: %16lu\n", cpa_1g_sameprot
);
151 seq_printf(m
, "1G pages preserved: %16lu\n", cpa_1g_preserved
);
152 seq_printf(m
, "2M pages checked: %16lu\n", cpa_2m_checked
);
153 seq_printf(m
, "2M pages sameprot: %16lu\n", cpa_2m_sameprot
);
154 seq_printf(m
, "2M pages preserved: %16lu\n", cpa_2m_preserved
);
155 seq_printf(m
, "4K pages set-checked: %16lu\n", cpa_4k_install
);
159 static int cpastats_open(struct inode
*inode
, struct file
*file
)
161 return single_open(file
, cpastats_show
, NULL
);
164 static const struct file_operations cpastats_fops
= {
165 .open
= cpastats_open
,
168 .release
= single_release
,
171 static int __init
cpa_stats_init(void)
173 debugfs_create_file("cpa_stats", S_IRUSR
, arch_debugfs_dir
, NULL
,
177 late_initcall(cpa_stats_init
);
179 static inline void cpa_inc_1g_checked(void) { }
180 static inline void cpa_inc_2m_checked(void) { }
181 static inline void cpa_inc_4k_install(void) { }
182 static inline void cpa_inc_lp_sameprot(int level
) { }
183 static inline void cpa_inc_lp_preserved(int level
) { }
188 within(unsigned long addr
, unsigned long start
, unsigned long end
)
190 return addr
>= start
&& addr
< end
;
194 within_inclusive(unsigned long addr
, unsigned long start
, unsigned long end
)
196 return addr
>= start
&& addr
<= end
;
201 static inline unsigned long highmap_start_pfn(void)
203 return __pa_symbol(_text
) >> PAGE_SHIFT
;
206 static inline unsigned long highmap_end_pfn(void)
208 /* Do not reference physical address outside the kernel. */
209 return __pa_symbol(roundup(_brk_end
, PMD_SIZE
) - 1) >> PAGE_SHIFT
;
212 static bool __cpa_pfn_in_highmap(unsigned long pfn
)
215 * Kernel text has an alias mapping at a high address, known
218 return within_inclusive(pfn
, highmap_start_pfn(), highmap_end_pfn());
223 static bool __cpa_pfn_in_highmap(unsigned long pfn
)
225 /* There is no highmap on 32-bit */
236 * clflush_cache_range - flush a cache range with clflush
237 * @vaddr: virtual start address
238 * @size: number of bytes to flush
240 * clflushopt is an unordered instruction which needs fencing with mfence or
241 * sfence to avoid ordering issues.
243 void clflush_cache_range(void *vaddr
, unsigned int size
)
245 const unsigned long clflush_size
= boot_cpu_data
.x86_clflush_size
;
246 void *p
= (void *)((unsigned long)vaddr
& ~(clflush_size
- 1));
247 void *vend
= vaddr
+ size
;
254 for (; p
< vend
; p
+= clflush_size
)
259 EXPORT_SYMBOL_GPL(clflush_cache_range
);
261 void arch_invalidate_pmem(void *addr
, size_t size
)
263 clflush_cache_range(addr
, size
);
265 EXPORT_SYMBOL_GPL(arch_invalidate_pmem
);
267 static void __cpa_flush_all(void *arg
)
269 unsigned long cache
= (unsigned long)arg
;
272 * Flush all to work around Errata in early athlons regarding
273 * large page flushing.
277 if (cache
&& boot_cpu_data
.x86
>= 4)
281 static void cpa_flush_all(unsigned long cache
)
283 BUG_ON(irqs_disabled() && !early_boot_irqs_disabled
);
285 on_each_cpu(__cpa_flush_all
, (void *) cache
, 1);
288 static bool __inv_flush_all(int cache
)
290 BUG_ON(irqs_disabled() && !early_boot_irqs_disabled
);
292 if (cache
&& !static_cpu_has(X86_FEATURE_CLFLUSH
)) {
293 cpa_flush_all(cache
);
300 static void cpa_flush_range(unsigned long start
, int numpages
, int cache
)
302 unsigned int i
, level
;
305 WARN_ON(PAGE_ALIGN(start
) != start
);
307 if (__inv_flush_all(cache
))
310 flush_tlb_kernel_range(start
, start
+ PAGE_SIZE
* numpages
);
316 * We only need to flush on one CPU,
317 * clflush is a MESI-coherent instruction that
318 * will cause all other CPUs to flush the same
321 for (i
= 0, addr
= start
; i
< numpages
; i
++, addr
+= PAGE_SIZE
) {
322 pte_t
*pte
= lookup_address(addr
, &level
);
325 * Only flush present addresses:
327 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
328 clflush_cache_range((void *) addr
, PAGE_SIZE
);
332 static void cpa_flush_array(unsigned long baddr
, unsigned long *start
,
333 int numpages
, int cache
,
334 int in_flags
, struct page
**pages
)
336 unsigned int i
, level
;
338 if (__inv_flush_all(cache
))
347 * We only need to flush on one CPU,
348 * clflush is a MESI-coherent instruction that
349 * will cause all other CPUs to flush the same
352 for (i
= 0; i
< numpages
; i
++) {
356 if (in_flags
& CPA_PAGES_ARRAY
)
357 addr
= (unsigned long)page_address(pages
[i
]);
361 pte
= lookup_address(addr
, &level
);
364 * Only flush present addresses:
366 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
367 clflush_cache_range((void *)addr
, PAGE_SIZE
);
371 static bool overlaps(unsigned long r1_start
, unsigned long r1_end
,
372 unsigned long r2_start
, unsigned long r2_end
)
374 return (r1_start
<= r2_end
&& r1_end
>= r2_start
) ||
375 (r2_start
<= r1_end
&& r2_end
>= r1_start
);
378 #ifdef CONFIG_PCI_BIOS
380 * The BIOS area between 640k and 1Mb needs to be executable for PCI BIOS
381 * based config access (CONFIG_PCI_GOBIOS) support.
383 #define BIOS_PFN PFN_DOWN(BIOS_BEGIN)
384 #define BIOS_PFN_END PFN_DOWN(BIOS_END - 1)
386 static pgprotval_t
protect_pci_bios(unsigned long spfn
, unsigned long epfn
)
388 if (pcibios_enabled
&& overlaps(spfn
, epfn
, BIOS_PFN
, BIOS_PFN_END
))
393 static pgprotval_t
protect_pci_bios(unsigned long spfn
, unsigned long epfn
)
400 * The .rodata section needs to be read-only. Using the pfn catches all
401 * aliases. This also includes __ro_after_init, so do not enforce until
402 * kernel_set_to_readonly is true.
404 static pgprotval_t
protect_rodata(unsigned long spfn
, unsigned long epfn
)
406 unsigned long epfn_ro
, spfn_ro
= PFN_DOWN(__pa_symbol(__start_rodata
));
409 * Note: __end_rodata is at page aligned and not inclusive, so
410 * subtract 1 to get the last enforced PFN in the rodata area.
412 epfn_ro
= PFN_DOWN(__pa_symbol(__end_rodata
)) - 1;
414 if (kernel_set_to_readonly
&& overlaps(spfn
, epfn
, spfn_ro
, epfn_ro
))
420 * Protect kernel text against becoming non executable by forbidding
421 * _PAGE_NX. This protects only the high kernel mapping (_text -> _etext)
422 * out of which the kernel actually executes. Do not protect the low
425 * This does not cover __inittext since that is gone after boot.
427 static pgprotval_t
protect_kernel_text(unsigned long start
, unsigned long end
)
429 unsigned long t_end
= (unsigned long)_etext
- 1;
430 unsigned long t_start
= (unsigned long)_text
;
432 if (overlaps(start
, end
, t_start
, t_end
))
437 #if defined(CONFIG_X86_64)
439 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
440 * kernel text mappings for the large page aligned text, rodata sections
441 * will be always read-only. For the kernel identity mappings covering the
442 * holes caused by this alignment can be anything that user asks.
444 * This will preserve the large page mappings for kernel text/data at no
447 static pgprotval_t
protect_kernel_text_ro(unsigned long start
,
450 unsigned long t_end
= (unsigned long)__end_rodata_hpage_align
- 1;
451 unsigned long t_start
= (unsigned long)_text
;
454 if (!kernel_set_to_readonly
|| !overlaps(start
, end
, t_start
, t_end
))
457 * Don't enforce the !RW mapping for the kernel text mapping, if
458 * the current mapping is already using small page mapping. No
459 * need to work hard to preserve large page mappings in this case.
461 * This also fixes the Linux Xen paravirt guest boot failure caused
462 * by unexpected read-only mappings for kernel identity
463 * mappings. In this paravirt guest case, the kernel text mapping
464 * and the kernel identity mapping share the same page-table pages,
465 * so the protections for kernel text and identity mappings have to
468 if (lookup_address(start
, &level
) && (level
!= PG_LEVEL_4K
))
473 static pgprotval_t
protect_kernel_text_ro(unsigned long start
,
480 static inline bool conflicts(pgprot_t prot
, pgprotval_t val
)
482 return (pgprot_val(prot
) & ~val
) != pgprot_val(prot
);
485 static inline void check_conflict(int warnlvl
, pgprot_t prot
, pgprotval_t val
,
486 unsigned long start
, unsigned long end
,
487 unsigned long pfn
, const char *txt
)
489 static const char *lvltxt
[] = {
490 [CPA_CONFLICT
] = "conflict",
491 [CPA_PROTECT
] = "protect",
492 [CPA_DETECT
] = "detect",
495 if (warnlvl
> cpa_warn_level
|| !conflicts(prot
, val
))
498 pr_warn("CPA %8s %10s: 0x%016lx - 0x%016lx PFN %lx req %016llx prevent %016llx\n",
499 lvltxt
[warnlvl
], txt
, start
, end
, pfn
, (unsigned long long)pgprot_val(prot
),
500 (unsigned long long)val
);
504 * Certain areas of memory on x86 require very specific protection flags,
505 * for example the BIOS area or kernel text. Callers don't always get this
506 * right (again, ioremap() on BIOS memory is not uncommon) so this function
507 * checks and fixes these known static required protection bits.
509 static inline pgprot_t
static_protections(pgprot_t prot
, unsigned long start
,
510 unsigned long pfn
, unsigned long npg
,
513 pgprotval_t forbidden
, res
;
517 * There is no point in checking RW/NX conflicts when the requested
518 * mapping is setting the page !PRESENT.
520 if (!(pgprot_val(prot
) & _PAGE_PRESENT
))
523 /* Operate on the virtual address */
524 end
= start
+ npg
* PAGE_SIZE
- 1;
526 res
= protect_kernel_text(start
, end
);
527 check_conflict(warnlvl
, prot
, res
, start
, end
, pfn
, "Text NX");
530 res
= protect_kernel_text_ro(start
, end
);
531 check_conflict(warnlvl
, prot
, res
, start
, end
, pfn
, "Text RO");
534 /* Check the PFN directly */
535 res
= protect_pci_bios(pfn
, pfn
+ npg
- 1);
536 check_conflict(warnlvl
, prot
, res
, start
, end
, pfn
, "PCIBIOS NX");
539 res
= protect_rodata(pfn
, pfn
+ npg
- 1);
540 check_conflict(warnlvl
, prot
, res
, start
, end
, pfn
, "Rodata RO");
543 return __pgprot(pgprot_val(prot
) & ~forbidden
);
547 * Lookup the page table entry for a virtual address in a specific pgd.
548 * Return a pointer to the entry and the level of the mapping.
550 pte_t
*lookup_address_in_pgd(pgd_t
*pgd
, unsigned long address
,
557 *level
= PG_LEVEL_NONE
;
562 p4d
= p4d_offset(pgd
, address
);
566 *level
= PG_LEVEL_512G
;
567 if (p4d_large(*p4d
) || !p4d_present(*p4d
))
570 pud
= pud_offset(p4d
, address
);
574 *level
= PG_LEVEL_1G
;
575 if (pud_large(*pud
) || !pud_present(*pud
))
578 pmd
= pmd_offset(pud
, address
);
582 *level
= PG_LEVEL_2M
;
583 if (pmd_large(*pmd
) || !pmd_present(*pmd
))
586 *level
= PG_LEVEL_4K
;
588 return pte_offset_kernel(pmd
, address
);
592 * Lookup the page table entry for a virtual address. Return a pointer
593 * to the entry and the level of the mapping.
595 * Note: We return pud and pmd either when the entry is marked large
596 * or when the present bit is not set. Otherwise we would return a
597 * pointer to a nonexisting mapping.
599 pte_t
*lookup_address(unsigned long address
, unsigned int *level
)
601 return lookup_address_in_pgd(pgd_offset_k(address
), address
, level
);
603 EXPORT_SYMBOL_GPL(lookup_address
);
605 static pte_t
*_lookup_address_cpa(struct cpa_data
*cpa
, unsigned long address
,
609 return lookup_address_in_pgd(cpa
->pgd
+ pgd_index(address
),
612 return lookup_address(address
, level
);
616 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
617 * or NULL if not present.
619 pmd_t
*lookup_pmd_address(unsigned long address
)
625 pgd
= pgd_offset_k(address
);
629 p4d
= p4d_offset(pgd
, address
);
630 if (p4d_none(*p4d
) || p4d_large(*p4d
) || !p4d_present(*p4d
))
633 pud
= pud_offset(p4d
, address
);
634 if (pud_none(*pud
) || pud_large(*pud
) || !pud_present(*pud
))
637 return pmd_offset(pud
, address
);
641 * This is necessary because __pa() does not work on some
642 * kinds of memory, like vmalloc() or the alloc_remap()
643 * areas on 32-bit NUMA systems. The percpu areas can
644 * end up in this kind of memory, for instance.
646 * This could be optimized, but it is only intended to be
647 * used at inititalization time, and keeping it
648 * unoptimized should increase the testing coverage for
649 * the more obscure platforms.
651 phys_addr_t
slow_virt_to_phys(void *__virt_addr
)
653 unsigned long virt_addr
= (unsigned long)__virt_addr
;
654 phys_addr_t phys_addr
;
655 unsigned long offset
;
659 pte
= lookup_address(virt_addr
, &level
);
663 * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
664 * before being left-shifted PAGE_SHIFT bits -- this trick is to
665 * make 32-PAE kernel work correctly.
669 phys_addr
= (phys_addr_t
)pud_pfn(*(pud_t
*)pte
) << PAGE_SHIFT
;
670 offset
= virt_addr
& ~PUD_PAGE_MASK
;
673 phys_addr
= (phys_addr_t
)pmd_pfn(*(pmd_t
*)pte
) << PAGE_SHIFT
;
674 offset
= virt_addr
& ~PMD_PAGE_MASK
;
677 phys_addr
= (phys_addr_t
)pte_pfn(*pte
) << PAGE_SHIFT
;
678 offset
= virt_addr
& ~PAGE_MASK
;
681 return (phys_addr_t
)(phys_addr
| offset
);
683 EXPORT_SYMBOL_GPL(slow_virt_to_phys
);
686 * Set the new pmd in all the pgds we know about:
688 static void __set_pmd_pte(pte_t
*kpte
, unsigned long address
, pte_t pte
)
691 set_pte_atomic(kpte
, pte
);
693 if (!SHARED_KERNEL_PMD
) {
696 list_for_each_entry(page
, &pgd_list
, lru
) {
702 pgd
= (pgd_t
*)page_address(page
) + pgd_index(address
);
703 p4d
= p4d_offset(pgd
, address
);
704 pud
= pud_offset(p4d
, address
);
705 pmd
= pmd_offset(pud
, address
);
706 set_pte_atomic((pte_t
*)pmd
, pte
);
712 static pgprot_t
pgprot_clear_protnone_bits(pgprot_t prot
)
715 * _PAGE_GLOBAL means "global page" for present PTEs.
716 * But, it is also used to indicate _PAGE_PROTNONE
717 * for non-present PTEs.
719 * This ensures that a _PAGE_GLOBAL PTE going from
720 * present to non-present is not confused as
723 if (!(pgprot_val(prot
) & _PAGE_PRESENT
))
724 pgprot_val(prot
) &= ~_PAGE_GLOBAL
;
729 static int __should_split_large_page(pte_t
*kpte
, unsigned long address
,
730 struct cpa_data
*cpa
)
732 unsigned long numpages
, pmask
, psize
, lpaddr
, pfn
, old_pfn
;
733 pgprot_t old_prot
, new_prot
, req_prot
, chk_prot
;
734 pte_t new_pte
, old_pte
, *tmp
;
738 * Check for races, another CPU might have split this page
741 tmp
= _lookup_address_cpa(cpa
, address
, &level
);
747 old_prot
= pmd_pgprot(*(pmd_t
*)kpte
);
748 old_pfn
= pmd_pfn(*(pmd_t
*)kpte
);
749 cpa_inc_2m_checked();
752 old_prot
= pud_pgprot(*(pud_t
*)kpte
);
753 old_pfn
= pud_pfn(*(pud_t
*)kpte
);
754 cpa_inc_1g_checked();
760 psize
= page_level_size(level
);
761 pmask
= page_level_mask(level
);
764 * Calculate the number of pages, which fit into this large
765 * page starting at address:
767 lpaddr
= (address
+ psize
) & pmask
;
768 numpages
= (lpaddr
- address
) >> PAGE_SHIFT
;
769 if (numpages
< cpa
->numpages
)
770 cpa
->numpages
= numpages
;
773 * We are safe now. Check whether the new pgprot is the same:
774 * Convert protection attributes to 4k-format, as cpa->mask* are set
778 /* Clear PSE (aka _PAGE_PAT) and move PAT bit to correct position */
779 req_prot
= pgprot_large_2_4k(old_prot
);
781 pgprot_val(req_prot
) &= ~pgprot_val(cpa
->mask_clr
);
782 pgprot_val(req_prot
) |= pgprot_val(cpa
->mask_set
);
785 * req_prot is in format of 4k pages. It must be converted to large
786 * page format: the caching mode includes the PAT bit located at
787 * different bit positions in the two formats.
789 req_prot
= pgprot_4k_2_large(req_prot
);
790 req_prot
= pgprot_clear_protnone_bits(req_prot
);
791 if (pgprot_val(req_prot
) & _PAGE_PRESENT
)
792 pgprot_val(req_prot
) |= _PAGE_PSE
;
795 * old_pfn points to the large page base pfn. So we need to add the
796 * offset of the virtual address:
798 pfn
= old_pfn
+ ((address
& (psize
- 1)) >> PAGE_SHIFT
);
802 * Calculate the large page base address and the number of 4K pages
805 lpaddr
= address
& pmask
;
806 numpages
= psize
>> PAGE_SHIFT
;
809 * Sanity check that the existing mapping is correct versus the static
810 * protections. static_protections() guards against !PRESENT, so no
811 * extra conditional required here.
813 chk_prot
= static_protections(old_prot
, lpaddr
, old_pfn
, numpages
,
816 if (WARN_ON_ONCE(pgprot_val(chk_prot
) != pgprot_val(old_prot
))) {
818 * Split the large page and tell the split code to
819 * enforce static protections.
821 cpa
->force_static_prot
= 1;
826 * Optimization: If the requested pgprot is the same as the current
827 * pgprot, then the large page can be preserved and no updates are
828 * required independent of alignment and length of the requested
829 * range. The above already established that the current pgprot is
830 * correct, which in consequence makes the requested pgprot correct
831 * as well if it is the same. The static protection scan below will
832 * not come to a different conclusion.
834 if (pgprot_val(req_prot
) == pgprot_val(old_prot
)) {
835 cpa_inc_lp_sameprot(level
);
840 * If the requested range does not cover the full page, split it up
842 if (address
!= lpaddr
|| cpa
->numpages
!= numpages
)
846 * Check whether the requested pgprot is conflicting with a static
847 * protection requirement in the large page.
849 new_prot
= static_protections(req_prot
, lpaddr
, old_pfn
, numpages
,
853 * If there is a conflict, split the large page.
855 * There used to be a 4k wise evaluation trying really hard to
856 * preserve the large pages, but experimentation has shown, that this
857 * does not help at all. There might be corner cases which would
858 * preserve one large page occasionally, but it's really not worth the
859 * extra code and cycles for the common case.
861 if (pgprot_val(req_prot
) != pgprot_val(new_prot
))
864 /* All checks passed. Update the large page mapping. */
865 new_pte
= pfn_pte(old_pfn
, new_prot
);
866 __set_pmd_pte(kpte
, address
, new_pte
);
867 cpa
->flags
|= CPA_FLUSHTLB
;
868 cpa_inc_lp_preserved(level
);
872 static int should_split_large_page(pte_t
*kpte
, unsigned long address
,
873 struct cpa_data
*cpa
)
877 if (cpa
->force_split
)
880 spin_lock(&pgd_lock
);
881 do_split
= __should_split_large_page(kpte
, address
, cpa
);
882 spin_unlock(&pgd_lock
);
887 static void split_set_pte(struct cpa_data
*cpa
, pte_t
*pte
, unsigned long pfn
,
888 pgprot_t ref_prot
, unsigned long address
,
891 unsigned int npg
= PFN_DOWN(size
);
895 * If should_split_large_page() discovered an inconsistent mapping,
896 * remove the invalid protection in the split mapping.
898 if (!cpa
->force_static_prot
)
901 prot
= static_protections(ref_prot
, address
, pfn
, npg
, CPA_PROTECT
);
903 if (pgprot_val(prot
) == pgprot_val(ref_prot
))
907 * If this is splitting a PMD, fix it up. PUD splits cannot be
908 * fixed trivially as that would require to rescan the newly
909 * installed PMD mappings after returning from split_large_page()
910 * so an eventual further split can allocate the necessary PTE
911 * pages. Warn for now and revisit it in case this actually
914 if (size
== PAGE_SIZE
)
917 pr_warn_once("CPA: Cannot fixup static protections for PUD split\n");
919 set_pte(pte
, pfn_pte(pfn
, ref_prot
));
923 __split_large_page(struct cpa_data
*cpa
, pte_t
*kpte
, unsigned long address
,
926 unsigned long lpaddr
, lpinc
, ref_pfn
, pfn
, pfninc
= 1;
927 pte_t
*pbase
= (pte_t
*)page_address(base
);
928 unsigned int i
, level
;
932 spin_lock(&pgd_lock
);
934 * Check for races, another CPU might have split this page
937 tmp
= _lookup_address_cpa(cpa
, address
, &level
);
939 spin_unlock(&pgd_lock
);
943 paravirt_alloc_pte(&init_mm
, page_to_pfn(base
));
947 ref_prot
= pmd_pgprot(*(pmd_t
*)kpte
);
949 * Clear PSE (aka _PAGE_PAT) and move
950 * PAT bit to correct position.
952 ref_prot
= pgprot_large_2_4k(ref_prot
);
953 ref_pfn
= pmd_pfn(*(pmd_t
*)kpte
);
954 lpaddr
= address
& PMD_MASK
;
959 ref_prot
= pud_pgprot(*(pud_t
*)kpte
);
960 ref_pfn
= pud_pfn(*(pud_t
*)kpte
);
961 pfninc
= PMD_PAGE_SIZE
>> PAGE_SHIFT
;
962 lpaddr
= address
& PUD_MASK
;
965 * Clear the PSE flags if the PRESENT flag is not set
966 * otherwise pmd_present/pmd_huge will return true
967 * even on a non present pmd.
969 if (!(pgprot_val(ref_prot
) & _PAGE_PRESENT
))
970 pgprot_val(ref_prot
) &= ~_PAGE_PSE
;
974 spin_unlock(&pgd_lock
);
978 ref_prot
= pgprot_clear_protnone_bits(ref_prot
);
981 * Get the target pfn from the original entry:
984 for (i
= 0; i
< PTRS_PER_PTE
; i
++, pfn
+= pfninc
, lpaddr
+= lpinc
)
985 split_set_pte(cpa
, pbase
+ i
, pfn
, ref_prot
, lpaddr
, lpinc
);
987 if (virt_addr_valid(address
)) {
988 unsigned long pfn
= PFN_DOWN(__pa(address
));
990 if (pfn_range_is_mapped(pfn
, pfn
+ 1))
991 split_page_count(level
);
995 * Install the new, split up pagetable.
997 * We use the standard kernel pagetable protections for the new
998 * pagetable protections, the actual ptes set above control the
999 * primary protection behavior:
1001 __set_pmd_pte(kpte
, address
, mk_pte(base
, __pgprot(_KERNPG_TABLE
)));
1004 * Do a global flush tlb after splitting the large page
1005 * and before we do the actual change page attribute in the PTE.
1007 * Without this, we violate the TLB application note, that says:
1008 * "The TLBs may contain both ordinary and large-page
1009 * translations for a 4-KByte range of linear addresses. This
1010 * may occur if software modifies the paging structures so that
1011 * the page size used for the address range changes. If the two
1012 * translations differ with respect to page frame or attributes
1013 * (e.g., permissions), processor behavior is undefined and may
1014 * be implementation-specific."
1016 * We do this global tlb flush inside the cpa_lock, so that we
1017 * don't allow any other cpu, with stale tlb entries change the
1018 * page attribute in parallel, that also falls into the
1019 * just split large page entry.
1022 spin_unlock(&pgd_lock
);
1027 static int split_large_page(struct cpa_data
*cpa
, pte_t
*kpte
,
1028 unsigned long address
)
1032 if (!debug_pagealloc_enabled())
1033 spin_unlock(&cpa_lock
);
1034 base
= alloc_pages(GFP_KERNEL
, 0);
1035 if (!debug_pagealloc_enabled())
1036 spin_lock(&cpa_lock
);
1040 if (__split_large_page(cpa
, kpte
, address
, base
))
1046 static bool try_to_free_pte_page(pte_t
*pte
)
1050 for (i
= 0; i
< PTRS_PER_PTE
; i
++)
1051 if (!pte_none(pte
[i
]))
1054 free_page((unsigned long)pte
);
1058 static bool try_to_free_pmd_page(pmd_t
*pmd
)
1062 for (i
= 0; i
< PTRS_PER_PMD
; i
++)
1063 if (!pmd_none(pmd
[i
]))
1066 free_page((unsigned long)pmd
);
1070 static bool unmap_pte_range(pmd_t
*pmd
, unsigned long start
, unsigned long end
)
1072 pte_t
*pte
= pte_offset_kernel(pmd
, start
);
1074 while (start
< end
) {
1075 set_pte(pte
, __pte(0));
1081 if (try_to_free_pte_page((pte_t
*)pmd_page_vaddr(*pmd
))) {
1088 static void __unmap_pmd_range(pud_t
*pud
, pmd_t
*pmd
,
1089 unsigned long start
, unsigned long end
)
1091 if (unmap_pte_range(pmd
, start
, end
))
1092 if (try_to_free_pmd_page((pmd_t
*)pud_page_vaddr(*pud
)))
1096 static void unmap_pmd_range(pud_t
*pud
, unsigned long start
, unsigned long end
)
1098 pmd_t
*pmd
= pmd_offset(pud
, start
);
1101 * Not on a 2MB page boundary?
1103 if (start
& (PMD_SIZE
- 1)) {
1104 unsigned long next_page
= (start
+ PMD_SIZE
) & PMD_MASK
;
1105 unsigned long pre_end
= min_t(unsigned long, end
, next_page
);
1107 __unmap_pmd_range(pud
, pmd
, start
, pre_end
);
1114 * Try to unmap in 2M chunks.
1116 while (end
- start
>= PMD_SIZE
) {
1117 if (pmd_large(*pmd
))
1120 __unmap_pmd_range(pud
, pmd
, start
, start
+ PMD_SIZE
);
1130 return __unmap_pmd_range(pud
, pmd
, start
, end
);
1133 * Try again to free the PMD page if haven't succeeded above.
1135 if (!pud_none(*pud
))
1136 if (try_to_free_pmd_page((pmd_t
*)pud_page_vaddr(*pud
)))
1140 static void unmap_pud_range(p4d_t
*p4d
, unsigned long start
, unsigned long end
)
1142 pud_t
*pud
= pud_offset(p4d
, start
);
1145 * Not on a GB page boundary?
1147 if (start
& (PUD_SIZE
- 1)) {
1148 unsigned long next_page
= (start
+ PUD_SIZE
) & PUD_MASK
;
1149 unsigned long pre_end
= min_t(unsigned long, end
, next_page
);
1151 unmap_pmd_range(pud
, start
, pre_end
);
1158 * Try to unmap in 1G chunks?
1160 while (end
- start
>= PUD_SIZE
) {
1162 if (pud_large(*pud
))
1165 unmap_pmd_range(pud
, start
, start
+ PUD_SIZE
);
1175 unmap_pmd_range(pud
, start
, end
);
1178 * No need to try to free the PUD page because we'll free it in
1179 * populate_pgd's error path
1183 static int alloc_pte_page(pmd_t
*pmd
)
1185 pte_t
*pte
= (pte_t
*)get_zeroed_page(GFP_KERNEL
);
1189 set_pmd(pmd
, __pmd(__pa(pte
) | _KERNPG_TABLE
));
1193 static int alloc_pmd_page(pud_t
*pud
)
1195 pmd_t
*pmd
= (pmd_t
*)get_zeroed_page(GFP_KERNEL
);
1199 set_pud(pud
, __pud(__pa(pmd
) | _KERNPG_TABLE
));
1203 static void populate_pte(struct cpa_data
*cpa
,
1204 unsigned long start
, unsigned long end
,
1205 unsigned num_pages
, pmd_t
*pmd
, pgprot_t pgprot
)
1209 pte
= pte_offset_kernel(pmd
, start
);
1211 pgprot
= pgprot_clear_protnone_bits(pgprot
);
1213 while (num_pages
-- && start
< end
) {
1214 set_pte(pte
, pfn_pte(cpa
->pfn
, pgprot
));
1222 static long populate_pmd(struct cpa_data
*cpa
,
1223 unsigned long start
, unsigned long end
,
1224 unsigned num_pages
, pud_t
*pud
, pgprot_t pgprot
)
1228 pgprot_t pmd_pgprot
;
1231 * Not on a 2M boundary?
1233 if (start
& (PMD_SIZE
- 1)) {
1234 unsigned long pre_end
= start
+ (num_pages
<< PAGE_SHIFT
);
1235 unsigned long next_page
= (start
+ PMD_SIZE
) & PMD_MASK
;
1237 pre_end
= min_t(unsigned long, pre_end
, next_page
);
1238 cur_pages
= (pre_end
- start
) >> PAGE_SHIFT
;
1239 cur_pages
= min_t(unsigned int, num_pages
, cur_pages
);
1244 pmd
= pmd_offset(pud
, start
);
1246 if (alloc_pte_page(pmd
))
1249 populate_pte(cpa
, start
, pre_end
, cur_pages
, pmd
, pgprot
);
1255 * We mapped them all?
1257 if (num_pages
== cur_pages
)
1260 pmd_pgprot
= pgprot_4k_2_large(pgprot
);
1262 while (end
- start
>= PMD_SIZE
) {
1265 * We cannot use a 1G page so allocate a PMD page if needed.
1268 if (alloc_pmd_page(pud
))
1271 pmd
= pmd_offset(pud
, start
);
1273 set_pmd(pmd
, pmd_mkhuge(pfn_pmd(cpa
->pfn
,
1274 canon_pgprot(pmd_pgprot
))));
1277 cpa
->pfn
+= PMD_SIZE
>> PAGE_SHIFT
;
1278 cur_pages
+= PMD_SIZE
>> PAGE_SHIFT
;
1282 * Map trailing 4K pages.
1285 pmd
= pmd_offset(pud
, start
);
1287 if (alloc_pte_page(pmd
))
1290 populate_pte(cpa
, start
, end
, num_pages
- cur_pages
,
1296 static int populate_pud(struct cpa_data
*cpa
, unsigned long start
, p4d_t
*p4d
,
1302 pgprot_t pud_pgprot
;
1304 end
= start
+ (cpa
->numpages
<< PAGE_SHIFT
);
1307 * Not on a Gb page boundary? => map everything up to it with
1310 if (start
& (PUD_SIZE
- 1)) {
1311 unsigned long pre_end
;
1312 unsigned long next_page
= (start
+ PUD_SIZE
) & PUD_MASK
;
1314 pre_end
= min_t(unsigned long, end
, next_page
);
1315 cur_pages
= (pre_end
- start
) >> PAGE_SHIFT
;
1316 cur_pages
= min_t(int, (int)cpa
->numpages
, cur_pages
);
1318 pud
= pud_offset(p4d
, start
);
1324 if (alloc_pmd_page(pud
))
1327 cur_pages
= populate_pmd(cpa
, start
, pre_end
, cur_pages
,
1335 /* We mapped them all? */
1336 if (cpa
->numpages
== cur_pages
)
1339 pud
= pud_offset(p4d
, start
);
1340 pud_pgprot
= pgprot_4k_2_large(pgprot
);
1343 * Map everything starting from the Gb boundary, possibly with 1G pages
1345 while (boot_cpu_has(X86_FEATURE_GBPAGES
) && end
- start
>= PUD_SIZE
) {
1346 set_pud(pud
, pud_mkhuge(pfn_pud(cpa
->pfn
,
1347 canon_pgprot(pud_pgprot
))));
1350 cpa
->pfn
+= PUD_SIZE
>> PAGE_SHIFT
;
1351 cur_pages
+= PUD_SIZE
>> PAGE_SHIFT
;
1355 /* Map trailing leftover */
1359 pud
= pud_offset(p4d
, start
);
1361 if (alloc_pmd_page(pud
))
1364 tmp
= populate_pmd(cpa
, start
, end
, cpa
->numpages
- cur_pages
,
1375 * Restrictions for kernel page table do not necessarily apply when mapping in
1378 static int populate_pgd(struct cpa_data
*cpa
, unsigned long addr
)
1380 pgprot_t pgprot
= __pgprot(_KERNPG_TABLE
);
1381 pud_t
*pud
= NULL
; /* shut up gcc */
1386 pgd_entry
= cpa
->pgd
+ pgd_index(addr
);
1388 if (pgd_none(*pgd_entry
)) {
1389 p4d
= (p4d_t
*)get_zeroed_page(GFP_KERNEL
);
1393 set_pgd(pgd_entry
, __pgd(__pa(p4d
) | _KERNPG_TABLE
));
1397 * Allocate a PUD page and hand it down for mapping.
1399 p4d
= p4d_offset(pgd_entry
, addr
);
1400 if (p4d_none(*p4d
)) {
1401 pud
= (pud_t
*)get_zeroed_page(GFP_KERNEL
);
1405 set_p4d(p4d
, __p4d(__pa(pud
) | _KERNPG_TABLE
));
1408 pgprot_val(pgprot
) &= ~pgprot_val(cpa
->mask_clr
);
1409 pgprot_val(pgprot
) |= pgprot_val(cpa
->mask_set
);
1411 ret
= populate_pud(cpa
, addr
, p4d
, pgprot
);
1414 * Leave the PUD page in place in case some other CPU or thread
1415 * already found it, but remove any useless entries we just
1418 unmap_pud_range(p4d
, addr
,
1419 addr
+ (cpa
->numpages
<< PAGE_SHIFT
));
1423 cpa
->numpages
= ret
;
1427 static int __cpa_process_fault(struct cpa_data
*cpa
, unsigned long vaddr
,
1432 * Right now, we only execute this code path when mapping
1433 * the EFI virtual memory map regions, no other users
1434 * provide a ->pgd value. This may change in the future.
1436 return populate_pgd(cpa
, vaddr
);
1440 * Ignore all non primary paths.
1448 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1450 * Also set numpages to '1' indicating that we processed cpa req for
1451 * one virtual address page and its pfn. TBD: numpages can be set based
1452 * on the initial value and the level returned by lookup_address().
1454 if (within(vaddr
, PAGE_OFFSET
,
1455 PAGE_OFFSET
+ (max_pfn_mapped
<< PAGE_SHIFT
))) {
1457 cpa
->pfn
= __pa(vaddr
) >> PAGE_SHIFT
;
1460 } else if (__cpa_pfn_in_highmap(cpa
->pfn
)) {
1461 /* Faults in the highmap are OK, so do not warn: */
1464 WARN(1, KERN_WARNING
"CPA: called for zero pte. "
1465 "vaddr = %lx cpa->vaddr = %lx\n", vaddr
,
1472 static int __change_page_attr(struct cpa_data
*cpa
, int primary
)
1474 unsigned long address
;
1477 pte_t
*kpte
, old_pte
;
1479 if (cpa
->flags
& CPA_PAGES_ARRAY
) {
1480 struct page
*page
= cpa
->pages
[cpa
->curpage
];
1481 if (unlikely(PageHighMem(page
)))
1483 address
= (unsigned long)page_address(page
);
1484 } else if (cpa
->flags
& CPA_ARRAY
)
1485 address
= cpa
->vaddr
[cpa
->curpage
];
1487 address
= *cpa
->vaddr
;
1489 kpte
= _lookup_address_cpa(cpa
, address
, &level
);
1491 return __cpa_process_fault(cpa
, address
, primary
);
1494 if (pte_none(old_pte
))
1495 return __cpa_process_fault(cpa
, address
, primary
);
1497 if (level
== PG_LEVEL_4K
) {
1499 pgprot_t new_prot
= pte_pgprot(old_pte
);
1500 unsigned long pfn
= pte_pfn(old_pte
);
1502 pgprot_val(new_prot
) &= ~pgprot_val(cpa
->mask_clr
);
1503 pgprot_val(new_prot
) |= pgprot_val(cpa
->mask_set
);
1505 cpa_inc_4k_install();
1506 new_prot
= static_protections(new_prot
, address
, pfn
, 1,
1509 new_prot
= pgprot_clear_protnone_bits(new_prot
);
1512 * We need to keep the pfn from the existing PTE,
1513 * after all we're only going to change it's attributes
1514 * not the memory it points to
1516 new_pte
= pfn_pte(pfn
, new_prot
);
1519 * Do we really change anything ?
1521 if (pte_val(old_pte
) != pte_val(new_pte
)) {
1522 set_pte_atomic(kpte
, new_pte
);
1523 cpa
->flags
|= CPA_FLUSHTLB
;
1530 * Check, whether we can keep the large page intact
1531 * and just change the pte:
1533 do_split
= should_split_large_page(kpte
, address
, cpa
);
1535 * When the range fits into the existing large page,
1536 * return. cp->numpages and cpa->tlbflush have been updated in
1543 * We have to split the large page:
1545 err
= split_large_page(cpa
, kpte
, address
);
1552 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
);
1554 static int cpa_process_alias(struct cpa_data
*cpa
)
1556 struct cpa_data alias_cpa
;
1557 unsigned long laddr
= (unsigned long)__va(cpa
->pfn
<< PAGE_SHIFT
);
1558 unsigned long vaddr
;
1561 if (!pfn_range_is_mapped(cpa
->pfn
, cpa
->pfn
+ 1))
1565 * No need to redo, when the primary call touched the direct
1568 if (cpa
->flags
& CPA_PAGES_ARRAY
) {
1569 struct page
*page
= cpa
->pages
[cpa
->curpage
];
1570 if (unlikely(PageHighMem(page
)))
1572 vaddr
= (unsigned long)page_address(page
);
1573 } else if (cpa
->flags
& CPA_ARRAY
)
1574 vaddr
= cpa
->vaddr
[cpa
->curpage
];
1576 vaddr
= *cpa
->vaddr
;
1578 if (!(within(vaddr
, PAGE_OFFSET
,
1579 PAGE_OFFSET
+ (max_pfn_mapped
<< PAGE_SHIFT
)))) {
1582 alias_cpa
.vaddr
= &laddr
;
1583 alias_cpa
.flags
&= ~(CPA_PAGES_ARRAY
| CPA_ARRAY
);
1585 ret
= __change_page_attr_set_clr(&alias_cpa
, 0);
1590 #ifdef CONFIG_X86_64
1592 * If the primary call didn't touch the high mapping already
1593 * and the physical address is inside the kernel map, we need
1594 * to touch the high mapped kernel as well:
1596 if (!within(vaddr
, (unsigned long)_text
, _brk_end
) &&
1597 __cpa_pfn_in_highmap(cpa
->pfn
)) {
1598 unsigned long temp_cpa_vaddr
= (cpa
->pfn
<< PAGE_SHIFT
) +
1599 __START_KERNEL_map
- phys_base
;
1601 alias_cpa
.vaddr
= &temp_cpa_vaddr
;
1602 alias_cpa
.flags
&= ~(CPA_PAGES_ARRAY
| CPA_ARRAY
);
1605 * The high mapping range is imprecise, so ignore the
1608 __change_page_attr_set_clr(&alias_cpa
, 0);
1615 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
)
1617 unsigned long numpages
= cpa
->numpages
;
1622 * Store the remaining nr of pages for the large page
1623 * preservation check.
1625 cpa
->numpages
= numpages
;
1626 /* for array changes, we can't use large page */
1627 if (cpa
->flags
& (CPA_ARRAY
| CPA_PAGES_ARRAY
))
1630 if (!debug_pagealloc_enabled())
1631 spin_lock(&cpa_lock
);
1632 ret
= __change_page_attr(cpa
, checkalias
);
1633 if (!debug_pagealloc_enabled())
1634 spin_unlock(&cpa_lock
);
1639 ret
= cpa_process_alias(cpa
);
1645 * Adjust the number of pages with the result of the
1646 * CPA operation. Either a large page has been
1647 * preserved or a single page update happened.
1649 BUG_ON(cpa
->numpages
> numpages
|| !cpa
->numpages
);
1650 numpages
-= cpa
->numpages
;
1651 if (cpa
->flags
& (CPA_PAGES_ARRAY
| CPA_ARRAY
))
1654 *cpa
->vaddr
+= cpa
->numpages
* PAGE_SIZE
;
1661 * Machine check recovery code needs to change cache mode of poisoned
1662 * pages to UC to avoid speculative access logging another error. But
1663 * passing the address of the 1:1 mapping to set_memory_uc() is a fine
1664 * way to encourage a speculative access. So we cheat and flip the top
1665 * bit of the address. This works fine for the code that updates the
1666 * page tables. But at the end of the process we need to flush the cache
1667 * and the non-canonical address causes a #GP fault when used by the
1668 * CLFLUSH instruction.
1670 * But in the common case we already have a canonical address. This code
1671 * will fix the top bit if needed and is a no-op otherwise.
1673 static inline unsigned long make_addr_canonical_again(unsigned long addr
)
1675 #ifdef CONFIG_X86_64
1676 return (long)(addr
<< 1) >> 1;
1683 static int change_page_attr_set_clr(unsigned long *addr
, int numpages
,
1684 pgprot_t mask_set
, pgprot_t mask_clr
,
1685 int force_split
, int in_flag
,
1686 struct page
**pages
)
1688 struct cpa_data cpa
;
1689 int ret
, cache
, checkalias
;
1690 unsigned long baddr
= 0;
1692 memset(&cpa
, 0, sizeof(cpa
));
1695 * Check, if we are requested to set a not supported
1696 * feature. Clearing non-supported features is OK.
1698 mask_set
= canon_pgprot(mask_set
);
1700 if (!pgprot_val(mask_set
) && !pgprot_val(mask_clr
) && !force_split
)
1703 /* Ensure we are PAGE_SIZE aligned */
1704 if (in_flag
& CPA_ARRAY
) {
1706 for (i
= 0; i
< numpages
; i
++) {
1707 if (addr
[i
] & ~PAGE_MASK
) {
1708 addr
[i
] &= PAGE_MASK
;
1712 } else if (!(in_flag
& CPA_PAGES_ARRAY
)) {
1714 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1715 * No need to cehck in that case
1717 if (*addr
& ~PAGE_MASK
) {
1720 * People should not be passing in unaligned addresses:
1725 * Save address for cache flush. *addr is modified in the call
1726 * to __change_page_attr_set_clr() below.
1728 baddr
= make_addr_canonical_again(*addr
);
1731 /* Must avoid aliasing mappings in the highmem code */
1732 kmap_flush_unused();
1738 cpa
.numpages
= numpages
;
1739 cpa
.mask_set
= mask_set
;
1740 cpa
.mask_clr
= mask_clr
;
1743 cpa
.force_split
= force_split
;
1745 if (in_flag
& (CPA_ARRAY
| CPA_PAGES_ARRAY
))
1746 cpa
.flags
|= in_flag
;
1748 /* No alias checking for _NX bit modifications */
1749 checkalias
= (pgprot_val(mask_set
) | pgprot_val(mask_clr
)) != _PAGE_NX
;
1750 /* Has caller explicitly disabled alias checking? */
1751 if (in_flag
& CPA_NO_CHECK_ALIAS
)
1754 ret
= __change_page_attr_set_clr(&cpa
, checkalias
);
1757 * Check whether we really changed something:
1759 if (!(cpa
.flags
& CPA_FLUSHTLB
))
1763 * No need to flush, when we did not set any of the caching
1766 cache
= !!pgprot2cachemode(mask_set
);
1769 * On error; flush everything to be sure.
1772 cpa_flush_all(cache
);
1776 if (cpa
.flags
& (CPA_PAGES_ARRAY
| CPA_ARRAY
)) {
1777 cpa_flush_array(baddr
, addr
, numpages
, cache
,
1780 cpa_flush_range(baddr
, numpages
, cache
);
1787 static inline int change_page_attr_set(unsigned long *addr
, int numpages
,
1788 pgprot_t mask
, int array
)
1790 return change_page_attr_set_clr(addr
, numpages
, mask
, __pgprot(0), 0,
1791 (array
? CPA_ARRAY
: 0), NULL
);
1794 static inline int change_page_attr_clear(unsigned long *addr
, int numpages
,
1795 pgprot_t mask
, int array
)
1797 return change_page_attr_set_clr(addr
, numpages
, __pgprot(0), mask
, 0,
1798 (array
? CPA_ARRAY
: 0), NULL
);
1801 static inline int cpa_set_pages_array(struct page
**pages
, int numpages
,
1804 return change_page_attr_set_clr(NULL
, numpages
, mask
, __pgprot(0), 0,
1805 CPA_PAGES_ARRAY
, pages
);
1808 static inline int cpa_clear_pages_array(struct page
**pages
, int numpages
,
1811 return change_page_attr_set_clr(NULL
, numpages
, __pgprot(0), mask
, 0,
1812 CPA_PAGES_ARRAY
, pages
);
1815 int _set_memory_uc(unsigned long addr
, int numpages
)
1818 * for now UC MINUS. see comments in ioremap_nocache()
1819 * If you really need strong UC use ioremap_uc(), but note
1820 * that you cannot override IO areas with set_memory_*() as
1821 * these helpers cannot work with IO memory.
1823 return change_page_attr_set(&addr
, numpages
,
1824 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS
),
1828 int set_memory_uc(unsigned long addr
, int numpages
)
1833 * for now UC MINUS. see comments in ioremap_nocache()
1835 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
1836 _PAGE_CACHE_MODE_UC_MINUS
, NULL
);
1840 ret
= _set_memory_uc(addr
, numpages
);
1847 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1851 EXPORT_SYMBOL(set_memory_uc
);
1853 static int _set_memory_array(unsigned long *addr
, int addrinarray
,
1854 enum page_cache_mode new_type
)
1856 enum page_cache_mode set_type
;
1860 for (i
= 0; i
< addrinarray
; i
++) {
1861 ret
= reserve_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
,
1867 /* If WC, set to UC- first and then WC */
1868 set_type
= (new_type
== _PAGE_CACHE_MODE_WC
) ?
1869 _PAGE_CACHE_MODE_UC_MINUS
: new_type
;
1871 ret
= change_page_attr_set(addr
, addrinarray
,
1872 cachemode2pgprot(set_type
), 1);
1874 if (!ret
&& new_type
== _PAGE_CACHE_MODE_WC
)
1875 ret
= change_page_attr_set_clr(addr
, addrinarray
,
1877 _PAGE_CACHE_MODE_WC
),
1878 __pgprot(_PAGE_CACHE_MASK
),
1879 0, CPA_ARRAY
, NULL
);
1886 for (j
= 0; j
< i
; j
++)
1887 free_memtype(__pa(addr
[j
]), __pa(addr
[j
]) + PAGE_SIZE
);
1892 int set_memory_array_uc(unsigned long *addr
, int addrinarray
)
1894 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_MODE_UC_MINUS
);
1896 EXPORT_SYMBOL(set_memory_array_uc
);
1898 int set_memory_array_wc(unsigned long *addr
, int addrinarray
)
1900 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_MODE_WC
);
1902 EXPORT_SYMBOL(set_memory_array_wc
);
1904 int set_memory_array_wt(unsigned long *addr
, int addrinarray
)
1906 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_MODE_WT
);
1908 EXPORT_SYMBOL_GPL(set_memory_array_wt
);
1910 int _set_memory_wc(unsigned long addr
, int numpages
)
1913 unsigned long addr_copy
= addr
;
1915 ret
= change_page_attr_set(&addr
, numpages
,
1916 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS
),
1919 ret
= change_page_attr_set_clr(&addr_copy
, numpages
,
1921 _PAGE_CACHE_MODE_WC
),
1922 __pgprot(_PAGE_CACHE_MASK
),
1928 int set_memory_wc(unsigned long addr
, int numpages
)
1932 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
1933 _PAGE_CACHE_MODE_WC
, NULL
);
1937 ret
= _set_memory_wc(addr
, numpages
);
1939 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1943 EXPORT_SYMBOL(set_memory_wc
);
1945 int _set_memory_wt(unsigned long addr
, int numpages
)
1947 return change_page_attr_set(&addr
, numpages
,
1948 cachemode2pgprot(_PAGE_CACHE_MODE_WT
), 0);
1951 int set_memory_wt(unsigned long addr
, int numpages
)
1955 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
1956 _PAGE_CACHE_MODE_WT
, NULL
);
1960 ret
= _set_memory_wt(addr
, numpages
);
1962 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1966 EXPORT_SYMBOL_GPL(set_memory_wt
);
1968 int _set_memory_wb(unsigned long addr
, int numpages
)
1970 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1971 return change_page_attr_clear(&addr
, numpages
,
1972 __pgprot(_PAGE_CACHE_MASK
), 0);
1975 int set_memory_wb(unsigned long addr
, int numpages
)
1979 ret
= _set_memory_wb(addr
, numpages
);
1983 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1986 EXPORT_SYMBOL(set_memory_wb
);
1988 int set_memory_array_wb(unsigned long *addr
, int addrinarray
)
1993 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1994 ret
= change_page_attr_clear(addr
, addrinarray
,
1995 __pgprot(_PAGE_CACHE_MASK
), 1);
1999 for (i
= 0; i
< addrinarray
; i
++)
2000 free_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
);
2004 EXPORT_SYMBOL(set_memory_array_wb
);
2006 int set_memory_x(unsigned long addr
, int numpages
)
2008 if (!(__supported_pte_mask
& _PAGE_NX
))
2011 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_NX
), 0);
2013 EXPORT_SYMBOL(set_memory_x
);
2015 int set_memory_nx(unsigned long addr
, int numpages
)
2017 if (!(__supported_pte_mask
& _PAGE_NX
))
2020 return change_page_attr_set(&addr
, numpages
, __pgprot(_PAGE_NX
), 0);
2022 EXPORT_SYMBOL(set_memory_nx
);
2024 int set_memory_ro(unsigned long addr
, int numpages
)
2026 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_RW
), 0);
2029 int set_memory_rw(unsigned long addr
, int numpages
)
2031 return change_page_attr_set(&addr
, numpages
, __pgprot(_PAGE_RW
), 0);
2034 int set_memory_np(unsigned long addr
, int numpages
)
2036 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_PRESENT
), 0);
2039 int set_memory_np_noalias(unsigned long addr
, int numpages
)
2041 int cpa_flags
= CPA_NO_CHECK_ALIAS
;
2043 return change_page_attr_set_clr(&addr
, numpages
, __pgprot(0),
2044 __pgprot(_PAGE_PRESENT
), 0,
2048 int set_memory_4k(unsigned long addr
, int numpages
)
2050 return change_page_attr_set_clr(&addr
, numpages
, __pgprot(0),
2051 __pgprot(0), 1, 0, NULL
);
2054 int set_memory_nonglobal(unsigned long addr
, int numpages
)
2056 return change_page_attr_clear(&addr
, numpages
,
2057 __pgprot(_PAGE_GLOBAL
), 0);
2060 int set_memory_global(unsigned long addr
, int numpages
)
2062 return change_page_attr_set(&addr
, numpages
,
2063 __pgprot(_PAGE_GLOBAL
), 0);
2066 static int __set_memory_enc_dec(unsigned long addr
, int numpages
, bool enc
)
2068 struct cpa_data cpa
;
2069 unsigned long start
;
2072 /* Nothing to do if memory encryption is not active */
2073 if (!mem_encrypt_active())
2076 /* Should not be working on unaligned addresses */
2077 if (WARN_ONCE(addr
& ~PAGE_MASK
, "misaligned address: %#lx\n", addr
))
2082 memset(&cpa
, 0, sizeof(cpa
));
2084 cpa
.numpages
= numpages
;
2085 cpa
.mask_set
= enc
? __pgprot(_PAGE_ENC
) : __pgprot(0);
2086 cpa
.mask_clr
= enc
? __pgprot(0) : __pgprot(_PAGE_ENC
);
2087 cpa
.pgd
= init_mm
.pgd
;
2089 /* Must avoid aliasing mappings in the highmem code */
2090 kmap_flush_unused();
2094 * Before changing the encryption attribute, we need to flush caches.
2096 cpa_flush_range(start
, numpages
, 1);
2098 ret
= __change_page_attr_set_clr(&cpa
, 1);
2101 * After changing the encryption attribute, we need to flush TLBs
2102 * again in case any speculative TLB caching occurred (but no need
2103 * to flush caches again). We could just use cpa_flush_all(), but
2104 * in case TLB flushing gets optimized in the cpa_flush_range()
2105 * path use the same logic as above.
2107 cpa_flush_range(start
, numpages
, 0);
2112 int set_memory_encrypted(unsigned long addr
, int numpages
)
2114 return __set_memory_enc_dec(addr
, numpages
, true);
2116 EXPORT_SYMBOL_GPL(set_memory_encrypted
);
2118 int set_memory_decrypted(unsigned long addr
, int numpages
)
2120 return __set_memory_enc_dec(addr
, numpages
, false);
2122 EXPORT_SYMBOL_GPL(set_memory_decrypted
);
2124 int set_pages_uc(struct page
*page
, int numpages
)
2126 unsigned long addr
= (unsigned long)page_address(page
);
2128 return set_memory_uc(addr
, numpages
);
2130 EXPORT_SYMBOL(set_pages_uc
);
2132 static int _set_pages_array(struct page
**pages
, int addrinarray
,
2133 enum page_cache_mode new_type
)
2135 unsigned long start
;
2137 enum page_cache_mode set_type
;
2142 for (i
= 0; i
< addrinarray
; i
++) {
2143 if (PageHighMem(pages
[i
]))
2145 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
2146 end
= start
+ PAGE_SIZE
;
2147 if (reserve_memtype(start
, end
, new_type
, NULL
))
2151 /* If WC, set to UC- first and then WC */
2152 set_type
= (new_type
== _PAGE_CACHE_MODE_WC
) ?
2153 _PAGE_CACHE_MODE_UC_MINUS
: new_type
;
2155 ret
= cpa_set_pages_array(pages
, addrinarray
,
2156 cachemode2pgprot(set_type
));
2157 if (!ret
&& new_type
== _PAGE_CACHE_MODE_WC
)
2158 ret
= change_page_attr_set_clr(NULL
, addrinarray
,
2160 _PAGE_CACHE_MODE_WC
),
2161 __pgprot(_PAGE_CACHE_MASK
),
2162 0, CPA_PAGES_ARRAY
, pages
);
2165 return 0; /* Success */
2168 for (i
= 0; i
< free_idx
; i
++) {
2169 if (PageHighMem(pages
[i
]))
2171 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
2172 end
= start
+ PAGE_SIZE
;
2173 free_memtype(start
, end
);
2178 int set_pages_array_uc(struct page
**pages
, int addrinarray
)
2180 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_MODE_UC_MINUS
);
2182 EXPORT_SYMBOL(set_pages_array_uc
);
2184 int set_pages_array_wc(struct page
**pages
, int addrinarray
)
2186 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_MODE_WC
);
2188 EXPORT_SYMBOL(set_pages_array_wc
);
2190 int set_pages_array_wt(struct page
**pages
, int addrinarray
)
2192 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_MODE_WT
);
2194 EXPORT_SYMBOL_GPL(set_pages_array_wt
);
2196 int set_pages_wb(struct page
*page
, int numpages
)
2198 unsigned long addr
= (unsigned long)page_address(page
);
2200 return set_memory_wb(addr
, numpages
);
2202 EXPORT_SYMBOL(set_pages_wb
);
2204 int set_pages_array_wb(struct page
**pages
, int addrinarray
)
2207 unsigned long start
;
2211 /* WB cache mode is hard wired to all cache attribute bits being 0 */
2212 retval
= cpa_clear_pages_array(pages
, addrinarray
,
2213 __pgprot(_PAGE_CACHE_MASK
));
2217 for (i
= 0; i
< addrinarray
; i
++) {
2218 if (PageHighMem(pages
[i
]))
2220 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
2221 end
= start
+ PAGE_SIZE
;
2222 free_memtype(start
, end
);
2227 EXPORT_SYMBOL(set_pages_array_wb
);
2229 int set_pages_x(struct page
*page
, int numpages
)
2231 unsigned long addr
= (unsigned long)page_address(page
);
2233 return set_memory_x(addr
, numpages
);
2235 EXPORT_SYMBOL(set_pages_x
);
2237 int set_pages_nx(struct page
*page
, int numpages
)
2239 unsigned long addr
= (unsigned long)page_address(page
);
2241 return set_memory_nx(addr
, numpages
);
2243 EXPORT_SYMBOL(set_pages_nx
);
2245 int set_pages_ro(struct page
*page
, int numpages
)
2247 unsigned long addr
= (unsigned long)page_address(page
);
2249 return set_memory_ro(addr
, numpages
);
2252 int set_pages_rw(struct page
*page
, int numpages
)
2254 unsigned long addr
= (unsigned long)page_address(page
);
2256 return set_memory_rw(addr
, numpages
);
2259 #ifdef CONFIG_DEBUG_PAGEALLOC
2261 static int __set_pages_p(struct page
*page
, int numpages
)
2263 unsigned long tempaddr
= (unsigned long) page_address(page
);
2264 struct cpa_data cpa
= { .vaddr
= &tempaddr
,
2266 .numpages
= numpages
,
2267 .mask_set
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
2268 .mask_clr
= __pgprot(0),
2272 * No alias checking needed for setting present flag. otherwise,
2273 * we may need to break large pages for 64-bit kernel text
2274 * mappings (this adds to complexity if we want to do this from
2275 * atomic context especially). Let's keep it simple!
2277 return __change_page_attr_set_clr(&cpa
, 0);
2280 static int __set_pages_np(struct page
*page
, int numpages
)
2282 unsigned long tempaddr
= (unsigned long) page_address(page
);
2283 struct cpa_data cpa
= { .vaddr
= &tempaddr
,
2285 .numpages
= numpages
,
2286 .mask_set
= __pgprot(0),
2287 .mask_clr
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
2291 * No alias checking needed for setting not present flag. otherwise,
2292 * we may need to break large pages for 64-bit kernel text
2293 * mappings (this adds to complexity if we want to do this from
2294 * atomic context especially). Let's keep it simple!
2296 return __change_page_attr_set_clr(&cpa
, 0);
2299 void __kernel_map_pages(struct page
*page
, int numpages
, int enable
)
2301 if (PageHighMem(page
))
2304 debug_check_no_locks_freed(page_address(page
),
2305 numpages
* PAGE_SIZE
);
2309 * The return value is ignored as the calls cannot fail.
2310 * Large pages for identity mappings are not used at boot time
2311 * and hence no memory allocations during large page split.
2314 __set_pages_p(page
, numpages
);
2316 __set_pages_np(page
, numpages
);
2319 * We should perform an IPI and flush all tlbs,
2320 * but that can deadlock->flush only current cpu.
2321 * Preemption needs to be disabled around __flush_tlb_all() due to
2322 * CR3 reload in __native_flush_tlb().
2328 arch_flush_lazy_mmu_mode();
2331 #ifdef CONFIG_HIBERNATION
2333 bool kernel_page_present(struct page
*page
)
2338 if (PageHighMem(page
))
2341 pte
= lookup_address((unsigned long)page_address(page
), &level
);
2342 return (pte_val(*pte
) & _PAGE_PRESENT
);
2345 #endif /* CONFIG_HIBERNATION */
2347 #endif /* CONFIG_DEBUG_PAGEALLOC */
2349 int kernel_map_pages_in_pgd(pgd_t
*pgd
, u64 pfn
, unsigned long address
,
2350 unsigned numpages
, unsigned long page_flags
)
2352 int retval
= -EINVAL
;
2354 struct cpa_data cpa
= {
2358 .numpages
= numpages
,
2359 .mask_set
= __pgprot(0),
2360 .mask_clr
= __pgprot(0),
2364 if (!(__supported_pte_mask
& _PAGE_NX
))
2367 if (!(page_flags
& _PAGE_NX
))
2368 cpa
.mask_clr
= __pgprot(_PAGE_NX
);
2370 if (!(page_flags
& _PAGE_RW
))
2371 cpa
.mask_clr
= __pgprot(_PAGE_RW
);
2373 if (!(page_flags
& _PAGE_ENC
))
2374 cpa
.mask_clr
= pgprot_encrypted(cpa
.mask_clr
);
2376 cpa
.mask_set
= __pgprot(_PAGE_PRESENT
| page_flags
);
2378 retval
= __change_page_attr_set_clr(&cpa
, 0);
2386 * The testcases use internal knowledge of the implementation that shouldn't
2387 * be exposed to the rest of the kernel. Include these directly here.
2389 #ifdef CONFIG_CPA_DEBUG
2390 #include "pageattr-test.c"