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1 #include <linux/mm.h>
2 #include <linux/gfp.h>
3 #include <asm/pgalloc.h>
4 #include <asm/pgtable.h>
5 #include <asm/tlb.h>
6 #include <asm/fixmap.h>
7 #include <asm/mtrr.h>
8
9 #define PGALLOC_GFP (GFP_KERNEL_ACCOUNT | __GFP_NOTRACK | __GFP_ZERO)
10
11 #ifdef CONFIG_HIGHPTE
12 #define PGALLOC_USER_GFP __GFP_HIGHMEM
13 #else
14 #define PGALLOC_USER_GFP 0
15 #endif
16
17 gfp_t __userpte_alloc_gfp = PGALLOC_GFP | PGALLOC_USER_GFP;
18
19 pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
20 {
21 return (pte_t *)__get_free_page(PGALLOC_GFP & ~__GFP_ACCOUNT);
22 }
23
24 pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
25 {
26 struct page *pte;
27
28 pte = alloc_pages(__userpte_alloc_gfp, 0);
29 if (!pte)
30 return NULL;
31 if (!pgtable_page_ctor(pte)) {
32 __free_page(pte);
33 return NULL;
34 }
35 return pte;
36 }
37
38 static int __init setup_userpte(char *arg)
39 {
40 if (!arg)
41 return -EINVAL;
42
43 /*
44 * "userpte=nohigh" disables allocation of user pagetables in
45 * high memory.
46 */
47 if (strcmp(arg, "nohigh") == 0)
48 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
49 else
50 return -EINVAL;
51 return 0;
52 }
53 early_param("userpte", setup_userpte);
54
55 void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
56 {
57 pgtable_page_dtor(pte);
58 paravirt_release_pte(page_to_pfn(pte));
59 tlb_remove_page(tlb, pte);
60 }
61
62 #if CONFIG_PGTABLE_LEVELS > 2
63 void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
64 {
65 struct page *page = virt_to_page(pmd);
66 paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT);
67 /*
68 * NOTE! For PAE, any changes to the top page-directory-pointer-table
69 * entries need a full cr3 reload to flush.
70 */
71 #ifdef CONFIG_X86_PAE
72 tlb->need_flush_all = 1;
73 #endif
74 pgtable_pmd_page_dtor(page);
75 tlb_remove_page(tlb, page);
76 }
77
78 #if CONFIG_PGTABLE_LEVELS > 3
79 void ___pud_free_tlb(struct mmu_gather *tlb, pud_t *pud)
80 {
81 paravirt_release_pud(__pa(pud) >> PAGE_SHIFT);
82 tlb_remove_page(tlb, virt_to_page(pud));
83 }
84 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
85 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
86
87 static inline void pgd_list_add(pgd_t *pgd)
88 {
89 struct page *page = virt_to_page(pgd);
90
91 list_add(&page->lru, &pgd_list);
92 }
93
94 static inline void pgd_list_del(pgd_t *pgd)
95 {
96 struct page *page = virt_to_page(pgd);
97
98 list_del(&page->lru);
99 }
100
101 #define UNSHARED_PTRS_PER_PGD \
102 (SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD)
103
104
105 static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm)
106 {
107 BUILD_BUG_ON(sizeof(virt_to_page(pgd)->index) < sizeof(mm));
108 virt_to_page(pgd)->index = (pgoff_t)mm;
109 }
110
111 struct mm_struct *pgd_page_get_mm(struct page *page)
112 {
113 return (struct mm_struct *)page->index;
114 }
115
116 static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd)
117 {
118 /* If the pgd points to a shared pagetable level (either the
119 ptes in non-PAE, or shared PMD in PAE), then just copy the
120 references from swapper_pg_dir. */
121 if (CONFIG_PGTABLE_LEVELS == 2 ||
122 (CONFIG_PGTABLE_LEVELS == 3 && SHARED_KERNEL_PMD) ||
123 CONFIG_PGTABLE_LEVELS == 4) {
124 clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY,
125 swapper_pg_dir + KERNEL_PGD_BOUNDARY,
126 KERNEL_PGD_PTRS);
127 }
128
129 /* list required to sync kernel mapping updates */
130 if (!SHARED_KERNEL_PMD) {
131 pgd_set_mm(pgd, mm);
132 pgd_list_add(pgd);
133 }
134 }
135
136 static void pgd_dtor(pgd_t *pgd)
137 {
138 if (SHARED_KERNEL_PMD)
139 return;
140
141 spin_lock(&pgd_lock);
142 pgd_list_del(pgd);
143 spin_unlock(&pgd_lock);
144 }
145
146 /*
147 * List of all pgd's needed for non-PAE so it can invalidate entries
148 * in both cached and uncached pgd's; not needed for PAE since the
149 * kernel pmd is shared. If PAE were not to share the pmd a similar
150 * tactic would be needed. This is essentially codepath-based locking
151 * against pageattr.c; it is the unique case in which a valid change
152 * of kernel pagetables can't be lazily synchronized by vmalloc faults.
153 * vmalloc faults work because attached pagetables are never freed.
154 * -- nyc
155 */
156
157 #ifdef CONFIG_X86_PAE
158 /*
159 * In PAE mode, we need to do a cr3 reload (=tlb flush) when
160 * updating the top-level pagetable entries to guarantee the
161 * processor notices the update. Since this is expensive, and
162 * all 4 top-level entries are used almost immediately in a
163 * new process's life, we just pre-populate them here.
164 *
165 * Also, if we're in a paravirt environment where the kernel pmd is
166 * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate
167 * and initialize the kernel pmds here.
168 */
169 #define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD
170
171 void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd)
172 {
173 paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT);
174
175 /* Note: almost everything apart from _PAGE_PRESENT is
176 reserved at the pmd (PDPT) level. */
177 set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT));
178
179 /*
180 * According to Intel App note "TLBs, Paging-Structure Caches,
181 * and Their Invalidation", April 2007, document 317080-001,
182 * section 8.1: in PAE mode we explicitly have to flush the
183 * TLB via cr3 if the top-level pgd is changed...
184 */
185 flush_tlb_mm(mm);
186 }
187 #else /* !CONFIG_X86_PAE */
188
189 /* No need to prepopulate any pagetable entries in non-PAE modes. */
190 #define PREALLOCATED_PMDS 0
191
192 #endif /* CONFIG_X86_PAE */
193
194 static void free_pmds(struct mm_struct *mm, pmd_t *pmds[])
195 {
196 int i;
197
198 for(i = 0; i < PREALLOCATED_PMDS; i++)
199 if (pmds[i]) {
200 pgtable_pmd_page_dtor(virt_to_page(pmds[i]));
201 free_page((unsigned long)pmds[i]);
202 mm_dec_nr_pmds(mm);
203 }
204 }
205
206 static int preallocate_pmds(struct mm_struct *mm, pmd_t *pmds[])
207 {
208 int i;
209 bool failed = false;
210 gfp_t gfp = PGALLOC_GFP;
211
212 if (mm == &init_mm)
213 gfp &= ~__GFP_ACCOUNT;
214
215 for(i = 0; i < PREALLOCATED_PMDS; i++) {
216 pmd_t *pmd = (pmd_t *)__get_free_page(gfp);
217 if (!pmd)
218 failed = true;
219 if (pmd && !pgtable_pmd_page_ctor(virt_to_page(pmd))) {
220 free_page((unsigned long)pmd);
221 pmd = NULL;
222 failed = true;
223 }
224 if (pmd)
225 mm_inc_nr_pmds(mm);
226 pmds[i] = pmd;
227 }
228
229 if (failed) {
230 free_pmds(mm, pmds);
231 return -ENOMEM;
232 }
233
234 return 0;
235 }
236
237 /*
238 * Mop up any pmd pages which may still be attached to the pgd.
239 * Normally they will be freed by munmap/exit_mmap, but any pmd we
240 * preallocate which never got a corresponding vma will need to be
241 * freed manually.
242 */
243 static void pgd_mop_up_pmds(struct mm_struct *mm, pgd_t *pgdp)
244 {
245 int i;
246
247 for(i = 0; i < PREALLOCATED_PMDS; i++) {
248 pgd_t pgd = pgdp[i];
249
250 if (pgd_val(pgd) != 0) {
251 pmd_t *pmd = (pmd_t *)pgd_page_vaddr(pgd);
252
253 pgdp[i] = native_make_pgd(0);
254
255 paravirt_release_pmd(pgd_val(pgd) >> PAGE_SHIFT);
256 pmd_free(mm, pmd);
257 mm_dec_nr_pmds(mm);
258 }
259 }
260 }
261
262 static void pgd_prepopulate_pmd(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmds[])
263 {
264 p4d_t *p4d;
265 pud_t *pud;
266 int i;
267
268 if (PREALLOCATED_PMDS == 0) /* Work around gcc-3.4.x bug */
269 return;
270
271 p4d = p4d_offset(pgd, 0);
272 pud = pud_offset(p4d, 0);
273
274 for (i = 0; i < PREALLOCATED_PMDS; i++, pud++) {
275 pmd_t *pmd = pmds[i];
276
277 if (i >= KERNEL_PGD_BOUNDARY)
278 memcpy(pmd, (pmd_t *)pgd_page_vaddr(swapper_pg_dir[i]),
279 sizeof(pmd_t) * PTRS_PER_PMD);
280
281 pud_populate(mm, pud, pmd);
282 }
283 }
284
285 /*
286 * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also
287 * assumes that pgd should be in one page.
288 *
289 * But kernel with PAE paging that is not running as a Xen domain
290 * only needs to allocate 32 bytes for pgd instead of one page.
291 */
292 #ifdef CONFIG_X86_PAE
293
294 #include <linux/slab.h>
295
296 #define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
297 #define PGD_ALIGN 32
298
299 static struct kmem_cache *pgd_cache;
300
301 static int __init pgd_cache_init(void)
302 {
303 /*
304 * When PAE kernel is running as a Xen domain, it does not use
305 * shared kernel pmd. And this requires a whole page for pgd.
306 */
307 if (!SHARED_KERNEL_PMD)
308 return 0;
309
310 /*
311 * when PAE kernel is not running as a Xen domain, it uses
312 * shared kernel pmd. Shared kernel pmd does not require a whole
313 * page for pgd. We are able to just allocate a 32-byte for pgd.
314 * During boot time, we create a 32-byte slab for pgd table allocation.
315 */
316 pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN,
317 SLAB_PANIC, NULL);
318 if (!pgd_cache)
319 return -ENOMEM;
320
321 return 0;
322 }
323 core_initcall(pgd_cache_init);
324
325 static inline pgd_t *_pgd_alloc(void)
326 {
327 /*
328 * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain.
329 * We allocate one page for pgd.
330 */
331 if (!SHARED_KERNEL_PMD)
332 return (pgd_t *)__get_free_page(PGALLOC_GFP);
333
334 /*
335 * Now PAE kernel is not running as a Xen domain. We can allocate
336 * a 32-byte slab for pgd to save memory space.
337 */
338 return kmem_cache_alloc(pgd_cache, PGALLOC_GFP);
339 }
340
341 static inline void _pgd_free(pgd_t *pgd)
342 {
343 if (!SHARED_KERNEL_PMD)
344 free_page((unsigned long)pgd);
345 else
346 kmem_cache_free(pgd_cache, pgd);
347 }
348 #else
349 static inline pgd_t *_pgd_alloc(void)
350 {
351 return (pgd_t *)__get_free_page(PGALLOC_GFP);
352 }
353
354 static inline void _pgd_free(pgd_t *pgd)
355 {
356 free_page((unsigned long)pgd);
357 }
358 #endif /* CONFIG_X86_PAE */
359
360 pgd_t *pgd_alloc(struct mm_struct *mm)
361 {
362 pgd_t *pgd;
363 pmd_t *pmds[PREALLOCATED_PMDS];
364
365 pgd = _pgd_alloc();
366
367 if (pgd == NULL)
368 goto out;
369
370 mm->pgd = pgd;
371
372 if (preallocate_pmds(mm, pmds) != 0)
373 goto out_free_pgd;
374
375 if (paravirt_pgd_alloc(mm) != 0)
376 goto out_free_pmds;
377
378 /*
379 * Make sure that pre-populating the pmds is atomic with
380 * respect to anything walking the pgd_list, so that they
381 * never see a partially populated pgd.
382 */
383 spin_lock(&pgd_lock);
384
385 pgd_ctor(mm, pgd);
386 pgd_prepopulate_pmd(mm, pgd, pmds);
387
388 spin_unlock(&pgd_lock);
389
390 return pgd;
391
392 out_free_pmds:
393 free_pmds(mm, pmds);
394 out_free_pgd:
395 _pgd_free(pgd);
396 out:
397 return NULL;
398 }
399
400 void pgd_free(struct mm_struct *mm, pgd_t *pgd)
401 {
402 pgd_mop_up_pmds(mm, pgd);
403 pgd_dtor(pgd);
404 paravirt_pgd_free(mm, pgd);
405 _pgd_free(pgd);
406 }
407
408 /*
409 * Used to set accessed or dirty bits in the page table entries
410 * on other architectures. On x86, the accessed and dirty bits
411 * are tracked by hardware. However, do_wp_page calls this function
412 * to also make the pte writeable at the same time the dirty bit is
413 * set. In that case we do actually need to write the PTE.
414 */
415 int ptep_set_access_flags(struct vm_area_struct *vma,
416 unsigned long address, pte_t *ptep,
417 pte_t entry, int dirty)
418 {
419 int changed = !pte_same(*ptep, entry);
420
421 if (changed && dirty) {
422 *ptep = entry;
423 pte_update(vma->vm_mm, address, ptep);
424 }
425
426 return changed;
427 }
428
429 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
430 int pmdp_set_access_flags(struct vm_area_struct *vma,
431 unsigned long address, pmd_t *pmdp,
432 pmd_t entry, int dirty)
433 {
434 int changed = !pmd_same(*pmdp, entry);
435
436 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
437
438 if (changed && dirty) {
439 *pmdp = entry;
440 /*
441 * We had a write-protection fault here and changed the pmd
442 * to to more permissive. No need to flush the TLB for that,
443 * #PF is architecturally guaranteed to do that and in the
444 * worst-case we'll generate a spurious fault.
445 */
446 }
447
448 return changed;
449 }
450
451 int pudp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
452 pud_t *pudp, pud_t entry, int dirty)
453 {
454 int changed = !pud_same(*pudp, entry);
455
456 VM_BUG_ON(address & ~HPAGE_PUD_MASK);
457
458 if (changed && dirty) {
459 *pudp = entry;
460 /*
461 * We had a write-protection fault here and changed the pud
462 * to to more permissive. No need to flush the TLB for that,
463 * #PF is architecturally guaranteed to do that and in the
464 * worst-case we'll generate a spurious fault.
465 */
466 }
467
468 return changed;
469 }
470 #endif
471
472 int ptep_test_and_clear_young(struct vm_area_struct *vma,
473 unsigned long addr, pte_t *ptep)
474 {
475 int ret = 0;
476
477 if (pte_young(*ptep))
478 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
479 (unsigned long *) &ptep->pte);
480
481 if (ret)
482 pte_update(vma->vm_mm, addr, ptep);
483
484 return ret;
485 }
486
487 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
488 int pmdp_test_and_clear_young(struct vm_area_struct *vma,
489 unsigned long addr, pmd_t *pmdp)
490 {
491 int ret = 0;
492
493 if (pmd_young(*pmdp))
494 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
495 (unsigned long *)pmdp);
496
497 return ret;
498 }
499 int pudp_test_and_clear_young(struct vm_area_struct *vma,
500 unsigned long addr, pud_t *pudp)
501 {
502 int ret = 0;
503
504 if (pud_young(*pudp))
505 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
506 (unsigned long *)pudp);
507
508 return ret;
509 }
510 #endif
511
512 int ptep_clear_flush_young(struct vm_area_struct *vma,
513 unsigned long address, pte_t *ptep)
514 {
515 /*
516 * On x86 CPUs, clearing the accessed bit without a TLB flush
517 * doesn't cause data corruption. [ It could cause incorrect
518 * page aging and the (mistaken) reclaim of hot pages, but the
519 * chance of that should be relatively low. ]
520 *
521 * So as a performance optimization don't flush the TLB when
522 * clearing the accessed bit, it will eventually be flushed by
523 * a context switch or a VM operation anyway. [ In the rare
524 * event of it not getting flushed for a long time the delay
525 * shouldn't really matter because there's no real memory
526 * pressure for swapout to react to. ]
527 */
528 return ptep_test_and_clear_young(vma, address, ptep);
529 }
530
531 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
532 int pmdp_clear_flush_young(struct vm_area_struct *vma,
533 unsigned long address, pmd_t *pmdp)
534 {
535 int young;
536
537 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
538
539 young = pmdp_test_and_clear_young(vma, address, pmdp);
540 if (young)
541 flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
542
543 return young;
544 }
545 #endif
546
547 /**
548 * reserve_top_address - reserves a hole in the top of kernel address space
549 * @reserve - size of hole to reserve
550 *
551 * Can be used to relocate the fixmap area and poke a hole in the top
552 * of kernel address space to make room for a hypervisor.
553 */
554 void __init reserve_top_address(unsigned long reserve)
555 {
556 #ifdef CONFIG_X86_32
557 BUG_ON(fixmaps_set > 0);
558 __FIXADDR_TOP = round_down(-reserve, 1 << PMD_SHIFT) - PAGE_SIZE;
559 printk(KERN_INFO "Reserving virtual address space above 0x%08lx (rounded to 0x%08lx)\n",
560 -reserve, __FIXADDR_TOP + PAGE_SIZE);
561 #endif
562 }
563
564 int fixmaps_set;
565
566 void __native_set_fixmap(enum fixed_addresses idx, pte_t pte)
567 {
568 unsigned long address = __fix_to_virt(idx);
569
570 if (idx >= __end_of_fixed_addresses) {
571 BUG();
572 return;
573 }
574 set_pte_vaddr(address, pte);
575 fixmaps_set++;
576 }
577
578 void native_set_fixmap(enum fixed_addresses idx, phys_addr_t phys,
579 pgprot_t flags)
580 {
581 __native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags));
582 }
583
584 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
585 /**
586 * pud_set_huge - setup kernel PUD mapping
587 *
588 * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this
589 * function sets up a huge page only if any of the following conditions are met:
590 *
591 * - MTRRs are disabled, or
592 *
593 * - MTRRs are enabled and the range is completely covered by a single MTRR, or
594 *
595 * - MTRRs are enabled and the corresponding MTRR memory type is WB, which
596 * has no effect on the requested PAT memory type.
597 *
598 * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger
599 * page mapping attempt fails.
600 *
601 * Returns 1 on success and 0 on failure.
602 */
603 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
604 {
605 u8 mtrr, uniform;
606
607 mtrr = mtrr_type_lookup(addr, addr + PUD_SIZE, &uniform);
608 if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) &&
609 (mtrr != MTRR_TYPE_WRBACK))
610 return 0;
611
612 prot = pgprot_4k_2_large(prot);
613
614 set_pte((pte_t *)pud, pfn_pte(
615 (u64)addr >> PAGE_SHIFT,
616 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
617
618 return 1;
619 }
620
621 /**
622 * pmd_set_huge - setup kernel PMD mapping
623 *
624 * See text over pud_set_huge() above.
625 *
626 * Returns 1 on success and 0 on failure.
627 */
628 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
629 {
630 u8 mtrr, uniform;
631
632 mtrr = mtrr_type_lookup(addr, addr + PMD_SIZE, &uniform);
633 if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) &&
634 (mtrr != MTRR_TYPE_WRBACK)) {
635 pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR override.\n",
636 __func__, addr, addr + PMD_SIZE);
637 return 0;
638 }
639
640 prot = pgprot_4k_2_large(prot);
641
642 set_pte((pte_t *)pmd, pfn_pte(
643 (u64)addr >> PAGE_SHIFT,
644 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
645
646 return 1;
647 }
648
649 /**
650 * pud_clear_huge - clear kernel PUD mapping when it is set
651 *
652 * Returns 1 on success and 0 on failure (no PUD map is found).
653 */
654 int pud_clear_huge(pud_t *pud)
655 {
656 if (pud_large(*pud)) {
657 pud_clear(pud);
658 return 1;
659 }
660
661 return 0;
662 }
663
664 /**
665 * pmd_clear_huge - clear kernel PMD mapping when it is set
666 *
667 * Returns 1 on success and 0 on failure (no PMD map is found).
668 */
669 int pmd_clear_huge(pmd_t *pmd)
670 {
671 if (pmd_large(*pmd)) {
672 pmd_clear(pmd);
673 return 1;
674 }
675
676 return 0;
677 }
678 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */