2 * Low-Level PCI Support for PC -- Routing of Interrupts
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/types.h>
8 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/slab.h>
12 #include <linux/interrupt.h>
13 #include <linux/dmi.h>
15 #include <linux/smp.h>
16 #include <asm/io_apic.h>
17 #include <linux/irq.h>
18 #include <linux/acpi.h>
22 #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
23 #define PIRQ_VERSION 0x0100
25 static int broken_hp_bios_irq9
;
26 static int acer_tm360_irqrouting
;
28 static struct irq_routing_table
*pirq_table
;
30 static int pirq_enable_irq(struct pci_dev
*dev
);
33 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
34 * Avoid using: 13, 14 and 15 (FP error and IDE).
35 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
37 unsigned int pcibios_irq_mask
= 0xfff8;
39 static int pirq_penalty
[16] = {
40 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
41 0, 0, 0, 0, 1000, 100000, 100000, 100000
47 int (*get
)(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
);
48 int (*set
)(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int new);
51 struct irq_router_handler
{
53 int (*probe
)(struct irq_router
*r
, struct pci_dev
*router
, u16 device
);
56 int (*pcibios_enable_irq
)(struct pci_dev
*dev
) = NULL
;
57 void (*pcibios_disable_irq
)(struct pci_dev
*dev
) = NULL
;
60 * Check passed address for the PCI IRQ Routing Table signature
61 * and perform checksum verification.
64 static inline struct irq_routing_table
*pirq_check_routing_table(u8
*addr
)
66 struct irq_routing_table
*rt
;
70 rt
= (struct irq_routing_table
*) addr
;
71 if (rt
->signature
!= PIRQ_SIGNATURE
||
72 rt
->version
!= PIRQ_VERSION
||
74 rt
->size
< sizeof(struct irq_routing_table
))
77 for (i
= 0; i
< rt
->size
; i
++)
80 DBG(KERN_DEBUG
"PCI: Interrupt Routing Table found at 0x%p\n", rt
);
89 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
92 static struct irq_routing_table
* __init
pirq_find_routing_table(void)
95 struct irq_routing_table
*rt
;
97 if (pirq_table_addr
) {
98 rt
= pirq_check_routing_table((u8
*) __va(pirq_table_addr
));
101 printk(KERN_WARNING
"PCI: PIRQ table NOT found at pirqaddr\n");
103 for (addr
= (u8
*) __va(0xf0000); addr
< (u8
*) __va(0x100000); addr
+= 16) {
104 rt
= pirq_check_routing_table(addr
);
112 * If we have a IRQ routing table, use it to search for peer host
113 * bridges. It's a gross hack, but since there are no other known
114 * ways how to get a list of buses, we have to go this way.
117 static void __init
pirq_peer_trick(void)
119 struct irq_routing_table
*rt
= pirq_table
;
124 memset(busmap
, 0, sizeof(busmap
));
125 for (i
= 0; i
< (rt
->size
- sizeof(struct irq_routing_table
)) / sizeof(struct irq_info
); i
++) {
130 DBG(KERN_DEBUG
"%02x:%02x slot=%02x", e
->bus
, e
->devfn
/8, e
->slot
);
131 for (j
= 0; j
< 4; j
++)
132 DBG(" %d:%02x/%04x", j
, e
->irq
[j
].link
, e
->irq
[j
].bitmap
);
138 for (i
= 1; i
< 256; i
++) {
140 if (!busmap
[i
] || pci_find_bus(0, i
))
142 node
= get_mp_bus_to_node(i
);
143 if (pci_scan_bus_on_node(i
, &pci_root_ops
, node
))
144 printk(KERN_INFO
"PCI: Discovered primary peer "
145 "bus %02x [IRQ]\n", i
);
147 pcibios_last_bus
= -1;
151 * Code for querying and setting of IRQ routes on various interrupt routers.
154 void eisa_set_level_irq(unsigned int irq
)
156 unsigned char mask
= 1 << (irq
& 7);
157 unsigned int port
= 0x4d0 + (irq
>> 3);
159 static u16 eisa_irq_mask
;
161 if (irq
>= 16 || (1 << irq
) & eisa_irq_mask
)
164 eisa_irq_mask
|= (1 << irq
);
165 printk(KERN_DEBUG
"PCI: setting IRQ %u as level-triggered\n", irq
);
168 DBG(KERN_DEBUG
" -> edge");
169 outb(val
| mask
, port
);
174 * Common IRQ routing practice: nibbles in config space,
175 * offset by some magic constant.
177 static unsigned int read_config_nybble(struct pci_dev
*router
, unsigned offset
, unsigned nr
)
180 unsigned reg
= offset
+ (nr
>> 1);
182 pci_read_config_byte(router
, reg
, &x
);
183 return (nr
& 1) ? (x
>> 4) : (x
& 0xf);
186 static void write_config_nybble(struct pci_dev
*router
, unsigned offset
, unsigned nr
, unsigned int val
)
189 unsigned reg
= offset
+ (nr
>> 1);
191 pci_read_config_byte(router
, reg
, &x
);
192 x
= (nr
& 1) ? ((x
& 0x0f) | (val
<< 4)) : ((x
& 0xf0) | val
);
193 pci_write_config_byte(router
, reg
, x
);
197 * ALI pirq entries are damn ugly, and completely undocumented.
198 * This has been figured out from pirq tables, and it's not a pretty
201 static int pirq_ali_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
203 static const unsigned char irqmap
[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
205 WARN_ON_ONCE(pirq
> 16);
206 return irqmap
[read_config_nybble(router
, 0x48, pirq
-1)];
209 static int pirq_ali_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
211 static const unsigned char irqmap
[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
212 unsigned int val
= irqmap
[irq
];
214 WARN_ON_ONCE(pirq
> 16);
216 write_config_nybble(router
, 0x48, pirq
-1, val
);
223 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
224 * just a pointer to the config space.
226 static int pirq_piix_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
230 pci_read_config_byte(router
, pirq
, &x
);
231 return (x
< 16) ? x
: 0;
234 static int pirq_piix_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
236 pci_write_config_byte(router
, pirq
, irq
);
241 * The VIA pirq rules are nibble-based, like ALI,
242 * but without the ugly irq number munging.
243 * However, PIRQD is in the upper instead of lower 4 bits.
245 static int pirq_via_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
247 return read_config_nybble(router
, 0x55, pirq
== 4 ? 5 : pirq
);
250 static int pirq_via_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
252 write_config_nybble(router
, 0x55, pirq
== 4 ? 5 : pirq
, irq
);
257 * The VIA pirq rules are nibble-based, like ALI,
258 * but without the ugly irq number munging.
259 * However, for 82C586, nibble map is different .
261 static int pirq_via586_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
263 static const unsigned int pirqmap
[5] = { 3, 2, 5, 1, 1 };
265 WARN_ON_ONCE(pirq
> 5);
266 return read_config_nybble(router
, 0x55, pirqmap
[pirq
-1]);
269 static int pirq_via586_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
271 static const unsigned int pirqmap
[5] = { 3, 2, 5, 1, 1 };
273 WARN_ON_ONCE(pirq
> 5);
274 write_config_nybble(router
, 0x55, pirqmap
[pirq
-1], irq
);
279 * ITE 8330G pirq rules are nibble-based
280 * FIXME: pirqmap may be { 1, 0, 3, 2 },
281 * 2+3 are both mapped to irq 9 on my system
283 static int pirq_ite_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
285 static const unsigned char pirqmap
[4] = { 1, 0, 2, 3 };
287 WARN_ON_ONCE(pirq
> 4);
288 return read_config_nybble(router
, 0x43, pirqmap
[pirq
-1]);
291 static int pirq_ite_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
293 static const unsigned char pirqmap
[4] = { 1, 0, 2, 3 };
295 WARN_ON_ONCE(pirq
> 4);
296 write_config_nybble(router
, 0x43, pirqmap
[pirq
-1], irq
);
301 * OPTI: high four bits are nibble pointer..
302 * I wonder what the low bits do?
304 static int pirq_opti_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
306 return read_config_nybble(router
, 0xb8, pirq
>> 4);
309 static int pirq_opti_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
311 write_config_nybble(router
, 0xb8, pirq
>> 4, irq
);
316 * Cyrix: nibble offset 0x5C
317 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
318 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
320 static int pirq_cyrix_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
322 return read_config_nybble(router
, 0x5C, (pirq
-1)^1);
325 static int pirq_cyrix_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
327 write_config_nybble(router
, 0x5C, (pirq
-1)^1, irq
);
332 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
333 * We have to deal with the following issues here:
334 * - vendors have different ideas about the meaning of link values
335 * - some onboard devices (integrated in the chipset) have special
336 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
337 * - different revision of the router have a different layout for
338 * the routing registers, particularly for the onchip devices
340 * For all routing registers the common thing is we have one byte
341 * per routeable link which is defined as:
342 * bit 7 IRQ mapping enabled (0) or disabled (1)
343 * bits [6:4] reserved (sometimes used for onchip devices)
344 * bits [3:0] IRQ to map to
345 * allowed: 3-7, 9-12, 14-15
346 * reserved: 0, 1, 2, 8, 13
348 * The config-space registers located at 0x41/0x42/0x43/0x44 are
349 * always used to route the normal PCI INT A/B/C/D respectively.
350 * Apparently there are systems implementing PCI routing table using
351 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
352 * We try our best to handle both link mappings.
354 * Currently (2003-05-21) it appears most SiS chipsets follow the
355 * definition of routing registers from the SiS-5595 southbridge.
356 * According to the SiS 5595 datasheets the revision id's of the
357 * router (ISA-bridge) should be 0x01 or 0xb0.
359 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
360 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
361 * They seem to work with the current routing code. However there is
362 * some concern because of the two USB-OHCI HCs (original SiS 5595
363 * had only one). YMMV.
365 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
368 * bits [6:5] must be written 01
369 * bit 4 channel-select primary (0), secondary (1)
372 * bit 6 OHCI function disabled (0), enabled (1)
374 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
376 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
378 * We support USBIRQ (in addition to INTA-INTD) and keep the
379 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
381 * Currently the only reported exception is the new SiS 65x chipset
382 * which includes the SiS 69x southbridge. Here we have the 85C503
383 * router revision 0x04 and there are changes in the register layout
384 * mostly related to the different USB HCs with USB 2.0 support.
386 * Onchip routing for router rev-id 0x04 (try-and-error observation)
388 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
389 * bit 6-4 are probably unused, not like 5595
392 #define PIRQ_SIS_IRQ_MASK 0x0f
393 #define PIRQ_SIS_IRQ_DISABLE 0x80
394 #define PIRQ_SIS_USB_ENABLE 0x40
396 static int pirq_sis_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
402 if (reg
>= 0x01 && reg
<= 0x04)
404 pci_read_config_byte(router
, reg
, &x
);
405 return (x
& PIRQ_SIS_IRQ_DISABLE
) ? 0 : (x
& PIRQ_SIS_IRQ_MASK
);
408 static int pirq_sis_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
414 if (reg
>= 0x01 && reg
<= 0x04)
416 pci_read_config_byte(router
, reg
, &x
);
417 x
&= ~(PIRQ_SIS_IRQ_MASK
| PIRQ_SIS_IRQ_DISABLE
);
418 x
|= irq
? irq
: PIRQ_SIS_IRQ_DISABLE
;
419 pci_write_config_byte(router
, reg
, x
);
425 * VLSI: nibble offset 0x74 - educated guess due to routing table and
426 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
427 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
428 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
429 * for the busbridge to the docking station.
432 static int pirq_vlsi_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
434 WARN_ON_ONCE(pirq
>= 9);
436 printk(KERN_INFO
"VLSI router pirq escape (%d)\n", pirq
);
439 return read_config_nybble(router
, 0x74, pirq
-1);
442 static int pirq_vlsi_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
444 WARN_ON_ONCE(pirq
>= 9);
446 printk(KERN_INFO
"VLSI router pirq escape (%d)\n", pirq
);
449 write_config_nybble(router
, 0x74, pirq
-1, irq
);
454 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
455 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
456 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
457 * register is a straight binary coding of desired PIC IRQ (low nibble).
459 * The 'link' value in the PIRQ table is already in the correct format
460 * for the Index register. There are some special index values:
461 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
462 * and 0x03 for SMBus.
464 static int pirq_serverworks_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
467 return inb(0xc01) & 0xf;
470 static int pirq_serverworks_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
477 /* Support for AMD756 PCI IRQ Routing
478 * Jhon H. Caicedo <jhcaiced@osso.org.co>
479 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
480 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
481 * The AMD756 pirq rules are nibble-based
482 * offset 0x56 0-3 PIRQA 4-7 PIRQB
483 * offset 0x57 0-3 PIRQC 4-7 PIRQD
485 static int pirq_amd756_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
490 irq
= read_config_nybble(router
, 0x56, pirq
- 1);
491 printk(KERN_INFO
"AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
492 dev
->vendor
, dev
->device
, pirq
, irq
);
496 static int pirq_amd756_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
498 printk(KERN_INFO
"AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
499 dev
->vendor
, dev
->device
, pirq
, irq
);
501 write_config_nybble(router
, 0x56, pirq
- 1, irq
);
508 static int pirq_pico_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
510 outb(0x10 + ((pirq
- 1) >> 1), 0x24);
511 return ((pirq
- 1) & 1) ? (inb(0x26) >> 4) : (inb(0x26) & 0xf);
514 static int pirq_pico_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
,
518 outb(0x10 + ((pirq
- 1) >> 1), 0x24);
520 x
= ((pirq
- 1) & 1) ? ((x
& 0x0f) | (irq
<< 4)) : ((x
& 0xf0) | (irq
));
525 #ifdef CONFIG_PCI_BIOS
527 static int pirq_bios_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
529 struct pci_dev
*bridge
;
530 int pin
= pci_get_interrupt_pin(dev
, &bridge
);
531 return pcibios_set_irq_routing(bridge
, pin
, irq
);
536 static __init
int intel_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
538 static struct pci_device_id __initdata pirq_440gx
[] = {
539 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82443GX_0
) },
540 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82443GX_2
) },
544 /* 440GX has a proprietary PIRQ router -- don't use it */
545 if (pci_dev_present(pirq_440gx
))
549 case PCI_DEVICE_ID_INTEL_82371FB_0
:
550 case PCI_DEVICE_ID_INTEL_82371SB_0
:
551 case PCI_DEVICE_ID_INTEL_82371AB_0
:
552 case PCI_DEVICE_ID_INTEL_82371MX
:
553 case PCI_DEVICE_ID_INTEL_82443MX_0
:
554 case PCI_DEVICE_ID_INTEL_82801AA_0
:
555 case PCI_DEVICE_ID_INTEL_82801AB_0
:
556 case PCI_DEVICE_ID_INTEL_82801BA_0
:
557 case PCI_DEVICE_ID_INTEL_82801BA_10
:
558 case PCI_DEVICE_ID_INTEL_82801CA_0
:
559 case PCI_DEVICE_ID_INTEL_82801CA_12
:
560 case PCI_DEVICE_ID_INTEL_82801DB_0
:
561 case PCI_DEVICE_ID_INTEL_82801E_0
:
562 case PCI_DEVICE_ID_INTEL_82801EB_0
:
563 case PCI_DEVICE_ID_INTEL_ESB_1
:
564 case PCI_DEVICE_ID_INTEL_ICH6_0
:
565 case PCI_DEVICE_ID_INTEL_ICH6_1
:
566 case PCI_DEVICE_ID_INTEL_ICH7_0
:
567 case PCI_DEVICE_ID_INTEL_ICH7_1
:
568 case PCI_DEVICE_ID_INTEL_ICH7_30
:
569 case PCI_DEVICE_ID_INTEL_ICH7_31
:
570 case PCI_DEVICE_ID_INTEL_ESB2_0
:
571 case PCI_DEVICE_ID_INTEL_ICH8_0
:
572 case PCI_DEVICE_ID_INTEL_ICH8_1
:
573 case PCI_DEVICE_ID_INTEL_ICH8_2
:
574 case PCI_DEVICE_ID_INTEL_ICH8_3
:
575 case PCI_DEVICE_ID_INTEL_ICH8_4
:
576 case PCI_DEVICE_ID_INTEL_ICH9_0
:
577 case PCI_DEVICE_ID_INTEL_ICH9_1
:
578 case PCI_DEVICE_ID_INTEL_ICH9_2
:
579 case PCI_DEVICE_ID_INTEL_ICH9_3
:
580 case PCI_DEVICE_ID_INTEL_ICH9_4
:
581 case PCI_DEVICE_ID_INTEL_ICH9_5
:
582 case PCI_DEVICE_ID_INTEL_TOLAPAI_0
:
583 case PCI_DEVICE_ID_INTEL_ICH10_0
:
584 case PCI_DEVICE_ID_INTEL_ICH10_1
:
585 case PCI_DEVICE_ID_INTEL_ICH10_2
:
586 case PCI_DEVICE_ID_INTEL_ICH10_3
:
587 r
->name
= "PIIX/ICH";
588 r
->get
= pirq_piix_get
;
589 r
->set
= pirq_piix_set
;
595 static __init
int via_router_probe(struct irq_router
*r
,
596 struct pci_dev
*router
, u16 device
)
598 /* FIXME: We should move some of the quirk fixup stuff here */
601 * workarounds for some buggy BIOSes
603 if (device
== PCI_DEVICE_ID_VIA_82C586_0
) {
604 switch (router
->device
) {
605 case PCI_DEVICE_ID_VIA_82C686
:
607 * Asus k7m bios wrongly reports 82C686A
610 device
= PCI_DEVICE_ID_VIA_82C686
;
612 case PCI_DEVICE_ID_VIA_8235
:
614 * Asus a7v-x bios wrongly reports 8235
617 device
= PCI_DEVICE_ID_VIA_8235
;
619 case PCI_DEVICE_ID_VIA_8237
:
621 * Asus a7v600 bios wrongly reports 8237
624 device
= PCI_DEVICE_ID_VIA_8237
;
630 case PCI_DEVICE_ID_VIA_82C586_0
:
632 r
->get
= pirq_via586_get
;
633 r
->set
= pirq_via586_set
;
635 case PCI_DEVICE_ID_VIA_82C596
:
636 case PCI_DEVICE_ID_VIA_82C686
:
637 case PCI_DEVICE_ID_VIA_8231
:
638 case PCI_DEVICE_ID_VIA_8233A
:
639 case PCI_DEVICE_ID_VIA_8235
:
640 case PCI_DEVICE_ID_VIA_8237
:
641 /* FIXME: add new ones for 8233/5 */
643 r
->get
= pirq_via_get
;
644 r
->set
= pirq_via_set
;
650 static __init
int vlsi_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
653 case PCI_DEVICE_ID_VLSI_82C534
:
654 r
->name
= "VLSI 82C534";
655 r
->get
= pirq_vlsi_get
;
656 r
->set
= pirq_vlsi_set
;
663 static __init
int serverworks_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
666 case PCI_DEVICE_ID_SERVERWORKS_OSB4
:
667 case PCI_DEVICE_ID_SERVERWORKS_CSB5
:
668 r
->name
= "ServerWorks";
669 r
->get
= pirq_serverworks_get
;
670 r
->set
= pirq_serverworks_set
;
676 static __init
int sis_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
678 if (device
!= PCI_DEVICE_ID_SI_503
)
682 r
->get
= pirq_sis_get
;
683 r
->set
= pirq_sis_set
;
687 static __init
int cyrix_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
690 case PCI_DEVICE_ID_CYRIX_5520
:
692 r
->get
= pirq_cyrix_get
;
693 r
->set
= pirq_cyrix_set
;
699 static __init
int opti_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
702 case PCI_DEVICE_ID_OPTI_82C700
:
704 r
->get
= pirq_opti_get
;
705 r
->set
= pirq_opti_set
;
711 static __init
int ite_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
714 case PCI_DEVICE_ID_ITE_IT8330G_0
:
716 r
->get
= pirq_ite_get
;
717 r
->set
= pirq_ite_set
;
723 static __init
int ali_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
726 case PCI_DEVICE_ID_AL_M1533
:
727 case PCI_DEVICE_ID_AL_M1563
:
728 printk(KERN_DEBUG
"PCI: Using ALI IRQ Router\n");
730 r
->get
= pirq_ali_get
;
731 r
->set
= pirq_ali_set
;
737 static __init
int amd_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
740 case PCI_DEVICE_ID_AMD_VIPER_740B
:
743 case PCI_DEVICE_ID_AMD_VIPER_7413
:
746 case PCI_DEVICE_ID_AMD_VIPER_7443
:
752 r
->get
= pirq_amd756_get
;
753 r
->set
= pirq_amd756_set
;
757 static __init
int pico_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
760 case PCI_DEVICE_ID_PICOPOWER_PT86C523
:
761 r
->name
= "PicoPower PT86C523";
762 r
->get
= pirq_pico_get
;
763 r
->set
= pirq_pico_set
;
766 case PCI_DEVICE_ID_PICOPOWER_PT86C523BBP
:
767 r
->name
= "PicoPower PT86C523 rev. BB+";
768 r
->get
= pirq_pico_get
;
769 r
->set
= pirq_pico_set
;
775 static __initdata
struct irq_router_handler pirq_routers
[] = {
776 { PCI_VENDOR_ID_INTEL
, intel_router_probe
},
777 { PCI_VENDOR_ID_AL
, ali_router_probe
},
778 { PCI_VENDOR_ID_ITE
, ite_router_probe
},
779 { PCI_VENDOR_ID_VIA
, via_router_probe
},
780 { PCI_VENDOR_ID_OPTI
, opti_router_probe
},
781 { PCI_VENDOR_ID_SI
, sis_router_probe
},
782 { PCI_VENDOR_ID_CYRIX
, cyrix_router_probe
},
783 { PCI_VENDOR_ID_VLSI
, vlsi_router_probe
},
784 { PCI_VENDOR_ID_SERVERWORKS
, serverworks_router_probe
},
785 { PCI_VENDOR_ID_AMD
, amd_router_probe
},
786 { PCI_VENDOR_ID_PICOPOWER
, pico_router_probe
},
787 /* Someone with docs needs to add the ATI Radeon IGP */
790 static struct irq_router pirq_router
;
791 static struct pci_dev
*pirq_router_dev
;
795 * FIXME: should we have an option to say "generic for
799 static void __init
pirq_find_router(struct irq_router
*r
)
801 struct irq_routing_table
*rt
= pirq_table
;
802 struct irq_router_handler
*h
;
804 #ifdef CONFIG_PCI_BIOS
805 if (!rt
->signature
) {
806 printk(KERN_INFO
"PCI: Using BIOS for IRQ routing\n");
807 r
->set
= pirq_bios_set
;
813 /* Default unless a driver reloads it */
818 DBG(KERN_DEBUG
"PCI: Attempting to find IRQ router for %04x:%04x\n",
819 rt
->rtr_vendor
, rt
->rtr_device
);
821 pirq_router_dev
= pci_get_bus_and_slot(rt
->rtr_bus
, rt
->rtr_devfn
);
822 if (!pirq_router_dev
) {
823 DBG(KERN_DEBUG
"PCI: Interrupt router not found at "
824 "%02x:%02x\n", rt
->rtr_bus
, rt
->rtr_devfn
);
828 for (h
= pirq_routers
; h
->vendor
; h
++) {
829 /* First look for a router match */
830 if (rt
->rtr_vendor
== h
->vendor
&& h
->probe(r
, pirq_router_dev
, rt
->rtr_device
))
832 /* Fall back to a device match */
833 if (pirq_router_dev
->vendor
== h
->vendor
&& h
->probe(r
, pirq_router_dev
, pirq_router_dev
->device
))
836 printk(KERN_INFO
"PCI: Using IRQ router %s [%04x/%04x] at %s\n",
838 pirq_router_dev
->vendor
,
839 pirq_router_dev
->device
,
840 pci_name(pirq_router_dev
));
842 /* The device remains referenced for the kernel lifetime */
845 static struct irq_info
*pirq_get_info(struct pci_dev
*dev
)
847 struct irq_routing_table
*rt
= pirq_table
;
848 int entries
= (rt
->size
- sizeof(struct irq_routing_table
)) / sizeof(struct irq_info
);
849 struct irq_info
*info
;
851 for (info
= rt
->slots
; entries
--; info
++)
852 if (info
->bus
== dev
->bus
->number
&& PCI_SLOT(info
->devfn
) == PCI_SLOT(dev
->devfn
))
857 static int pcibios_lookup_irq(struct pci_dev
*dev
, int assign
)
860 struct irq_info
*info
;
864 struct irq_router
*r
= &pirq_router
;
865 struct pci_dev
*dev2
= NULL
;
869 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
871 DBG(KERN_DEBUG
" -> no interrupt pin\n");
876 /* Find IRQ routing entry */
881 DBG(KERN_DEBUG
"IRQ for %s[%c]", pci_name(dev
), 'A' + pin
);
882 info
= pirq_get_info(dev
);
884 DBG(" -> not found in routing table\n" KERN_DEBUG
);
887 pirq
= info
->irq
[pin
].link
;
888 mask
= info
->irq
[pin
].bitmap
;
890 DBG(" -> not routed\n" KERN_DEBUG
);
893 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq
, mask
, pirq_table
->exclusive_irqs
);
894 mask
&= pcibios_irq_mask
;
896 /* Work around broken HP Pavilion Notebooks which assign USB to
897 IRQ 9 even though it is actually wired to IRQ 11 */
899 if (broken_hp_bios_irq9
&& pirq
== 0x59 && dev
->irq
== 9) {
901 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, 11);
902 r
->set(pirq_router_dev
, dev
, pirq
, 11);
905 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
906 if (acer_tm360_irqrouting
&& dev
->irq
== 11 && dev
->vendor
== PCI_VENDOR_ID_O2
) {
909 dev
->irq
= r
->get(pirq_router_dev
, dev
, pirq
);
910 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, dev
->irq
);
914 * Find the best IRQ to assign: use the one
915 * reported by the device if possible.
918 if (newirq
&& !((1 << newirq
) & mask
)) {
919 if (pci_probe
& PCI_USE_PIRQ_MASK
)
922 printk("\n" KERN_WARNING
923 "PCI: IRQ %i for device %s doesn't match PIRQ mask "
924 "- try pci=usepirqmask\n" KERN_DEBUG
, newirq
,
927 if (!newirq
&& assign
) {
928 for (i
= 0; i
< 16; i
++) {
929 if (!(mask
& (1 << i
)))
931 if (pirq_penalty
[i
] < pirq_penalty
[newirq
] && can_request_irq(i
, IRQF_SHARED
))
935 DBG(" -> newirq=%d", newirq
);
937 /* Check if it is hardcoded */
938 if ((pirq
& 0xf0) == 0xf0) {
940 DBG(" -> hardcoded IRQ %d\n", irq
);
942 } else if (r
->get
&& (irq
= r
->get(pirq_router_dev
, dev
, pirq
)) && \
943 ((!(pci_probe
& PCI_USE_PIRQ_MASK
)) || ((1 << irq
) & mask
))) {
944 DBG(" -> got IRQ %d\n", irq
);
946 eisa_set_level_irq(irq
);
947 } else if (newirq
&& r
->set
&& (dev
->class >> 8) != PCI_CLASS_DISPLAY_VGA
) {
948 DBG(" -> assigning IRQ %d", newirq
);
949 if (r
->set(pirq_router_dev
, dev
, pirq
, newirq
)) {
950 eisa_set_level_irq(newirq
);
958 DBG(" ... failed\n");
959 if (newirq
&& mask
== (1 << newirq
)) {
965 printk(KERN_INFO
"PCI: %s IRQ %d for device %s\n", msg
, irq
, pci_name(dev
));
967 /* Update IRQ for all devices with the same pirq value */
968 while ((dev2
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev2
)) != NULL
) {
969 pci_read_config_byte(dev2
, PCI_INTERRUPT_PIN
, &pin
);
973 info
= pirq_get_info(dev2
);
976 if (info
->irq
[pin
].link
== pirq
) {
977 /* We refuse to override the dev->irq information. Give a warning! */
978 if (dev2
->irq
&& dev2
->irq
!= irq
&& \
979 (!(pci_probe
& PCI_USE_PIRQ_MASK
) || \
980 ((1 << dev2
->irq
) & mask
))) {
981 #ifndef CONFIG_PCI_MSI
982 printk(KERN_INFO
"IRQ routing conflict for %s, have irq %d, want irq %d\n",
983 pci_name(dev2
), dev2
->irq
, irq
);
990 printk(KERN_INFO
"PCI: Sharing IRQ %d with %s\n", irq
, pci_name(dev2
));
996 static void __init
pcibios_fixup_irqs(void)
998 struct pci_dev
*dev
= NULL
;
1001 DBG(KERN_DEBUG
"PCI: IRQ fixup\n");
1002 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
1004 * If the BIOS has set an out of range IRQ number, just ignore it.
1005 * Also keep track of which IRQ's are already in use.
1007 if (dev
->irq
>= 16) {
1008 DBG(KERN_DEBUG
"%s: ignoring bogus IRQ %d\n", pci_name(dev
), dev
->irq
);
1011 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
1012 if (pirq_penalty
[dev
->irq
] >= 100 && pirq_penalty
[dev
->irq
] < 100000)
1013 pirq_penalty
[dev
->irq
] = 0;
1014 pirq_penalty
[dev
->irq
]++;
1018 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
1019 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
1020 #ifdef CONFIG_X86_IO_APIC
1022 * Recalculate IRQ numbers if we use the I/O APIC.
1024 if (io_apic_assign_pci_irqs
) {
1028 pin
--; /* interrupt pins are numbered starting from 1 */
1029 irq
= IO_APIC_get_PCI_irq_vector(dev
->bus
->number
, PCI_SLOT(dev
->devfn
), pin
);
1031 * Busses behind bridges are typically not listed in the MP-table.
1032 * In this case we have to look up the IRQ based on the parent bus,
1033 * parent slot, and pin number. The SMP code detects such bridged
1034 * busses itself so we should get into this branch reliably.
1036 if (irq
< 0 && dev
->bus
->parent
) { /* go back to the bridge */
1037 struct pci_dev
*bridge
= dev
->bus
->self
;
1039 pin
= (pin
+ PCI_SLOT(dev
->devfn
)) % 4;
1040 irq
= IO_APIC_get_PCI_irq_vector(bridge
->bus
->number
,
1041 PCI_SLOT(bridge
->devfn
), pin
);
1043 printk(KERN_WARNING
"PCI: using PPB %s[%c] to get irq %d\n",
1044 pci_name(bridge
), 'A' + pin
, irq
);
1047 printk(KERN_INFO
"PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1048 pci_name(dev
), 'A' + pin
, irq
);
1055 * Still no IRQ? Try to lookup one...
1057 if (pin
&& !dev
->irq
)
1058 pcibios_lookup_irq(dev
, 0);
1063 * Work around broken HP Pavilion Notebooks which assign USB to
1064 * IRQ 9 even though it is actually wired to IRQ 11
1066 static int __init
fix_broken_hp_bios_irq9(const struct dmi_system_id
*d
)
1068 if (!broken_hp_bios_irq9
) {
1069 broken_hp_bios_irq9
= 1;
1070 printk(KERN_INFO
"%s detected - fixing broken IRQ routing\n", d
->ident
);
1076 * Work around broken Acer TravelMate 360 Notebooks which assign
1077 * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
1079 static int __init
fix_acer_tm360_irqrouting(const struct dmi_system_id
*d
)
1081 if (!acer_tm360_irqrouting
) {
1082 acer_tm360_irqrouting
= 1;
1083 printk(KERN_INFO
"%s detected - fixing broken IRQ routing\n", d
->ident
);
1088 static struct dmi_system_id __initdata pciirq_dmi_table
[] = {
1090 .callback
= fix_broken_hp_bios_irq9
,
1091 .ident
= "HP Pavilion N5400 Series Laptop",
1093 DMI_MATCH(DMI_SYS_VENDOR
, "Hewlett-Packard"),
1094 DMI_MATCH(DMI_BIOS_VERSION
, "GE.M1.03"),
1095 DMI_MATCH(DMI_PRODUCT_VERSION
, "HP Pavilion Notebook Model GE"),
1096 DMI_MATCH(DMI_BOARD_VERSION
, "OmniBook N32N-736"),
1100 .callback
= fix_acer_tm360_irqrouting
,
1101 .ident
= "Acer TravelMate 36x Laptop",
1103 DMI_MATCH(DMI_SYS_VENDOR
, "Acer"),
1104 DMI_MATCH(DMI_PRODUCT_NAME
, "TravelMate 360"),
1110 int __init
pcibios_irq_init(void)
1112 DBG(KERN_DEBUG
"PCI: IRQ init\n");
1114 if (pcibios_enable_irq
|| raw_pci_ops
== NULL
)
1117 dmi_check_system(pciirq_dmi_table
);
1119 pirq_table
= pirq_find_routing_table();
1121 #ifdef CONFIG_PCI_BIOS
1122 if (!pirq_table
&& (pci_probe
& PCI_BIOS_IRQ_SCAN
))
1123 pirq_table
= pcibios_get_irq_routing_table();
1127 pirq_find_router(&pirq_router
);
1128 if (pirq_table
->exclusive_irqs
) {
1130 for (i
= 0; i
< 16; i
++)
1131 if (!(pirq_table
->exclusive_irqs
& (1 << i
)))
1132 pirq_penalty
[i
] += 100;
1134 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
1135 if (io_apic_assign_pci_irqs
)
1139 pcibios_enable_irq
= pirq_enable_irq
;
1141 pcibios_fixup_irqs();
1145 static void pirq_penalize_isa_irq(int irq
, int active
)
1148 * If any ISAPnP device reports an IRQ in its list of possible
1149 * IRQ's, we try to avoid assigning it to PCI devices.
1153 pirq_penalty
[irq
] += 1000;
1155 pirq_penalty
[irq
] += 100;
1159 void pcibios_penalize_isa_irq(int irq
, int active
)
1163 acpi_penalize_isa_irq(irq
, active
);
1166 pirq_penalize_isa_irq(irq
, active
);
1169 static int pirq_enable_irq(struct pci_dev
*dev
)
1172 struct pci_dev
*temp_dev
;
1174 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
1175 if (pin
&& !pcibios_lookup_irq(dev
, 1) && !dev
->irq
) {
1178 pin
--; /* interrupt pins are numbered starting from 1 */
1180 if (io_apic_assign_pci_irqs
) {
1183 irq
= IO_APIC_get_PCI_irq_vector(dev
->bus
->number
, PCI_SLOT(dev
->devfn
), pin
);
1185 * Busses behind bridges are typically not listed in the MP-table.
1186 * In this case we have to look up the IRQ based on the parent bus,
1187 * parent slot, and pin number. The SMP code detects such bridged
1188 * busses itself so we should get into this branch reliably.
1191 while (irq
< 0 && dev
->bus
->parent
) { /* go back to the bridge */
1192 struct pci_dev
*bridge
= dev
->bus
->self
;
1194 pin
= (pin
+ PCI_SLOT(dev
->devfn
)) % 4;
1195 irq
= IO_APIC_get_PCI_irq_vector(bridge
->bus
->number
,
1196 PCI_SLOT(bridge
->devfn
), pin
);
1198 printk(KERN_WARNING
"PCI: using PPB %s[%c] to get irq %d\n",
1199 pci_name(bridge
), 'A' + pin
, irq
);
1204 printk(KERN_INFO
"PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1205 pci_name(dev
), 'A' + pin
, irq
);
1209 msg
= " Probably buggy MP table.";
1210 } else if (pci_probe
& PCI_BIOS_IRQ_SCAN
)
1213 msg
= " Please try using pci=biosirq.";
1215 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1216 if (dev
->class >> 8 == PCI_CLASS_STORAGE_IDE
&& !(dev
->class & 0x5))
1219 printk(KERN_WARNING
"PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1220 'A' + pin
, pci_name(dev
), msg
);