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x86/platform/uv: Disable UV BAU by default
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1 /*
2 * SGI UltraViolet TLB flush routines.
3 *
4 * (c) 2008-2014 Cliff Wickman <cpw@sgi.com>, SGI.
5 *
6 * This code is released under the GNU General Public License version 2 or
7 * later.
8 */
9 #include <linux/seq_file.h>
10 #include <linux/proc_fs.h>
11 #include <linux/debugfs.h>
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
14 #include <linux/delay.h>
15
16 #include <asm/mmu_context.h>
17 #include <asm/uv/uv.h>
18 #include <asm/uv/uv_mmrs.h>
19 #include <asm/uv/uv_hub.h>
20 #include <asm/uv/uv_bau.h>
21 #include <asm/apic.h>
22 #include <asm/idle.h>
23 #include <asm/tsc.h>
24 #include <asm/irq_vectors.h>
25 #include <asm/timer.h>
26
27 /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
28 static int timeout_base_ns[] = {
29 20,
30 160,
31 1280,
32 10240,
33 81920,
34 655360,
35 5242880,
36 167772160
37 };
38
39 static int timeout_us;
40 static bool nobau = true;
41 static int nobau_perm;
42 static cycles_t congested_cycles;
43
44 /* tunables: */
45 static int max_concurr = MAX_BAU_CONCURRENT;
46 static int max_concurr_const = MAX_BAU_CONCURRENT;
47 static int plugged_delay = PLUGGED_DELAY;
48 static int plugsb4reset = PLUGSB4RESET;
49 static int giveup_limit = GIVEUP_LIMIT;
50 static int timeoutsb4reset = TIMEOUTSB4RESET;
51 static int ipi_reset_limit = IPI_RESET_LIMIT;
52 static int complete_threshold = COMPLETE_THRESHOLD;
53 static int congested_respns_us = CONGESTED_RESPONSE_US;
54 static int congested_reps = CONGESTED_REPS;
55 static int disabled_period = DISABLED_PERIOD;
56
57 static struct tunables tunables[] = {
58 {&max_concurr, MAX_BAU_CONCURRENT}, /* must be [0] */
59 {&plugged_delay, PLUGGED_DELAY},
60 {&plugsb4reset, PLUGSB4RESET},
61 {&timeoutsb4reset, TIMEOUTSB4RESET},
62 {&ipi_reset_limit, IPI_RESET_LIMIT},
63 {&complete_threshold, COMPLETE_THRESHOLD},
64 {&congested_respns_us, CONGESTED_RESPONSE_US},
65 {&congested_reps, CONGESTED_REPS},
66 {&disabled_period, DISABLED_PERIOD},
67 {&giveup_limit, GIVEUP_LIMIT}
68 };
69
70 static struct dentry *tunables_dir;
71 static struct dentry *tunables_file;
72
73 /* these correspond to the statistics printed by ptc_seq_show() */
74 static char *stat_description[] = {
75 "sent: number of shootdown messages sent",
76 "stime: time spent sending messages",
77 "numuvhubs: number of hubs targeted with shootdown",
78 "numuvhubs16: number times 16 or more hubs targeted",
79 "numuvhubs8: number times 8 or more hubs targeted",
80 "numuvhubs4: number times 4 or more hubs targeted",
81 "numuvhubs2: number times 2 or more hubs targeted",
82 "numuvhubs1: number times 1 hub targeted",
83 "numcpus: number of cpus targeted with shootdown",
84 "dto: number of destination timeouts",
85 "retries: destination timeout retries sent",
86 "rok: : destination timeouts successfully retried",
87 "resetp: ipi-style resource resets for plugs",
88 "resett: ipi-style resource resets for timeouts",
89 "giveup: fall-backs to ipi-style shootdowns",
90 "sto: number of source timeouts",
91 "bz: number of stay-busy's",
92 "throt: number times spun in throttle",
93 "swack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
94 "recv: shootdown messages received",
95 "rtime: time spent processing messages",
96 "all: shootdown all-tlb messages",
97 "one: shootdown one-tlb messages",
98 "mult: interrupts that found multiple messages",
99 "none: interrupts that found no messages",
100 "retry: number of retry messages processed",
101 "canc: number messages canceled by retries",
102 "nocan: number retries that found nothing to cancel",
103 "reset: number of ipi-style reset requests processed",
104 "rcan: number messages canceled by reset requests",
105 "disable: number times use of the BAU was disabled",
106 "enable: number times use of the BAU was re-enabled"
107 };
108
109 static int __init setup_bau(char *arg)
110 {
111 int result;
112
113 if (!arg)
114 return -EINVAL;
115
116 result = strtobool(arg, &nobau);
117 if (result)
118 return result;
119
120 /* we need to flip the logic here, so that bau=y sets nobau to false */
121 nobau = !nobau;
122
123 if (!nobau)
124 pr_info("UV BAU Enabled\n");
125 else
126 pr_info("UV BAU Disabled\n");
127
128 return 0;
129 }
130 early_param("bau", setup_bau);
131
132 /* base pnode in this partition */
133 static int uv_base_pnode __read_mostly;
134
135 static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
136 static DEFINE_PER_CPU(struct bau_control, bau_control);
137 static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
138
139 static void
140 set_bau_on(void)
141 {
142 int cpu;
143 struct bau_control *bcp;
144
145 if (nobau_perm) {
146 pr_info("BAU not initialized; cannot be turned on\n");
147 return;
148 }
149 nobau = false;
150 for_each_present_cpu(cpu) {
151 bcp = &per_cpu(bau_control, cpu);
152 bcp->nobau = false;
153 }
154 pr_info("BAU turned on\n");
155 return;
156 }
157
158 static void
159 set_bau_off(void)
160 {
161 int cpu;
162 struct bau_control *bcp;
163
164 nobau = true;
165 for_each_present_cpu(cpu) {
166 bcp = &per_cpu(bau_control, cpu);
167 bcp->nobau = true;
168 }
169 pr_info("BAU turned off\n");
170 return;
171 }
172
173 /*
174 * Determine the first node on a uvhub. 'Nodes' are used for kernel
175 * memory allocation.
176 */
177 static int __init uvhub_to_first_node(int uvhub)
178 {
179 int node, b;
180
181 for_each_online_node(node) {
182 b = uv_node_to_blade_id(node);
183 if (uvhub == b)
184 return node;
185 }
186 return -1;
187 }
188
189 /*
190 * Determine the apicid of the first cpu on a uvhub.
191 */
192 static int __init uvhub_to_first_apicid(int uvhub)
193 {
194 int cpu;
195
196 for_each_present_cpu(cpu)
197 if (uvhub == uv_cpu_to_blade_id(cpu))
198 return per_cpu(x86_cpu_to_apicid, cpu);
199 return -1;
200 }
201
202 /*
203 * Free a software acknowledge hardware resource by clearing its Pending
204 * bit. This will return a reply to the sender.
205 * If the message has timed out, a reply has already been sent by the
206 * hardware but the resource has not been released. In that case our
207 * clear of the Timeout bit (as well) will free the resource. No reply will
208 * be sent (the hardware will only do one reply per message).
209 */
210 static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
211 int do_acknowledge)
212 {
213 unsigned long dw;
214 struct bau_pq_entry *msg;
215
216 msg = mdp->msg;
217 if (!msg->canceled && do_acknowledge) {
218 dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
219 write_mmr_sw_ack(dw);
220 }
221 msg->replied_to = 1;
222 msg->swack_vec = 0;
223 }
224
225 /*
226 * Process the receipt of a RETRY message
227 */
228 static void bau_process_retry_msg(struct msg_desc *mdp,
229 struct bau_control *bcp)
230 {
231 int i;
232 int cancel_count = 0;
233 unsigned long msg_res;
234 unsigned long mmr = 0;
235 struct bau_pq_entry *msg = mdp->msg;
236 struct bau_pq_entry *msg2;
237 struct ptc_stats *stat = bcp->statp;
238
239 stat->d_retries++;
240 /*
241 * cancel any message from msg+1 to the retry itself
242 */
243 for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
244 if (msg2 > mdp->queue_last)
245 msg2 = mdp->queue_first;
246 if (msg2 == msg)
247 break;
248
249 /* same conditions for cancellation as do_reset */
250 if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
251 (msg2->swack_vec) && ((msg2->swack_vec &
252 msg->swack_vec) == 0) &&
253 (msg2->sending_cpu == msg->sending_cpu) &&
254 (msg2->msg_type != MSG_NOOP)) {
255 mmr = read_mmr_sw_ack();
256 msg_res = msg2->swack_vec;
257 /*
258 * This is a message retry; clear the resources held
259 * by the previous message only if they timed out.
260 * If it has not timed out we have an unexpected
261 * situation to report.
262 */
263 if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
264 unsigned long mr;
265 /*
266 * Is the resource timed out?
267 * Make everyone ignore the cancelled message.
268 */
269 msg2->canceled = 1;
270 stat->d_canceled++;
271 cancel_count++;
272 mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
273 write_mmr_sw_ack(mr);
274 }
275 }
276 }
277 if (!cancel_count)
278 stat->d_nocanceled++;
279 }
280
281 /*
282 * Do all the things a cpu should do for a TLB shootdown message.
283 * Other cpu's may come here at the same time for this message.
284 */
285 static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
286 int do_acknowledge)
287 {
288 short socket_ack_count = 0;
289 short *sp;
290 struct atomic_short *asp;
291 struct ptc_stats *stat = bcp->statp;
292 struct bau_pq_entry *msg = mdp->msg;
293 struct bau_control *smaster = bcp->socket_master;
294
295 /*
296 * This must be a normal message, or retry of a normal message
297 */
298 if (msg->address == TLB_FLUSH_ALL) {
299 local_flush_tlb();
300 stat->d_alltlb++;
301 } else {
302 __flush_tlb_one(msg->address);
303 stat->d_onetlb++;
304 }
305 stat->d_requestee++;
306
307 /*
308 * One cpu on each uvhub has the additional job on a RETRY
309 * of releasing the resource held by the message that is
310 * being retried. That message is identified by sending
311 * cpu number.
312 */
313 if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
314 bau_process_retry_msg(mdp, bcp);
315
316 /*
317 * This is a swack message, so we have to reply to it.
318 * Count each responding cpu on the socket. This avoids
319 * pinging the count's cache line back and forth between
320 * the sockets.
321 */
322 sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
323 asp = (struct atomic_short *)sp;
324 socket_ack_count = atom_asr(1, asp);
325 if (socket_ack_count == bcp->cpus_in_socket) {
326 int msg_ack_count;
327 /*
328 * Both sockets dump their completed count total into
329 * the message's count.
330 */
331 *sp = 0;
332 asp = (struct atomic_short *)&msg->acknowledge_count;
333 msg_ack_count = atom_asr(socket_ack_count, asp);
334
335 if (msg_ack_count == bcp->cpus_in_uvhub) {
336 /*
337 * All cpus in uvhub saw it; reply
338 * (unless we are in the UV2 workaround)
339 */
340 reply_to_message(mdp, bcp, do_acknowledge);
341 }
342 }
343
344 return;
345 }
346
347 /*
348 * Determine the first cpu on a pnode.
349 */
350 static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
351 {
352 int cpu;
353 struct hub_and_pnode *hpp;
354
355 for_each_present_cpu(cpu) {
356 hpp = &smaster->thp[cpu];
357 if (pnode == hpp->pnode)
358 return cpu;
359 }
360 return -1;
361 }
362
363 /*
364 * Last resort when we get a large number of destination timeouts is
365 * to clear resources held by a given cpu.
366 * Do this with IPI so that all messages in the BAU message queue
367 * can be identified by their nonzero swack_vec field.
368 *
369 * This is entered for a single cpu on the uvhub.
370 * The sender want's this uvhub to free a specific message's
371 * swack resources.
372 */
373 static void do_reset(void *ptr)
374 {
375 int i;
376 struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
377 struct reset_args *rap = (struct reset_args *)ptr;
378 struct bau_pq_entry *msg;
379 struct ptc_stats *stat = bcp->statp;
380
381 stat->d_resets++;
382 /*
383 * We're looking for the given sender, and
384 * will free its swack resource.
385 * If all cpu's finally responded after the timeout, its
386 * message 'replied_to' was set.
387 */
388 for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
389 unsigned long msg_res;
390 /* do_reset: same conditions for cancellation as
391 bau_process_retry_msg() */
392 if ((msg->replied_to == 0) &&
393 (msg->canceled == 0) &&
394 (msg->sending_cpu == rap->sender) &&
395 (msg->swack_vec) &&
396 (msg->msg_type != MSG_NOOP)) {
397 unsigned long mmr;
398 unsigned long mr;
399 /*
400 * make everyone else ignore this message
401 */
402 msg->canceled = 1;
403 /*
404 * only reset the resource if it is still pending
405 */
406 mmr = read_mmr_sw_ack();
407 msg_res = msg->swack_vec;
408 mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
409 if (mmr & msg_res) {
410 stat->d_rcanceled++;
411 write_mmr_sw_ack(mr);
412 }
413 }
414 }
415 return;
416 }
417
418 /*
419 * Use IPI to get all target uvhubs to release resources held by
420 * a given sending cpu number.
421 */
422 static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
423 {
424 int pnode;
425 int apnode;
426 int maskbits;
427 int sender = bcp->cpu;
428 cpumask_t *mask = bcp->uvhub_master->cpumask;
429 struct bau_control *smaster = bcp->socket_master;
430 struct reset_args reset_args;
431
432 reset_args.sender = sender;
433 cpumask_clear(mask);
434 /* find a single cpu for each uvhub in this distribution mask */
435 maskbits = sizeof(struct pnmask) * BITSPERBYTE;
436 /* each bit is a pnode relative to the partition base pnode */
437 for (pnode = 0; pnode < maskbits; pnode++) {
438 int cpu;
439 if (!bau_uvhub_isset(pnode, distribution))
440 continue;
441 apnode = pnode + bcp->partition_base_pnode;
442 cpu = pnode_to_first_cpu(apnode, smaster);
443 cpumask_set_cpu(cpu, mask);
444 }
445
446 /* IPI all cpus; preemption is already disabled */
447 smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
448 return;
449 }
450
451 /*
452 * Not to be confused with cycles_2_ns() from tsc.c; this gives a relative
453 * number, not an absolute. It converts a duration in cycles to a duration in
454 * ns.
455 */
456 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
457 {
458 struct cyc2ns_data *data = cyc2ns_read_begin();
459 unsigned long long ns;
460
461 ns = mul_u64_u32_shr(cyc, data->cyc2ns_mul, data->cyc2ns_shift);
462
463 cyc2ns_read_end(data);
464 return ns;
465 }
466
467 /*
468 * The reverse of the above; converts a duration in ns to a duration in cycles.
469 */
470 static inline unsigned long long ns_2_cycles(unsigned long long ns)
471 {
472 struct cyc2ns_data *data = cyc2ns_read_begin();
473 unsigned long long cyc;
474
475 cyc = (ns << data->cyc2ns_shift) / data->cyc2ns_mul;
476
477 cyc2ns_read_end(data);
478 return cyc;
479 }
480
481 static inline unsigned long cycles_2_us(unsigned long long cyc)
482 {
483 return cycles_2_ns(cyc) / NSEC_PER_USEC;
484 }
485
486 static inline cycles_t sec_2_cycles(unsigned long sec)
487 {
488 return ns_2_cycles(sec * NSEC_PER_SEC);
489 }
490
491 static inline unsigned long long usec_2_cycles(unsigned long usec)
492 {
493 return ns_2_cycles(usec * NSEC_PER_USEC);
494 }
495
496 /*
497 * wait for all cpus on this hub to finish their sends and go quiet
498 * leaves uvhub_quiesce set so that no new broadcasts are started by
499 * bau_flush_send_and_wait()
500 */
501 static inline void quiesce_local_uvhub(struct bau_control *hmaster)
502 {
503 atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
504 }
505
506 /*
507 * mark this quiet-requestor as done
508 */
509 static inline void end_uvhub_quiesce(struct bau_control *hmaster)
510 {
511 atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
512 }
513
514 static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
515 {
516 unsigned long descriptor_status;
517
518 descriptor_status = uv_read_local_mmr(mmr_offset);
519 descriptor_status >>= right_shift;
520 descriptor_status &= UV_ACT_STATUS_MASK;
521 return descriptor_status;
522 }
523
524 /*
525 * Wait for completion of a broadcast software ack message
526 * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
527 */
528 static int uv1_wait_completion(struct bau_desc *bau_desc,
529 unsigned long mmr_offset, int right_shift,
530 struct bau_control *bcp, long try)
531 {
532 unsigned long descriptor_status;
533 cycles_t ttm;
534 struct ptc_stats *stat = bcp->statp;
535
536 descriptor_status = uv1_read_status(mmr_offset, right_shift);
537 /* spin on the status MMR, waiting for it to go idle */
538 while ((descriptor_status != DS_IDLE)) {
539 /*
540 * Our software ack messages may be blocked because
541 * there are no swack resources available. As long
542 * as none of them has timed out hardware will NACK
543 * our message and its state will stay IDLE.
544 */
545 if (descriptor_status == DS_SOURCE_TIMEOUT) {
546 stat->s_stimeout++;
547 return FLUSH_GIVEUP;
548 } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
549 stat->s_dtimeout++;
550 ttm = get_cycles();
551
552 /*
553 * Our retries may be blocked by all destination
554 * swack resources being consumed, and a timeout
555 * pending. In that case hardware returns the
556 * ERROR that looks like a destination timeout.
557 */
558 if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
559 bcp->conseccompletes = 0;
560 return FLUSH_RETRY_PLUGGED;
561 }
562
563 bcp->conseccompletes = 0;
564 return FLUSH_RETRY_TIMEOUT;
565 } else {
566 /*
567 * descriptor_status is still BUSY
568 */
569 cpu_relax();
570 }
571 descriptor_status = uv1_read_status(mmr_offset, right_shift);
572 }
573 bcp->conseccompletes++;
574 return FLUSH_COMPLETE;
575 }
576
577 /*
578 * UV2 could have an extra bit of status in the ACTIVATION_STATUS_2 register.
579 * But not currently used.
580 */
581 static unsigned long uv2_3_read_status(unsigned long offset, int rshft, int desc)
582 {
583 unsigned long descriptor_status;
584
585 descriptor_status =
586 ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK) << 1;
587 return descriptor_status;
588 }
589
590 /*
591 * Return whether the status of the descriptor that is normally used for this
592 * cpu (the one indexed by its hub-relative cpu number) is busy.
593 * The status of the original 32 descriptors is always reflected in the 64
594 * bits of UVH_LB_BAU_SB_ACTIVATION_STATUS_0.
595 * The bit provided by the activation_status_2 register is irrelevant to
596 * the status if it is only being tested for busy or not busy.
597 */
598 int normal_busy(struct bau_control *bcp)
599 {
600 int cpu = bcp->uvhub_cpu;
601 int mmr_offset;
602 int right_shift;
603
604 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
605 right_shift = cpu * UV_ACT_STATUS_SIZE;
606 return (((((read_lmmr(mmr_offset) >> right_shift) &
607 UV_ACT_STATUS_MASK)) << 1) == UV2H_DESC_BUSY);
608 }
609
610 /*
611 * Entered when a bau descriptor has gone into a permanent busy wait because
612 * of a hardware bug.
613 * Workaround the bug.
614 */
615 int handle_uv2_busy(struct bau_control *bcp)
616 {
617 struct ptc_stats *stat = bcp->statp;
618
619 stat->s_uv2_wars++;
620 bcp->busy = 1;
621 return FLUSH_GIVEUP;
622 }
623
624 static int uv2_3_wait_completion(struct bau_desc *bau_desc,
625 unsigned long mmr_offset, int right_shift,
626 struct bau_control *bcp, long try)
627 {
628 unsigned long descriptor_stat;
629 cycles_t ttm;
630 int desc = bcp->uvhub_cpu;
631 long busy_reps = 0;
632 struct ptc_stats *stat = bcp->statp;
633
634 descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
635
636 /* spin on the status MMR, waiting for it to go idle */
637 while (descriptor_stat != UV2H_DESC_IDLE) {
638 if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT)) {
639 /*
640 * A h/w bug on the destination side may
641 * have prevented the message being marked
642 * pending, thus it doesn't get replied to
643 * and gets continually nacked until it times
644 * out with a SOURCE_TIMEOUT.
645 */
646 stat->s_stimeout++;
647 return FLUSH_GIVEUP;
648 } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
649 ttm = get_cycles();
650
651 /*
652 * Our retries may be blocked by all destination
653 * swack resources being consumed, and a timeout
654 * pending. In that case hardware returns the
655 * ERROR that looks like a destination timeout.
656 * Without using the extended status we have to
657 * deduce from the short time that this was a
658 * strong nack.
659 */
660 if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
661 bcp->conseccompletes = 0;
662 stat->s_plugged++;
663 /* FLUSH_RETRY_PLUGGED causes hang on boot */
664 return FLUSH_GIVEUP;
665 }
666 stat->s_dtimeout++;
667 bcp->conseccompletes = 0;
668 /* FLUSH_RETRY_TIMEOUT causes hang on boot */
669 return FLUSH_GIVEUP;
670 } else {
671 busy_reps++;
672 if (busy_reps > 1000000) {
673 /* not to hammer on the clock */
674 busy_reps = 0;
675 ttm = get_cycles();
676 if ((ttm - bcp->send_message) > bcp->timeout_interval)
677 return handle_uv2_busy(bcp);
678 }
679 /*
680 * descriptor_stat is still BUSY
681 */
682 cpu_relax();
683 }
684 descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
685 }
686 bcp->conseccompletes++;
687 return FLUSH_COMPLETE;
688 }
689
690 /*
691 * There are 2 status registers; each and array[32] of 2 bits. Set up for
692 * which register to read and position in that register based on cpu in
693 * current hub.
694 */
695 static int wait_completion(struct bau_desc *bau_desc, struct bau_control *bcp, long try)
696 {
697 int right_shift;
698 unsigned long mmr_offset;
699 int desc = bcp->uvhub_cpu;
700
701 if (desc < UV_CPUS_PER_AS) {
702 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
703 right_shift = desc * UV_ACT_STATUS_SIZE;
704 } else {
705 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
706 right_shift = ((desc - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
707 }
708
709 if (bcp->uvhub_version == 1)
710 return uv1_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
711 else
712 return uv2_3_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
713 }
714
715 /*
716 * Our retries are blocked by all destination sw ack resources being
717 * in use, and a timeout is pending. In that case hardware immediately
718 * returns the ERROR that looks like a destination timeout.
719 */
720 static void destination_plugged(struct bau_desc *bau_desc,
721 struct bau_control *bcp,
722 struct bau_control *hmaster, struct ptc_stats *stat)
723 {
724 udelay(bcp->plugged_delay);
725 bcp->plugged_tries++;
726
727 if (bcp->plugged_tries >= bcp->plugsb4reset) {
728 bcp->plugged_tries = 0;
729
730 quiesce_local_uvhub(hmaster);
731
732 spin_lock(&hmaster->queue_lock);
733 reset_with_ipi(&bau_desc->distribution, bcp);
734 spin_unlock(&hmaster->queue_lock);
735
736 end_uvhub_quiesce(hmaster);
737
738 bcp->ipi_attempts++;
739 stat->s_resets_plug++;
740 }
741 }
742
743 static void destination_timeout(struct bau_desc *bau_desc,
744 struct bau_control *bcp, struct bau_control *hmaster,
745 struct ptc_stats *stat)
746 {
747 hmaster->max_concurr = 1;
748 bcp->timeout_tries++;
749 if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
750 bcp->timeout_tries = 0;
751
752 quiesce_local_uvhub(hmaster);
753
754 spin_lock(&hmaster->queue_lock);
755 reset_with_ipi(&bau_desc->distribution, bcp);
756 spin_unlock(&hmaster->queue_lock);
757
758 end_uvhub_quiesce(hmaster);
759
760 bcp->ipi_attempts++;
761 stat->s_resets_timeout++;
762 }
763 }
764
765 /*
766 * Stop all cpus on a uvhub from using the BAU for a period of time.
767 * This is reversed by check_enable.
768 */
769 static void disable_for_period(struct bau_control *bcp, struct ptc_stats *stat)
770 {
771 int tcpu;
772 struct bau_control *tbcp;
773 struct bau_control *hmaster;
774 cycles_t tm1;
775
776 hmaster = bcp->uvhub_master;
777 spin_lock(&hmaster->disable_lock);
778 if (!bcp->baudisabled) {
779 stat->s_bau_disabled++;
780 tm1 = get_cycles();
781 for_each_present_cpu(tcpu) {
782 tbcp = &per_cpu(bau_control, tcpu);
783 if (tbcp->uvhub_master == hmaster) {
784 tbcp->baudisabled = 1;
785 tbcp->set_bau_on_time =
786 tm1 + bcp->disabled_period;
787 }
788 }
789 }
790 spin_unlock(&hmaster->disable_lock);
791 }
792
793 static void count_max_concurr(int stat, struct bau_control *bcp,
794 struct bau_control *hmaster)
795 {
796 bcp->plugged_tries = 0;
797 bcp->timeout_tries = 0;
798 if (stat != FLUSH_COMPLETE)
799 return;
800 if (bcp->conseccompletes <= bcp->complete_threshold)
801 return;
802 if (hmaster->max_concurr >= hmaster->max_concurr_const)
803 return;
804 hmaster->max_concurr++;
805 }
806
807 static void record_send_stats(cycles_t time1, cycles_t time2,
808 struct bau_control *bcp, struct ptc_stats *stat,
809 int completion_status, int try)
810 {
811 cycles_t elapsed;
812
813 if (time2 > time1) {
814 elapsed = time2 - time1;
815 stat->s_time += elapsed;
816
817 if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
818 bcp->period_requests++;
819 bcp->period_time += elapsed;
820 if ((elapsed > congested_cycles) &&
821 (bcp->period_requests > bcp->cong_reps) &&
822 ((bcp->period_time / bcp->period_requests) >
823 congested_cycles)) {
824 stat->s_congested++;
825 disable_for_period(bcp, stat);
826 }
827 }
828 } else
829 stat->s_requestor--;
830
831 if (completion_status == FLUSH_COMPLETE && try > 1)
832 stat->s_retriesok++;
833 else if (completion_status == FLUSH_GIVEUP) {
834 stat->s_giveup++;
835 if (get_cycles() > bcp->period_end)
836 bcp->period_giveups = 0;
837 bcp->period_giveups++;
838 if (bcp->period_giveups == 1)
839 bcp->period_end = get_cycles() + bcp->disabled_period;
840 if (bcp->period_giveups > bcp->giveup_limit) {
841 disable_for_period(bcp, stat);
842 stat->s_giveuplimit++;
843 }
844 }
845 }
846
847 /*
848 * Because of a uv1 hardware bug only a limited number of concurrent
849 * requests can be made.
850 */
851 static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
852 {
853 spinlock_t *lock = &hmaster->uvhub_lock;
854 atomic_t *v;
855
856 v = &hmaster->active_descriptor_count;
857 if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
858 stat->s_throttles++;
859 do {
860 cpu_relax();
861 } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
862 }
863 }
864
865 /*
866 * Handle the completion status of a message send.
867 */
868 static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
869 struct bau_control *bcp, struct bau_control *hmaster,
870 struct ptc_stats *stat)
871 {
872 if (completion_status == FLUSH_RETRY_PLUGGED)
873 destination_plugged(bau_desc, bcp, hmaster, stat);
874 else if (completion_status == FLUSH_RETRY_TIMEOUT)
875 destination_timeout(bau_desc, bcp, hmaster, stat);
876 }
877
878 /*
879 * Send a broadcast and wait for it to complete.
880 *
881 * The flush_mask contains the cpus the broadcast is to be sent to including
882 * cpus that are on the local uvhub.
883 *
884 * Returns 0 if all flushing represented in the mask was done.
885 * Returns 1 if it gives up entirely and the original cpu mask is to be
886 * returned to the kernel.
887 */
888 int uv_flush_send_and_wait(struct cpumask *flush_mask, struct bau_control *bcp,
889 struct bau_desc *bau_desc)
890 {
891 int seq_number = 0;
892 int completion_stat = 0;
893 int uv1 = 0;
894 long try = 0;
895 unsigned long index;
896 cycles_t time1;
897 cycles_t time2;
898 struct ptc_stats *stat = bcp->statp;
899 struct bau_control *hmaster = bcp->uvhub_master;
900 struct uv1_bau_msg_header *uv1_hdr = NULL;
901 struct uv2_3_bau_msg_header *uv2_3_hdr = NULL;
902
903 if (bcp->uvhub_version == 1) {
904 uv1 = 1;
905 uv1_throttle(hmaster, stat);
906 }
907
908 while (hmaster->uvhub_quiesce)
909 cpu_relax();
910
911 time1 = get_cycles();
912 if (uv1)
913 uv1_hdr = &bau_desc->header.uv1_hdr;
914 else
915 /* uv2 and uv3 */
916 uv2_3_hdr = &bau_desc->header.uv2_3_hdr;
917
918 do {
919 if (try == 0) {
920 if (uv1)
921 uv1_hdr->msg_type = MSG_REGULAR;
922 else
923 uv2_3_hdr->msg_type = MSG_REGULAR;
924 seq_number = bcp->message_number++;
925 } else {
926 if (uv1)
927 uv1_hdr->msg_type = MSG_RETRY;
928 else
929 uv2_3_hdr->msg_type = MSG_RETRY;
930 stat->s_retry_messages++;
931 }
932
933 if (uv1)
934 uv1_hdr->sequence = seq_number;
935 else
936 uv2_3_hdr->sequence = seq_number;
937 index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
938 bcp->send_message = get_cycles();
939
940 write_mmr_activation(index);
941
942 try++;
943 completion_stat = wait_completion(bau_desc, bcp, try);
944
945 handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
946
947 if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
948 bcp->ipi_attempts = 0;
949 stat->s_overipilimit++;
950 completion_stat = FLUSH_GIVEUP;
951 break;
952 }
953 cpu_relax();
954 } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
955 (completion_stat == FLUSH_RETRY_TIMEOUT));
956
957 time2 = get_cycles();
958
959 count_max_concurr(completion_stat, bcp, hmaster);
960
961 while (hmaster->uvhub_quiesce)
962 cpu_relax();
963
964 atomic_dec(&hmaster->active_descriptor_count);
965
966 record_send_stats(time1, time2, bcp, stat, completion_stat, try);
967
968 if (completion_stat == FLUSH_GIVEUP)
969 /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
970 return 1;
971 return 0;
972 }
973
974 /*
975 * The BAU is disabled for this uvhub. When the disabled time period has
976 * expired re-enable it.
977 * Return 0 if it is re-enabled for all cpus on this uvhub.
978 */
979 static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
980 {
981 int tcpu;
982 struct bau_control *tbcp;
983 struct bau_control *hmaster;
984
985 hmaster = bcp->uvhub_master;
986 spin_lock(&hmaster->disable_lock);
987 if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) {
988 stat->s_bau_reenabled++;
989 for_each_present_cpu(tcpu) {
990 tbcp = &per_cpu(bau_control, tcpu);
991 if (tbcp->uvhub_master == hmaster) {
992 tbcp->baudisabled = 0;
993 tbcp->period_requests = 0;
994 tbcp->period_time = 0;
995 tbcp->period_giveups = 0;
996 }
997 }
998 spin_unlock(&hmaster->disable_lock);
999 return 0;
1000 }
1001 spin_unlock(&hmaster->disable_lock);
1002 return -1;
1003 }
1004
1005 static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
1006 int remotes, struct bau_desc *bau_desc)
1007 {
1008 stat->s_requestor++;
1009 stat->s_ntargcpu += remotes + locals;
1010 stat->s_ntargremotes += remotes;
1011 stat->s_ntarglocals += locals;
1012
1013 /* uvhub statistics */
1014 hubs = bau_uvhub_weight(&bau_desc->distribution);
1015 if (locals) {
1016 stat->s_ntarglocaluvhub++;
1017 stat->s_ntargremoteuvhub += (hubs - 1);
1018 } else
1019 stat->s_ntargremoteuvhub += hubs;
1020
1021 stat->s_ntarguvhub += hubs;
1022
1023 if (hubs >= 16)
1024 stat->s_ntarguvhub16++;
1025 else if (hubs >= 8)
1026 stat->s_ntarguvhub8++;
1027 else if (hubs >= 4)
1028 stat->s_ntarguvhub4++;
1029 else if (hubs >= 2)
1030 stat->s_ntarguvhub2++;
1031 else
1032 stat->s_ntarguvhub1++;
1033 }
1034
1035 /*
1036 * Translate a cpu mask to the uvhub distribution mask in the BAU
1037 * activation descriptor.
1038 */
1039 static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
1040 struct bau_desc *bau_desc, int *localsp, int *remotesp)
1041 {
1042 int cpu;
1043 int pnode;
1044 int cnt = 0;
1045 struct hub_and_pnode *hpp;
1046
1047 for_each_cpu(cpu, flush_mask) {
1048 /*
1049 * The distribution vector is a bit map of pnodes, relative
1050 * to the partition base pnode (and the partition base nasid
1051 * in the header).
1052 * Translate cpu to pnode and hub using a local memory array.
1053 */
1054 hpp = &bcp->socket_master->thp[cpu];
1055 pnode = hpp->pnode - bcp->partition_base_pnode;
1056 bau_uvhub_set(pnode, &bau_desc->distribution);
1057 cnt++;
1058 if (hpp->uvhub == bcp->uvhub)
1059 (*localsp)++;
1060 else
1061 (*remotesp)++;
1062 }
1063 if (!cnt)
1064 return 1;
1065 return 0;
1066 }
1067
1068 /*
1069 * globally purge translation cache of a virtual address or all TLB's
1070 * @cpumask: mask of all cpu's in which the address is to be removed
1071 * @mm: mm_struct containing virtual address range
1072 * @start: start virtual address to be removed from TLB
1073 * @end: end virtual address to be remove from TLB
1074 * @cpu: the current cpu
1075 *
1076 * This is the entry point for initiating any UV global TLB shootdown.
1077 *
1078 * Purges the translation caches of all specified processors of the given
1079 * virtual address, or purges all TLB's on specified processors.
1080 *
1081 * The caller has derived the cpumask from the mm_struct. This function
1082 * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
1083 *
1084 * The cpumask is converted into a uvhubmask of the uvhubs containing
1085 * those cpus.
1086 *
1087 * Note that this function should be called with preemption disabled.
1088 *
1089 * Returns NULL if all remote flushing was done.
1090 * Returns pointer to cpumask if some remote flushing remains to be
1091 * done. The returned pointer is valid till preemption is re-enabled.
1092 */
1093 const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
1094 struct mm_struct *mm,
1095 unsigned long start,
1096 unsigned long end,
1097 unsigned int cpu)
1098 {
1099 int locals = 0;
1100 int remotes = 0;
1101 int hubs = 0;
1102 struct bau_desc *bau_desc;
1103 struct cpumask *flush_mask;
1104 struct ptc_stats *stat;
1105 struct bau_control *bcp;
1106 unsigned long descriptor_status;
1107 unsigned long status;
1108
1109 bcp = &per_cpu(bau_control, cpu);
1110
1111 if (bcp->nobau)
1112 return cpumask;
1113
1114 stat = bcp->statp;
1115 stat->s_enters++;
1116
1117 if (bcp->busy) {
1118 descriptor_status =
1119 read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_0);
1120 status = ((descriptor_status >> (bcp->uvhub_cpu *
1121 UV_ACT_STATUS_SIZE)) & UV_ACT_STATUS_MASK) << 1;
1122 if (status == UV2H_DESC_BUSY)
1123 return cpumask;
1124 bcp->busy = 0;
1125 }
1126
1127 /* bau was disabled due to slow response */
1128 if (bcp->baudisabled) {
1129 if (check_enable(bcp, stat)) {
1130 stat->s_ipifordisabled++;
1131 return cpumask;
1132 }
1133 }
1134
1135 /*
1136 * Each sending cpu has a per-cpu mask which it fills from the caller's
1137 * cpu mask. All cpus are converted to uvhubs and copied to the
1138 * activation descriptor.
1139 */
1140 flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
1141 /* don't actually do a shootdown of the local cpu */
1142 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
1143
1144 if (cpumask_test_cpu(cpu, cpumask))
1145 stat->s_ntargself++;
1146
1147 bau_desc = bcp->descriptor_base;
1148 bau_desc += (ITEMS_PER_DESC * bcp->uvhub_cpu);
1149 bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
1150 if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
1151 return NULL;
1152
1153 record_send_statistics(stat, locals, hubs, remotes, bau_desc);
1154
1155 if (!end || (end - start) <= PAGE_SIZE)
1156 bau_desc->payload.address = start;
1157 else
1158 bau_desc->payload.address = TLB_FLUSH_ALL;
1159 bau_desc->payload.sending_cpu = cpu;
1160 /*
1161 * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
1162 * or 1 if it gave up and the original cpumask should be returned.
1163 */
1164 if (!uv_flush_send_and_wait(flush_mask, bcp, bau_desc))
1165 return NULL;
1166 else
1167 return cpumask;
1168 }
1169
1170 /*
1171 * Search the message queue for any 'other' unprocessed message with the
1172 * same software acknowledge resource bit vector as the 'msg' message.
1173 */
1174 struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
1175 struct bau_control *bcp)
1176 {
1177 struct bau_pq_entry *msg_next = msg + 1;
1178 unsigned char swack_vec = msg->swack_vec;
1179
1180 if (msg_next > bcp->queue_last)
1181 msg_next = bcp->queue_first;
1182 while (msg_next != msg) {
1183 if ((msg_next->canceled == 0) && (msg_next->replied_to == 0) &&
1184 (msg_next->swack_vec == swack_vec))
1185 return msg_next;
1186 msg_next++;
1187 if (msg_next > bcp->queue_last)
1188 msg_next = bcp->queue_first;
1189 }
1190 return NULL;
1191 }
1192
1193 /*
1194 * UV2 needs to work around a bug in which an arriving message has not
1195 * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
1196 * Such a message must be ignored.
1197 */
1198 void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
1199 {
1200 unsigned long mmr_image;
1201 unsigned char swack_vec;
1202 struct bau_pq_entry *msg = mdp->msg;
1203 struct bau_pq_entry *other_msg;
1204
1205 mmr_image = read_mmr_sw_ack();
1206 swack_vec = msg->swack_vec;
1207
1208 if ((swack_vec & mmr_image) == 0) {
1209 /*
1210 * This message was assigned a swack resource, but no
1211 * reserved acknowlegment is pending.
1212 * The bug has prevented this message from setting the MMR.
1213 */
1214 /*
1215 * Some message has set the MMR 'pending' bit; it might have
1216 * been another message. Look for that message.
1217 */
1218 other_msg = find_another_by_swack(msg, bcp);
1219 if (other_msg) {
1220 /*
1221 * There is another. Process this one but do not
1222 * ack it.
1223 */
1224 bau_process_message(mdp, bcp, 0);
1225 /*
1226 * Let the natural processing of that other message
1227 * acknowledge it. Don't get the processing of sw_ack's
1228 * out of order.
1229 */
1230 return;
1231 }
1232 }
1233
1234 /*
1235 * Either the MMR shows this one pending a reply or there is no
1236 * other message using this sw_ack, so it is safe to acknowledge it.
1237 */
1238 bau_process_message(mdp, bcp, 1);
1239
1240 return;
1241 }
1242
1243 /*
1244 * The BAU message interrupt comes here. (registered by set_intr_gate)
1245 * See entry_64.S
1246 *
1247 * We received a broadcast assist message.
1248 *
1249 * Interrupts are disabled; this interrupt could represent
1250 * the receipt of several messages.
1251 *
1252 * All cores/threads on this hub get this interrupt.
1253 * The last one to see it does the software ack.
1254 * (the resource will not be freed until noninterruptable cpus see this
1255 * interrupt; hardware may timeout the s/w ack and reply ERROR)
1256 */
1257 void uv_bau_message_interrupt(struct pt_regs *regs)
1258 {
1259 int count = 0;
1260 cycles_t time_start;
1261 struct bau_pq_entry *msg;
1262 struct bau_control *bcp;
1263 struct ptc_stats *stat;
1264 struct msg_desc msgdesc;
1265
1266 ack_APIC_irq();
1267 time_start = get_cycles();
1268
1269 bcp = &per_cpu(bau_control, smp_processor_id());
1270 stat = bcp->statp;
1271
1272 msgdesc.queue_first = bcp->queue_first;
1273 msgdesc.queue_last = bcp->queue_last;
1274
1275 msg = bcp->bau_msg_head;
1276 while (msg->swack_vec) {
1277 count++;
1278
1279 msgdesc.msg_slot = msg - msgdesc.queue_first;
1280 msgdesc.msg = msg;
1281 if (bcp->uvhub_version == 2)
1282 process_uv2_message(&msgdesc, bcp);
1283 else
1284 /* no error workaround for uv1 or uv3 */
1285 bau_process_message(&msgdesc, bcp, 1);
1286
1287 msg++;
1288 if (msg > msgdesc.queue_last)
1289 msg = msgdesc.queue_first;
1290 bcp->bau_msg_head = msg;
1291 }
1292 stat->d_time += (get_cycles() - time_start);
1293 if (!count)
1294 stat->d_nomsg++;
1295 else if (count > 1)
1296 stat->d_multmsg++;
1297 }
1298
1299 /*
1300 * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
1301 * shootdown message timeouts enabled. The timeout does not cause
1302 * an interrupt, but causes an error message to be returned to
1303 * the sender.
1304 */
1305 static void __init enable_timeouts(void)
1306 {
1307 int uvhub;
1308 int nuvhubs;
1309 int pnode;
1310 unsigned long mmr_image;
1311
1312 nuvhubs = uv_num_possible_blades();
1313
1314 for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
1315 if (!uv_blade_nr_possible_cpus(uvhub))
1316 continue;
1317
1318 pnode = uv_blade_to_pnode(uvhub);
1319 mmr_image = read_mmr_misc_control(pnode);
1320 /*
1321 * Set the timeout period and then lock it in, in three
1322 * steps; captures and locks in the period.
1323 *
1324 * To program the period, the SOFT_ACK_MODE must be off.
1325 */
1326 mmr_image &= ~(1L << SOFTACK_MSHIFT);
1327 write_mmr_misc_control(pnode, mmr_image);
1328 /*
1329 * Set the 4-bit period.
1330 */
1331 mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
1332 mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
1333 write_mmr_misc_control(pnode, mmr_image);
1334 /*
1335 * UV1:
1336 * Subsequent reversals of the timebase bit (3) cause an
1337 * immediate timeout of one or all INTD resources as
1338 * indicated in bits 2:0 (7 causes all of them to timeout).
1339 */
1340 mmr_image |= (1L << SOFTACK_MSHIFT);
1341 if (is_uv2_hub()) {
1342 /* do not touch the legacy mode bit */
1343 /* hw bug workaround; do not use extended status */
1344 mmr_image &= ~(1L << UV2_EXT_SHFT);
1345 } else if (is_uv3_hub()) {
1346 mmr_image &= ~(1L << PREFETCH_HINT_SHFT);
1347 mmr_image |= (1L << SB_STATUS_SHFT);
1348 }
1349 write_mmr_misc_control(pnode, mmr_image);
1350 }
1351 }
1352
1353 static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
1354 {
1355 if (*offset < num_possible_cpus())
1356 return offset;
1357 return NULL;
1358 }
1359
1360 static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
1361 {
1362 (*offset)++;
1363 if (*offset < num_possible_cpus())
1364 return offset;
1365 return NULL;
1366 }
1367
1368 static void ptc_seq_stop(struct seq_file *file, void *data)
1369 {
1370 }
1371
1372 /*
1373 * Display the statistics thru /proc/sgi_uv/ptc_statistics
1374 * 'data' points to the cpu number
1375 * Note: see the descriptions in stat_description[].
1376 */
1377 static int ptc_seq_show(struct seq_file *file, void *data)
1378 {
1379 struct ptc_stats *stat;
1380 struct bau_control *bcp;
1381 int cpu;
1382
1383 cpu = *(loff_t *)data;
1384 if (!cpu) {
1385 seq_puts(file,
1386 "# cpu bauoff sent stime self locals remotes ncpus localhub ");
1387 seq_puts(file, "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
1388 seq_puts(file,
1389 "numuvhubs4 numuvhubs2 numuvhubs1 dto snacks retries ");
1390 seq_puts(file,
1391 "rok resetp resett giveup sto bz throt disable ");
1392 seq_puts(file,
1393 "enable wars warshw warwaits enters ipidis plugged ");
1394 seq_puts(file,
1395 "ipiover glim cong swack recv rtime all one mult ");
1396 seq_puts(file, "none retry canc nocan reset rcan\n");
1397 }
1398 if (cpu < num_possible_cpus() && cpu_online(cpu)) {
1399 bcp = &per_cpu(bau_control, cpu);
1400 if (bcp->nobau) {
1401 seq_printf(file, "cpu %d bau disabled\n", cpu);
1402 return 0;
1403 }
1404 stat = bcp->statp;
1405 /* source side statistics */
1406 seq_printf(file,
1407 "cpu %d %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1408 cpu, bcp->nobau, stat->s_requestor,
1409 cycles_2_us(stat->s_time),
1410 stat->s_ntargself, stat->s_ntarglocals,
1411 stat->s_ntargremotes, stat->s_ntargcpu,
1412 stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
1413 stat->s_ntarguvhub, stat->s_ntarguvhub16);
1414 seq_printf(file, "%ld %ld %ld %ld %ld %ld ",
1415 stat->s_ntarguvhub8, stat->s_ntarguvhub4,
1416 stat->s_ntarguvhub2, stat->s_ntarguvhub1,
1417 stat->s_dtimeout, stat->s_strongnacks);
1418 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
1419 stat->s_retry_messages, stat->s_retriesok,
1420 stat->s_resets_plug, stat->s_resets_timeout,
1421 stat->s_giveup, stat->s_stimeout,
1422 stat->s_busy, stat->s_throttles);
1423 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1424 stat->s_bau_disabled, stat->s_bau_reenabled,
1425 stat->s_uv2_wars, stat->s_uv2_wars_hw,
1426 stat->s_uv2_war_waits, stat->s_enters,
1427 stat->s_ipifordisabled, stat->s_plugged,
1428 stat->s_overipilimit, stat->s_giveuplimit,
1429 stat->s_congested);
1430
1431 /* destination side statistics */
1432 seq_printf(file,
1433 "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
1434 read_gmmr_sw_ack(uv_cpu_to_pnode(cpu)),
1435 stat->d_requestee, cycles_2_us(stat->d_time),
1436 stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
1437 stat->d_nomsg, stat->d_retries, stat->d_canceled,
1438 stat->d_nocanceled, stat->d_resets,
1439 stat->d_rcanceled);
1440 }
1441 return 0;
1442 }
1443
1444 /*
1445 * Display the tunables thru debugfs
1446 */
1447 static ssize_t tunables_read(struct file *file, char __user *userbuf,
1448 size_t count, loff_t *ppos)
1449 {
1450 char *buf;
1451 int ret;
1452
1453 buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d %d\n",
1454 "max_concur plugged_delay plugsb4reset timeoutsb4reset",
1455 "ipi_reset_limit complete_threshold congested_response_us",
1456 "congested_reps disabled_period giveup_limit",
1457 max_concurr, plugged_delay, plugsb4reset,
1458 timeoutsb4reset, ipi_reset_limit, complete_threshold,
1459 congested_respns_us, congested_reps, disabled_period,
1460 giveup_limit);
1461
1462 if (!buf)
1463 return -ENOMEM;
1464
1465 ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
1466 kfree(buf);
1467 return ret;
1468 }
1469
1470 /*
1471 * handle a write to /proc/sgi_uv/ptc_statistics
1472 * -1: reset the statistics
1473 * 0: display meaning of the statistics
1474 */
1475 static ssize_t ptc_proc_write(struct file *file, const char __user *user,
1476 size_t count, loff_t *data)
1477 {
1478 int cpu;
1479 int i;
1480 int elements;
1481 long input_arg;
1482 char optstr[64];
1483 struct ptc_stats *stat;
1484
1485 if (count == 0 || count > sizeof(optstr))
1486 return -EINVAL;
1487 if (copy_from_user(optstr, user, count))
1488 return -EFAULT;
1489 optstr[count - 1] = '\0';
1490
1491 if (!strcmp(optstr, "on")) {
1492 set_bau_on();
1493 return count;
1494 } else if (!strcmp(optstr, "off")) {
1495 set_bau_off();
1496 return count;
1497 }
1498
1499 if (kstrtol(optstr, 10, &input_arg) < 0) {
1500 printk(KERN_DEBUG "%s is invalid\n", optstr);
1501 return -EINVAL;
1502 }
1503
1504 if (input_arg == 0) {
1505 elements = ARRAY_SIZE(stat_description);
1506 printk(KERN_DEBUG "# cpu: cpu number\n");
1507 printk(KERN_DEBUG "Sender statistics:\n");
1508 for (i = 0; i < elements; i++)
1509 printk(KERN_DEBUG "%s\n", stat_description[i]);
1510 } else if (input_arg == -1) {
1511 for_each_present_cpu(cpu) {
1512 stat = &per_cpu(ptcstats, cpu);
1513 memset(stat, 0, sizeof(struct ptc_stats));
1514 }
1515 }
1516
1517 return count;
1518 }
1519
1520 static int local_atoi(const char *name)
1521 {
1522 int val = 0;
1523
1524 for (;; name++) {
1525 switch (*name) {
1526 case '0' ... '9':
1527 val = 10*val+(*name-'0');
1528 break;
1529 default:
1530 return val;
1531 }
1532 }
1533 }
1534
1535 /*
1536 * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
1537 * Zero values reset them to defaults.
1538 */
1539 static int parse_tunables_write(struct bau_control *bcp, char *instr,
1540 int count)
1541 {
1542 char *p;
1543 char *q;
1544 int cnt = 0;
1545 int val;
1546 int e = ARRAY_SIZE(tunables);
1547
1548 p = instr + strspn(instr, WHITESPACE);
1549 q = p;
1550 for (; *p; p = q + strspn(q, WHITESPACE)) {
1551 q = p + strcspn(p, WHITESPACE);
1552 cnt++;
1553 if (q == p)
1554 break;
1555 }
1556 if (cnt != e) {
1557 printk(KERN_INFO "bau tunable error: should be %d values\n", e);
1558 return -EINVAL;
1559 }
1560
1561 p = instr + strspn(instr, WHITESPACE);
1562 q = p;
1563 for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
1564 q = p + strcspn(p, WHITESPACE);
1565 val = local_atoi(p);
1566 switch (cnt) {
1567 case 0:
1568 if (val == 0) {
1569 max_concurr = MAX_BAU_CONCURRENT;
1570 max_concurr_const = MAX_BAU_CONCURRENT;
1571 continue;
1572 }
1573 if (val < 1 || val > bcp->cpus_in_uvhub) {
1574 printk(KERN_DEBUG
1575 "Error: BAU max concurrent %d is invalid\n",
1576 val);
1577 return -EINVAL;
1578 }
1579 max_concurr = val;
1580 max_concurr_const = val;
1581 continue;
1582 default:
1583 if (val == 0)
1584 *tunables[cnt].tunp = tunables[cnt].deflt;
1585 else
1586 *tunables[cnt].tunp = val;
1587 continue;
1588 }
1589 if (q == p)
1590 break;
1591 }
1592 return 0;
1593 }
1594
1595 /*
1596 * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
1597 */
1598 static ssize_t tunables_write(struct file *file, const char __user *user,
1599 size_t count, loff_t *data)
1600 {
1601 int cpu;
1602 int ret;
1603 char instr[100];
1604 struct bau_control *bcp;
1605
1606 if (count == 0 || count > sizeof(instr)-1)
1607 return -EINVAL;
1608 if (copy_from_user(instr, user, count))
1609 return -EFAULT;
1610
1611 instr[count] = '\0';
1612
1613 cpu = get_cpu();
1614 bcp = &per_cpu(bau_control, cpu);
1615 ret = parse_tunables_write(bcp, instr, count);
1616 put_cpu();
1617 if (ret)
1618 return ret;
1619
1620 for_each_present_cpu(cpu) {
1621 bcp = &per_cpu(bau_control, cpu);
1622 bcp->max_concurr = max_concurr;
1623 bcp->max_concurr_const = max_concurr;
1624 bcp->plugged_delay = plugged_delay;
1625 bcp->plugsb4reset = plugsb4reset;
1626 bcp->timeoutsb4reset = timeoutsb4reset;
1627 bcp->ipi_reset_limit = ipi_reset_limit;
1628 bcp->complete_threshold = complete_threshold;
1629 bcp->cong_response_us = congested_respns_us;
1630 bcp->cong_reps = congested_reps;
1631 bcp->disabled_period = sec_2_cycles(disabled_period);
1632 bcp->giveup_limit = giveup_limit;
1633 }
1634 return count;
1635 }
1636
1637 static const struct seq_operations uv_ptc_seq_ops = {
1638 .start = ptc_seq_start,
1639 .next = ptc_seq_next,
1640 .stop = ptc_seq_stop,
1641 .show = ptc_seq_show
1642 };
1643
1644 static int ptc_proc_open(struct inode *inode, struct file *file)
1645 {
1646 return seq_open(file, &uv_ptc_seq_ops);
1647 }
1648
1649 static int tunables_open(struct inode *inode, struct file *file)
1650 {
1651 return 0;
1652 }
1653
1654 static const struct file_operations proc_uv_ptc_operations = {
1655 .open = ptc_proc_open,
1656 .read = seq_read,
1657 .write = ptc_proc_write,
1658 .llseek = seq_lseek,
1659 .release = seq_release,
1660 };
1661
1662 static const struct file_operations tunables_fops = {
1663 .open = tunables_open,
1664 .read = tunables_read,
1665 .write = tunables_write,
1666 .llseek = default_llseek,
1667 };
1668
1669 static int __init uv_ptc_init(void)
1670 {
1671 struct proc_dir_entry *proc_uv_ptc;
1672
1673 if (!is_uv_system())
1674 return 0;
1675
1676 proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
1677 &proc_uv_ptc_operations);
1678 if (!proc_uv_ptc) {
1679 printk(KERN_ERR "unable to create %s proc entry\n",
1680 UV_PTC_BASENAME);
1681 return -EINVAL;
1682 }
1683
1684 tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
1685 if (!tunables_dir) {
1686 printk(KERN_ERR "unable to create debugfs directory %s\n",
1687 UV_BAU_TUNABLES_DIR);
1688 return -EINVAL;
1689 }
1690 tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
1691 tunables_dir, NULL, &tunables_fops);
1692 if (!tunables_file) {
1693 printk(KERN_ERR "unable to create debugfs file %s\n",
1694 UV_BAU_TUNABLES_FILE);
1695 return -EINVAL;
1696 }
1697 return 0;
1698 }
1699
1700 /*
1701 * Initialize the sending side's sending buffers.
1702 */
1703 static void activation_descriptor_init(int node, int pnode, int base_pnode)
1704 {
1705 int i;
1706 int cpu;
1707 int uv1 = 0;
1708 unsigned long gpa;
1709 unsigned long m;
1710 unsigned long n;
1711 size_t dsize;
1712 struct bau_desc *bau_desc;
1713 struct bau_desc *bd2;
1714 struct uv1_bau_msg_header *uv1_hdr;
1715 struct uv2_3_bau_msg_header *uv2_3_hdr;
1716 struct bau_control *bcp;
1717
1718 /*
1719 * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
1720 * per cpu; and one per cpu on the uvhub (ADP_SZ)
1721 */
1722 dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
1723 bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
1724 BUG_ON(!bau_desc);
1725
1726 gpa = uv_gpa(bau_desc);
1727 n = uv_gpa_to_gnode(gpa);
1728 m = uv_gpa_to_offset(gpa);
1729 if (is_uv1_hub())
1730 uv1 = 1;
1731
1732 /* the 14-bit pnode */
1733 write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
1734 /*
1735 * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
1736 * cpu even though we only use the first one; one descriptor can
1737 * describe a broadcast to 256 uv hubs.
1738 */
1739 for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
1740 memset(bd2, 0, sizeof(struct bau_desc));
1741 if (uv1) {
1742 uv1_hdr = &bd2->header.uv1_hdr;
1743 uv1_hdr->swack_flag = 1;
1744 /*
1745 * The base_dest_nasid set in the message header
1746 * is the nasid of the first uvhub in the partition.
1747 * The bit map will indicate destination pnode numbers
1748 * relative to that base. They may not be consecutive
1749 * if nasid striding is being used.
1750 */
1751 uv1_hdr->base_dest_nasid =
1752 UV_PNODE_TO_NASID(base_pnode);
1753 uv1_hdr->dest_subnodeid = UV_LB_SUBNODEID;
1754 uv1_hdr->command = UV_NET_ENDPOINT_INTD;
1755 uv1_hdr->int_both = 1;
1756 /*
1757 * all others need to be set to zero:
1758 * fairness chaining multilevel count replied_to
1759 */
1760 } else {
1761 /*
1762 * BIOS uses legacy mode, but uv2 and uv3 hardware always
1763 * uses native mode for selective broadcasts.
1764 */
1765 uv2_3_hdr = &bd2->header.uv2_3_hdr;
1766 uv2_3_hdr->swack_flag = 1;
1767 uv2_3_hdr->base_dest_nasid =
1768 UV_PNODE_TO_NASID(base_pnode);
1769 uv2_3_hdr->dest_subnodeid = UV_LB_SUBNODEID;
1770 uv2_3_hdr->command = UV_NET_ENDPOINT_INTD;
1771 }
1772 }
1773 for_each_present_cpu(cpu) {
1774 if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
1775 continue;
1776 bcp = &per_cpu(bau_control, cpu);
1777 bcp->descriptor_base = bau_desc;
1778 }
1779 }
1780
1781 /*
1782 * initialize the destination side's receiving buffers
1783 * entered for each uvhub in the partition
1784 * - node is first node (kernel memory notion) on the uvhub
1785 * - pnode is the uvhub's physical identifier
1786 */
1787 static void pq_init(int node, int pnode)
1788 {
1789 int cpu;
1790 size_t plsize;
1791 char *cp;
1792 void *vp;
1793 unsigned long pn;
1794 unsigned long first;
1795 unsigned long pn_first;
1796 unsigned long last;
1797 struct bau_pq_entry *pqp;
1798 struct bau_control *bcp;
1799
1800 plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
1801 vp = kmalloc_node(plsize, GFP_KERNEL, node);
1802 pqp = (struct bau_pq_entry *)vp;
1803 BUG_ON(!pqp);
1804
1805 cp = (char *)pqp + 31;
1806 pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
1807
1808 for_each_present_cpu(cpu) {
1809 if (pnode != uv_cpu_to_pnode(cpu))
1810 continue;
1811 /* for every cpu on this pnode: */
1812 bcp = &per_cpu(bau_control, cpu);
1813 bcp->queue_first = pqp;
1814 bcp->bau_msg_head = pqp;
1815 bcp->queue_last = pqp + (DEST_Q_SIZE - 1);
1816 }
1817 /*
1818 * need the gnode of where the memory was really allocated
1819 */
1820 pn = uv_gpa_to_gnode(uv_gpa(pqp));
1821 first = uv_physnodeaddr(pqp);
1822 pn_first = ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | first;
1823 last = uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1));
1824 write_mmr_payload_first(pnode, pn_first);
1825 write_mmr_payload_tail(pnode, first);
1826 write_mmr_payload_last(pnode, last);
1827 write_gmmr_sw_ack(pnode, 0xffffUL);
1828
1829 /* in effect, all msg_type's are set to MSG_NOOP */
1830 memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
1831 }
1832
1833 /*
1834 * Initialization of each UV hub's structures
1835 */
1836 static void __init init_uvhub(int uvhub, int vector, int base_pnode)
1837 {
1838 int node;
1839 int pnode;
1840 unsigned long apicid;
1841
1842 node = uvhub_to_first_node(uvhub);
1843 pnode = uv_blade_to_pnode(uvhub);
1844
1845 activation_descriptor_init(node, pnode, base_pnode);
1846
1847 pq_init(node, pnode);
1848 /*
1849 * The below initialization can't be in firmware because the
1850 * messaging IRQ will be determined by the OS.
1851 */
1852 apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
1853 write_mmr_data_config(pnode, ((apicid << 32) | vector));
1854 }
1855
1856 /*
1857 * We will set BAU_MISC_CONTROL with a timeout period.
1858 * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
1859 * So the destination timeout period has to be calculated from them.
1860 */
1861 static int calculate_destination_timeout(void)
1862 {
1863 unsigned long mmr_image;
1864 int mult1;
1865 int mult2;
1866 int index;
1867 int base;
1868 int ret;
1869 unsigned long ts_ns;
1870
1871 if (is_uv1_hub()) {
1872 mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
1873 mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
1874 index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
1875 mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
1876 mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
1877 ts_ns = timeout_base_ns[index];
1878 ts_ns *= (mult1 * mult2);
1879 ret = ts_ns / 1000;
1880 } else {
1881 /* same destination timeout for uv2 and uv3 */
1882 /* 4 bits 0/1 for 10/80us base, 3 bits of multiplier */
1883 mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
1884 mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
1885 if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
1886 base = 80;
1887 else
1888 base = 10;
1889 mult1 = mmr_image & UV2_ACK_MASK;
1890 ret = mult1 * base;
1891 }
1892 return ret;
1893 }
1894
1895 static void __init init_per_cpu_tunables(void)
1896 {
1897 int cpu;
1898 struct bau_control *bcp;
1899
1900 for_each_present_cpu(cpu) {
1901 bcp = &per_cpu(bau_control, cpu);
1902 bcp->baudisabled = 0;
1903 if (nobau)
1904 bcp->nobau = true;
1905 bcp->statp = &per_cpu(ptcstats, cpu);
1906 /* time interval to catch a hardware stay-busy bug */
1907 bcp->timeout_interval = usec_2_cycles(2*timeout_us);
1908 bcp->max_concurr = max_concurr;
1909 bcp->max_concurr_const = max_concurr;
1910 bcp->plugged_delay = plugged_delay;
1911 bcp->plugsb4reset = plugsb4reset;
1912 bcp->timeoutsb4reset = timeoutsb4reset;
1913 bcp->ipi_reset_limit = ipi_reset_limit;
1914 bcp->complete_threshold = complete_threshold;
1915 bcp->cong_response_us = congested_respns_us;
1916 bcp->cong_reps = congested_reps;
1917 bcp->disabled_period = sec_2_cycles(disabled_period);
1918 bcp->giveup_limit = giveup_limit;
1919 spin_lock_init(&bcp->queue_lock);
1920 spin_lock_init(&bcp->uvhub_lock);
1921 spin_lock_init(&bcp->disable_lock);
1922 }
1923 }
1924
1925 /*
1926 * Scan all cpus to collect blade and socket summaries.
1927 */
1928 static int __init get_cpu_topology(int base_pnode,
1929 struct uvhub_desc *uvhub_descs,
1930 unsigned char *uvhub_mask)
1931 {
1932 int cpu;
1933 int pnode;
1934 int uvhub;
1935 int socket;
1936 struct bau_control *bcp;
1937 struct uvhub_desc *bdp;
1938 struct socket_desc *sdp;
1939
1940 for_each_present_cpu(cpu) {
1941 bcp = &per_cpu(bau_control, cpu);
1942
1943 memset(bcp, 0, sizeof(struct bau_control));
1944
1945 pnode = uv_cpu_hub_info(cpu)->pnode;
1946 if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
1947 printk(KERN_EMERG
1948 "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
1949 cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
1950 return 1;
1951 }
1952
1953 bcp->osnode = cpu_to_node(cpu);
1954 bcp->partition_base_pnode = base_pnode;
1955
1956 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1957 *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
1958 bdp = &uvhub_descs[uvhub];
1959
1960 bdp->num_cpus++;
1961 bdp->uvhub = uvhub;
1962 bdp->pnode = pnode;
1963
1964 /* kludge: 'assuming' one node per socket, and assuming that
1965 disabling a socket just leaves a gap in node numbers */
1966 socket = bcp->osnode & 1;
1967 bdp->socket_mask |= (1 << socket);
1968 sdp = &bdp->socket[socket];
1969 sdp->cpu_number[sdp->num_cpus] = cpu;
1970 sdp->num_cpus++;
1971 if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
1972 printk(KERN_EMERG "%d cpus per socket invalid\n",
1973 sdp->num_cpus);
1974 return 1;
1975 }
1976 }
1977 return 0;
1978 }
1979
1980 /*
1981 * Each socket is to get a local array of pnodes/hubs.
1982 */
1983 static void make_per_cpu_thp(struct bau_control *smaster)
1984 {
1985 int cpu;
1986 size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
1987
1988 smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
1989 memset(smaster->thp, 0, hpsz);
1990 for_each_present_cpu(cpu) {
1991 smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
1992 smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1993 }
1994 }
1995
1996 /*
1997 * Each uvhub is to get a local cpumask.
1998 */
1999 static void make_per_hub_cpumask(struct bau_control *hmaster)
2000 {
2001 int sz = sizeof(cpumask_t);
2002
2003 hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
2004 }
2005
2006 /*
2007 * Initialize all the per_cpu information for the cpu's on a given socket,
2008 * given what has been gathered into the socket_desc struct.
2009 * And reports the chosen hub and socket masters back to the caller.
2010 */
2011 static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
2012 struct bau_control **smasterp,
2013 struct bau_control **hmasterp)
2014 {
2015 int i;
2016 int cpu;
2017 struct bau_control *bcp;
2018
2019 for (i = 0; i < sdp->num_cpus; i++) {
2020 cpu = sdp->cpu_number[i];
2021 bcp = &per_cpu(bau_control, cpu);
2022 bcp->cpu = cpu;
2023 if (i == 0) {
2024 *smasterp = bcp;
2025 if (!(*hmasterp))
2026 *hmasterp = bcp;
2027 }
2028 bcp->cpus_in_uvhub = bdp->num_cpus;
2029 bcp->cpus_in_socket = sdp->num_cpus;
2030 bcp->socket_master = *smasterp;
2031 bcp->uvhub = bdp->uvhub;
2032 if (is_uv1_hub())
2033 bcp->uvhub_version = 1;
2034 else if (is_uv2_hub())
2035 bcp->uvhub_version = 2;
2036 else if (is_uv3_hub())
2037 bcp->uvhub_version = 3;
2038 else {
2039 printk(KERN_EMERG "uvhub version not 1, 2 or 3\n");
2040 return 1;
2041 }
2042 bcp->uvhub_master = *hmasterp;
2043 bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->blade_processor_id;
2044 if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
2045 printk(KERN_EMERG "%d cpus per uvhub invalid\n",
2046 bcp->uvhub_cpu);
2047 return 1;
2048 }
2049 }
2050 return 0;
2051 }
2052
2053 /*
2054 * Summarize the blade and socket topology into the per_cpu structures.
2055 */
2056 static int __init summarize_uvhub_sockets(int nuvhubs,
2057 struct uvhub_desc *uvhub_descs,
2058 unsigned char *uvhub_mask)
2059 {
2060 int socket;
2061 int uvhub;
2062 unsigned short socket_mask;
2063
2064 for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2065 struct uvhub_desc *bdp;
2066 struct bau_control *smaster = NULL;
2067 struct bau_control *hmaster = NULL;
2068
2069 if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
2070 continue;
2071
2072 bdp = &uvhub_descs[uvhub];
2073 socket_mask = bdp->socket_mask;
2074 socket = 0;
2075 while (socket_mask) {
2076 struct socket_desc *sdp;
2077 if ((socket_mask & 1)) {
2078 sdp = &bdp->socket[socket];
2079 if (scan_sock(sdp, bdp, &smaster, &hmaster))
2080 return 1;
2081 make_per_cpu_thp(smaster);
2082 }
2083 socket++;
2084 socket_mask = (socket_mask >> 1);
2085 }
2086 make_per_hub_cpumask(hmaster);
2087 }
2088 return 0;
2089 }
2090
2091 /*
2092 * initialize the bau_control structure for each cpu
2093 */
2094 static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
2095 {
2096 unsigned char *uvhub_mask;
2097 void *vp;
2098 struct uvhub_desc *uvhub_descs;
2099
2100 timeout_us = calculate_destination_timeout();
2101
2102 vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
2103 uvhub_descs = (struct uvhub_desc *)vp;
2104 memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
2105 uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
2106
2107 if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
2108 goto fail;
2109
2110 if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
2111 goto fail;
2112
2113 kfree(uvhub_descs);
2114 kfree(uvhub_mask);
2115 init_per_cpu_tunables();
2116 return 0;
2117
2118 fail:
2119 kfree(uvhub_descs);
2120 kfree(uvhub_mask);
2121 return 1;
2122 }
2123
2124 /*
2125 * Initialization of BAU-related structures
2126 */
2127 static int __init uv_bau_init(void)
2128 {
2129 int uvhub;
2130 int pnode;
2131 int nuvhubs;
2132 int cur_cpu;
2133 int cpus;
2134 int vector;
2135 cpumask_var_t *mask;
2136
2137 if (!is_uv_system())
2138 return 0;
2139
2140 for_each_possible_cpu(cur_cpu) {
2141 mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
2142 zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
2143 }
2144
2145 nuvhubs = uv_num_possible_blades();
2146 congested_cycles = usec_2_cycles(congested_respns_us);
2147
2148 uv_base_pnode = 0x7fffffff;
2149 for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2150 cpus = uv_blade_nr_possible_cpus(uvhub);
2151 if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
2152 uv_base_pnode = uv_blade_to_pnode(uvhub);
2153 }
2154
2155 enable_timeouts();
2156
2157 if (init_per_cpu(nuvhubs, uv_base_pnode)) {
2158 set_bau_off();
2159 nobau_perm = 1;
2160 return 0;
2161 }
2162
2163 vector = UV_BAU_MESSAGE;
2164 for_each_possible_blade(uvhub) {
2165 if (uv_blade_nr_possible_cpus(uvhub))
2166 init_uvhub(uvhub, vector, uv_base_pnode);
2167 }
2168
2169 alloc_intr_gate(vector, uv_bau_message_intr1);
2170
2171 for_each_possible_blade(uvhub) {
2172 if (uv_blade_nr_possible_cpus(uvhub)) {
2173 unsigned long val;
2174 unsigned long mmr;
2175 pnode = uv_blade_to_pnode(uvhub);
2176 /* INIT the bau */
2177 val = 1L << 63;
2178 write_gmmr_activation(pnode, val);
2179 mmr = 1; /* should be 1 to broadcast to both sockets */
2180 if (!is_uv1_hub())
2181 write_mmr_data_broadcast(pnode, mmr);
2182 }
2183 }
2184
2185 return 0;
2186 }
2187 core_initcall(uv_bau_init);
2188 fs_initcall(uv_ptc_init);