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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Core of Xen paravirt_ops implementation.
4 *
5 * This file contains the xen_paravirt_ops structure itself, and the
6 * implementations for:
7 * - privileged instructions
8 * - interrupt flags
9 * - segment operations
10 * - booting and setup
11 *
12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
13 */
14
15 #include <linux/cpu.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/smp.h>
19 #include <linux/preempt.h>
20 #include <linux/hardirq.h>
21 #include <linux/percpu.h>
22 #include <linux/delay.h>
23 #include <linux/start_kernel.h>
24 #include <linux/sched.h>
25 #include <linux/kprobes.h>
26 #include <linux/memblock.h>
27 #include <linux/export.h>
28 #include <linux/mm.h>
29 #include <linux/page-flags.h>
30 #include <linux/highmem.h>
31 #include <linux/console.h>
32 #include <linux/pci.h>
33 #include <linux/gfp.h>
34 #include <linux/edd.h>
35 #include <linux/frame.h>
36
37 #include <xen/xen.h>
38 #include <xen/events.h>
39 #include <xen/interface/xen.h>
40 #include <xen/interface/version.h>
41 #include <xen/interface/physdev.h>
42 #include <xen/interface/vcpu.h>
43 #include <xen/interface/memory.h>
44 #include <xen/interface/nmi.h>
45 #include <xen/interface/xen-mca.h>
46 #include <xen/features.h>
47 #include <xen/page.h>
48 #include <xen/hvc-console.h>
49 #include <xen/acpi.h>
50
51 #include <asm/paravirt.h>
52 #include <asm/apic.h>
53 #include <asm/page.h>
54 #include <asm/xen/pci.h>
55 #include <asm/xen/hypercall.h>
56 #include <asm/xen/hypervisor.h>
57 #include <asm/xen/cpuid.h>
58 #include <asm/fixmap.h>
59 #include <asm/processor.h>
60 #include <asm/proto.h>
61 #include <asm/msr-index.h>
62 #include <asm/traps.h>
63 #include <asm/setup.h>
64 #include <asm/desc.h>
65 #include <asm/pgalloc.h>
66 #include <asm/pgtable.h>
67 #include <asm/tlbflush.h>
68 #include <asm/reboot.h>
69 #include <asm/stackprotector.h>
70 #include <asm/hypervisor.h>
71 #include <asm/mach_traps.h>
72 #include <asm/mwait.h>
73 #include <asm/pci_x86.h>
74 #include <asm/cpu.h>
75
76 #ifdef CONFIG_ACPI
77 #include <linux/acpi.h>
78 #include <asm/acpi.h>
79 #include <acpi/pdc_intel.h>
80 #include <acpi/processor.h>
81 #include <xen/interface/platform.h>
82 #endif
83
84 #include "xen-ops.h"
85 #include "mmu.h"
86 #include "smp.h"
87 #include "multicalls.h"
88 #include "pmu.h"
89
90 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */
91
92 void *xen_initial_gdt;
93
94 static int xen_cpu_up_prepare_pv(unsigned int cpu);
95 static int xen_cpu_dead_pv(unsigned int cpu);
96
97 struct tls_descs {
98 struct desc_struct desc[3];
99 };
100
101 /*
102 * Updating the 3 TLS descriptors in the GDT on every task switch is
103 * surprisingly expensive so we avoid updating them if they haven't
104 * changed. Since Xen writes different descriptors than the one
105 * passed in the update_descriptor hypercall we keep shadow copies to
106 * compare against.
107 */
108 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
109
110 static void __init xen_banner(void)
111 {
112 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
113 struct xen_extraversion extra;
114 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
115
116 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name);
117 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
118 version >> 16, version & 0xffff, extra.extraversion,
119 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
120 }
121
122 static void __init xen_pv_init_platform(void)
123 {
124 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP));
125
126 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info);
127 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
128
129 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */
130 xen_vcpu_info_reset(0);
131
132 /* pvclock is in shared info area */
133 xen_init_time_ops();
134 }
135
136 static void __init xen_pv_guest_late_init(void)
137 {
138 #ifndef CONFIG_SMP
139 /* Setup shared vcpu info for non-smp configurations */
140 xen_setup_vcpu_info_placement();
141 #endif
142 }
143
144 /* Check if running on Xen version (major, minor) or later */
145 bool
146 xen_running_on_version_or_later(unsigned int major, unsigned int minor)
147 {
148 unsigned int version;
149
150 if (!xen_domain())
151 return false;
152
153 version = HYPERVISOR_xen_version(XENVER_version, NULL);
154 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
155 ((version >> 16) > major))
156 return true;
157 return false;
158 }
159
160 static __read_mostly unsigned int cpuid_leaf5_ecx_val;
161 static __read_mostly unsigned int cpuid_leaf5_edx_val;
162
163 static void xen_cpuid(unsigned int *ax, unsigned int *bx,
164 unsigned int *cx, unsigned int *dx)
165 {
166 unsigned maskebx = ~0;
167
168 /*
169 * Mask out inconvenient features, to try and disable as many
170 * unsupported kernel subsystems as possible.
171 */
172 switch (*ax) {
173 case CPUID_MWAIT_LEAF:
174 /* Synthesize the values.. */
175 *ax = 0;
176 *bx = 0;
177 *cx = cpuid_leaf5_ecx_val;
178 *dx = cpuid_leaf5_edx_val;
179 return;
180
181 case 0xb:
182 /* Suppress extended topology stuff */
183 maskebx = 0;
184 break;
185 }
186
187 asm(XEN_EMULATE_PREFIX "cpuid"
188 : "=a" (*ax),
189 "=b" (*bx),
190 "=c" (*cx),
191 "=d" (*dx)
192 : "0" (*ax), "2" (*cx));
193
194 *bx &= maskebx;
195 }
196 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */
197
198 static bool __init xen_check_mwait(void)
199 {
200 #ifdef CONFIG_ACPI
201 struct xen_platform_op op = {
202 .cmd = XENPF_set_processor_pminfo,
203 .u.set_pminfo.id = -1,
204 .u.set_pminfo.type = XEN_PM_PDC,
205 };
206 uint32_t buf[3];
207 unsigned int ax, bx, cx, dx;
208 unsigned int mwait_mask;
209
210 /* We need to determine whether it is OK to expose the MWAIT
211 * capability to the kernel to harvest deeper than C3 states from ACPI
212 * _CST using the processor_harvest_xen.c module. For this to work, we
213 * need to gather the MWAIT_LEAF values (which the cstate.c code
214 * checks against). The hypervisor won't expose the MWAIT flag because
215 * it would break backwards compatibility; so we will find out directly
216 * from the hardware and hypercall.
217 */
218 if (!xen_initial_domain())
219 return false;
220
221 /*
222 * When running under platform earlier than Xen4.2, do not expose
223 * mwait, to avoid the risk of loading native acpi pad driver
224 */
225 if (!xen_running_on_version_or_later(4, 2))
226 return false;
227
228 ax = 1;
229 cx = 0;
230
231 native_cpuid(&ax, &bx, &cx, &dx);
232
233 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
234 (1 << (X86_FEATURE_MWAIT % 32));
235
236 if ((cx & mwait_mask) != mwait_mask)
237 return false;
238
239 /* We need to emulate the MWAIT_LEAF and for that we need both
240 * ecx and edx. The hypercall provides only partial information.
241 */
242
243 ax = CPUID_MWAIT_LEAF;
244 bx = 0;
245 cx = 0;
246 dx = 0;
247
248 native_cpuid(&ax, &bx, &cx, &dx);
249
250 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
251 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
252 */
253 buf[0] = ACPI_PDC_REVISION_ID;
254 buf[1] = 1;
255 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
256
257 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
258
259 if ((HYPERVISOR_platform_op(&op) == 0) &&
260 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
261 cpuid_leaf5_ecx_val = cx;
262 cpuid_leaf5_edx_val = dx;
263 }
264 return true;
265 #else
266 return false;
267 #endif
268 }
269
270 static bool __init xen_check_xsave(void)
271 {
272 unsigned int cx, xsave_mask;
273
274 cx = cpuid_ecx(1);
275
276 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) |
277 (1 << (X86_FEATURE_OSXSAVE % 32));
278
279 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
280 return (cx & xsave_mask) == xsave_mask;
281 }
282
283 static void __init xen_init_capabilities(void)
284 {
285 setup_force_cpu_cap(X86_FEATURE_XENPV);
286 setup_clear_cpu_cap(X86_FEATURE_DCA);
287 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF);
288 setup_clear_cpu_cap(X86_FEATURE_MTRR);
289 setup_clear_cpu_cap(X86_FEATURE_ACC);
290 setup_clear_cpu_cap(X86_FEATURE_X2APIC);
291 setup_clear_cpu_cap(X86_FEATURE_SME);
292
293 /*
294 * Xen PV would need some work to support PCID: CR3 handling as well
295 * as xen_flush_tlb_others() would need updating.
296 */
297 setup_clear_cpu_cap(X86_FEATURE_PCID);
298
299 if (!xen_initial_domain())
300 setup_clear_cpu_cap(X86_FEATURE_ACPI);
301
302 if (xen_check_mwait())
303 setup_force_cpu_cap(X86_FEATURE_MWAIT);
304 else
305 setup_clear_cpu_cap(X86_FEATURE_MWAIT);
306
307 if (!xen_check_xsave()) {
308 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
309 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE);
310 }
311 }
312
313 static void xen_set_debugreg(int reg, unsigned long val)
314 {
315 HYPERVISOR_set_debugreg(reg, val);
316 }
317
318 static unsigned long xen_get_debugreg(int reg)
319 {
320 return HYPERVISOR_get_debugreg(reg);
321 }
322
323 static void xen_end_context_switch(struct task_struct *next)
324 {
325 xen_mc_flush();
326 paravirt_end_context_switch(next);
327 }
328
329 static unsigned long xen_store_tr(void)
330 {
331 return 0;
332 }
333
334 /*
335 * Set the page permissions for a particular virtual address. If the
336 * address is a vmalloc mapping (or other non-linear mapping), then
337 * find the linear mapping of the page and also set its protections to
338 * match.
339 */
340 static void set_aliased_prot(void *v, pgprot_t prot)
341 {
342 int level;
343 pte_t *ptep;
344 pte_t pte;
345 unsigned long pfn;
346 struct page *page;
347 unsigned char dummy;
348
349 ptep = lookup_address((unsigned long)v, &level);
350 BUG_ON(ptep == NULL);
351
352 pfn = pte_pfn(*ptep);
353 page = pfn_to_page(pfn);
354
355 pte = pfn_pte(pfn, prot);
356
357 /*
358 * Careful: update_va_mapping() will fail if the virtual address
359 * we're poking isn't populated in the page tables. We don't
360 * need to worry about the direct map (that's always in the page
361 * tables), but we need to be careful about vmap space. In
362 * particular, the top level page table can lazily propagate
363 * entries between processes, so if we've switched mms since we
364 * vmapped the target in the first place, we might not have the
365 * top-level page table entry populated.
366 *
367 * We disable preemption because we want the same mm active when
368 * we probe the target and when we issue the hypercall. We'll
369 * have the same nominal mm, but if we're a kernel thread, lazy
370 * mm dropping could change our pgd.
371 *
372 * Out of an abundance of caution, this uses __get_user() to fault
373 * in the target address just in case there's some obscure case
374 * in which the target address isn't readable.
375 */
376
377 preempt_disable();
378
379 probe_kernel_read(&dummy, v, 1);
380
381 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
382 BUG();
383
384 if (!PageHighMem(page)) {
385 void *av = __va(PFN_PHYS(pfn));
386
387 if (av != v)
388 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
389 BUG();
390 } else
391 kmap_flush_unused();
392
393 preempt_enable();
394 }
395
396 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
397 {
398 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
399 int i;
400
401 /*
402 * We need to mark the all aliases of the LDT pages RO. We
403 * don't need to call vm_flush_aliases(), though, since that's
404 * only responsible for flushing aliases out the TLBs, not the
405 * page tables, and Xen will flush the TLB for us if needed.
406 *
407 * To avoid confusing future readers: none of this is necessary
408 * to load the LDT. The hypervisor only checks this when the
409 * LDT is faulted in due to subsequent descriptor access.
410 */
411
412 for (i = 0; i < entries; i += entries_per_page)
413 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
414 }
415
416 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
417 {
418 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
419 int i;
420
421 for (i = 0; i < entries; i += entries_per_page)
422 set_aliased_prot(ldt + i, PAGE_KERNEL);
423 }
424
425 static void xen_set_ldt(const void *addr, unsigned entries)
426 {
427 struct mmuext_op *op;
428 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
429
430 trace_xen_cpu_set_ldt(addr, entries);
431
432 op = mcs.args;
433 op->cmd = MMUEXT_SET_LDT;
434 op->arg1.linear_addr = (unsigned long)addr;
435 op->arg2.nr_ents = entries;
436
437 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
438
439 xen_mc_issue(PARAVIRT_LAZY_CPU);
440 }
441
442 static void xen_load_gdt(const struct desc_ptr *dtr)
443 {
444 unsigned long va = dtr->address;
445 unsigned int size = dtr->size + 1;
446 unsigned long pfn, mfn;
447 int level;
448 pte_t *ptep;
449 void *virt;
450
451 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
452 BUG_ON(size > PAGE_SIZE);
453 BUG_ON(va & ~PAGE_MASK);
454
455 /*
456 * The GDT is per-cpu and is in the percpu data area.
457 * That can be virtually mapped, so we need to do a
458 * page-walk to get the underlying MFN for the
459 * hypercall. The page can also be in the kernel's
460 * linear range, so we need to RO that mapping too.
461 */
462 ptep = lookup_address(va, &level);
463 BUG_ON(ptep == NULL);
464
465 pfn = pte_pfn(*ptep);
466 mfn = pfn_to_mfn(pfn);
467 virt = __va(PFN_PHYS(pfn));
468
469 make_lowmem_page_readonly((void *)va);
470 make_lowmem_page_readonly(virt);
471
472 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
473 BUG();
474 }
475
476 /*
477 * load_gdt for early boot, when the gdt is only mapped once
478 */
479 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
480 {
481 unsigned long va = dtr->address;
482 unsigned int size = dtr->size + 1;
483 unsigned long pfn, mfn;
484 pte_t pte;
485
486 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
487 BUG_ON(size > PAGE_SIZE);
488 BUG_ON(va & ~PAGE_MASK);
489
490 pfn = virt_to_pfn(va);
491 mfn = pfn_to_mfn(pfn);
492
493 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
494
495 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
496 BUG();
497
498 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
499 BUG();
500 }
501
502 static inline bool desc_equal(const struct desc_struct *d1,
503 const struct desc_struct *d2)
504 {
505 return !memcmp(d1, d2, sizeof(*d1));
506 }
507
508 static void load_TLS_descriptor(struct thread_struct *t,
509 unsigned int cpu, unsigned int i)
510 {
511 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
512 struct desc_struct *gdt;
513 xmaddr_t maddr;
514 struct multicall_space mc;
515
516 if (desc_equal(shadow, &t->tls_array[i]))
517 return;
518
519 *shadow = t->tls_array[i];
520
521 gdt = get_cpu_gdt_rw(cpu);
522 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
523 mc = __xen_mc_entry(0);
524
525 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
526 }
527
528 static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
529 {
530 /*
531 * XXX sleazy hack: If we're being called in a lazy-cpu zone
532 * and lazy gs handling is enabled, it means we're in a
533 * context switch, and %gs has just been saved. This means we
534 * can zero it out to prevent faults on exit from the
535 * hypervisor if the next process has no %gs. Either way, it
536 * has been saved, and the new value will get loaded properly.
537 * This will go away as soon as Xen has been modified to not
538 * save/restore %gs for normal hypercalls.
539 *
540 * On x86_64, this hack is not used for %gs, because gs points
541 * to KERNEL_GS_BASE (and uses it for PDA references), so we
542 * must not zero %gs on x86_64
543 *
544 * For x86_64, we need to zero %fs, otherwise we may get an
545 * exception between the new %fs descriptor being loaded and
546 * %fs being effectively cleared at __switch_to().
547 */
548 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
549 #ifdef CONFIG_X86_32
550 lazy_load_gs(0);
551 #else
552 loadsegment(fs, 0);
553 #endif
554 }
555
556 xen_mc_batch();
557
558 load_TLS_descriptor(t, cpu, 0);
559 load_TLS_descriptor(t, cpu, 1);
560 load_TLS_descriptor(t, cpu, 2);
561
562 xen_mc_issue(PARAVIRT_LAZY_CPU);
563 }
564
565 #ifdef CONFIG_X86_64
566 static void xen_load_gs_index(unsigned int idx)
567 {
568 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
569 BUG();
570 }
571 #endif
572
573 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
574 const void *ptr)
575 {
576 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
577 u64 entry = *(u64 *)ptr;
578
579 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
580
581 preempt_disable();
582
583 xen_mc_flush();
584 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
585 BUG();
586
587 preempt_enable();
588 }
589
590 #ifdef CONFIG_X86_64
591 struct trap_array_entry {
592 void (*orig)(void);
593 void (*xen)(void);
594 bool ist_okay;
595 };
596
597 static struct trap_array_entry trap_array[] = {
598 { debug, xen_xendebug, true },
599 { double_fault, xen_double_fault, true },
600 #ifdef CONFIG_X86_MCE
601 { machine_check, xen_machine_check, true },
602 #endif
603 { nmi, xen_xennmi, true },
604 { int3, xen_int3, false },
605 { overflow, xen_overflow, false },
606 #ifdef CONFIG_IA32_EMULATION
607 { entry_INT80_compat, xen_entry_INT80_compat, false },
608 #endif
609 { page_fault, xen_page_fault, false },
610 { divide_error, xen_divide_error, false },
611 { bounds, xen_bounds, false },
612 { invalid_op, xen_invalid_op, false },
613 { device_not_available, xen_device_not_available, false },
614 { coprocessor_segment_overrun, xen_coprocessor_segment_overrun, false },
615 { invalid_TSS, xen_invalid_TSS, false },
616 { segment_not_present, xen_segment_not_present, false },
617 { stack_segment, xen_stack_segment, false },
618 { general_protection, xen_general_protection, false },
619 { spurious_interrupt_bug, xen_spurious_interrupt_bug, false },
620 { coprocessor_error, xen_coprocessor_error, false },
621 { alignment_check, xen_alignment_check, false },
622 { simd_coprocessor_error, xen_simd_coprocessor_error, false },
623 };
624
625 static bool __ref get_trap_addr(void **addr, unsigned int ist)
626 {
627 unsigned int nr;
628 bool ist_okay = false;
629
630 /*
631 * Replace trap handler addresses by Xen specific ones.
632 * Check for known traps using IST and whitelist them.
633 * The debugger ones are the only ones we care about.
634 * Xen will handle faults like double_fault, * so we should never see
635 * them. Warn if there's an unexpected IST-using fault handler.
636 */
637 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) {
638 struct trap_array_entry *entry = trap_array + nr;
639
640 if (*addr == entry->orig) {
641 *addr = entry->xen;
642 ist_okay = entry->ist_okay;
643 break;
644 }
645 }
646
647 if (nr == ARRAY_SIZE(trap_array) &&
648 *addr >= (void *)early_idt_handler_array[0] &&
649 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) {
650 nr = (*addr - (void *)early_idt_handler_array[0]) /
651 EARLY_IDT_HANDLER_SIZE;
652 *addr = (void *)xen_early_idt_handler_array[nr];
653 }
654
655 if (WARN_ON(ist != 0 && !ist_okay))
656 return false;
657
658 return true;
659 }
660 #endif
661
662 static int cvt_gate_to_trap(int vector, const gate_desc *val,
663 struct trap_info *info)
664 {
665 unsigned long addr;
666
667 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT)
668 return 0;
669
670 info->vector = vector;
671
672 addr = gate_offset(val);
673 #ifdef CONFIG_X86_64
674 if (!get_trap_addr((void **)&addr, val->bits.ist))
675 return 0;
676 #endif /* CONFIG_X86_64 */
677 info->address = addr;
678
679 info->cs = gate_segment(val);
680 info->flags = val->bits.dpl;
681 /* interrupt gates clear IF */
682 if (val->bits.type == GATE_INTERRUPT)
683 info->flags |= 1 << 2;
684
685 return 1;
686 }
687
688 /* Locations of each CPU's IDT */
689 static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
690
691 /* Set an IDT entry. If the entry is part of the current IDT, then
692 also update Xen. */
693 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
694 {
695 unsigned long p = (unsigned long)&dt[entrynum];
696 unsigned long start, end;
697
698 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
699
700 preempt_disable();
701
702 start = __this_cpu_read(idt_desc.address);
703 end = start + __this_cpu_read(idt_desc.size) + 1;
704
705 xen_mc_flush();
706
707 native_write_idt_entry(dt, entrynum, g);
708
709 if (p >= start && (p + 8) <= end) {
710 struct trap_info info[2];
711
712 info[1].address = 0;
713
714 if (cvt_gate_to_trap(entrynum, g, &info[0]))
715 if (HYPERVISOR_set_trap_table(info))
716 BUG();
717 }
718
719 preempt_enable();
720 }
721
722 static void xen_convert_trap_info(const struct desc_ptr *desc,
723 struct trap_info *traps)
724 {
725 unsigned in, out, count;
726
727 count = (desc->size+1) / sizeof(gate_desc);
728 BUG_ON(count > 256);
729
730 for (in = out = 0; in < count; in++) {
731 gate_desc *entry = (gate_desc *)(desc->address) + in;
732
733 if (cvt_gate_to_trap(in, entry, &traps[out]))
734 out++;
735 }
736 traps[out].address = 0;
737 }
738
739 void xen_copy_trap_info(struct trap_info *traps)
740 {
741 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
742
743 xen_convert_trap_info(desc, traps);
744 }
745
746 /* Load a new IDT into Xen. In principle this can be per-CPU, so we
747 hold a spinlock to protect the static traps[] array (static because
748 it avoids allocation, and saves stack space). */
749 static void xen_load_idt(const struct desc_ptr *desc)
750 {
751 static DEFINE_SPINLOCK(lock);
752 static struct trap_info traps[257];
753
754 trace_xen_cpu_load_idt(desc);
755
756 spin_lock(&lock);
757
758 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
759
760 xen_convert_trap_info(desc, traps);
761
762 xen_mc_flush();
763 if (HYPERVISOR_set_trap_table(traps))
764 BUG();
765
766 spin_unlock(&lock);
767 }
768
769 /* Write a GDT descriptor entry. Ignore LDT descriptors, since
770 they're handled differently. */
771 static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
772 const void *desc, int type)
773 {
774 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
775
776 preempt_disable();
777
778 switch (type) {
779 case DESC_LDT:
780 case DESC_TSS:
781 /* ignore */
782 break;
783
784 default: {
785 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
786
787 xen_mc_flush();
788 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
789 BUG();
790 }
791
792 }
793
794 preempt_enable();
795 }
796
797 /*
798 * Version of write_gdt_entry for use at early boot-time needed to
799 * update an entry as simply as possible.
800 */
801 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
802 const void *desc, int type)
803 {
804 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
805
806 switch (type) {
807 case DESC_LDT:
808 case DESC_TSS:
809 /* ignore */
810 break;
811
812 default: {
813 xmaddr_t maddr = virt_to_machine(&dt[entry]);
814
815 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
816 dt[entry] = *(struct desc_struct *)desc;
817 }
818
819 }
820 }
821
822 static void xen_load_sp0(unsigned long sp0)
823 {
824 struct multicall_space mcs;
825
826 mcs = xen_mc_entry(0);
827 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0);
828 xen_mc_issue(PARAVIRT_LAZY_CPU);
829 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0);
830 }
831
832 void xen_set_iopl_mask(unsigned mask)
833 {
834 struct physdev_set_iopl set_iopl;
835
836 /* Force the change at ring 0. */
837 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
838 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
839 }
840
841 static void xen_io_delay(void)
842 {
843 }
844
845 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
846
847 static unsigned long xen_read_cr0(void)
848 {
849 unsigned long cr0 = this_cpu_read(xen_cr0_value);
850
851 if (unlikely(cr0 == 0)) {
852 cr0 = native_read_cr0();
853 this_cpu_write(xen_cr0_value, cr0);
854 }
855
856 return cr0;
857 }
858
859 static void xen_write_cr0(unsigned long cr0)
860 {
861 struct multicall_space mcs;
862
863 this_cpu_write(xen_cr0_value, cr0);
864
865 /* Only pay attention to cr0.TS; everything else is
866 ignored. */
867 mcs = xen_mc_entry(0);
868
869 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
870
871 xen_mc_issue(PARAVIRT_LAZY_CPU);
872 }
873
874 static void xen_write_cr4(unsigned long cr4)
875 {
876 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
877
878 native_write_cr4(cr4);
879 }
880 #ifdef CONFIG_X86_64
881 static inline unsigned long xen_read_cr8(void)
882 {
883 return 0;
884 }
885 static inline void xen_write_cr8(unsigned long val)
886 {
887 BUG_ON(val);
888 }
889 #endif
890
891 static u64 xen_read_msr_safe(unsigned int msr, int *err)
892 {
893 u64 val;
894
895 if (pmu_msr_read(msr, &val, err))
896 return val;
897
898 val = native_read_msr_safe(msr, err);
899 switch (msr) {
900 case MSR_IA32_APICBASE:
901 val &= ~X2APIC_ENABLE;
902 break;
903 }
904 return val;
905 }
906
907 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
908 {
909 int ret;
910
911 ret = 0;
912
913 switch (msr) {
914 #ifdef CONFIG_X86_64
915 unsigned which;
916 u64 base;
917
918 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
919 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
920 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
921
922 set:
923 base = ((u64)high << 32) | low;
924 if (HYPERVISOR_set_segment_base(which, base) != 0)
925 ret = -EIO;
926 break;
927 #endif
928
929 case MSR_STAR:
930 case MSR_CSTAR:
931 case MSR_LSTAR:
932 case MSR_SYSCALL_MASK:
933 case MSR_IA32_SYSENTER_CS:
934 case MSR_IA32_SYSENTER_ESP:
935 case MSR_IA32_SYSENTER_EIP:
936 /* Fast syscall setup is all done in hypercalls, so
937 these are all ignored. Stub them out here to stop
938 Xen console noise. */
939 break;
940
941 default:
942 if (!pmu_msr_write(msr, low, high, &ret))
943 ret = native_write_msr_safe(msr, low, high);
944 }
945
946 return ret;
947 }
948
949 static u64 xen_read_msr(unsigned int msr)
950 {
951 /*
952 * This will silently swallow a #GP from RDMSR. It may be worth
953 * changing that.
954 */
955 int err;
956
957 return xen_read_msr_safe(msr, &err);
958 }
959
960 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
961 {
962 /*
963 * This will silently swallow a #GP from WRMSR. It may be worth
964 * changing that.
965 */
966 xen_write_msr_safe(msr, low, high);
967 }
968
969 /* This is called once we have the cpu_possible_mask */
970 void __init xen_setup_vcpu_info_placement(void)
971 {
972 int cpu;
973
974 for_each_possible_cpu(cpu) {
975 /* Set up direct vCPU id mapping for PV guests. */
976 per_cpu(xen_vcpu_id, cpu) = cpu;
977
978 /*
979 * xen_vcpu_setup(cpu) can fail -- in which case it
980 * falls back to the shared_info version for cpus
981 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS.
982 *
983 * xen_cpu_up_prepare_pv() handles the rest by failing
984 * them in hotplug.
985 */
986 (void) xen_vcpu_setup(cpu);
987 }
988
989 /*
990 * xen_vcpu_setup managed to place the vcpu_info within the
991 * percpu area for all cpus, so make use of it.
992 */
993 if (xen_have_vcpu_info_placement) {
994 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
995 pv_ops.irq.restore_fl =
996 __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
997 pv_ops.irq.irq_disable =
998 __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
999 pv_ops.irq.irq_enable =
1000 __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1001 pv_ops.mmu.read_cr2 =
1002 __PV_IS_CALLEE_SAVE(xen_read_cr2_direct);
1003 }
1004 }
1005
1006 static const struct pv_info xen_info __initconst = {
1007 .shared_kernel_pmd = 0,
1008
1009 #ifdef CONFIG_X86_64
1010 .extra_user_64bit_cs = FLAT_USER_CS64,
1011 #endif
1012 .name = "Xen",
1013 };
1014
1015 static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1016 .cpuid = xen_cpuid,
1017
1018 .set_debugreg = xen_set_debugreg,
1019 .get_debugreg = xen_get_debugreg,
1020
1021 .read_cr0 = xen_read_cr0,
1022 .write_cr0 = xen_write_cr0,
1023
1024 .write_cr4 = xen_write_cr4,
1025
1026 #ifdef CONFIG_X86_64
1027 .read_cr8 = xen_read_cr8,
1028 .write_cr8 = xen_write_cr8,
1029 #endif
1030
1031 .wbinvd = native_wbinvd,
1032
1033 .read_msr = xen_read_msr,
1034 .write_msr = xen_write_msr,
1035
1036 .read_msr_safe = xen_read_msr_safe,
1037 .write_msr_safe = xen_write_msr_safe,
1038
1039 .read_pmc = xen_read_pmc,
1040
1041 .iret = xen_iret,
1042 #ifdef CONFIG_X86_64
1043 .usergs_sysret64 = xen_sysret64,
1044 #endif
1045
1046 .load_tr_desc = paravirt_nop,
1047 .set_ldt = xen_set_ldt,
1048 .load_gdt = xen_load_gdt,
1049 .load_idt = xen_load_idt,
1050 .load_tls = xen_load_tls,
1051 #ifdef CONFIG_X86_64
1052 .load_gs_index = xen_load_gs_index,
1053 #endif
1054
1055 .alloc_ldt = xen_alloc_ldt,
1056 .free_ldt = xen_free_ldt,
1057
1058 .store_tr = xen_store_tr,
1059
1060 .write_ldt_entry = xen_write_ldt_entry,
1061 .write_gdt_entry = xen_write_gdt_entry,
1062 .write_idt_entry = xen_write_idt_entry,
1063 .load_sp0 = xen_load_sp0,
1064
1065 .set_iopl_mask = xen_set_iopl_mask,
1066 .io_delay = xen_io_delay,
1067
1068 /* Xen takes care of %gs when switching to usermode for us */
1069 .swapgs = paravirt_nop,
1070
1071 .start_context_switch = paravirt_start_context_switch,
1072 .end_context_switch = xen_end_context_switch,
1073 };
1074
1075 static void xen_restart(char *msg)
1076 {
1077 xen_reboot(SHUTDOWN_reboot);
1078 }
1079
1080 static void xen_machine_halt(void)
1081 {
1082 xen_reboot(SHUTDOWN_poweroff);
1083 }
1084
1085 static void xen_machine_power_off(void)
1086 {
1087 if (pm_power_off)
1088 pm_power_off();
1089 xen_reboot(SHUTDOWN_poweroff);
1090 }
1091
1092 static void xen_crash_shutdown(struct pt_regs *regs)
1093 {
1094 xen_reboot(SHUTDOWN_crash);
1095 }
1096
1097 static const struct machine_ops xen_machine_ops __initconst = {
1098 .restart = xen_restart,
1099 .halt = xen_machine_halt,
1100 .power_off = xen_machine_power_off,
1101 .shutdown = xen_machine_halt,
1102 .crash_shutdown = xen_crash_shutdown,
1103 .emergency_restart = xen_emergency_restart,
1104 };
1105
1106 static unsigned char xen_get_nmi_reason(void)
1107 {
1108 unsigned char reason = 0;
1109
1110 /* Construct a value which looks like it came from port 0x61. */
1111 if (test_bit(_XEN_NMIREASON_io_error,
1112 &HYPERVISOR_shared_info->arch.nmi_reason))
1113 reason |= NMI_REASON_IOCHK;
1114 if (test_bit(_XEN_NMIREASON_pci_serr,
1115 &HYPERVISOR_shared_info->arch.nmi_reason))
1116 reason |= NMI_REASON_SERR;
1117
1118 return reason;
1119 }
1120
1121 static void __init xen_boot_params_init_edd(void)
1122 {
1123 #if IS_ENABLED(CONFIG_EDD)
1124 struct xen_platform_op op;
1125 struct edd_info *edd_info;
1126 u32 *mbr_signature;
1127 unsigned nr;
1128 int ret;
1129
1130 edd_info = boot_params.eddbuf;
1131 mbr_signature = boot_params.edd_mbr_sig_buffer;
1132
1133 op.cmd = XENPF_firmware_info;
1134
1135 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1136 for (nr = 0; nr < EDDMAXNR; nr++) {
1137 struct edd_info *info = edd_info + nr;
1138
1139 op.u.firmware_info.index = nr;
1140 info->params.length = sizeof(info->params);
1141 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1142 &info->params);
1143 ret = HYPERVISOR_platform_op(&op);
1144 if (ret)
1145 break;
1146
1147 #define C(x) info->x = op.u.firmware_info.u.disk_info.x
1148 C(device);
1149 C(version);
1150 C(interface_support);
1151 C(legacy_max_cylinder);
1152 C(legacy_max_head);
1153 C(legacy_sectors_per_track);
1154 #undef C
1155 }
1156 boot_params.eddbuf_entries = nr;
1157
1158 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1159 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1160 op.u.firmware_info.index = nr;
1161 ret = HYPERVISOR_platform_op(&op);
1162 if (ret)
1163 break;
1164 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1165 }
1166 boot_params.edd_mbr_sig_buf_entries = nr;
1167 #endif
1168 }
1169
1170 /*
1171 * Set up the GDT and segment registers for -fstack-protector. Until
1172 * we do this, we have to be careful not to call any stack-protected
1173 * function, which is most of the kernel.
1174 */
1175 static void __init xen_setup_gdt(int cpu)
1176 {
1177 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot;
1178 pv_ops.cpu.load_gdt = xen_load_gdt_boot;
1179
1180 setup_stack_canary_segment(cpu);
1181 switch_to_new_gdt(cpu);
1182
1183 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry;
1184 pv_ops.cpu.load_gdt = xen_load_gdt;
1185 }
1186
1187 static void __init xen_dom0_set_legacy_features(void)
1188 {
1189 x86_platform.legacy.rtc = 1;
1190 }
1191
1192 /* First C function to be called on Xen boot */
1193 asmlinkage __visible void __init xen_start_kernel(void)
1194 {
1195 struct physdev_set_iopl set_iopl;
1196 unsigned long initrd_start = 0;
1197 int rc;
1198
1199 if (!xen_start_info)
1200 return;
1201
1202 xen_domain_type = XEN_PV_DOMAIN;
1203 xen_start_flags = xen_start_info->flags;
1204
1205 xen_setup_features();
1206
1207 /* Install Xen paravirt ops */
1208 pv_info = xen_info;
1209 pv_ops.init.patch = paravirt_patch_default;
1210 pv_ops.cpu = xen_cpu_ops;
1211 xen_init_irq_ops();
1212
1213 /*
1214 * Setup xen_vcpu early because it is needed for
1215 * local_irq_disable(), irqs_disabled(), e.g. in printk().
1216 *
1217 * Don't do the full vcpu_info placement stuff until we have
1218 * the cpu_possible_mask and a non-dummy shared_info.
1219 */
1220 xen_vcpu_info_reset(0);
1221
1222 x86_platform.get_nmi_reason = xen_get_nmi_reason;
1223
1224 x86_init.resources.memory_setup = xen_memory_setup;
1225 x86_init.irqs.intr_mode_init = x86_init_noop;
1226 x86_init.oem.arch_setup = xen_arch_setup;
1227 x86_init.oem.banner = xen_banner;
1228 x86_init.hyper.init_platform = xen_pv_init_platform;
1229 x86_init.hyper.guest_late_init = xen_pv_guest_late_init;
1230
1231 /*
1232 * Set up some pagetable state before starting to set any ptes.
1233 */
1234
1235 xen_setup_machphys_mapping();
1236 xen_init_mmu_ops();
1237
1238 /* Prevent unwanted bits from being set in PTEs. */
1239 __supported_pte_mask &= ~_PAGE_GLOBAL;
1240 __default_kernel_pte_mask &= ~_PAGE_GLOBAL;
1241
1242 /*
1243 * Prevent page tables from being allocated in highmem, even
1244 * if CONFIG_HIGHPTE is enabled.
1245 */
1246 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1247
1248 /* Get mfn list */
1249 xen_build_dynamic_phys_to_machine();
1250
1251 /*
1252 * Set up kernel GDT and segment registers, mainly so that
1253 * -fstack-protector code can be executed.
1254 */
1255 xen_setup_gdt(0);
1256
1257 /* Work out if we support NX */
1258 get_cpu_cap(&boot_cpu_data);
1259 x86_configure_nx();
1260
1261 /* Determine virtual and physical address sizes */
1262 get_cpu_address_sizes(&boot_cpu_data);
1263
1264 /* Let's presume PV guests always boot on vCPU with id 0. */
1265 per_cpu(xen_vcpu_id, 0) = 0;
1266
1267 idt_setup_early_handler();
1268
1269 xen_init_capabilities();
1270
1271 #ifdef CONFIG_X86_LOCAL_APIC
1272 /*
1273 * set up the basic apic ops.
1274 */
1275 xen_init_apic();
1276 #endif
1277
1278 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1279 pv_ops.mmu.ptep_modify_prot_start =
1280 xen_ptep_modify_prot_start;
1281 pv_ops.mmu.ptep_modify_prot_commit =
1282 xen_ptep_modify_prot_commit;
1283 }
1284
1285 machine_ops = xen_machine_ops;
1286
1287 /*
1288 * The only reliable way to retain the initial address of the
1289 * percpu gdt_page is to remember it here, so we can go and
1290 * mark it RW later, when the initial percpu area is freed.
1291 */
1292 xen_initial_gdt = &per_cpu(gdt_page, 0);
1293
1294 xen_smp_init();
1295
1296 #ifdef CONFIG_ACPI_NUMA
1297 /*
1298 * The pages we from Xen are not related to machine pages, so
1299 * any NUMA information the kernel tries to get from ACPI will
1300 * be meaningless. Prevent it from trying.
1301 */
1302 acpi_numa = -1;
1303 #endif
1304 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv));
1305
1306 local_irq_disable();
1307 early_boot_irqs_disabled = true;
1308
1309 xen_raw_console_write("mapping kernel into physical memory\n");
1310 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
1311 xen_start_info->nr_pages);
1312 xen_reserve_special_pages();
1313
1314 /* keep using Xen gdt for now; no urgent need to change it */
1315
1316 #ifdef CONFIG_X86_32
1317 pv_info.kernel_rpl = 1;
1318 if (xen_feature(XENFEAT_supervisor_mode_kernel))
1319 pv_info.kernel_rpl = 0;
1320 #else
1321 pv_info.kernel_rpl = 0;
1322 #endif
1323 /* set the limit of our address space */
1324 xen_reserve_top();
1325
1326 /*
1327 * We used to do this in xen_arch_setup, but that is too late
1328 * on AMD were early_cpu_init (run before ->arch_setup()) calls
1329 * early_amd_init which pokes 0xcf8 port.
1330 */
1331 set_iopl.iopl = 1;
1332 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1333 if (rc != 0)
1334 xen_raw_printk("physdev_op failed %d\n", rc);
1335
1336 #ifdef CONFIG_X86_32
1337 /* set up basic CPUID stuff */
1338 cpu_detect(&new_cpu_data);
1339 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU);
1340 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1);
1341 #endif
1342
1343 if (xen_start_info->mod_start) {
1344 if (xen_start_info->flags & SIF_MOD_START_PFN)
1345 initrd_start = PFN_PHYS(xen_start_info->mod_start);
1346 else
1347 initrd_start = __pa(xen_start_info->mod_start);
1348 }
1349
1350 /* Poke various useful things into boot_params */
1351 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1352 boot_params.hdr.ramdisk_image = initrd_start;
1353 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1354 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1355 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
1356
1357 if (!xen_initial_domain()) {
1358 add_preferred_console("xenboot", 0, NULL);
1359 if (pci_xen)
1360 x86_init.pci.arch_init = pci_xen_init;
1361 } else {
1362 const struct dom0_vga_console_info *info =
1363 (void *)((char *)xen_start_info +
1364 xen_start_info->console.dom0.info_off);
1365 struct xen_platform_op op = {
1366 .cmd = XENPF_firmware_info,
1367 .interface_version = XENPF_INTERFACE_VERSION,
1368 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1369 };
1370
1371 x86_platform.set_legacy_features =
1372 xen_dom0_set_legacy_features;
1373 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1374 xen_start_info->console.domU.mfn = 0;
1375 xen_start_info->console.domU.evtchn = 0;
1376
1377 if (HYPERVISOR_platform_op(&op) == 0)
1378 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1379
1380 /* Make sure ACS will be enabled */
1381 pci_request_acs();
1382
1383 xen_acpi_sleep_register();
1384
1385 /* Avoid searching for BIOS MP tables */
1386 x86_init.mpparse.find_smp_config = x86_init_noop;
1387 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
1388
1389 xen_boot_params_init_edd();
1390 }
1391
1392 if (!boot_params.screen_info.orig_video_isVGA)
1393 add_preferred_console("tty", 0, NULL);
1394 add_preferred_console("hvc", 0, NULL);
1395 if (boot_params.screen_info.orig_video_isVGA)
1396 add_preferred_console("tty", 0, NULL);
1397
1398 #ifdef CONFIG_PCI
1399 /* PCI BIOS service won't work from a PV guest. */
1400 pci_probe &= ~PCI_PROBE_BIOS;
1401 #endif
1402 xen_raw_console_write("about to get started...\n");
1403
1404 /* We need this for printk timestamps */
1405 xen_setup_runstate_info(0);
1406
1407 xen_efi_init(&boot_params);
1408
1409 /* Start the world */
1410 #ifdef CONFIG_X86_32
1411 i386_start_kernel();
1412 #else
1413 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1414 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1415 #endif
1416 }
1417
1418 static int xen_cpu_up_prepare_pv(unsigned int cpu)
1419 {
1420 int rc;
1421
1422 if (per_cpu(xen_vcpu, cpu) == NULL)
1423 return -ENODEV;
1424
1425 xen_setup_timer(cpu);
1426
1427 rc = xen_smp_intr_init(cpu);
1428 if (rc) {
1429 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n",
1430 cpu, rc);
1431 return rc;
1432 }
1433
1434 rc = xen_smp_intr_init_pv(cpu);
1435 if (rc) {
1436 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n",
1437 cpu, rc);
1438 return rc;
1439 }
1440
1441 return 0;
1442 }
1443
1444 static int xen_cpu_dead_pv(unsigned int cpu)
1445 {
1446 xen_smp_intr_free(cpu);
1447 xen_smp_intr_free_pv(cpu);
1448
1449 xen_teardown_timer(cpu);
1450
1451 return 0;
1452 }
1453
1454 static uint32_t __init xen_platform_pv(void)
1455 {
1456 if (xen_pv_domain())
1457 return xen_cpuid_base();
1458
1459 return 0;
1460 }
1461
1462 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = {
1463 .name = "Xen PV",
1464 .detect = xen_platform_pv,
1465 .type = X86_HYPER_XEN_PV,
1466 .runtime.pin_vcpu = xen_pin_vcpu,
1467 .ignore_nopv = true,
1468 };