arch/x86_64/kernel/setup.c

   1 /*
   2  *  linux/arch/x86-64/kernel/setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *
   6  *  Nov 2001 Dave Jones <davej@suse.de>
   7  *  Forked from i386 setup code.
   8  *
   9  *  $Id$
  10  */
  11
  12 /*
  13  * This file handles the architecture-dependent parts of initialization
  14  */
  15
  16 #include <linux/errno.h>
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/ptrace.h>
  23 #include <linux/slab.h>
  24 #include <linux/user.h>
  25 #include <linux/a.out.h>
  26 #include <linux/tty.h>
  27 #include <linux/ioport.h>
  28 #include <linux/delay.h>
  29 #include <linux/config.h>
  30 #include <linux/init.h>
  31 #include <linux/initrd.h>
  32 #include <linux/highmem.h>
  33 #include <linux/bootmem.h>
  34 #include <linux/module.h>
  35 #include <asm/processor.h>
  36 #include <linux/console.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/root_dev.h>
  39 #include <linux/pci.h>
  40 #include <linux/acpi.h>
  41 #include <linux/kallsyms.h>
  42 #include <linux/edd.h>
  43 #include <asm/mtrr.h>
  44 #include <asm/uaccess.h>
  45 #include <asm/system.h>
  46 #include <asm/io.h>
  47 #include <asm/smp.h>
  48 #include <asm/msr.h>
  49 #include <asm/desc.h>
  50 #include <video/edid.h>
  51 #include <asm/e820.h>
  52 #include <asm/dma.h>
  53 #include <asm/mpspec.h>
  54 #include <asm/mmu_context.h>
  55 #include <asm/bootsetup.h>
  56 #include <asm/proto.h>
  57 #include <asm/setup.h>
  58 #include <asm/mach_apic.h>
  59 #include <asm/numa.h>
  60
  61 /*
  62  * Machine setup..
  63  */
  64
  65 struct cpuinfo_x86 boot_cpu_data;
  66
  67 unsigned long mmu_cr4_features;
  68
  69 int acpi_disabled;
  70 EXPORT_SYMBOL(acpi_disabled);
  71 #ifdef  CONFIG_ACPI_BOOT
  72 extern int __initdata acpi_ht;
  73 extern acpi_interrupt_flags     acpi_sci_flags;
  74 int __initdata acpi_force = 0;
  75 #endif
  76
  77 int acpi_numa __initdata;
  78
  79 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
  80 int bootloader_type;
  81
  82 unsigned long saved_video_mode;
  83
  84 #ifdef CONFIG_SWIOTLB
  85 int swiotlb;
  86 EXPORT_SYMBOL(swiotlb);
  87 #endif
  88
  89 /*
  90  * Setup options
  91  */
  92 struct drive_info_struct { char dummy[32]; } drive_info;
  93 struct screen_info screen_info;
  94 struct sys_desc_table_struct {
  95         unsigned short length;
  96         unsigned char table[0];
  97 };
  98
  99 struct edid_info edid_info;
 100 struct e820map e820;
 101
 102 extern int root_mountflags;
 103 extern char _text, _etext, _edata, _end;
 104
 105 char command_line[COMMAND_LINE_SIZE];
 106
 107 struct resource standard_io_resources[] = {
 108         { .name = "dma1", .start = 0x00, .end = 0x1f,
 109                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 110         { .name = "pic1", .start = 0x20, .end = 0x21,
 111                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 112         { .name = "timer0", .start = 0x40, .end = 0x43,
 113                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 114         { .name = "timer1", .start = 0x50, .end = 0x53,
 115                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 116         { .name = "keyboard", .start = 0x60, .end = 0x6f,
 117                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 118         { .name = "dma page reg", .start = 0x80, .end = 0x8f,
 119                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 120         { .name = "pic2", .start = 0xa0, .end = 0xa1,
 121                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 122         { .name = "dma2", .start = 0xc0, .end = 0xdf,
 123                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 124         { .name = "fpu", .start = 0xf0, .end = 0xff,
 125                 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
 126 };
 127
 128 #define STANDARD_IO_RESOURCES \
 129         (sizeof standard_io_resources / sizeof standard_io_resources[0])
 130
 131 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
 132
 133 struct resource data_resource = {
 134         .name = "Kernel data",
 135         .start = 0,
 136         .end = 0,
 137         .flags = IORESOURCE_RAM,
 138 };
 139 struct resource code_resource = {
 140         .name = "Kernel code",
 141         .start = 0,
 142         .end = 0,
 143         .flags = IORESOURCE_RAM,
 144 };
 145
 146 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
 147
 148 static struct resource system_rom_resource = {
 149         .name = "System ROM",
 150         .start = 0xf0000,
 151         .end = 0xfffff,
 152         .flags = IORESOURCE_ROM,
 153 };
 154
 155 static struct resource extension_rom_resource = {
 156         .name = "Extension ROM",
 157         .start = 0xe0000,
 158         .end = 0xeffff,
 159         .flags = IORESOURCE_ROM,
 160 };
 161
 162 static struct resource adapter_rom_resources[] = {
 163         { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
 164                 .flags = IORESOURCE_ROM },
 165         { .name = "Adapter ROM", .start = 0, .end = 0,
 166                 .flags = IORESOURCE_ROM },
 167         { .name = "Adapter ROM", .start = 0, .end = 0,
 168                 .flags = IORESOURCE_ROM },
 169         { .name = "Adapter ROM", .start = 0, .end = 0,
 170                 .flags = IORESOURCE_ROM },
 171         { .name = "Adapter ROM", .start = 0, .end = 0,
 172                 .flags = IORESOURCE_ROM },
 173         { .name = "Adapter ROM", .start = 0, .end = 0,
 174                 .flags = IORESOURCE_ROM }
 175 };
 176
 177 #define ADAPTER_ROM_RESOURCES \
 178         (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
 179
 180 static struct resource video_rom_resource = {
 181         .name = "Video ROM",
 182         .start = 0xc0000,
 183         .end = 0xc7fff,
 184         .flags = IORESOURCE_ROM,
 185 };
 186
 187 static struct resource video_ram_resource = {
 188         .name = "Video RAM area",
 189         .start = 0xa0000,
 190         .end = 0xbffff,
 191         .flags = IORESOURCE_RAM,
 192 };
 193
 194 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
 195
 196 static int __init romchecksum(unsigned char *rom, unsigned long length)
 197 {
 198         unsigned char *p, sum = 0;
 199
 200         for (p = rom; p < rom + length; p++)
 201                 sum += *p;
 202         return sum == 0;
 203 }
 204
 205 static void __init probe_roms(void)
 206 {
 207         unsigned long start, length, upper;
 208         unsigned char *rom;
 209         int           i;
 210
 211         /* video rom */
 212         upper = adapter_rom_resources[0].start;
 213         for (start = video_rom_resource.start; start < upper; start += 2048) {
 214                 rom = isa_bus_to_virt(start);
 215                 if (!romsignature(rom))
 216                         continue;
 217
 218                 video_rom_resource.start = start;
 219
 220                 /* 0 < length <= 0x7f * 512, historically */
 221                 length = rom[2] * 512;
 222
 223                 /* if checksum okay, trust length byte */
 224                 if (length && romchecksum(rom, length))
 225                         video_rom_resource.end = start + length - 1;
 226
 227                 request_resource(&iomem_resource, &video_rom_resource);
 228                 break;
 229                         }
 230
 231         start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
 232         if (start < upper)
 233                 start = upper;
 234
 235         /* system rom */
 236         request_resource(&iomem_resource, &system_rom_resource);
 237         upper = system_rom_resource.start;
 238
 239         /* check for extension rom (ignore length byte!) */
 240         rom = isa_bus_to_virt(extension_rom_resource.start);
 241         if (romsignature(rom)) {
 242                 length = extension_rom_resource.end - extension_rom_resource.start + 1;
 243                 if (romchecksum(rom, length)) {
 244                         request_resource(&iomem_resource, &extension_rom_resource);
 245                         upper = extension_rom_resource.start;
 246                 }
 247         }
 248
 249         /* check for adapter roms on 2k boundaries */
 250         for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
 251                 rom = isa_bus_to_virt(start);
 252                 if (!romsignature(rom))
 253                         continue;
 254
 255                 /* 0 < length <= 0x7f * 512, historically */
 256                 length = rom[2] * 512;
 257
 258                 /* but accept any length that fits if checksum okay */
 259                 if (!length || start + length > upper || !romchecksum(rom, length))
 260                         continue;
 261
 262                 adapter_rom_resources[i].start = start;
 263                 adapter_rom_resources[i].end = start + length - 1;
 264                 request_resource(&iomem_resource, &adapter_rom_resources[i]);
 265
 266                 start = adapter_rom_resources[i++].end & ~2047UL;
 267         }
 268 }
 269
 270 static __init void parse_cmdline_early (char ** cmdline_p)
 271 {
 272         char c = ' ', *to = command_line, *from = COMMAND_LINE;
 273         int len = 0;
 274
 275         /* Save unparsed command line copy for /proc/cmdline */
 276         memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
 277         saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
 278
 279         for (;;) {
 280                 if (c != ' ')
 281                         goto next_char;
 282
 283 #ifdef  CONFIG_SMP
 284                 /*
 285                  * If the BIOS enumerates physical processors before logical,
 286                  * maxcpus=N at enumeration-time can be used to disable HT.
 287                  */
 288                 else if (!memcmp(from, "maxcpus=", 8)) {
 289                         extern unsigned int maxcpus;
 290
 291                         maxcpus = simple_strtoul(from + 8, NULL, 0);
 292                 }
 293 #endif
 294 #ifdef CONFIG_ACPI_BOOT
 295                 /* "acpi=off" disables both ACPI table parsing and interpreter init */
 296                 if (!memcmp(from, "acpi=off", 8))
 297                         disable_acpi();
 298
 299                 if (!memcmp(from, "acpi=force", 10)) {
 300                         /* add later when we do DMI horrors: */
 301                         acpi_force = 1;
 302                         acpi_disabled = 0;
 303                 }
 304
 305                 /* acpi=ht just means: do ACPI MADT parsing
 306                    at bootup, but don't enable the full ACPI interpreter */
 307                 if (!memcmp(from, "acpi=ht", 7)) {
 308                         if (!acpi_force)
 309                                 disable_acpi();
 310                         acpi_ht = 1;
 311                 }
 312                 else if (!memcmp(from, "pci=noacpi", 10))
 313                         acpi_disable_pci();
 314                 else if (!memcmp(from, "acpi=noirq", 10))
 315                         acpi_noirq_set();
 316
 317                 else if (!memcmp(from, "acpi_sci=edge", 13))
 318                         acpi_sci_flags.trigger =  1;
 319                 else if (!memcmp(from, "acpi_sci=level", 14))
 320                         acpi_sci_flags.trigger = 3;
 321                 else if (!memcmp(from, "acpi_sci=high", 13))
 322                         acpi_sci_flags.polarity = 1;
 323                 else if (!memcmp(from, "acpi_sci=low", 12))
 324                         acpi_sci_flags.polarity = 3;
 325
 326                 /* acpi=strict disables out-of-spec workarounds */
 327                 else if (!memcmp(from, "acpi=strict", 11)) {
 328                         acpi_strict = 1;
 329                 }
 330 #endif
 331
 332                 if (!memcmp(from, "nolapic", 7) ||
 333                     !memcmp(from, "disableapic", 11))
 334                         disable_apic = 1;
 335
 336                 if (!memcmp(from, "noapic", 6))
 337                         skip_ioapic_setup = 1;
 338
 339                 if (!memcmp(from, "apic", 4)) {
 340                         skip_ioapic_setup = 0;
 341                         ioapic_force = 1;
 342                 }
 343
 344                 if (!memcmp(from, "mem=", 4))
 345                         parse_memopt(from+4, &from);
 346
 347 #ifdef CONFIG_DISCONTIGMEM
 348                 if (!memcmp(from, "numa=", 5))
 349                         numa_setup(from+5);
 350 #endif
 351
 352 #ifdef CONFIG_GART_IOMMU
 353                 if (!memcmp(from,"iommu=",6)) {
 354                         iommu_setup(from+6);
 355                 }
 356 #endif
 357
 358                 if (!memcmp(from,"oops=panic", 10))
 359                         panic_on_oops = 1;
 360
 361                 if (!memcmp(from, "noexec=", 7))
 362                         nonx_setup(from + 7);
 363
 364         next_char:
 365                 c = *(from++);
 366                 if (!c)
 367                         break;
 368                 if (COMMAND_LINE_SIZE <= ++len)
 369                         break;
 370                 *(to++) = c;
 371         }
 372         *to = '\0';
 373         *cmdline_p = command_line;
 374 }
 375
 376 #ifndef CONFIG_DISCONTIGMEM
 377 static void __init contig_initmem_init(void)
 378 {
 379         unsigned long bootmap_size, bootmap;
 380         bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
 381         bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
 382         if (bootmap == -1L)
 383                 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
 384         bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
 385         e820_bootmem_free(&contig_page_data, 0, end_pfn << PAGE_SHIFT);
 386         reserve_bootmem(bootmap, bootmap_size);
 387 }
 388 #endif
 389
 390 /* Use inline assembly to define this because the nops are defined
 391    as inline assembly strings in the include files and we cannot
 392    get them easily into strings. */
 393 asm("\t.data\nk8nops: "
 394     K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
 395     K8_NOP7 K8_NOP8);
 396
 397 extern unsigned char k8nops[];
 398 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
 399      NULL,
 400      k8nops,
 401      k8nops + 1,
 402      k8nops + 1 + 2,
 403      k8nops + 1 + 2 + 3,
 404      k8nops + 1 + 2 + 3 + 4,
 405      k8nops + 1 + 2 + 3 + 4 + 5,
 406      k8nops + 1 + 2 + 3 + 4 + 5 + 6,
 407      k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
 408 };
 409
 410 /* Replace instructions with better alternatives for this CPU type.
 411
 412    This runs before SMP is initialized to avoid SMP problems with
 413    self modifying code. This implies that assymetric systems where
 414    APs have less capabilities than the boot processor are not handled.
 415    In this case boot with "noreplacement". */
 416 void apply_alternatives(void *start, void *end)
 417 {
 418         struct alt_instr *a;
 419         int diff, i, k;
 420         for (a = start; (void *)a < end; a++) {
 421                 if (!boot_cpu_has(a->cpuid))
 422                         continue;
 423
 424                 BUG_ON(a->replacementlen > a->instrlen);
 425                 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
 426                 diff = a->instrlen - a->replacementlen;
 427
 428                 /* Pad the rest with nops */
 429                 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
 430                         k = diff;
 431                         if (k > ASM_NOP_MAX)
 432                                 k = ASM_NOP_MAX;
 433                         __inline_memcpy(a->instr + i, k8_nops[k], k);
 434                 }
 435         }
 436 }
 437
 438 static int no_replacement __initdata = 0;
 439
 440 void __init alternative_instructions(void)
 441 {
 442         extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
 443         if (no_replacement)
 444                 return;
 445         apply_alternatives(__alt_instructions, __alt_instructions_end);
 446 }
 447
 448 static int __init noreplacement_setup(char *s)
 449 {
 450      no_replacement = 1;
 451      return 0;
 452 }
 453
 454 __setup("noreplacement", noreplacement_setup);
 455
 456 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
 457 struct edd edd;
 458 #ifdef CONFIG_EDD_MODULE
 459 EXPORT_SYMBOL(edd);
 460 #endif
 461 /**
 462  * copy_edd() - Copy the BIOS EDD information
 463  *              from boot_params into a safe place.
 464  *
 465  */
 466 static inline void copy_edd(void)
 467 {
 468      memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
 469      memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
 470      edd.mbr_signature_nr = EDD_MBR_SIG_NR;
 471      edd.edd_info_nr = EDD_NR;
 472 }
 473 #else
 474 static inline void copy_edd(void)
 475 {
 476 }
 477 #endif
 478
 479 #define EBDA_ADDR_POINTER 0x40E
 480 static void __init reserve_ebda_region(void)
 481 {
 482         unsigned int addr;
 483         /**
 484          * there is a real-mode segmented pointer pointing to the
 485          * 4K EBDA area at 0x40E
 486          */
 487         addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
 488         addr <<= 4;
 489         if (addr)
 490                 reserve_bootmem_generic(addr, PAGE_SIZE);
 491 }
 492
 493 void __init setup_arch(char **cmdline_p)
 494 {
 495         unsigned long kernel_end;
 496
 497         ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
 498         drive_info = DRIVE_INFO;
 499         screen_info = SCREEN_INFO;
 500         edid_info = EDID_INFO;
 501         saved_video_mode = SAVED_VIDEO_MODE;
 502         bootloader_type = LOADER_TYPE;
 503
 504 #ifdef CONFIG_BLK_DEV_RAM
 505         rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
 506         rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
 507         rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
 508 #endif
 509         setup_memory_region();
 510         copy_edd();
 511
 512         if (!MOUNT_ROOT_RDONLY)
 513                 root_mountflags &= ~MS_RDONLY;
 514         init_mm.start_code = (unsigned long) &_text;
 515         init_mm.end_code = (unsigned long) &_etext;
 516         init_mm.end_data = (unsigned long) &_edata;
 517         init_mm.brk = (unsigned long) &_end;
 518
 519         code_resource.start = virt_to_phys(&_text);
 520         code_resource.end = virt_to_phys(&_etext)-1;
 521         data_resource.start = virt_to_phys(&_etext);
 522         data_resource.end = virt_to_phys(&_edata)-1;
 523
 524         parse_cmdline_early(cmdline_p);
 525
 526         early_identify_cpu(&boot_cpu_data);
 527
 528         /*
 529          * partially used pages are not usable - thus
 530          * we are rounding upwards:
 531          */
 532         end_pfn = e820_end_of_ram();
 533
 534         check_efer();
 535
 536         init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
 537
 538 #ifdef CONFIG_ACPI_BOOT
 539         /*
 540          * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
 541          * Call this early for SRAT node setup.
 542          */
 543         acpi_boot_table_init();
 544 #endif
 545
 546 #ifdef CONFIG_ACPI_NUMA
 547         /*
 548          * Parse SRAT to discover nodes.
 549          */
 550         acpi_numa_init();
 551 #endif
 552
 553 #ifdef CONFIG_DISCONTIGMEM
 554         numa_initmem_init(0, end_pfn);
 555 #else
 556         contig_initmem_init();
 557 #endif
 558
 559         /* Reserve direct mapping */
 560         reserve_bootmem_generic(table_start << PAGE_SHIFT,
 561                                 (table_end - table_start) << PAGE_SHIFT);
 562
 563         /* reserve kernel */
 564         kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
 565         reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
 566
 567         /*
 568          * reserve physical page 0 - it's a special BIOS page on many boxes,
 569          * enabling clean reboots, SMP operation, laptop functions.
 570          */
 571         reserve_bootmem_generic(0, PAGE_SIZE);
 572
 573         /* reserve ebda region */
 574         reserve_ebda_region();
 575
 576 #ifdef CONFIG_SMP
 577         /*
 578          * But first pinch a few for the stack/trampoline stuff
 579          * FIXME: Don't need the extra page at 4K, but need to fix
 580          * trampoline before removing it. (see the GDT stuff)
 581          */
 582         reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
 583
 584         /* Reserve SMP trampoline */
 585         reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
 586 #endif
 587
 588 #ifdef CONFIG_ACPI_SLEEP
 589        /*
 590         * Reserve low memory region for sleep support.
 591         */
 592        acpi_reserve_bootmem();
 593 #endif
 594 #ifdef CONFIG_X86_LOCAL_APIC
 595         /*
 596          * Find and reserve possible boot-time SMP configuration:
 597          */
 598         find_smp_config();
 599 #endif
 600 #ifdef CONFIG_BLK_DEV_INITRD
 601         if (LOADER_TYPE && INITRD_START) {
 602                 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
 603                         reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
 604                         initrd_start =
 605                                 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
 606                         initrd_end = initrd_start+INITRD_SIZE;
 607                 }
 608                 else {
 609                         printk(KERN_ERR "initrd extends beyond end of memory "
 610                             "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
 611                             (unsigned long)(INITRD_START + INITRD_SIZE),
 612                             (unsigned long)(end_pfn << PAGE_SHIFT));
 613                         initrd_start = 0;
 614                 }
 615         }
 616 #endif
 617         paging_init();
 618
 619         check_ioapic();
 620
 621 #ifdef CONFIG_ACPI_BOOT
 622         /*
 623          * Read APIC and some other early information from ACPI tables.
 624          */
 625         acpi_boot_init();
 626 #endif
 627
 628 #ifdef CONFIG_X86_LOCAL_APIC
 629         /*
 630          * get boot-time SMP configuration:
 631          */
 632         if (smp_found_config)
 633                 get_smp_config();
 634         init_apic_mappings();
 635 #endif
 636
 637         /*
 638          * Request address space for all standard RAM and ROM resources
 639          * and also for regions reported as reserved by the e820.
 640          */
 641         probe_roms();
 642         e820_reserve_resources();
 643
 644         request_resource(&iomem_resource, &video_ram_resource);
 645
 646         {
 647         unsigned i;
 648         /* request I/O space for devices used on all i[345]86 PCs */
 649         for (i = 0; i < STANDARD_IO_RESOURCES; i++)
 650                 request_resource(&ioport_resource, &standard_io_resources[i]);
 651         }
 652
 653         e820_setup_gap();
 654
 655 #ifdef CONFIG_GART_IOMMU
 656        iommu_hole_init();
 657 #endif
 658
 659 #ifdef CONFIG_VT
 660 #if defined(CONFIG_VGA_CONSOLE)
 661         conswitchp = &vga_con;
 662 #elif defined(CONFIG_DUMMY_CONSOLE)
 663         conswitchp = &dummy_con;
 664 #endif
 665 #endif
 666 }
 667
 668 static int __init get_model_name(struct cpuinfo_x86 *c)
 669 {
 670         unsigned int *v;
 671
 672         if (c->x86_cpuid_level < 0x80000004)
 673                 return 0;
 674
 675         v = (unsigned int *) c->x86_model_id;
 676         cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
 677         cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
 678         cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
 679         c->x86_model_id[48] = 0;
 680         return 1;
 681 }
 682
 683
 684 static void __init display_cacheinfo(struct cpuinfo_x86 *c)
 685 {
 686         unsigned int n, dummy, eax, ebx, ecx, edx;
 687
 688         n = c->x86_cpuid_level;
 689
 690         if (n >= 0x80000005) {
 691                 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
 692                 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
 693                         edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
 694                 c->x86_cache_size=(ecx>>24)+(edx>>24);
 695                 /* On K8 L1 TLB is inclusive, so don't count it */
 696                 c->x86_tlbsize = 0;
 697         }
 698
 699         if (n >= 0x80000006) {
 700                 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
 701                 ecx = cpuid_ecx(0x80000006);
 702                 c->x86_cache_size = ecx >> 16;
 703                 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
 704
 705                 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
 706                 c->x86_cache_size, ecx & 0xFF);
 707         }
 708
 709         if (n >= 0x80000007)
 710                 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
 711         if (n >= 0x80000008) {
 712                 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
 713                 c->x86_virt_bits = (eax >> 8) & 0xff;
 714                 c->x86_phys_bits = eax & 0xff;
 715         }
 716 }
 717
 718
 719 static int __init init_amd(struct cpuinfo_x86 *c)
 720 {
 721         int r;
 722         int level;
 723 #ifdef CONFIG_NUMA
 724         int cpu;
 725 #endif
 726
 727         /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
 728            3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
 729         clear_bit(0*32+31, &c->x86_capability);
 730
 731         /* C-stepping K8? */
 732         level = cpuid_eax(1);
 733         if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
 734                 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
 735
 736         r = get_model_name(c);
 737         if (!r) {
 738                 switch (c->x86) {
 739                 case 15:
 740                         /* Should distinguish Models here, but this is only
 741                            a fallback anyways. */
 742                         strcpy(c->x86_model_id, "Hammer");
 743                         break;
 744                 }
 745         }
 746         display_cacheinfo(c);
 747
 748         if (c->x86_cpuid_level >= 0x80000008) {
 749                 c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
 750                 if (c->x86_num_cores & (c->x86_num_cores - 1))
 751                         c->x86_num_cores = 1;
 752
 753 #ifdef CONFIG_NUMA
 754                 /* On a dual core setup the lower bits of apic id
 755                    distingush the cores. Fix up the CPU<->node mappings
 756                    here based on that.
 757                    Assumes number of cores is a power of two.
 758                    When using SRAT use mapping from SRAT. */
 759                 cpu = c->x86_apicid;
 760                 if (acpi_numa <= 0 && c->x86_num_cores > 1) {
 761                         cpu_to_node[cpu] = cpu >> hweight32(c->x86_num_cores - 1);
 762                         if (!node_online(cpu_to_node[cpu]))
 763                                 cpu_to_node[cpu] = first_node(node_online_map);
 764                 }
 765                 printk(KERN_INFO "CPU %d(%d) -> Node %d\n",
 766                                 cpu, c->x86_num_cores, cpu_to_node[cpu]);
 767 #endif
 768         }
 769
 770         return r;
 771 }
 772
 773 static void __init detect_ht(struct cpuinfo_x86 *c)
 774 {
 775 #ifdef CONFIG_SMP
 776         u32     eax, ebx, ecx, edx;
 777         int     index_msb, tmp;
 778         int     cpu = smp_processor_id();
 779
 780         if (!cpu_has(c, X86_FEATURE_HT))
 781                 return;
 782
 783         cpuid(1, &eax, &ebx, &ecx, &edx);
 784         smp_num_siblings = (ebx & 0xff0000) >> 16;
 785
 786         if (smp_num_siblings == 1) {
 787                 printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
 788         } else if (smp_num_siblings > 1) {
 789                 index_msb = 31;
 790                 /*
 791                  * At this point we only support two siblings per
 792                  * processor package.
 793                  */
 794                 if (smp_num_siblings > NR_CPUS) {
 795                         printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
 796                         smp_num_siblings = 1;
 797                         return;
 798                 }
 799                 tmp = smp_num_siblings;
 800                 while ((tmp & 0x80000000 ) == 0) {
 801                         tmp <<=1 ;
 802                         index_msb--;
 803                 }
 804                 if (smp_num_siblings & (smp_num_siblings - 1))
 805                         index_msb++;
 806                 phys_proc_id[cpu] = phys_pkg_id(index_msb);
 807
 808                 printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
 809                        phys_proc_id[cpu]);
 810
 811                 smp_num_siblings = smp_num_siblings / c->x86_num_cores;
 812
 813                 tmp = smp_num_siblings;
 814                 index_msb = 31;
 815                 while ((tmp & 0x80000000) == 0) {
 816                         tmp <<=1 ;
 817                         index_msb--;
 818                 }
 819                 if (smp_num_siblings & (smp_num_siblings - 1))
 820                         index_msb++;
 821
 822                 cpu_core_id[cpu] = phys_pkg_id(index_msb);
 823
 824                 if (c->x86_num_cores > 1)
 825                         printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
 826                                cpu_core_id[cpu]);
 827         }
 828 #endif
 829 }
 830
 831 static void __init sched_cmp_hack(struct cpuinfo_x86 *c)
 832 {
 833 #ifdef CONFIG_SMP
 834         /* AMD dual core looks like HT but isn't really. Hide it from the
 835            scheduler. This works around problems with the domain scheduler.
 836            Also probably gives slightly better scheduling and disables
 837            SMT nice which is harmful on dual core.
 838            TBD tune the domain scheduler for dual core. */
 839         if (c->x86_vendor == X86_VENDOR_AMD && cpu_has(c, X86_FEATURE_CMP_LEGACY))
 840                 smp_num_siblings = 1;
 841 #endif
 842 }
 843
 844 /*
 845  * find out the number of processor cores on the die
 846  */
 847 static int __init intel_num_cpu_cores(struct cpuinfo_x86 *c)
 848 {
 849         unsigned int eax;
 850
 851         if (c->cpuid_level < 4)
 852                 return 1;
 853
 854         __asm__("cpuid"
 855                 : "=a" (eax)
 856                 : "0" (4), "c" (0)
 857                 : "bx", "dx");
 858
 859         if (eax & 0x1f)
 860                 return ((eax >> 26) + 1);
 861         else
 862                 return 1;
 863 }
 864
 865 static void __init init_intel(struct cpuinfo_x86 *c)
 866 {
 867         /* Cache sizes */
 868         unsigned n;
 869
 870         init_intel_cacheinfo(c);
 871         n = c->x86_cpuid_level;
 872         if (n >= 0x80000008) {
 873                 unsigned eax = cpuid_eax(0x80000008);
 874                 c->x86_virt_bits = (eax >> 8) & 0xff;
 875                 c->x86_phys_bits = eax & 0xff;
 876         }
 877
 878         if (c->x86 == 15)
 879                 c->x86_cache_alignment = c->x86_clflush_size * 2;
 880         if (c->x86 >= 15)
 881                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
 882         c->x86_num_cores = intel_num_cpu_cores(c);
 883 }
 884
 885 void __init get_cpu_vendor(struct cpuinfo_x86 *c)
 886 {
 887         char *v = c->x86_vendor_id;
 888
 889         if (!strcmp(v, "AuthenticAMD"))
 890                 c->x86_vendor = X86_VENDOR_AMD;
 891         else if (!strcmp(v, "GenuineIntel"))
 892                 c->x86_vendor = X86_VENDOR_INTEL;
 893         else
 894                 c->x86_vendor = X86_VENDOR_UNKNOWN;
 895 }
 896
 897 struct cpu_model_info {
 898         int vendor;
 899         int family;
 900         char *model_names[16];
 901 };
 902
 903 /* Do some early cpuid on the boot CPU to get some parameter that are
 904    needed before check_bugs. Everything advanced is in identify_cpu
 905    below. */
 906 void __init early_identify_cpu(struct cpuinfo_x86 *c)
 907 {
 908         u32 tfms;
 909
 910         c->loops_per_jiffy = loops_per_jiffy;
 911         c->x86_cache_size = -1;
 912         c->x86_vendor = X86_VENDOR_UNKNOWN;
 913         c->x86_model = c->x86_mask = 0; /* So far unknown... */
 914         c->x86_vendor_id[0] = '\0'; /* Unset */
 915         c->x86_model_id[0] = '\0';  /* Unset */
 916         c->x86_clflush_size = 64;
 917         c->x86_cache_alignment = c->x86_clflush_size;
 918         c->x86_num_cores = 1;
 919         c->x86_apicid = c == &boot_cpu_data ? 0 : c - cpu_data;
 920         c->x86_cpuid_level = 0;
 921         memset(&c->x86_capability, 0, sizeof c->x86_capability);
 922
 923         /* Get vendor name */
 924         cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
 925               (unsigned int *)&c->x86_vendor_id[0],
 926               (unsigned int *)&c->x86_vendor_id[8],
 927               (unsigned int *)&c->x86_vendor_id[4]);
 928
 929         get_cpu_vendor(c);
 930
 931         /* Initialize the standard set of capabilities */
 932         /* Note that the vendor-specific code below might override */
 933
 934         /* Intel-defined flags: level 0x00000001 */
 935         if (c->cpuid_level >= 0x00000001) {
 936                 __u32 misc;
 937                 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
 938                       &c->x86_capability[0]);
 939                 c->x86 = (tfms >> 8) & 0xf;
 940                 c->x86_model = (tfms >> 4) & 0xf;
 941                 c->x86_mask = tfms & 0xf;
 942                 if (c->x86 == 0xf) {
 943                         c->x86 += (tfms >> 20) & 0xff;
 944                         c->x86_model += ((tfms >> 16) & 0xF) << 4;
 945                 }
 946                 if (c->x86_capability[0] & (1<<19))
 947                         c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
 948                 c->x86_apicid = misc >> 24;
 949         } else {
 950                 /* Have CPUID level 0 only - unheard of */
 951                 c->x86 = 4;
 952         }
 953 }
 954
 955 /*
 956  * This does the hard work of actually picking apart the CPU stuff...
 957  */
 958 void __init identify_cpu(struct cpuinfo_x86 *c)
 959 {
 960         int i;
 961         u32 xlvl;
 962
 963         early_identify_cpu(c);
 964
 965         /* AMD-defined flags: level 0x80000001 */
 966         xlvl = cpuid_eax(0x80000000);
 967         c->x86_cpuid_level = xlvl;
 968         if ((xlvl & 0xffff0000) == 0x80000000) {
 969                 if (xlvl >= 0x80000001) {
 970                         c->x86_capability[1] = cpuid_edx(0x80000001);
 971                         c->x86_capability[5] = cpuid_ecx(0x80000001);
 972                 }
 973                 if (xlvl >= 0x80000004)
 974                         get_model_name(c); /* Default name */
 975         }
 976
 977         /* Transmeta-defined flags: level 0x80860001 */
 978         xlvl = cpuid_eax(0x80860000);
 979         if ((xlvl & 0xffff0000) == 0x80860000) {
 980                 /* Don't set x86_cpuid_level here for now to not confuse. */
 981                 if (xlvl >= 0x80860001)
 982                         c->x86_capability[2] = cpuid_edx(0x80860001);
 983         }
 984
 985         /*
 986          * Vendor-specific initialization.  In this section we
 987          * canonicalize the feature flags, meaning if there are
 988          * features a certain CPU supports which CPUID doesn't
 989          * tell us, CPUID claiming incorrect flags, or other bugs,
 990          * we handle them here.
 991          *
 992          * At the end of this section, c->x86_capability better
 993          * indicate the features this CPU genuinely supports!
 994          */
 995         switch (c->x86_vendor) {
 996         case X86_VENDOR_AMD:
 997                 init_amd(c);
 998                 break;
 999
1000         case X86_VENDOR_INTEL:
1001                 init_intel(c);
1002                 break;
1003
1004         case X86_VENDOR_UNKNOWN:
1005         default:
1006                 display_cacheinfo(c);
1007                 break;
1008         }
1009
1010         select_idle_routine(c);
1011         detect_ht(c);
1012         sched_cmp_hack(c);
1013
1014         /*
1015          * On SMP, boot_cpu_data holds the common feature set between
1016          * all CPUs; so make sure that we indicate which features are
1017          * common between the CPUs.  The first time this routine gets
1018          * executed, c == &boot_cpu_data.
1019          */
1020         if (c != &boot_cpu_data) {
1021                 /* AND the already accumulated flags with these */
1022                 for (i = 0 ; i < NCAPINTS ; i++)
1023                         boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1024         }
1025
1026 #ifdef CONFIG_X86_MCE
1027         mcheck_init(c);
1028 #endif
1029 #ifdef CONFIG_NUMA
1030         if (c != &boot_cpu_data)
1031                 numa_add_cpu(c - cpu_data);
1032 #endif
1033 }
1034
1035
1036 void __init print_cpu_info(struct cpuinfo_x86 *c)
1037 {
1038         if (c->x86_model_id[0])
1039                 printk("%s", c->x86_model_id);
1040
1041         if (c->x86_mask || c->cpuid_level >= 0)
1042                 printk(" stepping %02x\n", c->x86_mask);
1043         else
1044                 printk("\n");
1045 }
1046
1047 /*
1048  *      Get CPU information for use by the procfs.
1049  */
1050
1051 static int show_cpuinfo(struct seq_file *m, void *v)
1052 {
1053         struct cpuinfo_x86 *c = v;
1054
1055         /*
1056          * These flag bits must match the definitions in <asm/cpufeature.h>.
1057          * NULL means this bit is undefined or reserved; either way it doesn't
1058          * have meaning as far as Linux is concerned.  Note that it's important
1059          * to realize there is a difference between this table and CPUID -- if
1060          * applications want to get the raw CPUID data, they should access
1061          * /dev/cpu/<cpu_nr>/cpuid instead.
1062          */
1063         static char *x86_cap_flags[] = {
1064                 /* Intel-defined */
1065                 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1066                 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1067                 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1068                 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1069
1070                 /* AMD-defined */
1071                 "pni", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1072                 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1073                 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1074                 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1075
1076                 /* Transmeta-defined */
1077                 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1078                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1079                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1080                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1081
1082                 /* Other (Linux-defined) */
1083                 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", "k8c+",
1084                 "constant_tsc", NULL, NULL,
1085                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1086                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1087                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1088
1089                 /* Intel-defined (#2) */
1090                 "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
1091                 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1092                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1093                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1094
1095                 /* AMD-defined (#2) */
1096                 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
1097                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1098                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1099                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL
1100         };
1101         static char *x86_power_flags[] = {
1102                 "ts",   /* temperature sensor */
1103                 "fid",  /* frequency id control */
1104                 "vid",  /* voltage id control */
1105                 "ttp",  /* thermal trip */
1106                 "tm",
1107                 "stc"
1108         };
1109
1110
1111 #ifdef CONFIG_SMP
1112         if (!cpu_online(c-cpu_data))
1113                 return 0;
1114 #endif
1115
1116         seq_printf(m,"processor\t: %u\n"
1117                      "vendor_id\t: %s\n"
1118                      "cpu family\t: %d\n"
1119                      "model\t\t: %d\n"
1120                      "model name\t: %s\n",
1121                      (unsigned)(c-cpu_data),
1122                      c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1123                      c->x86,
1124                      (int)c->x86_model,
1125                      c->x86_model_id[0] ? c->x86_model_id : "unknown");
1126
1127         if (c->x86_mask || c->cpuid_level >= 0)
1128                 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1129         else
1130                 seq_printf(m, "stepping\t: unknown\n");
1131
1132         if (cpu_has(c,X86_FEATURE_TSC)) {
1133                 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1134                              cpu_khz / 1000, (cpu_khz % 1000));
1135         }
1136
1137         /* Cache size */
1138         if (c->x86_cache_size >= 0)
1139                 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1140
1141 #ifdef CONFIG_SMP
1142         if (smp_num_siblings * c->x86_num_cores > 1) {
1143                 int cpu = c - cpu_data;
1144                 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1145                 seq_printf(m, "siblings\t: %d\n",
1146                                 c->x86_num_cores * smp_num_siblings);
1147         }
1148 #endif
1149
1150         seq_printf(m,
1151                 "fpu\t\t: yes\n"
1152                 "fpu_exception\t: yes\n"
1153                 "cpuid level\t: %d\n"
1154                 "wp\t\t: yes\n"
1155                 "flags\t\t:",
1156                    c->cpuid_level);
1157
1158         {
1159                 int i;
1160                 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1161                         if ( test_bit(i, &c->x86_capability) &&
1162                              x86_cap_flags[i] != NULL )
1163                                 seq_printf(m, " %s", x86_cap_flags[i]);
1164         }
1165
1166         seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1167                    c->loops_per_jiffy/(500000/HZ),
1168                    (c->loops_per_jiffy/(5000/HZ)) % 100);
1169
1170         if (c->x86_tlbsize > 0)
1171                 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1172         seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1173         seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1174
1175         seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1176                    c->x86_phys_bits, c->x86_virt_bits);
1177
1178         seq_printf(m, "power management:");
1179         {
1180                 unsigned i;
1181                 for (i = 0; i < 32; i++)
1182                         if (c->x86_power & (1 << i)) {
1183                                 if (i < ARRAY_SIZE(x86_power_flags))
1184                                         seq_printf(m, " %s", x86_power_flags[i]);
1185                                 else
1186                                         seq_printf(m, " [%d]", i);
1187                         }
1188         }
1189
1190         seq_printf(m, "\n");
1191
1192 #ifdef CONFIG_SMP
1193         /* Put new fields at the end to lower the probability of
1194            breaking user space parsers. */
1195         seq_printf(m, "core id\t\t: %d\n", cpu_core_id[c - cpu_data]);
1196         seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
1197 #endif
1198         seq_printf(m, "\n");
1199         return 0;
1200 }
1201
1202 static void *c_start(struct seq_file *m, loff_t *pos)
1203 {
1204         return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1205 }
1206
1207 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1208 {
1209         ++*pos;
1210         return c_start(m, pos);
1211 }
1212
1213 static void c_stop(struct seq_file *m, void *v)
1214 {
1215 }
1216
1217 struct seq_operations cpuinfo_op = {
1218         .start =c_start,
1219         .next = c_next,
1220         .stop = c_stop,
1221         .show = show_cpuinfo,
1222 };