arch/x86_64/kernel/setup.c

   1 /*
   2  *  linux/arch/x86-64/kernel/setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *
   6  *  Nov 2001 Dave Jones <davej@suse.de>
   7  *  Forked from i386 setup code.
   8  *
   9  *  $Id$
  10  */
  11
  12 /*
  13  * This file handles the architecture-dependent parts of initialization
  14  */
  15
  16 #include <linux/errno.h>
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/ptrace.h>
  23 #include <linux/slab.h>
  24 #include <linux/user.h>
  25 #include <linux/a.out.h>
  26 #include <linux/tty.h>
  27 #include <linux/ioport.h>
  28 #include <linux/delay.h>
  29 #include <linux/config.h>
  30 #include <linux/init.h>
  31 #include <linux/initrd.h>
  32 #include <linux/highmem.h>
  33 #include <linux/bootmem.h>
  34 #include <linux/module.h>
  35 #include <asm/processor.h>
  36 #include <linux/console.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/crash_dump.h>
  39 #include <linux/root_dev.h>
  40 #include <linux/pci.h>
  41 #include <linux/acpi.h>
  42 #include <linux/kallsyms.h>
  43 #include <linux/edd.h>
  44 #include <linux/mmzone.h>
  45 #include <linux/kexec.h>
  46 #include <linux/cpufreq.h>
  47 #include <linux/dmi.h>
  48 #include <linux/dma-mapping.h>
  49 #include <linux/ctype.h>
  50
  51 #include <asm/mtrr.h>
  52 #include <asm/uaccess.h>
  53 #include <asm/system.h>
  54 #include <asm/io.h>
  55 #include <asm/smp.h>
  56 #include <asm/msr.h>
  57 #include <asm/desc.h>
  58 #include <video/edid.h>
  59 #include <asm/e820.h>
  60 #include <asm/dma.h>
  61 #include <asm/mpspec.h>
  62 #include <asm/mmu_context.h>
  63 #include <asm/bootsetup.h>
  64 #include <asm/proto.h>
  65 #include <asm/setup.h>
  66 #include <asm/mach_apic.h>
  67 #include <asm/numa.h>
  68 #include <asm/swiotlb.h>
  69 #include <asm/sections.h>
  70 #include <asm/gart-mapping.h>
  71 #include <asm/dmi.h>
  72
  73 /*
  74  * Machine setup..
  75  */
  76
  77 struct cpuinfo_x86 boot_cpu_data __read_mostly;
  78
  79 unsigned long mmu_cr4_features;
  80
  81 int acpi_disabled;
  82 EXPORT_SYMBOL(acpi_disabled);
  83 #ifdef  CONFIG_ACPI
  84 extern int __initdata acpi_ht;
  85 extern acpi_interrupt_flags     acpi_sci_flags;
  86 int __initdata acpi_force = 0;
  87 #endif
  88
  89 int acpi_numa __initdata;
  90
  91 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
  92 int bootloader_type;
  93
  94 unsigned long saved_video_mode;
  95
  96 /*
  97  * Early DMI memory
  98  */
  99 int dmi_alloc_index;
 100 char dmi_alloc_data[DMI_MAX_DATA];
 101
 102 /*
 103  * Setup options
 104  */
 105 struct screen_info screen_info;
 106 struct sys_desc_table_struct {
 107         unsigned short length;
 108         unsigned char table[0];
 109 };
 110
 111 struct edid_info edid_info;
 112 struct e820map e820;
 113
 114 extern int root_mountflags;
 115
 116 char command_line[COMMAND_LINE_SIZE];
 117
 118 struct resource standard_io_resources[] = {
 119         { .name = "dma1", .start = 0x00, .end = 0x1f,
 120                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 121         { .name = "pic1", .start = 0x20, .end = 0x21,
 122                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 123         { .name = "timer0", .start = 0x40, .end = 0x43,
 124                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 125         { .name = "timer1", .start = 0x50, .end = 0x53,
 126                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 127         { .name = "keyboard", .start = 0x60, .end = 0x6f,
 128                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 129         { .name = "dma page reg", .start = 0x80, .end = 0x8f,
 130                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 131         { .name = "pic2", .start = 0xa0, .end = 0xa1,
 132                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 133         { .name = "dma2", .start = 0xc0, .end = 0xdf,
 134                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 135         { .name = "fpu", .start = 0xf0, .end = 0xff,
 136                 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
 137 };
 138
 139 #define STANDARD_IO_RESOURCES \
 140         (sizeof standard_io_resources / sizeof standard_io_resources[0])
 141
 142 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
 143
 144 struct resource data_resource = {
 145         .name = "Kernel data",
 146         .start = 0,
 147         .end = 0,
 148         .flags = IORESOURCE_RAM,
 149 };
 150 struct resource code_resource = {
 151         .name = "Kernel code",
 152         .start = 0,
 153         .end = 0,
 154         .flags = IORESOURCE_RAM,
 155 };
 156
 157 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
 158
 159 static struct resource system_rom_resource = {
 160         .name = "System ROM",
 161         .start = 0xf0000,
 162         .end = 0xfffff,
 163         .flags = IORESOURCE_ROM,
 164 };
 165
 166 static struct resource extension_rom_resource = {
 167         .name = "Extension ROM",
 168         .start = 0xe0000,
 169         .end = 0xeffff,
 170         .flags = IORESOURCE_ROM,
 171 };
 172
 173 static struct resource adapter_rom_resources[] = {
 174         { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
 175                 .flags = IORESOURCE_ROM },
 176         { .name = "Adapter ROM", .start = 0, .end = 0,
 177                 .flags = IORESOURCE_ROM },
 178         { .name = "Adapter ROM", .start = 0, .end = 0,
 179                 .flags = IORESOURCE_ROM },
 180         { .name = "Adapter ROM", .start = 0, .end = 0,
 181                 .flags = IORESOURCE_ROM },
 182         { .name = "Adapter ROM", .start = 0, .end = 0,
 183                 .flags = IORESOURCE_ROM },
 184         { .name = "Adapter ROM", .start = 0, .end = 0,
 185                 .flags = IORESOURCE_ROM }
 186 };
 187
 188 #define ADAPTER_ROM_RESOURCES \
 189         (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
 190
 191 static struct resource video_rom_resource = {
 192         .name = "Video ROM",
 193         .start = 0xc0000,
 194         .end = 0xc7fff,
 195         .flags = IORESOURCE_ROM,
 196 };
 197
 198 static struct resource video_ram_resource = {
 199         .name = "Video RAM area",
 200         .start = 0xa0000,
 201         .end = 0xbffff,
 202         .flags = IORESOURCE_RAM,
 203 };
 204
 205 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
 206
 207 static int __init romchecksum(unsigned char *rom, unsigned long length)
 208 {
 209         unsigned char *p, sum = 0;
 210
 211         for (p = rom; p < rom + length; p++)
 212                 sum += *p;
 213         return sum == 0;
 214 }
 215
 216 static void __init probe_roms(void)
 217 {
 218         unsigned long start, length, upper;
 219         unsigned char *rom;
 220         int           i;
 221
 222         /* video rom */
 223         upper = adapter_rom_resources[0].start;
 224         for (start = video_rom_resource.start; start < upper; start += 2048) {
 225                 rom = isa_bus_to_virt(start);
 226                 if (!romsignature(rom))
 227                         continue;
 228
 229                 video_rom_resource.start = start;
 230
 231                 /* 0 < length <= 0x7f * 512, historically */
 232                 length = rom[2] * 512;
 233
 234                 /* if checksum okay, trust length byte */
 235                 if (length && romchecksum(rom, length))
 236                         video_rom_resource.end = start + length - 1;
 237
 238                 request_resource(&iomem_resource, &video_rom_resource);
 239                 break;
 240                         }
 241
 242         start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
 243         if (start < upper)
 244                 start = upper;
 245
 246         /* system rom */
 247         request_resource(&iomem_resource, &system_rom_resource);
 248         upper = system_rom_resource.start;
 249
 250         /* check for extension rom (ignore length byte!) */
 251         rom = isa_bus_to_virt(extension_rom_resource.start);
 252         if (romsignature(rom)) {
 253                 length = extension_rom_resource.end - extension_rom_resource.start + 1;
 254                 if (romchecksum(rom, length)) {
 255                         request_resource(&iomem_resource, &extension_rom_resource);
 256                         upper = extension_rom_resource.start;
 257                 }
 258         }
 259
 260         /* check for adapter roms on 2k boundaries */
 261         for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
 262                 rom = isa_bus_to_virt(start);
 263                 if (!romsignature(rom))
 264                         continue;
 265
 266                 /* 0 < length <= 0x7f * 512, historically */
 267                 length = rom[2] * 512;
 268
 269                 /* but accept any length that fits if checksum okay */
 270                 if (!length || start + length > upper || !romchecksum(rom, length))
 271                         continue;
 272
 273                 adapter_rom_resources[i].start = start;
 274                 adapter_rom_resources[i].end = start + length - 1;
 275                 request_resource(&iomem_resource, &adapter_rom_resources[i]);
 276
 277                 start = adapter_rom_resources[i++].end & ~2047UL;
 278         }
 279 }
 280
 281 /* Check for full argument with no trailing characters */
 282 static int fullarg(char *p, char *arg)
 283 {
 284         int l = strlen(arg);
 285         return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
 286 }
 287
 288 static __init void parse_cmdline_early (char ** cmdline_p)
 289 {
 290         char c = ' ', *to = command_line, *from = COMMAND_LINE;
 291         int len = 0;
 292         int userdef = 0;
 293
 294         for (;;) {
 295                 if (c != ' ')
 296                         goto next_char;
 297
 298 #ifdef  CONFIG_SMP
 299                 /*
 300                  * If the BIOS enumerates physical processors before logical,
 301                  * maxcpus=N at enumeration-time can be used to disable HT.
 302                  */
 303                 else if (!memcmp(from, "maxcpus=", 8)) {
 304                         extern unsigned int maxcpus;
 305
 306                         maxcpus = simple_strtoul(from + 8, NULL, 0);
 307                 }
 308 #endif
 309 #ifdef CONFIG_ACPI
 310                 /* "acpi=off" disables both ACPI table parsing and interpreter init */
 311                 if (fullarg(from,"acpi=off"))
 312                         disable_acpi();
 313
 314                 if (fullarg(from, "acpi=force")) {
 315                         /* add later when we do DMI horrors: */
 316                         acpi_force = 1;
 317                         acpi_disabled = 0;
 318                 }
 319
 320                 /* acpi=ht just means: do ACPI MADT parsing
 321                    at bootup, but don't enable the full ACPI interpreter */
 322                 if (fullarg(from, "acpi=ht")) {
 323                         if (!acpi_force)
 324                                 disable_acpi();
 325                         acpi_ht = 1;
 326                 }
 327                 else if (fullarg(from, "pci=noacpi"))
 328                         acpi_disable_pci();
 329                 else if (fullarg(from, "acpi=noirq"))
 330                         acpi_noirq_set();
 331
 332                 else if (fullarg(from, "acpi_sci=edge"))
 333                         acpi_sci_flags.trigger =  1;
 334                 else if (fullarg(from, "acpi_sci=level"))
 335                         acpi_sci_flags.trigger = 3;
 336                 else if (fullarg(from, "acpi_sci=high"))
 337                         acpi_sci_flags.polarity = 1;
 338                 else if (fullarg(from, "acpi_sci=low"))
 339                         acpi_sci_flags.polarity = 3;
 340
 341                 /* acpi=strict disables out-of-spec workarounds */
 342                 else if (fullarg(from, "acpi=strict")) {
 343                         acpi_strict = 1;
 344                 }
 345 #ifdef CONFIG_X86_IO_APIC
 346                 else if (fullarg(from, "acpi_skip_timer_override"))
 347                         acpi_skip_timer_override = 1;
 348 #endif
 349 #endif
 350
 351                 if (fullarg(from, "disable_timer_pin_1"))
 352                         disable_timer_pin_1 = 1;
 353                 if (fullarg(from, "enable_timer_pin_1"))
 354                         disable_timer_pin_1 = -1;
 355
 356                 if (fullarg(from, "nolapic") || fullarg(from, "disableapic")) {
 357                         clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
 358                         disable_apic = 1;
 359                 }
 360
 361                 if (fullarg(from, "noapic"))
 362                         skip_ioapic_setup = 1;
 363
 364                 if (fullarg(from,"apic")) {
 365                         skip_ioapic_setup = 0;
 366                         ioapic_force = 1;
 367                 }
 368
 369                 if (!memcmp(from, "mem=", 4))
 370                         parse_memopt(from+4, &from);
 371
 372                 if (!memcmp(from, "memmap=", 7)) {
 373                         /* exactmap option is for used defined memory */
 374                         if (!memcmp(from+7, "exactmap", 8)) {
 375 #ifdef CONFIG_CRASH_DUMP
 376                                 /* If we are doing a crash dump, we
 377                                  * still need to know the real mem
 378                                  * size before original memory map is
 379                                  * reset.
 380                                  */
 381                                 saved_max_pfn = e820_end_of_ram();
 382 #endif
 383                                 from += 8+7;
 384                                 end_pfn_map = 0;
 385                                 e820.nr_map = 0;
 386                                 userdef = 1;
 387                         }
 388                         else {
 389                                 parse_memmapopt(from+7, &from);
 390                                 userdef = 1;
 391                         }
 392                 }
 393
 394 #ifdef CONFIG_NUMA
 395                 if (!memcmp(from, "numa=", 5))
 396                         numa_setup(from+5);
 397 #endif
 398
 399                 if (!memcmp(from,"iommu=",6)) {
 400                         iommu_setup(from+6);
 401                 }
 402
 403                 if (fullarg(from,"oops=panic"))
 404                         panic_on_oops = 1;
 405
 406                 if (!memcmp(from, "noexec=", 7))
 407                         nonx_setup(from + 7);
 408
 409 #ifdef CONFIG_KEXEC
 410                 /* crashkernel=size@addr specifies the location to reserve for
 411                  * a crash kernel.  By reserving this memory we guarantee
 412                  * that linux never set's it up as a DMA target.
 413                  * Useful for holding code to do something appropriate
 414                  * after a kernel panic.
 415                  */
 416                 else if (!memcmp(from, "crashkernel=", 12)) {
 417                         unsigned long size, base;
 418                         size = memparse(from+12, &from);
 419                         if (*from == '@') {
 420                                 base = memparse(from+1, &from);
 421                                 /* FIXME: Do I want a sanity check
 422                                  * to validate the memory range?
 423                                  */
 424                                 crashk_res.start = base;
 425                                 crashk_res.end   = base + size - 1;
 426                         }
 427                 }
 428 #endif
 429
 430 #ifdef CONFIG_PROC_VMCORE
 431                 /* elfcorehdr= specifies the location of elf core header
 432                  * stored by the crashed kernel. This option will be passed
 433                  * by kexec loader to the capture kernel.
 434                  */
 435                 else if(!memcmp(from, "elfcorehdr=", 11))
 436                         elfcorehdr_addr = memparse(from+11, &from);
 437 #endif
 438
 439 #ifdef CONFIG_HOTPLUG_CPU
 440                 else if (!memcmp(from, "additional_cpus=", 16))
 441                         setup_additional_cpus(from+16);
 442 #endif
 443
 444         next_char:
 445                 c = *(from++);
 446                 if (!c)
 447                         break;
 448                 if (COMMAND_LINE_SIZE <= ++len)
 449                         break;
 450                 *(to++) = c;
 451         }
 452         if (userdef) {
 453                 printk(KERN_INFO "user-defined physical RAM map:\n");
 454                 e820_print_map("user");
 455         }
 456         *to = '\0';
 457         *cmdline_p = command_line;
 458 }
 459
 460 #ifndef CONFIG_NUMA
 461 static void __init
 462 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
 463 {
 464         unsigned long bootmap_size, bootmap;
 465
 466         bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
 467         bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
 468         if (bootmap == -1L)
 469                 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
 470         bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
 471         e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
 472         reserve_bootmem(bootmap, bootmap_size);
 473 }
 474 #endif
 475
 476 /* Use inline assembly to define this because the nops are defined
 477    as inline assembly strings in the include files and we cannot
 478    get them easily into strings. */
 479 asm("\t.data\nk8nops: "
 480     K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
 481     K8_NOP7 K8_NOP8);
 482
 483 extern unsigned char k8nops[];
 484 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
 485      NULL,
 486      k8nops,
 487      k8nops + 1,
 488      k8nops + 1 + 2,
 489      k8nops + 1 + 2 + 3,
 490      k8nops + 1 + 2 + 3 + 4,
 491      k8nops + 1 + 2 + 3 + 4 + 5,
 492      k8nops + 1 + 2 + 3 + 4 + 5 + 6,
 493      k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
 494 };
 495
 496 extern char __vsyscall_0;
 497
 498 /* Replace instructions with better alternatives for this CPU type.
 499
 500    This runs before SMP is initialized to avoid SMP problems with
 501    self modifying code. This implies that assymetric systems where
 502    APs have less capabilities than the boot processor are not handled.
 503    In this case boot with "noreplacement". */
 504 void apply_alternatives(void *start, void *end)
 505 {
 506         struct alt_instr *a;
 507         int diff, i, k;
 508         for (a = start; (void *)a < end; a++) {
 509                 u8 *instr;
 510
 511                 if (!boot_cpu_has(a->cpuid))
 512                         continue;
 513
 514                 BUG_ON(a->replacementlen > a->instrlen);
 515                 instr = a->instr;
 516                 /* vsyscall code is not mapped yet. resolve it manually. */
 517                 if (instr >= (u8 *)VSYSCALL_START && instr < (u8*)VSYSCALL_END)
 518                         instr = __va(instr - (u8*)VSYSCALL_START + (u8*)__pa_symbol(&__vsyscall_0));
 519                 __inline_memcpy(instr, a->replacement, a->replacementlen);
 520                 diff = a->instrlen - a->replacementlen;
 521
 522                 /* Pad the rest with nops */
 523                 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
 524                         k = diff;
 525                         if (k > ASM_NOP_MAX)
 526                                 k = ASM_NOP_MAX;
 527                         __inline_memcpy(instr + i, k8_nops[k], k);
 528                 }
 529         }
 530 }
 531
 532 static int no_replacement __initdata = 0;
 533
 534 void __init alternative_instructions(void)
 535 {
 536         extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
 537         if (no_replacement)
 538                 return;
 539         apply_alternatives(__alt_instructions, __alt_instructions_end);
 540 }
 541
 542 static int __init noreplacement_setup(char *s)
 543 {
 544      no_replacement = 1;
 545      return 1;
 546 }
 547
 548 __setup("noreplacement", noreplacement_setup);
 549
 550 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
 551 struct edd edd;
 552 #ifdef CONFIG_EDD_MODULE
 553 EXPORT_SYMBOL(edd);
 554 #endif
 555 /**
 556  * copy_edd() - Copy the BIOS EDD information
 557  *              from boot_params into a safe place.
 558  *
 559  */
 560 static inline void copy_edd(void)
 561 {
 562      memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
 563      memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
 564      edd.mbr_signature_nr = EDD_MBR_SIG_NR;
 565      edd.edd_info_nr = EDD_NR;
 566 }
 567 #else
 568 static inline void copy_edd(void)
 569 {
 570 }
 571 #endif
 572
 573 #define EBDA_ADDR_POINTER 0x40E
 574
 575 unsigned __initdata ebda_addr;
 576 unsigned __initdata ebda_size;
 577
 578 static void discover_ebda(void)
 579 {
 580         /*
 581          * there is a real-mode segmented pointer pointing to the
 582          * 4K EBDA area at 0x40E
 583          */
 584         ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
 585         ebda_addr <<= 4;
 586
 587         ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
 588
 589         /* Round EBDA up to pages */
 590         if (ebda_size == 0)
 591                 ebda_size = 1;
 592         ebda_size <<= 10;
 593         ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
 594         if (ebda_size > 64*1024)
 595                 ebda_size = 64*1024;
 596 }
 597
 598 void __init setup_arch(char **cmdline_p)
 599 {
 600         unsigned long kernel_end;
 601
 602         ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
 603         screen_info = SCREEN_INFO;
 604         edid_info = EDID_INFO;
 605         saved_video_mode = SAVED_VIDEO_MODE;
 606         bootloader_type = LOADER_TYPE;
 607
 608 #ifdef CONFIG_BLK_DEV_RAM
 609         rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
 610         rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
 611         rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
 612 #endif
 613         setup_memory_region();
 614         copy_edd();
 615
 616         if (!MOUNT_ROOT_RDONLY)
 617                 root_mountflags &= ~MS_RDONLY;
 618         init_mm.start_code = (unsigned long) &_text;
 619         init_mm.end_code = (unsigned long) &_etext;
 620         init_mm.end_data = (unsigned long) &_edata;
 621         init_mm.brk = (unsigned long) &_end;
 622
 623         code_resource.start = virt_to_phys(&_text);
 624         code_resource.end = virt_to_phys(&_etext)-1;
 625         data_resource.start = virt_to_phys(&_etext);
 626         data_resource.end = virt_to_phys(&_edata)-1;
 627
 628         parse_cmdline_early(cmdline_p);
 629
 630         early_identify_cpu(&boot_cpu_data);
 631
 632         /*
 633          * partially used pages are not usable - thus
 634          * we are rounding upwards:
 635          */
 636         end_pfn = e820_end_of_ram();
 637         num_physpages = end_pfn;                /* for pfn_valid */
 638
 639         check_efer();
 640
 641         discover_ebda();
 642
 643         init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
 644
 645         dmi_scan_machine();
 646
 647         zap_low_mappings(0);
 648
 649 #ifdef CONFIG_ACPI
 650         /*
 651          * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
 652          * Call this early for SRAT node setup.
 653          */
 654         acpi_boot_table_init();
 655 #endif
 656
 657 #ifdef CONFIG_ACPI_NUMA
 658         /*
 659          * Parse SRAT to discover nodes.
 660          */
 661         acpi_numa_init();
 662 #endif
 663
 664 #ifdef CONFIG_NUMA
 665         numa_initmem_init(0, end_pfn);
 666 #else
 667         contig_initmem_init(0, end_pfn);
 668 #endif
 669
 670         /* Reserve direct mapping */
 671         reserve_bootmem_generic(table_start << PAGE_SHIFT,
 672                                 (table_end - table_start) << PAGE_SHIFT);
 673
 674         /* reserve kernel */
 675         kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
 676         reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
 677
 678         /*
 679          * reserve physical page 0 - it's a special BIOS page on many boxes,
 680          * enabling clean reboots, SMP operation, laptop functions.
 681          */
 682         reserve_bootmem_generic(0, PAGE_SIZE);
 683
 684         /* reserve ebda region */
 685         if (ebda_addr)
 686                 reserve_bootmem_generic(ebda_addr, ebda_size);
 687
 688 #ifdef CONFIG_SMP
 689         /*
 690          * But first pinch a few for the stack/trampoline stuff
 691          * FIXME: Don't need the extra page at 4K, but need to fix
 692          * trampoline before removing it. (see the GDT stuff)
 693          */
 694         reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
 695
 696         /* Reserve SMP trampoline */
 697         reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
 698 #endif
 699
 700 #ifdef CONFIG_ACPI_SLEEP
 701        /*
 702         * Reserve low memory region for sleep support.
 703         */
 704        acpi_reserve_bootmem();
 705 #endif
 706 #ifdef CONFIG_X86_LOCAL_APIC
 707         /*
 708          * Find and reserve possible boot-time SMP configuration:
 709          */
 710         find_smp_config();
 711 #endif
 712 #ifdef CONFIG_BLK_DEV_INITRD
 713         if (LOADER_TYPE && INITRD_START) {
 714                 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
 715                         reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
 716                         initrd_start =
 717                                 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
 718                         initrd_end = initrd_start+INITRD_SIZE;
 719                 }
 720                 else {
 721                         printk(KERN_ERR "initrd extends beyond end of memory "
 722                             "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
 723                             (unsigned long)(INITRD_START + INITRD_SIZE),
 724                             (unsigned long)(end_pfn << PAGE_SHIFT));
 725                         initrd_start = 0;
 726                 }
 727         }
 728 #endif
 729 #ifdef CONFIG_KEXEC
 730         if (crashk_res.start != crashk_res.end) {
 731                 reserve_bootmem(crashk_res.start,
 732                         crashk_res.end - crashk_res.start + 1);
 733         }
 734 #endif
 735
 736         paging_init();
 737
 738         check_ioapic();
 739
 740         /*
 741          * set this early, so we dont allocate cpu0
 742          * if MADT list doesnt list BSP first
 743          * mpparse.c/MP_processor_info() allocates logical cpu numbers.
 744          */
 745         cpu_set(0, cpu_present_map);
 746 #ifdef CONFIG_ACPI
 747         /*
 748          * Read APIC and some other early information from ACPI tables.
 749          */
 750         acpi_boot_init();
 751 #endif
 752
 753         init_cpu_to_node();
 754
 755 #ifdef CONFIG_X86_LOCAL_APIC
 756         /*
 757          * get boot-time SMP configuration:
 758          */
 759         if (smp_found_config)
 760                 get_smp_config();
 761         init_apic_mappings();
 762 #endif
 763
 764         /*
 765          * Request address space for all standard RAM and ROM resources
 766          * and also for regions reported as reserved by the e820.
 767          */
 768         probe_roms();
 769         e820_reserve_resources();
 770
 771         request_resource(&iomem_resource, &video_ram_resource);
 772
 773         {
 774         unsigned i;
 775         /* request I/O space for devices used on all i[345]86 PCs */
 776         for (i = 0; i < STANDARD_IO_RESOURCES; i++)
 777                 request_resource(&ioport_resource, &standard_io_resources[i]);
 778         }
 779
 780         e820_setup_gap();
 781
 782 #ifdef CONFIG_GART_IOMMU
 783         iommu_hole_init();
 784 #endif
 785
 786 #ifdef CONFIG_VT
 787 #if defined(CONFIG_VGA_CONSOLE)
 788         conswitchp = &vga_con;
 789 #elif defined(CONFIG_DUMMY_CONSOLE)
 790         conswitchp = &dummy_con;
 791 #endif
 792 #endif
 793 }
 794
 795 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
 796 {
 797         unsigned int *v;
 798
 799         if (c->extended_cpuid_level < 0x80000004)
 800                 return 0;
 801
 802         v = (unsigned int *) c->x86_model_id;
 803         cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
 804         cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
 805         cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
 806         c->x86_model_id[48] = 0;
 807         return 1;
 808 }
 809
 810
 811 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
 812 {
 813         unsigned int n, dummy, eax, ebx, ecx, edx;
 814
 815         n = c->extended_cpuid_level;
 816
 817         if (n >= 0x80000005) {
 818                 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
 819                 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
 820                         edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
 821                 c->x86_cache_size=(ecx>>24)+(edx>>24);
 822                 /* On K8 L1 TLB is inclusive, so don't count it */
 823                 c->x86_tlbsize = 0;
 824         }
 825
 826         if (n >= 0x80000006) {
 827                 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
 828                 ecx = cpuid_ecx(0x80000006);
 829                 c->x86_cache_size = ecx >> 16;
 830                 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
 831
 832                 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
 833                 c->x86_cache_size, ecx & 0xFF);
 834         }
 835
 836         if (n >= 0x80000007)
 837                 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
 838         if (n >= 0x80000008) {
 839                 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
 840                 c->x86_virt_bits = (eax >> 8) & 0xff;
 841                 c->x86_phys_bits = eax & 0xff;
 842         }
 843 }
 844
 845 #ifdef CONFIG_NUMA
 846 static int nearby_node(int apicid)
 847 {
 848         int i;
 849         for (i = apicid - 1; i >= 0; i--) {
 850                 int node = apicid_to_node[i];
 851                 if (node != NUMA_NO_NODE && node_online(node))
 852                         return node;
 853         }
 854         for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
 855                 int node = apicid_to_node[i];
 856                 if (node != NUMA_NO_NODE && node_online(node))
 857                         return node;
 858         }
 859         return first_node(node_online_map); /* Shouldn't happen */
 860 }
 861 #endif
 862
 863 /*
 864  * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
 865  * Assumes number of cores is a power of two.
 866  */
 867 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
 868 {
 869 #ifdef CONFIG_SMP
 870         int cpu = smp_processor_id();
 871         unsigned bits;
 872 #ifdef CONFIG_NUMA
 873         int node = 0;
 874         unsigned apicid = hard_smp_processor_id();
 875 #endif
 876
 877         bits = 0;
 878         while ((1 << bits) < c->x86_max_cores)
 879                 bits++;
 880
 881         /* Low order bits define the core id (index of core in socket) */
 882         cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
 883         /* Convert the APIC ID into the socket ID */
 884         phys_proc_id[cpu] = phys_pkg_id(bits);
 885
 886 #ifdef CONFIG_NUMA
 887         node = phys_proc_id[cpu];
 888         if (apicid_to_node[apicid] != NUMA_NO_NODE)
 889                 node = apicid_to_node[apicid];
 890         if (!node_online(node)) {
 891                 /* Two possibilities here:
 892                    - The CPU is missing memory and no node was created.
 893                    In that case try picking one from a nearby CPU
 894                    - The APIC IDs differ from the HyperTransport node IDs
 895                    which the K8 northbridge parsing fills in.
 896                    Assume they are all increased by a constant offset,
 897                    but in the same order as the HT nodeids.
 898                    If that doesn't result in a usable node fall back to the
 899                    path for the previous case.  */
 900                 int ht_nodeid = apicid - (phys_proc_id[0] << bits);
 901                 if (ht_nodeid >= 0 &&
 902                     apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
 903                         node = apicid_to_node[ht_nodeid];
 904                 /* Pick a nearby node */
 905                 if (!node_online(node))
 906                         node = nearby_node(apicid);
 907         }
 908         numa_set_node(cpu, node);
 909
 910         printk(KERN_INFO "CPU %d/%x(%d) -> Node %d -> Core %d\n",
 911                         cpu, apicid, c->x86_max_cores, node, cpu_core_id[cpu]);
 912 #endif
 913 #endif
 914 }
 915
 916 static int __init init_amd(struct cpuinfo_x86 *c)
 917 {
 918         int r;
 919         unsigned level;
 920
 921 #ifdef CONFIG_SMP
 922         unsigned long value;
 923
 924         /*
 925          * Disable TLB flush filter by setting HWCR.FFDIS on K8
 926          * bit 6 of msr C001_0015
 927          *
 928          * Errata 63 for SH-B3 steppings
 929          * Errata 122 for all steppings (F+ have it disabled by default)
 930          */
 931         if (c->x86 == 15) {
 932                 rdmsrl(MSR_K8_HWCR, value);
 933                 value |= 1 << 6;
 934                 wrmsrl(MSR_K8_HWCR, value);
 935         }
 936 #endif
 937
 938         /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
 939            3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
 940         clear_bit(0*32+31, &c->x86_capability);
 941
 942         /* On C+ stepping K8 rep microcode works well for copy/memset */
 943         level = cpuid_eax(1);
 944         if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
 945                 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
 946
 947         /* Enable workaround for FXSAVE leak */
 948         if (c->x86 >= 6)
 949                 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
 950
 951         r = get_model_name(c);
 952         if (!r) {
 953                 switch (c->x86) {
 954                 case 15:
 955                         /* Should distinguish Models here, but this is only
 956                            a fallback anyways. */
 957                         strcpy(c->x86_model_id, "Hammer");
 958                         break;
 959                 }
 960         }
 961         display_cacheinfo(c);
 962
 963         /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
 964         if (c->x86_power & (1<<8))
 965                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
 966
 967         if (c->extended_cpuid_level >= 0x80000008) {
 968                 c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
 969
 970                 amd_detect_cmp(c);
 971         }
 972
 973         return r;
 974 }
 975
 976 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
 977 {
 978 #ifdef CONFIG_SMP
 979         u32     eax, ebx, ecx, edx;
 980         int     index_msb, core_bits;
 981         int     cpu = smp_processor_id();
 982
 983         cpuid(1, &eax, &ebx, &ecx, &edx);
 984
 985
 986         if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
 987                 return;
 988
 989         smp_num_siblings = (ebx & 0xff0000) >> 16;
 990
 991         if (smp_num_siblings == 1) {
 992                 printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
 993         } else if (smp_num_siblings > 1 ) {
 994
 995                 if (smp_num_siblings > NR_CPUS) {
 996                         printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
 997                         smp_num_siblings = 1;
 998                         return;
 999                 }
1000
1001                 index_msb = get_count_order(smp_num_siblings);
1002                 phys_proc_id[cpu] = phys_pkg_id(index_msb);
1003
1004                 printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
1005                        phys_proc_id[cpu]);
1006
1007                 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
1008
1009                 index_msb = get_count_order(smp_num_siblings) ;
1010
1011                 core_bits = get_count_order(c->x86_max_cores);
1012
1013                 cpu_core_id[cpu] = phys_pkg_id(index_msb) &
1014                                                ((1 << core_bits) - 1);
1015
1016                 if (c->x86_max_cores > 1)
1017                         printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
1018                                cpu_core_id[cpu]);
1019         }
1020 #endif
1021 }
1022
1023 /*
1024  * find out the number of processor cores on the die
1025  */
1026 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
1027 {
1028         unsigned int eax;
1029
1030         if (c->cpuid_level < 4)
1031                 return 1;
1032
1033         __asm__("cpuid"
1034                 : "=a" (eax)
1035                 : "0" (4), "c" (0)
1036                 : "bx", "dx");
1037
1038         if (eax & 0x1f)
1039                 return ((eax >> 26) + 1);
1040         else
1041                 return 1;
1042 }
1043
1044 static void srat_detect_node(void)
1045 {
1046 #ifdef CONFIG_NUMA
1047         unsigned node;
1048         int cpu = smp_processor_id();
1049
1050         /* Don't do the funky fallback heuristics the AMD version employs
1051            for now. */
1052         node = apicid_to_node[hard_smp_processor_id()];
1053         if (node == NUMA_NO_NODE)
1054                 node = first_node(node_online_map);
1055         numa_set_node(cpu, node);
1056
1057         if (acpi_numa > 0)
1058                 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
1059 #endif
1060 }
1061
1062 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
1063 {
1064         /* Cache sizes */
1065         unsigned n;
1066
1067         init_intel_cacheinfo(c);
1068         n = c->extended_cpuid_level;
1069         if (n >= 0x80000008) {
1070                 unsigned eax = cpuid_eax(0x80000008);
1071                 c->x86_virt_bits = (eax >> 8) & 0xff;
1072                 c->x86_phys_bits = eax & 0xff;
1073                 /* CPUID workaround for Intel 0F34 CPU */
1074                 if (c->x86_vendor == X86_VENDOR_INTEL &&
1075                     c->x86 == 0xF && c->x86_model == 0x3 &&
1076                     c->x86_mask == 0x4)
1077                         c->x86_phys_bits = 36;
1078         }
1079
1080         if (c->x86 == 15)
1081                 c->x86_cache_alignment = c->x86_clflush_size * 2;
1082         if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1083             (c->x86 == 0x6 && c->x86_model >= 0x0e))
1084                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
1085         set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
1086         c->x86_max_cores = intel_num_cpu_cores(c);
1087
1088         srat_detect_node();
1089 }
1090
1091 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1092 {
1093         char *v = c->x86_vendor_id;
1094
1095         if (!strcmp(v, "AuthenticAMD"))
1096                 c->x86_vendor = X86_VENDOR_AMD;
1097         else if (!strcmp(v, "GenuineIntel"))
1098                 c->x86_vendor = X86_VENDOR_INTEL;
1099         else
1100                 c->x86_vendor = X86_VENDOR_UNKNOWN;
1101 }
1102
1103 struct cpu_model_info {
1104         int vendor;
1105         int family;
1106         char *model_names[16];
1107 };
1108
1109 /* Do some early cpuid on the boot CPU to get some parameter that are
1110    needed before check_bugs. Everything advanced is in identify_cpu
1111    below. */
1112 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1113 {
1114         u32 tfms;
1115
1116         c->loops_per_jiffy = loops_per_jiffy;
1117         c->x86_cache_size = -1;
1118         c->x86_vendor = X86_VENDOR_UNKNOWN;
1119         c->x86_model = c->x86_mask = 0; /* So far unknown... */
1120         c->x86_vendor_id[0] = '\0'; /* Unset */
1121         c->x86_model_id[0] = '\0';  /* Unset */
1122         c->x86_clflush_size = 64;
1123         c->x86_cache_alignment = c->x86_clflush_size;
1124         c->x86_max_cores = 1;
1125         c->extended_cpuid_level = 0;
1126         memset(&c->x86_capability, 0, sizeof c->x86_capability);
1127
1128         /* Get vendor name */
1129         cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1130               (unsigned int *)&c->x86_vendor_id[0],
1131               (unsigned int *)&c->x86_vendor_id[8],
1132               (unsigned int *)&c->x86_vendor_id[4]);
1133
1134         get_cpu_vendor(c);
1135
1136         /* Initialize the standard set of capabilities */
1137         /* Note that the vendor-specific code below might override */
1138
1139         /* Intel-defined flags: level 0x00000001 */
1140         if (c->cpuid_level >= 0x00000001) {
1141                 __u32 misc;
1142                 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1143                       &c->x86_capability[0]);
1144                 c->x86 = (tfms >> 8) & 0xf;
1145                 c->x86_model = (tfms >> 4) & 0xf;
1146                 c->x86_mask = tfms & 0xf;
1147                 if (c->x86 == 0xf)
1148                         c->x86 += (tfms >> 20) & 0xff;
1149                 if (c->x86 >= 0x6)
1150                         c->x86_model += ((tfms >> 16) & 0xF) << 4;
1151                 if (c->x86_capability[0] & (1<<19))
1152                         c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1153         } else {
1154                 /* Have CPUID level 0 only - unheard of */
1155                 c->x86 = 4;
1156         }
1157
1158 #ifdef CONFIG_SMP
1159         phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
1160 #endif
1161 }
1162
1163 /*
1164  * This does the hard work of actually picking apart the CPU stuff...
1165  */
1166 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1167 {
1168         int i;
1169         u32 xlvl;
1170
1171         early_identify_cpu(c);
1172
1173         /* AMD-defined flags: level 0x80000001 */
1174         xlvl = cpuid_eax(0x80000000);
1175         c->extended_cpuid_level = xlvl;
1176         if ((xlvl & 0xffff0000) == 0x80000000) {
1177                 if (xlvl >= 0x80000001) {
1178                         c->x86_capability[1] = cpuid_edx(0x80000001);
1179                         c->x86_capability[6] = cpuid_ecx(0x80000001);
1180                 }
1181                 if (xlvl >= 0x80000004)
1182                         get_model_name(c); /* Default name */
1183         }
1184
1185         /* Transmeta-defined flags: level 0x80860001 */
1186         xlvl = cpuid_eax(0x80860000);
1187         if ((xlvl & 0xffff0000) == 0x80860000) {
1188                 /* Don't set x86_cpuid_level here for now to not confuse. */
1189                 if (xlvl >= 0x80860001)
1190                         c->x86_capability[2] = cpuid_edx(0x80860001);
1191         }
1192
1193         c->apicid = phys_pkg_id(0);
1194
1195         /*
1196          * Vendor-specific initialization.  In this section we
1197          * canonicalize the feature flags, meaning if there are
1198          * features a certain CPU supports which CPUID doesn't
1199          * tell us, CPUID claiming incorrect flags, or other bugs,
1200          * we handle them here.
1201          *
1202          * At the end of this section, c->x86_capability better
1203          * indicate the features this CPU genuinely supports!
1204          */
1205         switch (c->x86_vendor) {
1206         case X86_VENDOR_AMD:
1207                 init_amd(c);
1208                 break;
1209
1210         case X86_VENDOR_INTEL:
1211                 init_intel(c);
1212                 break;
1213
1214         case X86_VENDOR_UNKNOWN:
1215         default:
1216                 display_cacheinfo(c);
1217                 break;
1218         }
1219
1220         select_idle_routine(c);
1221         detect_ht(c);
1222
1223         /*
1224          * On SMP, boot_cpu_data holds the common feature set between
1225          * all CPUs; so make sure that we indicate which features are
1226          * common between the CPUs.  The first time this routine gets
1227          * executed, c == &boot_cpu_data.
1228          */
1229         if (c != &boot_cpu_data) {
1230                 /* AND the already accumulated flags with these */
1231                 for (i = 0 ; i < NCAPINTS ; i++)
1232                         boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1233         }
1234
1235 #ifdef CONFIG_X86_MCE
1236         mcheck_init(c);
1237 #endif
1238         if (c == &boot_cpu_data)
1239                 mtrr_bp_init();
1240         else
1241                 mtrr_ap_init();
1242 #ifdef CONFIG_NUMA
1243         numa_add_cpu(smp_processor_id());
1244 #endif
1245 }
1246
1247
1248 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1249 {
1250         if (c->x86_model_id[0])
1251                 printk("%s", c->x86_model_id);
1252
1253         if (c->x86_mask || c->cpuid_level >= 0)
1254                 printk(" stepping %02x\n", c->x86_mask);
1255         else
1256                 printk("\n");
1257 }
1258
1259 /*
1260  *      Get CPU information for use by the procfs.
1261  */
1262
1263 static int show_cpuinfo(struct seq_file *m, void *v)
1264 {
1265         struct cpuinfo_x86 *c = v;
1266
1267         /*
1268          * These flag bits must match the definitions in <asm/cpufeature.h>.
1269          * NULL means this bit is undefined or reserved; either way it doesn't
1270          * have meaning as far as Linux is concerned.  Note that it's important
1271          * to realize there is a difference between this table and CPUID -- if
1272          * applications want to get the raw CPUID data, they should access
1273          * /dev/cpu/<cpu_nr>/cpuid instead.
1274          */
1275         static char *x86_cap_flags[] = {
1276                 /* Intel-defined */
1277                 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1278                 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1279                 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1280                 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1281
1282                 /* AMD-defined */
1283                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1284                 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1285                 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1286                 NULL, "fxsr_opt", "rdtscp", NULL, NULL, "lm", "3dnowext", "3dnow",
1287
1288                 /* Transmeta-defined */
1289                 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1290                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1291                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1292                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1293
1294                 /* Other (Linux-defined) */
1295                 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1296                 "constant_tsc", NULL, NULL,
1297                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1298                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1299                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1300
1301                 /* Intel-defined (#2) */
1302                 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1303                 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1304                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1305                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1306
1307                 /* VIA/Cyrix/Centaur-defined */
1308                 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1309                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1310                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1311                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1312
1313                 /* AMD-defined (#2) */
1314                 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1315                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1316                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1317                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1318         };
1319         static char *x86_power_flags[] = {
1320                 "ts",   /* temperature sensor */
1321                 "fid",  /* frequency id control */
1322                 "vid",  /* voltage id control */
1323                 "ttp",  /* thermal trip */
1324                 "tm",
1325                 "stc",
1326                 NULL,
1327                 /* nothing */   /* constant_tsc - moved to flags */
1328         };
1329
1330
1331 #ifdef CONFIG_SMP
1332         if (!cpu_online(c-cpu_data))
1333                 return 0;
1334 #endif
1335
1336         seq_printf(m,"processor\t: %u\n"
1337                      "vendor_id\t: %s\n"
1338                      "cpu family\t: %d\n"
1339                      "model\t\t: %d\n"
1340                      "model name\t: %s\n",
1341                      (unsigned)(c-cpu_data),
1342                      c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1343                      c->x86,
1344                      (int)c->x86_model,
1345                      c->x86_model_id[0] ? c->x86_model_id : "unknown");
1346
1347         if (c->x86_mask || c->cpuid_level >= 0)
1348                 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1349         else
1350                 seq_printf(m, "stepping\t: unknown\n");
1351
1352         if (cpu_has(c,X86_FEATURE_TSC)) {
1353                 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1354                 if (!freq)
1355                         freq = cpu_khz;
1356                 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1357                              freq / 1000, (freq % 1000));
1358         }
1359
1360         /* Cache size */
1361         if (c->x86_cache_size >= 0)
1362                 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1363
1364 #ifdef CONFIG_SMP
1365         if (smp_num_siblings * c->x86_max_cores > 1) {
1366                 int cpu = c - cpu_data;
1367                 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1368                 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1369                 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1370                 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1371         }
1372 #endif
1373
1374         seq_printf(m,
1375                 "fpu\t\t: yes\n"
1376                 "fpu_exception\t: yes\n"
1377                 "cpuid level\t: %d\n"
1378                 "wp\t\t: yes\n"
1379                 "flags\t\t:",
1380                    c->cpuid_level);
1381
1382         {
1383                 int i;
1384                 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1385                         if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1386                                 seq_printf(m, " %s", x86_cap_flags[i]);
1387         }
1388
1389         seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1390                    c->loops_per_jiffy/(500000/HZ),
1391                    (c->loops_per_jiffy/(5000/HZ)) % 100);
1392
1393         if (c->x86_tlbsize > 0)
1394                 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1395         seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1396         seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1397
1398         seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1399                    c->x86_phys_bits, c->x86_virt_bits);
1400
1401         seq_printf(m, "power management:");
1402         {
1403                 unsigned i;
1404                 for (i = 0; i < 32; i++)
1405                         if (c->x86_power & (1 << i)) {
1406                                 if (i < ARRAY_SIZE(x86_power_flags) &&
1407                                         x86_power_flags[i])
1408                                         seq_printf(m, "%s%s",
1409                                                 x86_power_flags[i][0]?" ":"",
1410                                                 x86_power_flags[i]);
1411                                 else
1412                                         seq_printf(m, " [%d]", i);
1413                         }
1414         }
1415
1416         seq_printf(m, "\n\n");
1417
1418         return 0;
1419 }
1420
1421 static void *c_start(struct seq_file *m, loff_t *pos)
1422 {
1423         return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1424 }
1425
1426 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1427 {
1428         ++*pos;
1429         return c_start(m, pos);
1430 }
1431
1432 static void c_stop(struct seq_file *m, void *v)
1433 {
1434 }
1435
1436 struct seq_operations cpuinfo_op = {
1437         .start =c_start,
1438         .next = c_next,
1439         .stop = c_stop,
1440         .show = show_cpuinfo,
1441 };
1442
1443 #ifdef CONFIG_INPUT_PCSPKR
1444 #include <linux/platform_device.h>
1445 static __init int add_pcspkr(void)
1446 {
1447         struct platform_device *pd;
1448         int ret;
1449
1450         pd = platform_device_alloc("pcspkr", -1);
1451         if (!pd)
1452                 return -ENOMEM;
1453
1454         ret = platform_device_add(pd);
1455         if (ret)
1456                 platform_device_put(pd);
1457
1458         return ret;
1459 }
1460 device_initcall(add_pcspkr);
1461 #endif