2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
13 * This file handles the architecture-dependent parts of initialization
16 #include <linux/errno.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/ptrace.h>
23 #include <linux/slab.h>
24 #include <linux/user.h>
25 #include <linux/a.out.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/delay.h>
29 #include <linux/config.h>
30 #include <linux/init.h>
31 #include <linux/initrd.h>
32 #include <linux/highmem.h>
33 #include <linux/bootmem.h>
34 #include <linux/module.h>
35 #include <asm/processor.h>
36 #include <linux/console.h>
37 #include <linux/seq_file.h>
38 #include <linux/crash_dump.h>
39 #include <linux/root_dev.h>
40 #include <linux/pci.h>
41 #include <linux/acpi.h>
42 #include <linux/kallsyms.h>
43 #include <linux/edd.h>
44 #include <linux/mmzone.h>
45 #include <linux/kexec.h>
46 #include <linux/cpufreq.h>
47 #include <linux/dmi.h>
48 #include <linux/dma-mapping.h>
49 #include <linux/ctype.h>
52 #include <asm/uaccess.h>
53 #include <asm/system.h>
58 #include <video/edid.h>
61 #include <asm/mpspec.h>
62 #include <asm/mmu_context.h>
63 #include <asm/bootsetup.h>
64 #include <asm/proto.h>
65 #include <asm/setup.h>
66 #include <asm/mach_apic.h>
68 #include <asm/swiotlb.h>
69 #include <asm/sections.h>
70 #include <asm/gart-mapping.h>
77 struct cpuinfo_x86 boot_cpu_data __read_mostly
;
79 unsigned long mmu_cr4_features
;
82 EXPORT_SYMBOL(acpi_disabled
);
84 extern int __initdata acpi_ht
;
85 extern acpi_interrupt_flags acpi_sci_flags
;
86 int __initdata acpi_force
= 0;
89 int acpi_numa __initdata
;
91 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
94 unsigned long saved_video_mode
;
100 char dmi_alloc_data
[DMI_MAX_DATA
];
105 struct screen_info screen_info
;
106 struct sys_desc_table_struct
{
107 unsigned short length
;
108 unsigned char table
[0];
111 struct edid_info edid_info
;
114 extern int root_mountflags
;
116 char command_line
[COMMAND_LINE_SIZE
];
118 struct resource standard_io_resources
[] = {
119 { .name
= "dma1", .start
= 0x00, .end
= 0x1f,
120 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
121 { .name
= "pic1", .start
= 0x20, .end
= 0x21,
122 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
123 { .name
= "timer0", .start
= 0x40, .end
= 0x43,
124 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
125 { .name
= "timer1", .start
= 0x50, .end
= 0x53,
126 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
127 { .name
= "keyboard", .start
= 0x60, .end
= 0x6f,
128 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
129 { .name
= "dma page reg", .start
= 0x80, .end
= 0x8f,
130 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
131 { .name
= "pic2", .start
= 0xa0, .end
= 0xa1,
132 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
133 { .name
= "dma2", .start
= 0xc0, .end
= 0xdf,
134 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
135 { .name
= "fpu", .start
= 0xf0, .end
= 0xff,
136 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
}
139 #define STANDARD_IO_RESOURCES \
140 (sizeof standard_io_resources / sizeof standard_io_resources[0])
142 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
144 struct resource data_resource
= {
145 .name
= "Kernel data",
148 .flags
= IORESOURCE_RAM
,
150 struct resource code_resource
= {
151 .name
= "Kernel code",
154 .flags
= IORESOURCE_RAM
,
157 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
159 static struct resource system_rom_resource
= {
160 .name
= "System ROM",
163 .flags
= IORESOURCE_ROM
,
166 static struct resource extension_rom_resource
= {
167 .name
= "Extension ROM",
170 .flags
= IORESOURCE_ROM
,
173 static struct resource adapter_rom_resources
[] = {
174 { .name
= "Adapter ROM", .start
= 0xc8000, .end
= 0,
175 .flags
= IORESOURCE_ROM
},
176 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
177 .flags
= IORESOURCE_ROM
},
178 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
179 .flags
= IORESOURCE_ROM
},
180 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
181 .flags
= IORESOURCE_ROM
},
182 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
183 .flags
= IORESOURCE_ROM
},
184 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
185 .flags
= IORESOURCE_ROM
}
188 #define ADAPTER_ROM_RESOURCES \
189 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
191 static struct resource video_rom_resource
= {
195 .flags
= IORESOURCE_ROM
,
198 static struct resource video_ram_resource
= {
199 .name
= "Video RAM area",
202 .flags
= IORESOURCE_RAM
,
205 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
207 static int __init
romchecksum(unsigned char *rom
, unsigned long length
)
209 unsigned char *p
, sum
= 0;
211 for (p
= rom
; p
< rom
+ length
; p
++)
216 static void __init
probe_roms(void)
218 unsigned long start
, length
, upper
;
223 upper
= adapter_rom_resources
[0].start
;
224 for (start
= video_rom_resource
.start
; start
< upper
; start
+= 2048) {
225 rom
= isa_bus_to_virt(start
);
226 if (!romsignature(rom
))
229 video_rom_resource
.start
= start
;
231 /* 0 < length <= 0x7f * 512, historically */
232 length
= rom
[2] * 512;
234 /* if checksum okay, trust length byte */
235 if (length
&& romchecksum(rom
, length
))
236 video_rom_resource
.end
= start
+ length
- 1;
238 request_resource(&iomem_resource
, &video_rom_resource
);
242 start
= (video_rom_resource
.end
+ 1 + 2047) & ~2047UL;
247 request_resource(&iomem_resource
, &system_rom_resource
);
248 upper
= system_rom_resource
.start
;
250 /* check for extension rom (ignore length byte!) */
251 rom
= isa_bus_to_virt(extension_rom_resource
.start
);
252 if (romsignature(rom
)) {
253 length
= extension_rom_resource
.end
- extension_rom_resource
.start
+ 1;
254 if (romchecksum(rom
, length
)) {
255 request_resource(&iomem_resource
, &extension_rom_resource
);
256 upper
= extension_rom_resource
.start
;
260 /* check for adapter roms on 2k boundaries */
261 for (i
= 0; i
< ADAPTER_ROM_RESOURCES
&& start
< upper
; start
+= 2048) {
262 rom
= isa_bus_to_virt(start
);
263 if (!romsignature(rom
))
266 /* 0 < length <= 0x7f * 512, historically */
267 length
= rom
[2] * 512;
269 /* but accept any length that fits if checksum okay */
270 if (!length
|| start
+ length
> upper
|| !romchecksum(rom
, length
))
273 adapter_rom_resources
[i
].start
= start
;
274 adapter_rom_resources
[i
].end
= start
+ length
- 1;
275 request_resource(&iomem_resource
, &adapter_rom_resources
[i
]);
277 start
= adapter_rom_resources
[i
++].end
& ~2047UL;
281 /* Check for full argument with no trailing characters */
282 static int fullarg(char *p
, char *arg
)
285 return !memcmp(p
, arg
, l
) && (p
[l
] == 0 || isspace(p
[l
]));
288 static __init
void parse_cmdline_early (char ** cmdline_p
)
290 char c
= ' ', *to
= command_line
, *from
= COMMAND_LINE
;
300 * If the BIOS enumerates physical processors before logical,
301 * maxcpus=N at enumeration-time can be used to disable HT.
303 else if (!memcmp(from
, "maxcpus=", 8)) {
304 extern unsigned int maxcpus
;
306 maxcpus
= simple_strtoul(from
+ 8, NULL
, 0);
310 /* "acpi=off" disables both ACPI table parsing and interpreter init */
311 if (fullarg(from
,"acpi=off"))
314 if (fullarg(from
, "acpi=force")) {
315 /* add later when we do DMI horrors: */
320 /* acpi=ht just means: do ACPI MADT parsing
321 at bootup, but don't enable the full ACPI interpreter */
322 if (fullarg(from
, "acpi=ht")) {
327 else if (fullarg(from
, "pci=noacpi"))
329 else if (fullarg(from
, "acpi=noirq"))
332 else if (fullarg(from
, "acpi_sci=edge"))
333 acpi_sci_flags
.trigger
= 1;
334 else if (fullarg(from
, "acpi_sci=level"))
335 acpi_sci_flags
.trigger
= 3;
336 else if (fullarg(from
, "acpi_sci=high"))
337 acpi_sci_flags
.polarity
= 1;
338 else if (fullarg(from
, "acpi_sci=low"))
339 acpi_sci_flags
.polarity
= 3;
341 /* acpi=strict disables out-of-spec workarounds */
342 else if (fullarg(from
, "acpi=strict")) {
345 #ifdef CONFIG_X86_IO_APIC
346 else if (fullarg(from
, "acpi_skip_timer_override"))
347 acpi_skip_timer_override
= 1;
351 if (fullarg(from
, "disable_timer_pin_1"))
352 disable_timer_pin_1
= 1;
353 if (fullarg(from
, "enable_timer_pin_1"))
354 disable_timer_pin_1
= -1;
356 if (fullarg(from
, "nolapic") || fullarg(from
, "disableapic")) {
357 clear_bit(X86_FEATURE_APIC
, boot_cpu_data
.x86_capability
);
361 if (fullarg(from
, "noapic"))
362 skip_ioapic_setup
= 1;
364 if (fullarg(from
,"apic")) {
365 skip_ioapic_setup
= 0;
369 if (!memcmp(from
, "mem=", 4))
370 parse_memopt(from
+4, &from
);
372 if (!memcmp(from
, "memmap=", 7)) {
373 /* exactmap option is for used defined memory */
374 if (!memcmp(from
+7, "exactmap", 8)) {
375 #ifdef CONFIG_CRASH_DUMP
376 /* If we are doing a crash dump, we
377 * still need to know the real mem
378 * size before original memory map is
381 saved_max_pfn
= e820_end_of_ram();
389 parse_memmapopt(from
+7, &from
);
395 if (!memcmp(from
, "numa=", 5))
399 if (!memcmp(from
,"iommu=",6)) {
403 if (fullarg(from
,"oops=panic"))
406 if (!memcmp(from
, "noexec=", 7))
407 nonx_setup(from
+ 7);
410 /* crashkernel=size@addr specifies the location to reserve for
411 * a crash kernel. By reserving this memory we guarantee
412 * that linux never set's it up as a DMA target.
413 * Useful for holding code to do something appropriate
414 * after a kernel panic.
416 else if (!memcmp(from
, "crashkernel=", 12)) {
417 unsigned long size
, base
;
418 size
= memparse(from
+12, &from
);
420 base
= memparse(from
+1, &from
);
421 /* FIXME: Do I want a sanity check
422 * to validate the memory range?
424 crashk_res
.start
= base
;
425 crashk_res
.end
= base
+ size
- 1;
430 #ifdef CONFIG_PROC_VMCORE
431 /* elfcorehdr= specifies the location of elf core header
432 * stored by the crashed kernel. This option will be passed
433 * by kexec loader to the capture kernel.
435 else if(!memcmp(from
, "elfcorehdr=", 11))
436 elfcorehdr_addr
= memparse(from
+11, &from
);
439 #ifdef CONFIG_HOTPLUG_CPU
440 else if (!memcmp(from
, "additional_cpus=", 16))
441 setup_additional_cpus(from
+16);
448 if (COMMAND_LINE_SIZE
<= ++len
)
453 printk(KERN_INFO
"user-defined physical RAM map:\n");
454 e820_print_map("user");
457 *cmdline_p
= command_line
;
462 contig_initmem_init(unsigned long start_pfn
, unsigned long end_pfn
)
464 unsigned long bootmap_size
, bootmap
;
466 bootmap_size
= bootmem_bootmap_pages(end_pfn
)<<PAGE_SHIFT
;
467 bootmap
= find_e820_area(0, end_pfn
<<PAGE_SHIFT
, bootmap_size
);
469 panic("Cannot find bootmem map of size %ld\n",bootmap_size
);
470 bootmap_size
= init_bootmem(bootmap
>> PAGE_SHIFT
, end_pfn
);
471 e820_bootmem_free(NODE_DATA(0), 0, end_pfn
<< PAGE_SHIFT
);
472 reserve_bootmem(bootmap
, bootmap_size
);
476 /* Use inline assembly to define this because the nops are defined
477 as inline assembly strings in the include files and we cannot
478 get them easily into strings. */
479 asm("\t.data\nk8nops: "
480 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
483 extern unsigned char k8nops
[];
484 static unsigned char *k8_nops
[ASM_NOP_MAX
+1] = {
490 k8nops
+ 1 + 2 + 3 + 4,
491 k8nops
+ 1 + 2 + 3 + 4 + 5,
492 k8nops
+ 1 + 2 + 3 + 4 + 5 + 6,
493 k8nops
+ 1 + 2 + 3 + 4 + 5 + 6 + 7,
496 extern char __vsyscall_0
;
498 /* Replace instructions with better alternatives for this CPU type.
500 This runs before SMP is initialized to avoid SMP problems with
501 self modifying code. This implies that assymetric systems where
502 APs have less capabilities than the boot processor are not handled.
503 In this case boot with "noreplacement". */
504 void apply_alternatives(void *start
, void *end
)
508 for (a
= start
; (void *)a
< end
; a
++) {
511 if (!boot_cpu_has(a
->cpuid
))
514 BUG_ON(a
->replacementlen
> a
->instrlen
);
516 /* vsyscall code is not mapped yet. resolve it manually. */
517 if (instr
>= (u8
*)VSYSCALL_START
&& instr
< (u8
*)VSYSCALL_END
)
518 instr
= __va(instr
- (u8
*)VSYSCALL_START
+ (u8
*)__pa_symbol(&__vsyscall_0
));
519 __inline_memcpy(instr
, a
->replacement
, a
->replacementlen
);
520 diff
= a
->instrlen
- a
->replacementlen
;
522 /* Pad the rest with nops */
523 for (i
= a
->replacementlen
; diff
> 0; diff
-= k
, i
+= k
) {
527 __inline_memcpy(instr
+ i
, k8_nops
[k
], k
);
532 static int no_replacement __initdata
= 0;
534 void __init
alternative_instructions(void)
536 extern struct alt_instr __alt_instructions
[], __alt_instructions_end
[];
539 apply_alternatives(__alt_instructions
, __alt_instructions_end
);
542 static int __init
noreplacement_setup(char *s
)
548 __setup("noreplacement", noreplacement_setup
);
550 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
552 #ifdef CONFIG_EDD_MODULE
556 * copy_edd() - Copy the BIOS EDD information
557 * from boot_params into a safe place.
560 static inline void copy_edd(void)
562 memcpy(edd
.mbr_signature
, EDD_MBR_SIGNATURE
, sizeof(edd
.mbr_signature
));
563 memcpy(edd
.edd_info
, EDD_BUF
, sizeof(edd
.edd_info
));
564 edd
.mbr_signature_nr
= EDD_MBR_SIG_NR
;
565 edd
.edd_info_nr
= EDD_NR
;
568 static inline void copy_edd(void)
573 #define EBDA_ADDR_POINTER 0x40E
574 static void __init
reserve_ebda_region(void)
578 * there is a real-mode segmented pointer pointing to the
579 * 4K EBDA area at 0x40E
581 addr
= *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER
);
584 reserve_bootmem_generic(addr
, PAGE_SIZE
);
587 void __init
setup_arch(char **cmdline_p
)
589 unsigned long kernel_end
;
591 ROOT_DEV
= old_decode_dev(ORIG_ROOT_DEV
);
592 screen_info
= SCREEN_INFO
;
593 edid_info
= EDID_INFO
;
594 saved_video_mode
= SAVED_VIDEO_MODE
;
595 bootloader_type
= LOADER_TYPE
;
597 #ifdef CONFIG_BLK_DEV_RAM
598 rd_image_start
= RAMDISK_FLAGS
& RAMDISK_IMAGE_START_MASK
;
599 rd_prompt
= ((RAMDISK_FLAGS
& RAMDISK_PROMPT_FLAG
) != 0);
600 rd_doload
= ((RAMDISK_FLAGS
& RAMDISK_LOAD_FLAG
) != 0);
602 setup_memory_region();
605 if (!MOUNT_ROOT_RDONLY
)
606 root_mountflags
&= ~MS_RDONLY
;
607 init_mm
.start_code
= (unsigned long) &_text
;
608 init_mm
.end_code
= (unsigned long) &_etext
;
609 init_mm
.end_data
= (unsigned long) &_edata
;
610 init_mm
.brk
= (unsigned long) &_end
;
612 code_resource
.start
= virt_to_phys(&_text
);
613 code_resource
.end
= virt_to_phys(&_etext
)-1;
614 data_resource
.start
= virt_to_phys(&_etext
);
615 data_resource
.end
= virt_to_phys(&_edata
)-1;
617 parse_cmdline_early(cmdline_p
);
619 early_identify_cpu(&boot_cpu_data
);
622 * partially used pages are not usable - thus
623 * we are rounding upwards:
625 end_pfn
= e820_end_of_ram();
626 num_physpages
= end_pfn
; /* for pfn_valid */
630 init_memory_mapping(0, (end_pfn_map
<< PAGE_SHIFT
));
638 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
639 * Call this early for SRAT node setup.
641 acpi_boot_table_init();
644 #ifdef CONFIG_ACPI_NUMA
646 * Parse SRAT to discover nodes.
652 numa_initmem_init(0, end_pfn
);
654 contig_initmem_init(0, end_pfn
);
657 /* Reserve direct mapping */
658 reserve_bootmem_generic(table_start
<< PAGE_SHIFT
,
659 (table_end
- table_start
) << PAGE_SHIFT
);
662 kernel_end
= round_up(__pa_symbol(&_end
),PAGE_SIZE
);
663 reserve_bootmem_generic(HIGH_MEMORY
, kernel_end
- HIGH_MEMORY
);
666 * reserve physical page 0 - it's a special BIOS page on many boxes,
667 * enabling clean reboots, SMP operation, laptop functions.
669 reserve_bootmem_generic(0, PAGE_SIZE
);
671 /* reserve ebda region */
672 reserve_ebda_region();
676 * But first pinch a few for the stack/trampoline stuff
677 * FIXME: Don't need the extra page at 4K, but need to fix
678 * trampoline before removing it. (see the GDT stuff)
680 reserve_bootmem_generic(PAGE_SIZE
, PAGE_SIZE
);
682 /* Reserve SMP trampoline */
683 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE
, PAGE_SIZE
);
686 #ifdef CONFIG_ACPI_SLEEP
688 * Reserve low memory region for sleep support.
690 acpi_reserve_bootmem();
692 #ifdef CONFIG_X86_LOCAL_APIC
694 * Find and reserve possible boot-time SMP configuration:
698 #ifdef CONFIG_BLK_DEV_INITRD
699 if (LOADER_TYPE
&& INITRD_START
) {
700 if (INITRD_START
+ INITRD_SIZE
<= (end_pfn
<< PAGE_SHIFT
)) {
701 reserve_bootmem_generic(INITRD_START
, INITRD_SIZE
);
703 INITRD_START
? INITRD_START
+ PAGE_OFFSET
: 0;
704 initrd_end
= initrd_start
+INITRD_SIZE
;
707 printk(KERN_ERR
"initrd extends beyond end of memory "
708 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
709 (unsigned long)(INITRD_START
+ INITRD_SIZE
),
710 (unsigned long)(end_pfn
<< PAGE_SHIFT
));
716 if (crashk_res
.start
!= crashk_res
.end
) {
717 reserve_bootmem(crashk_res
.start
,
718 crashk_res
.end
- crashk_res
.start
+ 1);
727 * set this early, so we dont allocate cpu0
728 * if MADT list doesnt list BSP first
729 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
731 cpu_set(0, cpu_present_map
);
734 * Read APIC and some other early information from ACPI tables.
741 #ifdef CONFIG_X86_LOCAL_APIC
743 * get boot-time SMP configuration:
745 if (smp_found_config
)
747 init_apic_mappings();
751 * Request address space for all standard RAM and ROM resources
752 * and also for regions reported as reserved by the e820.
755 e820_reserve_resources();
757 request_resource(&iomem_resource
, &video_ram_resource
);
761 /* request I/O space for devices used on all i[345]86 PCs */
762 for (i
= 0; i
< STANDARD_IO_RESOURCES
; i
++)
763 request_resource(&ioport_resource
, &standard_io_resources
[i
]);
768 #ifdef CONFIG_GART_IOMMU
773 #if defined(CONFIG_VGA_CONSOLE)
774 conswitchp
= &vga_con
;
775 #elif defined(CONFIG_DUMMY_CONSOLE)
776 conswitchp
= &dummy_con
;
781 static int __cpuinit
get_model_name(struct cpuinfo_x86
*c
)
785 if (c
->extended_cpuid_level
< 0x80000004)
788 v
= (unsigned int *) c
->x86_model_id
;
789 cpuid(0x80000002, &v
[0], &v
[1], &v
[2], &v
[3]);
790 cpuid(0x80000003, &v
[4], &v
[5], &v
[6], &v
[7]);
791 cpuid(0x80000004, &v
[8], &v
[9], &v
[10], &v
[11]);
792 c
->x86_model_id
[48] = 0;
797 static void __cpuinit
display_cacheinfo(struct cpuinfo_x86
*c
)
799 unsigned int n
, dummy
, eax
, ebx
, ecx
, edx
;
801 n
= c
->extended_cpuid_level
;
803 if (n
>= 0x80000005) {
804 cpuid(0x80000005, &dummy
, &ebx
, &ecx
, &edx
);
805 printk(KERN_INFO
"CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
806 edx
>>24, edx
&0xFF, ecx
>>24, ecx
&0xFF);
807 c
->x86_cache_size
=(ecx
>>24)+(edx
>>24);
808 /* On K8 L1 TLB is inclusive, so don't count it */
812 if (n
>= 0x80000006) {
813 cpuid(0x80000006, &dummy
, &ebx
, &ecx
, &edx
);
814 ecx
= cpuid_ecx(0x80000006);
815 c
->x86_cache_size
= ecx
>> 16;
816 c
->x86_tlbsize
+= ((ebx
>> 16) & 0xfff) + (ebx
& 0xfff);
818 printk(KERN_INFO
"CPU: L2 Cache: %dK (%d bytes/line)\n",
819 c
->x86_cache_size
, ecx
& 0xFF);
823 cpuid(0x80000007, &dummy
, &dummy
, &dummy
, &c
->x86_power
);
824 if (n
>= 0x80000008) {
825 cpuid(0x80000008, &eax
, &dummy
, &dummy
, &dummy
);
826 c
->x86_virt_bits
= (eax
>> 8) & 0xff;
827 c
->x86_phys_bits
= eax
& 0xff;
832 static int nearby_node(int apicid
)
835 for (i
= apicid
- 1; i
>= 0; i
--) {
836 int node
= apicid_to_node
[i
];
837 if (node
!= NUMA_NO_NODE
&& node_online(node
))
840 for (i
= apicid
+ 1; i
< MAX_LOCAL_APIC
; i
++) {
841 int node
= apicid_to_node
[i
];
842 if (node
!= NUMA_NO_NODE
&& node_online(node
))
845 return first_node(node_online_map
); /* Shouldn't happen */
850 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
851 * Assumes number of cores is a power of two.
853 static void __init
amd_detect_cmp(struct cpuinfo_x86
*c
)
856 int cpu
= smp_processor_id();
860 unsigned apicid
= hard_smp_processor_id();
864 while ((1 << bits
) < c
->x86_max_cores
)
867 /* Low order bits define the core id (index of core in socket) */
868 cpu_core_id
[cpu
] = phys_proc_id
[cpu
] & ((1 << bits
)-1);
869 /* Convert the APIC ID into the socket ID */
870 phys_proc_id
[cpu
] = phys_pkg_id(bits
);
873 node
= phys_proc_id
[cpu
];
874 if (apicid_to_node
[apicid
] != NUMA_NO_NODE
)
875 node
= apicid_to_node
[apicid
];
876 if (!node_online(node
)) {
877 /* Two possibilities here:
878 - The CPU is missing memory and no node was created.
879 In that case try picking one from a nearby CPU
880 - The APIC IDs differ from the HyperTransport node IDs
881 which the K8 northbridge parsing fills in.
882 Assume they are all increased by a constant offset,
883 but in the same order as the HT nodeids.
884 If that doesn't result in a usable node fall back to the
885 path for the previous case. */
886 int ht_nodeid
= apicid
- (phys_proc_id
[0] << bits
);
887 if (ht_nodeid
>= 0 &&
888 apicid_to_node
[ht_nodeid
] != NUMA_NO_NODE
)
889 node
= apicid_to_node
[ht_nodeid
];
890 /* Pick a nearby node */
891 if (!node_online(node
))
892 node
= nearby_node(apicid
);
894 numa_set_node(cpu
, node
);
896 printk(KERN_INFO
"CPU %d/%x(%d) -> Node %d -> Core %d\n",
897 cpu
, apicid
, c
->x86_max_cores
, node
, cpu_core_id
[cpu
]);
902 static int __init
init_amd(struct cpuinfo_x86
*c
)
911 * Disable TLB flush filter by setting HWCR.FFDIS on K8
912 * bit 6 of msr C001_0015
914 * Errata 63 for SH-B3 steppings
915 * Errata 122 for all steppings (F+ have it disabled by default)
918 rdmsrl(MSR_K8_HWCR
, value
);
920 wrmsrl(MSR_K8_HWCR
, value
);
924 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
925 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
926 clear_bit(0*32+31, &c
->x86_capability
);
928 /* On C+ stepping K8 rep microcode works well for copy/memset */
929 level
= cpuid_eax(1);
930 if (c
->x86
== 15 && ((level
>= 0x0f48 && level
< 0x0f50) || level
>= 0x0f58))
931 set_bit(X86_FEATURE_REP_GOOD
, &c
->x86_capability
);
933 r
= get_model_name(c
);
937 /* Should distinguish Models here, but this is only
938 a fallback anyways. */
939 strcpy(c
->x86_model_id
, "Hammer");
943 display_cacheinfo(c
);
945 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
946 if (c
->x86_power
& (1<<8))
947 set_bit(X86_FEATURE_CONSTANT_TSC
, &c
->x86_capability
);
949 if (c
->extended_cpuid_level
>= 0x80000008) {
950 c
->x86_max_cores
= (cpuid_ecx(0x80000008) & 0xff) + 1;
958 static void __cpuinit
detect_ht(struct cpuinfo_x86
*c
)
961 u32 eax
, ebx
, ecx
, edx
;
962 int index_msb
, core_bits
;
963 int cpu
= smp_processor_id();
965 cpuid(1, &eax
, &ebx
, &ecx
, &edx
);
968 if (!cpu_has(c
, X86_FEATURE_HT
) || cpu_has(c
, X86_FEATURE_CMP_LEGACY
))
971 smp_num_siblings
= (ebx
& 0xff0000) >> 16;
973 if (smp_num_siblings
== 1) {
974 printk(KERN_INFO
"CPU: Hyper-Threading is disabled\n");
975 } else if (smp_num_siblings
> 1 ) {
977 if (smp_num_siblings
> NR_CPUS
) {
978 printk(KERN_WARNING
"CPU: Unsupported number of the siblings %d", smp_num_siblings
);
979 smp_num_siblings
= 1;
983 index_msb
= get_count_order(smp_num_siblings
);
984 phys_proc_id
[cpu
] = phys_pkg_id(index_msb
);
986 printk(KERN_INFO
"CPU: Physical Processor ID: %d\n",
989 smp_num_siblings
= smp_num_siblings
/ c
->x86_max_cores
;
991 index_msb
= get_count_order(smp_num_siblings
) ;
993 core_bits
= get_count_order(c
->x86_max_cores
);
995 cpu_core_id
[cpu
] = phys_pkg_id(index_msb
) &
996 ((1 << core_bits
) - 1);
998 if (c
->x86_max_cores
> 1)
999 printk(KERN_INFO
"CPU: Processor Core ID: %d\n",
1006 * find out the number of processor cores on the die
1008 static int __cpuinit
intel_num_cpu_cores(struct cpuinfo_x86
*c
)
1012 if (c
->cpuid_level
< 4)
1021 return ((eax
>> 26) + 1);
1026 static void srat_detect_node(void)
1030 int cpu
= smp_processor_id();
1032 /* Don't do the funky fallback heuristics the AMD version employs
1034 node
= apicid_to_node
[hard_smp_processor_id()];
1035 if (node
== NUMA_NO_NODE
)
1037 numa_set_node(cpu
, node
);
1040 printk(KERN_INFO
"CPU %d -> Node %d\n", cpu
, node
);
1044 static void __cpuinit
init_intel(struct cpuinfo_x86
*c
)
1049 init_intel_cacheinfo(c
);
1050 n
= c
->extended_cpuid_level
;
1051 if (n
>= 0x80000008) {
1052 unsigned eax
= cpuid_eax(0x80000008);
1053 c
->x86_virt_bits
= (eax
>> 8) & 0xff;
1054 c
->x86_phys_bits
= eax
& 0xff;
1055 /* CPUID workaround for Intel 0F34 CPU */
1056 if (c
->x86_vendor
== X86_VENDOR_INTEL
&&
1057 c
->x86
== 0xF && c
->x86_model
== 0x3 &&
1059 c
->x86_phys_bits
= 36;
1063 c
->x86_cache_alignment
= c
->x86_clflush_size
* 2;
1064 if ((c
->x86
== 0xf && c
->x86_model
>= 0x03) ||
1065 (c
->x86
== 0x6 && c
->x86_model
>= 0x0e))
1066 set_bit(X86_FEATURE_CONSTANT_TSC
, &c
->x86_capability
);
1067 set_bit(X86_FEATURE_SYNC_RDTSC
, &c
->x86_capability
);
1068 c
->x86_max_cores
= intel_num_cpu_cores(c
);
1073 static void __cpuinit
get_cpu_vendor(struct cpuinfo_x86
*c
)
1075 char *v
= c
->x86_vendor_id
;
1077 if (!strcmp(v
, "AuthenticAMD"))
1078 c
->x86_vendor
= X86_VENDOR_AMD
;
1079 else if (!strcmp(v
, "GenuineIntel"))
1080 c
->x86_vendor
= X86_VENDOR_INTEL
;
1082 c
->x86_vendor
= X86_VENDOR_UNKNOWN
;
1085 struct cpu_model_info
{
1088 char *model_names
[16];
1091 /* Do some early cpuid on the boot CPU to get some parameter that are
1092 needed before check_bugs. Everything advanced is in identify_cpu
1094 void __cpuinit
early_identify_cpu(struct cpuinfo_x86
*c
)
1098 c
->loops_per_jiffy
= loops_per_jiffy
;
1099 c
->x86_cache_size
= -1;
1100 c
->x86_vendor
= X86_VENDOR_UNKNOWN
;
1101 c
->x86_model
= c
->x86_mask
= 0; /* So far unknown... */
1102 c
->x86_vendor_id
[0] = '\0'; /* Unset */
1103 c
->x86_model_id
[0] = '\0'; /* Unset */
1104 c
->x86_clflush_size
= 64;
1105 c
->x86_cache_alignment
= c
->x86_clflush_size
;
1106 c
->x86_max_cores
= 1;
1107 c
->extended_cpuid_level
= 0;
1108 memset(&c
->x86_capability
, 0, sizeof c
->x86_capability
);
1110 /* Get vendor name */
1111 cpuid(0x00000000, (unsigned int *)&c
->cpuid_level
,
1112 (unsigned int *)&c
->x86_vendor_id
[0],
1113 (unsigned int *)&c
->x86_vendor_id
[8],
1114 (unsigned int *)&c
->x86_vendor_id
[4]);
1118 /* Initialize the standard set of capabilities */
1119 /* Note that the vendor-specific code below might override */
1121 /* Intel-defined flags: level 0x00000001 */
1122 if (c
->cpuid_level
>= 0x00000001) {
1124 cpuid(0x00000001, &tfms
, &misc
, &c
->x86_capability
[4],
1125 &c
->x86_capability
[0]);
1126 c
->x86
= (tfms
>> 8) & 0xf;
1127 c
->x86_model
= (tfms
>> 4) & 0xf;
1128 c
->x86_mask
= tfms
& 0xf;
1130 c
->x86
+= (tfms
>> 20) & 0xff;
1132 c
->x86_model
+= ((tfms
>> 16) & 0xF) << 4;
1133 if (c
->x86_capability
[0] & (1<<19))
1134 c
->x86_clflush_size
= ((misc
>> 8) & 0xff) * 8;
1136 /* Have CPUID level 0 only - unheard of */
1141 phys_proc_id
[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
1146 * This does the hard work of actually picking apart the CPU stuff...
1148 void __cpuinit
identify_cpu(struct cpuinfo_x86
*c
)
1153 early_identify_cpu(c
);
1155 /* AMD-defined flags: level 0x80000001 */
1156 xlvl
= cpuid_eax(0x80000000);
1157 c
->extended_cpuid_level
= xlvl
;
1158 if ((xlvl
& 0xffff0000) == 0x80000000) {
1159 if (xlvl
>= 0x80000001) {
1160 c
->x86_capability
[1] = cpuid_edx(0x80000001);
1161 c
->x86_capability
[6] = cpuid_ecx(0x80000001);
1163 if (xlvl
>= 0x80000004)
1164 get_model_name(c
); /* Default name */
1167 /* Transmeta-defined flags: level 0x80860001 */
1168 xlvl
= cpuid_eax(0x80860000);
1169 if ((xlvl
& 0xffff0000) == 0x80860000) {
1170 /* Don't set x86_cpuid_level here for now to not confuse. */
1171 if (xlvl
>= 0x80860001)
1172 c
->x86_capability
[2] = cpuid_edx(0x80860001);
1175 c
->apicid
= phys_pkg_id(0);
1178 * Vendor-specific initialization. In this section we
1179 * canonicalize the feature flags, meaning if there are
1180 * features a certain CPU supports which CPUID doesn't
1181 * tell us, CPUID claiming incorrect flags, or other bugs,
1182 * we handle them here.
1184 * At the end of this section, c->x86_capability better
1185 * indicate the features this CPU genuinely supports!
1187 switch (c
->x86_vendor
) {
1188 case X86_VENDOR_AMD
:
1192 case X86_VENDOR_INTEL
:
1196 case X86_VENDOR_UNKNOWN
:
1198 display_cacheinfo(c
);
1202 select_idle_routine(c
);
1206 * On SMP, boot_cpu_data holds the common feature set between
1207 * all CPUs; so make sure that we indicate which features are
1208 * common between the CPUs. The first time this routine gets
1209 * executed, c == &boot_cpu_data.
1211 if (c
!= &boot_cpu_data
) {
1212 /* AND the already accumulated flags with these */
1213 for (i
= 0 ; i
< NCAPINTS
; i
++)
1214 boot_cpu_data
.x86_capability
[i
] &= c
->x86_capability
[i
];
1217 #ifdef CONFIG_X86_MCE
1220 if (c
== &boot_cpu_data
)
1225 numa_add_cpu(smp_processor_id());
1230 void __cpuinit
print_cpu_info(struct cpuinfo_x86
*c
)
1232 if (c
->x86_model_id
[0])
1233 printk("%s", c
->x86_model_id
);
1235 if (c
->x86_mask
|| c
->cpuid_level
>= 0)
1236 printk(" stepping %02x\n", c
->x86_mask
);
1242 * Get CPU information for use by the procfs.
1245 static int show_cpuinfo(struct seq_file
*m
, void *v
)
1247 struct cpuinfo_x86
*c
= v
;
1250 * These flag bits must match the definitions in <asm/cpufeature.h>.
1251 * NULL means this bit is undefined or reserved; either way it doesn't
1252 * have meaning as far as Linux is concerned. Note that it's important
1253 * to realize there is a difference between this table and CPUID -- if
1254 * applications want to get the raw CPUID data, they should access
1255 * /dev/cpu/<cpu_nr>/cpuid instead.
1257 static char *x86_cap_flags
[] = {
1259 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1260 "cx8", "apic", NULL
, "sep", "mtrr", "pge", "mca", "cmov",
1261 "pat", "pse36", "pn", "clflush", NULL
, "dts", "acpi", "mmx",
1262 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL
,
1265 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1266 NULL
, NULL
, NULL
, "syscall", NULL
, NULL
, NULL
, NULL
,
1267 NULL
, NULL
, NULL
, NULL
, "nx", NULL
, "mmxext", NULL
,
1268 NULL
, "fxsr_opt", "rdtscp", NULL
, NULL
, "lm", "3dnowext", "3dnow",
1270 /* Transmeta-defined */
1271 "recovery", "longrun", NULL
, "lrti", NULL
, NULL
, NULL
, NULL
,
1272 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1273 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1274 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1276 /* Other (Linux-defined) */
1277 "cxmmx", NULL
, "cyrix_arr", "centaur_mcr", NULL
,
1278 "constant_tsc", NULL
, NULL
,
1279 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1280 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1281 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1283 /* Intel-defined (#2) */
1284 "pni", NULL
, NULL
, "monitor", "ds_cpl", "vmx", "smx", "est",
1285 "tm2", NULL
, "cid", NULL
, NULL
, "cx16", "xtpr", NULL
,
1286 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1287 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1289 /* VIA/Cyrix/Centaur-defined */
1290 NULL
, NULL
, "rng", "rng_en", NULL
, NULL
, "ace", "ace_en",
1291 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1292 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1293 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1295 /* AMD-defined (#2) */
1296 "lahf_lm", "cmp_legacy", "svm", NULL
, "cr8_legacy", NULL
, NULL
, NULL
,
1297 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1298 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1299 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1301 static char *x86_power_flags
[] = {
1302 "ts", /* temperature sensor */
1303 "fid", /* frequency id control */
1304 "vid", /* voltage id control */
1305 "ttp", /* thermal trip */
1309 /* nothing */ /* constant_tsc - moved to flags */
1314 if (!cpu_online(c
-cpu_data
))
1318 seq_printf(m
,"processor\t: %u\n"
1320 "cpu family\t: %d\n"
1322 "model name\t: %s\n",
1323 (unsigned)(c
-cpu_data
),
1324 c
->x86_vendor_id
[0] ? c
->x86_vendor_id
: "unknown",
1327 c
->x86_model_id
[0] ? c
->x86_model_id
: "unknown");
1329 if (c
->x86_mask
|| c
->cpuid_level
>= 0)
1330 seq_printf(m
, "stepping\t: %d\n", c
->x86_mask
);
1332 seq_printf(m
, "stepping\t: unknown\n");
1334 if (cpu_has(c
,X86_FEATURE_TSC
)) {
1335 unsigned int freq
= cpufreq_quick_get((unsigned)(c
-cpu_data
));
1338 seq_printf(m
, "cpu MHz\t\t: %u.%03u\n",
1339 freq
/ 1000, (freq
% 1000));
1343 if (c
->x86_cache_size
>= 0)
1344 seq_printf(m
, "cache size\t: %d KB\n", c
->x86_cache_size
);
1347 if (smp_num_siblings
* c
->x86_max_cores
> 1) {
1348 int cpu
= c
- cpu_data
;
1349 seq_printf(m
, "physical id\t: %d\n", phys_proc_id
[cpu
]);
1350 seq_printf(m
, "siblings\t: %d\n", cpus_weight(cpu_core_map
[cpu
]));
1351 seq_printf(m
, "core id\t\t: %d\n", cpu_core_id
[cpu
]);
1352 seq_printf(m
, "cpu cores\t: %d\n", c
->booted_cores
);
1358 "fpu_exception\t: yes\n"
1359 "cpuid level\t: %d\n"
1366 for ( i
= 0 ; i
< 32*NCAPINTS
; i
++ )
1367 if (cpu_has(c
, i
) && x86_cap_flags
[i
] != NULL
)
1368 seq_printf(m
, " %s", x86_cap_flags
[i
]);
1371 seq_printf(m
, "\nbogomips\t: %lu.%02lu\n",
1372 c
->loops_per_jiffy
/(500000/HZ
),
1373 (c
->loops_per_jiffy
/(5000/HZ
)) % 100);
1375 if (c
->x86_tlbsize
> 0)
1376 seq_printf(m
, "TLB size\t: %d 4K pages\n", c
->x86_tlbsize
);
1377 seq_printf(m
, "clflush size\t: %d\n", c
->x86_clflush_size
);
1378 seq_printf(m
, "cache_alignment\t: %d\n", c
->x86_cache_alignment
);
1380 seq_printf(m
, "address sizes\t: %u bits physical, %u bits virtual\n",
1381 c
->x86_phys_bits
, c
->x86_virt_bits
);
1383 seq_printf(m
, "power management:");
1386 for (i
= 0; i
< 32; i
++)
1387 if (c
->x86_power
& (1 << i
)) {
1388 if (i
< ARRAY_SIZE(x86_power_flags
) &&
1390 seq_printf(m
, "%s%s",
1391 x86_power_flags
[i
][0]?" ":"",
1392 x86_power_flags
[i
]);
1394 seq_printf(m
, " [%d]", i
);
1398 seq_printf(m
, "\n\n");
1403 static void *c_start(struct seq_file
*m
, loff_t
*pos
)
1405 return *pos
< NR_CPUS
? cpu_data
+ *pos
: NULL
;
1408 static void *c_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
1411 return c_start(m
, pos
);
1414 static void c_stop(struct seq_file
*m
, void *v
)
1418 struct seq_operations cpuinfo_op
= {
1422 .show
= show_cpuinfo
,