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1 /*
2 * X86-64 specific CPU setup.
3 * Copyright (C) 1995 Linus Torvalds
4 * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
5 * See setup.c for older changelog.
6 * $Id: setup64.c,v 1.12 2002/03/21 10:09:17 ak Exp $
7 */
8 #include <linux/config.h>
9 #include <linux/init.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
12 #include <linux/string.h>
13 #include <linux/bootmem.h>
14 #include <linux/bitops.h>
15 #include <linux/module.h>
16 #include <asm/bootsetup.h>
17 #include <asm/pda.h>
18 #include <asm/pgtable.h>
19 #include <asm/processor.h>
20 #include <asm/desc.h>
21 #include <asm/atomic.h>
22 #include <asm/mmu_context.h>
23 #include <asm/smp.h>
24 #include <asm/i387.h>
25 #include <asm/percpu.h>
26 #include <asm/proto.h>
27 #include <asm/sections.h>
28
29 char x86_boot_params[BOOT_PARAM_SIZE] __initdata = {0,};
30
31 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
32
33 struct x8664_pda cpu_pda[NR_CPUS] __cacheline_aligned;
34
35 struct desc_ptr idt_descr = { 256 * 16, (unsigned long) idt_table };
36
37 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
38
39 unsigned long __supported_pte_mask __read_mostly = ~0UL;
40 static int do_not_nx __initdata = 0;
41
42 /* noexec=on|off
43 Control non executable mappings for 64bit processes.
44
45 on Enable(default)
46 off Disable
47 */
48 int __init nonx_setup(char *str)
49 {
50 if (!strncmp(str, "on", 2)) {
51 __supported_pte_mask |= _PAGE_NX;
52 do_not_nx = 0;
53 } else if (!strncmp(str, "off", 3)) {
54 do_not_nx = 1;
55 __supported_pte_mask &= ~_PAGE_NX;
56 }
57 return 0;
58 }
59 __setup("noexec=", nonx_setup); /* parsed early actually */
60
61 int force_personality32 = READ_IMPLIES_EXEC;
62
63 /* noexec32=on|off
64 Control non executable heap for 32bit processes.
65 To control the stack too use noexec=off
66
67 on PROT_READ does not imply PROT_EXEC for 32bit processes
68 off PROT_READ implies PROT_EXEC (default)
69 */
70 static int __init nonx32_setup(char *str)
71 {
72 if (!strcmp(str, "on"))
73 force_personality32 &= ~READ_IMPLIES_EXEC;
74 else if (!strcmp(str, "off"))
75 force_personality32 |= READ_IMPLIES_EXEC;
76 return 0;
77 }
78 __setup("noexec32=", nonx32_setup);
79
80 /*
81 * Great future plan:
82 * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
83 * Always point %gs to its beginning
84 */
85 void __init setup_per_cpu_areas(void)
86 {
87 int i;
88 unsigned long size;
89
90 #ifdef CONFIG_HOTPLUG_CPU
91 prefill_possible_map();
92 #endif
93
94 /* Copy section for each CPU (we discard the original) */
95 size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
96 #ifdef CONFIG_MODULES
97 if (size < PERCPU_ENOUGH_ROOM)
98 size = PERCPU_ENOUGH_ROOM;
99 #endif
100
101 for_each_cpu_mask (i, cpu_possible_map) {
102 char *ptr;
103
104 if (!NODE_DATA(cpu_to_node(i))) {
105 printk("cpu with no node %d, num_online_nodes %d\n",
106 i, num_online_nodes());
107 ptr = alloc_bootmem(size);
108 } else {
109 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
110 }
111 if (!ptr)
112 panic("Cannot allocate cpu data for CPU %d\n", i);
113 cpu_pda[i].data_offset = ptr - __per_cpu_start;
114 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
115 }
116 }
117
118 void pda_init(int cpu)
119 {
120 struct x8664_pda *pda = &cpu_pda[cpu];
121
122 /* Setup up data that may be needed in __get_free_pages early */
123 asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
124 wrmsrl(MSR_GS_BASE, cpu_pda + cpu);
125
126 pda->cpunumber = cpu;
127 pda->irqcount = -1;
128 pda->kernelstack =
129 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
130 pda->active_mm = &init_mm;
131 pda->mmu_state = 0;
132
133 if (cpu == 0) {
134 /* others are initialized in smpboot.c */
135 pda->pcurrent = &init_task;
136 pda->irqstackptr = boot_cpu_stack;
137 } else {
138 pda->irqstackptr = (char *)
139 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
140 if (!pda->irqstackptr)
141 panic("cannot allocate irqstack for cpu %d", cpu);
142 }
143
144
145 pda->irqstackptr += IRQSTACKSIZE-64;
146 }
147
148 char boot_exception_stacks[(N_EXCEPTION_STACKS - 2) * EXCEPTION_STKSZ + DEBUG_STKSZ]
149 __attribute__((section(".bss.page_aligned")));
150
151 /* May not be marked __init: used by software suspend */
152 void syscall_init(void)
153 {
154 /*
155 * LSTAR and STAR live in a bit strange symbiosis.
156 * They both write to the same internal register. STAR allows to set CS/DS
157 * but only a 32bit target. LSTAR sets the 64bit rip.
158 */
159 wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
160 wrmsrl(MSR_LSTAR, system_call);
161
162 #ifdef CONFIG_IA32_EMULATION
163 syscall32_cpu_init ();
164 #endif
165
166 /* Flags to clear on syscall */
167 wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
168 }
169
170 void __cpuinit check_efer(void)
171 {
172 unsigned long efer;
173
174 rdmsrl(MSR_EFER, efer);
175 if (!(efer & EFER_NX) || do_not_nx) {
176 __supported_pte_mask &= ~_PAGE_NX;
177 }
178 }
179
180 /*
181 * cpu_init() initializes state that is per-CPU. Some data is already
182 * initialized (naturally) in the bootstrap process, such as the GDT
183 * and IDT. We reload them nevertheless, this function acts as a
184 * 'CPU state barrier', nothing should get across.
185 * A lot of state is already set up in PDA init.
186 */
187 void __cpuinit cpu_init (void)
188 {
189 int cpu = stack_smp_processor_id();
190 struct tss_struct *t = &per_cpu(init_tss, cpu);
191 unsigned long v;
192 char *estacks = NULL;
193 struct task_struct *me;
194 int i;
195
196 /* CPU 0 is initialised in head64.c */
197 if (cpu != 0) {
198 pda_init(cpu);
199 zap_low_mappings(cpu);
200 } else
201 estacks = boot_exception_stacks;
202
203 me = current;
204
205 if (cpu_test_and_set(cpu, cpu_initialized))
206 panic("CPU#%d already initialized!\n", cpu);
207
208 printk("Initializing CPU#%d\n", cpu);
209
210 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
211
212 /*
213 * Initialize the per-CPU GDT with the boot GDT,
214 * and set up the GDT descriptor:
215 */
216 if (cpu)
217 memcpy(cpu_gdt(cpu), cpu_gdt_table, GDT_SIZE);
218
219 cpu_gdt_descr[cpu].size = GDT_SIZE;
220 asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
221 asm volatile("lidt %0" :: "m" (idt_descr));
222
223 memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
224 syscall_init();
225
226 wrmsrl(MSR_FS_BASE, 0);
227 wrmsrl(MSR_KERNEL_GS_BASE, 0);
228 barrier();
229
230 check_efer();
231
232 /*
233 * set up and load the per-CPU TSS
234 */
235 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
236 if (cpu) {
237 static const unsigned int order[N_EXCEPTION_STACKS] = {
238 [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
239 [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
240 };
241
242 estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
243 if (!estacks)
244 panic("Cannot allocate exception stack %ld %d\n",
245 v, cpu);
246 }
247 switch (v + 1) {
248 #if DEBUG_STKSZ > EXCEPTION_STKSZ
249 case DEBUG_STACK:
250 cpu_pda[cpu].debugstack = (unsigned long)estacks;
251 estacks += DEBUG_STKSZ;
252 break;
253 #endif
254 default:
255 estacks += EXCEPTION_STKSZ;
256 break;
257 }
258 t->ist[v] = (unsigned long)estacks;
259 }
260
261 t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
262 /*
263 * <= is required because the CPU will access up to
264 * 8 bits beyond the end of the IO permission bitmap.
265 */
266 for (i = 0; i <= IO_BITMAP_LONGS; i++)
267 t->io_bitmap[i] = ~0UL;
268
269 atomic_inc(&init_mm.mm_count);
270 me->active_mm = &init_mm;
271 if (me->mm)
272 BUG();
273 enter_lazy_tlb(&init_mm, me);
274
275 set_tss_desc(cpu, t);
276 load_TR_desc();
277 load_LDT(&init_mm.context);
278
279 /*
280 * Clear all 6 debug registers:
281 */
282
283 set_debug(0UL, 0);
284 set_debug(0UL, 1);
285 set_debug(0UL, 2);
286 set_debug(0UL, 3);
287 set_debug(0UL, 6);
288 set_debug(0UL, 7);
289
290 fpu_init();
291 }