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1 /*
2 * linux/arch/x86-64/kernel/time.c
3 *
4 * "High Precision Event Timer" based timekeeping.
5 *
6 * Copyright (c) 1991,1992,1995 Linus Torvalds
7 * Copyright (c) 1994 Alan Modra
8 * Copyright (c) 1995 Markus Kuhn
9 * Copyright (c) 1996 Ingo Molnar
10 * Copyright (c) 1998 Andrea Arcangeli
11 * Copyright (c) 2002,2006 Vojtech Pavlik
12 * Copyright (c) 2003 Andi Kleen
13 * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/interrupt.h>
19 #include <linux/init.h>
20 #include <linux/mc146818rtc.h>
21 #include <linux/time.h>
22 #include <linux/ioport.h>
23 #include <linux/module.h>
24 #include <linux/device.h>
25 #include <linux/sysdev.h>
26 #include <linux/bcd.h>
27 #include <linux/kallsyms.h>
28 #include <linux/acpi.h>
29 #ifdef CONFIG_ACPI
30 #include <acpi/achware.h> /* for PM timer frequency */
31 #include <acpi/acpi_bus.h>
32 #endif
33 #include <asm/8253pit.h>
34 #include <asm/pgtable.h>
35 #include <asm/vsyscall.h>
36 #include <asm/timex.h>
37 #include <asm/proto.h>
38 #include <asm/hpet.h>
39 #include <asm/sections.h>
40 #include <linux/cpufreq.h>
41 #include <linux/hpet.h>
42 #ifdef CONFIG_X86_LOCAL_APIC
43 #include <asm/apic.h>
44 #endif
45
46 #ifdef CONFIG_CPU_FREQ
47 static void cpufreq_delayed_get(void);
48 #endif
49 extern void i8254_timer_resume(void);
50 extern int using_apic_timer;
51
52 static char *time_init_gtod(void);
53
54 DEFINE_SPINLOCK(rtc_lock);
55 EXPORT_SYMBOL(rtc_lock);
56 DEFINE_SPINLOCK(i8253_lock);
57
58 int nohpet __initdata = 0;
59 static int notsc __initdata = 0;
60
61 #define USEC_PER_TICK (USEC_PER_SEC / HZ)
62 #define NSEC_PER_TICK (NSEC_PER_SEC / HZ)
63 #define FSEC_PER_TICK (FSEC_PER_SEC / HZ)
64
65 #define NS_SCALE 10 /* 2^10, carefully chosen */
66 #define US_SCALE 32 /* 2^32, arbitralrily chosen */
67
68 unsigned int cpu_khz; /* TSC clocks / usec, not used here */
69 EXPORT_SYMBOL(cpu_khz);
70 static unsigned long hpet_period; /* fsecs / HPET clock */
71 unsigned long hpet_tick; /* HPET clocks / interrupt */
72 int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
73 unsigned long vxtime_hz = PIT_TICK_RATE;
74 int report_lost_ticks; /* command line option */
75 unsigned long long monotonic_base;
76
77 struct vxtime_data __vxtime __section_vxtime; /* for vsyscalls */
78
79 volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
80 unsigned long __wall_jiffies __section_wall_jiffies = INITIAL_JIFFIES;
81 struct timespec __xtime __section_xtime;
82 struct timezone __sys_tz __section_sys_tz;
83
84 /*
85 * do_gettimeoffset() returns microseconds since last timer interrupt was
86 * triggered by hardware. A memory read of HPET is slower than a register read
87 * of TSC, but much more reliable. It's also synchronized to the timer
88 * interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a
89 * timer interrupt has happened already, but vxtime.trigger wasn't updated yet.
90 * This is not a problem, because jiffies hasn't updated either. They are bound
91 * together by xtime_lock.
92 */
93
94 static inline unsigned int do_gettimeoffset_tsc(void)
95 {
96 unsigned long t;
97 unsigned long x;
98 t = get_cycles_sync();
99 if (t < vxtime.last_tsc)
100 t = vxtime.last_tsc; /* hack */
101 x = ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> US_SCALE;
102 return x;
103 }
104
105 static inline unsigned int do_gettimeoffset_hpet(void)
106 {
107 /* cap counter read to one tick to avoid inconsistencies */
108 unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last;
109 return (min(counter,hpet_tick) * vxtime.quot) >> US_SCALE;
110 }
111
112 unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
113
114 /*
115 * This version of gettimeofday() has microsecond resolution and better than
116 * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
117 * MHz) HPET timer.
118 */
119
120 void do_gettimeofday(struct timeval *tv)
121 {
122 unsigned long seq, t;
123 unsigned int sec, usec;
124
125 do {
126 seq = read_seqbegin(&xtime_lock);
127
128 sec = xtime.tv_sec;
129 usec = xtime.tv_nsec / NSEC_PER_USEC;
130
131 /* i386 does some correction here to keep the clock
132 monotonous even when ntpd is fixing drift.
133 But they didn't work for me, there is a non monotonic
134 clock anyways with ntp.
135 I dropped all corrections now until a real solution can
136 be found. Note when you fix it here you need to do the same
137 in arch/x86_64/kernel/vsyscall.c and export all needed
138 variables in vmlinux.lds. -AK */
139
140 t = (jiffies - wall_jiffies) * USEC_PER_TICK +
141 do_gettimeoffset();
142 usec += t;
143
144 } while (read_seqretry(&xtime_lock, seq));
145
146 tv->tv_sec = sec + usec / USEC_PER_SEC;
147 tv->tv_usec = usec % USEC_PER_SEC;
148 }
149
150 EXPORT_SYMBOL(do_gettimeofday);
151
152 /*
153 * settimeofday() first undoes the correction that gettimeofday would do
154 * on the time, and then saves it. This is ugly, but has been like this for
155 * ages already.
156 */
157
158 int do_settimeofday(struct timespec *tv)
159 {
160 time_t wtm_sec, sec = tv->tv_sec;
161 long wtm_nsec, nsec = tv->tv_nsec;
162
163 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
164 return -EINVAL;
165
166 write_seqlock_irq(&xtime_lock);
167
168 nsec -= do_gettimeoffset() * NSEC_PER_USEC +
169 (jiffies - wall_jiffies) * NSEC_PER_TICK;
170
171 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
172 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
173
174 set_normalized_timespec(&xtime, sec, nsec);
175 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
176
177 ntp_clear();
178
179 write_sequnlock_irq(&xtime_lock);
180 clock_was_set();
181 return 0;
182 }
183
184 EXPORT_SYMBOL(do_settimeofday);
185
186 unsigned long profile_pc(struct pt_regs *regs)
187 {
188 unsigned long pc = instruction_pointer(regs);
189
190 /* Assume the lock function has either no stack frame or only a single
191 word. This checks if the address on the stack looks like a kernel
192 text address.
193 There is a small window for false hits, but in that case the tick
194 is just accounted to the spinlock function.
195 Better would be to write these functions in assembler again
196 and check exactly. */
197 if (!user_mode(regs) && in_lock_functions(pc)) {
198 char *v = *(char **)regs->rsp;
199 if ((v >= _stext && v <= _etext) ||
200 (v >= _sinittext && v <= _einittext) ||
201 (v >= (char *)MODULES_VADDR && v <= (char *)MODULES_END))
202 return (unsigned long)v;
203 return ((unsigned long *)regs->rsp)[1];
204 }
205 return pc;
206 }
207 EXPORT_SYMBOL(profile_pc);
208
209 /*
210 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
211 * ms after the second nowtime has started, because when nowtime is written
212 * into the registers of the CMOS clock, it will jump to the next second
213 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
214 * sheet for details.
215 */
216
217 static void set_rtc_mmss(unsigned long nowtime)
218 {
219 int real_seconds, real_minutes, cmos_minutes;
220 unsigned char control, freq_select;
221
222 /*
223 * IRQs are disabled when we're called from the timer interrupt,
224 * no need for spin_lock_irqsave()
225 */
226
227 spin_lock(&rtc_lock);
228
229 /*
230 * Tell the clock it's being set and stop it.
231 */
232
233 control = CMOS_READ(RTC_CONTROL);
234 CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
235
236 freq_select = CMOS_READ(RTC_FREQ_SELECT);
237 CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
238
239 cmos_minutes = CMOS_READ(RTC_MINUTES);
240 BCD_TO_BIN(cmos_minutes);
241
242 /*
243 * since we're only adjusting minutes and seconds, don't interfere with hour
244 * overflow. This avoids messing with unknown time zones but requires your RTC
245 * not to be off by more than 15 minutes. Since we're calling it only when
246 * our clock is externally synchronized using NTP, this shouldn't be a problem.
247 */
248
249 real_seconds = nowtime % 60;
250 real_minutes = nowtime / 60;
251 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
252 real_minutes += 30; /* correct for half hour time zone */
253 real_minutes %= 60;
254
255 if (abs(real_minutes - cmos_minutes) >= 30) {
256 printk(KERN_WARNING "time.c: can't update CMOS clock "
257 "from %d to %d\n", cmos_minutes, real_minutes);
258 } else {
259 BIN_TO_BCD(real_seconds);
260 BIN_TO_BCD(real_minutes);
261 CMOS_WRITE(real_seconds, RTC_SECONDS);
262 CMOS_WRITE(real_minutes, RTC_MINUTES);
263 }
264
265 /*
266 * The following flags have to be released exactly in this order, otherwise the
267 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
268 * not reset the oscillator and will not update precisely 500 ms later. You
269 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
270 * believes data sheets anyway ... -- Markus Kuhn
271 */
272
273 CMOS_WRITE(control, RTC_CONTROL);
274 CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
275
276 spin_unlock(&rtc_lock);
277 }
278
279
280 /* monotonic_clock(): returns # of nanoseconds passed since time_init()
281 * Note: This function is required to return accurate
282 * time even in the absence of multiple timer ticks.
283 */
284 unsigned long long monotonic_clock(void)
285 {
286 unsigned long seq;
287 u32 last_offset, this_offset, offset;
288 unsigned long long base;
289
290 if (vxtime.mode == VXTIME_HPET) {
291 do {
292 seq = read_seqbegin(&xtime_lock);
293
294 last_offset = vxtime.last;
295 base = monotonic_base;
296 this_offset = hpet_readl(HPET_COUNTER);
297 } while (read_seqretry(&xtime_lock, seq));
298 offset = (this_offset - last_offset);
299 offset *= NSEC_PER_TICK / hpet_tick;
300 } else {
301 do {
302 seq = read_seqbegin(&xtime_lock);
303
304 last_offset = vxtime.last_tsc;
305 base = monotonic_base;
306 } while (read_seqretry(&xtime_lock, seq));
307 this_offset = get_cycles_sync();
308 /* FIXME: 1000 or 1000000? */
309 offset = (this_offset - last_offset)*1000 / cpu_khz;
310 }
311 return base + offset;
312 }
313 EXPORT_SYMBOL(monotonic_clock);
314
315 static noinline void handle_lost_ticks(int lost, struct pt_regs *regs)
316 {
317 static long lost_count;
318 static int warned;
319 if (report_lost_ticks) {
320 printk(KERN_WARNING "time.c: Lost %d timer tick(s)! ", lost);
321 print_symbol("rip %s)\n", regs->rip);
322 }
323
324 if (lost_count == 1000 && !warned) {
325 printk(KERN_WARNING "warning: many lost ticks.\n"
326 KERN_WARNING "Your time source seems to be instable or "
327 "some driver is hogging interupts\n");
328 print_symbol("rip %s\n", regs->rip);
329 if (vxtime.mode == VXTIME_TSC && vxtime.hpet_address) {
330 printk(KERN_WARNING "Falling back to HPET\n");
331 if (hpet_use_timer)
332 vxtime.last = hpet_readl(HPET_T0_CMP) -
333 hpet_tick;
334 else
335 vxtime.last = hpet_readl(HPET_COUNTER);
336 vxtime.mode = VXTIME_HPET;
337 do_gettimeoffset = do_gettimeoffset_hpet;
338 }
339 /* else should fall back to PIT, but code missing. */
340 warned = 1;
341 } else
342 lost_count++;
343
344 #ifdef CONFIG_CPU_FREQ
345 /* In some cases the CPU can change frequency without us noticing
346 Give cpufreq a change to catch up. */
347 if ((lost_count+1) % 25 == 0)
348 cpufreq_delayed_get();
349 #endif
350 }
351
352 void main_timer_handler(struct pt_regs *regs)
353 {
354 static unsigned long rtc_update = 0;
355 unsigned long tsc;
356 int delay = 0, offset = 0, lost = 0;
357
358 /*
359 * Here we are in the timer irq handler. We have irqs locally disabled (so we
360 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
361 * on the other CPU, so we need a lock. We also need to lock the vsyscall
362 * variables, because both do_timer() and us change them -arca+vojtech
363 */
364
365 write_seqlock(&xtime_lock);
366
367 if (vxtime.hpet_address)
368 offset = hpet_readl(HPET_COUNTER);
369
370 if (hpet_use_timer) {
371 /* if we're using the hpet timer functionality,
372 * we can more accurately know the counter value
373 * when the timer interrupt occured.
374 */
375 offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
376 delay = hpet_readl(HPET_COUNTER) - offset;
377 } else if (!pmtmr_ioport) {
378 spin_lock(&i8253_lock);
379 outb_p(0x00, 0x43);
380 delay = inb_p(0x40);
381 delay |= inb(0x40) << 8;
382 spin_unlock(&i8253_lock);
383 delay = LATCH - 1 - delay;
384 }
385
386 tsc = get_cycles_sync();
387
388 if (vxtime.mode == VXTIME_HPET) {
389 if (offset - vxtime.last > hpet_tick) {
390 lost = (offset - vxtime.last) / hpet_tick - 1;
391 }
392
393 monotonic_base +=
394 (offset - vxtime.last) * NSEC_PER_TICK / hpet_tick;
395
396 vxtime.last = offset;
397 #ifdef CONFIG_X86_PM_TIMER
398 } else if (vxtime.mode == VXTIME_PMTMR) {
399 lost = pmtimer_mark_offset();
400 #endif
401 } else {
402 offset = (((tsc - vxtime.last_tsc) *
403 vxtime.tsc_quot) >> US_SCALE) - USEC_PER_TICK;
404
405 if (offset < 0)
406 offset = 0;
407
408 if (offset > USEC_PER_TICK) {
409 lost = offset / USEC_PER_TICK;
410 offset %= USEC_PER_TICK;
411 }
412
413 /* FIXME: 1000 or 1000000? */
414 monotonic_base += (tsc - vxtime.last_tsc) * 1000000 / cpu_khz;
415
416 vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
417
418 if ((((tsc - vxtime.last_tsc) *
419 vxtime.tsc_quot) >> US_SCALE) < offset)
420 vxtime.last_tsc = tsc -
421 (((long) offset << US_SCALE) / vxtime.tsc_quot) - 1;
422 }
423
424 if (lost > 0) {
425 handle_lost_ticks(lost, regs);
426 jiffies += lost;
427 }
428
429 /*
430 * Do the timer stuff.
431 */
432
433 do_timer(regs);
434 #ifndef CONFIG_SMP
435 update_process_times(user_mode(regs));
436 #endif
437
438 /*
439 * In the SMP case we use the local APIC timer interrupt to do the profiling,
440 * except when we simulate SMP mode on a uniprocessor system, in that case we
441 * have to call the local interrupt handler.
442 */
443
444 #ifndef CONFIG_X86_LOCAL_APIC
445 profile_tick(CPU_PROFILING, regs);
446 #else
447 if (!using_apic_timer)
448 smp_local_timer_interrupt(regs);
449 #endif
450
451 /*
452 * If we have an externally synchronized Linux clock, then update CMOS clock
453 * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
454 * closest to exactly 500 ms before the next second. If the update fails, we
455 * don't care, as it'll be updated on the next turn, and the problem (time way
456 * off) isn't likely to go away much sooner anyway.
457 */
458
459 if (ntp_synced() && xtime.tv_sec > rtc_update &&
460 abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) {
461 set_rtc_mmss(xtime.tv_sec);
462 rtc_update = xtime.tv_sec + 660;
463 }
464
465 write_sequnlock(&xtime_lock);
466 }
467
468 static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
469 {
470 if (apic_runs_main_timer > 1)
471 return IRQ_HANDLED;
472 main_timer_handler(regs);
473 #ifdef CONFIG_X86_LOCAL_APIC
474 if (using_apic_timer)
475 smp_send_timer_broadcast_ipi();
476 #endif
477 return IRQ_HANDLED;
478 }
479
480 static unsigned int cyc2ns_scale __read_mostly;
481
482 static inline void set_cyc2ns_scale(unsigned long cpu_khz)
483 {
484 cyc2ns_scale = (NSEC_PER_MSEC << NS_SCALE) / cpu_khz;
485 }
486
487 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
488 {
489 return (cyc * cyc2ns_scale) >> NS_SCALE;
490 }
491
492 unsigned long long sched_clock(void)
493 {
494 unsigned long a = 0;
495
496 #if 0
497 /* Don't do a HPET read here. Using TSC always is much faster
498 and HPET may not be mapped yet when the scheduler first runs.
499 Disadvantage is a small drift between CPUs in some configurations,
500 but that should be tolerable. */
501 if (__vxtime.mode == VXTIME_HPET)
502 return (hpet_readl(HPET_COUNTER) * vxtime.quot) >> US_SCALE;
503 #endif
504
505 /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
506 which means it is not completely exact and may not be monotonous between
507 CPUs. But the errors should be too small to matter for scheduling
508 purposes. */
509
510 rdtscll(a);
511 return cycles_2_ns(a);
512 }
513
514 static unsigned long get_cmos_time(void)
515 {
516 unsigned int year, mon, day, hour, min, sec;
517 unsigned long flags;
518 unsigned extyear = 0;
519
520 spin_lock_irqsave(&rtc_lock, flags);
521
522 do {
523 sec = CMOS_READ(RTC_SECONDS);
524 min = CMOS_READ(RTC_MINUTES);
525 hour = CMOS_READ(RTC_HOURS);
526 day = CMOS_READ(RTC_DAY_OF_MONTH);
527 mon = CMOS_READ(RTC_MONTH);
528 year = CMOS_READ(RTC_YEAR);
529 #ifdef CONFIG_ACPI
530 if (acpi_fadt.revision >= FADT2_REVISION_ID &&
531 acpi_fadt.century)
532 extyear = CMOS_READ(acpi_fadt.century);
533 #endif
534 } while (sec != CMOS_READ(RTC_SECONDS));
535
536 spin_unlock_irqrestore(&rtc_lock, flags);
537
538 /*
539 * We know that x86-64 always uses BCD format, no need to check the
540 * config register.
541 */
542
543 BCD_TO_BIN(sec);
544 BCD_TO_BIN(min);
545 BCD_TO_BIN(hour);
546 BCD_TO_BIN(day);
547 BCD_TO_BIN(mon);
548 BCD_TO_BIN(year);
549
550 if (extyear) {
551 BCD_TO_BIN(extyear);
552 year += extyear;
553 printk(KERN_INFO "Extended CMOS year: %d\n", extyear);
554 } else {
555 /*
556 * x86-64 systems only exists since 2002.
557 * This will work up to Dec 31, 2100
558 */
559 year += 2000;
560 }
561
562 return mktime(year, mon, day, hour, min, sec);
563 }
564
565 #ifdef CONFIG_CPU_FREQ
566
567 /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
568 changes.
569
570 RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
571 not that important because current Opteron setups do not support
572 scaling on SMP anyroads.
573
574 Should fix up last_tsc too. Currently gettimeofday in the
575 first tick after the change will be slightly wrong. */
576
577 #include <linux/workqueue.h>
578
579 static unsigned int cpufreq_delayed_issched = 0;
580 static unsigned int cpufreq_init = 0;
581 static struct work_struct cpufreq_delayed_get_work;
582
583 static void handle_cpufreq_delayed_get(void *v)
584 {
585 unsigned int cpu;
586 for_each_online_cpu(cpu) {
587 cpufreq_get(cpu);
588 }
589 cpufreq_delayed_issched = 0;
590 }
591
592 /* if we notice lost ticks, schedule a call to cpufreq_get() as it tries
593 * to verify the CPU frequency the timing core thinks the CPU is running
594 * at is still correct.
595 */
596 static void cpufreq_delayed_get(void)
597 {
598 static int warned;
599 if (cpufreq_init && !cpufreq_delayed_issched) {
600 cpufreq_delayed_issched = 1;
601 if (!warned) {
602 warned = 1;
603 printk(KERN_DEBUG
604 "Losing some ticks... checking if CPU frequency changed.\n");
605 }
606 schedule_work(&cpufreq_delayed_get_work);
607 }
608 }
609
610 static unsigned int ref_freq = 0;
611 static unsigned long loops_per_jiffy_ref = 0;
612
613 static unsigned long cpu_khz_ref = 0;
614
615 static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
616 void *data)
617 {
618 struct cpufreq_freqs *freq = data;
619 unsigned long *lpj, dummy;
620
621 if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC))
622 return 0;
623
624 lpj = &dummy;
625 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
626 #ifdef CONFIG_SMP
627 lpj = &cpu_data[freq->cpu].loops_per_jiffy;
628 #else
629 lpj = &boot_cpu_data.loops_per_jiffy;
630 #endif
631
632 if (!ref_freq) {
633 ref_freq = freq->old;
634 loops_per_jiffy_ref = *lpj;
635 cpu_khz_ref = cpu_khz;
636 }
637 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
638 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
639 (val == CPUFREQ_RESUMECHANGE)) {
640 *lpj =
641 cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
642
643 cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new);
644 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
645 vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
646 }
647
648 set_cyc2ns_scale(cpu_khz_ref);
649
650 return 0;
651 }
652
653 static struct notifier_block time_cpufreq_notifier_block = {
654 .notifier_call = time_cpufreq_notifier
655 };
656
657 static int __init cpufreq_tsc(void)
658 {
659 INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get, NULL);
660 if (!cpufreq_register_notifier(&time_cpufreq_notifier_block,
661 CPUFREQ_TRANSITION_NOTIFIER))
662 cpufreq_init = 1;
663 return 0;
664 }
665
666 core_initcall(cpufreq_tsc);
667
668 #endif
669
670 /*
671 * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
672 * it to the HPET timer of known frequency.
673 */
674
675 #define TICK_COUNT 100000000
676
677 static unsigned int __init hpet_calibrate_tsc(void)
678 {
679 int tsc_start, hpet_start;
680 int tsc_now, hpet_now;
681 unsigned long flags;
682
683 local_irq_save(flags);
684 local_irq_disable();
685
686 hpet_start = hpet_readl(HPET_COUNTER);
687 rdtscl(tsc_start);
688
689 do {
690 local_irq_disable();
691 hpet_now = hpet_readl(HPET_COUNTER);
692 tsc_now = get_cycles_sync();
693 local_irq_restore(flags);
694 } while ((tsc_now - tsc_start) < TICK_COUNT &&
695 (hpet_now - hpet_start) < TICK_COUNT);
696
697 return (tsc_now - tsc_start) * 1000000000L
698 / ((hpet_now - hpet_start) * hpet_period / 1000);
699 }
700
701
702 /*
703 * pit_calibrate_tsc() uses the speaker output (channel 2) of
704 * the PIT. This is better than using the timer interrupt output,
705 * because we can read the value of the speaker with just one inb(),
706 * where we need three i/o operations for the interrupt channel.
707 * We count how many ticks the TSC does in 50 ms.
708 */
709
710 static unsigned int __init pit_calibrate_tsc(void)
711 {
712 unsigned long start, end;
713 unsigned long flags;
714
715 spin_lock_irqsave(&i8253_lock, flags);
716
717 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
718
719 outb(0xb0, 0x43);
720 outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
721 outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42);
722 start = get_cycles_sync();
723 while ((inb(0x61) & 0x20) == 0);
724 end = get_cycles_sync();
725
726 spin_unlock_irqrestore(&i8253_lock, flags);
727
728 return (end - start) / 50;
729 }
730
731 #ifdef CONFIG_HPET
732 static __init int late_hpet_init(void)
733 {
734 struct hpet_data hd;
735 unsigned int ntimer;
736
737 if (!vxtime.hpet_address)
738 return 0;
739
740 memset(&hd, 0, sizeof (hd));
741
742 ntimer = hpet_readl(HPET_ID);
743 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
744 ntimer++;
745
746 /*
747 * Register with driver.
748 * Timer0 and Timer1 is used by platform.
749 */
750 hd.hd_phys_address = vxtime.hpet_address;
751 hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
752 hd.hd_nirqs = ntimer;
753 hd.hd_flags = HPET_DATA_PLATFORM;
754 hpet_reserve_timer(&hd, 0);
755 #ifdef CONFIG_HPET_EMULATE_RTC
756 hpet_reserve_timer(&hd, 1);
757 #endif
758 hd.hd_irq[0] = HPET_LEGACY_8254;
759 hd.hd_irq[1] = HPET_LEGACY_RTC;
760 if (ntimer > 2) {
761 struct hpet *hpet;
762 struct hpet_timer *timer;
763 int i;
764
765 hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
766 timer = &hpet->hpet_timers[2];
767 for (i = 2; i < ntimer; timer++, i++)
768 hd.hd_irq[i] = (timer->hpet_config &
769 Tn_INT_ROUTE_CNF_MASK) >>
770 Tn_INT_ROUTE_CNF_SHIFT;
771
772 }
773
774 hpet_alloc(&hd);
775 return 0;
776 }
777 fs_initcall(late_hpet_init);
778 #endif
779
780 static int hpet_timer_stop_set_go(unsigned long tick)
781 {
782 unsigned int cfg;
783
784 /*
785 * Stop the timers and reset the main counter.
786 */
787
788 cfg = hpet_readl(HPET_CFG);
789 cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
790 hpet_writel(cfg, HPET_CFG);
791 hpet_writel(0, HPET_COUNTER);
792 hpet_writel(0, HPET_COUNTER + 4);
793
794 /*
795 * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
796 * and period also hpet_tick.
797 */
798 if (hpet_use_timer) {
799 hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
800 HPET_TN_32BIT, HPET_T0_CFG);
801 hpet_writel(hpet_tick, HPET_T0_CMP); /* next interrupt */
802 hpet_writel(hpet_tick, HPET_T0_CMP); /* period */
803 cfg |= HPET_CFG_LEGACY;
804 }
805 /*
806 * Go!
807 */
808
809 cfg |= HPET_CFG_ENABLE;
810 hpet_writel(cfg, HPET_CFG);
811
812 return 0;
813 }
814
815 static int hpet_init(void)
816 {
817 unsigned int id;
818
819 if (!vxtime.hpet_address)
820 return -1;
821 set_fixmap_nocache(FIX_HPET_BASE, vxtime.hpet_address);
822 __set_fixmap(VSYSCALL_HPET, vxtime.hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
823
824 /*
825 * Read the period, compute tick and quotient.
826 */
827
828 id = hpet_readl(HPET_ID);
829
830 if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
831 return -1;
832
833 hpet_period = hpet_readl(HPET_PERIOD);
834 if (hpet_period < 100000 || hpet_period > 100000000)
835 return -1;
836
837 hpet_tick = (FSEC_PER_TICK + hpet_period / 2) / hpet_period;
838
839 hpet_use_timer = (id & HPET_ID_LEGSUP);
840
841 return hpet_timer_stop_set_go(hpet_tick);
842 }
843
844 static int hpet_reenable(void)
845 {
846 return hpet_timer_stop_set_go(hpet_tick);
847 }
848
849 #define PIT_MODE 0x43
850 #define PIT_CH0 0x40
851
852 static void __init __pit_init(int val, u8 mode)
853 {
854 unsigned long flags;
855
856 spin_lock_irqsave(&i8253_lock, flags);
857 outb_p(mode, PIT_MODE);
858 outb_p(val & 0xff, PIT_CH0); /* LSB */
859 outb_p(val >> 8, PIT_CH0); /* MSB */
860 spin_unlock_irqrestore(&i8253_lock, flags);
861 }
862
863 void __init pit_init(void)
864 {
865 __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
866 }
867
868 void __init pit_stop_interrupt(void)
869 {
870 __pit_init(0, 0x30); /* mode 0 */
871 }
872
873 void __init stop_timer_interrupt(void)
874 {
875 char *name;
876 if (vxtime.hpet_address) {
877 name = "HPET";
878 hpet_timer_stop_set_go(0);
879 } else {
880 name = "PIT";
881 pit_stop_interrupt();
882 }
883 printk(KERN_INFO "timer: %s interrupt stopped.\n", name);
884 }
885
886 int __init time_setup(char *str)
887 {
888 report_lost_ticks = 1;
889 return 1;
890 }
891
892 static struct irqaction irq0 = {
893 timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL
894 };
895
896 void __init time_init(void)
897 {
898 char *timename;
899 char *gtod;
900
901 if (nohpet)
902 vxtime.hpet_address = 0;
903
904 xtime.tv_sec = get_cmos_time();
905 xtime.tv_nsec = 0;
906
907 set_normalized_timespec(&wall_to_monotonic,
908 -xtime.tv_sec, -xtime.tv_nsec);
909
910 if (!hpet_init())
911 vxtime_hz = (FSEC_PER_SEC + hpet_period / 2) / hpet_period;
912 else
913 vxtime.hpet_address = 0;
914
915 if (hpet_use_timer) {
916 /* set tick_nsec to use the proper rate for HPET */
917 tick_nsec = TICK_NSEC_HPET;
918 cpu_khz = hpet_calibrate_tsc();
919 timename = "HPET";
920 #ifdef CONFIG_X86_PM_TIMER
921 } else if (pmtmr_ioport && !vxtime.hpet_address) {
922 vxtime_hz = PM_TIMER_FREQUENCY;
923 timename = "PM";
924 pit_init();
925 cpu_khz = pit_calibrate_tsc();
926 #endif
927 } else {
928 pit_init();
929 cpu_khz = pit_calibrate_tsc();
930 timename = "PIT";
931 }
932
933 vxtime.mode = VXTIME_TSC;
934 gtod = time_init_gtod();
935
936 printk(KERN_INFO "time.c: Using %ld.%06ld MHz WALL %s GTOD %s timer.\n",
937 vxtime_hz / 1000000, vxtime_hz % 1000000, timename, gtod);
938 printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
939 cpu_khz / 1000, cpu_khz % 1000);
940 vxtime.quot = (USEC_PER_SEC << US_SCALE) / vxtime_hz;
941 vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
942 vxtime.last_tsc = get_cycles_sync();
943 setup_irq(0, &irq0);
944
945 set_cyc2ns_scale(cpu_khz);
946 }
947
948 /*
949 * Make an educated guess if the TSC is trustworthy and synchronized
950 * over all CPUs.
951 */
952 __cpuinit int unsynchronized_tsc(void)
953 {
954 #ifdef CONFIG_SMP
955 if (apic_is_clustered_box())
956 return 1;
957 #endif
958 /* Most intel systems have synchronized TSCs except for
959 multi node systems */
960 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
961 #ifdef CONFIG_ACPI
962 /* But TSC doesn't tick in C3 so don't use it there */
963 if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100)
964 return 1;
965 #endif
966 return 0;
967 }
968
969 /* Assume multi socket systems are not synchronized */
970 return num_present_cpus() > 1;
971 }
972
973 /*
974 * Decide what mode gettimeofday should use.
975 */
976 __init static char *time_init_gtod(void)
977 {
978 char *timetype;
979
980 if (unsynchronized_tsc())
981 notsc = 1;
982 if (vxtime.hpet_address && notsc) {
983 timetype = hpet_use_timer ? "HPET" : "PIT/HPET";
984 if (hpet_use_timer)
985 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
986 else
987 vxtime.last = hpet_readl(HPET_COUNTER);
988 vxtime.mode = VXTIME_HPET;
989 do_gettimeoffset = do_gettimeoffset_hpet;
990 #ifdef CONFIG_X86_PM_TIMER
991 /* Using PM for gettimeofday is quite slow, but we have no other
992 choice because the TSC is too unreliable on some systems. */
993 } else if (pmtmr_ioport && !vxtime.hpet_address && notsc) {
994 timetype = "PM";
995 do_gettimeoffset = do_gettimeoffset_pm;
996 vxtime.mode = VXTIME_PMTMR;
997 sysctl_vsyscall = 0;
998 printk(KERN_INFO "Disabling vsyscall due to use of PM timer\n");
999 #endif
1000 } else {
1001 timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC";
1002 vxtime.mode = VXTIME_TSC;
1003 }
1004 return timetype;
1005 }
1006
1007 __setup("report_lost_ticks", time_setup);
1008
1009 static long clock_cmos_diff;
1010 static unsigned long sleep_start;
1011
1012 /*
1013 * sysfs support for the timer.
1014 */
1015
1016 static int timer_suspend(struct sys_device *dev, pm_message_t state)
1017 {
1018 /*
1019 * Estimate time zone so that set_time can update the clock
1020 */
1021 long cmos_time = get_cmos_time();
1022
1023 clock_cmos_diff = -cmos_time;
1024 clock_cmos_diff += get_seconds();
1025 sleep_start = cmos_time;
1026 return 0;
1027 }
1028
1029 static int timer_resume(struct sys_device *dev)
1030 {
1031 unsigned long flags;
1032 unsigned long sec;
1033 unsigned long ctime = get_cmos_time();
1034 unsigned long sleep_length = (ctime - sleep_start) * HZ;
1035
1036 if (vxtime.hpet_address)
1037 hpet_reenable();
1038 else
1039 i8254_timer_resume();
1040
1041 sec = ctime + clock_cmos_diff;
1042 write_seqlock_irqsave(&xtime_lock,flags);
1043 xtime.tv_sec = sec;
1044 xtime.tv_nsec = 0;
1045 if (vxtime.mode == VXTIME_HPET) {
1046 if (hpet_use_timer)
1047 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
1048 else
1049 vxtime.last = hpet_readl(HPET_COUNTER);
1050 #ifdef CONFIG_X86_PM_TIMER
1051 } else if (vxtime.mode == VXTIME_PMTMR) {
1052 pmtimer_resume();
1053 #endif
1054 } else
1055 vxtime.last_tsc = get_cycles_sync();
1056 write_sequnlock_irqrestore(&xtime_lock,flags);
1057 jiffies += sleep_length;
1058 wall_jiffies += sleep_length;
1059 monotonic_base += sleep_length * (NSEC_PER_SEC/HZ);
1060 touch_softlockup_watchdog();
1061 return 0;
1062 }
1063
1064 static struct sysdev_class timer_sysclass = {
1065 .resume = timer_resume,
1066 .suspend = timer_suspend,
1067 set_kset_name("timer"),
1068 };
1069
1070 /* XXX this driverfs stuff should probably go elsewhere later -john */
1071 static struct sys_device device_timer = {
1072 .id = 0,
1073 .cls = &timer_sysclass,
1074 };
1075
1076 static int time_init_device(void)
1077 {
1078 int error = sysdev_class_register(&timer_sysclass);
1079 if (!error)
1080 error = sysdev_register(&device_timer);
1081 return error;
1082 }
1083
1084 device_initcall(time_init_device);
1085
1086 #ifdef CONFIG_HPET_EMULATE_RTC
1087 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
1088 * is enabled, we support RTC interrupt functionality in software.
1089 * RTC has 3 kinds of interrupts:
1090 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
1091 * is updated
1092 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
1093 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
1094 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
1095 * (1) and (2) above are implemented using polling at a frequency of
1096 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
1097 * overhead. (DEFAULT_RTC_INT_FREQ)
1098 * For (3), we use interrupts at 64Hz or user specified periodic
1099 * frequency, whichever is higher.
1100 */
1101 #include <linux/rtc.h>
1102
1103 #define DEFAULT_RTC_INT_FREQ 64
1104 #define RTC_NUM_INTS 1
1105
1106 static unsigned long UIE_on;
1107 static unsigned long prev_update_sec;
1108
1109 static unsigned long AIE_on;
1110 static struct rtc_time alarm_time;
1111
1112 static unsigned long PIE_on;
1113 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
1114 static unsigned long PIE_count;
1115
1116 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
1117 static unsigned int hpet_t1_cmp; /* cached comparator register */
1118
1119 int is_hpet_enabled(void)
1120 {
1121 return vxtime.hpet_address != 0;
1122 }
1123
1124 /*
1125 * Timer 1 for RTC, we do not use periodic interrupt feature,
1126 * even if HPET supports periodic interrupts on Timer 1.
1127 * The reason being, to set up a periodic interrupt in HPET, we need to
1128 * stop the main counter. And if we do that everytime someone diables/enables
1129 * RTC, we will have adverse effect on main kernel timer running on Timer 0.
1130 * So, for the time being, simulate the periodic interrupt in software.
1131 *
1132 * hpet_rtc_timer_init() is called for the first time and during subsequent
1133 * interuppts reinit happens through hpet_rtc_timer_reinit().
1134 */
1135 int hpet_rtc_timer_init(void)
1136 {
1137 unsigned int cfg, cnt;
1138 unsigned long flags;
1139
1140 if (!is_hpet_enabled())
1141 return 0;
1142 /*
1143 * Set the counter 1 and enable the interrupts.
1144 */
1145 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1146 hpet_rtc_int_freq = PIE_freq;
1147 else
1148 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1149
1150 local_irq_save(flags);
1151 cnt = hpet_readl(HPET_COUNTER);
1152 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
1153 hpet_writel(cnt, HPET_T1_CMP);
1154 hpet_t1_cmp = cnt;
1155 local_irq_restore(flags);
1156
1157 cfg = hpet_readl(HPET_T1_CFG);
1158 cfg &= ~HPET_TN_PERIODIC;
1159 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1160 hpet_writel(cfg, HPET_T1_CFG);
1161
1162 return 1;
1163 }
1164
1165 static void hpet_rtc_timer_reinit(void)
1166 {
1167 unsigned int cfg, cnt;
1168
1169 if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
1170 cfg = hpet_readl(HPET_T1_CFG);
1171 cfg &= ~HPET_TN_ENABLE;
1172 hpet_writel(cfg, HPET_T1_CFG);
1173 return;
1174 }
1175
1176 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1177 hpet_rtc_int_freq = PIE_freq;
1178 else
1179 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1180
1181 /* It is more accurate to use the comparator value than current count.*/
1182 cnt = hpet_t1_cmp;
1183 cnt += hpet_tick*HZ/hpet_rtc_int_freq;
1184 hpet_writel(cnt, HPET_T1_CMP);
1185 hpet_t1_cmp = cnt;
1186 }
1187
1188 /*
1189 * The functions below are called from rtc driver.
1190 * Return 0 if HPET is not being used.
1191 * Otherwise do the necessary changes and return 1.
1192 */
1193 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1194 {
1195 if (!is_hpet_enabled())
1196 return 0;
1197
1198 if (bit_mask & RTC_UIE)
1199 UIE_on = 0;
1200 if (bit_mask & RTC_PIE)
1201 PIE_on = 0;
1202 if (bit_mask & RTC_AIE)
1203 AIE_on = 0;
1204
1205 return 1;
1206 }
1207
1208 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1209 {
1210 int timer_init_reqd = 0;
1211
1212 if (!is_hpet_enabled())
1213 return 0;
1214
1215 if (!(PIE_on | AIE_on | UIE_on))
1216 timer_init_reqd = 1;
1217
1218 if (bit_mask & RTC_UIE) {
1219 UIE_on = 1;
1220 }
1221 if (bit_mask & RTC_PIE) {
1222 PIE_on = 1;
1223 PIE_count = 0;
1224 }
1225 if (bit_mask & RTC_AIE) {
1226 AIE_on = 1;
1227 }
1228
1229 if (timer_init_reqd)
1230 hpet_rtc_timer_init();
1231
1232 return 1;
1233 }
1234
1235 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
1236 {
1237 if (!is_hpet_enabled())
1238 return 0;
1239
1240 alarm_time.tm_hour = hrs;
1241 alarm_time.tm_min = min;
1242 alarm_time.tm_sec = sec;
1243
1244 return 1;
1245 }
1246
1247 int hpet_set_periodic_freq(unsigned long freq)
1248 {
1249 if (!is_hpet_enabled())
1250 return 0;
1251
1252 PIE_freq = freq;
1253 PIE_count = 0;
1254
1255 return 1;
1256 }
1257
1258 int hpet_rtc_dropped_irq(void)
1259 {
1260 if (!is_hpet_enabled())
1261 return 0;
1262
1263 return 1;
1264 }
1265
1266 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1267 {
1268 struct rtc_time curr_time;
1269 unsigned long rtc_int_flag = 0;
1270 int call_rtc_interrupt = 0;
1271
1272 hpet_rtc_timer_reinit();
1273
1274 if (UIE_on | AIE_on) {
1275 rtc_get_rtc_time(&curr_time);
1276 }
1277 if (UIE_on) {
1278 if (curr_time.tm_sec != prev_update_sec) {
1279 /* Set update int info, call real rtc int routine */
1280 call_rtc_interrupt = 1;
1281 rtc_int_flag = RTC_UF;
1282 prev_update_sec = curr_time.tm_sec;
1283 }
1284 }
1285 if (PIE_on) {
1286 PIE_count++;
1287 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
1288 /* Set periodic int info, call real rtc int routine */
1289 call_rtc_interrupt = 1;
1290 rtc_int_flag |= RTC_PF;
1291 PIE_count = 0;
1292 }
1293 }
1294 if (AIE_on) {
1295 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
1296 (curr_time.tm_min == alarm_time.tm_min) &&
1297 (curr_time.tm_hour == alarm_time.tm_hour)) {
1298 /* Set alarm int info, call real rtc int routine */
1299 call_rtc_interrupt = 1;
1300 rtc_int_flag |= RTC_AF;
1301 }
1302 }
1303 if (call_rtc_interrupt) {
1304 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1305 rtc_interrupt(rtc_int_flag, dev_id, regs);
1306 }
1307 return IRQ_HANDLED;
1308 }
1309 #endif
1310
1311 static int __init nohpet_setup(char *s)
1312 {
1313 nohpet = 1;
1314 return 1;
1315 }
1316
1317 __setup("nohpet", nohpet_setup);
1318
1319 int __init notsc_setup(char *s)
1320 {
1321 notsc = 1;
1322 return 1;
1323 }
1324
1325 __setup("notsc", notsc_setup);