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1 /*
2 * linux/arch/x86-64/kernel/time.c
3 *
4 * "High Precision Event Timer" based timekeeping.
5 *
6 * Copyright (c) 1991,1992,1995 Linus Torvalds
7 * Copyright (c) 1994 Alan Modra
8 * Copyright (c) 1995 Markus Kuhn
9 * Copyright (c) 1996 Ingo Molnar
10 * Copyright (c) 1998 Andrea Arcangeli
11 * Copyright (c) 2002,2006 Vojtech Pavlik
12 * Copyright (c) 2003 Andi Kleen
13 * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/interrupt.h>
19 #include <linux/init.h>
20 #include <linux/mc146818rtc.h>
21 #include <linux/time.h>
22 #include <linux/ioport.h>
23 #include <linux/module.h>
24 #include <linux/device.h>
25 #include <linux/sysdev.h>
26 #include <linux/bcd.h>
27 #include <linux/notifier.h>
28 #include <linux/cpu.h>
29 #include <linux/kallsyms.h>
30 #include <linux/acpi.h>
31 #ifdef CONFIG_ACPI
32 #include <acpi/achware.h> /* for PM timer frequency */
33 #include <acpi/acpi_bus.h>
34 #endif
35 #include <asm/8253pit.h>
36 #include <asm/pgtable.h>
37 #include <asm/vsyscall.h>
38 #include <asm/timex.h>
39 #include <asm/proto.h>
40 #include <asm/hpet.h>
41 #include <asm/sections.h>
42 #include <linux/cpufreq.h>
43 #include <linux/hpet.h>
44 #include <asm/apic.h>
45
46 #ifdef CONFIG_CPU_FREQ
47 static void cpufreq_delayed_get(void);
48 #endif
49 extern void i8254_timer_resume(void);
50 extern int using_apic_timer;
51
52 static char *timename = NULL;
53
54 DEFINE_SPINLOCK(rtc_lock);
55 EXPORT_SYMBOL(rtc_lock);
56 DEFINE_SPINLOCK(i8253_lock);
57
58 int nohpet __initdata = 0;
59 static int notsc __initdata = 0;
60
61 #define USEC_PER_TICK (USEC_PER_SEC / HZ)
62 #define NSEC_PER_TICK (NSEC_PER_SEC / HZ)
63 #define FSEC_PER_TICK (FSEC_PER_SEC / HZ)
64
65 #define NS_SCALE 10 /* 2^10, carefully chosen */
66 #define US_SCALE 32 /* 2^32, arbitralrily chosen */
67
68 unsigned int cpu_khz; /* TSC clocks / usec, not used here */
69 EXPORT_SYMBOL(cpu_khz);
70 static unsigned long hpet_period; /* fsecs / HPET clock */
71 unsigned long hpet_tick; /* HPET clocks / interrupt */
72 int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
73 unsigned long vxtime_hz = PIT_TICK_RATE;
74 int report_lost_ticks; /* command line option */
75 unsigned long long monotonic_base;
76
77 struct vxtime_data __vxtime __section_vxtime; /* for vsyscalls */
78
79 volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
80 struct timespec __xtime __section_xtime;
81 struct timezone __sys_tz __section_sys_tz;
82
83 /*
84 * do_gettimeoffset() returns microseconds since last timer interrupt was
85 * triggered by hardware. A memory read of HPET is slower than a register read
86 * of TSC, but much more reliable. It's also synchronized to the timer
87 * interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a
88 * timer interrupt has happened already, but vxtime.trigger wasn't updated yet.
89 * This is not a problem, because jiffies hasn't updated either. They are bound
90 * together by xtime_lock.
91 */
92
93 static inline unsigned int do_gettimeoffset_tsc(void)
94 {
95 unsigned long t;
96 unsigned long x;
97 t = get_cycles_sync();
98 if (t < vxtime.last_tsc)
99 t = vxtime.last_tsc; /* hack */
100 x = ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> US_SCALE;
101 return x;
102 }
103
104 static inline unsigned int do_gettimeoffset_hpet(void)
105 {
106 /* cap counter read to one tick to avoid inconsistencies */
107 unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last;
108 return (min(counter,hpet_tick) * vxtime.quot) >> US_SCALE;
109 }
110
111 unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
112
113 /*
114 * This version of gettimeofday() has microsecond resolution and better than
115 * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
116 * MHz) HPET timer.
117 */
118
119 void do_gettimeofday(struct timeval *tv)
120 {
121 unsigned long seq;
122 unsigned int sec, usec;
123
124 do {
125 seq = read_seqbegin(&xtime_lock);
126
127 sec = xtime.tv_sec;
128 usec = xtime.tv_nsec / NSEC_PER_USEC;
129
130 /* i386 does some correction here to keep the clock
131 monotonous even when ntpd is fixing drift.
132 But they didn't work for me, there is a non monotonic
133 clock anyways with ntp.
134 I dropped all corrections now until a real solution can
135 be found. Note when you fix it here you need to do the same
136 in arch/x86_64/kernel/vsyscall.c and export all needed
137 variables in vmlinux.lds. -AK */
138 usec += do_gettimeoffset();
139
140 } while (read_seqretry(&xtime_lock, seq));
141
142 tv->tv_sec = sec + usec / USEC_PER_SEC;
143 tv->tv_usec = usec % USEC_PER_SEC;
144 }
145
146 EXPORT_SYMBOL(do_gettimeofday);
147
148 /*
149 * settimeofday() first undoes the correction that gettimeofday would do
150 * on the time, and then saves it. This is ugly, but has been like this for
151 * ages already.
152 */
153
154 int do_settimeofday(struct timespec *tv)
155 {
156 time_t wtm_sec, sec = tv->tv_sec;
157 long wtm_nsec, nsec = tv->tv_nsec;
158
159 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
160 return -EINVAL;
161
162 write_seqlock_irq(&xtime_lock);
163
164 nsec -= do_gettimeoffset() * NSEC_PER_USEC;
165
166 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
167 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
168
169 set_normalized_timespec(&xtime, sec, nsec);
170 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
171
172 ntp_clear();
173
174 write_sequnlock_irq(&xtime_lock);
175 clock_was_set();
176 return 0;
177 }
178
179 EXPORT_SYMBOL(do_settimeofday);
180
181 unsigned long profile_pc(struct pt_regs *regs)
182 {
183 unsigned long pc = instruction_pointer(regs);
184
185 /* Assume the lock function has either no stack frame or a copy
186 of eflags from PUSHF
187 Eflags always has bits 22 and up cleared unlike kernel addresses. */
188 if (!user_mode(regs) && in_lock_functions(pc)) {
189 unsigned long *sp = (unsigned long *)regs->rsp;
190 if (sp[0] >> 22)
191 return sp[0];
192 if (sp[1] >> 22)
193 return sp[1];
194 }
195 return pc;
196 }
197 EXPORT_SYMBOL(profile_pc);
198
199 /*
200 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
201 * ms after the second nowtime has started, because when nowtime is written
202 * into the registers of the CMOS clock, it will jump to the next second
203 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
204 * sheet for details.
205 */
206
207 static void set_rtc_mmss(unsigned long nowtime)
208 {
209 int real_seconds, real_minutes, cmos_minutes;
210 unsigned char control, freq_select;
211
212 /*
213 * IRQs are disabled when we're called from the timer interrupt,
214 * no need for spin_lock_irqsave()
215 */
216
217 spin_lock(&rtc_lock);
218
219 /*
220 * Tell the clock it's being set and stop it.
221 */
222
223 control = CMOS_READ(RTC_CONTROL);
224 CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
225
226 freq_select = CMOS_READ(RTC_FREQ_SELECT);
227 CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
228
229 cmos_minutes = CMOS_READ(RTC_MINUTES);
230 BCD_TO_BIN(cmos_minutes);
231
232 /*
233 * since we're only adjusting minutes and seconds, don't interfere with hour
234 * overflow. This avoids messing with unknown time zones but requires your RTC
235 * not to be off by more than 15 minutes. Since we're calling it only when
236 * our clock is externally synchronized using NTP, this shouldn't be a problem.
237 */
238
239 real_seconds = nowtime % 60;
240 real_minutes = nowtime / 60;
241 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
242 real_minutes += 30; /* correct for half hour time zone */
243 real_minutes %= 60;
244
245 if (abs(real_minutes - cmos_minutes) >= 30) {
246 printk(KERN_WARNING "time.c: can't update CMOS clock "
247 "from %d to %d\n", cmos_minutes, real_minutes);
248 } else {
249 BIN_TO_BCD(real_seconds);
250 BIN_TO_BCD(real_minutes);
251 CMOS_WRITE(real_seconds, RTC_SECONDS);
252 CMOS_WRITE(real_minutes, RTC_MINUTES);
253 }
254
255 /*
256 * The following flags have to be released exactly in this order, otherwise the
257 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
258 * not reset the oscillator and will not update precisely 500 ms later. You
259 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
260 * believes data sheets anyway ... -- Markus Kuhn
261 */
262
263 CMOS_WRITE(control, RTC_CONTROL);
264 CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
265
266 spin_unlock(&rtc_lock);
267 }
268
269
270 /* monotonic_clock(): returns # of nanoseconds passed since time_init()
271 * Note: This function is required to return accurate
272 * time even in the absence of multiple timer ticks.
273 */
274 static inline unsigned long long cycles_2_ns(unsigned long long cyc);
275 unsigned long long monotonic_clock(void)
276 {
277 unsigned long seq;
278 u32 last_offset, this_offset, offset;
279 unsigned long long base;
280
281 if (vxtime.mode == VXTIME_HPET) {
282 do {
283 seq = read_seqbegin(&xtime_lock);
284
285 last_offset = vxtime.last;
286 base = monotonic_base;
287 this_offset = hpet_readl(HPET_COUNTER);
288 } while (read_seqretry(&xtime_lock, seq));
289 offset = (this_offset - last_offset);
290 offset *= NSEC_PER_TICK / hpet_tick;
291 } else {
292 do {
293 seq = read_seqbegin(&xtime_lock);
294
295 last_offset = vxtime.last_tsc;
296 base = monotonic_base;
297 } while (read_seqretry(&xtime_lock, seq));
298 this_offset = get_cycles_sync();
299 offset = cycles_2_ns(this_offset - last_offset);
300 }
301 return base + offset;
302 }
303 EXPORT_SYMBOL(monotonic_clock);
304
305 static noinline void handle_lost_ticks(int lost, struct pt_regs *regs)
306 {
307 static long lost_count;
308 static int warned;
309 if (report_lost_ticks) {
310 printk(KERN_WARNING "time.c: Lost %d timer tick(s)! ", lost);
311 print_symbol("rip %s)\n", regs->rip);
312 }
313
314 if (lost_count == 1000 && !warned) {
315 printk(KERN_WARNING "warning: many lost ticks.\n"
316 KERN_WARNING "Your time source seems to be instable or "
317 "some driver is hogging interupts\n");
318 print_symbol("rip %s\n", regs->rip);
319 if (vxtime.mode == VXTIME_TSC && vxtime.hpet_address) {
320 printk(KERN_WARNING "Falling back to HPET\n");
321 if (hpet_use_timer)
322 vxtime.last = hpet_readl(HPET_T0_CMP) -
323 hpet_tick;
324 else
325 vxtime.last = hpet_readl(HPET_COUNTER);
326 vxtime.mode = VXTIME_HPET;
327 do_gettimeoffset = do_gettimeoffset_hpet;
328 }
329 /* else should fall back to PIT, but code missing. */
330 warned = 1;
331 } else
332 lost_count++;
333
334 #ifdef CONFIG_CPU_FREQ
335 /* In some cases the CPU can change frequency without us noticing
336 Give cpufreq a change to catch up. */
337 if ((lost_count+1) % 25 == 0)
338 cpufreq_delayed_get();
339 #endif
340 }
341
342 void main_timer_handler(struct pt_regs *regs)
343 {
344 static unsigned long rtc_update = 0;
345 unsigned long tsc;
346 int delay = 0, offset = 0, lost = 0;
347
348 /*
349 * Here we are in the timer irq handler. We have irqs locally disabled (so we
350 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
351 * on the other CPU, so we need a lock. We also need to lock the vsyscall
352 * variables, because both do_timer() and us change them -arca+vojtech
353 */
354
355 write_seqlock(&xtime_lock);
356
357 if (vxtime.hpet_address)
358 offset = hpet_readl(HPET_COUNTER);
359
360 if (hpet_use_timer) {
361 /* if we're using the hpet timer functionality,
362 * we can more accurately know the counter value
363 * when the timer interrupt occured.
364 */
365 offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
366 delay = hpet_readl(HPET_COUNTER) - offset;
367 } else if (!pmtmr_ioport) {
368 spin_lock(&i8253_lock);
369 outb_p(0x00, 0x43);
370 delay = inb_p(0x40);
371 delay |= inb(0x40) << 8;
372 spin_unlock(&i8253_lock);
373 delay = LATCH - 1 - delay;
374 }
375
376 tsc = get_cycles_sync();
377
378 if (vxtime.mode == VXTIME_HPET) {
379 if (offset - vxtime.last > hpet_tick) {
380 lost = (offset - vxtime.last) / hpet_tick - 1;
381 }
382
383 monotonic_base +=
384 (offset - vxtime.last) * NSEC_PER_TICK / hpet_tick;
385
386 vxtime.last = offset;
387 #ifdef CONFIG_X86_PM_TIMER
388 } else if (vxtime.mode == VXTIME_PMTMR) {
389 lost = pmtimer_mark_offset();
390 #endif
391 } else {
392 offset = (((tsc - vxtime.last_tsc) *
393 vxtime.tsc_quot) >> US_SCALE) - USEC_PER_TICK;
394
395 if (offset < 0)
396 offset = 0;
397
398 if (offset > USEC_PER_TICK) {
399 lost = offset / USEC_PER_TICK;
400 offset %= USEC_PER_TICK;
401 }
402
403 monotonic_base += cycles_2_ns(tsc - vxtime.last_tsc);
404
405 vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
406
407 if ((((tsc - vxtime.last_tsc) *
408 vxtime.tsc_quot) >> US_SCALE) < offset)
409 vxtime.last_tsc = tsc -
410 (((long) offset << US_SCALE) / vxtime.tsc_quot) - 1;
411 }
412
413 if (lost > 0)
414 handle_lost_ticks(lost, regs);
415 else
416 lost = 0;
417
418 /*
419 * Do the timer stuff.
420 */
421
422 do_timer(lost + 1);
423 #ifndef CONFIG_SMP
424 update_process_times(user_mode(regs));
425 #endif
426
427 /*
428 * In the SMP case we use the local APIC timer interrupt to do the profiling,
429 * except when we simulate SMP mode on a uniprocessor system, in that case we
430 * have to call the local interrupt handler.
431 */
432
433 if (!using_apic_timer)
434 smp_local_timer_interrupt(regs);
435
436 /*
437 * If we have an externally synchronized Linux clock, then update CMOS clock
438 * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
439 * closest to exactly 500 ms before the next second. If the update fails, we
440 * don't care, as it'll be updated on the next turn, and the problem (time way
441 * off) isn't likely to go away much sooner anyway.
442 */
443
444 if (ntp_synced() && xtime.tv_sec > rtc_update &&
445 abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) {
446 set_rtc_mmss(xtime.tv_sec);
447 rtc_update = xtime.tv_sec + 660;
448 }
449
450 write_sequnlock(&xtime_lock);
451 }
452
453 static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
454 {
455 if (apic_runs_main_timer > 1)
456 return IRQ_HANDLED;
457 main_timer_handler(regs);
458 if (using_apic_timer)
459 smp_send_timer_broadcast_ipi();
460 return IRQ_HANDLED;
461 }
462
463 static unsigned int cyc2ns_scale __read_mostly;
464
465 static inline void set_cyc2ns_scale(unsigned long cpu_khz)
466 {
467 cyc2ns_scale = (NSEC_PER_MSEC << NS_SCALE) / cpu_khz;
468 }
469
470 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
471 {
472 return (cyc * cyc2ns_scale) >> NS_SCALE;
473 }
474
475 unsigned long long sched_clock(void)
476 {
477 unsigned long a = 0;
478
479 #if 0
480 /* Don't do a HPET read here. Using TSC always is much faster
481 and HPET may not be mapped yet when the scheduler first runs.
482 Disadvantage is a small drift between CPUs in some configurations,
483 but that should be tolerable. */
484 if (__vxtime.mode == VXTIME_HPET)
485 return (hpet_readl(HPET_COUNTER) * vxtime.quot) >> US_SCALE;
486 #endif
487
488 /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
489 which means it is not completely exact and may not be monotonous between
490 CPUs. But the errors should be too small to matter for scheduling
491 purposes. */
492
493 rdtscll(a);
494 return cycles_2_ns(a);
495 }
496
497 static unsigned long get_cmos_time(void)
498 {
499 unsigned int year, mon, day, hour, min, sec;
500 unsigned long flags;
501 unsigned extyear = 0;
502
503 spin_lock_irqsave(&rtc_lock, flags);
504
505 do {
506 sec = CMOS_READ(RTC_SECONDS);
507 min = CMOS_READ(RTC_MINUTES);
508 hour = CMOS_READ(RTC_HOURS);
509 day = CMOS_READ(RTC_DAY_OF_MONTH);
510 mon = CMOS_READ(RTC_MONTH);
511 year = CMOS_READ(RTC_YEAR);
512 #ifdef CONFIG_ACPI
513 if (acpi_fadt.revision >= FADT2_REVISION_ID &&
514 acpi_fadt.century)
515 extyear = CMOS_READ(acpi_fadt.century);
516 #endif
517 } while (sec != CMOS_READ(RTC_SECONDS));
518
519 spin_unlock_irqrestore(&rtc_lock, flags);
520
521 /*
522 * We know that x86-64 always uses BCD format, no need to check the
523 * config register.
524 */
525
526 BCD_TO_BIN(sec);
527 BCD_TO_BIN(min);
528 BCD_TO_BIN(hour);
529 BCD_TO_BIN(day);
530 BCD_TO_BIN(mon);
531 BCD_TO_BIN(year);
532
533 if (extyear) {
534 BCD_TO_BIN(extyear);
535 year += extyear;
536 printk(KERN_INFO "Extended CMOS year: %d\n", extyear);
537 } else {
538 /*
539 * x86-64 systems only exists since 2002.
540 * This will work up to Dec 31, 2100
541 */
542 year += 2000;
543 }
544
545 return mktime(year, mon, day, hour, min, sec);
546 }
547
548 #ifdef CONFIG_CPU_FREQ
549
550 /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
551 changes.
552
553 RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
554 not that important because current Opteron setups do not support
555 scaling on SMP anyroads.
556
557 Should fix up last_tsc too. Currently gettimeofday in the
558 first tick after the change will be slightly wrong. */
559
560 #include <linux/workqueue.h>
561
562 static unsigned int cpufreq_delayed_issched = 0;
563 static unsigned int cpufreq_init = 0;
564 static struct work_struct cpufreq_delayed_get_work;
565
566 static void handle_cpufreq_delayed_get(void *v)
567 {
568 unsigned int cpu;
569 for_each_online_cpu(cpu) {
570 cpufreq_get(cpu);
571 }
572 cpufreq_delayed_issched = 0;
573 }
574
575 /* if we notice lost ticks, schedule a call to cpufreq_get() as it tries
576 * to verify the CPU frequency the timing core thinks the CPU is running
577 * at is still correct.
578 */
579 static void cpufreq_delayed_get(void)
580 {
581 static int warned;
582 if (cpufreq_init && !cpufreq_delayed_issched) {
583 cpufreq_delayed_issched = 1;
584 if (!warned) {
585 warned = 1;
586 printk(KERN_DEBUG
587 "Losing some ticks... checking if CPU frequency changed.\n");
588 }
589 schedule_work(&cpufreq_delayed_get_work);
590 }
591 }
592
593 static unsigned int ref_freq = 0;
594 static unsigned long loops_per_jiffy_ref = 0;
595
596 static unsigned long cpu_khz_ref = 0;
597
598 static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
599 void *data)
600 {
601 struct cpufreq_freqs *freq = data;
602 unsigned long *lpj, dummy;
603
604 if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC))
605 return 0;
606
607 lpj = &dummy;
608 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
609 #ifdef CONFIG_SMP
610 lpj = &cpu_data[freq->cpu].loops_per_jiffy;
611 #else
612 lpj = &boot_cpu_data.loops_per_jiffy;
613 #endif
614
615 if (!ref_freq) {
616 ref_freq = freq->old;
617 loops_per_jiffy_ref = *lpj;
618 cpu_khz_ref = cpu_khz;
619 }
620 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
621 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
622 (val == CPUFREQ_RESUMECHANGE)) {
623 *lpj =
624 cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
625
626 cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new);
627 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
628 vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
629 }
630
631 set_cyc2ns_scale(cpu_khz_ref);
632
633 return 0;
634 }
635
636 static struct notifier_block time_cpufreq_notifier_block = {
637 .notifier_call = time_cpufreq_notifier
638 };
639
640 static int __init cpufreq_tsc(void)
641 {
642 INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get, NULL);
643 if (!cpufreq_register_notifier(&time_cpufreq_notifier_block,
644 CPUFREQ_TRANSITION_NOTIFIER))
645 cpufreq_init = 1;
646 return 0;
647 }
648
649 core_initcall(cpufreq_tsc);
650
651 #endif
652
653 /*
654 * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
655 * it to the HPET timer of known frequency.
656 */
657
658 #define TICK_COUNT 100000000
659
660 static unsigned int __init hpet_calibrate_tsc(void)
661 {
662 int tsc_start, hpet_start;
663 int tsc_now, hpet_now;
664 unsigned long flags;
665
666 local_irq_save(flags);
667 local_irq_disable();
668
669 hpet_start = hpet_readl(HPET_COUNTER);
670 rdtscl(tsc_start);
671
672 do {
673 local_irq_disable();
674 hpet_now = hpet_readl(HPET_COUNTER);
675 tsc_now = get_cycles_sync();
676 local_irq_restore(flags);
677 } while ((tsc_now - tsc_start) < TICK_COUNT &&
678 (hpet_now - hpet_start) < TICK_COUNT);
679
680 return (tsc_now - tsc_start) * 1000000000L
681 / ((hpet_now - hpet_start) * hpet_period / 1000);
682 }
683
684
685 /*
686 * pit_calibrate_tsc() uses the speaker output (channel 2) of
687 * the PIT. This is better than using the timer interrupt output,
688 * because we can read the value of the speaker with just one inb(),
689 * where we need three i/o operations for the interrupt channel.
690 * We count how many ticks the TSC does in 50 ms.
691 */
692
693 static unsigned int __init pit_calibrate_tsc(void)
694 {
695 unsigned long start, end;
696 unsigned long flags;
697
698 spin_lock_irqsave(&i8253_lock, flags);
699
700 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
701
702 outb(0xb0, 0x43);
703 outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
704 outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42);
705 start = get_cycles_sync();
706 while ((inb(0x61) & 0x20) == 0);
707 end = get_cycles_sync();
708
709 spin_unlock_irqrestore(&i8253_lock, flags);
710
711 return (end - start) / 50;
712 }
713
714 #ifdef CONFIG_HPET
715 static __init int late_hpet_init(void)
716 {
717 struct hpet_data hd;
718 unsigned int ntimer;
719
720 if (!vxtime.hpet_address)
721 return 0;
722
723 memset(&hd, 0, sizeof (hd));
724
725 ntimer = hpet_readl(HPET_ID);
726 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
727 ntimer++;
728
729 /*
730 * Register with driver.
731 * Timer0 and Timer1 is used by platform.
732 */
733 hd.hd_phys_address = vxtime.hpet_address;
734 hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
735 hd.hd_nirqs = ntimer;
736 hd.hd_flags = HPET_DATA_PLATFORM;
737 hpet_reserve_timer(&hd, 0);
738 #ifdef CONFIG_HPET_EMULATE_RTC
739 hpet_reserve_timer(&hd, 1);
740 #endif
741 hd.hd_irq[0] = HPET_LEGACY_8254;
742 hd.hd_irq[1] = HPET_LEGACY_RTC;
743 if (ntimer > 2) {
744 struct hpet *hpet;
745 struct hpet_timer *timer;
746 int i;
747
748 hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
749 timer = &hpet->hpet_timers[2];
750 for (i = 2; i < ntimer; timer++, i++)
751 hd.hd_irq[i] = (timer->hpet_config &
752 Tn_INT_ROUTE_CNF_MASK) >>
753 Tn_INT_ROUTE_CNF_SHIFT;
754
755 }
756
757 hpet_alloc(&hd);
758 return 0;
759 }
760 fs_initcall(late_hpet_init);
761 #endif
762
763 static int hpet_timer_stop_set_go(unsigned long tick)
764 {
765 unsigned int cfg;
766
767 /*
768 * Stop the timers and reset the main counter.
769 */
770
771 cfg = hpet_readl(HPET_CFG);
772 cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
773 hpet_writel(cfg, HPET_CFG);
774 hpet_writel(0, HPET_COUNTER);
775 hpet_writel(0, HPET_COUNTER + 4);
776
777 /*
778 * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
779 * and period also hpet_tick.
780 */
781 if (hpet_use_timer) {
782 hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
783 HPET_TN_32BIT, HPET_T0_CFG);
784 hpet_writel(hpet_tick, HPET_T0_CMP); /* next interrupt */
785 hpet_writel(hpet_tick, HPET_T0_CMP); /* period */
786 cfg |= HPET_CFG_LEGACY;
787 }
788 /*
789 * Go!
790 */
791
792 cfg |= HPET_CFG_ENABLE;
793 hpet_writel(cfg, HPET_CFG);
794
795 return 0;
796 }
797
798 static int hpet_init(void)
799 {
800 unsigned int id;
801
802 if (!vxtime.hpet_address)
803 return -1;
804 set_fixmap_nocache(FIX_HPET_BASE, vxtime.hpet_address);
805 __set_fixmap(VSYSCALL_HPET, vxtime.hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
806
807 /*
808 * Read the period, compute tick and quotient.
809 */
810
811 id = hpet_readl(HPET_ID);
812
813 if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
814 return -1;
815
816 hpet_period = hpet_readl(HPET_PERIOD);
817 if (hpet_period < 100000 || hpet_period > 100000000)
818 return -1;
819
820 hpet_tick = (FSEC_PER_TICK + hpet_period / 2) / hpet_period;
821
822 hpet_use_timer = (id & HPET_ID_LEGSUP);
823
824 return hpet_timer_stop_set_go(hpet_tick);
825 }
826
827 static int hpet_reenable(void)
828 {
829 return hpet_timer_stop_set_go(hpet_tick);
830 }
831
832 #define PIT_MODE 0x43
833 #define PIT_CH0 0x40
834
835 static void __init __pit_init(int val, u8 mode)
836 {
837 unsigned long flags;
838
839 spin_lock_irqsave(&i8253_lock, flags);
840 outb_p(mode, PIT_MODE);
841 outb_p(val & 0xff, PIT_CH0); /* LSB */
842 outb_p(val >> 8, PIT_CH0); /* MSB */
843 spin_unlock_irqrestore(&i8253_lock, flags);
844 }
845
846 void __init pit_init(void)
847 {
848 __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
849 }
850
851 void __init pit_stop_interrupt(void)
852 {
853 __pit_init(0, 0x30); /* mode 0 */
854 }
855
856 void __init stop_timer_interrupt(void)
857 {
858 char *name;
859 if (vxtime.hpet_address) {
860 name = "HPET";
861 hpet_timer_stop_set_go(0);
862 } else {
863 name = "PIT";
864 pit_stop_interrupt();
865 }
866 printk(KERN_INFO "timer: %s interrupt stopped.\n", name);
867 }
868
869 int __init time_setup(char *str)
870 {
871 report_lost_ticks = 1;
872 return 1;
873 }
874
875 static struct irqaction irq0 = {
876 timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL
877 };
878
879 static int __cpuinit
880 time_cpu_notifier(struct notifier_block *nb, unsigned long action, void *hcpu)
881 {
882 unsigned cpu = (unsigned long) hcpu;
883 if (action == CPU_ONLINE)
884 vsyscall_set_cpu(cpu);
885 return NOTIFY_DONE;
886 }
887
888 void __init time_init(void)
889 {
890 if (nohpet)
891 vxtime.hpet_address = 0;
892
893 xtime.tv_sec = get_cmos_time();
894 xtime.tv_nsec = 0;
895
896 set_normalized_timespec(&wall_to_monotonic,
897 -xtime.tv_sec, -xtime.tv_nsec);
898
899 if (!hpet_init())
900 vxtime_hz = (FSEC_PER_SEC + hpet_period / 2) / hpet_period;
901 else
902 vxtime.hpet_address = 0;
903
904 if (hpet_use_timer) {
905 /* set tick_nsec to use the proper rate for HPET */
906 tick_nsec = TICK_NSEC_HPET;
907 cpu_khz = hpet_calibrate_tsc();
908 timename = "HPET";
909 #ifdef CONFIG_X86_PM_TIMER
910 } else if (pmtmr_ioport && !vxtime.hpet_address) {
911 vxtime_hz = PM_TIMER_FREQUENCY;
912 timename = "PM";
913 pit_init();
914 cpu_khz = pit_calibrate_tsc();
915 #endif
916 } else {
917 pit_init();
918 cpu_khz = pit_calibrate_tsc();
919 timename = "PIT";
920 }
921
922 vxtime.mode = VXTIME_TSC;
923 vxtime.quot = (USEC_PER_SEC << US_SCALE) / vxtime_hz;
924 vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
925 vxtime.last_tsc = get_cycles_sync();
926 set_cyc2ns_scale(cpu_khz);
927 setup_irq(0, &irq0);
928 hotcpu_notifier(time_cpu_notifier, 0);
929 time_cpu_notifier(NULL, CPU_ONLINE, (void *)(long)smp_processor_id());
930
931 #ifndef CONFIG_SMP
932 time_init_gtod();
933 #endif
934 }
935
936 /*
937 * Make an educated guess if the TSC is trustworthy and synchronized
938 * over all CPUs.
939 */
940 __cpuinit int unsynchronized_tsc(void)
941 {
942 #ifdef CONFIG_SMP
943 if (apic_is_clustered_box())
944 return 1;
945 #endif
946 /* Most intel systems have synchronized TSCs except for
947 multi node systems */
948 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
949 #ifdef CONFIG_ACPI
950 /* But TSC doesn't tick in C3 so don't use it there */
951 if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100)
952 return 1;
953 #endif
954 return 0;
955 }
956
957 /* Assume multi socket systems are not synchronized */
958 return num_present_cpus() > 1;
959 }
960
961 /*
962 * Decide what mode gettimeofday should use.
963 */
964 void time_init_gtod(void)
965 {
966 char *timetype;
967
968 if (unsynchronized_tsc())
969 notsc = 1;
970
971 if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP))
972 vgetcpu_mode = VGETCPU_RDTSCP;
973 else
974 vgetcpu_mode = VGETCPU_LSL;
975
976 if (vxtime.hpet_address && notsc) {
977 timetype = hpet_use_timer ? "HPET" : "PIT/HPET";
978 if (hpet_use_timer)
979 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
980 else
981 vxtime.last = hpet_readl(HPET_COUNTER);
982 vxtime.mode = VXTIME_HPET;
983 do_gettimeoffset = do_gettimeoffset_hpet;
984 #ifdef CONFIG_X86_PM_TIMER
985 /* Using PM for gettimeofday is quite slow, but we have no other
986 choice because the TSC is too unreliable on some systems. */
987 } else if (pmtmr_ioport && !vxtime.hpet_address && notsc) {
988 timetype = "PM";
989 do_gettimeoffset = do_gettimeoffset_pm;
990 vxtime.mode = VXTIME_PMTMR;
991 sysctl_vsyscall = 0;
992 printk(KERN_INFO "Disabling vsyscall due to use of PM timer\n");
993 #endif
994 } else {
995 timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC";
996 vxtime.mode = VXTIME_TSC;
997 }
998
999 printk(KERN_INFO "time.c: Using %ld.%06ld MHz WALL %s GTOD %s timer.\n",
1000 vxtime_hz / 1000000, vxtime_hz % 1000000, timename, timetype);
1001 printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
1002 cpu_khz / 1000, cpu_khz % 1000);
1003 vxtime.quot = (USEC_PER_SEC << US_SCALE) / vxtime_hz;
1004 vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
1005 vxtime.last_tsc = get_cycles_sync();
1006
1007 set_cyc2ns_scale(cpu_khz);
1008 }
1009
1010 __setup("report_lost_ticks", time_setup);
1011
1012 static long clock_cmos_diff;
1013 static unsigned long sleep_start;
1014
1015 /*
1016 * sysfs support for the timer.
1017 */
1018
1019 static int timer_suspend(struct sys_device *dev, pm_message_t state)
1020 {
1021 /*
1022 * Estimate time zone so that set_time can update the clock
1023 */
1024 long cmos_time = get_cmos_time();
1025
1026 clock_cmos_diff = -cmos_time;
1027 clock_cmos_diff += get_seconds();
1028 sleep_start = cmos_time;
1029 return 0;
1030 }
1031
1032 static int timer_resume(struct sys_device *dev)
1033 {
1034 unsigned long flags;
1035 unsigned long sec;
1036 unsigned long ctime = get_cmos_time();
1037 long sleep_length = (ctime - sleep_start) * HZ;
1038
1039 if (sleep_length < 0) {
1040 printk(KERN_WARNING "Time skew detected in timer resume!\n");
1041 /* The time after the resume must not be earlier than the time
1042 * before the suspend or some nasty things will happen
1043 */
1044 sleep_length = 0;
1045 ctime = sleep_start;
1046 }
1047 if (vxtime.hpet_address)
1048 hpet_reenable();
1049 else
1050 i8254_timer_resume();
1051
1052 sec = ctime + clock_cmos_diff;
1053 write_seqlock_irqsave(&xtime_lock,flags);
1054 xtime.tv_sec = sec;
1055 xtime.tv_nsec = 0;
1056 if (vxtime.mode == VXTIME_HPET) {
1057 if (hpet_use_timer)
1058 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
1059 else
1060 vxtime.last = hpet_readl(HPET_COUNTER);
1061 #ifdef CONFIG_X86_PM_TIMER
1062 } else if (vxtime.mode == VXTIME_PMTMR) {
1063 pmtimer_resume();
1064 #endif
1065 } else
1066 vxtime.last_tsc = get_cycles_sync();
1067 write_sequnlock_irqrestore(&xtime_lock,flags);
1068 jiffies += sleep_length;
1069 monotonic_base += sleep_length * (NSEC_PER_SEC/HZ);
1070 touch_softlockup_watchdog();
1071 return 0;
1072 }
1073
1074 static struct sysdev_class timer_sysclass = {
1075 .resume = timer_resume,
1076 .suspend = timer_suspend,
1077 set_kset_name("timer"),
1078 };
1079
1080 /* XXX this driverfs stuff should probably go elsewhere later -john */
1081 static struct sys_device device_timer = {
1082 .id = 0,
1083 .cls = &timer_sysclass,
1084 };
1085
1086 static int time_init_device(void)
1087 {
1088 int error = sysdev_class_register(&timer_sysclass);
1089 if (!error)
1090 error = sysdev_register(&device_timer);
1091 return error;
1092 }
1093
1094 device_initcall(time_init_device);
1095
1096 #ifdef CONFIG_HPET_EMULATE_RTC
1097 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
1098 * is enabled, we support RTC interrupt functionality in software.
1099 * RTC has 3 kinds of interrupts:
1100 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
1101 * is updated
1102 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
1103 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
1104 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
1105 * (1) and (2) above are implemented using polling at a frequency of
1106 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
1107 * overhead. (DEFAULT_RTC_INT_FREQ)
1108 * For (3), we use interrupts at 64Hz or user specified periodic
1109 * frequency, whichever is higher.
1110 */
1111 #include <linux/rtc.h>
1112
1113 #define DEFAULT_RTC_INT_FREQ 64
1114 #define RTC_NUM_INTS 1
1115
1116 static unsigned long UIE_on;
1117 static unsigned long prev_update_sec;
1118
1119 static unsigned long AIE_on;
1120 static struct rtc_time alarm_time;
1121
1122 static unsigned long PIE_on;
1123 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
1124 static unsigned long PIE_count;
1125
1126 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
1127 static unsigned int hpet_t1_cmp; /* cached comparator register */
1128
1129 int is_hpet_enabled(void)
1130 {
1131 return vxtime.hpet_address != 0;
1132 }
1133
1134 /*
1135 * Timer 1 for RTC, we do not use periodic interrupt feature,
1136 * even if HPET supports periodic interrupts on Timer 1.
1137 * The reason being, to set up a periodic interrupt in HPET, we need to
1138 * stop the main counter. And if we do that everytime someone diables/enables
1139 * RTC, we will have adverse effect on main kernel timer running on Timer 0.
1140 * So, for the time being, simulate the periodic interrupt in software.
1141 *
1142 * hpet_rtc_timer_init() is called for the first time and during subsequent
1143 * interuppts reinit happens through hpet_rtc_timer_reinit().
1144 */
1145 int hpet_rtc_timer_init(void)
1146 {
1147 unsigned int cfg, cnt;
1148 unsigned long flags;
1149
1150 if (!is_hpet_enabled())
1151 return 0;
1152 /*
1153 * Set the counter 1 and enable the interrupts.
1154 */
1155 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1156 hpet_rtc_int_freq = PIE_freq;
1157 else
1158 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1159
1160 local_irq_save(flags);
1161
1162 cnt = hpet_readl(HPET_COUNTER);
1163 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
1164 hpet_writel(cnt, HPET_T1_CMP);
1165 hpet_t1_cmp = cnt;
1166
1167 cfg = hpet_readl(HPET_T1_CFG);
1168 cfg &= ~HPET_TN_PERIODIC;
1169 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1170 hpet_writel(cfg, HPET_T1_CFG);
1171
1172 local_irq_restore(flags);
1173
1174 return 1;
1175 }
1176
1177 static void hpet_rtc_timer_reinit(void)
1178 {
1179 unsigned int cfg, cnt, ticks_per_int, lost_ints;
1180
1181 if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
1182 cfg = hpet_readl(HPET_T1_CFG);
1183 cfg &= ~HPET_TN_ENABLE;
1184 hpet_writel(cfg, HPET_T1_CFG);
1185 return;
1186 }
1187
1188 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1189 hpet_rtc_int_freq = PIE_freq;
1190 else
1191 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1192
1193 /* It is more accurate to use the comparator value than current count.*/
1194 ticks_per_int = hpet_tick * HZ / hpet_rtc_int_freq;
1195 hpet_t1_cmp += ticks_per_int;
1196 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
1197
1198 /*
1199 * If the interrupt handler was delayed too long, the write above tries
1200 * to schedule the next interrupt in the past and the hardware would
1201 * not interrupt until the counter had wrapped around.
1202 * So we have to check that the comparator wasn't set to a past time.
1203 */
1204 cnt = hpet_readl(HPET_COUNTER);
1205 if (unlikely((int)(cnt - hpet_t1_cmp) > 0)) {
1206 lost_ints = (cnt - hpet_t1_cmp) / ticks_per_int + 1;
1207 /* Make sure that, even with the time needed to execute
1208 * this code, the next scheduled interrupt has been moved
1209 * back to the future: */
1210 lost_ints++;
1211
1212 hpet_t1_cmp += lost_ints * ticks_per_int;
1213 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
1214
1215 if (PIE_on)
1216 PIE_count += lost_ints;
1217
1218 printk(KERN_WARNING "rtc: lost some interrupts at %ldHz.\n",
1219 hpet_rtc_int_freq);
1220 }
1221 }
1222
1223 /*
1224 * The functions below are called from rtc driver.
1225 * Return 0 if HPET is not being used.
1226 * Otherwise do the necessary changes and return 1.
1227 */
1228 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1229 {
1230 if (!is_hpet_enabled())
1231 return 0;
1232
1233 if (bit_mask & RTC_UIE)
1234 UIE_on = 0;
1235 if (bit_mask & RTC_PIE)
1236 PIE_on = 0;
1237 if (bit_mask & RTC_AIE)
1238 AIE_on = 0;
1239
1240 return 1;
1241 }
1242
1243 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1244 {
1245 int timer_init_reqd = 0;
1246
1247 if (!is_hpet_enabled())
1248 return 0;
1249
1250 if (!(PIE_on | AIE_on | UIE_on))
1251 timer_init_reqd = 1;
1252
1253 if (bit_mask & RTC_UIE) {
1254 UIE_on = 1;
1255 }
1256 if (bit_mask & RTC_PIE) {
1257 PIE_on = 1;
1258 PIE_count = 0;
1259 }
1260 if (bit_mask & RTC_AIE) {
1261 AIE_on = 1;
1262 }
1263
1264 if (timer_init_reqd)
1265 hpet_rtc_timer_init();
1266
1267 return 1;
1268 }
1269
1270 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
1271 {
1272 if (!is_hpet_enabled())
1273 return 0;
1274
1275 alarm_time.tm_hour = hrs;
1276 alarm_time.tm_min = min;
1277 alarm_time.tm_sec = sec;
1278
1279 return 1;
1280 }
1281
1282 int hpet_set_periodic_freq(unsigned long freq)
1283 {
1284 if (!is_hpet_enabled())
1285 return 0;
1286
1287 PIE_freq = freq;
1288 PIE_count = 0;
1289
1290 return 1;
1291 }
1292
1293 int hpet_rtc_dropped_irq(void)
1294 {
1295 if (!is_hpet_enabled())
1296 return 0;
1297
1298 return 1;
1299 }
1300
1301 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1302 {
1303 struct rtc_time curr_time;
1304 unsigned long rtc_int_flag = 0;
1305 int call_rtc_interrupt = 0;
1306
1307 hpet_rtc_timer_reinit();
1308
1309 if (UIE_on | AIE_on) {
1310 rtc_get_rtc_time(&curr_time);
1311 }
1312 if (UIE_on) {
1313 if (curr_time.tm_sec != prev_update_sec) {
1314 /* Set update int info, call real rtc int routine */
1315 call_rtc_interrupt = 1;
1316 rtc_int_flag = RTC_UF;
1317 prev_update_sec = curr_time.tm_sec;
1318 }
1319 }
1320 if (PIE_on) {
1321 PIE_count++;
1322 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
1323 /* Set periodic int info, call real rtc int routine */
1324 call_rtc_interrupt = 1;
1325 rtc_int_flag |= RTC_PF;
1326 PIE_count = 0;
1327 }
1328 }
1329 if (AIE_on) {
1330 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
1331 (curr_time.tm_min == alarm_time.tm_min) &&
1332 (curr_time.tm_hour == alarm_time.tm_hour)) {
1333 /* Set alarm int info, call real rtc int routine */
1334 call_rtc_interrupt = 1;
1335 rtc_int_flag |= RTC_AF;
1336 }
1337 }
1338 if (call_rtc_interrupt) {
1339 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1340 rtc_interrupt(rtc_int_flag, dev_id, regs);
1341 }
1342 return IRQ_HANDLED;
1343 }
1344 #endif
1345
1346 static int __init nohpet_setup(char *s)
1347 {
1348 nohpet = 1;
1349 return 1;
1350 }
1351
1352 __setup("nohpet", nohpet_setup);
1353
1354 int __init notsc_setup(char *s)
1355 {
1356 notsc = 1;
1357 return 1;
1358 }
1359
1360 __setup("notsc", notsc_setup);