]>
git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blob - arch/xtensa/include/asm/futex.h
2 * Atomic futex routines
4 * Based on the PowerPC implementataion
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Copyright (C) 2013 TangoTec Ltd.
12 * Baruch Siach <baruch@tkos.co.il>
15 #ifndef _ASM_XTENSA_FUTEX_H
16 #define _ASM_XTENSA_FUTEX_H
18 #include <linux/futex.h>
19 #include <linux/uaccess.h>
20 #include <linux/errno.h>
22 #if XCHAL_HAVE_EXCLUSIVE
23 #define __futex_atomic_op(insn, ret, old, uaddr, arg) \
25 "1: l32ex %[oldval], %[addr]\n" \
27 "2: s32ex %[newval], %[addr]\n" \
28 " getex %[newval]\n" \
29 " beqz %[newval], 1b\n" \
30 " movi %[newval], 0\n" \
32 " .section .fixup,\"ax\"\n" \
34 " .literal_position\n" \
35 "5: movi %[oldval], 3b\n" \
36 " movi %[newval], %[fault]\n" \
39 " .section __ex_table,\"a\"\n" \
40 " .long 1b, 5b, 2b, 5b\n" \
42 : [oldval] "=&r" (old), [newval] "=&r" (ret) \
43 : [addr] "r" (uaddr), [oparg] "r" (arg), \
44 [fault] "I" (-EFAULT) \
46 #elif XCHAL_HAVE_S32C1I
47 #define __futex_atomic_op(insn, ret, old, uaddr, arg) \
49 "1: l32i %[oldval], %[addr], 0\n" \
51 " wsr %[oldval], scompare1\n" \
52 "2: s32c1i %[newval], %[addr], 0\n" \
53 " bne %[newval], %[oldval], 1b\n" \
54 " movi %[newval], 0\n" \
56 " .section .fixup,\"ax\"\n" \
58 " .literal_position\n" \
59 "5: movi %[oldval], 3b\n" \
60 " movi %[newval], %[fault]\n" \
63 " .section __ex_table,\"a\"\n" \
64 " .long 1b, 5b, 2b, 5b\n" \
66 : [oldval] "=&r" (old), [newval] "=&r" (ret) \
67 : [addr] "r" (uaddr), [oparg] "r" (arg), \
68 [fault] "I" (-EFAULT) \
72 static inline int arch_futex_atomic_op_inuser(int op
, int oparg
, int *oval
,
75 #if XCHAL_HAVE_S32C1I || XCHAL_HAVE_EXCLUSIVE
82 __futex_atomic_op("mov %[newval], %[oparg]",
83 ret
, oldval
, uaddr
, oparg
);
86 __futex_atomic_op("add %[newval], %[oldval], %[oparg]",
87 ret
, oldval
, uaddr
, oparg
);
90 __futex_atomic_op("or %[newval], %[oldval], %[oparg]",
91 ret
, oldval
, uaddr
, oparg
);
94 __futex_atomic_op("and %[newval], %[oldval], %[oparg]",
95 ret
, oldval
, uaddr
, ~oparg
);
98 __futex_atomic_op("xor %[newval], %[oldval], %[oparg]",
99 ret
, oldval
, uaddr
, oparg
);
117 futex_atomic_cmpxchg_inatomic(u32
*uval
, u32 __user
*uaddr
,
118 u32 oldval
, u32 newval
)
120 #if XCHAL_HAVE_S32C1I || XCHAL_HAVE_EXCLUSIVE
124 if (!access_ok(uaddr
, sizeof(u32
)))
127 __asm__
__volatile__ (
128 " # futex_atomic_cmpxchg_inatomic\n"
129 #if XCHAL_HAVE_EXCLUSIVE
130 "1: l32ex %[tmp], %[addr]\n"
131 " s32i %[tmp], %[uval], 0\n"
132 " bne %[tmp], %[oldval], 2f\n"
133 " mov %[tmp], %[newval]\n"
134 "3: s32ex %[tmp], %[addr]\n"
137 #elif XCHAL_HAVE_S32C1I
138 " wsr %[oldval], scompare1\n"
139 "1: s32c1i %[newval], %[addr], 0\n"
140 " s32i %[newval], %[uval], 0\n"
143 " .section .fixup,\"ax\"\n"
145 " .literal_position\n"
146 "4: movi %[tmp], 2b\n"
147 " movi %[ret], %[fault]\n"
150 " .section __ex_table,\"a\"\n"
152 #if XCHAL_HAVE_EXCLUSIVE
156 : [ret
] "+r" (ret
), [newval
] "+r" (newval
), [tmp
] "=&r" (tmp
)
157 : [addr
] "r" (uaddr
), [oldval
] "r" (oldval
), [uval
] "r" (uval
),
158 [fault
] "I" (-EFAULT
)
167 #endif /* _ASM_XTENSA_FUTEX_H */