arch/xtensa/platforms/xtfpga/setup.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  * arch/xtensa/platform/xtavnet/setup.c
   5  *
   6  * ...
   7  *
   8  * Authors:     Chris Zankel <chris@zankel.net>
   9  *              Joe Taylor <joe@tensilica.com>
  10  *
  11  * Copyright 2001 - 2006 Tensilica Inc.
  12  */
  13 #include <linux/stddef.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/io.h>
  17 #include <linux/errno.h>
  18 #include <linux/reboot.h>
  19 #include <linux/kdev_t.h>
  20 #include <linux/types.h>
  21 #include <linux/major.h>
  22 #include <linux/console.h>
  23 #include <linux/delay.h>
  24 #include <linux/of.h>
  25 #include <linux/clk-provider.h>
  26 #include <linux/of_address.h>
  27
  28 #include <asm/timex.h>
  29 #include <asm/processor.h>
  30 #include <asm/platform.h>
  31 #include <asm/bootparam.h>
  32 #include <platform/lcd.h>
  33 #include <platform/hardware.h>
  34
  35 void platform_halt(void)
  36 {
  37         lcd_disp_at_pos(" HALT ", 0);
  38         local_irq_disable();
  39         while (1)
  40                 cpu_relax();
  41 }
  42
  43 void platform_power_off(void)
  44 {
  45         lcd_disp_at_pos("POWEROFF", 0);
  46         local_irq_disable();
  47         while (1)
  48                 cpu_relax();
  49 }
  50
  51 void platform_restart(void)
  52 {
  53         /* Flush and reset the mmu, simulate a processor reset, and
  54          * jump to the reset vector. */
  55         cpu_reset();
  56         /* control never gets here */
  57 }
  58
  59 void __init platform_setup(char **cmdline)
  60 {
  61 }
  62
  63 /* early initialization */
  64
  65 void __init platform_init(bp_tag_t *first)
  66 {
  67 }
  68
  69 /* Heartbeat. */
  70
  71 void platform_heartbeat(void)
  72 {
  73 }
  74
  75 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
  76
  77 void __init platform_calibrate_ccount(void)
  78 {
  79         ccount_freq = *(long *)XTFPGA_CLKFRQ_VADDR;
  80 }
  81
  82 #endif
  83
  84 #ifdef CONFIG_OF
  85
  86 static void __init xtfpga_clk_setup(struct device_node *np)
  87 {
  88         void __iomem *base = of_iomap(np, 0);
  89         struct clk *clk;
  90         u32 freq;
  91
  92         if (!base) {
  93                 pr_err("%pOFn: invalid address\n", np);
  94                 return;
  95         }
  96
  97         freq = __raw_readl(base);
  98         iounmap(base);
  99         clk = clk_register_fixed_rate(NULL, np->name, NULL, 0, freq);
 100
 101         if (IS_ERR(clk)) {
 102                 pr_err("%pOFn: clk registration failed\n", np);
 103                 return;
 104         }
 105
 106         if (of_clk_add_provider(np, of_clk_src_simple_get, clk)) {
 107                 pr_err("%pOFn: clk provider registration failed\n", np);
 108                 return;
 109         }
 110 }
 111 CLK_OF_DECLARE(xtfpga_clk, "cdns,xtfpga-clock", xtfpga_clk_setup);
 112
 113 #define MAC_LEN 6
 114 static void __init update_local_mac(struct device_node *node)
 115 {
 116         struct property *newmac;
 117         const u8* macaddr;
 118         int prop_len;
 119
 120         macaddr = of_get_property(node, "local-mac-address", &prop_len);
 121         if (macaddr == NULL || prop_len != MAC_LEN)
 122                 return;
 123
 124         newmac = kzalloc(sizeof(*newmac) + MAC_LEN, GFP_KERNEL);
 125         if (newmac == NULL)
 126                 return;
 127
 128         newmac->value = newmac + 1;
 129         newmac->length = MAC_LEN;
 130         newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
 131         if (newmac->name == NULL) {
 132                 kfree(newmac);
 133                 return;
 134         }
 135
 136         memcpy(newmac->value, macaddr, MAC_LEN);
 137         ((u8*)newmac->value)[5] = (*(u32*)DIP_SWITCHES_VADDR) & 0x3f;
 138         of_update_property(node, newmac);
 139 }
 140
 141 static int __init machine_setup(void)
 142 {
 143         struct device_node *eth = NULL;
 144
 145         if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc")))
 146                 update_local_mac(eth);
 147         return 0;
 148 }
 149 arch_initcall(machine_setup);
 150
 151 #else
 152
 153 #include <linux/serial_8250.h>
 154 #include <linux/if.h>
 155 #include <net/ethoc.h>
 156 #include <linux/usb/c67x00.h>
 157
 158 /*----------------------------------------------------------------------------
 159  *  Ethernet -- OpenCores Ethernet MAC (ethoc driver)
 160  */
 161
 162 static struct resource ethoc_res[] = {
 163         [0] = { /* register space */
 164                 .start = OETH_REGS_PADDR,
 165                 .end   = OETH_REGS_PADDR + OETH_REGS_SIZE - 1,
 166                 .flags = IORESOURCE_MEM,
 167         },
 168         [1] = { /* buffer space */
 169                 .start = OETH_SRAMBUFF_PADDR,
 170                 .end   = OETH_SRAMBUFF_PADDR + OETH_SRAMBUFF_SIZE - 1,
 171                 .flags = IORESOURCE_MEM,
 172         },
 173         [2] = { /* IRQ number */
 174                 .start = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
 175                 .end   = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
 176                 .flags = IORESOURCE_IRQ,
 177         },
 178 };
 179
 180 static struct ethoc_platform_data ethoc_pdata = {
 181         /*
 182          * The MAC address for these boards is 00:50:c2:13:6f:xx.
 183          * The last byte (here as zero) is read from the DIP switches on the
 184          * board.
 185          */
 186         .hwaddr = { 0x00, 0x50, 0xc2, 0x13, 0x6f, 0 },
 187         .phy_id = -1,
 188         .big_endian = XCHAL_HAVE_BE,
 189 };
 190
 191 static struct platform_device ethoc_device = {
 192         .name = "ethoc",
 193         .id = -1,
 194         .num_resources = ARRAY_SIZE(ethoc_res),
 195         .resource = ethoc_res,
 196         .dev = {
 197                 .platform_data = &ethoc_pdata,
 198         },
 199 };
 200
 201 /*----------------------------------------------------------------------------
 202  *  USB Host/Device -- Cypress CY7C67300
 203  */
 204
 205 static struct resource c67x00_res[] = {
 206         [0] = { /* register space */
 207                 .start = C67X00_PADDR,
 208                 .end   = C67X00_PADDR + C67X00_SIZE - 1,
 209                 .flags = IORESOURCE_MEM,
 210         },
 211         [1] = { /* IRQ number */
 212                 .start = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
 213                 .end   = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
 214                 .flags = IORESOURCE_IRQ,
 215         },
 216 };
 217
 218 static struct c67x00_platform_data c67x00_pdata = {
 219         .sie_config = C67X00_SIE1_HOST | C67X00_SIE2_UNUSED,
 220         .hpi_regstep = 4,
 221 };
 222
 223 static struct platform_device c67x00_device = {
 224         .name = "c67x00",
 225         .id = -1,
 226         .num_resources = ARRAY_SIZE(c67x00_res),
 227         .resource = c67x00_res,
 228         .dev = {
 229                 .platform_data = &c67x00_pdata,
 230         },
 231 };
 232
 233 /*----------------------------------------------------------------------------
 234  *  UART
 235  */
 236
 237 static struct resource serial_resource = {
 238         .start  = DUART16552_PADDR,
 239         .end    = DUART16552_PADDR + 0x1f,
 240         .flags  = IORESOURCE_MEM,
 241 };
 242
 243 static struct plat_serial8250_port serial_platform_data[] = {
 244         [0] = {
 245                 .mapbase        = DUART16552_PADDR,
 246                 .irq            = XTENSA_PIC_LINUX_IRQ(DUART16552_INTNUM),
 247                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
 248                                   UPF_IOREMAP,
 249                 .iotype         = XCHAL_HAVE_BE ? UPIO_MEM32BE : UPIO_MEM32,
 250                 .regshift       = 2,
 251                 .uartclk        = 0,    /* set in xtavnet_init() */
 252         },
 253         { },
 254 };
 255
 256 static struct platform_device xtavnet_uart = {
 257         .name           = "serial8250",
 258         .id             = PLAT8250_DEV_PLATFORM,
 259         .dev            = {
 260                 .platform_data  = serial_platform_data,
 261         },
 262         .num_resources  = 1,
 263         .resource       = &serial_resource,
 264 };
 265
 266 /* platform devices */
 267 static struct platform_device *platform_devices[] __initdata = {
 268         &ethoc_device,
 269         &c67x00_device,
 270         &xtavnet_uart,
 271 };
 272
 273
 274 static int __init xtavnet_init(void)
 275 {
 276         /* Ethernet MAC address.  */
 277         ethoc_pdata.hwaddr[5] = *(u32 *)DIP_SWITCHES_VADDR;
 278
 279         /* Clock rate varies among FPGA bitstreams; board specific FPGA register
 280          * reports the actual clock rate.
 281          */
 282         serial_platform_data[0].uartclk = *(long *)XTFPGA_CLKFRQ_VADDR;
 283
 284
 285         /* register platform devices */
 286         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 287
 288         /* ETHOC driver is a bit quiet; at least display Ethernet MAC, so user
 289          * knows whether they set it correctly on the DIP switches.
 290          */
 291         pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr);
 292         ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR;
 293
 294         return 0;
 295 }
 296
 297 /*
 298  * Register to be done during do_initcalls().
 299  */
 300 arch_initcall(xtavnet_init);
 301
 302 #endif /* CONFIG_OF */