2 * arm cpu init and loop
4 * Copyright (c) 2013 Stacey D. Son
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
20 #ifndef _TARGET_ARCH_CPU_H_
21 #define _TARGET_ARCH_CPU_H_
23 #include "target_arch.h"
24 #include "signal-common.h"
26 #define TARGET_DEFAULT_CPU_MODEL "any"
28 static inline void target_cpu_init(CPUARMState
*env
,
29 struct target_pt_regs
*regs
)
33 cpsr_write(env
, regs
->uregs
[16], CPSR_USER
| CPSR_EXEC
,
35 for (i
= 0; i
< 16; i
++) {
36 env
->regs
[i
] = regs
->uregs
[i
];
40 static inline void target_cpu_loop(CPUARMState
*env
)
42 int trapnr
, si_signo
, si_code
;
44 CPUState
*cs
= env_cpu(env
);
48 trapnr
= cpu_exec(cs
);
50 process_queued_cpu_work(cs
);
56 * See arm/arm/undefined.c undefinedinstruction();
58 * A number of details aren't emulated (they likely don't matter):
59 * o Misaligned PC generates ILL_ILLADR (these can't come from qemu)
60 * o Thumb-2 instructions generate ILLADR
61 * o Both modes implement coprocessor instructions, which we don't
62 * do here. FreeBSD just implements them for the VFP coprocessor
63 * and special kernel breakpoints, trace points, dtrace, etc.
65 force_sig_fault(TARGET_SIGILL
, TARGET_ILL_ILLOPC
, env
->regs
[15]);
70 if (bsd_type
== target_freebsd
) {
72 abi_ulong params
= get_sp_from_cpustate(env
);
73 int32_t syscall_nr
= n
;
74 int32_t arg1
, arg2
, arg3
, arg4
, arg5
, arg6
, arg7
, arg8
;
76 /* See arm/arm/syscall.c cpu_fetch_syscall_args() */
77 if (syscall_nr
== TARGET_FREEBSD_NR_syscall
) {
78 syscall_nr
= env
->regs
[0];
82 get_user_s32(arg4
, params
);
83 params
+= sizeof(int32_t);
84 get_user_s32(arg5
, params
);
85 params
+= sizeof(int32_t);
86 get_user_s32(arg6
, params
);
87 params
+= sizeof(int32_t);
88 get_user_s32(arg7
, params
);
90 } else if (syscall_nr
== TARGET_FREEBSD_NR___syscall
) {
91 syscall_nr
= env
->regs
[0];
94 get_user_s32(arg3
, params
);
95 params
+= sizeof(int32_t);
96 get_user_s32(arg4
, params
);
97 params
+= sizeof(int32_t);
98 get_user_s32(arg5
, params
);
99 params
+= sizeof(int32_t);
100 get_user_s32(arg6
, params
);
108 get_user_s32(arg5
, params
);
109 params
+= sizeof(int32_t);
110 get_user_s32(arg6
, params
);
111 params
+= sizeof(int32_t);
112 get_user_s32(arg7
, params
);
113 params
+= sizeof(int32_t);
114 get_user_s32(arg8
, params
);
116 ret
= do_freebsd_syscall(env
, syscall_nr
, arg1
, arg2
, arg3
,
117 arg4
, arg5
, arg6
, arg7
, arg8
);
119 * Compare to arm/arm/vm_machdep.c
120 * cpu_set_syscall_retval()
122 if (-TARGET_EJUSTRETURN
== ret
) {
124 * Returning from a successful sigreturn syscall.
125 * Avoid clobbering register state.
129 if (-TARGET_ERESTART
== ret
) {
130 env
->regs
[15] -= env
->thumb
? 2 : 4;
133 if ((unsigned int)ret
>= (unsigned int)(-515)) {
135 cpsr_write(env
, CPSR_C
, CPSR_C
, CPSRWriteByInstr
);
138 cpsr_write(env
, 0, CPSR_C
, CPSRWriteByInstr
);
139 env
->regs
[0] = ret
; /* XXX need to handle lseek()? */
140 /* env->regs[1] = 0; */
143 fprintf(stderr
, "qemu: bsd_type (= %d) syscall "
144 "not supported\n", bsd_type
);
149 /* just indicate that signals should be handled asap */
151 case EXCP_PREFETCH_ABORT
:
152 case EXCP_DATA_ABORT
:
154 * See arm/arm/trap-v6.c prefetch_abort_handler() and
155 * data_abort_handler()
157 * However, FreeBSD maps these to a generic value and then uses that
158 * to maybe fault in pages in vm/vm_fault.c:vm_fault_trap(). I
159 * believe that the indirection maps the same as Linux, but haven't
160 * chased down every single possible indirection.
163 /* For user-only we don't set TTBCR_EAE, so look at the FSR. */
164 switch (env
->exception
.fsr
& 0x1f) {
165 case 0x1: /* Alignment */
166 si_signo
= TARGET_SIGBUS
;
167 si_code
= TARGET_BUS_ADRALN
;
169 case 0x3: /* Access flag fault, level 1 */
170 case 0x6: /* Access flag fault, level 2 */
171 case 0x9: /* Domain fault, level 1 */
172 case 0xb: /* Domain fault, level 2 */
173 case 0xd: /* Permission fault, level 1 */
174 case 0xf: /* Permission fault, level 2 */
175 si_signo
= TARGET_SIGSEGV
;
176 si_code
= TARGET_SEGV_ACCERR
;
178 case 0x5: /* Translation fault, level 1 */
179 case 0x7: /* Translation fault, level 2 */
180 si_signo
= TARGET_SIGSEGV
;
181 si_code
= TARGET_SEGV_MAPERR
;
184 g_assert_not_reached();
186 force_sig_fault(si_signo
, si_code
, env
->exception
.vaddress
);
190 force_sig_fault(TARGET_SIGTRAP
, TARGET_TRAP_BRKPT
, env
->regs
[15]);
193 /* nothing to do here for user-mode, just resume guest code */
196 cpu_exec_step_atomic(cs
);
199 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
201 cpu_dump_state(cs
, stderr
, 0);
204 process_pending_signals(env
);
208 static inline void target_cpu_clone_regs(CPUARMState
*env
, target_ulong newsp
)
211 env
->regs
[13] = newsp
;
216 static inline void target_cpu_reset(CPUArchState
*env
)
220 #endif /* !_TARGET_ARCH_CPU_H */