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1 /*
2 * i386 cpu init and loop
3 *
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, see <http://www.gnu.org/licenses/>.
17 */
18
19 #ifndef _TARGET_ARCH_CPU_H_
20 #define _TARGET_ARCH_CPU_H_
21
22 #include "target_arch.h"
23
24 #define TARGET_DEFAULT_CPU_MODEL "qemu32"
25
26 #define TARGET_CPU_RESET(cpu)
27
28 static inline void target_cpu_init(CPUX86State *env,
29 struct target_pt_regs *regs)
30 {
31 uint64_t *gdt_table;
32
33 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
34 env->hflags |= HF_PE_MASK | HF_CPL_MASK;
35 if (env->features[FEAT_1_EDX] & CPUID_SSE) {
36 env->cr[4] |= CR4_OSFXSR_MASK;
37 env->hflags |= HF_OSFXSR_MASK;
38 }
39
40 /* flags setup : we activate the IRQs by default as in user mode */
41 env->eflags |= IF_MASK;
42
43 /* register setup */
44 env->regs[R_EAX] = regs->eax;
45 env->regs[R_EBX] = regs->ebx;
46 env->regs[R_ECX] = regs->ecx;
47 env->regs[R_EDX] = regs->edx;
48 env->regs[R_ESI] = regs->esi;
49 env->regs[R_EDI] = regs->edi;
50 env->regs[R_EBP] = regs->ebp;
51 env->regs[R_ESP] = regs->esp;
52 env->eip = regs->eip;
53
54 /* interrupt setup */
55 env->idt.limit = 255;
56
57 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
58 PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
59 bsd_i386_set_idt_base(env->idt.base);
60 bsd_i386_set_idt(0, 0);
61 bsd_i386_set_idt(1, 0);
62 bsd_i386_set_idt(2, 0);
63 bsd_i386_set_idt(3, 3);
64 bsd_i386_set_idt(4, 3);
65 bsd_i386_set_idt(5, 0);
66 bsd_i386_set_idt(6, 0);
67 bsd_i386_set_idt(7, 0);
68 bsd_i386_set_idt(8, 0);
69 bsd_i386_set_idt(9, 0);
70 bsd_i386_set_idt(10, 0);
71 bsd_i386_set_idt(11, 0);
72 bsd_i386_set_idt(12, 0);
73 bsd_i386_set_idt(13, 0);
74 bsd_i386_set_idt(14, 0);
75 bsd_i386_set_idt(15, 0);
76 bsd_i386_set_idt(16, 0);
77 bsd_i386_set_idt(17, 0);
78 bsd_i386_set_idt(18, 0);
79 bsd_i386_set_idt(19, 0);
80 bsd_i386_set_idt(0x80, 3);
81
82 /* segment setup */
83 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
84 PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
85 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
86 gdt_table = g2h_untagged(env->gdt.base);
87
88 bsd_i386_write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
89 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
90 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
91
92 bsd_i386_write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
93 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
94 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
95
96 cpu_x86_load_seg(env, R_CS, __USER_CS);
97 cpu_x86_load_seg(env, R_SS, __USER_DS);
98 cpu_x86_load_seg(env, R_DS, __USER_DS);
99 cpu_x86_load_seg(env, R_ES, __USER_DS);
100 cpu_x86_load_seg(env, R_FS, __USER_DS);
101 cpu_x86_load_seg(env, R_GS, __USER_DS);
102 /* This hack makes Wine work... */
103 env->segs[R_FS].selector = 0;
104 }
105
106 static inline void target_cpu_loop(CPUX86State *env)
107 {
108 CPUState *cs = env_cpu(env);
109 int trapnr;
110 abi_ulong pc;
111 /* target_siginfo_t info; */
112
113 for (;;) {
114 cpu_exec_start(cs);
115 trapnr = cpu_exec(cs);
116 cpu_exec_end(cs);
117 process_queued_cpu_work(cs);
118
119 switch (trapnr) {
120 case 0x80:
121 /* syscall from int $0x80 */
122 if (bsd_type == target_freebsd) {
123 abi_ulong params = (abi_ulong) env->regs[R_ESP] +
124 sizeof(int32_t);
125 int32_t syscall_nr = env->regs[R_EAX];
126 int32_t arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8;
127
128 if (syscall_nr == TARGET_FREEBSD_NR_syscall) {
129 get_user_s32(syscall_nr, params);
130 params += sizeof(int32_t);
131 } else if (syscall_nr == TARGET_FREEBSD_NR___syscall) {
132 get_user_s32(syscall_nr, params);
133 params += sizeof(int64_t);
134 }
135 get_user_s32(arg1, params);
136 params += sizeof(int32_t);
137 get_user_s32(arg2, params);
138 params += sizeof(int32_t);
139 get_user_s32(arg3, params);
140 params += sizeof(int32_t);
141 get_user_s32(arg4, params);
142 params += sizeof(int32_t);
143 get_user_s32(arg5, params);
144 params += sizeof(int32_t);
145 get_user_s32(arg6, params);
146 params += sizeof(int32_t);
147 get_user_s32(arg7, params);
148 params += sizeof(int32_t);
149 get_user_s32(arg8, params);
150 env->regs[R_EAX] = do_freebsd_syscall(env,
151 syscall_nr,
152 arg1,
153 arg2,
154 arg3,
155 arg4,
156 arg5,
157 arg6,
158 arg7,
159 arg8);
160 } else { /* if (bsd_type == target_openbsd) */
161 env->regs[R_EAX] = do_openbsd_syscall(env,
162 env->regs[R_EAX],
163 env->regs[R_EBX],
164 env->regs[R_ECX],
165 env->regs[R_EDX],
166 env->regs[R_ESI],
167 env->regs[R_EDI],
168 env->regs[R_EBP]);
169 }
170 if (((abi_ulong)env->regs[R_EAX]) >= (abi_ulong)(-515)) {
171 env->regs[R_EAX] = -env->regs[R_EAX];
172 env->eflags |= CC_C;
173 } else {
174 env->eflags &= ~CC_C;
175 }
176 break;
177
178 case EXCP_INTERRUPT:
179 /* just indicate that signals should be handled asap */
180 break;
181
182 case EXCP_ATOMIC:
183 cpu_exec_step_atomic(cs);
184 break;
185
186 default:
187 pc = env->segs[R_CS].base + env->eip;
188 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - "
189 "aborting\n", (long)pc, trapnr);
190 abort();
191 }
192 process_pending_signals(env);
193 }
194 }
195
196 static inline void target_cpu_clone_regs(CPUX86State *env, target_ulong newsp)
197 {
198 if (newsp) {
199 env->regs[R_ESP] = newsp;
200 }
201 env->regs[R_EAX] = 0;
202 }
203
204 static inline void target_cpu_reset(CPUArchState *cpu)
205 {
206 cpu_reset(env_cpu(cpu));
207 }
208
209 #endif /* ! _TARGET_ARCH_CPU_H_ */