1 use super::{InlineAsmArch, InlineAsmType}
;
2 use rustc_macros
::HashStable_Generic
;
6 AArch64 AArch64InlineAsmRegClass
{
13 impl AArch64InlineAsmRegClass
{
14 pub fn valid_modifiers(self, _arch
: super::InlineAsmArch
) -> &'
static [char] {
16 Self::reg
=> &['w'
, 'x'
],
17 Self::vreg
| Self::vreg_low16
=> &['b'
, 'h'
, 's'
, 'd'
, 'q'
, 'v'
],
21 pub fn suggest_class(self, _arch
: InlineAsmArch
, _ty
: InlineAsmType
) -> Option
<Self> {
25 pub fn suggest_modifier(
29 ) -> Option
<(char, &'
static str)> {
31 Self::reg
=> match ty
.size().bits() {
33 _
=> Some(('w'
, "w0")),
35 Self::vreg
| Self::vreg_low16
=> match ty
.size().bits() {
36 8 => Some(('b'
, "b0")),
37 16 => Some(('h'
, "h0")),
38 32 => Some(('s'
, "s0")),
39 64 => Some(('d'
, "d0")),
40 128 => Some(('q'
, "q0")),
46 pub fn default_modifier(self, _arch
: InlineAsmArch
) -> Option
<(char, &'
static str)> {
48 Self::reg
=> Some(('x'
, "x0")),
49 Self::vreg
| Self::vreg_low16
=> Some(('v'
, "v0")),
53 pub fn supported_types(
56 ) -> &'
static [(InlineAsmType
, Option
<&'
static str>)] {
58 Self::reg
=> types
! { _: I8, I16, I32, I64, F32, F64; }
,
59 Self::vreg
| Self::vreg_low16
=> types
! {
60 "fp": I8
, I16
, I32
, I64
, F32
, F64
,
61 VecI8(8), VecI16(4), VecI32(2), VecI64(1), VecF32(2), VecF64(1),
62 VecI8(16), VecI16(8), VecI32(4), VecI64(2), VecF32(4), VecF64(2);
69 AArch64 AArch64InlineAsmReg AArch64InlineAsmRegClass
{
70 x0
: reg
= ["x0", "w0"],
71 x1
: reg
= ["x1", "w1"],
72 x2
: reg
= ["x2", "w2"],
73 x3
: reg
= ["x3", "w3"],
74 x4
: reg
= ["x4", "w4"],
75 x5
: reg
= ["x5", "w5"],
76 x6
: reg
= ["x6", "w6"],
77 x7
: reg
= ["x7", "w7"],
78 x8
: reg
= ["x8", "w8"],
79 x9
: reg
= ["x9", "w9"],
80 x10
: reg
= ["x10", "w10"],
81 x11
: reg
= ["x11", "w11"],
82 x12
: reg
= ["x12", "w12"],
83 x13
: reg
= ["x13", "w13"],
84 x14
: reg
= ["x14", "w14"],
85 x15
: reg
= ["x15", "w15"],
86 x16
: reg
= ["x16", "w16"],
87 x17
: reg
= ["x17", "w17"],
88 x18
: reg
= ["x18", "w18"],
89 x19
: reg
= ["x19", "w19"],
90 x20
: reg
= ["x20", "w20"],
91 x21
: reg
= ["x21", "w21"],
92 x22
: reg
= ["x22", "w22"],
93 x23
: reg
= ["x23", "w23"],
94 x24
: reg
= ["x24", "w24"],
95 x25
: reg
= ["x25", "w25"],
96 x26
: reg
= ["x26", "w26"],
97 x27
: reg
= ["x27", "w27"],
98 x28
: reg
= ["x28", "w28"],
99 x30
: reg
= ["x30", "w30", "lr"],
100 v0
: vreg
, vreg_low16
= ["v0", "b0", "h0", "s0", "d0", "q0"],
101 v1
: vreg
, vreg_low16
= ["v1", "b1", "h1", "s1", "d1", "q1"],
102 v2
: vreg
, vreg_low16
= ["v2", "b2", "h2", "s2", "d2", "q2"],
103 v3
: vreg
, vreg_low16
= ["v3", "b3", "h3", "s3", "d3", "q3"],
104 v4
: vreg
, vreg_low16
= ["v4", "b4", "h4", "s4", "d4", "q4"],
105 v5
: vreg
, vreg_low16
= ["v5", "b5", "h5", "s5", "d5", "q5"],
106 v6
: vreg
, vreg_low16
= ["v6", "b6", "h6", "s6", "d6", "q6"],
107 v7
: vreg
, vreg_low16
= ["v7", "b7", "h7", "s7", "d7", "q7"],
108 v8
: vreg
, vreg_low16
= ["v8", "b8", "h8", "s8", "d8", "q8"],
109 v9
: vreg
, vreg_low16
= ["v9", "b9", "h9", "s9", "d9", "q9"],
110 v10
: vreg
, vreg_low16
= ["v10", "b10", "h10", "s10", "d10", "q10"],
111 v11
: vreg
, vreg_low16
= ["v11", "b11", "h11", "s11", "d11", "q11"],
112 v12
: vreg
, vreg_low16
= ["v12", "b12", "h12", "s12", "d12", "q12"],
113 v13
: vreg
, vreg_low16
= ["v13", "b13", "h13", "s13", "d13", "q13"],
114 v14
: vreg
, vreg_low16
= ["v14", "b14", "h14", "s14", "d14", "q14"],
115 v15
: vreg
, vreg_low16
= ["v15", "b15", "h15", "s15", "d15", "q15"],
116 v16
: vreg
= ["v16", "b16", "h16", "s16", "d16", "q16"],
117 v17
: vreg
= ["v17", "b17", "h17", "s17", "d17", "q17"],
118 v18
: vreg
= ["v18", "b18", "h18", "s18", "d18", "q18"],
119 v19
: vreg
= ["v19", "b19", "h19", "s19", "d19", "q19"],
120 v20
: vreg
= ["v20", "b20", "h20", "s20", "d20", "q20"],
121 v21
: vreg
= ["v21", "b21", "h21", "s21", "d21", "q21"],
122 v22
: vreg
= ["v22", "b22", "h22", "s22", "d22", "q22"],
123 v23
: vreg
= ["v23", "b23", "h23", "s23", "d23", "q23"],
124 v24
: vreg
= ["v24", "b24", "h24", "s24", "d24", "q24"],
125 v25
: vreg
= ["v25", "b25", "h25", "s25", "d25", "q25"],
126 v26
: vreg
= ["v26", "b26", "h26", "s26", "d26", "q26"],
127 v27
: vreg
= ["v27", "b27", "h27", "s27", "d27", "q27"],
128 v28
: vreg
= ["v28", "b28", "h28", "s28", "d28", "q28"],
129 v29
: vreg
= ["v29", "b29", "h29", "s29", "d29", "q29"],
130 v30
: vreg
= ["v30", "b30", "h30", "s30", "d30", "q30"],
131 v31
: vreg
= ["v31", "b31", "h31", "s31", "d31", "q31"],
132 #error = ["x29", "fp"] =>
133 "the frame pointer cannot be used as an operand for inline asm",
134 #error = ["sp", "wsp"] =>
135 "the stack pointer cannot be used as an operand for inline asm",
136 #error = ["xzr", "wzr"] =>
137 "the zero register cannot be used as an operand for inline asm",
141 impl AArch64InlineAsmReg
{
144 out
: &mut dyn fmt
::Write
,
145 _arch
: InlineAsmArch
,
146 modifier
: Option
<char>,
148 let (prefix
, index
) = if (self as u32) < Self::v0
as u32 {
149 (modifier
.unwrap_or('x'
), self as u32 - Self::x0
as u32)
151 (modifier
.unwrap_or('v'
), self as u32 - Self::v0
as u32)
154 write
!(out
, "{}{}", prefix
, index
)