compiler/rustc_target/src/spec/powerpc_wrs_vxworks_spe.rs

   1 use crate::abi::Endian;
   2 use crate::spec::{Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions};
   3
   4 pub fn target() -> Target {
   5     let mut base = super::vxworks_base::opts();
   6     base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-mspe", "--secure-plt"]);
   7     base.max_atomic_width = Some(32);
   8     base.stack_probes = StackProbeType::Inline;
   9
  10     Target {
  11         llvm_target: "powerpc-unknown-linux-gnuspe".into(),
  12         pointer_width: 32,
  13         data_layout: "E-m:e-p:32:32-i64:64-n32".into(),
  14         arch: "powerpc".into(),
  15         options: TargetOptions {
  16             abi: "spe".into(),
  17             endian: Endian::Big,
  18             // feature msync would disable instruction 'fsync' which is not supported by fsl_p1p2
  19             features: "+secure-plt,+msync".into(),
  20             ..base
  21         },
  22     }
  23 }