cpu-i386.h

   1 /* NOTE: this header is included in op-i386.c where global register
   2    variable are used. Care must be used when including glibc headers.
   3  */
   4 #ifndef CPU_I386_H
   5 #define CPU_I386_H
   6
   7 #include <setjmp.h>
   8
   9 #define R_EAX 0
  10 #define R_ECX 1
  11 #define R_EDX 2
  12 #define R_EBX 3
  13 #define R_ESP 4
  14 #define R_EBP 5
  15 #define R_ESI 6
  16 #define R_EDI 7
  17
  18 #define R_AL 0
  19 #define R_CL 1
  20 #define R_DL 2
  21 #define R_BL 3
  22 #define R_AH 4
  23 #define R_CH 5
  24 #define R_DH 6
  25 #define R_BH 7
  26
  27 #define R_ES 0
  28 #define R_CS 1
  29 #define R_SS 2
  30 #define R_DS 3
  31 #define R_FS 4
  32 #define R_GS 5
  33
  34 #define CC_C    0x0001
  35 #define CC_P    0x0004
  36 #define CC_A    0x0010
  37 #define CC_Z    0x0040
  38 #define CC_S    0x0080
  39 #define CC_O    0x0800
  40
  41 #define TRAP_FLAG               0x0100
  42 #define INTERRUPT_FLAG          0x0200
  43 #define DIRECTION_FLAG          0x0400
  44 #define IOPL_FLAG_MASK          0x3000
  45 #define NESTED_FLAG             0x4000
  46 #define BYTE_FL                 0x8000  /* Intel reserved! */
  47 #define RF_FLAG                 0x10000
  48 #define VM_FLAG                 0x20000
  49 /* AC                           0x40000 */
  50
  51 #define EXCP00_DIVZ     1
  52 #define EXCP01_SSTP     2
  53 #define EXCP02_NMI      3
  54 #define EXCP03_INT3     4
  55 #define EXCP04_INTO     5
  56 #define EXCP05_BOUND    6
  57 #define EXCP06_ILLOP    7
  58 #define EXCP07_PREX     8
  59 #define EXCP08_DBLE     9
  60 #define EXCP09_XERR     10
  61 #define EXCP0A_TSS      11
  62 #define EXCP0B_NOSEG    12
  63 #define EXCP0C_STACK    13
  64 #define EXCP0D_GPF      14
  65 #define EXCP0E_PAGE     15
  66 #define EXCP10_COPR     17
  67 #define EXCP11_ALGN     18
  68 #define EXCP12_MCHK     19
  69
  70 #define EXCP_SIGNAL     256 /* async signal */
  71
  72 enum {
  73     CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */
  74     CC_OP_EFLAGS,  /* all cc are explicitely computed, CC_SRC = flags */
  75     CC_OP_MUL, /* modify all flags, C, O = (CC_SRC != 0) */
  76
  77     CC_OP_ADDB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
  78     CC_OP_ADDW,
  79     CC_OP_ADDL,
  80
  81     CC_OP_ADCB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
  82     CC_OP_ADCW,
  83     CC_OP_ADCL,
  84
  85     CC_OP_SUBB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
  86     CC_OP_SUBW,
  87     CC_OP_SUBL,
  88
  89     CC_OP_SBBB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
  90     CC_OP_SBBW,
  91     CC_OP_SBBL,
  92
  93     CC_OP_LOGICB, /* modify all flags, CC_DST = res */
  94     CC_OP_LOGICW,
  95     CC_OP_LOGICL,
  96
  97     CC_OP_INCB, /* modify all flags except, CC_DST = res, CC_SRC = C */
  98     CC_OP_INCW,
  99     CC_OP_INCL,
 100
 101     CC_OP_DECB, /* modify all flags except, CC_DST = res, CC_SRC = C  */
 102     CC_OP_DECW,
 103     CC_OP_DECL,
 104
 105     CC_OP_SHLB, /* modify all flags, CC_DST = res, CC_SRC.lsb = C */
 106     CC_OP_SHLW,
 107     CC_OP_SHLL,
 108
 109     CC_OP_SARB, /* modify all flags, CC_DST = res, CC_SRC.lsb = C */
 110     CC_OP_SARW,
 111     CC_OP_SARL,
 112
 113     CC_OP_NB,
 114 };
 115
 116 #ifdef __i386__
 117 #define USE_X86LDOUBLE
 118 #endif
 119
 120 #ifdef USE_X86LDOUBLE
 121 typedef long double CPU86_LDouble;
 122 #else
 123 typedef double CPU86_LDouble;
 124 #endif
 125
 126 typedef struct SegmentCache {
 127     uint8_t *base;
 128     unsigned long limit;
 129     uint8_t seg_32bit;
 130 } SegmentCache;
 131
 132 typedef struct SegmentDescriptorTable {
 133     uint8_t *base;
 134     unsigned long limit;
 135     /* this is the returned base when reading the register, just to
 136     avoid that the emulated program modifies it */
 137     unsigned long emu_base;
 138 } SegmentDescriptorTable;
 139
 140 typedef struct CPUX86State {
 141     /* standard registers */
 142     uint32_t regs[8];
 143     uint32_t pc; /* cs_case + eip value */
 144     uint32_t eflags;
 145
 146     /* emulator internal eflags handling */
 147     uint32_t cc_src;
 148     uint32_t cc_dst;
 149     uint32_t cc_op;
 150     int32_t df; /* D flag : 1 if D = 0, -1 if D = 1 */
 151
 152     /* FPU state */
 153     unsigned int fpstt; /* top of stack index */
 154     unsigned int fpus;
 155     unsigned int fpuc;
 156     uint8_t fptags[8];   /* 0 = valid, 1 = empty */
 157     CPU86_LDouble fpregs[8];
 158
 159     /* emulator internal variables */
 160     CPU86_LDouble ft0;
 161
 162     /* segments */
 163     uint32_t segs[6]; /* selector values */
 164     SegmentCache seg_cache[6]; /* info taken from LDT/GDT */
 165     SegmentDescriptorTable gdt;
 166     SegmentDescriptorTable ldt;
 167     SegmentDescriptorTable idt;
 168
 169     /* various CPU modes */
 170     int vm86;
 171
 172     /* exception handling */
 173     jmp_buf jmp_env;
 174     int exception_index;
 175 } CPUX86State;
 176
 177 static inline int ldub(void *ptr)
 178 {
 179     return *(uint8_t *)ptr;
 180 }
 181
 182 static inline int ldsb(void *ptr)
 183 {
 184     return *(int8_t *)ptr;
 185 }
 186
 187 static inline int lduw(void *ptr)
 188 {
 189     return *(uint16_t *)ptr;
 190 }
 191
 192 static inline int ldsw(void *ptr)
 193 {
 194     return *(int16_t *)ptr;
 195 }
 196
 197 static inline int ldl(void *ptr)
 198 {
 199     return *(uint32_t *)ptr;
 200 }
 201
 202 static inline uint64_t ldq(void *ptr)
 203 {
 204     return *(uint64_t *)ptr;
 205 }
 206
 207 static inline void stb(void *ptr, int v)
 208 {
 209     *(uint8_t *)ptr = v;
 210 }
 211
 212 static inline void stw(void *ptr, int v)
 213 {
 214     *(uint16_t *)ptr = v;
 215 }
 216
 217 static inline void stl(void *ptr, int v)
 218 {
 219     *(uint32_t *)ptr = v;
 220 }
 221
 222 static inline void stq(void *ptr, uint64_t v)
 223 {
 224     *(uint64_t *)ptr = v;
 225 }
 226
 227 /* float access */
 228
 229 static inline float ldfl(void *ptr)
 230 {
 231     return *(float *)ptr;
 232 }
 233
 234 static inline double ldfq(void *ptr)
 235 {
 236     return *(double *)ptr;
 237 }
 238
 239 static inline void stfl(void *ptr, float v)
 240 {
 241     *(float *)ptr = v;
 242 }
 243
 244 static inline void stfq(void *ptr, double v)
 245 {
 246     *(double *)ptr = v;
 247 }
 248
 249 #ifndef IN_OP_I386
 250 void cpu_x86_outb(int addr, int val);
 251 void cpu_x86_outw(int addr, int val);
 252 void cpu_x86_outl(int addr, int val);
 253 int cpu_x86_inb(int addr);
 254 int cpu_x86_inw(int addr);
 255 int cpu_x86_inl(int addr);
 256 #endif
 257
 258 CPUX86State *cpu_x86_init(void);
 259 int cpu_x86_exec(CPUX86State *s);
 260 void cpu_x86_close(CPUX86State *s);
 261
 262 /* needed to load some predefinied segment registers */
 263 void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector);
 264
 265 /* internal functions */
 266
 267 #define GEN_FLAG_CODE32_SHIFT 0
 268 #define GEN_FLAG_ADDSEG_SHIFT 1
 269 #define GEN_FLAG_ST_SHIFT     2
 270 int cpu_x86_gen_code(uint8_t *gen_code_buf, int max_code_size,
 271                      int *gen_code_size_ptr, uint8_t *pc_start,
 272                      int flags);
 273 void cpu_x86_tblocks_init(void);
 274
 275 #endif /* CPU_I386_H */