disas/nanomips.cpp

   1 /*
   2  *  Source file for nanoMIPS disassembler component of QEMU
   3  *
   4  *  Copyright (C) 2018  Wave Computing, Inc.
   5  *  Copyright (C) 2018  Matthew Fortune <matthew.fortune@mips.com>
   6  *  Copyright (C) 2018  Aleksandar Markovic <amarkovic@wavecomp.com>
   7  *
   8  *  This program is free software: you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License as published by
  10  *  the Free Software Foundation, either version 2 of the License, or
  11  *  (at your option) any later version.
  12  *
  13  *  This program is distributed in the hope that it will be useful,
  14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *  GNU General Public License for more details.
  17  *
  18  *  You should have received a copy of the GNU General Public License
  19  *  along with this program.  If not, see <https://www.gnu.org/licenses/>.
  20  *
  21  */
  22
  23 extern "C" {
  24 #include "qemu/osdep.h"
  25 #include "disas/bfd.h"
  26 }
  27
  28 #include <cstring>
  29 #include <stdexcept>
  30 #include <sstream>
  31 #include <stdio.h>
  32 #include <stdarg.h>
  33
  34 #include "nanomips.h"
  35
  36 #define IMGASSERTONCE(test)
  37
  38
  39 int nanomips_dis(char *buf,
  40                  unsigned address,
  41                  unsigned short one,
  42                  unsigned short two,
  43                  unsigned short three)
  44 {
  45     std::string disasm;
  46     uint16 bits[3] = {one, two, three};
  47
  48     NMD::TABLE_ENTRY_TYPE type;
  49     NMD d(address, NMD::ALL_ATTRIBUTES);
  50     int size = d.Disassemble(bits, disasm, type);
  51
  52     strcpy(buf, disasm.c_str());
  53     return size;
  54 }
  55
  56 int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info)
  57 {
  58     int status;
  59     bfd_byte buffer[2];
  60     uint16_t insn1 = 0, insn2 = 0, insn3 = 0;
  61     char buf[200];
  62
  63     info->bytes_per_chunk = 2;
  64     info->display_endian = info->endian;
  65     info->insn_info_valid = 1;
  66     info->branch_delay_insns = 0;
  67     info->data_size = 0;
  68     info->insn_type = dis_nonbranch;
  69     info->target = 0;
  70     info->target2 = 0;
  71
  72     status = (*info->read_memory_func)(memaddr, buffer, 2, info);
  73     if (status != 0) {
  74         (*info->memory_error_func)(status, memaddr, info);
  75         return -1;
  76     }
  77
  78     if (info->endian == BFD_ENDIAN_BIG) {
  79         insn1 = bfd_getb16(buffer);
  80     } else {
  81         insn1 = bfd_getl16(buffer);
  82     }
  83     (*info->fprintf_func)(info->stream, "%04x ", insn1);
  84
  85     /* Handle 32-bit opcodes.  */
  86     if ((insn1 & 0x1000) == 0) {
  87         status = (*info->read_memory_func)(memaddr + 2, buffer, 2, info);
  88         if (status != 0) {
  89             (*info->memory_error_func)(status, memaddr + 2, info);
  90             return -1;
  91         }
  92
  93         if (info->endian == BFD_ENDIAN_BIG) {
  94             insn2 = bfd_getb16(buffer);
  95         } else {
  96             insn2 = bfd_getl16(buffer);
  97         }
  98         (*info->fprintf_func)(info->stream, "%04x ", insn2);
  99     } else {
 100         (*info->fprintf_func)(info->stream, "     ");
 101     }
 102     /* Handle 48-bit opcodes.  */
 103     if ((insn1 >> 10) == 0x18) {
 104         status = (*info->read_memory_func)(memaddr + 4, buffer, 2, info);
 105         if (status != 0) {
 106             (*info->memory_error_func)(status, memaddr + 4, info);
 107             return -1;
 108         }
 109
 110         if (info->endian == BFD_ENDIAN_BIG) {
 111             insn3 = bfd_getb16(buffer);
 112         } else {
 113             insn3 = bfd_getl16(buffer);
 114         }
 115         (*info->fprintf_func)(info->stream, "%04x ", insn3);
 116     } else {
 117         (*info->fprintf_func)(info->stream, "     ");
 118     }
 119
 120     int length = nanomips_dis(buf, memaddr, insn1, insn2, insn3);
 121
 122     /* FIXME: Should probably use a hash table on the major opcode here.  */
 123
 124     (*info->fprintf_func) (info->stream, "%s", buf);
 125     if (length > 0) {
 126         return length / 8;
 127     }
 128
 129     info->insn_type = dis_noninsn;
 130
 131     return insn3 ? 6 : insn2 ? 4 : 2;
 132 }
 133
 134
 135 namespace img
 136 {
 137     address addr32(address a)
 138     {
 139         return a;
 140     }
 141
 142     std::string format(const char *format, ...)
 143     {
 144         char buffer[256];
 145         va_list args;
 146         va_start(args, format);
 147         int err = vsprintf(buffer, format, args);
 148         if (err < 0) {
 149             perror(buffer);
 150         }
 151         va_end(args);
 152         return buffer;
 153     }
 154
 155     std::string format(const char *format,
 156                        std::string s)
 157     {
 158         char buffer[256];
 159
 160         sprintf(buffer, format, s.c_str());
 161
 162         return buffer;
 163     }
 164
 165     std::string format(const char *format,
 166                        std::string s1,
 167                        std::string s2)
 168     {
 169         char buffer[256];
 170
 171         sprintf(buffer, format, s1.c_str(), s2.c_str());
 172
 173         return buffer;
 174     }
 175
 176     std::string format(const char *format,
 177                        std::string s1,
 178                        std::string s2,
 179                        std::string s3)
 180     {
 181         char buffer[256];
 182
 183         sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str());
 184
 185         return buffer;
 186     }
 187
 188     std::string format(const char *format,
 189                        std::string s1,
 190                        std::string s2,
 191                        std::string s3,
 192                        std::string s4)
 193     {
 194         char buffer[256];
 195
 196         sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str(),
 197                                 s4.c_str());
 198
 199         return buffer;
 200     }
 201
 202     std::string format(const char *format,
 203                        std::string s1,
 204                        std::string s2,
 205                        std::string s3,
 206                        std::string s4,
 207                        std::string s5)
 208     {
 209         char buffer[256];
 210
 211         sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str(),
 212                                 s4.c_str(), s5.c_str());
 213
 214         return buffer;
 215     }
 216
 217     std::string format(const char *format,
 218                        uint64 d,
 219                        std::string s2)
 220     {
 221         char buffer[256];
 222
 223         sprintf(buffer, format, d, s2.c_str());
 224
 225         return buffer;
 226     }
 227
 228     std::string format(const char *format,
 229                        std::string s1,
 230                        uint64 d,
 231                        std::string s2)
 232     {
 233         char buffer[256];
 234
 235         sprintf(buffer, format, s1.c_str(), d, s2.c_str());
 236
 237         return buffer;
 238     }
 239
 240     std::string format(const char *format,
 241                        std::string s1,
 242                        std::string s2,
 243                        uint64 d)
 244     {
 245         char buffer[256];
 246
 247         sprintf(buffer, format, s1.c_str(), s2.c_str(), d);
 248
 249         return buffer;
 250     }
 251
 252     char as_char(int c)
 253     {
 254         return static_cast<char>(c);
 255     }
 256 };
 257
 258
 259 std::string to_string(img::address a)
 260 {
 261     char buffer[256];
 262     sprintf(buffer, "0x%" PRIx64, a);
 263     return buffer;
 264 }
 265
 266
 267 uint64 extract_bits(uint64 data, uint32 bit_offset, uint32 bit_size)
 268 {
 269     return (data << (64 - (bit_size + bit_offset))) >> (64 - bit_size);
 270 }
 271
 272
 273 int64 sign_extend(int64 data, int msb)
 274 {
 275     uint64 shift = 63 - msb;
 276     return (data << shift) >> shift;
 277 }
 278
 279
 280 uint64 NMD::renumber_registers(uint64 index, uint64 *register_list,
 281                                size_t register_list_size)
 282 {
 283     if (index < register_list_size) {
 284         return register_list[index];
 285     }
 286
 287     throw std::runtime_error(img::format(
 288                    "Invalid register mapping index %" PRIu64
 289                    ", size of list = %zu",
 290                    index, register_list_size));
 291 }
 292
 293
 294 /*
 295  * NMD::decode_gpr_gpr3() - decoder for 'gpr3' gpr encoding type
 296  *
 297  *   Map a 3-bit code to the 5-bit register space according to this pattern:
 298  *
 299  *                            7 6 5 4 3 2 1 0
 300  *                            | | | | | | | |
 301  *                            | | | | | | | |
 302  *                            | | | └-----------------------┐
 303  *                            | | └-----------------------┐ |
 304  *                            | └-----------------------┐ | |
 305  *                            └-----------------------┐ | | |
 306  *                                    | | | |         | | | |
 307  *                            ┌-------┘ | | |         | | | |
 308  *                            | ┌-------┘ | |         | | | |
 309  *                            | | ┌-------┘ |         | | | |
 310  *                            | | | ┌-------┘         | | | |
 311  *                            | | | |                 | | | |
 312  *    1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 313  *      3                   2                   1                   0
 314  *
 315  *   Used in handling following instructions:
 316  *
 317  *     - ADDIU[R1.SP]
 318  *     - ADDIU[R2]
 319  *     - ADDU[16]
 320  *     - AND[16]
 321  *     - ANDI[16]
 322  *     - BEQC[16]
 323  *     - BEQZC[16]
 324  *     - BNEC[16]
 325  *     - BNEZC[16]
 326  *     - LB[16]
 327  *     - LBU[16]
 328  *     - LH[16]
 329  *     - LHU[16]
 330  *     - LI[16]
 331  *     - LW[16]
 332  *     - LW[GP16]
 333  *     - LWXS[16]
 334  *     - NOT[16]
 335  *     - OR[16]
 336  *     - SB[16]
 337  *     - SH[16]
 338  *     - SLL[16]
 339  *     - SRL[16]
 340  *     - SUBU[16]
 341  *     - SW[16]
 342  *     - XOR[16]
 343  */
 344 uint64 NMD::decode_gpr_gpr3(uint64 d)
 345 {
 346     static uint64 register_list[] = { 16, 17, 18, 19,  4,  5,  6,  7 };
 347     return renumber_registers(d, register_list,
 348                sizeof(register_list) / sizeof(register_list[0]));
 349 }
 350
 351
 352 /*
 353  * NMD::decode_gpr_gpr3_src_store() - decoder for 'gpr3.src.store' gpr encoding
 354  *     type
 355  *
 356  *   Map a 3-bit code to the 5-bit register space according to this pattern:
 357  *
 358  *                            7 6 5 4 3 2 1 0
 359  *                            | | | | | | | |
 360  *                            | | | | | | | └-----------------------┐
 361  *                            | | | └-----------------------┐       |
 362  *                            | | └-----------------------┐ |       |
 363  *                            | └-----------------------┐ | |       |
 364  *                            └-----------------------┐ | | |       |
 365  *                                    | | |           | | | |       |
 366  *                            ┌-------┘ | |           | | | |       |
 367  *                            | ┌-------┘ |           | | | |       |
 368  *                            | | ┌-------┘           | | | |       |
 369  *                            | | |                   | | | |       |
 370  *                            | | |                   | | | |       |
 371  *    1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 372  *      3                   2                   1                   0
 373  *
 374  *   This pattern is the same one used for 'gpr3' gpr encoding type, except for
 375  * the input value 0, that is mapped to the output value 0 instead of 16.
 376  *
 377  *   Used in handling following instructions:
 378  *
 379  *     - SB[16]
 380  *     - SH[16]
 381  *     - SW[16]
 382  *     - SW[GP16]
 383  */
 384 uint64 NMD::decode_gpr_gpr3_src_store(uint64 d)
 385 {
 386     static uint64 register_list[] = {  0, 17, 18, 19,  4,  5,  6,  7 };
 387     return renumber_registers(d, register_list,
 388                sizeof(register_list) / sizeof(register_list[0]));
 389 }
 390
 391
 392 uint64 NMD::encode_rd1_from_rd(uint64 d)
 393 {
 394     static uint64 register_list[] = {  4,  5 };
 395     return renumber_registers(d, register_list,
 396                sizeof(register_list) / sizeof(register_list[0]));
 397 }
 398
 399
 400 uint64 NMD::encode_gpr4_zero(uint64 d)
 401 {
 402     static uint64 register_list[] = {  8,  9, 10,  0,  4,  5,  6,  7,
 403                                       16, 17, 18, 19, 20, 21, 22, 23 };
 404     return renumber_registers(d, register_list,
 405                sizeof(register_list) / sizeof(register_list[0]));
 406 }
 407
 408
 409 uint64 NMD::decode_gpr_gpr4(uint64 d)
 410 {
 411     static uint64 register_list[] = {  8,  9, 10, 11,  4,  5,  6,  7,
 412                                       16, 17, 18, 19, 20, 21, 22, 23 };
 413     return renumber_registers(d, register_list,
 414                sizeof(register_list) / sizeof(register_list[0]));
 415 }
 416
 417
 418 uint64 NMD::encode_rd2_reg1(uint64 d)
 419 {
 420     static uint64 register_list[] = {  4,  5,  6,  7 };
 421     return renumber_registers(d, register_list,
 422                sizeof(register_list) / sizeof(register_list[0]));
 423 }
 424
 425
 426 uint64 NMD::encode_rd2_reg2(uint64 d)
 427 {
 428     static uint64 register_list[] = {  5,  6,  7,  8 };
 429     return renumber_registers(d, register_list,
 430                sizeof(register_list) / sizeof(register_list[0]));
 431 }
 432
 433
 434 uint64 NMD::copy(uint64 d)
 435 {
 436     return d;
 437 }
 438
 439
 440 int64 NMD::copy(int64 d)
 441 {
 442     return d;
 443 }
 444
 445
 446 int64 NMD::neg_copy(uint64 d)
 447 {
 448     return 0ll - d;
 449 }
 450
 451
 452 int64 NMD::neg_copy(int64 d)
 453 {
 454     return -d;
 455 }
 456
 457
 458 /* strange wrapper around  gpr3 */
 459 uint64 NMD::encode_rs3_and_check_rs3_ge_rt3(uint64 d)
 460 {
 461 return decode_gpr_gpr3(d);
 462 }
 463
 464
 465 /* strange wrapper around  gpr3 */
 466 uint64 NMD::encode_rs3_and_check_rs3_lt_rt3(uint64 d)
 467 {
 468     return decode_gpr_gpr3(d);
 469 }
 470
 471
 472 /* nop - done by extraction function */
 473 uint64 NMD::encode_s_from_address(uint64 d)
 474 {
 475     return d;
 476 }
 477
 478
 479 /* nop - done by extraction function */
 480 uint64 NMD::encode_u_from_address(uint64 d)
 481 {
 482     return d;
 483 }
 484
 485
 486 /* nop - done by extraction function */
 487 uint64 NMD::encode_s_from_s_hi(uint64 d)
 488 {
 489     return d;
 490 }
 491
 492
 493 uint64 NMD::encode_count3_from_count(uint64 d)
 494 {
 495     IMGASSERTONCE(d < 8);
 496     return d == 0ull ? 8ull : d;
 497 }
 498
 499
 500 uint64 NMD::encode_shift3_from_shift(uint64 d)
 501 {
 502     IMGASSERTONCE(d < 8);
 503     return d == 0ull ? 8ull : d;
 504 }
 505
 506
 507 /* special value for load literal */
 508 int64 NMD::encode_eu_from_s_li16(uint64 d)
 509 {
 510     IMGASSERTONCE(d < 128);
 511     return d == 127 ? -1 : (int64)d;
 512 }
 513
 514
 515 uint64 NMD::encode_msbd_from_size(uint64 d)
 516 {
 517     IMGASSERTONCE(d < 32);
 518     return d + 1;
 519 }
 520
 521
 522 uint64 NMD::encode_eu_from_u_andi16(uint64 d)
 523 {
 524     IMGASSERTONCE(d < 16);
 525     if (d == 12) {
 526         return 0x00ffull;
 527     }
 528     if (d == 13) {
 529         return 0xffffull;
 530     }
 531     return d;
 532 }
 533
 534
 535 uint64 NMD::encode_msbd_from_pos_and_size(uint64 d)
 536 {
 537     IMGASSERTONCE(0);
 538     return d;
 539 }
 540
 541
 542 /* save16 / restore16   ???? */
 543 uint64 NMD::encode_rt1_from_rt(uint64 d)
 544 {
 545     return d ? 31 : 30;
 546 }
 547
 548
 549 /* ? */
 550 uint64 NMD::encode_lsb_from_pos_and_size(uint64 d)
 551 {
 552     return d;
 553 }
 554
 555
 556 std::string NMD::save_restore_list(uint64 rt, uint64 count, uint64 gp)
 557 {
 558     std::string str;
 559
 560     for (uint64 counter = 0; counter != count; counter++) {
 561         bool use_gp = gp && (counter == count - 1);
 562         uint64 this_rt = use_gp ? 28 : ((rt & 0x10) | (rt + counter)) & 0x1f;
 563         str += img::format(",%s", GPR(this_rt));
 564     }
 565
 566     return str;
 567 }
 568
 569
 570 std::string NMD::GPR(uint64 reg)
 571 {
 572     static const char *gpr_reg[32] = {
 573         "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3",
 574         "a4",   "a5",   "a6",   "a7",   "r12",  "r13",  "r14",  "r15",
 575         "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7",
 576         "r24",  "r25",  "k0",   "k1",   "gp",   "sp",   "fp",   "ra"
 577     };
 578
 579     if (reg < 32) {
 580         return gpr_reg[reg];
 581     }
 582
 583     throw std::runtime_error(img::format("Invalid GPR register index %" PRIu64,
 584                                          reg));
 585 }
 586
 587
 588 std::string NMD::FPR(uint64 reg)
 589 {
 590     static const char *fpr_reg[32] = {
 591         "f0",  "f1",  "f2",  "f3",  "f4",  "f5",  "f6",  "f7",
 592         "f8",  "f9",  "f10", "f11", "f12", "f13", "f14", "f15",
 593         "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
 594         "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"
 595     };
 596
 597     if (reg < 32) {
 598         return fpr_reg[reg];
 599     }
 600
 601     throw std::runtime_error(img::format("Invalid FPR register index %" PRIu64,
 602                                          reg));
 603 }
 604
 605
 606 std::string NMD::AC(uint64 reg)
 607 {
 608     static const char *ac_reg[4] = {
 609         "ac0",  "ac1",  "ac2",  "ac3"
 610     };
 611
 612     if (reg < 4) {
 613         return ac_reg[reg];
 614     }
 615
 616     throw std::runtime_error(img::format("Invalid AC register index %" PRIu64,
 617                                          reg));
 618 }
 619
 620
 621 std::string NMD::IMMEDIATE(uint64 value)
 622 {
 623     return img::format("0x%" PRIx64, value);
 624 }
 625
 626
 627 std::string NMD::IMMEDIATE(int64 value)
 628 {
 629     return img::format("%" PRId64, value);
 630 }
 631
 632
 633 std::string NMD::CPR(uint64 reg)
 634 {
 635     /* needs more work */
 636     return img::format("CP%" PRIu64, reg);
 637 }
 638
 639
 640 std::string NMD::ADDRESS(uint64 value, int instruction_size)
 641 {
 642     /* token for string replace */
 643     /* const char TOKEN_REPLACE = (char)0xa2; */
 644     img::address address = m_pc + value + instruction_size;
 645     /* symbol replacement */
 646     /* return img::as_char(TOKEN_REPLACE) + to_string(address); */
 647     return to_string(address);
 648 }
 649
 650
 651 uint64 NMD::extract_op_code_value(const uint16 * data, int size)
 652 {
 653     switch (size) {
 654     case 16:
 655         return data[0];
 656     case 32:
 657         return ((uint64)data[0] << 16) | data[1];
 658     case 48:
 659         return ((uint64)data[0] << 32) | ((uint64)data[1] << 16) | data[2];
 660     default:
 661         return data[0];
 662     }
 663 }
 664
 665
 666 int NMD::Disassemble(const uint16 * data, std::string & dis,
 667                      NMD::TABLE_ENTRY_TYPE & type)
 668 {
 669     return Disassemble(data, dis, type, MAJOR, 2);
 670 }
 671
 672
 673 /*
 674  * Recurse through tables until the instruction is found then return
 675  * the string and size
 676  *
 677  * inputs:
 678  *      pointer to a word stream,
 679  *      disassember table and size
 680  * returns:
 681  *      instruction size    - negative is error
 682  *      disassembly string  - on error will constain error string
 683  */
 684 int NMD::Disassemble(const uint16 * data, std::string & dis,
 685                      NMD::TABLE_ENTRY_TYPE & type, const Pool *table,
 686                      int table_size)
 687 {
 688     try
 689     {
 690         for (int i = 0; i < table_size; i++) {
 691             uint64 op_code = extract_op_code_value(data,
 692                                  table[i].instructions_size);
 693             if ((op_code & table[i].mask) == table[i].value) {
 694                 /* possible match */
 695                 conditional_function cond = table[i].condition;
 696                 if ((cond == 0) || (this->*cond)(op_code)) {
 697                     try
 698                     {
 699                         if (table[i].type == pool) {
 700                             return Disassemble(data, dis, type,
 701                                                table[i].next_table,
 702                                                table[i].next_table_size);
 703                         } else if ((table[i].type == instruction) ||
 704                                    (table[i].type == call_instruction) ||
 705                                    (table[i].type == branch_instruction) ||
 706                                    (table[i].type == return_instruction)) {
 707                             if ((table[i].attributes != 0) &&
 708                                 (m_requested_instruction_categories &
 709                                  table[i].attributes) == 0) {
 710                                 /*
 711                                  * failed due to instruction having
 712                                  * an ASE attribute and the requested version
 713                                  * not having that attribute
 714                                  */
 715                                 dis = "ASE attribute missmatch";
 716                                 return -5;
 717                             }
 718                             disassembly_function dis_fn = table[i].disassembly;
 719                             if (dis_fn == 0) {
 720                                 dis = "disassembler failure - bad table entry";
 721                                 return -6;
 722                             }
 723                             type = table[i].type;
 724                             dis = (this->*dis_fn)(op_code);
 725                             return table[i].instructions_size;
 726                         } else {
 727                             dis = "reserved instruction";
 728                             return -2;
 729                         }
 730                     }
 731                     catch (std::runtime_error & e)
 732                     {
 733                         dis = e.what();
 734                         return -3;          /* runtime error */
 735                     }
 736                 }
 737             }
 738         }
 739     }
 740     catch (std::exception & e)
 741     {
 742         dis = e.what();
 743         return -4;          /* runtime error */
 744     }
 745
 746     dis = "failed to disassemble";
 747     return -1;      /* failed to disassemble        */
 748 }
 749
 750
 751 uint64 NMD::extract_code_18_to_0(uint64 instruction)
 752 {
 753     uint64 value = 0;
 754     value |= extract_bits(instruction, 0, 19);
 755     return value;
 756 }
 757
 758
 759 uint64 NMD::extract_shift3_2_1_0(uint64 instruction)
 760 {
 761     uint64 value = 0;
 762     value |= extract_bits(instruction, 0, 3);
 763     return value;
 764 }
 765
 766
 767 uint64 NMD::extract_u_11_10_9_8_7_6_5_4_3__s3(uint64 instruction)
 768 {
 769     uint64 value = 0;
 770     value |= extract_bits(instruction, 3, 9) << 3;
 771     return value;
 772 }
 773
 774
 775 uint64 NMD::extract_count_3_2_1_0(uint64 instruction)
 776 {
 777     uint64 value = 0;
 778     value |= extract_bits(instruction, 0, 4);
 779     return value;
 780 }
 781
 782
 783 uint64 NMD::extract_rtz3_9_8_7(uint64 instruction)
 784 {
 785     uint64 value = 0;
 786     value |= extract_bits(instruction, 7, 3);
 787     return value;
 788 }
 789
 790
 791 uint64 NMD::extract_u_17_to_1__s1(uint64 instruction)
 792 {
 793     uint64 value = 0;
 794     value |= extract_bits(instruction, 1, 17) << 1;
 795     return value;
 796 }
 797
 798
 799 int64 NMD::extract_s__se9_20_19_18_17_16_15_14_13_12_11(uint64 instruction)
 800 {
 801     int64 value = 0;
 802     value |= extract_bits(instruction, 11, 10);
 803     value = sign_extend(value, 9);
 804     return value;
 805 }
 806
 807
 808 int64 NMD::extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(uint64 instruction)
 809 {
 810     int64 value = 0;
 811     value |= extract_bits(instruction, 0, 1) << 11;
 812     value |= extract_bits(instruction, 1, 10) << 1;
 813     value = sign_extend(value, 11);
 814     return value;
 815 }
 816
 817
 818 uint64 NMD::extract_u_10(uint64 instruction)
 819 {
 820     uint64 value = 0;
 821     value |= extract_bits(instruction, 10, 1);
 822     return value;
 823 }
 824
 825
 826 uint64 NMD::extract_rtz4_27_26_25_23_22_21(uint64 instruction)
 827 {
 828     uint64 value = 0;
 829     value |= extract_bits(instruction, 21, 3);
 830     value |= extract_bits(instruction, 25, 1) << 3;
 831     return value;
 832 }
 833
 834
 835 uint64 NMD::extract_sa_15_14_13_12_11(uint64 instruction)
 836 {
 837     uint64 value = 0;
 838     value |= extract_bits(instruction, 11, 5);
 839     return value;
 840 }
 841
 842
 843 uint64 NMD::extract_shift_4_3_2_1_0(uint64 instruction)
 844 {
 845     uint64 value = 0;
 846     value |= extract_bits(instruction, 0, 5);
 847     return value;
 848 }
 849
 850
 851 uint64 NMD::extract_shiftx_10_9_8_7__s1(uint64 instruction)
 852 {
 853     uint64 value = 0;
 854     value |= extract_bits(instruction, 7, 4) << 1;
 855     return value;
 856 }
 857
 858
 859 uint64 NMD::extract_hint_25_24_23_22_21(uint64 instruction)
 860 {
 861     uint64 value = 0;
 862     value |= extract_bits(instruction, 21, 5);
 863     return value;
 864 }
 865
 866
 867 uint64 NMD::extract_count3_14_13_12(uint64 instruction)
 868 {
 869     uint64 value = 0;
 870     value |= extract_bits(instruction, 12, 3);
 871     return value;
 872 }
 873
 874
 875 int64 NMD::extract_s__se31_0_11_to_2_20_to_12_s12(uint64 instruction)
 876 {
 877     int64 value = 0;
 878     value |= extract_bits(instruction, 0, 1) << 31;
 879     value |= extract_bits(instruction, 2, 10) << 21;
 880     value |= extract_bits(instruction, 12, 9) << 12;
 881     value = sign_extend(value, 31);
 882     return value;
 883 }
 884
 885
 886 int64 NMD::extract_s__se7_0_6_5_4_3_2_1_s1(uint64 instruction)
 887 {
 888     int64 value = 0;
 889     value |= extract_bits(instruction, 0, 1) << 7;
 890     value |= extract_bits(instruction, 1, 6) << 1;
 891     value = sign_extend(value, 7);
 892     return value;
 893 }
 894
 895
 896 uint64 NMD::extract_u2_10_9(uint64 instruction)
 897 {
 898     uint64 value = 0;
 899     value |= extract_bits(instruction, 9, 2);
 900     return value;
 901 }
 902
 903
 904 uint64 NMD::extract_code_25_24_23_22_21_20_19_18_17_16(uint64 instruction)
 905 {
 906     uint64 value = 0;
 907     value |= extract_bits(instruction, 16, 10);
 908     return value;
 909 }
 910
 911
 912 uint64 NMD::extract_rs_20_19_18_17_16(uint64 instruction)
 913 {
 914     uint64 value = 0;
 915     value |= extract_bits(instruction, 16, 5);
 916     return value;
 917 }
 918
 919
 920 uint64 NMD::extract_u_2_1__s1(uint64 instruction)
 921 {
 922     uint64 value = 0;
 923     value |= extract_bits(instruction, 1, 2) << 1;
 924     return value;
 925 }
 926
 927
 928 uint64 NMD::extract_stripe_6(uint64 instruction)
 929 {
 930     uint64 value = 0;
 931     value |= extract_bits(instruction, 6, 1);
 932     return value;
 933 }
 934
 935
 936 uint64 NMD::extract_ac_13_12(uint64 instruction)
 937 {
 938     uint64 value = 0;
 939     value |= extract_bits(instruction, 14, 2);
 940     return value;
 941 }
 942
 943
 944 uint64 NMD::extract_shift_20_19_18_17_16(uint64 instruction)
 945 {
 946     uint64 value = 0;
 947     value |= extract_bits(instruction, 16, 5);
 948     return value;
 949 }
 950
 951
 952 uint64 NMD::extract_rdl_25_24(uint64 instruction)
 953 {
 954     uint64 value = 0;
 955     value |= extract_bits(instruction, 24, 1);
 956     return value;
 957 }
 958
 959
 960 int64 NMD::extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(uint64 instruction)
 961 {
 962     int64 value = 0;
 963     value |= extract_bits(instruction, 0, 1) << 10;
 964     value |= extract_bits(instruction, 1, 9) << 1;
 965     value = sign_extend(value, 10);
 966     return value;
 967 }
 968
 969
 970 uint64 NMD::extract_eu_6_5_4_3_2_1_0(uint64 instruction)
 971 {
 972     uint64 value = 0;
 973     value |= extract_bits(instruction, 0, 7);
 974     return value;
 975 }
 976
 977
 978 uint64 NMD::extract_shift_5_4_3_2_1_0(uint64 instruction)
 979 {
 980     uint64 value = 0;
 981     value |= extract_bits(instruction, 0, 6);
 982     return value;
 983 }
 984
 985
 986 uint64 NMD::extract_count_19_18_17_16(uint64 instruction)
 987 {
 988     uint64 value = 0;
 989     value |= extract_bits(instruction, 16, 4);
 990     return value;
 991 }
 992
 993
 994 uint64 NMD::extract_code_2_1_0(uint64 instruction)
 995 {
 996     uint64 value = 0;
 997     value |= extract_bits(instruction, 0, 3);
 998     return value;
 999 }
1000
1001
1002 uint64 NMD::extract_u_11_10_9_8_7_6_5_4_3_2_1_0(uint64 instruction)
1003 {
1004     uint64 value = 0;
1005     value |= extract_bits(instruction, 0, 12);
1006     return value;
1007 }
1008
1009
1010 uint64 NMD::extract_rs_4_3_2_1_0(uint64 instruction)
1011 {
1012     uint64 value = 0;
1013     value |= extract_bits(instruction, 0, 5);
1014     return value;
1015 }
1016
1017
1018 uint64 NMD::extract_u_20_to_3__s3(uint64 instruction)
1019 {
1020     uint64 value = 0;
1021     value |= extract_bits(instruction, 3, 18) << 3;
1022     return value;
1023 }
1024
1025
1026 uint64 NMD::extract_u_3_2_1_0__s2(uint64 instruction)
1027 {
1028     uint64 value = 0;
1029     value |= extract_bits(instruction, 0, 4) << 2;
1030     return value;
1031 }
1032
1033
1034 uint64 NMD::extract_cofun_25_24_23(uint64 instruction)
1035 {
1036     uint64 value = 0;
1037     value |= extract_bits(instruction, 3, 23);
1038     return value;
1039 }
1040
1041
1042 uint64 NMD::extract_u_2_1_0__s2(uint64 instruction)
1043 {
1044     uint64 value = 0;
1045     value |= extract_bits(instruction, 0, 3) << 2;
1046     return value;
1047 }
1048
1049
1050 uint64 NMD::extract_rd3_3_2_1(uint64 instruction)
1051 {
1052     uint64 value = 0;
1053     value |= extract_bits(instruction, 1, 3);
1054     return value;
1055 }
1056
1057
1058 uint64 NMD::extract_sa_15_14_13_12(uint64 instruction)
1059 {
1060     uint64 value = 0;
1061     value |= extract_bits(instruction, 12, 4);
1062     return value;
1063 }
1064
1065
1066 uint64 NMD::extract_rt_25_24_23_22_21(uint64 instruction)
1067 {
1068     uint64 value = 0;
1069     value |= extract_bits(instruction, 21, 5);
1070     return value;
1071 }
1072
1073
1074 uint64 NMD::extract_ru_7_6_5_4_3(uint64 instruction)
1075 {
1076     uint64 value = 0;
1077     value |= extract_bits(instruction, 3, 5);
1078     return value;
1079 }
1080
1081
1082 uint64 NMD::extract_u_17_to_0(uint64 instruction)
1083 {
1084     uint64 value = 0;
1085     value |= extract_bits(instruction, 0, 18);
1086     return value;
1087 }
1088
1089
1090 uint64 NMD::extract_rsz4_4_2_1_0(uint64 instruction)
1091 {
1092     uint64 value = 0;
1093     value |= extract_bits(instruction, 0, 3);
1094     value |= extract_bits(instruction, 4, 1) << 3;
1095     return value;
1096 }
1097
1098
1099 int64 NMD::extract_s__se21_0_20_to_1_s1(uint64 instruction)
1100 {
1101     int64 value = 0;
1102     value |= extract_bits(instruction, 0, 1) << 21;
1103     value |= extract_bits(instruction, 1, 20) << 1;
1104     value = sign_extend(value, 21);
1105     return value;
1106 }
1107
1108
1109 uint64 NMD::extract_op_25_to_3(uint64 instruction)
1110 {
1111     uint64 value = 0;
1112     value |= extract_bits(instruction, 3, 23);
1113     return value;
1114 }
1115
1116
1117 uint64 NMD::extract_rs4_4_2_1_0(uint64 instruction)
1118 {
1119     uint64 value = 0;
1120     value |= extract_bits(instruction, 0, 3);
1121     value |= extract_bits(instruction, 4, 1) << 3;
1122     return value;
1123 }
1124
1125
1126 uint64 NMD::extract_bit_23_22_21(uint64 instruction)
1127 {
1128     uint64 value = 0;
1129     value |= extract_bits(instruction, 21, 3);
1130     return value;
1131 }
1132
1133
1134 uint64 NMD::extract_rt_41_40_39_38_37(uint64 instruction)
1135 {
1136     uint64 value = 0;
1137     value |= extract_bits(instruction, 37, 5);
1138     return value;
1139 }
1140
1141
1142 int64 NMD::extract_shift__se5_21_20_19_18_17_16(uint64 instruction)
1143 {
1144     int64 value = 0;
1145     value |= extract_bits(instruction, 16, 6);
1146     value = sign_extend(value, 5);
1147     return value;
1148 }
1149
1150
1151 uint64 NMD::extract_rd2_3_8(uint64 instruction)
1152 {
1153     uint64 value = 0;
1154     value |= extract_bits(instruction, 3, 1) << 1;
1155     value |= extract_bits(instruction, 8, 1);
1156     return value;
1157 }
1158
1159
1160 uint64 NMD::extract_code_17_to_0(uint64 instruction)
1161 {
1162     uint64 value = 0;
1163     value |= extract_bits(instruction, 0, 18);
1164     return value;
1165 }
1166
1167
1168 uint64 NMD::extract_size_20_19_18_17_16(uint64 instruction)
1169 {
1170     uint64 value = 0;
1171     value |= extract_bits(instruction, 16, 5);
1172     return value;
1173 }
1174
1175
1176 int64 NMD::extract_s__se8_15_7_6_5_4_3_2_s2(uint64 instruction)
1177 {
1178     int64 value = 0;
1179     value |= extract_bits(instruction, 2, 6) << 2;
1180     value |= extract_bits(instruction, 15, 1) << 8;
1181     value = sign_extend(value, 8);
1182     return value;
1183 }
1184
1185
1186 uint64 NMD::extract_u_15_to_0(uint64 instruction)
1187 {
1188     uint64 value = 0;
1189     value |= extract_bits(instruction, 0, 16);
1190     return value;
1191 }
1192
1193
1194 uint64 NMD::extract_fs_20_19_18_17_16(uint64 instruction)
1195 {
1196     uint64 value = 0;
1197     value |= extract_bits(instruction, 16, 5);
1198     return value;
1199 }
1200
1201
1202 int64 NMD::extract_s__se8_15_7_6_5_4_3_2_1_0(uint64 instruction)
1203 {
1204     int64 value = 0;
1205     value |= extract_bits(instruction, 0, 8);
1206     value |= extract_bits(instruction, 15, 1) << 8;
1207     value = sign_extend(value, 8);
1208     return value;
1209 }
1210
1211
1212 uint64 NMD::extract_stype_20_19_18_17_16(uint64 instruction)
1213 {
1214     uint64 value = 0;
1215     value |= extract_bits(instruction, 16, 5);
1216     return value;
1217 }
1218
1219
1220 uint64 NMD::extract_rtl_11(uint64 instruction)
1221 {
1222     uint64 value = 0;
1223     value |= extract_bits(instruction, 9, 1);
1224     return value;
1225 }
1226
1227
1228 uint64 NMD::extract_hs_20_19_18_17_16(uint64 instruction)
1229 {
1230     uint64 value = 0;
1231     value |= extract_bits(instruction, 16, 5);
1232     return value;
1233 }
1234
1235
1236 uint64 NMD::extract_sel_13_12_11(uint64 instruction)
1237 {
1238     uint64 value = 0;
1239     value |= extract_bits(instruction, 11, 3);
1240     return value;
1241 }
1242
1243
1244 uint64 NMD::extract_lsb_4_3_2_1_0(uint64 instruction)
1245 {
1246     uint64 value = 0;
1247     value |= extract_bits(instruction, 0, 5);
1248     return value;
1249 }
1250
1251
1252 uint64 NMD::extract_gp_2(uint64 instruction)
1253 {
1254     uint64 value = 0;
1255     value |= extract_bits(instruction, 2, 1);
1256     return value;
1257 }
1258
1259
1260 uint64 NMD::extract_rt3_9_8_7(uint64 instruction)
1261 {
1262     uint64 value = 0;
1263     value |= extract_bits(instruction, 7, 3);
1264     return value;
1265 }
1266
1267
1268 uint64 NMD::extract_ft_25_24_23_22_21(uint64 instruction)
1269 {
1270     uint64 value = 0;
1271     value |= extract_bits(instruction, 21, 5);
1272     return value;
1273 }
1274
1275
1276 uint64 NMD::extract_u_17_16_15_14_13_12_11(uint64 instruction)
1277 {
1278     uint64 value = 0;
1279     value |= extract_bits(instruction, 11, 7);
1280     return value;
1281 }
1282
1283
1284 uint64 NMD::extract_cs_20_19_18_17_16(uint64 instruction)
1285 {
1286     uint64 value = 0;
1287     value |= extract_bits(instruction, 16, 5);
1288     return value;
1289 }
1290
1291
1292 uint64 NMD::extract_rt4_9_7_6_5(uint64 instruction)
1293 {
1294     uint64 value = 0;
1295     value |= extract_bits(instruction, 5, 3);
1296     value |= extract_bits(instruction, 9, 1) << 3;
1297     return value;
1298 }
1299
1300
1301 uint64 NMD::extract_msbt_10_9_8_7_6(uint64 instruction)
1302 {
1303     uint64 value = 0;
1304     value |= extract_bits(instruction, 6, 5);
1305     return value;
1306 }
1307
1308
1309 uint64 NMD::extract_u_5_4_3_2_1_0__s2(uint64 instruction)
1310 {
1311     uint64 value = 0;
1312     value |= extract_bits(instruction, 0, 6) << 2;
1313     return value;
1314 }
1315
1316
1317 uint64 NMD::extract_sa_15_14_13(uint64 instruction)
1318 {
1319     uint64 value = 0;
1320     value |= extract_bits(instruction, 13, 3);
1321     return value;
1322 }
1323
1324
1325 int64 NMD::extract_s__se14_0_13_to_1_s1(uint64 instruction)
1326 {
1327     int64 value = 0;
1328     value |= extract_bits(instruction, 0, 1) << 14;
1329     value |= extract_bits(instruction, 1, 13) << 1;
1330     value = sign_extend(value, 14);
1331     return value;
1332 }
1333
1334
1335 uint64 NMD::extract_rs3_6_5_4(uint64 instruction)
1336 {
1337     uint64 value = 0;
1338     value |= extract_bits(instruction, 4, 3);
1339     return value;
1340 }
1341
1342
1343 uint64 NMD::extract_u_31_to_0__s32(uint64 instruction)
1344 {
1345     uint64 value = 0;
1346     value |= extract_bits(instruction, 0, 32) << 32;
1347     return value;
1348 }
1349
1350
1351 uint64 NMD::extract_shift_10_9_8_7_6(uint64 instruction)
1352 {
1353     uint64 value = 0;
1354     value |= extract_bits(instruction, 6, 5);
1355     return value;
1356 }
1357
1358
1359 uint64 NMD::extract_cs_25_24_23_22_21(uint64 instruction)
1360 {
1361     uint64 value = 0;
1362     value |= extract_bits(instruction, 21, 5);
1363     return value;
1364 }
1365
1366
1367 uint64 NMD::extract_shiftx_11_10_9_8_7_6(uint64 instruction)
1368 {
1369     uint64 value = 0;
1370     value |= extract_bits(instruction, 6, 6);
1371     return value;
1372 }
1373
1374
1375 uint64 NMD::extract_rt_9_8_7_6_5(uint64 instruction)
1376 {
1377     uint64 value = 0;
1378     value |= extract_bits(instruction, 5, 5);
1379     return value;
1380 }
1381
1382
1383 uint64 NMD::extract_op_25_24_23_22_21(uint64 instruction)
1384 {
1385     uint64 value = 0;
1386     value |= extract_bits(instruction, 21, 5);
1387     return value;
1388 }
1389
1390
1391 uint64 NMD::extract_u_6_5_4_3_2_1_0__s2(uint64 instruction)
1392 {
1393     uint64 value = 0;
1394     value |= extract_bits(instruction, 0, 7) << 2;
1395     return value;
1396 }
1397
1398
1399 uint64 NMD::extract_bit_16_15_14_13_12_11(uint64 instruction)
1400 {
1401     uint64 value = 0;
1402     value |= extract_bits(instruction, 11, 6);
1403     return value;
1404 }
1405
1406
1407 uint64 NMD::extract_mask_20_19_18_17_16_15_14(uint64 instruction)
1408 {
1409     uint64 value = 0;
1410     value |= extract_bits(instruction, 14, 7);
1411     return value;
1412 }
1413
1414
1415 uint64 NMD::extract_eu_3_2_1_0(uint64 instruction)
1416 {
1417     uint64 value = 0;
1418     value |= extract_bits(instruction, 0, 4);
1419     return value;
1420 }
1421
1422
1423 uint64 NMD::extract_u_7_6_5_4__s4(uint64 instruction)
1424 {
1425     uint64 value = 0;
1426     value |= extract_bits(instruction, 4, 4) << 4;
1427     return value;
1428 }
1429
1430
1431 int64 NMD::extract_s__se8_15_7_6_5_4_3_s3(uint64 instruction)
1432 {
1433     int64 value = 0;
1434     value |= extract_bits(instruction, 3, 5) << 3;
1435     value |= extract_bits(instruction, 15, 1) << 8;
1436     value = sign_extend(value, 8);
1437     return value;
1438 }
1439
1440
1441 uint64 NMD::extract_ft_15_14_13_12_11(uint64 instruction)
1442 {
1443     uint64 value = 0;
1444     value |= extract_bits(instruction, 11, 5);
1445     return value;
1446 }
1447
1448
1449 int64 NMD::extract_s__se31_15_to_0_31_to_16(uint64 instruction)
1450 {
1451     int64 value = 0;
1452     value |= extract_bits(instruction, 0, 16) << 16;
1453     value |= extract_bits(instruction, 16, 16);
1454     value = sign_extend(value, 31);
1455     return value;
1456 }
1457
1458
1459 uint64 NMD::extract_u_20_19_18_17_16_15_14_13(uint64 instruction)
1460 {
1461     uint64 value = 0;
1462     value |= extract_bits(instruction, 13, 8);
1463     return value;
1464 }
1465
1466
1467 uint64 NMD::extract_u_17_to_2__s2(uint64 instruction)
1468 {
1469     uint64 value = 0;
1470     value |= extract_bits(instruction, 2, 16) << 2;
1471     return value;
1472 }
1473
1474
1475 uint64 NMD::extract_rd_15_14_13_12_11(uint64 instruction)
1476 {
1477     uint64 value = 0;
1478     value |= extract_bits(instruction, 11, 5);
1479     return value;
1480 }
1481
1482
1483 uint64 NMD::extract_c0s_20_19_18_17_16(uint64 instruction)
1484 {
1485     uint64 value = 0;
1486     value |= extract_bits(instruction, 16, 5);
1487     return value;
1488 }
1489
1490
1491 uint64 NMD::extract_code_1_0(uint64 instruction)
1492 {
1493     uint64 value = 0;
1494     value |= extract_bits(instruction, 0, 2);
1495     return value;
1496 }
1497
1498
1499 int64 NMD::extract_s__se25_0_24_to_1_s1(uint64 instruction)
1500 {
1501     int64 value = 0;
1502     value |= extract_bits(instruction, 0, 1) << 25;
1503     value |= extract_bits(instruction, 1, 24) << 1;
1504     value = sign_extend(value, 25);
1505     return value;
1506 }
1507
1508
1509 uint64 NMD::extract_u_1_0(uint64 instruction)
1510 {
1511     uint64 value = 0;
1512     value |= extract_bits(instruction, 0, 2);
1513     return value;
1514 }
1515
1516
1517 uint64 NMD::extract_u_3_8__s2(uint64 instruction)
1518 {
1519     uint64 value = 0;
1520     value |= extract_bits(instruction, 3, 1) << 3;
1521     value |= extract_bits(instruction, 8, 1) << 2;
1522     return value;
1523 }
1524
1525
1526 uint64 NMD::extract_fd_15_14_13_12_11(uint64 instruction)
1527 {
1528     uint64 value = 0;
1529     value |= extract_bits(instruction, 11, 5);
1530     return value;
1531 }
1532
1533
1534 uint64 NMD::extract_u_4_3_2_1_0__s2(uint64 instruction)
1535 {
1536     uint64 value = 0;
1537     value |= extract_bits(instruction, 0, 5) << 2;
1538     return value;
1539 }
1540
1541
1542 uint64 NMD::extract_rtz4_9_7_6_5(uint64 instruction)
1543 {
1544     uint64 value = 0;
1545     value |= extract_bits(instruction, 5, 3);
1546     value |= extract_bits(instruction, 9, 1) << 3;
1547     return value;
1548 }
1549
1550
1551 uint64 NMD::extract_sel_15_14_13_12_11(uint64 instruction)
1552 {
1553     uint64 value = 0;
1554     value |= extract_bits(instruction, 11, 5);
1555     return value;
1556 }
1557
1558
1559 uint64 NMD::extract_ct_25_24_23_22_21(uint64 instruction)
1560 {
1561     uint64 value = 0;
1562     value |= extract_bits(instruction, 21, 5);
1563     return value;
1564 }
1565
1566
1567 uint64 NMD::extract_u_20_to_2__s2(uint64 instruction)
1568 {
1569     uint64 value = 0;
1570     value |= extract_bits(instruction, 2, 19) << 2;
1571     return value;
1572 }
1573
1574
1575 int64 NMD::extract_s__se3_4_2_1_0(uint64 instruction)
1576 {
1577     int64 value = 0;
1578     value |= extract_bits(instruction, 0, 3);
1579     value |= extract_bits(instruction, 4, 1) << 3;
1580     value = sign_extend(value, 3);
1581     return value;
1582 }
1583
1584
1585 uint64 NMD::extract_u_3_2_1_0__s1(uint64 instruction)
1586 {
1587     uint64 value = 0;
1588     value |= extract_bits(instruction, 0, 4) << 1;
1589     return value;
1590 }
1591
1592
1593
1594 bool NMD::ADDIU_32__cond(uint64 instruction)
1595 {
1596     uint64 rt = extract_rt_25_24_23_22_21(instruction);
1597     return rt != 0;
1598 }
1599
1600
1601 bool NMD::ADDIU_RS5__cond(uint64 instruction)
1602 {
1603     uint64 rt = extract_rt_9_8_7_6_5(instruction);
1604     return rt != 0;
1605 }
1606
1607
1608 bool NMD::BALRSC_cond(uint64 instruction)
1609 {
1610     uint64 rt = extract_rt_25_24_23_22_21(instruction);
1611     return rt != 0;
1612 }
1613
1614
1615 bool NMD::BEQC_16__cond(uint64 instruction)
1616 {
1617     uint64 rs3 = extract_rs3_6_5_4(instruction);
1618     uint64 rt3 = extract_rt3_9_8_7(instruction);
1619     uint64 u = extract_u_3_2_1_0__s1(instruction);
1620     return rs3 < rt3 && u != 0;
1621 }
1622
1623
1624 bool NMD::BNEC_16__cond(uint64 instruction)
1625 {
1626     uint64 rs3 = extract_rs3_6_5_4(instruction);
1627     uint64 rt3 = extract_rt3_9_8_7(instruction);
1628     uint64 u = extract_u_3_2_1_0__s1(instruction);
1629     return rs3 >= rt3 && u != 0;
1630 }
1631
1632
1633 bool NMD::MOVE_cond(uint64 instruction)
1634 {
1635     uint64 rt = extract_rt_9_8_7_6_5(instruction);
1636     return rt != 0;
1637 }
1638
1639
1640 bool NMD::P16_BR1_cond(uint64 instruction)
1641 {
1642     uint64 u = extract_u_3_2_1_0__s1(instruction);
1643     return u != 0;
1644 }
1645
1646
1647 bool NMD::PREF_S9__cond(uint64 instruction)
1648 {
1649     uint64 hint = extract_hint_25_24_23_22_21(instruction);
1650     return hint != 31;
1651 }
1652
1653
1654 bool NMD::PREFE_cond(uint64 instruction)
1655 {
1656     uint64 hint = extract_hint_25_24_23_22_21(instruction);
1657     return hint != 31;
1658 }
1659
1660
1661 bool NMD::SLTU_cond(uint64 instruction)
1662 {
1663     uint64 rd = extract_rd_15_14_13_12_11(instruction);
1664     return rd != 0;
1665 }
1666
1667
1668
1669 /*
1670  * ABS.D fd, fs - Floating Point Absolute Value
1671  *
1672  *   3         2         1
1673  *  10987654321098765432109876543210
1674  *  010001     00000          000101
1675  *    fmt -----
1676  *               fs -----
1677  *                    fd -----
1678  */
1679 std::string NMD::ABS_D(uint64 instruction)
1680 {
1681     uint64 fd_value = extract_ft_25_24_23_22_21(instruction);
1682     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1683
1684     std::string fs = FPR(copy(fs_value));
1685     std::string fd = FPR(copy(fd_value));
1686
1687     return img::format("ABS.D %s, %s", fd, fs);
1688 }
1689
1690
1691 /*
1692  * ABS.S fd, fs - Floating Point Absolute Value
1693  *
1694  *   3         2         1
1695  *  10987654321098765432109876543210
1696  *  010001     00000          000101
1697  *    fmt -----
1698  *               fd -----
1699  *                    fs -----
1700  */
1701 std::string NMD::ABS_S(uint64 instruction)
1702 {
1703     uint64 fd_value = extract_ft_25_24_23_22_21(instruction);
1704     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1705
1706     std::string fs = FPR(copy(fs_value));
1707     std::string fd = FPR(copy(fd_value));
1708
1709     return img::format("ABS.S %s, %s", fd, fs);
1710 }
1711
1712
1713 /*
1714  * ABSQ_S.PH rt, rs - Find Absolute Value of Two Fractional Halfwords
1715  *
1716  *   3         2         1
1717  *  10987654321098765432109876543210
1718  *  001000          0001000100111111
1719  *     rt -----
1720  *          rs -----
1721  */
1722 std::string NMD::ABSQ_S_PH(uint64 instruction)
1723 {
1724     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1725     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1726
1727     std::string rt = GPR(copy(rt_value));
1728     std::string rs = GPR(copy(rs_value));
1729
1730     return img::format("ABSQ_S.PH %s, %s", rt, rs);
1731 }
1732
1733
1734 /*
1735  * ABSQ_S.QB rt, rs - Find Absolute Value of Four Fractional Byte Values
1736  *
1737  *   3         2         1
1738  *  10987654321098765432109876543210
1739  *  001000          0000000100111111
1740  *     rt -----
1741  *          rs -----
1742  */
1743 std::string NMD::ABSQ_S_QB(uint64 instruction)
1744 {
1745     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1746     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1747
1748     std::string rt = GPR(copy(rt_value));
1749     std::string rs = GPR(copy(rs_value));
1750
1751     return img::format("ABSQ_S.QB %s, %s", rt, rs);
1752 }
1753
1754
1755 /*
1756  *
1757  *
1758  *   3         2         1
1759  *  10987654321098765432109876543210
1760  *  001000          0010000100111111
1761  *     rt -----
1762  *          rs -----
1763  */
1764 std::string NMD::ABSQ_S_W(uint64 instruction)
1765 {
1766     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1767     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1768
1769     std::string rt = GPR(copy(rt_value));
1770     std::string rs = GPR(copy(rs_value));
1771
1772     return img::format("ABSQ_S.W %s, %s", rt, rs);
1773 }
1774
1775
1776 /*
1777  *
1778  *
1779  *   3         2         1
1780  *  10987654321098765432109876543210
1781  *  001000          0010000100111111
1782  *     rt -----
1783  *          rs -----
1784  */
1785 std::string NMD::ACLR(uint64 instruction)
1786 {
1787     uint64 bit_value = extract_bit_23_22_21(instruction);
1788     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1789     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
1790
1791     std::string bit = IMMEDIATE(copy(bit_value));
1792     std::string s = IMMEDIATE(copy(s_value));
1793     std::string rs = GPR(copy(rs_value));
1794
1795     return img::format("ACLR %s, %s(%s)", bit, s, rs);
1796 }
1797
1798
1799 /*
1800  *
1801  *
1802  *   3         2         1
1803  *  10987654321098765432109876543210
1804  *  001000          0010000100111111
1805  *     rt -----
1806  *          rs -----
1807  */
1808 std::string NMD::ADD(uint64 instruction)
1809 {
1810     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1811     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1812     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
1813
1814     std::string rd = GPR(copy(rd_value));
1815     std::string rs = GPR(copy(rs_value));
1816     std::string rt = GPR(copy(rt_value));
1817
1818     return img::format("ADD %s, %s, %s", rd, rs, rt);
1819 }
1820
1821
1822 /*
1823  * ADD.D fd, fs, ft - Floating Point Add
1824  *
1825  *   3         2         1
1826  *  10987654321098765432109876543210
1827  *  010001                    000101
1828  *    fmt -----
1829  *          ft -----
1830  *               fs -----
1831  *                    fd -----
1832  */
1833 std::string NMD::ADD_D(uint64 instruction)
1834 {
1835     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
1836     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1837     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
1838
1839     std::string ft = FPR(copy(ft_value));
1840     std::string fs = FPR(copy(fs_value));
1841     std::string fd = FPR(copy(fd_value));
1842
1843     return img::format("ADD.D %s, %s, %s", fd, fs, ft);
1844 }
1845
1846
1847 /*
1848  * ADD.S fd, fs, ft - Floating Point Add
1849  *
1850  *   3         2         1
1851  *  10987654321098765432109876543210
1852  *  010001                    000101
1853  *    fmt -----
1854  *          ft -----
1855  *               fs -----
1856  *                    fd -----
1857  */
1858 std::string NMD::ADD_S(uint64 instruction)
1859 {
1860     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
1861     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1862     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
1863
1864     std::string ft = FPR(copy(ft_value));
1865     std::string fs = FPR(copy(fs_value));
1866     std::string fd = FPR(copy(fd_value));
1867
1868     return img::format("ADD.S %s, %s, %s", fd, fs, ft);
1869 }
1870
1871
1872 /*
1873  *
1874  *
1875  *   3         2         1
1876  *  10987654321098765432109876543210
1877  *  001000          0010000100111111
1878  *     rt -----
1879  *          rs -----
1880  */
1881 std::string NMD::ADDIU_32_(uint64 instruction)
1882 {
1883     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1884     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1885     uint64 u_value = extract_u_15_to_0(instruction);
1886
1887     std::string rt = GPR(copy(rt_value));
1888     std::string rs = GPR(copy(rs_value));
1889     std::string u = IMMEDIATE(copy(u_value));
1890
1891     return img::format("ADDIU %s, %s, %s", rt, rs, u);
1892 }
1893
1894
1895 /*
1896  *
1897  *
1898  *   3         2         1
1899  *  10987654321098765432109876543210
1900  *  001000          0010000100111111
1901  *     rt -----
1902  *          rs -----
1903  */
1904 std::string NMD::ADDIU_48_(uint64 instruction)
1905 {
1906     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
1907     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
1908
1909     std::string rt = GPR(copy(rt_value));
1910     std::string s = IMMEDIATE(copy(s_value));
1911
1912     return img::format("ADDIU %s, %s", rt, s);
1913 }
1914
1915
1916 /*
1917  *
1918  *
1919  *   3         2         1
1920  *  10987654321098765432109876543210
1921  *  001000          0010000100111111
1922  *     rt -----
1923  *          rs -----
1924  */
1925 std::string NMD::ADDIU_GP48_(uint64 instruction)
1926 {
1927     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
1928     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
1929
1930     std::string rt = GPR(copy(rt_value));
1931     std::string s = IMMEDIATE(copy(s_value));
1932
1933     return img::format("ADDIU %s, $%d, %s", rt, 28, s);
1934 }
1935
1936
1937 /*
1938  *
1939  *
1940  *   3         2         1
1941  *  10987654321098765432109876543210
1942  *  001000          0010000100111111
1943  *     rt -----
1944  *          rs -----
1945  */
1946 std::string NMD::ADDIU_GP_B_(uint64 instruction)
1947 {
1948     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1949     uint64 u_value = extract_u_17_to_0(instruction);
1950
1951     std::string rt = GPR(copy(rt_value));
1952     std::string u = IMMEDIATE(copy(u_value));
1953
1954     return img::format("ADDIU %s, $%d, %s", rt, 28, u);
1955 }
1956
1957
1958 /*
1959  *
1960  *
1961  *   3         2         1
1962  *  10987654321098765432109876543210
1963  *  001000          0010000100111111
1964  *     rt -----
1965  *          rs -----
1966  */
1967 std::string NMD::ADDIU_GP_W_(uint64 instruction)
1968 {
1969     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1970     uint64 u_value = extract_u_20_to_2__s2(instruction);
1971
1972     std::string rt = GPR(copy(rt_value));
1973     std::string u = IMMEDIATE(copy(u_value));
1974
1975     return img::format("ADDIU %s, $%d, %s", rt, 28, u);
1976 }
1977
1978
1979 /*
1980  *
1981  *
1982  *   3         2         1
1983  *  10987654321098765432109876543210
1984  *  001000          0010000100111111
1985  *     rt -----
1986  *          rs -----
1987  */
1988 std::string NMD::ADDIU_NEG_(uint64 instruction)
1989 {
1990     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1991     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1992     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
1993
1994     std::string rt = GPR(copy(rt_value));
1995     std::string rs = GPR(copy(rs_value));
1996     std::string u = IMMEDIATE(neg_copy(u_value));
1997
1998     return img::format("ADDIU %s, %s, %s", rt, rs, u);
1999 }
2000
2001
2002 /*
2003  *
2004  *
2005  *   3         2         1
2006  *  10987654321098765432109876543210
2007  *  001000          0010000100111111
2008  *     rt -----
2009  *          rs -----
2010  */
2011 std::string NMD::ADDIU_R1_SP_(uint64 instruction)
2012 {
2013     uint64 u_value = extract_u_5_4_3_2_1_0__s2(instruction);
2014     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2015
2016     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2017     std::string u = IMMEDIATE(copy(u_value));
2018
2019     return img::format("ADDIU %s, $%d, %s", rt3, 29, u);
2020 }
2021
2022
2023 /*
2024  *
2025  *
2026  *   3         2         1
2027  *  10987654321098765432109876543210
2028  *  001000          0010000100111111
2029  *     rt -----
2030  *          rs -----
2031  */
2032 std::string NMD::ADDIU_R2_(uint64 instruction)
2033 {
2034     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2035     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2036     uint64 u_value = extract_u_2_1_0__s2(instruction);
2037
2038     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2039     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2040     std::string u = IMMEDIATE(copy(u_value));
2041
2042     return img::format("ADDIU %s, %s, %s", rt3, rs3, u);
2043 }
2044
2045
2046 /*
2047  * ADDIU[RS5] rt, s5 - Add Signed Word and Set Carry Bit
2048  *
2049  *  5432109876543210
2050  *  100100      1
2051  *     rt -----
2052  *           s - ---
2053  */
2054 std::string NMD::ADDIU_RS5_(uint64 instruction)
2055 {
2056     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
2057     int64 s_value = extract_s__se3_4_2_1_0(instruction);
2058
2059     std::string rt = GPR(copy(rt_value));
2060     std::string s = IMMEDIATE(copy(s_value));
2061
2062     return img::format("ADDIU %s, %s", rt, s);
2063 }
2064
2065
2066 /*
2067  *
2068  *
2069  *   3         2         1
2070  *  10987654321098765432109876543210
2071  *  001000               x1110000101
2072  *     rt -----
2073  *          rs -----
2074  *               rd -----
2075  */
2076 std::string NMD::ADDIUPC_32_(uint64 instruction)
2077 {
2078     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2079     int64 s_value = extract_s__se21_0_20_to_1_s1(instruction);
2080
2081     std::string rt = GPR(copy(rt_value));
2082     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2083
2084     return img::format("ADDIUPC %s, %s", rt, s);
2085 }
2086
2087
2088 /*
2089  *
2090  *
2091  *   3         2         1
2092  *  10987654321098765432109876543210
2093  *  001000               x1110000101
2094  *     rt -----
2095  *          rs -----
2096  *               rd -----
2097  */
2098 std::string NMD::ADDIUPC_48_(uint64 instruction)
2099 {
2100     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
2101     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
2102
2103     std::string rt = GPR(copy(rt_value));
2104     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
2105
2106     return img::format("ADDIUPC %s, %s", rt, s);
2107 }
2108
2109
2110 /*
2111  * ADDQ.PH rd, rt, rs - Add Fractional Halfword Vectors
2112  *
2113  *   3         2         1
2114  *  10987654321098765432109876543210
2115  *  001000               00000001101
2116  *     rt -----
2117  *          rs -----
2118  *               rd -----
2119  */
2120 std::string NMD::ADDQ_PH(uint64 instruction)
2121 {
2122     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2123     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2124     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2125
2126     std::string rd = GPR(copy(rd_value));
2127     std::string rs = GPR(copy(rs_value));
2128     std::string rt = GPR(copy(rt_value));
2129
2130     return img::format("ADDQ.PH %s, %s, %s", rd, rs, rt);
2131 }
2132
2133
2134 /*
2135  * ADDQ_S.PH rd, rt, rs - Add Fractional Halfword Vectors
2136  *
2137  *   3         2         1
2138  *  10987654321098765432109876543210
2139  *  001000               10000001101
2140  *     rt -----
2141  *          rs -----
2142  *               rd -----
2143  */
2144 std::string NMD::ADDQ_S_PH(uint64 instruction)
2145 {
2146     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2147     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2148     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2149
2150     std::string rd = GPR(copy(rd_value));
2151     std::string rs = GPR(copy(rs_value));
2152     std::string rt = GPR(copy(rt_value));
2153
2154     return img::format("ADDQ_S.PH %s, %s, %s", rd, rs, rt);
2155 }
2156
2157
2158 /*
2159  * ADDQ_S.W rd, rt, rs - Add Fractional Words
2160  *
2161  *   3         2         1
2162  *  10987654321098765432109876543210
2163  *  001000               x1100000101
2164  *     rt -----
2165  *          rs -----
2166  *               rd -----
2167  */
2168 std::string NMD::ADDQ_S_W(uint64 instruction)
2169 {
2170     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2171     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2172     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2173
2174     std::string rd = GPR(copy(rd_value));
2175     std::string rs = GPR(copy(rs_value));
2176     std::string rt = GPR(copy(rt_value));
2177
2178     return img::format("ADDQ_S.W %s, %s, %s", rd, rs, rt);
2179 }
2180
2181
2182 /*
2183  * ADDQH.PH rd, rt, rs - Add Fractional Halfword Vectors And Shift Right
2184  *                       to Halve Results
2185  *
2186  *   3         2         1
2187  *  10987654321098765432109876543210
2188  *  001000               00001001101
2189  *     rt -----
2190  *          rs -----
2191  *               rd -----
2192  */
2193 std::string NMD::ADDQH_PH(uint64 instruction)
2194 {
2195     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2196     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2197     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2198
2199     std::string rd = GPR(copy(rd_value));
2200     std::string rs = GPR(copy(rs_value));
2201     std::string rt = GPR(copy(rt_value));
2202
2203     return img::format("ADDQH.PH %s, %s, %s", rd, rs, rt);
2204 }
2205
2206
2207 /*
2208  * ADDQH_R.PH rd, rt, rs - Add Fractional Halfword Vectors And Shift Right
2209  *                         to Halve Results
2210  *
2211  *   3         2         1
2212  *  10987654321098765432109876543210
2213  *  001000               10001001101
2214  *     rt -----
2215  *          rs -----
2216  *               rd -----
2217  */
2218 std::string NMD::ADDQH_R_PH(uint64 instruction)
2219 {
2220     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2221     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2222     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2223
2224     std::string rd = GPR(copy(rd_value));
2225     std::string rs = GPR(copy(rs_value));
2226     std::string rt = GPR(copy(rt_value));
2227
2228     return img::format("ADDQH_R.PH %s, %s, %s", rd, rs, rt);
2229 }
2230
2231
2232 /*
2233  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
2234  *
2235  *   3         2         1
2236  *  10987654321098765432109876543210
2237  *  001000               00010001101
2238  *     rt -----
2239  *          rs -----
2240  *               rd -----
2241  */
2242 std::string NMD::ADDQH_R_W(uint64 instruction)
2243 {
2244     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2245     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2246     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2247
2248     std::string rd = GPR(copy(rd_value));
2249     std::string rs = GPR(copy(rs_value));
2250     std::string rt = GPR(copy(rt_value));
2251
2252     return img::format("ADDQH_R.W %s, %s, %s", rd, rs, rt);
2253 }
2254
2255
2256 /*
2257  * ADDQH.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
2258  *
2259  *   3         2         1
2260  *  10987654321098765432109876543210
2261  *  001000               10010001101
2262  *     rt -----
2263  *          rs -----
2264  *               rd -----
2265  */
2266 std::string NMD::ADDQH_W(uint64 instruction)
2267 {
2268     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2269     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2270     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2271
2272     std::string rd = GPR(copy(rd_value));
2273     std::string rs = GPR(copy(rs_value));
2274     std::string rt = GPR(copy(rt_value));
2275
2276     return img::format("ADDQH.W %s, %s, %s", rd, rs, rt);
2277 }
2278
2279
2280 /*
2281  * ADDSC rd, rt, rs - Add Signed Word and Set Carry Bit
2282  *
2283  *   3         2         1
2284  *  10987654321098765432109876543210
2285  *  001000               x1110000101
2286  *     rt -----
2287  *          rs -----
2288  *               rd -----
2289  */
2290 std::string NMD::ADDSC(uint64 instruction)
2291 {
2292     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2293     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2294     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2295
2296     std::string rd = GPR(copy(rd_value));
2297     std::string rs = GPR(copy(rs_value));
2298     std::string rt = GPR(copy(rt_value));
2299
2300     return img::format("ADDSC %s, %s, %s", rd, rs, rt);
2301 }
2302
2303
2304 /*
2305  * ADDU[16] rd3, rs3, rt3 -
2306  *
2307  *  5432109876543210
2308  *  101100         0
2309  *    rt3 ---
2310  *       rs3 ---
2311  *          rd3 ---
2312  */
2313 std::string NMD::ADDU_16_(uint64 instruction)
2314 {
2315     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2316     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2317     uint64 rd3_value = extract_rd3_3_2_1(instruction);
2318
2319     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2320     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2321     std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
2322
2323     return img::format("ADDU %s, %s, %s", rd3, rs3, rt3);
2324 }
2325
2326
2327 /*
2328  *
2329  *
2330  *   3         2         1
2331  *  10987654321098765432109876543210
2332  *  001000               x1110000101
2333  *     rt -----
2334  *          rs -----
2335  *               rd -----
2336  */
2337 std::string NMD::ADDU_32_(uint64 instruction)
2338 {
2339     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2340     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2341     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2342
2343     std::string rd = GPR(copy(rd_value));
2344     std::string rs = GPR(copy(rs_value));
2345     std::string rt = GPR(copy(rt_value));
2346
2347     return img::format("ADDU %s, %s, %s", rd, rs, rt);
2348 }
2349
2350
2351 /*
2352  *
2353  *
2354  *   3         2         1
2355  *  10987654321098765432109876543210
2356  *  001000               x1110000101
2357  *     rt -----
2358  *          rs -----
2359  *               rd -----
2360  */
2361 std::string NMD::ADDU_4X4_(uint64 instruction)
2362 {
2363     uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
2364     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
2365
2366     std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
2367     std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
2368
2369     return img::format("ADDU %s, %s", rs4, rt4);
2370 }
2371
2372
2373 /*
2374  * ADDU.PH rd, rt, rs - Unsigned Add Integer Halfwords
2375  *
2376  *   3         2         1
2377  *  10987654321098765432109876543210
2378  *  001000               00100001101
2379  *     rt -----
2380  *          rs -----
2381  *               rd -----
2382  */
2383 std::string NMD::ADDU_PH(uint64 instruction)
2384 {
2385     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2386     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2387     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2388
2389     std::string rd = GPR(copy(rd_value));
2390     std::string rs = GPR(copy(rs_value));
2391     std::string rt = GPR(copy(rt_value));
2392
2393     return img::format("ADDU.PH %s, %s, %s", rd, rs, rt);
2394 }
2395
2396
2397 /*
2398  * ADDU.QB rd, rt, rs - Unsigned Add Quad Byte Vectors
2399  *
2400  *   3         2         1
2401  *  10987654321098765432109876543210
2402  *  001000               00011001101
2403  *     rt -----
2404  *          rs -----
2405  *               rd -----
2406  */
2407 std::string NMD::ADDU_QB(uint64 instruction)
2408 {
2409     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2410     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2411     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2412
2413     std::string rd = GPR(copy(rd_value));
2414     std::string rs = GPR(copy(rs_value));
2415     std::string rt = GPR(copy(rt_value));
2416
2417     return img::format("ADDU.QB %s, %s, %s", rd, rs, rt);
2418 }
2419
2420
2421 /*
2422  * ADDU_S.PH rd, rt, rs - Unsigned Add Integer Halfwords
2423  *
2424  *   3         2         1
2425  *  10987654321098765432109876543210
2426  *  001000               10100001101
2427  *     rt -----
2428  *          rs -----
2429  *               rd -----
2430  */
2431 std::string NMD::ADDU_S_PH(uint64 instruction)
2432 {
2433     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2434     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2435     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2436
2437     std::string rd = GPR(copy(rd_value));
2438     std::string rs = GPR(copy(rs_value));
2439     std::string rt = GPR(copy(rt_value));
2440
2441     return img::format("ADDU_S.PH %s, %s, %s", rd, rs, rt);
2442 }
2443
2444
2445 /*
2446  * ADDU_S.QB rd, rt, rs - Unsigned Add Quad Byte Vectors
2447  *
2448  *   3         2         1
2449  *  10987654321098765432109876543210
2450  *  001000               10011001101
2451  *     rt -----
2452  *          rs -----
2453  *               rd -----
2454  */
2455 std::string NMD::ADDU_S_QB(uint64 instruction)
2456 {
2457     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2458     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2459     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2460
2461     std::string rd = GPR(copy(rd_value));
2462     std::string rs = GPR(copy(rs_value));
2463     std::string rt = GPR(copy(rt_value));
2464
2465     return img::format("ADDU_S.QB %s, %s, %s", rd, rs, rt);
2466 }
2467
2468
2469 /*
2470  * ADDUH.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift
2471  *                       to Halve Results
2472  *
2473  *   3         2         1
2474  *  10987654321098765432109876543210
2475  *  001000               00101001101
2476  *     rt -----
2477  *          rs -----
2478  *               rd -----
2479  */
2480 std::string NMD::ADDUH_QB(uint64 instruction)
2481 {
2482     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2483     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2484     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2485
2486     std::string rd = GPR(copy(rd_value));
2487     std::string rs = GPR(copy(rs_value));
2488     std::string rt = GPR(copy(rt_value));
2489
2490     return img::format("ADDUH.QB %s, %s, %s", rd, rs, rt);
2491 }
2492
2493
2494 /*
2495  * ADDUH_R.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift
2496  *                         to Halve Results
2497  *
2498  *   3         2         1
2499  *  10987654321098765432109876543210
2500  *  001000               10101001101
2501  *     rt -----
2502  *          rs -----
2503  *               rd -----
2504  */
2505 std::string NMD::ADDUH_R_QB(uint64 instruction)
2506 {
2507     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2508     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2509     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2510
2511     std::string rd = GPR(copy(rd_value));
2512     std::string rs = GPR(copy(rs_value));
2513     std::string rt = GPR(copy(rt_value));
2514
2515     return img::format("ADDUH_R.QB %s, %s, %s", rd, rs, rt);
2516 }
2517
2518 /*
2519  * ADDWC rd, rt, rs - Add Word with Carry Bit
2520  *
2521  *   3         2         1
2522  *  10987654321098765432109876543210
2523  *  001000               x1111000101
2524  *     rt -----
2525  *          rs -----
2526  *               rd -----
2527  */
2528 std::string NMD::ADDWC(uint64 instruction)
2529 {
2530     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2531     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2532     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2533
2534     std::string rd = GPR(copy(rd_value));
2535     std::string rs = GPR(copy(rs_value));
2536     std::string rt = GPR(copy(rt_value));
2537
2538     return img::format("ADDWC %s, %s, %s", rd, rs, rt);
2539 }
2540
2541
2542 /*
2543  *
2544  *
2545  *   3         2         1
2546  *  10987654321098765432109876543210
2547  *  001000               x1110000101
2548  *     rt -----
2549  *          rs -----
2550  *               rd -----
2551  */
2552 std::string NMD::ALUIPC(uint64 instruction)
2553 {
2554     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2555     int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction);
2556
2557     std::string rt = GPR(copy(rt_value));
2558     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2559
2560     return img::format("ALUIPC %s, %%pcrel_hi(%s)", rt, s);
2561 }
2562
2563
2564 /*
2565  * AND[16] rt3, rs3 -
2566  *
2567  *  5432109876543210
2568  *  101100
2569  *    rt3 ---
2570  *       rs3 ---
2571  *           eu ----
2572  */
2573 std::string NMD::AND_16_(uint64 instruction)
2574 {
2575     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2576     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2577
2578     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2579     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2580
2581     return img::format("AND %s, %s", rs3, rt3);
2582 }
2583
2584
2585 /*
2586  *
2587  *
2588  *   3         2         1
2589  *  10987654321098765432109876543210
2590  *  001000               x1110000101
2591  *     rt -----
2592  *          rs -----
2593  *               rd -----
2594  */
2595 std::string NMD::AND_32_(uint64 instruction)
2596 {
2597     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2598     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2599     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2600
2601     std::string rd = GPR(copy(rd_value));
2602     std::string rs = GPR(copy(rs_value));
2603     std::string rt = GPR(copy(rt_value));
2604
2605     return img::format("AND %s, %s, %s", rd, rs, rt);
2606 }
2607
2608
2609 /*
2610  * ANDI rt, rs, u -
2611  *
2612  *  5432109876543210
2613  *  101100
2614  *    rt3 ---
2615  *       rs3 ---
2616  *           eu ----
2617  */
2618 std::string NMD::ANDI_16_(uint64 instruction)
2619 {
2620     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2621     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2622     uint64 eu_value = extract_eu_3_2_1_0(instruction);
2623
2624     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2625     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2626     std::string eu = IMMEDIATE(encode_eu_from_u_andi16(eu_value));
2627
2628     return img::format("ANDI %s, %s, %s", rt3, rs3, eu);
2629 }
2630
2631
2632 /*
2633  *
2634  *
2635  *   3         2         1
2636  *  10987654321098765432109876543210
2637  *  001000               x1110000101
2638  *     rt -----
2639  *          rs -----
2640  *               rd -----
2641  */
2642 std::string NMD::ANDI_32_(uint64 instruction)
2643 {
2644     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2645     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2646     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
2647
2648     std::string rt = GPR(copy(rt_value));
2649     std::string rs = GPR(copy(rs_value));
2650     std::string u = IMMEDIATE(copy(u_value));
2651
2652     return img::format("ANDI %s, %s, %s", rt, rs, u);
2653 }
2654
2655
2656 /*
2657  *
2658  *
2659  *   3         2         1
2660  *  10987654321098765432109876543210
2661  *  001000               x1110000101
2662  *     rt -----
2663  *          rs -----
2664  *               rd -----
2665  */
2666 std::string NMD::APPEND(uint64 instruction)
2667 {
2668     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2669     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2670     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
2671
2672     std::string rt = GPR(copy(rt_value));
2673     std::string rs = GPR(copy(rs_value));
2674     std::string sa = IMMEDIATE(copy(sa_value));
2675
2676     return img::format("APPEND %s, %s, %s", rt, rs, sa);
2677 }
2678
2679
2680 /*
2681  *
2682  *
2683  *   3         2         1
2684  *  10987654321098765432109876543210
2685  *  001000               x1110000101
2686  *     rt -----
2687  *          rs -----
2688  *               rd -----
2689  */
2690 std::string NMD::ASET(uint64 instruction)
2691 {
2692     uint64 bit_value = extract_bit_23_22_21(instruction);
2693     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2694     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
2695
2696     std::string bit = IMMEDIATE(copy(bit_value));
2697     std::string s = IMMEDIATE(copy(s_value));
2698     std::string rs = GPR(copy(rs_value));
2699
2700     return img::format("ASET %s, %s(%s)", bit, s, rs);
2701 }
2702
2703
2704 /*
2705  *
2706  *
2707  *   3         2         1
2708  *  10987654321098765432109876543210
2709  *  001000               x1110000101
2710  *     rt -----
2711  *          rs -----
2712  *               rd -----
2713  */
2714 std::string NMD::BALC_16_(uint64 instruction)
2715 {
2716     int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction);
2717
2718     std::string s = ADDRESS(encode_s_from_address(s_value), 2);
2719
2720     return img::format("BALC %s", s);
2721 }
2722
2723
2724 /*
2725  *
2726  *
2727  *   3         2         1
2728  *  10987654321098765432109876543210
2729  *  001000               x1110000101
2730  *     rt -----
2731  *          rs -----
2732  *               rd -----
2733  */
2734 std::string NMD::BALC_32_(uint64 instruction)
2735 {
2736     int64 s_value = extract_s__se25_0_24_to_1_s1(instruction);
2737
2738     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2739
2740     return img::format("BALC %s", s);
2741 }
2742
2743
2744 /*
2745  *
2746  *
2747  *   3         2         1
2748  *  10987654321098765432109876543210
2749  *  001000               x1110000101
2750  *     rt -----
2751  *          rs -----
2752  *               rd -----
2753  */
2754 std::string NMD::BALRSC(uint64 instruction)
2755 {
2756     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2757     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2758
2759     std::string rt = GPR(copy(rt_value));
2760     std::string rs = GPR(copy(rs_value));
2761
2762     return img::format("BALRSC %s, %s", rt, rs);
2763 }
2764
2765
2766 /*
2767  *
2768  *
2769  *   3         2         1
2770  *  10987654321098765432109876543210
2771  *  001000               x1110000101
2772  *     rt -----
2773  *          rs -----
2774  *               rd -----
2775  */
2776 std::string NMD::BBEQZC(uint64 instruction)
2777 {
2778     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2779     uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction);
2780     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
2781
2782     std::string rt = GPR(copy(rt_value));
2783     std::string bit = IMMEDIATE(copy(bit_value));
2784     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2785
2786     return img::format("BBEQZC %s, %s, %s", rt, bit, s);
2787 }
2788
2789
2790 /*
2791  *
2792  *
2793  *   3         2         1
2794  *  10987654321098765432109876543210
2795  *  001000               x1110000101
2796  *     rt -----
2797  *          rs -----
2798  *               rd -----
2799  */
2800 std::string NMD::BBNEZC(uint64 instruction)
2801 {
2802     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2803     uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction);
2804     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
2805
2806     std::string rt = GPR(copy(rt_value));
2807     std::string bit = IMMEDIATE(copy(bit_value));
2808     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2809
2810     return img::format("BBNEZC %s, %s, %s", rt, bit, s);
2811 }
2812
2813
2814 /*
2815  *
2816  *
2817  *   3         2         1
2818  *  10987654321098765432109876543210
2819  *  001000               x1110000101
2820  *     rt -----
2821  *          rs -----
2822  *               rd -----
2823  */
2824 std::string NMD::BC_16_(uint64 instruction)
2825 {
2826     int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction);
2827
2828     std::string s = ADDRESS(encode_s_from_address(s_value), 2);
2829
2830     return img::format("BC %s", s);
2831 }
2832
2833
2834 /*
2835  *
2836  *
2837  *   3         2         1
2838  *  10987654321098765432109876543210
2839  *  001000               x1110000101
2840  *     rt -----
2841  *          rs -----
2842  *               rd -----
2843  */
2844 std::string NMD::BC_32_(uint64 instruction)
2845 {
2846     int64 s_value = extract_s__se25_0_24_to_1_s1(instruction);
2847
2848     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2849
2850     return img::format("BC %s", s);
2851 }
2852
2853
2854 /*
2855  *
2856  *
2857  *   3         2         1
2858  *  10987654321098765432109876543210
2859  *  001000               x1110000101
2860  *     rt -----
2861  *          rs -----
2862  *               rd -----
2863  */
2864 std::string NMD::BC1EQZC(uint64 instruction)
2865 {
2866     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
2867     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2868
2869     std::string ft = FPR(copy(ft_value));
2870     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2871
2872     return img::format("BC1EQZC %s, %s", ft, s);
2873 }
2874
2875
2876 /*
2877  *
2878  *
2879  *   3         2         1
2880  *  10987654321098765432109876543210
2881  *  001000               x1110000101
2882  *     rt -----
2883  *          rs -----
2884  *               rd -----
2885  */
2886 std::string NMD::BC1NEZC(uint64 instruction)
2887 {
2888     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
2889     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2890
2891     std::string ft = FPR(copy(ft_value));
2892     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2893
2894     return img::format("BC1NEZC %s, %s", ft, s);
2895 }
2896
2897
2898 /*
2899  *
2900  *
2901  *   3         2         1
2902  *  10987654321098765432109876543210
2903  *  001000               x1110000101
2904  *     rt -----
2905  *          rs -----
2906  *               rd -----
2907  */
2908 std::string NMD::BC2EQZC(uint64 instruction)
2909 {
2910     uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
2911     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2912
2913     std::string ct = CPR(copy(ct_value));
2914     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2915
2916     return img::format("BC2EQZC %s, %s", ct, s);
2917 }
2918
2919
2920 /*
2921  *
2922  *
2923  *   3         2         1
2924  *  10987654321098765432109876543210
2925  *  001000               x1110000101
2926  *     rt -----
2927  *          rs -----
2928  *               rd -----
2929  */
2930 std::string NMD::BC2NEZC(uint64 instruction)
2931 {
2932     uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
2933     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2934
2935     std::string ct = CPR(copy(ct_value));
2936     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2937
2938     return img::format("BC2NEZC %s, %s", ct, s);
2939 }
2940
2941
2942 /*
2943  *
2944  *
2945  *   3         2         1
2946  *  10987654321098765432109876543210
2947  *  001000               x1110000101
2948  *     rt -----
2949  *          rs -----
2950  *               rd -----
2951  */
2952 std::string NMD::BEQC_16_(uint64 instruction)
2953 {
2954     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2955     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2956     uint64 u_value = extract_u_3_2_1_0__s1(instruction);
2957
2958     std::string rs3 = GPR(encode_rs3_and_check_rs3_lt_rt3(rs3_value));
2959     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2960     std::string u = ADDRESS(encode_u_from_address(u_value), 2);
2961
2962     return img::format("BEQC %s, %s, %s", rs3, rt3, u);
2963 }
2964
2965
2966 /*
2967  *
2968  *
2969  *   3         2         1
2970  *  10987654321098765432109876543210
2971  *  001000               x1110000101
2972  *     rt -----
2973  *          rs -----
2974  *               rd -----
2975  */
2976 std::string NMD::BEQC_32_(uint64 instruction)
2977 {
2978     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2979     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2980     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2981
2982     std::string rs = GPR(copy(rs_value));
2983     std::string rt = GPR(copy(rt_value));
2984     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2985
2986     return img::format("BEQC %s, %s, %s", rs, rt, s);
2987 }
2988
2989
2990 /*
2991  *
2992  *
2993  *   3         2         1
2994  *  10987654321098765432109876543210
2995  *  001000               x1110000101
2996  *     rt -----
2997  *          rs -----
2998  *               rd -----
2999  */
3000 std::string NMD::BEQIC(uint64 instruction)
3001 {
3002     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3003     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3004     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3005
3006     std::string rt = GPR(copy(rt_value));
3007     std::string u = IMMEDIATE(copy(u_value));
3008     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3009
3010     return img::format("BEQIC %s, %s, %s", rt, u, s);
3011 }
3012
3013
3014 /*
3015  *
3016  *
3017  *   3         2         1
3018  *  10987654321098765432109876543210
3019  *  001000               x1110000101
3020  *     rt -----
3021  *          rs -----
3022  *               rd -----
3023  */
3024 std::string NMD::BEQZC_16_(uint64 instruction)
3025 {
3026     uint64 rt3_value = extract_rt3_9_8_7(instruction);
3027     int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
3028
3029     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3030     std::string s = ADDRESS(encode_s_from_address(s_value), 2);
3031
3032     return img::format("BEQZC %s, %s", rt3, s);
3033 }
3034
3035
3036 /*
3037  *
3038  *
3039  *   3         2         1
3040  *  10987654321098765432109876543210
3041  *  001000               x1110000101
3042  *     rt -----
3043  *          rs -----
3044  *               rd -----
3045  */
3046 std::string NMD::BGEC(uint64 instruction)
3047 {
3048     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3049     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3050     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3051
3052     std::string rs = GPR(copy(rs_value));
3053     std::string rt = GPR(copy(rt_value));
3054     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3055
3056     return img::format("BGEC %s, %s, %s", rs, rt, s);
3057 }
3058
3059
3060 /*
3061  *
3062  *
3063  *   3         2         1
3064  *  10987654321098765432109876543210
3065  *  001000               x1110000101
3066  *     rt -----
3067  *          rs -----
3068  *               rd -----
3069  */
3070 std::string NMD::BGEIC(uint64 instruction)
3071 {
3072     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3073     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3074     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3075
3076     std::string rt = GPR(copy(rt_value));
3077     std::string u = IMMEDIATE(copy(u_value));
3078     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3079
3080     return img::format("BGEIC %s, %s, %s", rt, u, s);
3081 }
3082
3083
3084 /*
3085  *
3086  *
3087  *   3         2         1
3088  *  10987654321098765432109876543210
3089  *  001000               x1110000101
3090  *     rt -----
3091  *          rs -----
3092  *               rd -----
3093  */
3094 std::string NMD::BGEIUC(uint64 instruction)
3095 {
3096     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3097     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3098     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3099
3100     std::string rt = GPR(copy(rt_value));
3101     std::string u = IMMEDIATE(copy(u_value));
3102     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3103
3104     return img::format("BGEIUC %s, %s, %s", rt, u, s);
3105 }
3106
3107
3108 /*
3109  *
3110  *
3111  *   3         2         1
3112  *  10987654321098765432109876543210
3113  *  001000               x1110000101
3114  *     rt -----
3115  *          rs -----
3116  *               rd -----
3117  */
3118 std::string NMD::BGEUC(uint64 instruction)
3119 {
3120     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3121     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3122     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3123
3124     std::string rs = GPR(copy(rs_value));
3125     std::string rt = GPR(copy(rt_value));
3126     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3127
3128     return img::format("BGEUC %s, %s, %s", rs, rt, s);
3129 }
3130
3131
3132 /*
3133  *
3134  *
3135  *   3         2         1
3136  *  10987654321098765432109876543210
3137  *  001000               x1110000101
3138  *     rt -----
3139  *          rs -----
3140  *               rd -----
3141  */
3142 std::string NMD::BLTC(uint64 instruction)
3143 {
3144     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3145     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3146     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3147
3148     std::string rs = GPR(copy(rs_value));
3149     std::string rt = GPR(copy(rt_value));
3150     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3151
3152     return img::format("BLTC %s, %s, %s", rs, rt, s);
3153 }
3154
3155
3156 /*
3157  *
3158  *
3159  *   3         2         1
3160  *  10987654321098765432109876543210
3161  *  001000               x1110000101
3162  *     rt -----
3163  *          rs -----
3164  *               rd -----
3165  */
3166 std::string NMD::BLTIC(uint64 instruction)
3167 {
3168     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3169     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3170     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3171
3172     std::string rt = GPR(copy(rt_value));
3173     std::string u = IMMEDIATE(copy(u_value));
3174     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3175
3176     return img::format("BLTIC %s, %s, %s", rt, u, s);
3177 }
3178
3179
3180 /*
3181  *
3182  *
3183  *   3         2         1
3184  *  10987654321098765432109876543210
3185  *  001000               x1110000101
3186  *     rt -----
3187  *          rs -----
3188  *               rd -----
3189  */
3190 std::string NMD::BLTIUC(uint64 instruction)
3191 {
3192     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3193     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3194     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3195
3196     std::string rt = GPR(copy(rt_value));
3197     std::string u = IMMEDIATE(copy(u_value));
3198     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3199
3200     return img::format("BLTIUC %s, %s, %s", rt, u, s);
3201 }
3202
3203
3204 /*
3205  *
3206  *
3207  *   3         2         1
3208  *  10987654321098765432109876543210
3209  *  001000               x1110000101
3210  *     rt -----
3211  *          rs -----
3212  *               rd -----
3213  */
3214 std::string NMD::BLTUC(uint64 instruction)
3215 {
3216     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3217     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3218     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3219
3220     std::string rs = GPR(copy(rs_value));
3221     std::string rt = GPR(copy(rt_value));
3222     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3223
3224     return img::format("BLTUC %s, %s, %s", rs, rt, s);
3225 }
3226
3227
3228 /*
3229  *
3230  *
3231  *   3         2         1
3232  *  10987654321098765432109876543210
3233  *  001000               x1110000101
3234  *     rt -----
3235  *          rs -----
3236  *               rd -----
3237  */
3238 std::string NMD::BNEC_16_(uint64 instruction)
3239 {
3240     uint64 rt3_value = extract_rt3_9_8_7(instruction);
3241     uint64 rs3_value = extract_rs3_6_5_4(instruction);
3242     uint64 u_value = extract_u_3_2_1_0__s1(instruction);
3243
3244     std::string rs3 = GPR(encode_rs3_and_check_rs3_ge_rt3(rs3_value));
3245     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3246     std::string u = ADDRESS(encode_u_from_address(u_value), 2);
3247
3248     return img::format("BNEC %s, %s, %s", rs3, rt3, u);
3249 }
3250
3251
3252 /*
3253  *
3254  *
3255  *   3         2         1
3256  *  10987654321098765432109876543210
3257  *  001000               x1110000101
3258  *     rt -----
3259  *          rs -----
3260  *               rd -----
3261  */
3262 std::string NMD::BNEC_32_(uint64 instruction)
3263 {
3264     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3265     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3266     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3267
3268     std::string rs = GPR(copy(rs_value));
3269     std::string rt = GPR(copy(rt_value));
3270     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3271
3272     return img::format("BNEC %s, %s, %s", rs, rt, s);
3273 }
3274
3275
3276 /*
3277  *
3278  *
3279  *   3         2         1
3280  *  10987654321098765432109876543210
3281  *  001000               x1110000101
3282  *     rt -----
3283  *          rs -----
3284  *               rd -----
3285  */
3286 std::string NMD::BNEIC(uint64 instruction)
3287 {
3288     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3289     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3290     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3291
3292     std::string rt = GPR(copy(rt_value));
3293     std::string u = IMMEDIATE(copy(u_value));
3294     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3295
3296     return img::format("BNEIC %s, %s, %s", rt, u, s);
3297 }
3298
3299
3300 /*
3301  *
3302  *
3303  *   3         2         1
3304  *  10987654321098765432109876543210
3305  *  001000               x1110000101
3306  *     rt -----
3307  *          rs -----
3308  *               rd -----
3309  */
3310 std::string NMD::BNEZC_16_(uint64 instruction)
3311 {
3312     uint64 rt3_value = extract_rt3_9_8_7(instruction);
3313     int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
3314
3315     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3316     std::string s = ADDRESS(encode_s_from_address(s_value), 2);
3317
3318     return img::format("BNEZC %s, %s", rt3, s);
3319 }
3320
3321
3322 /*
3323  *
3324  *
3325  *   3         2         1
3326  *  10987654321098765432109876543210
3327  *  001000               x1110000101
3328  *     rt -----
3329  *          rs -----
3330  *               rd -----
3331  */
3332 std::string NMD::BPOSGE32C(uint64 instruction)
3333 {
3334     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3335
3336     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3337
3338     return img::format("BPOSGE32C %s", s);
3339 }
3340
3341
3342 /*
3343  *
3344  *
3345  *   3         2         1
3346  *  10987654321098765432109876543210
3347  *  001000               x1110000101
3348  *     rt -----
3349  *          rs -----
3350  *               rd -----
3351  */
3352 std::string NMD::BREAK_16_(uint64 instruction)
3353 {
3354     uint64 code_value = extract_code_2_1_0(instruction);
3355
3356     std::string code = IMMEDIATE(copy(code_value));
3357
3358     return img::format("BREAK %s", code);
3359 }
3360
3361
3362 /*
3363  * BREAK code - Break. Cause a Breakpoint exception
3364  *
3365  *   3         2         1
3366  *  10987654321098765432109876543210
3367  *  001000               x1110000101
3368  *     rt -----
3369  *          rs -----
3370  *               rd -----
3371  */
3372 std::string NMD::BREAK_32_(uint64 instruction)
3373 {
3374     uint64 code_value = extract_code_18_to_0(instruction);
3375
3376     std::string code = IMMEDIATE(copy(code_value));
3377
3378     return img::format("BREAK %s", code);
3379 }
3380
3381
3382 /*
3383  *
3384  *
3385  *   3         2         1
3386  *  10987654321098765432109876543210
3387  *  001000               x1110000101
3388  *     rt -----
3389  *          rs -----
3390  *               rd -----
3391  */
3392 std::string NMD::BRSC(uint64 instruction)
3393 {
3394     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3395
3396     std::string rs = GPR(copy(rs_value));
3397
3398     return img::format("BRSC %s", rs);
3399 }
3400
3401
3402 /*
3403  *
3404  *
3405  *   3         2         1
3406  *  10987654321098765432109876543210
3407  *  001000               x1110000101
3408  *     rt -----
3409  *          rs -----
3410  *               rd -----
3411  */
3412 std::string NMD::CACHE(uint64 instruction)
3413 {
3414     uint64 op_value = extract_op_25_24_23_22_21(instruction);
3415     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3416     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
3417
3418     std::string op = IMMEDIATE(copy(op_value));
3419     std::string s = IMMEDIATE(copy(s_value));
3420     std::string rs = GPR(copy(rs_value));
3421
3422     return img::format("CACHE %s, %s(%s)", op, s, rs);
3423 }
3424
3425
3426 /*
3427  *
3428  *
3429  *   3         2         1
3430  *  10987654321098765432109876543210
3431  *  001000               x1110000101
3432  *     rt -----
3433  *          rs -----
3434  *               rd -----
3435  */
3436 std::string NMD::CACHEE(uint64 instruction)
3437 {
3438     uint64 op_value = extract_op_25_24_23_22_21(instruction);
3439     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3440     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
3441
3442     std::string op = IMMEDIATE(copy(op_value));
3443     std::string s = IMMEDIATE(copy(s_value));
3444     std::string rs = GPR(copy(rs_value));
3445
3446     return img::format("CACHEE %s, %s(%s)", op, s, rs);
3447 }
3448
3449
3450 /*
3451  *
3452  *
3453  *   3         2         1
3454  *  10987654321098765432109876543210
3455  *  001000               x1110000101
3456  *     rt -----
3457  *          rs -----
3458  *               rd -----
3459  */
3460 std::string NMD::CEIL_L_D(uint64 instruction)
3461 {
3462     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3463     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3464
3465     std::string ft = FPR(copy(ft_value));
3466     std::string fs = FPR(copy(fs_value));
3467
3468     return img::format("CEIL.L.D %s, %s", ft, fs);
3469 }
3470
3471
3472 /*
3473  *
3474  *
3475  *   3         2         1
3476  *  10987654321098765432109876543210
3477  *  001000               x1110000101
3478  *     rt -----
3479  *          rs -----
3480  *               rd -----
3481  */
3482 std::string NMD::CEIL_L_S(uint64 instruction)
3483 {
3484     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3485     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3486
3487     std::string ft = FPR(copy(ft_value));
3488     std::string fs = FPR(copy(fs_value));
3489
3490     return img::format("CEIL.L.S %s, %s", ft, fs);
3491 }
3492
3493
3494 /*
3495  *
3496  *
3497  *   3         2         1
3498  *  10987654321098765432109876543210
3499  *  001000               x1110000101
3500  *     rt -----
3501  *          rs -----
3502  *               rd -----
3503  */
3504 std::string NMD::CEIL_W_D(uint64 instruction)
3505 {
3506     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3507     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3508
3509     std::string ft = FPR(copy(ft_value));
3510     std::string fs = FPR(copy(fs_value));
3511
3512     return img::format("CEIL.W.D %s, %s", ft, fs);
3513 }
3514
3515
3516 /*
3517  *
3518  *
3519  *   3         2         1
3520  *  10987654321098765432109876543210
3521  *  001000               x1110000101
3522  *     rt -----
3523  *          rs -----
3524  *               rd -----
3525  */
3526 std::string NMD::CEIL_W_S(uint64 instruction)
3527 {
3528     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3529     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3530
3531     std::string ft = FPR(copy(ft_value));
3532     std::string fs = FPR(copy(fs_value));
3533
3534     return img::format("CEIL.W.S %s, %s", ft, fs);
3535 }
3536
3537
3538 /*
3539  *
3540  *
3541  *   3         2         1
3542  *  10987654321098765432109876543210
3543  *  001000               x1110000101
3544  *     rt -----
3545  *          rs -----
3546  *               rd -----
3547  */
3548 std::string NMD::CFC1(uint64 instruction)
3549 {
3550     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3551     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
3552
3553     std::string rt = GPR(copy(rt_value));
3554     std::string cs = CPR(copy(cs_value));
3555
3556     return img::format("CFC1 %s, %s", rt, cs);
3557 }
3558
3559
3560 /*
3561  *
3562  *
3563  *   3         2         1
3564  *  10987654321098765432109876543210
3565  *  001000               x1110000101
3566  *     rt -----
3567  *          rs -----
3568  *               rd -----
3569  */
3570 std::string NMD::CFC2(uint64 instruction)
3571 {
3572     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3573     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
3574
3575     std::string rt = GPR(copy(rt_value));
3576     std::string cs = CPR(copy(cs_value));
3577
3578     return img::format("CFC2 %s, %s", rt, cs);
3579 }
3580
3581
3582 /*
3583  *
3584  *
3585  *   3         2         1
3586  *  10987654321098765432109876543210
3587  *  001000               x1110000101
3588  *     rt -----
3589  *          rs -----
3590  *               rd -----
3591  */
3592 std::string NMD::CLASS_D(uint64 instruction)
3593 {
3594     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3595     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3596
3597     std::string ft = FPR(copy(ft_value));
3598     std::string fs = FPR(copy(fs_value));
3599
3600     return img::format("CLASS.D %s, %s", ft, fs);
3601 }
3602
3603
3604 /*
3605  *
3606  *
3607  *   3         2         1
3608  *  10987654321098765432109876543210
3609  *  001000               x1110000101
3610  *     rt -----
3611  *          rs -----
3612  *               rd -----
3613  */
3614 std::string NMD::CLASS_S(uint64 instruction)
3615 {
3616     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3617     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3618
3619     std::string ft = FPR(copy(ft_value));
3620     std::string fs = FPR(copy(fs_value));
3621
3622     return img::format("CLASS.S %s, %s", ft, fs);
3623 }
3624
3625
3626 /*
3627  *
3628  *
3629  *   3         2         1
3630  *  10987654321098765432109876543210
3631  *  001000               x1110000101
3632  *     rt -----
3633  *          rs -----
3634  *               rd -----
3635  */
3636 std::string NMD::CLO(uint64 instruction)
3637 {
3638     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3639     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3640
3641     std::string rt = GPR(copy(rt_value));
3642     std::string rs = GPR(copy(rs_value));
3643
3644     return img::format("CLO %s, %s", rt, rs);
3645 }
3646
3647
3648 /*
3649  *
3650  *
3651  *   3         2         1
3652  *  10987654321098765432109876543210
3653  *  001000               x1110000101
3654  *     rt -----
3655  *          rs -----
3656  *               rd -----
3657  */
3658 std::string NMD::CLZ(uint64 instruction)
3659 {
3660     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3661     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3662
3663     std::string rt = GPR(copy(rt_value));
3664     std::string rs = GPR(copy(rs_value));
3665
3666     return img::format("CLZ %s, %s", rt, rs);
3667 }
3668
3669
3670 /*
3671  *
3672  *
3673  *   3         2         1
3674  *  10987654321098765432109876543210
3675  *  001000               x1110000101
3676  *     rt -----
3677  *          rs -----
3678  *               rd -----
3679  */
3680 std::string NMD::CMP_AF_D(uint64 instruction)
3681 {
3682     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3683     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3684     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3685
3686     std::string fd = FPR(copy(fd_value));
3687     std::string fs = FPR(copy(fs_value));
3688     std::string ft = FPR(copy(ft_value));
3689
3690     return img::format("CMP.AF.D %s, %s, %s", fd, fs, ft);
3691 }
3692
3693
3694 /*
3695  *
3696  *
3697  *   3         2         1
3698  *  10987654321098765432109876543210
3699  *  001000               x1110000101
3700  *     rt -----
3701  *          rs -----
3702  *               rd -----
3703  */
3704 std::string NMD::CMP_AF_S(uint64 instruction)
3705 {
3706     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3707     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3708     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3709
3710     std::string fd = FPR(copy(fd_value));
3711     std::string fs = FPR(copy(fs_value));
3712     std::string ft = FPR(copy(ft_value));
3713
3714     return img::format("CMP.AF.S %s, %s, %s", fd, fs, ft);
3715 }
3716
3717
3718 /*
3719  *
3720  *
3721  *   3         2         1
3722  *  10987654321098765432109876543210
3723  *  001000               x1110000101
3724  *     rt -----
3725  *          rs -----
3726  *               rd -----
3727  */
3728 std::string NMD::CMP_EQ_D(uint64 instruction)
3729 {
3730     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3731     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3732     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3733
3734     std::string fd = FPR(copy(fd_value));
3735     std::string fs = FPR(copy(fs_value));
3736     std::string ft = FPR(copy(ft_value));
3737
3738     return img::format("CMP.EQ.D %s, %s, %s", fd, fs, ft);
3739 }
3740
3741
3742 /*
3743  *
3744  *
3745  *   3         2         1
3746  *  10987654321098765432109876543210
3747  *  001000               x1110000101
3748  *     rt -----
3749  *          rs -----
3750  *               rd -----
3751  */
3752 std::string NMD::CMP_EQ_PH(uint64 instruction)
3753 {
3754     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3755     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3756
3757     std::string rs = GPR(copy(rs_value));
3758     std::string rt = GPR(copy(rt_value));
3759
3760     return img::format("CMP.EQ.PH %s, %s", rs, rt);
3761 }
3762
3763
3764 /*
3765  *
3766  *
3767  *   3         2         1
3768  *  10987654321098765432109876543210
3769  *  001000               x1110000101
3770  *     rt -----
3771  *          rs -----
3772  *               rd -----
3773  */
3774 std::string NMD::CMP_EQ_S(uint64 instruction)
3775 {
3776     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3777     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3778     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3779
3780     std::string fd = FPR(copy(fd_value));
3781     std::string fs = FPR(copy(fs_value));
3782     std::string ft = FPR(copy(ft_value));
3783
3784     return img::format("CMP.EQ.S %s, %s, %s", fd, fs, ft);
3785 }
3786
3787
3788 /*
3789  *
3790  *
3791  *   3         2         1
3792  *  10987654321098765432109876543210
3793  *  001000               x1110000101
3794  *     rt -----
3795  *          rs -----
3796  *               rd -----
3797  */
3798 std::string NMD::CMP_LE_D(uint64 instruction)
3799 {
3800     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3801     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3802     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3803
3804     std::string fd = FPR(copy(fd_value));
3805     std::string fs = FPR(copy(fs_value));
3806     std::string ft = FPR(copy(ft_value));
3807
3808     return img::format("CMP.LE.D %s, %s, %s", fd, fs, ft);
3809 }
3810
3811
3812 /*
3813  *
3814  *
3815  *   3         2         1
3816  *  10987654321098765432109876543210
3817  *  001000               x1110000101
3818  *     rt -----
3819  *          rs -----
3820  *               rd -----
3821  */
3822 std::string NMD::CMP_LE_PH(uint64 instruction)
3823 {
3824     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3825     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3826
3827     std::string rs = GPR(copy(rs_value));
3828     std::string rt = GPR(copy(rt_value));
3829
3830     return img::format("CMP.LE.PH %s, %s", rs, rt);
3831 }
3832
3833
3834 /*
3835  *
3836  *
3837  *   3         2         1
3838  *  10987654321098765432109876543210
3839  *  001000               x1110000101
3840  *     rt -----
3841  *          rs -----
3842  *               rd -----
3843  */
3844 std::string NMD::CMP_LE_S(uint64 instruction)
3845 {
3846     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3847     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3848     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3849
3850     std::string fd = FPR(copy(fd_value));
3851     std::string fs = FPR(copy(fs_value));
3852     std::string ft = FPR(copy(ft_value));
3853
3854     return img::format("CMP.LE.S %s, %s, %s", fd, fs, ft);
3855 }
3856
3857
3858 /*
3859  *
3860  *
3861  *   3         2         1
3862  *  10987654321098765432109876543210
3863  *  001000               x1110000101
3864  *     rt -----
3865  *          rs -----
3866  *               rd -----
3867  */
3868 std::string NMD::CMP_LT_D(uint64 instruction)
3869 {
3870     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3871     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3872     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3873
3874     std::string fd = FPR(copy(fd_value));
3875     std::string fs = FPR(copy(fs_value));
3876     std::string ft = FPR(copy(ft_value));
3877
3878     return img::format("CMP.LT.D %s, %s, %s", fd, fs, ft);
3879 }
3880
3881
3882 /*
3883  *
3884  *
3885  *   3         2         1
3886  *  10987654321098765432109876543210
3887  *  001000               x1110000101
3888  *     rt -----
3889  *          rs -----
3890  *               rd -----
3891  */
3892 std::string NMD::CMP_LT_PH(uint64 instruction)
3893 {
3894     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3895     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3896
3897     std::string rs = GPR(copy(rs_value));
3898     std::string rt = GPR(copy(rt_value));
3899
3900     return img::format("CMP.LT.PH %s, %s", rs, rt);
3901 }
3902
3903
3904 /*
3905  *
3906  *
3907  *   3         2         1
3908  *  10987654321098765432109876543210
3909  *  001000               x1110000101
3910  *     rt -----
3911  *          rs -----
3912  *               rd -----
3913  */
3914 std::string NMD::CMP_LT_S(uint64 instruction)
3915 {
3916     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3917     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3918     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3919
3920     std::string fd = FPR(copy(fd_value));
3921     std::string fs = FPR(copy(fs_value));
3922     std::string ft = FPR(copy(ft_value));
3923
3924     return img::format("CMP.LT.S %s, %s, %s", fd, fs, ft);
3925 }
3926
3927
3928 /*
3929  *
3930  *
3931  *   3         2         1
3932  *  10987654321098765432109876543210
3933  *  001000               x1110000101
3934  *     rt -----
3935  *          rs -----
3936  *               rd -----
3937  */
3938 std::string NMD::CMP_NE_D(uint64 instruction)
3939 {
3940     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3941     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3942     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3943
3944     std::string fd = FPR(copy(fd_value));
3945     std::string fs = FPR(copy(fs_value));
3946     std::string ft = FPR(copy(ft_value));
3947
3948     return img::format("CMP.NE.D %s, %s, %s", fd, fs, ft);
3949 }
3950
3951
3952 /*
3953  *
3954  *
3955  *   3         2         1
3956  *  10987654321098765432109876543210
3957  *  001000               x1110000101
3958  *     rt -----
3959  *          rs -----
3960  *               rd -----
3961  */
3962 std::string NMD::CMP_NE_S(uint64 instruction)
3963 {
3964     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3965     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3966     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3967
3968     std::string fd = FPR(copy(fd_value));
3969     std::string fs = FPR(copy(fs_value));
3970     std::string ft = FPR(copy(ft_value));
3971
3972     return img::format("CMP.NE.S %s, %s, %s", fd, fs, ft);
3973 }
3974
3975
3976 /*
3977  *
3978  *
3979  *   3         2         1
3980  *  10987654321098765432109876543210
3981  *  001000               x1110000101
3982  *     rt -----
3983  *          rs -----
3984  *               rd -----
3985  */
3986 std::string NMD::CMP_OR_D(uint64 instruction)
3987 {
3988     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3989     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3990     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3991
3992     std::string fd = FPR(copy(fd_value));
3993     std::string fs = FPR(copy(fs_value));
3994     std::string ft = FPR(copy(ft_value));
3995
3996     return img::format("CMP.OR.D %s, %s, %s", fd, fs, ft);
3997 }
3998
3999
4000 /*
4001  *
4002  *
4003  *   3         2         1
4004  *  10987654321098765432109876543210
4005  *  001000               x1110000101
4006  *     rt -----
4007  *          rs -----
4008  *               rd -----
4009  */
4010 std::string NMD::CMP_OR_S(uint64 instruction)
4011 {
4012     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4013     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4014     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4015
4016     std::string fd = FPR(copy(fd_value));
4017     std::string fs = FPR(copy(fs_value));
4018     std::string ft = FPR(copy(ft_value));
4019
4020     return img::format("CMP.OR.S %s, %s, %s", fd, fs, ft);
4021 }
4022
4023
4024 /*
4025  *
4026  *
4027  *   3         2         1
4028  *  10987654321098765432109876543210
4029  *  001000               x1110000101
4030  *     rt -----
4031  *          rs -----
4032  *               rd -----
4033  */
4034 std::string NMD::CMP_SAF_D(uint64 instruction)
4035 {
4036     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4037     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4038     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4039
4040     std::string fd = FPR(copy(fd_value));
4041     std::string fs = FPR(copy(fs_value));
4042     std::string ft = FPR(copy(ft_value));
4043
4044     return img::format("CMP.SAF.D %s, %s, %s", fd, fs, ft);
4045 }
4046
4047
4048 /*
4049  *
4050  *
4051  *   3         2         1
4052  *  10987654321098765432109876543210
4053  *  001000               x1110000101
4054  *     rt -----
4055  *          rs -----
4056  *               rd -----
4057  */
4058 std::string NMD::CMP_SAF_S(uint64 instruction)
4059 {
4060     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4061     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4062     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4063
4064     std::string fd = FPR(copy(fd_value));
4065     std::string fs = FPR(copy(fs_value));
4066     std::string ft = FPR(copy(ft_value));
4067
4068     return img::format("CMP.SAF.S %s, %s, %s", fd, fs, ft);
4069 }
4070
4071
4072 /*
4073  *
4074  *
4075  *   3         2         1
4076  *  10987654321098765432109876543210
4077  *  001000               x1110000101
4078  *     rt -----
4079  *          rs -----
4080  *               rd -----
4081  */
4082 std::string NMD::CMP_SEQ_D(uint64 instruction)
4083 {
4084     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4085     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4086     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4087
4088     std::string fd = FPR(copy(fd_value));
4089     std::string fs = FPR(copy(fs_value));
4090     std::string ft = FPR(copy(ft_value));
4091
4092     return img::format("CMP.SEQ.D %s, %s, %s", fd, fs, ft);
4093 }
4094
4095
4096 /*
4097  *
4098  *
4099  *   3         2         1
4100  *  10987654321098765432109876543210
4101  *  001000               x1110000101
4102  *     rt -----
4103  *          rs -----
4104  *               rd -----
4105  */
4106 std::string NMD::CMP_SEQ_S(uint64 instruction)
4107 {
4108     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4109     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4110     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4111
4112     std::string fd = FPR(copy(fd_value));
4113     std::string fs = FPR(copy(fs_value));
4114     std::string ft = FPR(copy(ft_value));
4115
4116     return img::format("CMP.SEQ.S %s, %s, %s", fd, fs, ft);
4117 }
4118
4119
4120 /*
4121  *
4122  *
4123  *   3         2         1
4124  *  10987654321098765432109876543210
4125  *  001000               x1110000101
4126  *     rt -----
4127  *          rs -----
4128  *               rd -----
4129  */
4130 std::string NMD::CMP_SLE_D(uint64 instruction)
4131 {
4132     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4133     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4134     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4135
4136     std::string fd = FPR(copy(fd_value));
4137     std::string fs = FPR(copy(fs_value));
4138     std::string ft = FPR(copy(ft_value));
4139
4140     return img::format("CMP.SLE.D %s, %s, %s", fd, fs, ft);
4141 }
4142
4143
4144 /*
4145  *
4146  *
4147  *   3         2         1
4148  *  10987654321098765432109876543210
4149  *  001000               x1110000101
4150  *     rt -----
4151  *          rs -----
4152  *               rd -----
4153  */
4154 std::string NMD::CMP_SLE_S(uint64 instruction)
4155 {
4156     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4157     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4158     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4159
4160     std::string fd = FPR(copy(fd_value));
4161     std::string fs = FPR(copy(fs_value));
4162     std::string ft = FPR(copy(ft_value));
4163
4164     return img::format("CMP.SLE.S %s, %s, %s", fd, fs, ft);
4165 }
4166
4167
4168 /*
4169  *
4170  *
4171  *   3         2         1
4172  *  10987654321098765432109876543210
4173  *  001000               x1110000101
4174  *     rt -----
4175  *          rs -----
4176  *               rd -----
4177  */
4178 std::string NMD::CMP_SLT_D(uint64 instruction)
4179 {
4180     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4181     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4182     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4183
4184     std::string fd = FPR(copy(fd_value));
4185     std::string fs = FPR(copy(fs_value));
4186     std::string ft = FPR(copy(ft_value));
4187
4188     return img::format("CMP.SLT.D %s, %s, %s", fd, fs, ft);
4189 }
4190
4191
4192 /*
4193  *
4194  *
4195  *   3         2         1
4196  *  10987654321098765432109876543210
4197  *  001000               x1110000101
4198  *     rt -----
4199  *          rs -----
4200  *               rd -----
4201  */
4202 std::string NMD::CMP_SLT_S(uint64 instruction)
4203 {
4204     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4205     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4206     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4207
4208     std::string fd = FPR(copy(fd_value));
4209     std::string fs = FPR(copy(fs_value));
4210     std::string ft = FPR(copy(ft_value));
4211
4212     return img::format("CMP.SLT.S %s, %s, %s", fd, fs, ft);
4213 }
4214
4215
4216 /*
4217  *
4218  *
4219  *   3         2         1
4220  *  10987654321098765432109876543210
4221  *  001000               x1110000101
4222  *     rt -----
4223  *          rs -----
4224  *               rd -----
4225  */
4226 std::string NMD::CMP_SNE_D(uint64 instruction)
4227 {
4228     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4229     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4230     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4231
4232     std::string fd = FPR(copy(fd_value));
4233     std::string fs = FPR(copy(fs_value));
4234     std::string ft = FPR(copy(ft_value));
4235
4236     return img::format("CMP.SNE.D %s, %s, %s", fd, fs, ft);
4237 }
4238
4239
4240 /*
4241  *
4242  *
4243  *   3         2         1
4244  *  10987654321098765432109876543210
4245  *  001000               x1110000101
4246  *     rt -----
4247  *          rs -----
4248  *               rd -----
4249  */
4250 std::string NMD::CMP_SNE_S(uint64 instruction)
4251 {
4252     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4253     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4254     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4255
4256     std::string fd = FPR(copy(fd_value));
4257     std::string fs = FPR(copy(fs_value));
4258     std::string ft = FPR(copy(ft_value));
4259
4260     return img::format("CMP.SNE.S %s, %s, %s", fd, fs, ft);
4261 }
4262
4263
4264 /*
4265  *
4266  *
4267  *   3         2         1
4268  *  10987654321098765432109876543210
4269  *  001000               x1110000101
4270  *     rt -----
4271  *          rs -----
4272  *               rd -----
4273  */
4274 std::string NMD::CMP_SOR_D(uint64 instruction)
4275 {
4276     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4277     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4278     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4279
4280     std::string fd = FPR(copy(fd_value));
4281     std::string fs = FPR(copy(fs_value));
4282     std::string ft = FPR(copy(ft_value));
4283
4284     return img::format("CMP.SOR.D %s, %s, %s", fd, fs, ft);
4285 }
4286
4287
4288 /*
4289  *
4290  *
4291  *   3         2         1
4292  *  10987654321098765432109876543210
4293  *  001000               x1110000101
4294  *     rt -----
4295  *          rs -----
4296  *               rd -----
4297  */
4298 std::string NMD::CMP_SOR_S(uint64 instruction)
4299 {
4300     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4301     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4302     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4303
4304     std::string fd = FPR(copy(fd_value));
4305     std::string fs = FPR(copy(fs_value));
4306     std::string ft = FPR(copy(ft_value));
4307
4308     return img::format("CMP.SOR.S %s, %s, %s", fd, fs, ft);
4309 }
4310
4311
4312 /*
4313  *
4314  *
4315  *   3         2         1
4316  *  10987654321098765432109876543210
4317  *  001000               x1110000101
4318  *     rt -----
4319  *          rs -----
4320  *               rd -----
4321  */
4322 std::string NMD::CMP_SUEQ_D(uint64 instruction)
4323 {
4324     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4325     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4326     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4327
4328     std::string fd = FPR(copy(fd_value));
4329     std::string fs = FPR(copy(fs_value));
4330     std::string ft = FPR(copy(ft_value));
4331
4332     return img::format("CMP.SUEQ.D %s, %s, %s", fd, fs, ft);
4333 }
4334
4335
4336 /*
4337  *
4338  *
4339  *   3         2         1
4340  *  10987654321098765432109876543210
4341  *  001000               x1110000101
4342  *     rt -----
4343  *          rs -----
4344  *               rd -----
4345  */
4346 std::string NMD::CMP_SUEQ_S(uint64 instruction)
4347 {
4348     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4349     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4350     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4351
4352     std::string fd = FPR(copy(fd_value));
4353     std::string fs = FPR(copy(fs_value));
4354     std::string ft = FPR(copy(ft_value));
4355
4356     return img::format("CMP.SUEQ.S %s, %s, %s", fd, fs, ft);
4357 }
4358
4359
4360 /*
4361  *
4362  *
4363  *   3         2         1
4364  *  10987654321098765432109876543210
4365  *  001000               x1110000101
4366  *     rt -----
4367  *          rs -----
4368  *               rd -----
4369  */
4370 std::string NMD::CMP_SULE_D(uint64 instruction)
4371 {
4372     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4373     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4374     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4375
4376     std::string fd = FPR(copy(fd_value));
4377     std::string fs = FPR(copy(fs_value));
4378     std::string ft = FPR(copy(ft_value));
4379
4380     return img::format("CMP.SULE.D %s, %s, %s", fd, fs, ft);
4381 }
4382
4383
4384 /*
4385  *
4386  *
4387  *   3         2         1
4388  *  10987654321098765432109876543210
4389  *  001000               x1110000101
4390  *     rt -----
4391  *          rs -----
4392  *               rd -----
4393  */
4394 std::string NMD::CMP_SULE_S(uint64 instruction)
4395 {
4396     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4397     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4398     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4399
4400     std::string fd = FPR(copy(fd_value));
4401     std::string fs = FPR(copy(fs_value));
4402     std::string ft = FPR(copy(ft_value));
4403
4404     return img::format("CMP.SULE.S %s, %s, %s", fd, fs, ft);
4405 }
4406
4407
4408 /*
4409  *
4410  *
4411  *   3         2         1
4412  *  10987654321098765432109876543210
4413  *  001000               x1110000101
4414  *     rt -----
4415  *          rs -----
4416  *               rd -----
4417  */
4418 std::string NMD::CMP_SULT_D(uint64 instruction)
4419 {
4420     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4421     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4422     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4423
4424     std::string fd = FPR(copy(fd_value));
4425     std::string fs = FPR(copy(fs_value));
4426     std::string ft = FPR(copy(ft_value));
4427
4428     return img::format("CMP.SULT.D %s, %s, %s", fd, fs, ft);
4429 }
4430
4431
4432 /*
4433  *
4434  *
4435  *   3         2         1
4436  *  10987654321098765432109876543210
4437  *  001000               x1110000101
4438  *     rt -----
4439  *          rs -----
4440  *               rd -----
4441  */
4442 std::string NMD::CMP_SULT_S(uint64 instruction)
4443 {
4444     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4445     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4446     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4447
4448     std::string fd = FPR(copy(fd_value));
4449     std::string fs = FPR(copy(fs_value));
4450     std::string ft = FPR(copy(ft_value));
4451
4452     return img::format("CMP.SULT.S %s, %s, %s", fd, fs, ft);
4453 }
4454
4455
4456 /*
4457  *
4458  *
4459  *   3         2         1
4460  *  10987654321098765432109876543210
4461  *  001000               x1110000101
4462  *     rt -----
4463  *          rs -----
4464  *               rd -----
4465  */
4466 std::string NMD::CMP_SUN_D(uint64 instruction)
4467 {
4468     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4469     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4470     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4471
4472     std::string fd = FPR(copy(fd_value));
4473     std::string fs = FPR(copy(fs_value));
4474     std::string ft = FPR(copy(ft_value));
4475
4476     return img::format("CMP.SUN.D %s, %s, %s", fd, fs, ft);
4477 }
4478
4479
4480 /*
4481  *
4482  *
4483  *   3         2         1
4484  *  10987654321098765432109876543210
4485  *  001000               x1110000101
4486  *     rt -----
4487  *          rs -----
4488  *               rd -----
4489  */
4490 std::string NMD::CMP_SUNE_D(uint64 instruction)
4491 {
4492     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4493     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4494     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4495
4496     std::string fd = FPR(copy(fd_value));
4497     std::string fs = FPR(copy(fs_value));
4498     std::string ft = FPR(copy(ft_value));
4499
4500     return img::format("CMP.SUNE.D %s, %s, %s", fd, fs, ft);
4501 }
4502
4503
4504 /*
4505  *
4506  *
4507  *   3         2         1
4508  *  10987654321098765432109876543210
4509  *  001000               x1110000101
4510  *     rt -----
4511  *          rs -----
4512  *               rd -----
4513  */
4514 std::string NMD::CMP_SUNE_S(uint64 instruction)
4515 {
4516     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4517     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4518     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4519
4520     std::string fd = FPR(copy(fd_value));
4521     std::string fs = FPR(copy(fs_value));
4522     std::string ft = FPR(copy(ft_value));
4523
4524     return img::format("CMP.SUNE.S %s, %s, %s", fd, fs, ft);
4525 }
4526
4527
4528 /*
4529  *
4530  *
4531  *   3         2         1
4532  *  10987654321098765432109876543210
4533  *  001000               x1110000101
4534  *     rt -----
4535  *          rs -----
4536  *               rd -----
4537  */
4538 std::string NMD::CMP_SUN_S(uint64 instruction)
4539 {
4540     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4541     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4542     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4543
4544     std::string fd = FPR(copy(fd_value));
4545     std::string fs = FPR(copy(fs_value));
4546     std::string ft = FPR(copy(ft_value));
4547
4548     return img::format("CMP.SUN.S %s, %s, %s", fd, fs, ft);
4549 }
4550
4551
4552 /*
4553  *
4554  *
4555  *   3         2         1
4556  *  10987654321098765432109876543210
4557  *  001000               x1110000101
4558  *     rt -----
4559  *          rs -----
4560  *               rd -----
4561  */
4562 std::string NMD::CMP_UEQ_D(uint64 instruction)
4563 {
4564     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4565     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4566     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4567
4568     std::string fd = FPR(copy(fd_value));
4569     std::string fs = FPR(copy(fs_value));
4570     std::string ft = FPR(copy(ft_value));
4571
4572     return img::format("CMP.UEQ.D %s, %s, %s", fd, fs, ft);
4573 }
4574
4575
4576 /*
4577  *
4578  *
4579  *   3         2         1
4580  *  10987654321098765432109876543210
4581  *  001000               x1110000101
4582  *     rt -----
4583  *          rs -----
4584  *               rd -----
4585  */
4586 std::string NMD::CMP_UEQ_S(uint64 instruction)
4587 {
4588     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4589     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4590     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4591
4592     std::string fd = FPR(copy(fd_value));
4593     std::string fs = FPR(copy(fs_value));
4594     std::string ft = FPR(copy(ft_value));
4595
4596     return img::format("CMP.UEQ.S %s, %s, %s", fd, fs, ft);
4597 }
4598
4599
4600 /*
4601  *
4602  *
4603  *   3         2         1
4604  *  10987654321098765432109876543210
4605  *  001000               x1110000101
4606  *     rt -----
4607  *          rs -----
4608  *               rd -----
4609  */
4610 std::string NMD::CMP_ULE_D(uint64 instruction)
4611 {
4612     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4613     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4614     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4615
4616     std::string fd = FPR(copy(fd_value));
4617     std::string fs = FPR(copy(fs_value));
4618     std::string ft = FPR(copy(ft_value));
4619
4620     return img::format("CMP.ULE.D %s, %s, %s", fd, fs, ft);
4621 }
4622
4623
4624 /*
4625  *
4626  *
4627  *   3         2         1
4628  *  10987654321098765432109876543210
4629  *  001000               x1110000101
4630  *     rt -----
4631  *          rs -----
4632  *               rd -----
4633  */
4634 std::string NMD::CMP_ULE_S(uint64 instruction)
4635 {
4636     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4637     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4638     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4639
4640     std::string fd = FPR(copy(fd_value));
4641     std::string fs = FPR(copy(fs_value));
4642     std::string ft = FPR(copy(ft_value));
4643
4644     return img::format("CMP.ULE.S %s, %s, %s", fd, fs, ft);
4645 }
4646
4647
4648 /*
4649  *
4650  *
4651  *   3         2         1
4652  *  10987654321098765432109876543210
4653  *  001000               x1110000101
4654  *     rt -----
4655  *          rs -----
4656  *               rd -----
4657  */
4658 std::string NMD::CMP_ULT_D(uint64 instruction)
4659 {
4660     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4661     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4662     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4663
4664     std::string fd = FPR(copy(fd_value));
4665     std::string fs = FPR(copy(fs_value));
4666     std::string ft = FPR(copy(ft_value));
4667
4668     return img::format("CMP.ULT.D %s, %s, %s", fd, fs, ft);
4669 }
4670
4671
4672 /*
4673  *
4674  *
4675  *   3         2         1
4676  *  10987654321098765432109876543210
4677  *  001000               x1110000101
4678  *     rt -----
4679  *          rs -----
4680  *               rd -----
4681  */
4682 std::string NMD::CMP_ULT_S(uint64 instruction)
4683 {
4684     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4685     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4686     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4687
4688     std::string fd = FPR(copy(fd_value));
4689     std::string fs = FPR(copy(fs_value));
4690     std::string ft = FPR(copy(ft_value));
4691
4692     return img::format("CMP.ULT.S %s, %s, %s", fd, fs, ft);
4693 }
4694
4695
4696 /*
4697  *
4698  *
4699  *   3         2         1
4700  *  10987654321098765432109876543210
4701  *  001000               x1110000101
4702  *     rt -----
4703  *          rs -----
4704  *               rd -----
4705  */
4706 std::string NMD::CMP_UN_D(uint64 instruction)
4707 {
4708     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4709     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4710     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4711
4712     std::string fd = FPR(copy(fd_value));
4713     std::string fs = FPR(copy(fs_value));
4714     std::string ft = FPR(copy(ft_value));
4715
4716     return img::format("CMP.UN.D %s, %s, %s", fd, fs, ft);
4717 }
4718
4719
4720 /*
4721  *
4722  *
4723  *   3         2         1
4724  *  10987654321098765432109876543210
4725  *  001000               x1110000101
4726  *     rt -----
4727  *          rs -----
4728  *               rd -----
4729  */
4730 std::string NMD::CMP_UNE_D(uint64 instruction)
4731 {
4732     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4733     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4734     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4735
4736     std::string fd = FPR(copy(fd_value));
4737     std::string fs = FPR(copy(fs_value));
4738     std::string ft = FPR(copy(ft_value));
4739
4740     return img::format("CMP.UNE.D %s, %s, %s", fd, fs, ft);
4741 }
4742
4743
4744 /*
4745  *
4746  *
4747  *   3         2         1
4748  *  10987654321098765432109876543210
4749  *  001000               x1110000101
4750  *     rt -----
4751  *          rs -----
4752  *               rd -----
4753  */
4754 std::string NMD::CMP_UNE_S(uint64 instruction)
4755 {
4756     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4757     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4758     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4759
4760     std::string fd = FPR(copy(fd_value));
4761     std::string fs = FPR(copy(fs_value));
4762     std::string ft = FPR(copy(ft_value));
4763
4764     return img::format("CMP.UNE.S %s, %s, %s", fd, fs, ft);
4765 }
4766
4767
4768 /*
4769  *
4770  *
4771  *   3         2         1
4772  *  10987654321098765432109876543210
4773  *  001000               x1110000101
4774  *     rt -----
4775  *          rs -----
4776  *               rd -----
4777  */
4778 std::string NMD::CMP_UN_S(uint64 instruction)
4779 {
4780     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4781     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4782     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4783
4784     std::string fd = FPR(copy(fd_value));
4785     std::string fs = FPR(copy(fs_value));
4786     std::string ft = FPR(copy(ft_value));
4787
4788     return img::format("CMP.UN.S %s, %s, %s", fd, fs, ft);
4789 }
4790
4791
4792 /*
4793  *
4794  *
4795  *   3         2         1
4796  *  10987654321098765432109876543210
4797  *  001000               x1110000101
4798  *     rt -----
4799  *          rs -----
4800  *               rd -----
4801  */
4802 std::string NMD::CMPGDU_EQ_QB(uint64 instruction)
4803 {
4804     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4805     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4806     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4807
4808     std::string rd = GPR(copy(rd_value));
4809     std::string rs = GPR(copy(rs_value));
4810     std::string rt = GPR(copy(rt_value));
4811
4812     return img::format("CMPGDU.EQ.QB %s, %s, %s", rd, rs, rt);
4813 }
4814
4815
4816 /*
4817  *
4818  *
4819  *   3         2         1
4820  *  10987654321098765432109876543210
4821  *  001000               x1110000101
4822  *     rt -----
4823  *          rs -----
4824  *               rd -----
4825  */
4826 std::string NMD::CMPGDU_LE_QB(uint64 instruction)
4827 {
4828     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4829     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4830     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4831
4832     std::string rd = GPR(copy(rd_value));
4833     std::string rs = GPR(copy(rs_value));
4834     std::string rt = GPR(copy(rt_value));
4835
4836     return img::format("CMPGDU.LE.QB %s, %s, %s", rd, rs, rt);
4837 }
4838
4839
4840 /*
4841  *
4842  *
4843  *   3         2         1
4844  *  10987654321098765432109876543210
4845  *  001000               x1110000101
4846  *     rt -----
4847  *          rs -----
4848  *               rd -----
4849  */
4850 std::string NMD::CMPGDU_LT_QB(uint64 instruction)
4851 {
4852     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4853     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4854     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4855
4856     std::string rd = GPR(copy(rd_value));
4857     std::string rs = GPR(copy(rs_value));
4858     std::string rt = GPR(copy(rt_value));
4859
4860     return img::format("CMPGDU.LT.QB %s, %s, %s", rd, rs, rt);
4861 }
4862
4863
4864 /*
4865  *
4866  *
4867  *   3         2         1
4868  *  10987654321098765432109876543210
4869  *  001000               x1110000101
4870  *     rt -----
4871  *          rs -----
4872  *               rd -----
4873  */
4874 std::string NMD::CMPGU_EQ_QB(uint64 instruction)
4875 {
4876     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4877     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4878     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4879
4880     std::string rd = GPR(copy(rd_value));
4881     std::string rs = GPR(copy(rs_value));
4882     std::string rt = GPR(copy(rt_value));
4883
4884     return img::format("CMPGU.EQ.QB %s, %s, %s", rd, rs, rt);
4885 }
4886
4887
4888 /*
4889  *
4890  *
4891  *   3         2         1
4892  *  10987654321098765432109876543210
4893  *  001000               x1110000101
4894  *     rt -----
4895  *          rs -----
4896  *               rd -----
4897  */
4898 std::string NMD::CMPGU_LE_QB(uint64 instruction)
4899 {
4900     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4901     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4902     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4903
4904     std::string rd = GPR(copy(rd_value));
4905     std::string rs = GPR(copy(rs_value));
4906     std::string rt = GPR(copy(rt_value));
4907
4908     return img::format("CMPGU.LE.QB %s, %s, %s", rd, rs, rt);
4909 }
4910
4911
4912 /*
4913  *
4914  *
4915  *   3         2         1
4916  *  10987654321098765432109876543210
4917  *  001000               x1110000101
4918  *     rt -----
4919  *          rs -----
4920  *               rd -----
4921  */
4922 std::string NMD::CMPGU_LT_QB(uint64 instruction)
4923 {
4924     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4925     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4926     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4927
4928     std::string rd = GPR(copy(rd_value));
4929     std::string rs = GPR(copy(rs_value));
4930     std::string rt = GPR(copy(rt_value));
4931
4932     return img::format("CMPGU.LT.QB %s, %s, %s", rd, rs, rt);
4933 }
4934
4935
4936 /*
4937  *
4938  *
4939  *   3         2         1
4940  *  10987654321098765432109876543210
4941  *  001000               x1110000101
4942  *     rt -----
4943  *          rs -----
4944  *               rd -----
4945  */
4946 std::string NMD::CMPU_EQ_QB(uint64 instruction)
4947 {
4948     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4949     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4950
4951     std::string rs = GPR(copy(rs_value));
4952     std::string rt = GPR(copy(rt_value));
4953
4954     return img::format("CMPU.EQ.QB %s, %s", rs, rt);
4955 }
4956
4957
4958 /*
4959  *
4960  *
4961  *   3         2         1
4962  *  10987654321098765432109876543210
4963  *  001000               x1110000101
4964  *     rt -----
4965  *          rs -----
4966  *               rd -----
4967  */
4968 std::string NMD::CMPU_LE_QB(uint64 instruction)
4969 {
4970     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4971     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4972
4973     std::string rs = GPR(copy(rs_value));
4974     std::string rt = GPR(copy(rt_value));
4975
4976     return img::format("CMPU.LE.QB %s, %s", rs, rt);
4977 }
4978
4979
4980 /*
4981  *
4982  *
4983  *   3         2         1
4984  *  10987654321098765432109876543210
4985  *  001000               x1110000101
4986  *     rt -----
4987  *          rs -----
4988  *               rd -----
4989  */
4990 std::string NMD::CMPU_LT_QB(uint64 instruction)
4991 {
4992     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4993     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4994
4995     std::string rs = GPR(copy(rs_value));
4996     std::string rt = GPR(copy(rt_value));
4997
4998     return img::format("CMPU.LT.QB %s, %s", rs, rt);
4999 }
5000
5001
5002 /*
5003  *
5004  *
5005  *   3         2         1
5006  *  10987654321098765432109876543210
5007  *  001000               x1110000101
5008  *     rt -----
5009  *          rs -----
5010  *               rd -----
5011  */
5012 std::string NMD::COP2_1(uint64 instruction)
5013 {
5014     uint64 cofun_value = extract_cofun_25_24_23(instruction);
5015
5016     std::string cofun = IMMEDIATE(copy(cofun_value));
5017
5018     return img::format("COP2_1 %s", cofun);
5019 }
5020
5021
5022 /*
5023  *
5024  *
5025  *   3         2         1
5026  *  10987654321098765432109876543210
5027  *  001000               x1110000101
5028  *     rt -----
5029  *          rs -----
5030  *               rd -----
5031  */
5032 std::string NMD::CTC1(uint64 instruction)
5033 {
5034     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5035     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
5036
5037     std::string rt = GPR(copy(rt_value));
5038     std::string cs = CPR(copy(cs_value));
5039
5040     return img::format("CTC1 %s, %s", rt, cs);
5041 }
5042
5043
5044 /*
5045  *
5046  *
5047  *   3         2         1
5048  *  10987654321098765432109876543210
5049  *  001000               x1110000101
5050  *     rt -----
5051  *          rs -----
5052  *               rd -----
5053  */
5054 std::string NMD::CTC2(uint64 instruction)
5055 {
5056     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5057     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
5058
5059     std::string rt = GPR(copy(rt_value));
5060     std::string cs = CPR(copy(cs_value));
5061
5062     return img::format("CTC2 %s, %s", rt, cs);
5063 }
5064
5065
5066 /*
5067  *
5068  *
5069  *   3         2         1
5070  *  10987654321098765432109876543210
5071  *  001000               x1110000101
5072  *     rt -----
5073  *          rs -----
5074  *               rd -----
5075  */
5076 std::string NMD::CVT_D_L(uint64 instruction)
5077 {
5078     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5079     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5080
5081     std::string ft = FPR(copy(ft_value));
5082     std::string fs = FPR(copy(fs_value));
5083
5084     return img::format("CVT.D.L %s, %s", ft, fs);
5085 }
5086
5087
5088 /*
5089  *
5090  *
5091  *   3         2         1
5092  *  10987654321098765432109876543210
5093  *  001000               x1110000101
5094  *     rt -----
5095  *          rs -----
5096  *               rd -----
5097  */
5098 std::string NMD::CVT_D_S(uint64 instruction)
5099 {
5100     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5101     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5102
5103     std::string ft = FPR(copy(ft_value));
5104     std::string fs = FPR(copy(fs_value));
5105
5106     return img::format("CVT.D.S %s, %s", ft, fs);
5107 }
5108
5109
5110 /*
5111  *
5112  *
5113  *   3         2         1
5114  *  10987654321098765432109876543210
5115  *  001000               x1110000101
5116  *     rt -----
5117  *          rs -----
5118  *               rd -----
5119  */
5120 std::string NMD::CVT_D_W(uint64 instruction)
5121 {
5122     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5123     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5124
5125     std::string ft = FPR(copy(ft_value));
5126     std::string fs = FPR(copy(fs_value));
5127
5128     return img::format("CVT.D.W %s, %s", ft, fs);
5129 }
5130
5131
5132 /*
5133  *
5134  *
5135  *   3         2         1
5136  *  10987654321098765432109876543210
5137  *  001000               x1110000101
5138  *     rt -----
5139  *          rs -----
5140  *               rd -----
5141  */
5142 std::string NMD::CVT_L_D(uint64 instruction)
5143 {
5144     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5145     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5146
5147     std::string ft = FPR(copy(ft_value));
5148     std::string fs = FPR(copy(fs_value));
5149
5150     return img::format("CVT.L.D %s, %s", ft, fs);
5151 }
5152
5153
5154 /*
5155  *
5156  *
5157  *   3         2         1
5158  *  10987654321098765432109876543210
5159  *  001000               x1110000101
5160  *     rt -----
5161  *          rs -----
5162  *               rd -----
5163  */
5164 std::string NMD::CVT_L_S(uint64 instruction)
5165 {
5166     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5167     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5168
5169     std::string ft = FPR(copy(ft_value));
5170     std::string fs = FPR(copy(fs_value));
5171
5172     return img::format("CVT.L.S %s, %s", ft, fs);
5173 }
5174
5175
5176 /*
5177  *
5178  *
5179  *   3         2         1
5180  *  10987654321098765432109876543210
5181  *  001000               x1110000101
5182  *     rt -----
5183  *          rs -----
5184  *               rd -----
5185  */
5186 std::string NMD::CVT_S_D(uint64 instruction)
5187 {
5188     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5189     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5190
5191     std::string ft = FPR(copy(ft_value));
5192     std::string fs = FPR(copy(fs_value));
5193
5194     return img::format("CVT.S.D %s, %s", ft, fs);
5195 }
5196
5197
5198 /*
5199  *
5200  *
5201  *   3         2         1
5202  *  10987654321098765432109876543210
5203  *  001000               x1110000101
5204  *     rt -----
5205  *          rs -----
5206  *               rd -----
5207  */
5208 std::string NMD::CVT_S_L(uint64 instruction)
5209 {
5210     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5211     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5212
5213     std::string ft = FPR(copy(ft_value));
5214     std::string fs = FPR(copy(fs_value));
5215
5216     return img::format("CVT.S.L %s, %s", ft, fs);
5217 }
5218
5219
5220 /*
5221  *
5222  *
5223  *   3         2         1
5224  *  10987654321098765432109876543210
5225  *  001000               x1110000101
5226  *     rt -----
5227  *          rs -----
5228  *               rd -----
5229  */
5230 std::string NMD::CVT_S_PL(uint64 instruction)
5231 {
5232     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5233     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5234
5235     std::string ft = FPR(copy(ft_value));
5236     std::string fs = FPR(copy(fs_value));
5237
5238     return img::format("CVT.S.PL %s, %s", ft, fs);
5239 }
5240
5241
5242 /*
5243  *
5244  *
5245  *   3         2         1
5246  *  10987654321098765432109876543210
5247  *  001000               x1110000101
5248  *     rt -----
5249  *          rs -----
5250  *               rd -----
5251  */
5252 std::string NMD::CVT_S_PU(uint64 instruction)
5253 {
5254     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5255     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5256
5257     std::string ft = FPR(copy(ft_value));
5258     std::string fs = FPR(copy(fs_value));
5259
5260     return img::format("CVT.S.PU %s, %s", ft, fs);
5261 }
5262
5263
5264 /*
5265  *
5266  *
5267  *   3         2         1
5268  *  10987654321098765432109876543210
5269  *  001000               x1110000101
5270  *     rt -----
5271  *          rs -----
5272  *               rd -----
5273  */
5274 std::string NMD::CVT_S_W(uint64 instruction)
5275 {
5276     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5277     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5278
5279     std::string ft = FPR(copy(ft_value));
5280     std::string fs = FPR(copy(fs_value));
5281
5282     return img::format("CVT.S.W %s, %s", ft, fs);
5283 }
5284
5285
5286 /*
5287  *
5288  *
5289  *   3         2         1
5290  *  10987654321098765432109876543210
5291  *  001000               x1110000101
5292  *     rt -----
5293  *          rs -----
5294  *               rd -----
5295  */
5296 std::string NMD::CVT_W_D(uint64 instruction)
5297 {
5298     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5299     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5300
5301     std::string ft = FPR(copy(ft_value));
5302     std::string fs = FPR(copy(fs_value));
5303
5304     return img::format("CVT.W.D %s, %s", ft, fs);
5305 }
5306
5307
5308 /*
5309  *
5310  *
5311  *   3         2         1
5312  *  10987654321098765432109876543210
5313  *  001000               x1110000101
5314  *     rt -----
5315  *          rs -----
5316  *               rd -----
5317  */
5318 std::string NMD::CVT_W_S(uint64 instruction)
5319 {
5320     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5321     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5322
5323     std::string ft = FPR(copy(ft_value));
5324     std::string fs = FPR(copy(fs_value));
5325
5326     return img::format("CVT.W.S %s, %s", ft, fs);
5327 }
5328
5329
5330 /*
5331  *
5332  *
5333  *   3         2         1
5334  *  10987654321098765432109876543210
5335  *  001000               x1110000101
5336  *     rt -----
5337  *          rs -----
5338  *               rd -----
5339  */
5340 std::string NMD::DADDIU_48_(uint64 instruction)
5341 {
5342     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
5343     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
5344
5345     std::string rt = GPR(copy(rt_value));
5346     std::string s = IMMEDIATE(copy(s_value));
5347
5348     return img::format("DADDIU %s, %s", rt, s);
5349 }
5350
5351
5352 /*
5353  *
5354  *
5355  *   3         2         1
5356  *  10987654321098765432109876543210
5357  *  001000               x1110000101
5358  *     rt -----
5359  *          rs -----
5360  *               rd -----
5361  */
5362 std::string NMD::DADDIU_NEG_(uint64 instruction)
5363 {
5364     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5365     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5366     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
5367
5368     std::string rt = GPR(copy(rt_value));
5369     std::string rs = GPR(copy(rs_value));
5370     std::string u = IMMEDIATE(neg_copy(u_value));
5371
5372     return img::format("DADDIU %s, %s, %s", rt, rs, u);
5373 }
5374
5375
5376 /*
5377  *
5378  *
5379  *   3         2         1
5380  *  10987654321098765432109876543210
5381  *  001000               x1110000101
5382  *     rt -----
5383  *          rs -----
5384  *               rd -----
5385  */
5386 std::string NMD::DADDIU_U12_(uint64 instruction)
5387 {
5388     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5389     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5390     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
5391
5392     std::string rt = GPR(copy(rt_value));
5393     std::string rs = GPR(copy(rs_value));
5394     std::string u = IMMEDIATE(copy(u_value));
5395
5396     return img::format("DADDIU %s, %s, %s", rt, rs, u);
5397 }
5398
5399
5400 /*
5401  *
5402  *
5403  *   3         2         1
5404  *  10987654321098765432109876543210
5405  *  001000               x1110000101
5406  *     rt -----
5407  *          rs -----
5408  *               rd -----
5409  */
5410 std::string NMD::DADD(uint64 instruction)
5411 {
5412     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5413     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5414     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5415
5416     std::string rd = GPR(copy(rd_value));
5417     std::string rs = GPR(copy(rs_value));
5418     std::string rt = GPR(copy(rt_value));
5419
5420     return img::format("DADD %s, %s, %s", rd, rs, rt);
5421 }
5422
5423
5424 /*
5425  *
5426  *
5427  *   3         2         1
5428  *  10987654321098765432109876543210
5429  *  001000               x1110000101
5430  *     rt -----
5431  *          rs -----
5432  *               rd -----
5433  */
5434 std::string NMD::DADDU(uint64 instruction)
5435 {
5436     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5437     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5438     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5439
5440     std::string rd = GPR(copy(rd_value));
5441     std::string rs = GPR(copy(rs_value));
5442     std::string rt = GPR(copy(rt_value));
5443
5444     return img::format("DADDU %s, %s, %s", rd, rs, rt);
5445 }
5446
5447
5448 /*
5449  *
5450  *
5451  *   3         2         1
5452  *  10987654321098765432109876543210
5453  *  001000               x1110000101
5454  *     rt -----
5455  *          rs -----
5456  *               rd -----
5457  */
5458 std::string NMD::DCLO(uint64 instruction)
5459 {
5460     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5461     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5462
5463     std::string rt = GPR(copy(rt_value));
5464     std::string rs = GPR(copy(rs_value));
5465
5466     return img::format("DCLO %s, %s", rt, rs);
5467 }
5468
5469
5470 /*
5471  *
5472  *
5473  *   3         2         1
5474  *  10987654321098765432109876543210
5475  *  001000               x1110000101
5476  *     rt -----
5477  *          rs -----
5478  *               rd -----
5479  */
5480 std::string NMD::DCLZ(uint64 instruction)
5481 {
5482     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5483     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5484
5485     std::string rt = GPR(copy(rt_value));
5486     std::string rs = GPR(copy(rs_value));
5487
5488     return img::format("DCLZ %s, %s", rt, rs);
5489 }
5490
5491
5492 /*
5493  *
5494  *
5495  *   3         2         1
5496  *  10987654321098765432109876543210
5497  *  001000               x1110000101
5498  *     rt -----
5499  *          rs -----
5500  *               rd -----
5501  */
5502 std::string NMD::DDIV(uint64 instruction)
5503 {
5504     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5505     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5506     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5507
5508     std::string rd = GPR(copy(rd_value));
5509     std::string rs = GPR(copy(rs_value));
5510     std::string rt = GPR(copy(rt_value));
5511
5512     return img::format("DDIV %s, %s, %s", rd, rs, rt);
5513 }
5514
5515
5516 /*
5517  *
5518  *
5519  *   3         2         1
5520  *  10987654321098765432109876543210
5521  *  001000               x1110000101
5522  *     rt -----
5523  *          rs -----
5524  *               rd -----
5525  */
5526 std::string NMD::DDIVU(uint64 instruction)
5527 {
5528     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5529     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5530     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5531
5532     std::string rd = GPR(copy(rd_value));
5533     std::string rs = GPR(copy(rs_value));
5534     std::string rt = GPR(copy(rt_value));
5535
5536     return img::format("DDIVU %s, %s, %s", rd, rs, rt);
5537 }
5538
5539
5540 /*
5541  *
5542  *
5543  *   3         2         1
5544  *  10987654321098765432109876543210
5545  *  001000               x1110000101
5546  *     rt -----
5547  *          rs -----
5548  *               rd -----
5549  */
5550 std::string NMD::DERET(uint64 instruction)
5551 {
5552     (void)instruction;
5553
5554     return "DERET ";
5555 }
5556
5557
5558 /*
5559  *
5560  *
5561  *   3         2         1
5562  *  10987654321098765432109876543210
5563  *  001000               x1110000101
5564  *     rt -----
5565  *          rs -----
5566  *               rd -----
5567  */
5568 std::string NMD::DEXTM(uint64 instruction)
5569 {
5570     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5571     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5572     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5573     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5574
5575     std::string rt = GPR(copy(rt_value));
5576     std::string rs = GPR(copy(rs_value));
5577     std::string lsb = IMMEDIATE(copy(lsb_value));
5578     std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
5579
5580     return img::format("DEXTM %s, %s, %s, %s", rt, rs, lsb, msbd);
5581 }
5582
5583
5584 /*
5585  *
5586  *
5587  *   3         2         1
5588  *  10987654321098765432109876543210
5589  *  001000               x1110000101
5590  *     rt -----
5591  *          rs -----
5592  *               rd -----
5593  */
5594 std::string NMD::DEXT(uint64 instruction)
5595 {
5596     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5597     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5598     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5599     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5600
5601     std::string rt = GPR(copy(rt_value));
5602     std::string rs = GPR(copy(rs_value));
5603     std::string lsb = IMMEDIATE(copy(lsb_value));
5604     std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
5605
5606     return img::format("DEXT %s, %s, %s, %s", rt, rs, lsb, msbd);
5607 }
5608
5609
5610 /*
5611  *
5612  *
5613  *   3         2         1
5614  *  10987654321098765432109876543210
5615  *  001000               x1110000101
5616  *     rt -----
5617  *          rs -----
5618  *               rd -----
5619  */
5620 std::string NMD::DEXTU(uint64 instruction)
5621 {
5622     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5623     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5624     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5625     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5626
5627     std::string rt = GPR(copy(rt_value));
5628     std::string rs = GPR(copy(rs_value));
5629     std::string lsb = IMMEDIATE(copy(lsb_value));
5630     std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
5631
5632     return img::format("DEXTU %s, %s, %s, %s", rt, rs, lsb, msbd);
5633 }
5634
5635
5636 /*
5637  *
5638  *
5639  *   3         2         1
5640  *  10987654321098765432109876543210
5641  *  001000               x1110000101
5642  *     rt -----
5643  *          rs -----
5644  *               rd -----
5645  */
5646 std::string NMD::DINSM(uint64 instruction)
5647 {
5648     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5649     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5650     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5651     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5652
5653     std::string rt = GPR(copy(rt_value));
5654     std::string rs = GPR(copy(rs_value));
5655     std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
5656     std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
5657     /* !!!!!!!!!! - no conversion function */
5658
5659     return img::format("DINSM %s, %s, %s, %s", rt, rs, pos, size);
5660     /* hand edited */
5661 }
5662
5663
5664 /*
5665  *
5666  *
5667  *   3         2         1
5668  *  10987654321098765432109876543210
5669  *  001000               x1110000101
5670  *     rt -----
5671  *          rs -----
5672  *               rd -----
5673  */
5674 std::string NMD::DINS(uint64 instruction)
5675 {
5676     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5677     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5678     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5679     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5680
5681     std::string rt = GPR(copy(rt_value));
5682     std::string rs = GPR(copy(rs_value));
5683     std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
5684     std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
5685     /* !!!!!!!!!! - no conversion function */
5686
5687     return img::format("DINS %s, %s, %s, %s", rt, rs, pos, size);
5688     /* hand edited */
5689 }
5690
5691
5692 /*
5693  *
5694  *
5695  *   3         2         1
5696  *  10987654321098765432109876543210
5697  *  001000               x1110000101
5698  *     rt -----
5699  *          rs -----
5700  *               rd -----
5701  */
5702 std::string NMD::DINSU(uint64 instruction)
5703 {
5704     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5705     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5706     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5707     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5708
5709     std::string rt = GPR(copy(rt_value));
5710     std::string rs = GPR(copy(rs_value));
5711     std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
5712     std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
5713     /* !!!!!!!!!! - no conversion function */
5714
5715     return img::format("DINSU %s, %s, %s, %s", rt, rs, pos, size);
5716     /* hand edited */
5717 }
5718
5719
5720 /*
5721  *
5722  *
5723  *   3         2         1
5724  *  10987654321098765432109876543210
5725  *  001000               x1110000101
5726  *     rt -----
5727  *          rs -----
5728  *               rd -----
5729  */
5730 std::string NMD::DI(uint64 instruction)
5731 {
5732     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5733
5734     std::string rt = GPR(copy(rt_value));
5735
5736     return img::format("DI %s", rt);
5737 }
5738
5739
5740 /*
5741  *
5742  *
5743  *   3         2         1
5744  *  10987654321098765432109876543210
5745  *  001000               x1110000101
5746  *     rt -----
5747  *          rs -----
5748  *               rd -----
5749  */
5750 std::string NMD::DIV(uint64 instruction)
5751 {
5752     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5753     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5754     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5755
5756     std::string rd = GPR(copy(rd_value));
5757     std::string rs = GPR(copy(rs_value));
5758     std::string rt = GPR(copy(rt_value));
5759
5760     return img::format("DIV %s, %s, %s", rd, rs, rt);
5761 }
5762
5763
5764 /*
5765  *
5766  *
5767  *   3         2         1
5768  *  10987654321098765432109876543210
5769  *  001000               x1110000101
5770  *     rt -----
5771  *          rs -----
5772  *               rd -----
5773  */
5774 std::string NMD::DIV_D(uint64 instruction)
5775 {
5776     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5777     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5778     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
5779
5780     std::string fd = FPR(copy(fd_value));
5781     std::string fs = FPR(copy(fs_value));
5782     std::string ft = FPR(copy(ft_value));
5783
5784     return img::format("DIV.D %s, %s, %s", fd, fs, ft);
5785 }
5786
5787
5788 /*
5789  *
5790  *
5791  *   3         2         1
5792  *  10987654321098765432109876543210
5793  *  001000               x1110000101
5794  *     rt -----
5795  *          rs -----
5796  *               rd -----
5797  */
5798 std::string NMD::DIV_S(uint64 instruction)
5799 {
5800     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5801     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5802     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
5803
5804     std::string fd = FPR(copy(fd_value));
5805     std::string fs = FPR(copy(fs_value));
5806     std::string ft = FPR(copy(ft_value));
5807
5808     return img::format("DIV.S %s, %s, %s", fd, fs, ft);
5809 }
5810
5811
5812 /*
5813  *
5814  *
5815  *   3         2         1
5816  *  10987654321098765432109876543210
5817  *  001000               x1110000101
5818  *     rt -----
5819  *          rs -----
5820  *               rd -----
5821  */
5822 std::string NMD::DIVU(uint64 instruction)
5823 {
5824     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5825     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5826     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5827
5828     std::string rd = GPR(copy(rd_value));
5829     std::string rs = GPR(copy(rs_value));
5830     std::string rt = GPR(copy(rt_value));
5831
5832     return img::format("DIVU %s, %s, %s", rd, rs, rt);
5833 }
5834
5835
5836 /*
5837  *
5838  *
5839  *   3         2         1
5840  *  10987654321098765432109876543210
5841  *  001000               x1110000101
5842  *     rt -----
5843  *          rs -----
5844  *               rd -----
5845  */
5846 std::string NMD::DLSA(uint64 instruction)
5847 {
5848     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5849     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5850     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5851     uint64 u2_value = extract_u2_10_9(instruction);
5852
5853     std::string rd = GPR(copy(rd_value));
5854     std::string rs = GPR(copy(rs_value));
5855     std::string rt = GPR(copy(rt_value));
5856     std::string u2 = IMMEDIATE(copy(u2_value));
5857
5858     return img::format("DLSA %s, %s, %s, %s", rd, rs, rt, u2);
5859 }
5860
5861
5862 /*
5863  *
5864  *
5865  *   3         2         1
5866  *  10987654321098765432109876543210
5867  *  001000               x1110000101
5868  *     rt -----
5869  *          rs -----
5870  *               rd -----
5871  */
5872 std::string NMD::DLUI_48_(uint64 instruction)
5873 {
5874     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
5875     uint64 u_value = extract_u_31_to_0__s32(instruction);
5876
5877     std::string rt = GPR(copy(rt_value));
5878     std::string u = IMMEDIATE(copy(u_value));
5879
5880     return img::format("DLUI %s, %s", rt, u);
5881 }
5882
5883
5884 /*
5885  *
5886  *
5887  *   3         2         1
5888  *  10987654321098765432109876543210
5889  *  001000               x1110000101
5890  *     rt -----
5891  *          rs -----
5892  *               rd -----
5893  */
5894 std::string NMD::DMFC0(uint64 instruction)
5895 {
5896     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5897     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
5898     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
5899
5900     std::string rt = GPR(copy(rt_value));
5901     std::string c0s = CPR(copy(c0s_value));
5902     std::string sel = IMMEDIATE(copy(sel_value));
5903
5904     return img::format("DMFC0 %s, %s, %s", rt, c0s, sel);
5905 }
5906
5907
5908 /*
5909  *
5910  *
5911  *   3         2         1
5912  *  10987654321098765432109876543210
5913  *  001000               x1110000101
5914  *     rt -----
5915  *          rs -----
5916  *               rd -----
5917  */
5918 std::string NMD::DMFC1(uint64 instruction)
5919 {
5920     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5921     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5922
5923     std::string rt = GPR(copy(rt_value));
5924     std::string fs = FPR(copy(fs_value));
5925
5926     return img::format("DMFC1 %s, %s", rt, fs);
5927 }
5928
5929
5930 /*
5931  *
5932  *
5933  *   3         2         1
5934  *  10987654321098765432109876543210
5935  *  001000               x1110000101
5936  *     rt -----
5937  *          rs -----
5938  *               rd -----
5939  */
5940 std::string NMD::DMFC2(uint64 instruction)
5941 {
5942     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5943     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
5944
5945     std::string rt = GPR(copy(rt_value));
5946     std::string cs = CPR(copy(cs_value));
5947
5948     return img::format("DMFC2 %s, %s", rt, cs);
5949 }
5950
5951
5952 /*
5953  *
5954  *
5955  *   3         2         1
5956  *  10987654321098765432109876543210
5957  *  001000               x1110000101
5958  *     rt -----
5959  *          rs -----
5960  *               rd -----
5961  */
5962 std::string NMD::DMFGC0(uint64 instruction)
5963 {
5964     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5965     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
5966     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
5967
5968     std::string rt = GPR(copy(rt_value));
5969     std::string c0s = CPR(copy(c0s_value));
5970     std::string sel = IMMEDIATE(copy(sel_value));
5971
5972     return img::format("DMFGC0 %s, %s, %s", rt, c0s, sel);
5973 }
5974
5975
5976 /*
5977  *
5978  *
5979  *   3         2         1
5980  *  10987654321098765432109876543210
5981  *  001000               x1110000101
5982  *     rt -----
5983  *          rs -----
5984  *               rd -----
5985  */
5986 std::string NMD::DMOD(uint64 instruction)
5987 {
5988     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5989     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5990     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5991
5992     std::string rd = GPR(copy(rd_value));
5993     std::string rs = GPR(copy(rs_value));
5994     std::string rt = GPR(copy(rt_value));
5995
5996     return img::format("DMOD %s, %s, %s", rd, rs, rt);
5997 }
5998
5999
6000 /*
6001  *
6002  *
6003  *   3         2         1
6004  *  10987654321098765432109876543210
6005  *  001000               x1110000101
6006  *     rt -----
6007  *          rs -----
6008  *               rd -----
6009  */
6010 std::string NMD::DMODU(uint64 instruction)
6011 {
6012     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6013     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6014     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6015
6016     std::string rd = GPR(copy(rd_value));
6017     std::string rs = GPR(copy(rs_value));
6018     std::string rt = GPR(copy(rt_value));
6019
6020     return img::format("DMODU %s, %s, %s", rd, rs, rt);
6021 }
6022
6023
6024 /*
6025  *
6026  *
6027  *   3         2         1
6028  *  10987654321098765432109876543210
6029  *  001000               x1110000101
6030  *     rt -----
6031  *          rs -----
6032  *               rd -----
6033  */
6034 std::string NMD::DMTC0(uint64 instruction)
6035 {
6036     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6037     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
6038     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
6039
6040     std::string rt = GPR(copy(rt_value));
6041     std::string c0s = CPR(copy(c0s_value));
6042     std::string sel = IMMEDIATE(copy(sel_value));
6043
6044     return img::format("DMTC0 %s, %s, %s", rt, c0s, sel);
6045 }
6046
6047
6048 /*
6049  *
6050  *
6051  *   3         2         1
6052  *  10987654321098765432109876543210
6053  *  001000               x1110000101
6054  *     rt -----
6055  *          rs -----
6056  *               rd -----
6057  */
6058 std::string NMD::DMTC1(uint64 instruction)
6059 {
6060     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6061     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
6062
6063     std::string rt = GPR(copy(rt_value));
6064     std::string fs = FPR(copy(fs_value));
6065
6066     return img::format("DMTC1 %s, %s", rt, fs);
6067 }
6068
6069
6070 /*
6071  *
6072  *
6073  *   3         2         1
6074  *  10987654321098765432109876543210
6075  *  001000               x1110000101
6076  *     rt -----
6077  *          rs -----
6078  *               rd -----
6079  */
6080 std::string NMD::DMTC2(uint64 instruction)
6081 {
6082     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6083     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
6084
6085     std::string rt = GPR(copy(rt_value));
6086     std::string cs = CPR(copy(cs_value));
6087
6088     return img::format("DMTC2 %s, %s", rt, cs);
6089 }
6090
6091
6092 /*
6093  *
6094  *
6095  *   3         2         1
6096  *  10987654321098765432109876543210
6097  *  001000               x1110000101
6098  *     rt -----
6099  *          rs -----
6100  *               rd -----
6101  */
6102 std::string NMD::DMTGC0(uint64 instruction)
6103 {
6104     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6105     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
6106     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
6107
6108     std::string rt = GPR(copy(rt_value));
6109     std::string c0s = CPR(copy(c0s_value));
6110     std::string sel = IMMEDIATE(copy(sel_value));
6111
6112     return img::format("DMTGC0 %s, %s, %s", rt, c0s, sel);
6113 }
6114
6115
6116 /*
6117  *
6118  *
6119  *   3         2         1
6120  *  10987654321098765432109876543210
6121  *  001000               x1110000101
6122  *     rt -----
6123  *          rs -----
6124  *               rd -----
6125  */
6126 std::string NMD::DMT(uint64 instruction)
6127 {
6128     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6129
6130     std::string rt = GPR(copy(rt_value));
6131
6132     return img::format("DMT %s", rt);
6133 }
6134
6135
6136 /*
6137  *
6138  *
6139  *   3         2         1
6140  *  10987654321098765432109876543210
6141  *  001000               x1110000101
6142  *     rt -----
6143  *          rs -----
6144  *               rd -----
6145  */
6146 std::string NMD::DMUH(uint64 instruction)
6147 {
6148     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6149     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6150     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6151
6152     std::string rd = GPR(copy(rd_value));
6153     std::string rs = GPR(copy(rs_value));
6154     std::string rt = GPR(copy(rt_value));
6155
6156     return img::format("DMUH %s, %s, %s", rd, rs, rt);
6157 }
6158
6159
6160 /*
6161  *
6162  *
6163  *   3         2         1
6164  *  10987654321098765432109876543210
6165  *  001000               x1110000101
6166  *     rt -----
6167  *          rs -----
6168  *               rd -----
6169  */
6170 std::string NMD::DMUHU(uint64 instruction)
6171 {
6172     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6173     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6174     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6175
6176     std::string rd = GPR(copy(rd_value));
6177     std::string rs = GPR(copy(rs_value));
6178     std::string rt = GPR(copy(rt_value));
6179
6180     return img::format("DMUHU %s, %s, %s", rd, rs, rt);
6181 }
6182
6183
6184 /*
6185  *
6186  *
6187  *   3         2         1
6188  *  10987654321098765432109876543210
6189  *  001000               x1110000101
6190  *     rt -----
6191  *          rs -----
6192  *               rd -----
6193  */
6194 std::string NMD::DMUL(uint64 instruction)
6195 {
6196     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6197     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6198     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6199
6200     std::string rd = GPR(copy(rd_value));
6201     std::string rs = GPR(copy(rs_value));
6202     std::string rt = GPR(copy(rt_value));
6203
6204     return img::format("DMUL %s, %s, %s", rd, rs, rt);
6205 }
6206
6207
6208 /*
6209  *
6210  *
6211  *   3         2         1
6212  *  10987654321098765432109876543210
6213  *  001000               x1110000101
6214  *     rt -----
6215  *          rs -----
6216  *               rd -----
6217  */
6218 std::string NMD::DMULU(uint64 instruction)
6219 {
6220     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6221     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6222     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6223
6224     std::string rd = GPR(copy(rd_value));
6225     std::string rs = GPR(copy(rs_value));
6226     std::string rt = GPR(copy(rt_value));
6227
6228     return img::format("DMULU %s, %s, %s", rd, rs, rt);
6229 }
6230
6231
6232 /*
6233  *
6234  *
6235  *   3         2         1
6236  *  10987654321098765432109876543210
6237  *  001000               x1110000101
6238  *     rt -----
6239  *          rs -----
6240  *               rd -----
6241  */
6242 std::string NMD::DPA_W_PH(uint64 instruction)
6243 {
6244     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6245     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6246     uint64 ac_value = extract_ac_13_12(instruction);
6247
6248     std::string ac = AC(copy(ac_value));
6249     std::string rs = GPR(copy(rs_value));
6250     std::string rt = GPR(copy(rt_value));
6251
6252     return img::format("DPA.W.PH %s, %s, %s", ac, rs, rt);
6253 }
6254
6255
6256 /*
6257  *
6258  *
6259  *   3         2         1
6260  *  10987654321098765432109876543210
6261  *  001000               x1110000101
6262  *     rt -----
6263  *          rs -----
6264  *               rd -----
6265  */
6266 std::string NMD::DPAQ_SA_L_W(uint64 instruction)
6267 {
6268     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6269     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6270     uint64 ac_value = extract_ac_13_12(instruction);
6271
6272     std::string ac = AC(copy(ac_value));
6273     std::string rs = GPR(copy(rs_value));
6274     std::string rt = GPR(copy(rt_value));
6275
6276     return img::format("DPAQ_SA.L.W %s, %s, %s", ac, rs, rt);
6277 }
6278
6279
6280 /*
6281  *
6282  *
6283  *   3         2         1
6284  *  10987654321098765432109876543210
6285  *  001000               x1110000101
6286  *     rt -----
6287  *          rs -----
6288  *               rd -----
6289  */
6290 std::string NMD::DPAQ_S_W_PH(uint64 instruction)
6291 {
6292     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6293     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6294     uint64 ac_value = extract_ac_13_12(instruction);
6295
6296     std::string ac = AC(copy(ac_value));
6297     std::string rs = GPR(copy(rs_value));
6298     std::string rt = GPR(copy(rt_value));
6299
6300     return img::format("DPAQ_S.W.PH %s, %s, %s", ac, rs, rt);
6301 }
6302
6303
6304 /*
6305  *
6306  *
6307  *   3         2         1
6308  *  10987654321098765432109876543210
6309  *  001000               x1110000101
6310  *     rt -----
6311  *          rs -----
6312  *               rd -----
6313  */
6314 std::string NMD::DPAQX_SA_W_PH(uint64 instruction)
6315 {
6316     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6317     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6318     uint64 ac_value = extract_ac_13_12(instruction);
6319
6320     std::string ac = AC(copy(ac_value));
6321     std::string rs = GPR(copy(rs_value));
6322     std::string rt = GPR(copy(rt_value));
6323
6324     return img::format("DPAQX_SA.W.PH %s, %s, %s", ac, rs, rt);
6325 }
6326
6327
6328 /*
6329  *
6330  *
6331  *   3         2         1
6332  *  10987654321098765432109876543210
6333  *  001000               x1110000101
6334  *     rt -----
6335  *          rs -----
6336  *               rd -----
6337  */
6338 std::string NMD::DPAQX_S_W_PH(uint64 instruction)
6339 {
6340     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6341     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6342     uint64 ac_value = extract_ac_13_12(instruction);
6343
6344     std::string ac = AC(copy(ac_value));
6345     std::string rs = GPR(copy(rs_value));
6346     std::string rt = GPR(copy(rt_value));
6347
6348     return img::format("DPAQX_S.W.PH %s, %s, %s", ac, rs, rt);
6349 }
6350
6351
6352 /*
6353  *
6354  *
6355  *   3         2         1
6356  *  10987654321098765432109876543210
6357  *  001000               x1110000101
6358  *     rt -----
6359  *          rs -----
6360  *               rd -----
6361  */
6362 std::string NMD::DPAU_H_QBL(uint64 instruction)
6363 {
6364     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6365     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6366     uint64 ac_value = extract_ac_13_12(instruction);
6367
6368     std::string ac = AC(copy(ac_value));
6369     std::string rs = GPR(copy(rs_value));
6370     std::string rt = GPR(copy(rt_value));
6371
6372     return img::format("DPAU.H.QBL %s, %s, %s", ac, rs, rt);
6373 }
6374
6375
6376 /*
6377  *
6378  *
6379  *   3         2         1
6380  *  10987654321098765432109876543210
6381  *  001000               x1110000101
6382  *     rt -----
6383  *          rs -----
6384  *               rd -----
6385  */
6386 std::string NMD::DPAU_H_QBR(uint64 instruction)
6387 {
6388     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6389     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6390     uint64 ac_value = extract_ac_13_12(instruction);
6391
6392     std::string ac = AC(copy(ac_value));
6393     std::string rs = GPR(copy(rs_value));
6394     std::string rt = GPR(copy(rt_value));
6395
6396     return img::format("DPAU.H.QBR %s, %s, %s", ac, rs, rt);
6397 }
6398
6399
6400 /*
6401  *
6402  *
6403  *   3         2         1
6404  *  10987654321098765432109876543210
6405  *  001000               x1110000101
6406  *     rt -----
6407  *          rs -----
6408  *               rd -----
6409  */
6410 std::string NMD::DPAX_W_PH(uint64 instruction)
6411 {
6412     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6413     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6414     uint64 ac_value = extract_ac_13_12(instruction);
6415
6416     std::string ac = AC(copy(ac_value));
6417     std::string rs = GPR(copy(rs_value));
6418     std::string rt = GPR(copy(rt_value));
6419
6420     return img::format("DPAX.W.PH %s, %s, %s", ac, rs, rt);
6421 }
6422
6423
6424 /*
6425  *
6426  *
6427  *   3         2         1
6428  *  10987654321098765432109876543210
6429  *  001000               x1110000101
6430  *     rt -----
6431  *          rs -----
6432  *               rd -----
6433  */
6434 std::string NMD::DPS_W_PH(uint64 instruction)
6435 {
6436     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6437     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6438     uint64 ac_value = extract_ac_13_12(instruction);
6439
6440     std::string ac = AC(copy(ac_value));
6441     std::string rs = GPR(copy(rs_value));
6442     std::string rt = GPR(copy(rt_value));
6443
6444     return img::format("DPS.W.PH %s, %s, %s", ac, rs, rt);
6445 }
6446
6447
6448 /*
6449  *
6450  *
6451  *   3         2         1
6452  *  10987654321098765432109876543210
6453  *  001000               x1110000101
6454  *     rt -----
6455  *          rs -----
6456  *               rd -----
6457  */
6458 std::string NMD::DPSQ_SA_L_W(uint64 instruction)
6459 {
6460     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6461     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6462     uint64 ac_value = extract_ac_13_12(instruction);
6463
6464     std::string ac = AC(copy(ac_value));
6465     std::string rs = GPR(copy(rs_value));
6466     std::string rt = GPR(copy(rt_value));
6467
6468     return img::format("DPSQ_SA.L.W %s, %s, %s", ac, rs, rt);
6469 }
6470
6471
6472 /*
6473  *
6474  *
6475  *   3         2         1
6476  *  10987654321098765432109876543210
6477  *  001000               x1110000101
6478  *     rt -----
6479  *          rs -----
6480  *               rd -----
6481  */
6482 std::string NMD::DPSQ_S_W_PH(uint64 instruction)
6483 {
6484     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6485     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6486     uint64 ac_value = extract_ac_13_12(instruction);
6487
6488     std::string ac = AC(copy(ac_value));
6489     std::string rs = GPR(copy(rs_value));
6490     std::string rt = GPR(copy(rt_value));
6491
6492     return img::format("DPSQ_S.W.PH %s, %s, %s", ac, rs, rt);
6493 }
6494
6495
6496 /*
6497  *
6498  *
6499  *   3         2         1
6500  *  10987654321098765432109876543210
6501  *  001000               x1110000101
6502  *     rt -----
6503  *          rs -----
6504  *               rd -----
6505  */
6506 std::string NMD::DPSQX_SA_W_PH(uint64 instruction)
6507 {
6508     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6509     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6510     uint64 ac_value = extract_ac_13_12(instruction);
6511
6512     std::string ac = AC(copy(ac_value));
6513     std::string rs = GPR(copy(rs_value));
6514     std::string rt = GPR(copy(rt_value));
6515
6516     return img::format("DPSQX_SA.W.PH %s, %s, %s", ac, rs, rt);
6517 }
6518
6519
6520 /*
6521  *
6522  *
6523  *   3         2         1
6524  *  10987654321098765432109876543210
6525  *  001000               x1110000101
6526  *     rt -----
6527  *          rs -----
6528  *               rd -----
6529  */
6530 std::string NMD::DPSQX_S_W_PH(uint64 instruction)
6531 {
6532     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6533     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6534     uint64 ac_value = extract_ac_13_12(instruction);
6535
6536     std::string ac = AC(copy(ac_value));
6537     std::string rs = GPR(copy(rs_value));
6538     std::string rt = GPR(copy(rt_value));
6539
6540     return img::format("DPSQX_S.W.PH %s, %s, %s", ac, rs, rt);
6541 }
6542
6543
6544 /*
6545  *
6546  *
6547  *   3         2         1
6548  *  10987654321098765432109876543210
6549  *  001000               x1110000101
6550  *     rt -----
6551  *          rs -----
6552  *               rd -----
6553  */
6554 std::string NMD::DPSU_H_QBL(uint64 instruction)
6555 {
6556     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6557     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6558     uint64 ac_value = extract_ac_13_12(instruction);
6559
6560     std::string ac = AC(copy(ac_value));
6561     std::string rs = GPR(copy(rs_value));
6562     std::string rt = GPR(copy(rt_value));
6563
6564     return img::format("DPSU.H.QBL %s, %s, %s", ac, rs, rt);
6565 }
6566
6567
6568 /*
6569  *
6570  *
6571  *   3         2         1
6572  *  10987654321098765432109876543210
6573  *  001000               x1110000101
6574  *     rt -----
6575  *          rs -----
6576  *               rd -----
6577  */
6578 std::string NMD::DPSU_H_QBR(uint64 instruction)
6579 {
6580     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6581     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6582     uint64 ac_value = extract_ac_13_12(instruction);
6583
6584     std::string ac = AC(copy(ac_value));
6585     std::string rs = GPR(copy(rs_value));
6586     std::string rt = GPR(copy(rt_value));
6587
6588     return img::format("DPSU.H.QBR %s, %s, %s", ac, rs, rt);
6589 }
6590
6591
6592 /*
6593  *
6594  *
6595  *   3         2         1
6596  *  10987654321098765432109876543210
6597  *  001000               x1110000101
6598  *     rt -----
6599  *          rs -----
6600  *               rd -----
6601  */
6602 std::string NMD::DPSX_W_PH(uint64 instruction)
6603 {
6604     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6605     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6606     uint64 ac_value = extract_ac_13_12(instruction);
6607
6608     std::string ac = AC(copy(ac_value));
6609     std::string rs = GPR(copy(rs_value));
6610     std::string rt = GPR(copy(rt_value));
6611
6612     return img::format("DPSX.W.PH %s, %s, %s", ac, rs, rt);
6613 }
6614
6615
6616 /*
6617  * DROTR -
6618  *
6619  *   3         2         1
6620  *  10987654321098765432109876543210
6621  *  001000               x1110000101
6622  *     rt -----
6623  *          rs -----
6624  *               rd -----
6625  */
6626 std::string NMD::DROTR(uint64 instruction)
6627 {
6628     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6629     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6630     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6631
6632     std::string rt = GPR(copy(rt_value));
6633     std::string rs = GPR(copy(rs_value));
6634     std::string shift = IMMEDIATE(copy(shift_value));
6635
6636     return img::format("DROTR %s, %s, %s", rt, rs, shift);
6637 }
6638
6639
6640 /*
6641  * DROTR[32] -
6642  *
6643  *   3         2         1
6644  *  10987654321098765432109876543210
6645  *  10o000          1100xxx0110
6646  *     rt -----
6647  *          rs -----
6648  *                       shift -----
6649  */
6650 std::string NMD::DROTR32(uint64 instruction)
6651 {
6652     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6653     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6654     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6655
6656     std::string rt = GPR(copy(rt_value));
6657     std::string rs = GPR(copy(rs_value));
6658     std::string shift = IMMEDIATE(copy(shift_value));
6659
6660     return img::format("DROTR32 %s, %s, %s", rt, rs, shift);
6661 }
6662
6663
6664 /*
6665  *
6666  *
6667  *   3         2         1
6668  *  10987654321098765432109876543210
6669  *  001000               x1110000101
6670  *     rt -----
6671  *          rs -----
6672  *               rd -----
6673  */
6674 std::string NMD::DROTRV(uint64 instruction)
6675 {
6676     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6677     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6678     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6679
6680     std::string rd = GPR(copy(rd_value));
6681     std::string rs = GPR(copy(rs_value));
6682     std::string rt = GPR(copy(rt_value));
6683
6684     return img::format("DROTRV %s, %s, %s", rd, rs, rt);
6685 }
6686
6687
6688 /*
6689  *
6690  *
6691  *   3         2         1
6692  *  10987654321098765432109876543210
6693  *  001000               x1110000101
6694  *     rt -----
6695  *          rs -----
6696  *               rd -----
6697  */
6698 std::string NMD::DROTX(uint64 instruction)
6699 {
6700     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6701     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6702     uint64 shiftx_value = extract_shiftx_11_10_9_8_7_6(instruction);
6703     uint64 shift_value = extract_shift_5_4_3_2_1_0(instruction);
6704
6705     std::string rt = GPR(copy(rt_value));
6706     std::string rs = GPR(copy(rs_value));
6707     std::string shift = IMMEDIATE(copy(shift_value));
6708     std::string shiftx = IMMEDIATE(copy(shiftx_value));
6709
6710     return img::format("DROTX %s, %s, %s, %s", rt, rs, shift, shiftx);
6711 }
6712
6713
6714 /*
6715  * DSLL -
6716  *
6717  *   3         2         1
6718  *  10987654321098765432109876543210
6719  *  10o000          1100xxx0000
6720  *     rt -----
6721  *          rs -----
6722  *                       shift -----
6723  */
6724 std::string NMD::DSLL(uint64 instruction)
6725 {
6726     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6727     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6728     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6729
6730     std::string rt = GPR(copy(rt_value));
6731     std::string rs = GPR(copy(rs_value));
6732     std::string shift = IMMEDIATE(copy(shift_value));
6733
6734     return img::format("DSLL %s, %s, %s", rt, rs, shift);
6735 }
6736
6737
6738 /*
6739  * DSLL[32] -
6740  *
6741  *   3         2         1
6742  *  10987654321098765432109876543210
6743  *  10o000          1100xxx0000
6744  *     rt -----
6745  *          rs -----
6746  *                       shift -----
6747  */
6748 std::string NMD::DSLL32(uint64 instruction)
6749 {
6750     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6751     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6752     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6753
6754     std::string rt = GPR(copy(rt_value));
6755     std::string rs = GPR(copy(rs_value));
6756     std::string shift = IMMEDIATE(copy(shift_value));
6757
6758     return img::format("DSLL32 %s, %s, %s", rt, rs, shift);
6759 }
6760
6761
6762 /*
6763  *
6764  *
6765  *   3         2         1
6766  *  10987654321098765432109876543210
6767  *  001000               x1110000101
6768  *     rt -----
6769  *          rs -----
6770  *               rd -----
6771  */
6772 std::string NMD::DSLLV(uint64 instruction)
6773 {
6774     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6775     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6776     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6777
6778     std::string rd = GPR(copy(rd_value));
6779     std::string rs = GPR(copy(rs_value));
6780     std::string rt = GPR(copy(rt_value));
6781
6782     return img::format("DSLLV %s, %s, %s", rd, rs, rt);
6783 }
6784
6785
6786 /*
6787  * DSRA -
6788  *
6789  *   3         2         1
6790  *  10987654321098765432109876543210
6791  *  10o000          1100xxx0100
6792  *     rt -----
6793  *          rs -----
6794  *                       shift -----
6795  */
6796 std::string NMD::DSRA(uint64 instruction)
6797 {
6798     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6799     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6800     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6801
6802     std::string rt = GPR(copy(rt_value));
6803     std::string rs = GPR(copy(rs_value));
6804     std::string shift = IMMEDIATE(copy(shift_value));
6805
6806     return img::format("DSRA %s, %s, %s", rt, rs, shift);
6807 }
6808
6809
6810 /*
6811  * DSRA[32] -
6812  *
6813  *   3         2         1
6814  *  10987654321098765432109876543210
6815  *  10o000          1100xxx0100
6816  *     rt -----
6817  *          rs -----
6818  *                       shift -----
6819  */
6820 std::string NMD::DSRA32(uint64 instruction)
6821 {
6822     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6823     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6824     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6825
6826     std::string rt = GPR(copy(rt_value));
6827     std::string rs = GPR(copy(rs_value));
6828     std::string shift = IMMEDIATE(copy(shift_value));
6829
6830     return img::format("DSRA32 %s, %s, %s", rt, rs, shift);
6831 }
6832
6833
6834 /*
6835  *
6836  *
6837  *   3         2         1
6838  *  10987654321098765432109876543210
6839  *  001000               x1110000101
6840  *     rt -----
6841  *          rs -----
6842  *               rd -----
6843  */
6844 std::string NMD::DSRAV(uint64 instruction)
6845 {
6846     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6847     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6848     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6849
6850     std::string rd = GPR(copy(rd_value));
6851     std::string rs = GPR(copy(rs_value));
6852     std::string rt = GPR(copy(rt_value));
6853
6854     return img::format("DSRAV %s, %s, %s", rd, rs, rt);
6855 }
6856
6857
6858 /*
6859  * DSRL -
6860  *
6861  *   3         2         1
6862  *  10987654321098765432109876543210
6863  *  10o000          1100xxx0100
6864  *     rt -----
6865  *          rs -----
6866  *                       shift -----
6867  */
6868 std::string NMD::DSRL(uint64 instruction)
6869 {
6870     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6871     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6872     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6873
6874     std::string rt = GPR(copy(rt_value));
6875     std::string rs = GPR(copy(rs_value));
6876     std::string shift = IMMEDIATE(copy(shift_value));
6877
6878     return img::format("DSRL %s, %s, %s", rt, rs, shift);
6879 }
6880
6881
6882 /*
6883  * DSRL[32] -
6884  *
6885  *   3         2         1
6886  *  10987654321098765432109876543210
6887  *  10o000          1100xxx0010
6888  *     rt -----
6889  *          rs -----
6890  *                       shift -----
6891  */
6892 std::string NMD::DSRL32(uint64 instruction)
6893 {
6894     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6895     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6896     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6897
6898     std::string rt = GPR(copy(rt_value));
6899     std::string rs = GPR(copy(rs_value));
6900     std::string shift = IMMEDIATE(copy(shift_value));
6901
6902     return img::format("DSRL32 %s, %s, %s", rt, rs, shift);
6903 }
6904
6905
6906 /*
6907  *
6908  *
6909  *   3         2         1
6910  *  10987654321098765432109876543210
6911  *  001000               x1110000101
6912  *     rt -----
6913  *          rs -----
6914  *               rd -----
6915  */
6916 std::string NMD::DSRLV(uint64 instruction)
6917 {
6918     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6919     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6920     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6921
6922     std::string rd = GPR(copy(rd_value));
6923     std::string rs = GPR(copy(rs_value));
6924     std::string rt = GPR(copy(rt_value));
6925
6926     return img::format("DSRLV %s, %s, %s", rd, rs, rt);
6927 }
6928
6929
6930 /*
6931  *
6932  *
6933  *   3         2         1
6934  *  10987654321098765432109876543210
6935  *  001000               x1110000101
6936  *     rt -----
6937  *          rs -----
6938  *               rd -----
6939  */
6940 std::string NMD::DSUB(uint64 instruction)
6941 {
6942     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6943     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6944     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6945
6946     std::string rd = GPR(copy(rd_value));
6947     std::string rs = GPR(copy(rs_value));
6948     std::string rt = GPR(copy(rt_value));
6949
6950     return img::format("DSUB %s, %s, %s", rd, rs, rt);
6951 }
6952
6953
6954 /*
6955  *
6956  *
6957  *   3         2         1
6958  *  10987654321098765432109876543210
6959  *  001000               x1110000101
6960  *     rt -----
6961  *          rs -----
6962  *               rd -----
6963  */
6964 std::string NMD::DSUBU(uint64 instruction)
6965 {
6966     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6967     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6968     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6969
6970     std::string rd = GPR(copy(rd_value));
6971     std::string rs = GPR(copy(rs_value));
6972     std::string rt = GPR(copy(rt_value));
6973
6974     return img::format("DSUBU %s, %s, %s", rd, rs, rt);
6975 }
6976
6977
6978 /*
6979  *
6980  *
6981  *   3         2         1
6982  *  10987654321098765432109876543210
6983  *  001000               x1110000101
6984  *     rt -----
6985  *          rs -----
6986  *               rd -----
6987  */
6988 std::string NMD::DVPE(uint64 instruction)
6989 {
6990     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6991
6992     std::string rt = GPR(copy(rt_value));
6993
6994     return img::format("DVPE %s", rt);
6995 }
6996
6997
6998 /*
6999  *
7000  *
7001  *   3         2         1
7002  *  10987654321098765432109876543210
7003  *  001000               x1110000101
7004  *     rt -----
7005  *          rs -----
7006  *               rd -----
7007  */
7008 std::string NMD::DVP(uint64 instruction)
7009 {
7010     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7011
7012     std::string rt = GPR(copy(rt_value));
7013
7014     return img::format("DVP %s", rt);
7015 }
7016
7017
7018 /*
7019  *
7020  *
7021  *   3         2         1
7022  *  10987654321098765432109876543210
7023  *  001000               x1110000101
7024  *     rt -----
7025  *          rs -----
7026  *               rd -----
7027  */
7028 std::string NMD::EHB(uint64 instruction)
7029 {
7030     (void)instruction;
7031
7032     return "EHB ";
7033 }
7034
7035
7036 /*
7037  *
7038  *
7039  *   3         2         1
7040  *  10987654321098765432109876543210
7041  *  001000               x1110000101
7042  *     rt -----
7043  *          rs -----
7044  *               rd -----
7045  */
7046 std::string NMD::EI(uint64 instruction)
7047 {
7048     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7049
7050     std::string rt = GPR(copy(rt_value));
7051
7052     return img::format("EI %s", rt);
7053 }
7054
7055
7056 /*
7057  *
7058  *
7059  *   3         2         1
7060  *  10987654321098765432109876543210
7061  *  001000               x1110000101
7062  *     rt -----
7063  *          rs -----
7064  *               rd -----
7065  */
7066 std::string NMD::EMT(uint64 instruction)
7067 {
7068     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7069
7070     std::string rt = GPR(copy(rt_value));
7071
7072     return img::format("EMT %s", rt);
7073 }
7074
7075
7076 /*
7077  *
7078  *
7079  *   3         2         1
7080  *  10987654321098765432109876543210
7081  *  001000               x1110000101
7082  *     rt -----
7083  *          rs -----
7084  *               rd -----
7085  */
7086 std::string NMD::ERET(uint64 instruction)
7087 {
7088     (void)instruction;
7089
7090     return "ERET ";
7091 }
7092
7093
7094 /*
7095  *
7096  *
7097  *   3         2         1
7098  *  10987654321098765432109876543210
7099  *  001000               x1110000101
7100  *     rt -----
7101  *          rs -----
7102  *               rd -----
7103  */
7104 std::string NMD::ERETNC(uint64 instruction)
7105 {
7106     (void)instruction;
7107
7108     return "ERETNC ";
7109 }
7110
7111
7112 /*
7113  *
7114  *
7115  *   3         2         1
7116  *  10987654321098765432109876543210
7117  *  001000               x1110000101
7118  *     rt -----
7119  *          rs -----
7120  *               rd -----
7121  */
7122 std::string NMD::EVP(uint64 instruction)
7123 {
7124     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7125
7126     std::string rt = GPR(copy(rt_value));
7127
7128     return img::format("EVP %s", rt);
7129 }
7130
7131
7132 /*
7133  *
7134  *
7135  *   3         2         1
7136  *  10987654321098765432109876543210
7137  *  001000               x1110000101
7138  *     rt -----
7139  *          rs -----
7140  *               rd -----
7141  */
7142 std::string NMD::EVPE(uint64 instruction)
7143 {
7144     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7145
7146     std::string rt = GPR(copy(rt_value));
7147
7148     return img::format("EVPE %s", rt);
7149 }
7150
7151
7152 /*
7153  *
7154  *
7155  *   3         2         1
7156  *  10987654321098765432109876543210
7157  *  001000               x1110000101
7158  *     rt -----
7159  *          rs -----
7160  *               rd -----
7161  */
7162 std::string NMD::EXT(uint64 instruction)
7163 {
7164     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7165     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7166     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
7167     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
7168
7169     std::string rt = GPR(copy(rt_value));
7170     std::string rs = GPR(copy(rs_value));
7171     std::string lsb = IMMEDIATE(copy(lsb_value));
7172     std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
7173
7174     return img::format("EXT %s, %s, %s, %s", rt, rs, lsb, msbd);
7175 }
7176
7177
7178 /*
7179  *
7180  *
7181  *   3         2         1
7182  *  10987654321098765432109876543210
7183  *  001000               x1110000101
7184  *     rt -----
7185  *          rs -----
7186  *               rd -----
7187  */
7188 std::string NMD::EXTD(uint64 instruction)
7189 {
7190     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7191     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7192     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7193     uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
7194
7195     std::string rd = GPR(copy(rd_value));
7196     std::string rs = GPR(copy(rs_value));
7197     std::string rt = GPR(copy(rt_value));
7198     std::string shift = IMMEDIATE(copy(shift_value));
7199
7200     return img::format("EXTD %s, %s, %s, %s", rd, rs, rt, shift);
7201 }
7202
7203
7204 /*
7205  *
7206  *
7207  *   3         2         1
7208  *  10987654321098765432109876543210
7209  *  001000               x1110000101
7210  *     rt -----
7211  *          rs -----
7212  *               rd -----
7213  */
7214 std::string NMD::EXTD32(uint64 instruction)
7215 {
7216     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7217     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7218     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7219     uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
7220
7221     std::string rd = GPR(copy(rd_value));
7222     std::string rs = GPR(copy(rs_value));
7223     std::string rt = GPR(copy(rt_value));
7224     std::string shift = IMMEDIATE(copy(shift_value));
7225
7226     return img::format("EXTD32 %s, %s, %s, %s", rd, rs, rt, shift);
7227 }
7228
7229
7230 /*
7231  *
7232  *
7233  *   3         2         1
7234  *  10987654321098765432109876543210
7235  *  001000               x1110000101
7236  *     rt -----
7237  *          rs -----
7238  *               rd -----
7239  */
7240 std::string NMD::EXTPDP(uint64 instruction)
7241 {
7242     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7243     uint64 size_value = extract_size_20_19_18_17_16(instruction);
7244     uint64 ac_value = extract_ac_13_12(instruction);
7245
7246     std::string rt = GPR(copy(rt_value));
7247     std::string ac = AC(copy(ac_value));
7248     std::string size = IMMEDIATE(copy(size_value));
7249
7250     return img::format("EXTPDP %s, %s, %s", rt, ac, size);
7251 }
7252
7253
7254 /*
7255  *
7256  *
7257  *   3         2         1
7258  *  10987654321098765432109876543210
7259  *  001000               x1110000101
7260  *     rt -----
7261  *          rs -----
7262  *               rd -----
7263  */
7264 std::string NMD::EXTPDPV(uint64 instruction)
7265 {
7266     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7267     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7268     uint64 ac_value = extract_ac_13_12(instruction);
7269
7270     std::string rt = GPR(copy(rt_value));
7271     std::string ac = AC(copy(ac_value));
7272     std::string rs = GPR(copy(rs_value));
7273
7274     return img::format("EXTPDPV %s, %s, %s", rt, ac, rs);
7275 }
7276
7277
7278 /*
7279  *
7280  *
7281  *   3         2         1
7282  *  10987654321098765432109876543210
7283  *  001000               x1110000101
7284  *     rt -----
7285  *          rs -----
7286  *               rd -----
7287  */
7288 std::string NMD::EXTP(uint64 instruction)
7289 {
7290     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7291     uint64 size_value = extract_size_20_19_18_17_16(instruction);
7292     uint64 ac_value = extract_ac_13_12(instruction);
7293
7294     std::string rt = GPR(copy(rt_value));
7295     std::string ac = AC(copy(ac_value));
7296     std::string size = IMMEDIATE(copy(size_value));
7297
7298     return img::format("EXTP %s, %s, %s", rt, ac, size);
7299 }
7300
7301
7302 /*
7303  *
7304  *
7305  *   3         2         1
7306  *  10987654321098765432109876543210
7307  *  001000               x1110000101
7308  *     rt -----
7309  *          rs -----
7310  *               rd -----
7311  */
7312 std::string NMD::EXTPV(uint64 instruction)
7313 {
7314     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7315     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7316     uint64 ac_value = extract_ac_13_12(instruction);
7317
7318     std::string rt = GPR(copy(rt_value));
7319     std::string ac = AC(copy(ac_value));
7320     std::string rs = GPR(copy(rs_value));
7321
7322     return img::format("EXTPV %s, %s, %s", rt, ac, rs);
7323 }
7324
7325
7326 /*
7327  *
7328  *
7329  *   3         2         1
7330  *  10987654321098765432109876543210
7331  *  001000               x1110000101
7332  *     rt -----
7333  *          rs -----
7334  *               rd -----
7335  */
7336 std::string NMD::EXTR_RS_W(uint64 instruction)
7337 {
7338     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7339     uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7340     uint64 ac_value = extract_ac_13_12(instruction);
7341
7342     std::string rt = GPR(copy(rt_value));
7343     std::string ac = AC(copy(ac_value));
7344     std::string shift = IMMEDIATE(copy(shift_value));
7345
7346     return img::format("EXTR_RS.W %s, %s, %s", rt, ac, shift);
7347 }
7348
7349
7350 /*
7351  *
7352  *
7353  *   3         2         1
7354  *  10987654321098765432109876543210
7355  *  001000               x1110000101
7356  *     rt -----
7357  *          rs -----
7358  *               rd -----
7359  */
7360 std::string NMD::EXTR_R_W(uint64 instruction)
7361 {
7362     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7363     uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7364     uint64 ac_value = extract_ac_13_12(instruction);
7365
7366     std::string rt = GPR(copy(rt_value));
7367     std::string ac = AC(copy(ac_value));
7368     std::string shift = IMMEDIATE(copy(shift_value));
7369
7370     return img::format("EXTR_R.W %s, %s, %s", rt, ac, shift);
7371 }
7372
7373
7374 /*
7375  *
7376  *
7377  *   3         2         1
7378  *  10987654321098765432109876543210
7379  *  001000               x1110000101
7380  *     rt -----
7381  *          rs -----
7382  *               rd -----
7383  */
7384 std::string NMD::EXTR_S_H(uint64 instruction)
7385 {
7386     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7387     uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7388     uint64 ac_value = extract_ac_13_12(instruction);
7389
7390     std::string rt = GPR(copy(rt_value));
7391     std::string ac = AC(copy(ac_value));
7392     std::string shift = IMMEDIATE(copy(shift_value));
7393
7394     return img::format("EXTR_S.H %s, %s, %s", rt, ac, shift);
7395 }
7396
7397
7398 /*
7399  *
7400  *
7401  *   3         2         1
7402  *  10987654321098765432109876543210
7403  *  001000               x1110000101
7404  *     rt -----
7405  *          rs -----
7406  *               rd -----
7407  */
7408 std::string NMD::EXTR_W(uint64 instruction)
7409 {
7410     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7411     uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7412     uint64 ac_value = extract_ac_13_12(instruction);
7413
7414     std::string rt = GPR(copy(rt_value));
7415     std::string ac = AC(copy(ac_value));
7416     std::string shift = IMMEDIATE(copy(shift_value));
7417
7418     return img::format("EXTR.W %s, %s, %s", rt, ac, shift);
7419 }
7420
7421
7422 /*
7423  *
7424  *
7425  *   3         2         1
7426  *  10987654321098765432109876543210
7427  *  001000               x1110000101
7428  *     rt -----
7429  *          rs -----
7430  *               rd -----
7431  */
7432 std::string NMD::EXTRV_RS_W(uint64 instruction)
7433 {
7434     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7435     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7436     uint64 ac_value = extract_ac_13_12(instruction);
7437
7438     std::string rt = GPR(copy(rt_value));
7439     std::string ac = AC(copy(ac_value));
7440     std::string rs = GPR(copy(rs_value));
7441
7442     return img::format("EXTRV_RS.W %s, %s, %s", rt, ac, rs);
7443 }
7444
7445
7446 /*
7447  *
7448  *
7449  *   3         2         1
7450  *  10987654321098765432109876543210
7451  *  001000               x1110000101
7452  *     rt -----
7453  *          rs -----
7454  *               rd -----
7455  */
7456 std::string NMD::EXTRV_R_W(uint64 instruction)
7457 {
7458     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7459     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7460     uint64 ac_value = extract_ac_13_12(instruction);
7461
7462     std::string rt = GPR(copy(rt_value));
7463     std::string ac = AC(copy(ac_value));
7464     std::string rs = GPR(copy(rs_value));
7465
7466     return img::format("EXTRV_R.W %s, %s, %s", rt, ac, rs);
7467 }
7468
7469
7470 /*
7471  *
7472  *
7473  *   3         2         1
7474  *  10987654321098765432109876543210
7475  *  001000               x1110000101
7476  *     rt -----
7477  *          rs -----
7478  *               rd -----
7479  */
7480 std::string NMD::EXTRV_S_H(uint64 instruction)
7481 {
7482     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7483     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7484     uint64 ac_value = extract_ac_13_12(instruction);
7485
7486     std::string rt = GPR(copy(rt_value));
7487     std::string ac = AC(copy(ac_value));
7488     std::string rs = GPR(copy(rs_value));
7489
7490     return img::format("EXTRV_S.H %s, %s, %s", rt, ac, rs);
7491 }
7492
7493
7494 /*
7495  *
7496  *
7497  *   3         2         1
7498  *  10987654321098765432109876543210
7499  *  001000               x1110000101
7500  *     rt -----
7501  *          rs -----
7502  *               rd -----
7503  */
7504 std::string NMD::EXTRV_W(uint64 instruction)
7505 {
7506     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7507     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7508     uint64 ac_value = extract_ac_13_12(instruction);
7509
7510     std::string rt = GPR(copy(rt_value));
7511     std::string ac = AC(copy(ac_value));
7512     std::string rs = GPR(copy(rs_value));
7513
7514     return img::format("EXTRV.W %s, %s, %s", rt, ac, rs);
7515 }
7516
7517
7518 /*
7519  * EXTW - Extract Word
7520  *
7521  *   3         2         1
7522  *  10987654321098765432109876543210
7523  *  001000                    011111
7524  *     rt -----
7525  *          rs -----
7526  *               rd -----
7527  *                 shift -----
7528  */
7529 std::string NMD::EXTW(uint64 instruction)
7530 {
7531     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7532     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7533     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7534     uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
7535
7536     std::string rd = GPR(copy(rd_value));
7537     std::string rs = GPR(copy(rs_value));
7538     std::string rt = GPR(copy(rt_value));
7539     std::string shift = IMMEDIATE(copy(shift_value));
7540
7541     return img::format("EXTW %s, %s, %s, %s", rd, rs, rt, shift);
7542 }
7543
7544
7545 /*
7546  *
7547  *
7548  *   3         2         1
7549  *  10987654321098765432109876543210
7550  *  001000               x1110000101
7551  *     rt -----
7552  *          rs -----
7553  *               rd -----
7554  */
7555 std::string NMD::FLOOR_L_D(uint64 instruction)
7556 {
7557     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7558     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7559
7560     std::string ft = FPR(copy(ft_value));
7561     std::string fs = FPR(copy(fs_value));
7562
7563     return img::format("FLOOR.L.D %s, %s", ft, fs);
7564 }
7565
7566
7567 /*
7568  *
7569  *
7570  *   3         2         1
7571  *  10987654321098765432109876543210
7572  *  001000               x1110000101
7573  *     rt -----
7574  *          rs -----
7575  *               rd -----
7576  */
7577 std::string NMD::FLOOR_L_S(uint64 instruction)
7578 {
7579     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7580     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7581
7582     std::string ft = FPR(copy(ft_value));
7583     std::string fs = FPR(copy(fs_value));
7584
7585     return img::format("FLOOR.L.S %s, %s", ft, fs);
7586 }
7587
7588
7589 /*
7590  *
7591  *
7592  *   3         2         1
7593  *  10987654321098765432109876543210
7594  *  001000               x1110000101
7595  *     rt -----
7596  *          rs -----
7597  *               rd -----
7598  */
7599 std::string NMD::FLOOR_W_D(uint64 instruction)
7600 {
7601     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7602     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7603
7604     std::string ft = FPR(copy(ft_value));
7605     std::string fs = FPR(copy(fs_value));
7606
7607     return img::format("FLOOR.W.D %s, %s", ft, fs);
7608 }
7609
7610
7611 /*
7612  *
7613  *
7614  *   3         2         1
7615  *  10987654321098765432109876543210
7616  *  001000               x1110000101
7617  *     rt -----
7618  *          rs -----
7619  *               rd -----
7620  */
7621 std::string NMD::FLOOR_W_S(uint64 instruction)
7622 {
7623     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7624     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7625
7626     std::string ft = FPR(copy(ft_value));
7627     std::string fs = FPR(copy(fs_value));
7628
7629     return img::format("FLOOR.W.S %s, %s", ft, fs);
7630 }
7631
7632
7633 /*
7634  *
7635  *
7636  *   3         2         1
7637  *  10987654321098765432109876543210
7638  *  001000               x1110000101
7639  *     rt -----
7640  *          rs -----
7641  *               rd -----
7642  */
7643 std::string NMD::FORK(uint64 instruction)
7644 {
7645     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7646     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7647     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7648
7649     std::string rd = GPR(copy(rd_value));
7650     std::string rs = GPR(copy(rs_value));
7651     std::string rt = GPR(copy(rt_value));
7652
7653     return img::format("FORK %s, %s, %s", rd, rs, rt);
7654 }
7655
7656
7657 /*
7658  *
7659  *
7660  *   3         2         1
7661  *  10987654321098765432109876543210
7662  *  001000               x1110000101
7663  *     rt -----
7664  *          rs -----
7665  *               rd -----
7666  */
7667 std::string NMD::HYPCALL(uint64 instruction)
7668 {
7669     uint64 code_value = extract_code_17_to_0(instruction);
7670
7671     std::string code = IMMEDIATE(copy(code_value));
7672
7673     return img::format("HYPCALL %s", code);
7674 }
7675
7676
7677 /*
7678  *
7679  *
7680  *   3         2         1
7681  *  10987654321098765432109876543210
7682  *  001000               x1110000101
7683  *     rt -----
7684  *          rs -----
7685  *               rd -----
7686  */
7687 std::string NMD::HYPCALL_16_(uint64 instruction)
7688 {
7689     uint64 code_value = extract_code_1_0(instruction);
7690
7691     std::string code = IMMEDIATE(copy(code_value));
7692
7693     return img::format("HYPCALL %s", code);
7694 }
7695
7696
7697 /*
7698  *
7699  *
7700  *   3         2         1
7701  *  10987654321098765432109876543210
7702  *  001000               x1110000101
7703  *     rt -----
7704  *          rs -----
7705  *               rd -----
7706  */
7707 std::string NMD::INS(uint64 instruction)
7708 {
7709     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7710     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7711     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
7712     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
7713
7714     std::string rt = GPR(copy(rt_value));
7715     std::string rs = GPR(copy(rs_value));
7716     std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
7717     std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
7718     /* !!!!!!!!!! - no conversion function */
7719
7720     return img::format("INS %s, %s, %s, %s", rt, rs, pos, size);
7721     /* hand edited */
7722 }
7723
7724
7725 /*
7726  *
7727  *
7728  *   3         2         1
7729  *  10987654321098765432109876543210
7730  *  001000               x1110000101
7731  *     rt -----
7732  *          rs -----
7733  *               rd -----
7734  */
7735 std::string NMD::INSV(uint64 instruction)
7736 {
7737     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7738     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7739
7740     std::string rt = GPR(copy(rt_value));
7741     std::string rs = GPR(copy(rs_value));
7742
7743     return img::format("INSV %s, %s", rt, rs);
7744 }
7745
7746
7747 /*
7748  *
7749  *
7750  *   3         2         1
7751  *  10987654321098765432109876543210
7752  *  001000               x1110000101
7753  *     rt -----
7754  *          rs -----
7755  *               rd -----
7756  */
7757 std::string NMD::IRET(uint64 instruction)
7758 {
7759     (void)instruction;
7760
7761     return "IRET ";
7762 }
7763
7764
7765 /*
7766  *
7767  *
7768  *   3         2         1
7769  *  10987654321098765432109876543210
7770  *  001000               x1110000101
7771  *     rt -----
7772  *          rs -----
7773  *               rd -----
7774  */
7775 std::string NMD::JALRC_16_(uint64 instruction)
7776 {
7777     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
7778
7779     std::string rt = GPR(copy(rt_value));
7780
7781     return img::format("JALRC $%d, %s", 31, rt);
7782 }
7783
7784
7785 /*
7786  *
7787  *
7788  *   3         2         1
7789  *  10987654321098765432109876543210
7790  *  001000               x1110000101
7791  *     rt -----
7792  *          rs -----
7793  *               rd -----
7794  */
7795 std::string NMD::JALRC_32_(uint64 instruction)
7796 {
7797     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7798     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7799
7800     std::string rt = GPR(copy(rt_value));
7801     std::string rs = GPR(copy(rs_value));
7802
7803     return img::format("JALRC %s, %s", rt, rs);
7804 }
7805
7806
7807 /*
7808  *
7809  *
7810  *   3         2         1
7811  *  10987654321098765432109876543210
7812  *  001000               x1110000101
7813  *     rt -----
7814  *          rs -----
7815  *               rd -----
7816  */
7817 std::string NMD::JALRC_HB(uint64 instruction)
7818 {
7819     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7820     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7821
7822     std::string rt = GPR(copy(rt_value));
7823     std::string rs = GPR(copy(rs_value));
7824
7825     return img::format("JALRC.HB %s, %s", rt, rs);
7826 }
7827
7828
7829 /*
7830  *
7831  *
7832  *   3         2         1
7833  *  10987654321098765432109876543210
7834  *  001000               x1110000101
7835  *     rt -----
7836  *          rs -----
7837  *               rd -----
7838  */
7839 std::string NMD::JRC(uint64 instruction)
7840 {
7841     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
7842
7843     std::string rt = GPR(copy(rt_value));
7844
7845     return img::format("JRC %s", rt);
7846 }
7847
7848
7849 /*
7850  *
7851  *
7852  *   3         2         1
7853  *  10987654321098765432109876543210
7854  *  001000               x1110000101
7855  *     rt -----
7856  *          rs -----
7857  *               rd -----
7858  */
7859 std::string NMD::LB_16_(uint64 instruction)
7860 {
7861     uint64 rt3_value = extract_rt3_9_8_7(instruction);
7862     uint64 rs3_value = extract_rs3_6_5_4(instruction);
7863     uint64 u_value = extract_u_1_0(instruction);
7864
7865     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
7866     std::string u = IMMEDIATE(copy(u_value));
7867     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
7868
7869     return img::format("LB %s, %s(%s)", rt3, u, rs3);
7870 }
7871
7872
7873 /*
7874  *
7875  *
7876  *   3         2         1
7877  *  10987654321098765432109876543210
7878  *  001000               x1110000101
7879  *     rt -----
7880  *          rs -----
7881  *               rd -----
7882  */
7883 std::string NMD::LB_GP_(uint64 instruction)
7884 {
7885     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7886     uint64 u_value = extract_u_17_to_0(instruction);
7887
7888     std::string rt = GPR(copy(rt_value));
7889     std::string u = IMMEDIATE(copy(u_value));
7890
7891     return img::format("LB %s, %s($%d)", rt, u, 28);
7892 }
7893
7894
7895 /*
7896  *
7897  *
7898  *   3         2         1
7899  *  10987654321098765432109876543210
7900  *  001000               x1110000101
7901  *     rt -----
7902  *          rs -----
7903  *               rd -----
7904  */
7905 std::string NMD::LB_S9_(uint64 instruction)
7906 {
7907     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7908     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7909     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
7910
7911     std::string rt = GPR(copy(rt_value));
7912     std::string s = IMMEDIATE(copy(s_value));
7913     std::string rs = GPR(copy(rs_value));
7914
7915     return img::format("LB %s, %s(%s)", rt, s, rs);
7916 }
7917
7918
7919 /*
7920  *
7921  *
7922  *   3         2         1
7923  *  10987654321098765432109876543210
7924  *  001000               x1110000101
7925  *     rt -----
7926  *          rs -----
7927  *               rd -----
7928  */
7929 std::string NMD::LB_U12_(uint64 instruction)
7930 {
7931     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7932     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7933     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
7934
7935     std::string rt = GPR(copy(rt_value));
7936     std::string u = IMMEDIATE(copy(u_value));
7937     std::string rs = GPR(copy(rs_value));
7938
7939     return img::format("LB %s, %s(%s)", rt, u, rs);
7940 }
7941
7942
7943 /*
7944  *
7945  *
7946  *   3         2         1
7947  *  10987654321098765432109876543210
7948  *  001000               x1110000101
7949  *     rt -----
7950  *          rs -----
7951  *               rd -----
7952  */
7953 std::string NMD::LBE(uint64 instruction)
7954 {
7955     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7956     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7957     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
7958
7959     std::string rt = GPR(copy(rt_value));
7960     std::string s = IMMEDIATE(copy(s_value));
7961     std::string rs = GPR(copy(rs_value));
7962
7963     return img::format("LBE %s, %s(%s)", rt, s, rs);
7964 }
7965
7966
7967 /*
7968  *
7969  *
7970  *   3         2         1
7971  *  10987654321098765432109876543210
7972  *  001000               x1110000101
7973  *     rt -----
7974  *          rs -----
7975  *               rd -----
7976  */
7977 std::string NMD::LBU_16_(uint64 instruction)
7978 {
7979     uint64 rt3_value = extract_rt3_9_8_7(instruction);
7980     uint64 rs3_value = extract_rs3_6_5_4(instruction);
7981     uint64 u_value = extract_u_1_0(instruction);
7982
7983     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
7984     std::string u = IMMEDIATE(copy(u_value));
7985     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
7986
7987     return img::format("LBU %s, %s(%s)", rt3, u, rs3);
7988 }
7989
7990
7991 /*
7992  *
7993  *
7994  *   3         2         1
7995  *  10987654321098765432109876543210
7996  *  001000               x1110000101
7997  *     rt -----
7998  *          rs -----
7999  *               rd -----
8000  */
8001 std::string NMD::LBU_GP_(uint64 instruction)
8002 {
8003     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8004     uint64 u_value = extract_u_17_to_0(instruction);
8005
8006     std::string rt = GPR(copy(rt_value));
8007     std::string u = IMMEDIATE(copy(u_value));
8008
8009     return img::format("LBU %s, %s($%d)", rt, u, 28);
8010 }
8011
8012
8013 /*
8014  *
8015  *
8016  *   3         2         1
8017  *  10987654321098765432109876543210
8018  *  001000               x1110000101
8019  *     rt -----
8020  *          rs -----
8021  *               rd -----
8022  */
8023 std::string NMD::LBU_S9_(uint64 instruction)
8024 {
8025     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8026     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8027     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8028
8029     std::string rt = GPR(copy(rt_value));
8030     std::string s = IMMEDIATE(copy(s_value));
8031     std::string rs = GPR(copy(rs_value));
8032
8033     return img::format("LBU %s, %s(%s)", rt, s, rs);
8034 }
8035
8036
8037 /*
8038  *
8039  *
8040  *   3         2         1
8041  *  10987654321098765432109876543210
8042  *  001000               x1110000101
8043  *     rt -----
8044  *          rs -----
8045  *               rd -----
8046  */
8047 std::string NMD::LBU_U12_(uint64 instruction)
8048 {
8049     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8050     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8051     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8052
8053     std::string rt = GPR(copy(rt_value));
8054     std::string u = IMMEDIATE(copy(u_value));
8055     std::string rs = GPR(copy(rs_value));
8056
8057     return img::format("LBU %s, %s(%s)", rt, u, rs);
8058 }
8059
8060
8061 /*
8062  *
8063  *
8064  *   3         2         1
8065  *  10987654321098765432109876543210
8066  *  001000               x1110000101
8067  *     rt -----
8068  *          rs -----
8069  *               rd -----
8070  */
8071 std::string NMD::LBUE(uint64 instruction)
8072 {
8073     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8074     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8075     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8076
8077     std::string rt = GPR(copy(rt_value));
8078     std::string s = IMMEDIATE(copy(s_value));
8079     std::string rs = GPR(copy(rs_value));
8080
8081     return img::format("LBUE %s, %s(%s)", rt, s, rs);
8082 }
8083
8084
8085 /*
8086  *
8087  *
8088  *   3         2         1
8089  *  10987654321098765432109876543210
8090  *  001000               x1110000101
8091  *     rt -----
8092  *          rs -----
8093  *               rd -----
8094  */
8095 std::string NMD::LBUX(uint64 instruction)
8096 {
8097     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8098     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8099     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8100
8101     std::string rd = GPR(copy(rd_value));
8102     std::string rs = GPR(copy(rs_value));
8103     std::string rt = GPR(copy(rt_value));
8104
8105     return img::format("LBUX %s, %s(%s)", rd, rs, rt);
8106 }
8107
8108
8109 /*
8110  *
8111  *
8112  *   3         2         1
8113  *  10987654321098765432109876543210
8114  *  001000               x1110000101
8115  *     rt -----
8116  *          rs -----
8117  *               rd -----
8118  */
8119 std::string NMD::LBX(uint64 instruction)
8120 {
8121     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8122     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8123     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8124
8125     std::string rd = GPR(copy(rd_value));
8126     std::string rs = GPR(copy(rs_value));
8127     std::string rt = GPR(copy(rt_value));
8128
8129     return img::format("LBX %s, %s(%s)", rd, rs, rt);
8130 }
8131
8132
8133 /*
8134  *
8135  *
8136  *   3         2         1
8137  *  10987654321098765432109876543210
8138  *  001000               x1110000101
8139  *     rt -----
8140  *          rs -----
8141  *               rd -----
8142  */
8143 std::string NMD::LD_GP_(uint64 instruction)
8144 {
8145     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8146     uint64 u_value = extract_u_20_to_3__s3(instruction);
8147
8148     std::string rt = GPR(copy(rt_value));
8149     std::string u = IMMEDIATE(copy(u_value));
8150
8151     return img::format("LD %s, %s($%d)", rt, u, 28);
8152 }
8153
8154
8155 /*
8156  *
8157  *
8158  *   3         2         1
8159  *  10987654321098765432109876543210
8160  *  001000               x1110000101
8161  *     rt -----
8162  *          rs -----
8163  *               rd -----
8164  */
8165 std::string NMD::LD_S9_(uint64 instruction)
8166 {
8167     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8168     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8169     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8170
8171     std::string rt = GPR(copy(rt_value));
8172     std::string s = IMMEDIATE(copy(s_value));
8173     std::string rs = GPR(copy(rs_value));
8174
8175     return img::format("LD %s, %s(%s)", rt, s, rs);
8176 }
8177
8178
8179 /*
8180  *
8181  *
8182  *   3         2         1
8183  *  10987654321098765432109876543210
8184  *  001000               x1110000101
8185  *     rt -----
8186  *          rs -----
8187  *               rd -----
8188  */
8189 std::string NMD::LD_U12_(uint64 instruction)
8190 {
8191     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8192     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8193     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8194
8195     std::string rt = GPR(copy(rt_value));
8196     std::string u = IMMEDIATE(copy(u_value));
8197     std::string rs = GPR(copy(rs_value));
8198
8199     return img::format("LD %s, %s(%s)", rt, u, rs);
8200 }
8201
8202
8203 /*
8204  *
8205  *
8206  *   3         2         1
8207  *  10987654321098765432109876543210
8208  *  001000               x1110000101
8209  *     rt -----
8210  *          rs -----
8211  *               rd -----
8212  */
8213 std::string NMD::LDC1_GP_(uint64 instruction)
8214 {
8215     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
8216     uint64 u_value = extract_u_17_to_2__s2(instruction);
8217
8218     std::string ft = FPR(copy(ft_value));
8219     std::string u = IMMEDIATE(copy(u_value));
8220
8221     return img::format("LDC1 %s, %s($%d)", ft, u, 28);
8222 }
8223
8224
8225 /*
8226  *
8227  *
8228  *   3         2         1
8229  *  10987654321098765432109876543210
8230  *  001000               x1110000101
8231  *     rt -----
8232  *          rs -----
8233  *               rd -----
8234  */
8235 std::string NMD::LDC1_S9_(uint64 instruction)
8236 {
8237     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
8238     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8239     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8240
8241     std::string ft = FPR(copy(ft_value));
8242     std::string s = IMMEDIATE(copy(s_value));
8243     std::string rs = GPR(copy(rs_value));
8244
8245     return img::format("LDC1 %s, %s(%s)", ft, s, rs);
8246 }
8247
8248
8249 /*
8250  *
8251  *
8252  *   3         2         1
8253  *  10987654321098765432109876543210
8254  *  001000               x1110000101
8255  *     rt -----
8256  *          rs -----
8257  *               rd -----
8258  */
8259 std::string NMD::LDC1_U12_(uint64 instruction)
8260 {
8261     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
8262     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8263     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8264
8265     std::string ft = FPR(copy(ft_value));
8266     std::string u = IMMEDIATE(copy(u_value));
8267     std::string rs = GPR(copy(rs_value));
8268
8269     return img::format("LDC1 %s, %s(%s)", ft, u, rs);
8270 }
8271
8272
8273 /*
8274  *
8275  *
8276  *   3         2         1
8277  *  10987654321098765432109876543210
8278  *  001000               x1110000101
8279  *     rt -----
8280  *          rs -----
8281  *               rd -----
8282  */
8283 std::string NMD::LDC1XS(uint64 instruction)
8284 {
8285     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8286     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8287     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
8288
8289     std::string ft = FPR(copy(ft_value));
8290     std::string rs = GPR(copy(rs_value));
8291     std::string rt = GPR(copy(rt_value));
8292
8293     return img::format("LDC1XS %s, %s(%s)", ft, rs, rt);
8294 }
8295
8296
8297 /*
8298  *
8299  *
8300  *   3         2         1
8301  *  10987654321098765432109876543210
8302  *  001000               x1110000101
8303  *     rt -----
8304  *          rs -----
8305  *               rd -----
8306  */
8307 std::string NMD::LDC1X(uint64 instruction)
8308 {
8309     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8310     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8311     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
8312
8313     std::string ft = FPR(copy(ft_value));
8314     std::string rs = GPR(copy(rs_value));
8315     std::string rt = GPR(copy(rt_value));
8316
8317     return img::format("LDC1X %s, %s(%s)", ft, rs, rt);
8318 }
8319
8320
8321 /*
8322  *
8323  *
8324  *   3         2         1
8325  *  10987654321098765432109876543210
8326  *  001000               x1110000101
8327  *     rt -----
8328  *          rs -----
8329  *               rd -----
8330  */
8331 std::string NMD::LDC2(uint64 instruction)
8332 {
8333     uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
8334     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8335     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8336
8337     std::string ct = CPR(copy(ct_value));
8338     std::string s = IMMEDIATE(copy(s_value));
8339     std::string rs = GPR(copy(rs_value));
8340
8341     return img::format("LDC2 %s, %s(%s)", ct, s, rs);
8342 }
8343
8344
8345 /*
8346  *
8347  *
8348  *   3         2         1
8349  *  10987654321098765432109876543210
8350  *  001000               x1110000101
8351  *     rt -----
8352  *          rs -----
8353  *               rd -----
8354  */
8355 std::string NMD::LDM(uint64 instruction)
8356 {
8357     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8358     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8359     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8360     uint64 count3_value = extract_count3_14_13_12(instruction);
8361
8362     std::string rt = GPR(copy(rt_value));
8363     std::string s = IMMEDIATE(copy(s_value));
8364     std::string rs = GPR(copy(rs_value));
8365     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
8366
8367     return img::format("LDM %s, %s(%s), %s", rt, s, rs, count3);
8368 }
8369
8370
8371 /*
8372  *
8373  *
8374  *   3         2         1
8375  *  10987654321098765432109876543210
8376  *  001000               x1110000101
8377  *     rt -----
8378  *          rs -----
8379  *               rd -----
8380  */
8381 std::string NMD::LDPC_48_(uint64 instruction)
8382 {
8383     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
8384     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
8385
8386     std::string rt = GPR(copy(rt_value));
8387     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
8388
8389     return img::format("LDPC %s, %s", rt, s);
8390 }
8391
8392
8393 /*
8394  *
8395  *
8396  *   3         2         1
8397  *  10987654321098765432109876543210
8398  *  001000               x1110000101
8399  *     rt -----
8400  *          rs -----
8401  *               rd -----
8402  */
8403 std::string NMD::LDX(uint64 instruction)
8404 {
8405     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8406     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8407     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8408
8409     std::string rd = GPR(copy(rd_value));
8410     std::string rs = GPR(copy(rs_value));
8411     std::string rt = GPR(copy(rt_value));
8412
8413     return img::format("LDX %s, %s(%s)", rd, rs, rt);
8414 }
8415
8416
8417 /*
8418  *
8419  *
8420  *   3         2         1
8421  *  10987654321098765432109876543210
8422  *  001000               x1110000101
8423  *     rt -----
8424  *          rs -----
8425  *               rd -----
8426  */
8427 std::string NMD::LDXS(uint64 instruction)
8428 {
8429     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8430     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8431     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8432
8433     std::string rd = GPR(copy(rd_value));
8434     std::string rs = GPR(copy(rs_value));
8435     std::string rt = GPR(copy(rt_value));
8436
8437     return img::format("LDXS %s, %s(%s)", rd, rs, rt);
8438 }
8439
8440
8441 /*
8442  *
8443  *
8444  *   3         2         1
8445  *  10987654321098765432109876543210
8446  *  001000               x1110000101
8447  *     rt -----
8448  *          rs -----
8449  *               rd -----
8450  */
8451 std::string NMD::LH_16_(uint64 instruction)
8452 {
8453     uint64 rt3_value = extract_rt3_9_8_7(instruction);
8454     uint64 rs3_value = extract_rs3_6_5_4(instruction);
8455     uint64 u_value = extract_u_2_1__s1(instruction);
8456
8457     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8458     std::string u = IMMEDIATE(copy(u_value));
8459     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
8460
8461     return img::format("LH %s, %s(%s)", rt3, u, rs3);
8462 }
8463
8464
8465 /*
8466  *
8467  *
8468  *   3         2         1
8469  *  10987654321098765432109876543210
8470  *  001000               x1110000101
8471  *     rt -----
8472  *          rs -----
8473  *               rd -----
8474  */
8475 std::string NMD::LH_GP_(uint64 instruction)
8476 {
8477     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8478     uint64 u_value = extract_u_17_to_1__s1(instruction);
8479
8480     std::string rt = GPR(copy(rt_value));
8481     std::string u = IMMEDIATE(copy(u_value));
8482
8483     return img::format("LH %s, %s($%d)", rt, u, 28);
8484 }
8485
8486
8487 /*
8488  *
8489  *
8490  *   3         2         1
8491  *  10987654321098765432109876543210
8492  *  001000               x1110000101
8493  *     rt -----
8494  *          rs -----
8495  *               rd -----
8496  */
8497 std::string NMD::LH_S9_(uint64 instruction)
8498 {
8499     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8500     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8501     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8502
8503     std::string rt = GPR(copy(rt_value));
8504     std::string s = IMMEDIATE(copy(s_value));
8505     std::string rs = GPR(copy(rs_value));
8506
8507     return img::format("LH %s, %s(%s)", rt, s, rs);
8508 }
8509
8510
8511 /*
8512  *
8513  *
8514  *   3         2         1
8515  *  10987654321098765432109876543210
8516  *  001000               x1110000101
8517  *     rt -----
8518  *          rs -----
8519  *               rd -----
8520  */
8521 std::string NMD::LH_U12_(uint64 instruction)
8522 {
8523     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8524     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8525     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8526
8527     std::string rt = GPR(copy(rt_value));
8528     std::string u = IMMEDIATE(copy(u_value));
8529     std::string rs = GPR(copy(rs_value));
8530
8531     return img::format("LH %s, %s(%s)", rt, u, rs);
8532 }
8533
8534
8535 /*
8536  *
8537  *
8538  *   3         2         1
8539  *  10987654321098765432109876543210
8540  *  001000               x1110000101
8541  *     rt -----
8542  *          rs -----
8543  *               rd -----
8544  */
8545 std::string NMD::LHE(uint64 instruction)
8546 {
8547     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8548     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8549     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8550
8551     std::string rt = GPR(copy(rt_value));
8552     std::string s = IMMEDIATE(copy(s_value));
8553     std::string rs = GPR(copy(rs_value));
8554
8555     return img::format("LHE %s, %s(%s)", rt, s, rs);
8556 }
8557
8558
8559 /*
8560  *
8561  *
8562  *   3         2         1
8563  *  10987654321098765432109876543210
8564  *  001000               x1110000101
8565  *     rt -----
8566  *          rs -----
8567  *               rd -----
8568  */
8569 std::string NMD::LHU_16_(uint64 instruction)
8570 {
8571     uint64 rt3_value = extract_rt3_9_8_7(instruction);
8572     uint64 rs3_value = extract_rs3_6_5_4(instruction);
8573     uint64 u_value = extract_u_2_1__s1(instruction);
8574
8575     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8576     std::string u = IMMEDIATE(copy(u_value));
8577     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
8578
8579     return img::format("LHU %s, %s(%s)", rt3, u, rs3);
8580 }
8581
8582
8583 /*
8584  *
8585  *
8586  *   3         2         1
8587  *  10987654321098765432109876543210
8588  *  001000               x1110000101
8589  *     rt -----
8590  *          rs -----
8591  *               rd -----
8592  */
8593 std::string NMD::LHU_GP_(uint64 instruction)
8594 {
8595     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8596     uint64 u_value = extract_u_17_to_1__s1(instruction);
8597
8598     std::string rt = GPR(copy(rt_value));
8599     std::string u = IMMEDIATE(copy(u_value));
8600
8601     return img::format("LHU %s, %s($%d)", rt, u, 28);
8602 }
8603
8604
8605 /*
8606  *
8607  *
8608  *   3         2         1
8609  *  10987654321098765432109876543210
8610  *  001000               x1110000101
8611  *     rt -----
8612  *          rs -----
8613  *               rd -----
8614  */
8615 std::string NMD::LHU_S9_(uint64 instruction)
8616 {
8617     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8618     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8619     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8620
8621     std::string rt = GPR(copy(rt_value));
8622     std::string s = IMMEDIATE(copy(s_value));
8623     std::string rs = GPR(copy(rs_value));
8624
8625     return img::format("LHU %s, %s(%s)", rt, s, rs);
8626 }
8627
8628
8629 /*
8630  *
8631  *
8632  *   3         2         1
8633  *  10987654321098765432109876543210
8634  *  001000               x1110000101
8635  *     rt -----
8636  *          rs -----
8637  *               rd -----
8638  */
8639 std::string NMD::LHU_U12_(uint64 instruction)
8640 {
8641     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8642     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8643     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8644
8645     std::string rt = GPR(copy(rt_value));
8646     std::string u = IMMEDIATE(copy(u_value));
8647     std::string rs = GPR(copy(rs_value));
8648
8649     return img::format("LHU %s, %s(%s)", rt, u, rs);
8650 }
8651
8652
8653 /*
8654  *
8655  *
8656  *   3         2         1
8657  *  10987654321098765432109876543210
8658  *  001000               x1110000101
8659  *     rt -----
8660  *          rs -----
8661  *               rd -----
8662  */
8663 std::string NMD::LHUE(uint64 instruction)
8664 {
8665     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8666     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8667     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8668
8669     std::string rt = GPR(copy(rt_value));
8670     std::string s = IMMEDIATE(copy(s_value));
8671     std::string rs = GPR(copy(rs_value));
8672
8673     return img::format("LHUE %s, %s(%s)", rt, s, rs);
8674 }
8675
8676
8677 /*
8678  *
8679  *
8680  *   3         2         1
8681  *  10987654321098765432109876543210
8682  *  001000               x1110000101
8683  *     rt -----
8684  *          rs -----
8685  *               rd -----
8686  */
8687 std::string NMD::LHUX(uint64 instruction)
8688 {
8689     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8690     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8691     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8692
8693     std::string rd = GPR(copy(rd_value));
8694     std::string rs = GPR(copy(rs_value));
8695     std::string rt = GPR(copy(rt_value));
8696
8697     return img::format("LHUX %s, %s(%s)", rd, rs, rt);
8698 }
8699
8700
8701 /*
8702  *
8703  *
8704  *   3         2         1
8705  *  10987654321098765432109876543210
8706  *  001000               x1110000101
8707  *     rt -----
8708  *          rs -----
8709  *               rd -----
8710  */
8711 std::string NMD::LHUXS(uint64 instruction)
8712 {
8713     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8714     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8715     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8716
8717     std::string rd = GPR(copy(rd_value));
8718     std::string rs = GPR(copy(rs_value));
8719     std::string rt = GPR(copy(rt_value));
8720
8721     return img::format("LHUXS %s, %s(%s)", rd, rs, rt);
8722 }
8723
8724
8725 /*
8726  *
8727  *
8728  *   3         2         1
8729  *  10987654321098765432109876543210
8730  *  001000               x1110000101
8731  *     rt -----
8732  *          rs -----
8733  *               rd -----
8734  */
8735 std::string NMD::LHXS(uint64 instruction)
8736 {
8737     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8738     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8739     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8740
8741     std::string rd = GPR(copy(rd_value));
8742     std::string rs = GPR(copy(rs_value));
8743     std::string rt = GPR(copy(rt_value));
8744
8745     return img::format("LHXS %s, %s(%s)", rd, rs, rt);
8746 }
8747
8748
8749 /*
8750  *
8751  *
8752  *   3         2         1
8753  *  10987654321098765432109876543210
8754  *  001000               x1110000101
8755  *     rt -----
8756  *          rs -----
8757  *               rd -----
8758  */
8759 std::string NMD::LHX(uint64 instruction)
8760 {
8761     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8762     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8763     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8764
8765     std::string rd = GPR(copy(rd_value));
8766     std::string rs = GPR(copy(rs_value));
8767     std::string rt = GPR(copy(rt_value));
8768
8769     return img::format("LHX %s, %s(%s)", rd, rs, rt);
8770 }
8771
8772
8773 /*
8774  *
8775  *
8776  *   3         2         1
8777  *  10987654321098765432109876543210
8778  *  001000               x1110000101
8779  *     rt -----
8780  *          rs -----
8781  *               rd -----
8782  */
8783 std::string NMD::LI_16_(uint64 instruction)
8784 {
8785     uint64 rt3_value = extract_rt3_9_8_7(instruction);
8786     uint64 eu_value = extract_eu_6_5_4_3_2_1_0(instruction);
8787
8788     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8789     std::string eu = IMMEDIATE(encode_eu_from_s_li16(eu_value));
8790
8791     return img::format("LI %s, %s", rt3, eu);
8792 }
8793
8794
8795 /*
8796  *
8797  *
8798  *   3         2         1
8799  *  10987654321098765432109876543210
8800  *  001000               x1110000101
8801  *     rt -----
8802  *          rs -----
8803  *               rd -----
8804  */
8805 std::string NMD::LI_48_(uint64 instruction)
8806 {
8807     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
8808     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
8809
8810     std::string rt = GPR(copy(rt_value));
8811     std::string s = IMMEDIATE(copy(s_value));
8812
8813     return img::format("LI %s, %s", rt, s);
8814 }
8815
8816
8817 /*
8818  *
8819  *
8820  *   3         2         1
8821  *  10987654321098765432109876543210
8822  *  001000               x1110000101
8823  *     rt -----
8824  *          rs -----
8825  *               rd -----
8826  */
8827 std::string NMD::LL(uint64 instruction)
8828 {
8829     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8830     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8831     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
8832
8833     std::string rt = GPR(copy(rt_value));
8834     std::string s = IMMEDIATE(copy(s_value));
8835     std::string rs = GPR(copy(rs_value));
8836
8837     return img::format("LL %s, %s(%s)", rt, s, rs);
8838 }
8839
8840
8841 /*
8842  *
8843  *
8844  *   3         2         1
8845  *  10987654321098765432109876543210
8846  *  001000               x1110000101
8847  *     rt -----
8848  *          rs -----
8849  *               rd -----
8850  */
8851 std::string NMD::LLD(uint64 instruction)
8852 {
8853     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8854     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8855     int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
8856
8857     std::string rt = GPR(copy(rt_value));
8858     std::string s = IMMEDIATE(copy(s_value));
8859     std::string rs = GPR(copy(rs_value));
8860
8861     return img::format("LLD %s, %s(%s)", rt, s, rs);
8862 }
8863
8864
8865 /*
8866  *
8867  *
8868  *   3         2         1
8869  *  10987654321098765432109876543210
8870  *  001000               x1110000101
8871  *     rt -----
8872  *          rs -----
8873  *               rd -----
8874  */
8875 std::string NMD::LLDP(uint64 instruction)
8876 {
8877     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8878     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8879     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
8880
8881     std::string rt = GPR(copy(rt_value));
8882     std::string ru = GPR(copy(ru_value));
8883     std::string rs = GPR(copy(rs_value));
8884
8885     return img::format("LLDP %s, %s, (%s)", rt, ru, rs);
8886 }
8887
8888
8889 /*
8890  *
8891  *
8892  *   3         2         1
8893  *  10987654321098765432109876543210
8894  *  001000               x1110000101
8895  *     rt -----
8896  *          rs -----
8897  *               rd -----
8898  */
8899 std::string NMD::LLE(uint64 instruction)
8900 {
8901     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8902     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8903     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
8904
8905     std::string rt = GPR(copy(rt_value));
8906     std::string s = IMMEDIATE(copy(s_value));
8907     std::string rs = GPR(copy(rs_value));
8908
8909     return img::format("LLE %s, %s(%s)", rt, s, rs);
8910 }
8911
8912
8913 /*
8914  *
8915  *
8916  *   3         2         1
8917  *  10987654321098765432109876543210
8918  *  001000               x1110000101
8919  *     rt -----
8920  *          rs -----
8921  *               rd -----
8922  */
8923 std::string NMD::LLWP(uint64 instruction)
8924 {
8925     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8926     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8927     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
8928
8929     std::string rt = GPR(copy(rt_value));
8930     std::string ru = GPR(copy(ru_value));
8931     std::string rs = GPR(copy(rs_value));
8932
8933     return img::format("LLWP %s, %s, (%s)", rt, ru, rs);
8934 }
8935
8936
8937 /*
8938  *
8939  *
8940  *   3         2         1
8941  *  10987654321098765432109876543210
8942  *  001000               x1110000101
8943  *     rt -----
8944  *          rs -----
8945  *               rd -----
8946  */
8947 std::string NMD::LLWPE(uint64 instruction)
8948 {
8949     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8950     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8951     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
8952
8953     std::string rt = GPR(copy(rt_value));
8954     std::string ru = GPR(copy(ru_value));
8955     std::string rs = GPR(copy(rs_value));
8956
8957     return img::format("LLWPE %s, %s, (%s)", rt, ru, rs);
8958 }
8959
8960
8961 /*
8962  *
8963  *
8964  *   3         2         1
8965  *  10987654321098765432109876543210
8966  *  001000               x1110000101
8967  *     rt -----
8968  *          rs -----
8969  *               rd -----
8970  */
8971 std::string NMD::LSA(uint64 instruction)
8972 {
8973     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8974     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8975     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8976     uint64 u2_value = extract_u2_10_9(instruction);
8977
8978     std::string rd = GPR(copy(rd_value));
8979     std::string rs = GPR(copy(rs_value));
8980     std::string rt = GPR(copy(rt_value));
8981     std::string u2 = IMMEDIATE(copy(u2_value));
8982
8983     return img::format("LSA %s, %s, %s, %s", rd, rs, rt, u2);
8984 }
8985
8986
8987 /*
8988  *
8989  *
8990  *   3         2         1
8991  *  10987654321098765432109876543210
8992  *  001000               x1110000101
8993  *     rt -----
8994  *          rs -----
8995  *               rd -----
8996  */
8997 std::string NMD::LUI(uint64 instruction)
8998 {
8999     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9000     int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction);
9001
9002     std::string rt = GPR(copy(rt_value));
9003     std::string s = IMMEDIATE(copy(s_value));
9004
9005     return img::format("LUI %s, %%hi(%s)", rt, s);
9006 }
9007
9008
9009 /*
9010  *
9011  *
9012  *   3         2         1
9013  *  10987654321098765432109876543210
9014  *  001000               x1110000101
9015  *     rt -----
9016  *          rs -----
9017  *               rd -----
9018  */
9019 std::string NMD::LW_16_(uint64 instruction)
9020 {
9021     uint64 rt3_value = extract_rt3_9_8_7(instruction);
9022     uint64 rs3_value = extract_rs3_6_5_4(instruction);
9023     uint64 u_value = extract_u_3_2_1_0__s2(instruction);
9024
9025     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
9026     std::string u = IMMEDIATE(copy(u_value));
9027     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
9028
9029     return img::format("LW %s, %s(%s)", rt3, u, rs3);
9030 }
9031
9032
9033 /*
9034  *
9035  *
9036  *   3         2         1
9037  *  10987654321098765432109876543210
9038  *  001000               x1110000101
9039  *     rt -----
9040  *          rs -----
9041  *               rd -----
9042  */
9043 std::string NMD::LW_4X4_(uint64 instruction)
9044 {
9045     uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
9046     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
9047     uint64 u_value = extract_u_3_8__s2(instruction);
9048
9049     std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
9050     std::string u = IMMEDIATE(copy(u_value));
9051     std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
9052
9053     return img::format("LW %s, %s(%s)", rt4, u, rs4);
9054 }
9055
9056
9057 /*
9058  *
9059  *
9060  *   3         2         1
9061  *  10987654321098765432109876543210
9062  *  001000               x1110000101
9063  *     rt -----
9064  *          rs -----
9065  *               rd -----
9066  */
9067 std::string NMD::LW_GP_(uint64 instruction)
9068 {
9069     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9070     uint64 u_value = extract_u_20_to_2__s2(instruction);
9071
9072     std::string rt = GPR(copy(rt_value));
9073     std::string u = IMMEDIATE(copy(u_value));
9074
9075     return img::format("LW %s, %s($%d)", rt, u, 28);
9076 }
9077
9078
9079 /*
9080  *
9081  *
9082  *   3         2         1
9083  *  10987654321098765432109876543210
9084  *  001000               x1110000101
9085  *     rt -----
9086  *          rs -----
9087  *               rd -----
9088  */
9089 std::string NMD::LW_GP16_(uint64 instruction)
9090 {
9091     uint64 rt3_value = extract_rt3_9_8_7(instruction);
9092     uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
9093
9094     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
9095     std::string u = IMMEDIATE(copy(u_value));
9096
9097     return img::format("LW %s, %s($%d)", rt3, u, 28);
9098 }
9099
9100
9101 /*
9102  *
9103  *
9104  *   3         2         1
9105  *  10987654321098765432109876543210
9106  *  001000               x1110000101
9107  *     rt -----
9108  *          rs -----
9109  *               rd -----
9110  */
9111 std::string NMD::LW_S9_(uint64 instruction)
9112 {
9113     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9114     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9115     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9116
9117     std::string rt = GPR(copy(rt_value));
9118     std::string s = IMMEDIATE(copy(s_value));
9119     std::string rs = GPR(copy(rs_value));
9120
9121     return img::format("LW %s, %s(%s)", rt, s, rs);
9122 }
9123
9124
9125 /*
9126  *
9127  *
9128  *   3         2         1
9129  *  10987654321098765432109876543210
9130  *  001000               x1110000101
9131  *     rt -----
9132  *          rs -----
9133  *               rd -----
9134  */
9135 std::string NMD::LW_SP_(uint64 instruction)
9136 {
9137     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
9138     uint64 u_value = extract_u_4_3_2_1_0__s2(instruction);
9139
9140     std::string rt = GPR(copy(rt_value));
9141     std::string u = IMMEDIATE(copy(u_value));
9142
9143     return img::format("LW %s, %s($%d)", rt, u, 29);
9144 }
9145
9146
9147 /*
9148  *
9149  *
9150  *   3         2         1
9151  *  10987654321098765432109876543210
9152  *  001000               x1110000101
9153  *     rt -----
9154  *          rs -----
9155  *               rd -----
9156  */
9157 std::string NMD::LW_U12_(uint64 instruction)
9158 {
9159     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9160     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9161     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
9162
9163     std::string rt = GPR(copy(rt_value));
9164     std::string u = IMMEDIATE(copy(u_value));
9165     std::string rs = GPR(copy(rs_value));
9166
9167     return img::format("LW %s, %s(%s)", rt, u, rs);
9168 }
9169
9170
9171 /*
9172  *
9173  *
9174  *   3         2         1
9175  *  10987654321098765432109876543210
9176  *  001000               x1110000101
9177  *     rt -----
9178  *          rs -----
9179  *               rd -----
9180  */
9181 std::string NMD::LWC1_GP_(uint64 instruction)
9182 {
9183     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9184     uint64 u_value = extract_u_17_to_2__s2(instruction);
9185
9186     std::string ft = FPR(copy(ft_value));
9187     std::string u = IMMEDIATE(copy(u_value));
9188
9189     return img::format("LWC1 %s, %s($%d)", ft, u, 28);
9190 }
9191
9192
9193 /*
9194  *
9195  *
9196  *   3         2         1
9197  *  10987654321098765432109876543210
9198  *  001000               x1110000101
9199  *     rt -----
9200  *          rs -----
9201  *               rd -----
9202  */
9203 std::string NMD::LWC1_S9_(uint64 instruction)
9204 {
9205     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9206     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9207     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9208
9209     std::string ft = FPR(copy(ft_value));
9210     std::string s = IMMEDIATE(copy(s_value));
9211     std::string rs = GPR(copy(rs_value));
9212
9213     return img::format("LWC1 %s, %s(%s)", ft, s, rs);
9214 }
9215
9216
9217 /*
9218  *
9219  *
9220  *   3         2         1
9221  *  10987654321098765432109876543210
9222  *  001000               x1110000101
9223  *     rt -----
9224  *          rs -----
9225  *               rd -----
9226  */
9227 std::string NMD::LWC1_U12_(uint64 instruction)
9228 {
9229     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9230     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9231     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
9232
9233     std::string ft = FPR(copy(ft_value));
9234     std::string u = IMMEDIATE(copy(u_value));
9235     std::string rs = GPR(copy(rs_value));
9236
9237     return img::format("LWC1 %s, %s(%s)", ft, u, rs);
9238 }
9239
9240
9241 /*
9242  *
9243  *
9244  *   3         2         1
9245  *  10987654321098765432109876543210
9246  *  001000               x1110000101
9247  *     rt -----
9248  *          rs -----
9249  *               rd -----
9250  */
9251 std::string NMD::LWC1X(uint64 instruction)
9252 {
9253     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9254     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9255     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
9256
9257     std::string ft = FPR(copy(ft_value));
9258     std::string rs = GPR(copy(rs_value));
9259     std::string rt = GPR(copy(rt_value));
9260
9261     return img::format("LWC1X %s, %s(%s)", ft, rs, rt);
9262 }
9263
9264
9265 /*
9266  *
9267  *
9268  *   3         2         1
9269  *  10987654321098765432109876543210
9270  *  001000               x1110000101
9271  *     rt -----
9272  *          rs -----
9273  *               rd -----
9274  */
9275 std::string NMD::LWC1XS(uint64 instruction)
9276 {
9277     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9278     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9279     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
9280
9281     std::string ft = FPR(copy(ft_value));
9282     std::string rs = GPR(copy(rs_value));
9283     std::string rt = GPR(copy(rt_value));
9284
9285     return img::format("LWC1XS %s, %s(%s)", ft, rs, rt);
9286 }
9287
9288
9289 /*
9290  *
9291  *
9292  *   3         2         1
9293  *  10987654321098765432109876543210
9294  *  001000               x1110000101
9295  *     rt -----
9296  *          rs -----
9297  *               rd -----
9298  */
9299 std::string NMD::LWC2(uint64 instruction)
9300 {
9301     uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
9302     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9303     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9304
9305     std::string ct = CPR(copy(ct_value));
9306     std::string s = IMMEDIATE(copy(s_value));
9307     std::string rs = GPR(copy(rs_value));
9308
9309     return img::format("LWC2 %s, %s(%s)", ct, s, rs);
9310 }
9311
9312
9313 /*
9314  *
9315  *
9316  *   3         2         1
9317  *  10987654321098765432109876543210
9318  *  001000               x1110000101
9319  *     rt -----
9320  *          rs -----
9321  *               rd -----
9322  */
9323 std::string NMD::LWE(uint64 instruction)
9324 {
9325     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9326     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9327     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9328
9329     std::string rt = GPR(copy(rt_value));
9330     std::string s = IMMEDIATE(copy(s_value));
9331     std::string rs = GPR(copy(rs_value));
9332
9333     return img::format("LWE %s, %s(%s)", rt, s, rs);
9334 }
9335
9336
9337 /*
9338  *
9339  *
9340  *   3         2         1
9341  *  10987654321098765432109876543210
9342  *  001000               x1110000101
9343  *     rt -----
9344  *          rs -----
9345  *               rd -----
9346  */
9347 std::string NMD::LWM(uint64 instruction)
9348 {
9349     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9350     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9351     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9352     uint64 count3_value = extract_count3_14_13_12(instruction);
9353
9354     std::string rt = GPR(copy(rt_value));
9355     std::string s = IMMEDIATE(copy(s_value));
9356     std::string rs = GPR(copy(rs_value));
9357     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
9358
9359     return img::format("LWM %s, %s(%s), %s", rt, s, rs, count3);
9360 }
9361
9362
9363 /*
9364  *
9365  *
9366  *   3         2         1
9367  *  10987654321098765432109876543210
9368  *  001000               x1110000101
9369  *     rt -----
9370  *          rs -----
9371  *               rd -----
9372  */
9373 std::string NMD::LWPC_48_(uint64 instruction)
9374 {
9375     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
9376     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
9377
9378     std::string rt = GPR(copy(rt_value));
9379     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
9380
9381     return img::format("LWPC %s, %s", rt, s);
9382 }
9383
9384
9385 /*
9386  *
9387  *
9388  *   3         2         1
9389  *  10987654321098765432109876543210
9390  *  001000               x1110000101
9391  *     rt -----
9392  *          rs -----
9393  *               rd -----
9394  */
9395 std::string NMD::LWU_GP_(uint64 instruction)
9396 {
9397     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9398     uint64 u_value = extract_u_17_to_2__s2(instruction);
9399
9400     std::string rt = GPR(copy(rt_value));
9401     std::string u = IMMEDIATE(copy(u_value));
9402
9403     return img::format("LWU %s, %s($%d)", rt, u, 28);
9404 }
9405
9406
9407 /*
9408  *
9409  *
9410  *   3         2         1
9411  *  10987654321098765432109876543210
9412  *  001000               x1110000101
9413  *     rt -----
9414  *          rs -----
9415  *               rd -----
9416  */
9417 std::string NMD::LWU_S9_(uint64 instruction)
9418 {
9419     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9420     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9421     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9422
9423     std::string rt = GPR(copy(rt_value));
9424     std::string s = IMMEDIATE(copy(s_value));
9425     std::string rs = GPR(copy(rs_value));
9426
9427     return img::format("LWU %s, %s(%s)", rt, s, rs);
9428 }
9429
9430
9431 /*
9432  *
9433  *
9434  *   3         2         1
9435  *  10987654321098765432109876543210
9436  *  001000               x1110000101
9437  *     rt -----
9438  *          rs -----
9439  *               rd -----
9440  */
9441 std::string NMD::LWU_U12_(uint64 instruction)
9442 {
9443     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9444     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9445     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
9446
9447     std::string rt = GPR(copy(rt_value));
9448     std::string u = IMMEDIATE(copy(u_value));
9449     std::string rs = GPR(copy(rs_value));
9450
9451     return img::format("LWU %s, %s(%s)", rt, u, rs);
9452 }
9453
9454
9455 /*
9456  *
9457  *
9458  *   3         2         1
9459  *  10987654321098765432109876543210
9460  *  001000               x1110000101
9461  *     rt -----
9462  *          rs -----
9463  *               rd -----
9464  */
9465 std::string NMD::LWUX(uint64 instruction)
9466 {
9467     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9468     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9469     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9470
9471     std::string rd = GPR(copy(rd_value));
9472     std::string rs = GPR(copy(rs_value));
9473     std::string rt = GPR(copy(rt_value));
9474
9475     return img::format("LWUX %s, %s(%s)", rd, rs, rt);
9476 }
9477
9478
9479 /*
9480  *
9481  *
9482  *   3         2         1
9483  *  10987654321098765432109876543210
9484  *  001000               x1110000101
9485  *     rt -----
9486  *          rs -----
9487  *               rd -----
9488  */
9489 std::string NMD::LWUXS(uint64 instruction)
9490 {
9491     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9492     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9493     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9494
9495     std::string rd = GPR(copy(rd_value));
9496     std::string rs = GPR(copy(rs_value));
9497     std::string rt = GPR(copy(rt_value));
9498
9499     return img::format("LWUXS %s, %s(%s)", rd, rs, rt);
9500 }
9501
9502
9503 /*
9504  *
9505  *
9506  *   3         2         1
9507  *  10987654321098765432109876543210
9508  *  001000               x1110000101
9509  *     rt -----
9510  *          rs -----
9511  *               rd -----
9512  */
9513 std::string NMD::LWX(uint64 instruction)
9514 {
9515     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9516     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9517     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9518
9519     std::string rd = GPR(copy(rd_value));
9520     std::string rs = GPR(copy(rs_value));
9521     std::string rt = GPR(copy(rt_value));
9522
9523     return img::format("LWX %s, %s(%s)", rd, rs, rt);
9524 }
9525
9526
9527 /*
9528  *
9529  *
9530  *   3         2         1
9531  *  10987654321098765432109876543210
9532  *  001000               x1110000101
9533  *     rt -----
9534  *          rs -----
9535  *               rd -----
9536  */
9537 std::string NMD::LWXS_16_(uint64 instruction)
9538 {
9539     uint64 rt3_value = extract_rt3_9_8_7(instruction);
9540     uint64 rs3_value = extract_rs3_6_5_4(instruction);
9541     uint64 rd3_value = extract_rd3_3_2_1(instruction);
9542
9543     std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
9544     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
9545     std::string rt3 = IMMEDIATE(decode_gpr_gpr3(rt3_value));
9546
9547     return img::format("LWXS %s, %s(%s)", rd3, rs3, rt3);
9548 }
9549
9550
9551 /*
9552  *
9553  *
9554  *   3         2         1
9555  *  10987654321098765432109876543210
9556  *  001000               x1110000101
9557  *     rt -----
9558  *          rs -----
9559  *               rd -----
9560  */
9561 std::string NMD::LWXS_32_(uint64 instruction)
9562 {
9563     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9564     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9565     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9566
9567     std::string rd = GPR(copy(rd_value));
9568     std::string rs = GPR(copy(rs_value));
9569     std::string rt = GPR(copy(rt_value));
9570
9571     return img::format("LWXS %s, %s(%s)", rd, rs, rt);
9572 }
9573
9574
9575 /*
9576  *
9577  *
9578  *   3         2         1
9579  *  10987654321098765432109876543210
9580  *  001000               x1110000101
9581  *     rt -----
9582  *          rs -----
9583  *               rd -----
9584  */
9585 std::string NMD::MADD_DSP_(uint64 instruction)
9586 {
9587     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9588     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9589     uint64 ac_value = extract_ac_13_12(instruction);
9590
9591     std::string ac = AC(copy(ac_value));
9592     std::string rs = GPR(copy(rs_value));
9593     std::string rt = GPR(copy(rt_value));
9594
9595     return img::format("MADD %s, %s, %s", ac, rs, rt);
9596 }
9597
9598
9599 /*
9600  *
9601  *
9602  *   3         2         1
9603  *  10987654321098765432109876543210
9604  *  001000               x1110000101
9605  *     rt -----
9606  *          rs -----
9607  *               rd -----
9608  */
9609 std::string NMD::MADDF_D(uint64 instruction)
9610 {
9611     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9612     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9613     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9614
9615     std::string fd = FPR(copy(fd_value));
9616     std::string fs = FPR(copy(fs_value));
9617     std::string ft = FPR(copy(ft_value));
9618
9619     return img::format("MADDF.D %s, %s, %s", fd, fs, ft);
9620 }
9621
9622
9623 /*
9624  *
9625  *
9626  *   3         2         1
9627  *  10987654321098765432109876543210
9628  *  001000               x1110000101
9629  *     rt -----
9630  *          rs -----
9631  *               rd -----
9632  */
9633 std::string NMD::MADDF_S(uint64 instruction)
9634 {
9635     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9636     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9637     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9638
9639     std::string fd = FPR(copy(fd_value));
9640     std::string fs = FPR(copy(fs_value));
9641     std::string ft = FPR(copy(ft_value));
9642
9643     return img::format("MADDF.S %s, %s, %s", fd, fs, ft);
9644 }
9645
9646
9647 /*
9648  *
9649  *
9650  *   3         2         1
9651  *  10987654321098765432109876543210
9652  *  001000               x1110000101
9653  *     rt -----
9654  *          rs -----
9655  *               rd -----
9656  */
9657 std::string NMD::MADDU_DSP_(uint64 instruction)
9658 {
9659     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9660     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9661     uint64 ac_value = extract_ac_13_12(instruction);
9662
9663     std::string ac = AC(copy(ac_value));
9664     std::string rs = GPR(copy(rs_value));
9665     std::string rt = GPR(copy(rt_value));
9666
9667     return img::format("MADDU %s, %s, %s", ac, rs, rt);
9668 }
9669
9670
9671 /*
9672  *
9673  *
9674  *   3         2         1
9675  *  10987654321098765432109876543210
9676  *  001000               x1110000101
9677  *     rt -----
9678  *          rs -----
9679  *               rd -----
9680  */
9681 std::string NMD::MAQ_S_W_PHL(uint64 instruction)
9682 {
9683     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9684     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9685     uint64 ac_value = extract_ac_13_12(instruction);
9686
9687     std::string ac = AC(copy(ac_value));
9688     std::string rs = GPR(copy(rs_value));
9689     std::string rt = GPR(copy(rt_value));
9690
9691     return img::format("MAQ_S.W.PHL %s, %s, %s", ac, rs, rt);
9692 }
9693
9694
9695 /*
9696  *
9697  *
9698  *   3         2         1
9699  *  10987654321098765432109876543210
9700  *  001000               x1110000101
9701  *     rt -----
9702  *          rs -----
9703  *               rd -----
9704  */
9705 std::string NMD::MAQ_S_W_PHR(uint64 instruction)
9706 {
9707     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9708     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9709     uint64 ac_value = extract_ac_13_12(instruction);
9710
9711     std::string ac = AC(copy(ac_value));
9712     std::string rs = GPR(copy(rs_value));
9713     std::string rt = GPR(copy(rt_value));
9714
9715     return img::format("MAQ_S.W.PHR %s, %s, %s", ac, rs, rt);
9716 }
9717
9718
9719 /*
9720  *
9721  *
9722  *   3         2         1
9723  *  10987654321098765432109876543210
9724  *  001000               x1110000101
9725  *     rt -----
9726  *          rs -----
9727  *               rd -----
9728  */
9729 std::string NMD::MAQ_SA_W_PHL(uint64 instruction)
9730 {
9731     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9732     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9733     uint64 ac_value = extract_ac_13_12(instruction);
9734
9735     std::string ac = AC(copy(ac_value));
9736     std::string rs = GPR(copy(rs_value));
9737     std::string rt = GPR(copy(rt_value));
9738
9739     return img::format("MAQ_SA.W.PHL %s, %s, %s", ac, rs, rt);
9740 }
9741
9742
9743 /*
9744  *
9745  *
9746  *   3         2         1
9747  *  10987654321098765432109876543210
9748  *  001000               x1110000101
9749  *     rt -----
9750  *          rs -----
9751  *               rd -----
9752  */
9753 std::string NMD::MAQ_SA_W_PHR(uint64 instruction)
9754 {
9755     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9756     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9757     uint64 ac_value = extract_ac_13_12(instruction);
9758
9759     std::string ac = AC(copy(ac_value));
9760     std::string rs = GPR(copy(rs_value));
9761     std::string rt = GPR(copy(rt_value));
9762
9763     return img::format("MAQ_SA.W.PHR %s, %s, %s", ac, rs, rt);
9764 }
9765
9766
9767 /*
9768  *
9769  *
9770  *   3         2         1
9771  *  10987654321098765432109876543210
9772  *  001000               x1110000101
9773  *     rt -----
9774  *          rs -----
9775  *               rd -----
9776  */
9777 std::string NMD::MAX_D(uint64 instruction)
9778 {
9779     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9780     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9781     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9782
9783     std::string fd = FPR(copy(fd_value));
9784     std::string fs = FPR(copy(fs_value));
9785     std::string ft = FPR(copy(ft_value));
9786
9787     return img::format("MAX.D %s, %s, %s", fd, fs, ft);
9788 }
9789
9790
9791 /*
9792  *
9793  *
9794  *   3         2         1
9795  *  10987654321098765432109876543210
9796  *  001000               x1110000101
9797  *     rt -----
9798  *          rs -----
9799  *               rd -----
9800  */
9801 std::string NMD::MAX_S(uint64 instruction)
9802 {
9803     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9804     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9805     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9806
9807     std::string fd = FPR(copy(fd_value));
9808     std::string fs = FPR(copy(fs_value));
9809     std::string ft = FPR(copy(ft_value));
9810
9811     return img::format("MAX.S %s, %s, %s", fd, fs, ft);
9812 }
9813
9814
9815 /*
9816  *
9817  *
9818  *   3         2         1
9819  *  10987654321098765432109876543210
9820  *  001000               x1110000101
9821  *     rt -----
9822  *          rs -----
9823  *               rd -----
9824  */
9825 std::string NMD::MAXA_D(uint64 instruction)
9826 {
9827     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9828     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9829     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9830
9831     std::string fd = FPR(copy(fd_value));
9832     std::string fs = FPR(copy(fs_value));
9833     std::string ft = FPR(copy(ft_value));
9834
9835     return img::format("MAXA.D %s, %s, %s", fd, fs, ft);
9836 }
9837
9838
9839 /*
9840  *
9841  *
9842  *   3         2         1
9843  *  10987654321098765432109876543210
9844  *  001000               x1110000101
9845  *     rt -----
9846  *          rs -----
9847  *               rd -----
9848  */
9849 std::string NMD::MAXA_S(uint64 instruction)
9850 {
9851     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9852     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9853     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9854
9855     std::string fd = FPR(copy(fd_value));
9856     std::string fs = FPR(copy(fs_value));
9857     std::string ft = FPR(copy(ft_value));
9858
9859     return img::format("MAXA.S %s, %s, %s", fd, fs, ft);
9860 }
9861
9862
9863 /*
9864  *
9865  *
9866  *   3         2         1
9867  *  10987654321098765432109876543210
9868  *  001000               x1110000101
9869  *     rt -----
9870  *          rs -----
9871  *               rd -----
9872  */
9873 std::string NMD::MFC0(uint64 instruction)
9874 {
9875     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9876     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
9877     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
9878
9879     std::string rt = GPR(copy(rt_value));
9880     std::string c0s = CPR(copy(c0s_value));
9881     std::string sel = IMMEDIATE(copy(sel_value));
9882
9883     return img::format("MFC0 %s, %s, %s", rt, c0s, sel);
9884 }
9885
9886
9887 /*
9888  *
9889  *
9890  *   3         2         1
9891  *  10987654321098765432109876543210
9892  *  001000               x1110000101
9893  *     rt -----
9894  *          rs -----
9895  *               rd -----
9896  */
9897 std::string NMD::MFC1(uint64 instruction)
9898 {
9899     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9900     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9901
9902     std::string rt = GPR(copy(rt_value));
9903     std::string fs = FPR(copy(fs_value));
9904
9905     return img::format("MFC1 %s, %s", rt, fs);
9906 }
9907
9908
9909 /*
9910  *
9911  *
9912  *   3         2         1
9913  *  10987654321098765432109876543210
9914  *  001000               x1110000101
9915  *     rt -----
9916  *          rs -----
9917  *               rd -----
9918  */
9919 std::string NMD::MFC2(uint64 instruction)
9920 {
9921     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9922     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
9923
9924     std::string rt = GPR(copy(rt_value));
9925     std::string cs = CPR(copy(cs_value));
9926
9927     return img::format("MFC2 %s, %s", rt, cs);
9928 }
9929
9930
9931 /*
9932  *
9933  *
9934  *   3         2         1
9935  *  10987654321098765432109876543210
9936  *  001000               x1110000101
9937  *     rt -----
9938  *          rs -----
9939  *               rd -----
9940  */
9941 std::string NMD::MFGC0(uint64 instruction)
9942 {
9943     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9944     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
9945     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
9946
9947     std::string rt = GPR(copy(rt_value));
9948     std::string c0s = CPR(copy(c0s_value));
9949     std::string sel = IMMEDIATE(copy(sel_value));
9950
9951     return img::format("MFGC0 %s, %s, %s", rt, c0s, sel);
9952 }
9953
9954
9955 /*
9956  *
9957  *
9958  *   3         2         1
9959  *  10987654321098765432109876543210
9960  *  001000               x1110000101
9961  *     rt -----
9962  *          rs -----
9963  *               rd -----
9964  */
9965 std::string NMD::MFHC0(uint64 instruction)
9966 {
9967     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9968     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
9969     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
9970
9971     std::string rt = GPR(copy(rt_value));
9972     std::string c0s = CPR(copy(c0s_value));
9973     std::string sel = IMMEDIATE(copy(sel_value));
9974
9975     return img::format("MFHC0 %s, %s, %s", rt, c0s, sel);
9976 }
9977
9978
9979 /*
9980  *
9981  *
9982  *   3         2         1
9983  *  10987654321098765432109876543210
9984  *  001000               x1110000101
9985  *     rt -----
9986  *          rs -----
9987  *               rd -----
9988  */
9989 std::string NMD::MFHC1(uint64 instruction)
9990 {
9991     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9992     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9993
9994     std::string rt = GPR(copy(rt_value));
9995     std::string fs = FPR(copy(fs_value));
9996
9997     return img::format("MFHC1 %s, %s", rt, fs);
9998 }
9999
10000
10001 /*
10002  *
10003  *
10004  *   3         2         1
10005  *  10987654321098765432109876543210
10006  *  001000               x1110000101
10007  *     rt -----
10008  *          rs -----
10009  *               rd -----
10010  */
10011 std::string NMD::MFHC2(uint64 instruction)
10012 {
10013     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10014     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10015
10016     std::string rt = GPR(copy(rt_value));
10017     std::string cs = CPR(copy(cs_value));
10018
10019     return img::format("MFHC2 %s, %s", rt, cs);
10020 }
10021
10022
10023 /*
10024  *
10025  *
10026  *   3         2         1
10027  *  10987654321098765432109876543210
10028  *  001000               x1110000101
10029  *     rt -----
10030  *          rs -----
10031  *               rd -----
10032  */
10033 std::string NMD::MFHGC0(uint64 instruction)
10034 {
10035     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10036     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10037     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10038
10039     std::string rt = GPR(copy(rt_value));
10040     std::string c0s = CPR(copy(c0s_value));
10041     std::string sel = IMMEDIATE(copy(sel_value));
10042
10043     return img::format("MFHGC0 %s, %s, %s", rt, c0s, sel);
10044 }
10045
10046
10047 /*
10048  *
10049  *
10050  *   3         2         1
10051  *  10987654321098765432109876543210
10052  *  001000               x1110000101
10053  *     rt -----
10054  *          rs -----
10055  *               rd -----
10056  */
10057 std::string NMD::MFHI_DSP_(uint64 instruction)
10058 {
10059     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10060     uint64 ac_value = extract_ac_13_12(instruction);
10061
10062     std::string rt = GPR(copy(rt_value));
10063     std::string ac = AC(copy(ac_value));
10064
10065     return img::format("MFHI %s, %s", rt, ac);
10066 }
10067
10068
10069 /*
10070  *
10071  *
10072  *   3         2         1
10073  *  10987654321098765432109876543210
10074  *  001000               x1110000101
10075  *     rt -----
10076  *          rs -----
10077  *               rd -----
10078  */
10079 std::string NMD::MFHTR(uint64 instruction)
10080 {
10081     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10082     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10083     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10084     uint64 u_value = extract_u_10(instruction);
10085
10086     std::string rt = GPR(copy(rt_value));
10087     std::string c0s = IMMEDIATE(copy(c0s_value));
10088     std::string u = IMMEDIATE(copy(u_value));
10089     std::string sel = IMMEDIATE(copy(sel_value));
10090
10091     return img::format("MFHTR %s, %s, %s, %s", rt, c0s, u, sel);
10092 }
10093
10094
10095 /*
10096  *
10097  *
10098  *   3         2         1
10099  *  10987654321098765432109876543210
10100  *  001000               x1110000101
10101  *     rt -----
10102  *          rs -----
10103  *               rd -----
10104  */
10105 std::string NMD::MFLO_DSP_(uint64 instruction)
10106 {
10107     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10108     uint64 ac_value = extract_ac_13_12(instruction);
10109
10110     std::string rt = GPR(copy(rt_value));
10111     std::string ac = AC(copy(ac_value));
10112
10113     return img::format("MFLO %s, %s", rt, ac);
10114 }
10115
10116
10117 /*
10118  *
10119  *
10120  *   3         2         1
10121  *  10987654321098765432109876543210
10122  *  001000               x1110000101
10123  *     rt -----
10124  *          rs -----
10125  *               rd -----
10126  */
10127 std::string NMD::MFTR(uint64 instruction)
10128 {
10129     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10130     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10131     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10132     uint64 u_value = extract_u_10(instruction);
10133
10134     std::string rt = GPR(copy(rt_value));
10135     std::string c0s = IMMEDIATE(copy(c0s_value));
10136     std::string u = IMMEDIATE(copy(u_value));
10137     std::string sel = IMMEDIATE(copy(sel_value));
10138
10139     return img::format("MFTR %s, %s, %s, %s", rt, c0s, u, sel);
10140 }
10141
10142
10143 /*
10144  *
10145  *
10146  *   3         2         1
10147  *  10987654321098765432109876543210
10148  *  001000               x1110000101
10149  *     rt -----
10150  *          rs -----
10151  *               rd -----
10152  */
10153 std::string NMD::MIN_D(uint64 instruction)
10154 {
10155     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10156     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10157     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10158
10159     std::string fd = FPR(copy(fd_value));
10160     std::string fs = FPR(copy(fs_value));
10161     std::string ft = FPR(copy(ft_value));
10162
10163     return img::format("MIN.D %s, %s, %s", fd, fs, ft);
10164 }
10165
10166
10167 /*
10168  *
10169  *
10170  *   3         2         1
10171  *  10987654321098765432109876543210
10172  *  001000               x1110000101
10173  *     rt -----
10174  *          rs -----
10175  *               rd -----
10176  */
10177 std::string NMD::MIN_S(uint64 instruction)
10178 {
10179     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10180     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10181     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10182
10183     std::string fd = FPR(copy(fd_value));
10184     std::string fs = FPR(copy(fs_value));
10185     std::string ft = FPR(copy(ft_value));
10186
10187     return img::format("MIN.S %s, %s, %s", fd, fs, ft);
10188 }
10189
10190
10191 /*
10192  *
10193  *
10194  *   3         2         1
10195  *  10987654321098765432109876543210
10196  *  001000               x1110000101
10197  *     rt -----
10198  *          rs -----
10199  *               rd -----
10200  */
10201 std::string NMD::MINA_D(uint64 instruction)
10202 {
10203     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10204     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10205     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10206
10207     std::string fd = FPR(copy(fd_value));
10208     std::string fs = FPR(copy(fs_value));
10209     std::string ft = FPR(copy(ft_value));
10210
10211     return img::format("MINA.D %s, %s, %s", fd, fs, ft);
10212 }
10213
10214
10215 /*
10216  *
10217  *
10218  *   3         2         1
10219  *  10987654321098765432109876543210
10220  *  001000               x1110000101
10221  *     rt -----
10222  *          rs -----
10223  *               rd -----
10224  */
10225 std::string NMD::MINA_S(uint64 instruction)
10226 {
10227     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10228     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10229     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10230
10231     std::string fd = FPR(copy(fd_value));
10232     std::string fs = FPR(copy(fs_value));
10233     std::string ft = FPR(copy(ft_value));
10234
10235     return img::format("MINA.S %s, %s, %s", fd, fs, ft);
10236 }
10237
10238
10239 /*
10240  *
10241  *
10242  *   3         2         1
10243  *  10987654321098765432109876543210
10244  *  001000               x1110000101
10245  *     rt -----
10246  *          rs -----
10247  *               rd -----
10248  */
10249 std::string NMD::MOD(uint64 instruction)
10250 {
10251     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10252     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10253     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10254
10255     std::string rd = GPR(copy(rd_value));
10256     std::string rs = GPR(copy(rs_value));
10257     std::string rt = GPR(copy(rt_value));
10258
10259     return img::format("MOD %s, %s, %s", rd, rs, rt);
10260 }
10261
10262
10263 /*
10264  *
10265  *
10266  *   3         2         1
10267  *  10987654321098765432109876543210
10268  *  001000               x1110000101
10269  *     rt -----
10270  *          rs -----
10271  *               rd -----
10272  */
10273 std::string NMD::MODSUB(uint64 instruction)
10274 {
10275     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10276     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10277     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10278
10279     std::string rd = GPR(copy(rd_value));
10280     std::string rs = GPR(copy(rs_value));
10281     std::string rt = GPR(copy(rt_value));
10282
10283     return img::format("MODSUB %s, %s, %s", rd, rs, rt);
10284 }
10285
10286
10287 /*
10288  *
10289  *
10290  *   3         2         1
10291  *  10987654321098765432109876543210
10292  *  001000               x1110000101
10293  *     rt -----
10294  *          rs -----
10295  *               rd -----
10296  */
10297 std::string NMD::MODU(uint64 instruction)
10298 {
10299     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10300     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10301     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10302
10303     std::string rd = GPR(copy(rd_value));
10304     std::string rs = GPR(copy(rs_value));
10305     std::string rt = GPR(copy(rt_value));
10306
10307     return img::format("MODU %s, %s, %s", rd, rs, rt);
10308 }
10309
10310
10311 /*
10312  *
10313  *
10314  *   3         2         1
10315  *  10987654321098765432109876543210
10316  *  001000               x1110000101
10317  *     rt -----
10318  *          rs -----
10319  *               rd -----
10320  */
10321 std::string NMD::MOV_D(uint64 instruction)
10322 {
10323     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10324     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10325
10326     std::string ft = FPR(copy(ft_value));
10327     std::string fs = FPR(copy(fs_value));
10328
10329     return img::format("MOV.D %s, %s", ft, fs);
10330 }
10331
10332
10333 /*
10334  *
10335  *
10336  *   3         2         1
10337  *  10987654321098765432109876543210
10338  *  001000               x1110000101
10339  *     rt -----
10340  *          rs -----
10341  *               rd -----
10342  */
10343 std::string NMD::MOV_S(uint64 instruction)
10344 {
10345     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10346     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10347
10348     std::string ft = FPR(copy(ft_value));
10349     std::string fs = FPR(copy(fs_value));
10350
10351     return img::format("MOV.S %s, %s", ft, fs);
10352 }
10353
10354
10355 /*
10356  *
10357  *
10358  *   3         2         1
10359  *  10987654321098765432109876543210
10360  *  001000               x1110000101
10361  *     rt -----
10362  *          rs -----
10363  *               rd -----
10364  */
10365 std::string NMD::MOVE_BALC(uint64 instruction)
10366 {
10367     uint64 rtz4_value = extract_rtz4_27_26_25_23_22_21(instruction);
10368     uint64 rd1_value = extract_rdl_25_24(instruction);
10369     int64 s_value = extract_s__se21_0_20_to_1_s1(instruction);
10370
10371     std::string rd1 = GPR(encode_rd1_from_rd(rd1_value));
10372     std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
10373     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
10374
10375     return img::format("MOVE.BALC %s, %s, %s", rd1, rtz4, s);
10376 }
10377
10378
10379 /*
10380  *
10381  *
10382  *   3         2         1
10383  *  10987654321098765432109876543210
10384  *  001000               x1110000101
10385  *     rt -----
10386  *          rs -----
10387  *               rd -----
10388  */
10389 std::string NMD::MOVEP(uint64 instruction)
10390 {
10391     uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction);
10392     uint64 rd2_value = extract_rd2_3_8(instruction);
10393     uint64 rsz4_value = extract_rsz4_4_2_1_0(instruction);
10394
10395     std::string rd2 = GPR(encode_rd2_reg1(rd2_value));
10396     std::string re2 = GPR(encode_rd2_reg2(rd2_value));
10397     /* !!!!!!!!!! - no conversion function */
10398     std::string rsz4 = GPR(encode_gpr4_zero(rsz4_value));
10399     std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
10400
10401     return img::format("MOVEP %s, %s, %s, %s", rd2, re2, rsz4, rtz4);
10402     /* hand edited */
10403 }
10404
10405
10406 /*
10407  *
10408  *
10409  *   3         2         1
10410  *  10987654321098765432109876543210
10411  *  001000               x1110000101
10412  *     rt -----
10413  *          rs -----
10414  *               rd -----
10415  */
10416 std::string NMD::MOVEP_REV_(uint64 instruction)
10417 {
10418     uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
10419     uint64 rd2_value = extract_rd2_3_8(instruction);
10420     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
10421
10422     std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
10423     std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
10424     std::string rd2 = GPR(encode_rd2_reg1(rd2_value));
10425     std::string rs2 = GPR(encode_rd2_reg2(rd2_value));
10426     /* !!!!!!!!!! - no conversion function */
10427
10428     return img::format("MOVEP %s, %s, %s, %s", rs4, rt4, rd2, rs2);
10429     /* hand edited */
10430 }
10431
10432
10433 /*
10434  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10435  *
10436  *   3         2         1
10437  *  10987654321098765432109876543210
10438  *  001000               00010001101
10439  *     rt -----
10440  *          rs -----
10441  *               rd -----
10442  */
10443 std::string NMD::MOVE(uint64 instruction)
10444 {
10445     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
10446     uint64 rs_value = extract_rs_4_3_2_1_0(instruction);
10447
10448     std::string rt = GPR(copy(rt_value));
10449     std::string rs = GPR(copy(rs_value));
10450
10451     return img::format("MOVE %s, %s", rt, rs);
10452 }
10453
10454
10455 /*
10456  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10457  *
10458  *   3         2         1
10459  *  10987654321098765432109876543210
10460  *  001000               00010001101
10461  *     rt -----
10462  *          rs -----
10463  *               rd -----
10464  */
10465 std::string NMD::MOVN(uint64 instruction)
10466 {
10467     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10468     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10469     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10470
10471     std::string rd = GPR(copy(rd_value));
10472     std::string rs = GPR(copy(rs_value));
10473     std::string rt = GPR(copy(rt_value));
10474
10475     return img::format("MOVN %s, %s, %s", rd, rs, rt);
10476 }
10477
10478
10479 /*
10480  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10481  *
10482  *   3         2         1
10483  *  10987654321098765432109876543210
10484  *  001000               00010001101
10485  *     rt -----
10486  *          rs -----
10487  *               rd -----
10488  */
10489 std::string NMD::MOVZ(uint64 instruction)
10490 {
10491     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10492     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10493     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10494
10495     std::string rd = GPR(copy(rd_value));
10496     std::string rs = GPR(copy(rs_value));
10497     std::string rt = GPR(copy(rt_value));
10498
10499     return img::format("MOVZ %s, %s, %s", rd, rs, rt);
10500 }
10501
10502
10503 /*
10504  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10505  *
10506  *   3         2         1
10507  *  10987654321098765432109876543210
10508  *  001000               00010001101
10509  *     rt -----
10510  *          rs -----
10511  *               rd -----
10512  */
10513 std::string NMD::MSUB_DSP_(uint64 instruction)
10514 {
10515     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10516     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10517     uint64 ac_value = extract_ac_13_12(instruction);
10518
10519     std::string ac = AC(copy(ac_value));
10520     std::string rs = GPR(copy(rs_value));
10521     std::string rt = GPR(copy(rt_value));
10522
10523     return img::format("MSUB %s, %s, %s", ac, rs, rt);
10524 }
10525
10526
10527 /*
10528  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10529  *
10530  *   3         2         1
10531  *  10987654321098765432109876543210
10532  *  001000               00010001101
10533  *     rt -----
10534  *          rs -----
10535  *               rd -----
10536  */
10537 std::string NMD::MSUBF_D(uint64 instruction)
10538 {
10539     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10540     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10541     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10542
10543     std::string fd = FPR(copy(fd_value));
10544     std::string fs = FPR(copy(fs_value));
10545     std::string ft = FPR(copy(ft_value));
10546
10547     return img::format("MSUBF.D %s, %s, %s", fd, fs, ft);
10548 }
10549
10550
10551 /*
10552  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10553  *
10554  *   3         2         1
10555  *  10987654321098765432109876543210
10556  *  001000               00010001101
10557  *     rt -----
10558  *          rs -----
10559  *               rd -----
10560  */
10561 std::string NMD::MSUBF_S(uint64 instruction)
10562 {
10563     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10564     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10565     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10566
10567     std::string fd = FPR(copy(fd_value));
10568     std::string fs = FPR(copy(fs_value));
10569     std::string ft = FPR(copy(ft_value));
10570
10571     return img::format("MSUBF.S %s, %s, %s", fd, fs, ft);
10572 }
10573
10574
10575 /*
10576  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10577  *
10578  *   3         2         1
10579  *  10987654321098765432109876543210
10580  *  001000               00010001101
10581  *     rt -----
10582  *          rs -----
10583  *               rd -----
10584  */
10585 std::string NMD::MSUBU_DSP_(uint64 instruction)
10586 {
10587     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10588     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10589     uint64 ac_value = extract_ac_13_12(instruction);
10590
10591     std::string ac = AC(copy(ac_value));
10592     std::string rs = GPR(copy(rs_value));
10593     std::string rt = GPR(copy(rt_value));
10594
10595     return img::format("MSUBU %s, %s, %s", ac, rs, rt);
10596 }
10597
10598
10599 /*
10600  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10601  *
10602  *   3         2         1
10603  *  10987654321098765432109876543210
10604  *  001000               00010001101
10605  *     rt -----
10606  *          rs -----
10607  *               rd -----
10608  */
10609 std::string NMD::MTC0(uint64 instruction)
10610 {
10611     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10612     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10613     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10614
10615     std::string rt = GPR(copy(rt_value));
10616     std::string c0s = CPR(copy(c0s_value));
10617     std::string sel = IMMEDIATE(copy(sel_value));
10618
10619     return img::format("MTC0 %s, %s, %s", rt, c0s, sel);
10620 }
10621
10622
10623 /*
10624  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10625  *
10626  *   3         2         1
10627  *  10987654321098765432109876543210
10628  *  001000               00010001101
10629  *     rt -----
10630  *          rs -----
10631  *               rd -----
10632  */
10633 std::string NMD::MTC1(uint64 instruction)
10634 {
10635     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10636     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10637
10638     std::string rt = GPR(copy(rt_value));
10639     std::string fs = FPR(copy(fs_value));
10640
10641     return img::format("MTC1 %s, %s", rt, fs);
10642 }
10643
10644
10645 /*
10646  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10647  *
10648  *   3         2         1
10649  *  10987654321098765432109876543210
10650  *  001000               00010001101
10651  *     rt -----
10652  *          rs -----
10653  *               rd -----
10654  */
10655 std::string NMD::MTC2(uint64 instruction)
10656 {
10657     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10658     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10659
10660     std::string rt = GPR(copy(rt_value));
10661     std::string cs = CPR(copy(cs_value));
10662
10663     return img::format("MTC2 %s, %s", rt, cs);
10664 }
10665
10666
10667 /*
10668  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10669  *
10670  *   3         2         1
10671  *  10987654321098765432109876543210
10672  *  001000               00010001101
10673  *     rt -----
10674  *          rs -----
10675  *               rd -----
10676  */
10677 std::string NMD::MTGC0(uint64 instruction)
10678 {
10679     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10680     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10681     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10682
10683     std::string rt = GPR(copy(rt_value));
10684     std::string c0s = CPR(copy(c0s_value));
10685     std::string sel = IMMEDIATE(copy(sel_value));
10686
10687     return img::format("MTGC0 %s, %s, %s", rt, c0s, sel);
10688 }
10689
10690
10691 /*
10692  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10693  *
10694  *   3         2         1
10695  *  10987654321098765432109876543210
10696  *  001000               00010001101
10697  *     rt -----
10698  *          rs -----
10699  *               rd -----
10700  */
10701 std::string NMD::MTHC0(uint64 instruction)
10702 {
10703     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10704     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10705     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10706
10707     std::string rt = GPR(copy(rt_value));
10708     std::string c0s = CPR(copy(c0s_value));
10709     std::string sel = IMMEDIATE(copy(sel_value));
10710
10711     return img::format("MTHC0 %s, %s, %s", rt, c0s, sel);
10712 }
10713
10714
10715 /*
10716  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10717  *
10718  *   3         2         1
10719  *  10987654321098765432109876543210
10720  *  001000               00010001101
10721  *     rt -----
10722  *          rs -----
10723  *               rd -----
10724  */
10725 std::string NMD::MTHC1(uint64 instruction)
10726 {
10727     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10728     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10729
10730     std::string rt = GPR(copy(rt_value));
10731     std::string fs = FPR(copy(fs_value));
10732
10733     return img::format("MTHC1 %s, %s", rt, fs);
10734 }
10735
10736
10737 /*
10738  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10739  *
10740  *   3         2         1
10741  *  10987654321098765432109876543210
10742  *  001000               00010001101
10743  *     rt -----
10744  *          rs -----
10745  *               rd -----
10746  */
10747 std::string NMD::MTHC2(uint64 instruction)
10748 {
10749     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10750     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10751
10752     std::string rt = GPR(copy(rt_value));
10753     std::string cs = CPR(copy(cs_value));
10754
10755     return img::format("MTHC2 %s, %s", rt, cs);
10756 }
10757
10758
10759 /*
10760  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10761  *
10762  *   3         2         1
10763  *  10987654321098765432109876543210
10764  *  001000               00010001101
10765  *     rt -----
10766  *          rs -----
10767  *               rd -----
10768  */
10769 std::string NMD::MTHGC0(uint64 instruction)
10770 {
10771     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10772     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10773     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10774
10775     std::string rt = GPR(copy(rt_value));
10776     std::string c0s = CPR(copy(c0s_value));
10777     std::string sel = IMMEDIATE(copy(sel_value));
10778
10779     return img::format("MTHGC0 %s, %s, %s", rt, c0s, sel);
10780 }
10781
10782
10783 /*
10784  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10785  *
10786  *   3         2         1
10787  *  10987654321098765432109876543210
10788  *  001000               00010001101
10789  *     rt -----
10790  *          rs -----
10791  *               rd -----
10792  */
10793 std::string NMD::MTHI_DSP_(uint64 instruction)
10794 {
10795     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10796     uint64 ac_value = extract_ac_13_12(instruction);
10797
10798     std::string rs = GPR(copy(rs_value));
10799     std::string ac = AC(copy(ac_value));
10800
10801     return img::format("MTHI %s, %s", rs, ac);
10802 }
10803
10804
10805 /*
10806  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10807  *
10808  *   3         2         1
10809  *  10987654321098765432109876543210
10810  *  001000               00010001101
10811  *     rt -----
10812  *          rs -----
10813  *               rd -----
10814  */
10815 std::string NMD::MTHLIP(uint64 instruction)
10816 {
10817     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10818     uint64 ac_value = extract_ac_13_12(instruction);
10819
10820     std::string rs = GPR(copy(rs_value));
10821     std::string ac = AC(copy(ac_value));
10822
10823     return img::format("MTHLIP %s, %s", rs, ac);
10824 }
10825
10826
10827 /*
10828  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10829  *
10830  *   3         2         1
10831  *  10987654321098765432109876543210
10832  *  001000               00010001101
10833  *     rt -----
10834  *          rs -----
10835  *               rd -----
10836  */
10837 std::string NMD::MTHTR(uint64 instruction)
10838 {
10839     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10840     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10841     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10842     uint64 u_value = extract_u_10(instruction);
10843
10844     std::string rt = GPR(copy(rt_value));
10845     std::string c0s = IMMEDIATE(copy(c0s_value));
10846     std::string u = IMMEDIATE(copy(u_value));
10847     std::string sel = IMMEDIATE(copy(sel_value));
10848
10849     return img::format("MTHTR %s, %s, %s, %s", rt, c0s, u, sel);
10850 }
10851
10852
10853 /*
10854  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10855  *
10856  *   3         2         1
10857  *  10987654321098765432109876543210
10858  *  001000               00010001101
10859  *     rt -----
10860  *          rs -----
10861  *               rd -----
10862  */
10863 std::string NMD::MTLO_DSP_(uint64 instruction)
10864 {
10865     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10866     uint64 ac_value = extract_ac_13_12(instruction);
10867
10868     std::string rs = GPR(copy(rs_value));
10869     std::string ac = AC(copy(ac_value));
10870
10871     return img::format("MTLO %s, %s", rs, ac);
10872 }
10873
10874
10875 /*
10876  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10877  *
10878  *   3         2         1
10879  *  10987654321098765432109876543210
10880  *  001000               00010001101
10881  *     rt -----
10882  *          rs -----
10883  *               rd -----
10884  */
10885 std::string NMD::MTTR(uint64 instruction)
10886 {
10887     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10888     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10889     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10890     uint64 u_value = extract_u_10(instruction);
10891
10892     std::string rt = GPR(copy(rt_value));
10893     std::string c0s = IMMEDIATE(copy(c0s_value));
10894     std::string u = IMMEDIATE(copy(u_value));
10895     std::string sel = IMMEDIATE(copy(sel_value));
10896
10897     return img::format("MTTR %s, %s, %s, %s", rt, c0s, u, sel);
10898 }
10899
10900
10901 /*
10902  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10903  *
10904  *   3         2         1
10905  *  10987654321098765432109876543210
10906  *  001000               00010001101
10907  *     rt -----
10908  *          rs -----
10909  *               rd -----
10910  */
10911 std::string NMD::MUH(uint64 instruction)
10912 {
10913     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10914     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10915     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10916
10917     std::string rd = GPR(copy(rd_value));
10918     std::string rs = GPR(copy(rs_value));
10919     std::string rt = GPR(copy(rt_value));
10920
10921     return img::format("MUH %s, %s, %s", rd, rs, rt);
10922 }
10923
10924
10925 /*
10926  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10927  *
10928  *   3         2         1
10929  *  10987654321098765432109876543210
10930  *  001000               00010001101
10931  *     rt -----
10932  *          rs -----
10933  *               rd -----
10934  */
10935 std::string NMD::MUHU(uint64 instruction)
10936 {
10937     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10938     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10939     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10940
10941     std::string rd = GPR(copy(rd_value));
10942     std::string rs = GPR(copy(rs_value));
10943     std::string rt = GPR(copy(rt_value));
10944
10945     return img::format("MUHU %s, %s, %s", rd, rs, rt);
10946 }
10947
10948
10949 /*
10950  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10951  *
10952  *   3         2         1
10953  *  10987654321098765432109876543210
10954  *  001000               00010001101
10955  *     rt -----
10956  *          rs -----
10957  *               rd -----
10958  */
10959 std::string NMD::MUL_32_(uint64 instruction)
10960 {
10961     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10962     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10963     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10964
10965     std::string rd = GPR(copy(rd_value));
10966     std::string rs = GPR(copy(rs_value));
10967     std::string rt = GPR(copy(rt_value));
10968
10969     return img::format("MUL %s, %s, %s", rd, rs, rt);
10970 }
10971
10972
10973 /*
10974  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10975  *
10976  *   3         2         1
10977  *  10987654321098765432109876543210
10978  *  001000               00010001101
10979  *     rt -----
10980  *          rs -----
10981  *               rd -----
10982  */
10983 std::string NMD::MUL_4X4_(uint64 instruction)
10984 {
10985     uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
10986     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
10987
10988     std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
10989     std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
10990
10991     return img::format("MUL %s, %s", rs4, rt4);
10992 }
10993
10994
10995 /*
10996  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10997  *
10998  *   3         2         1
10999  *  10987654321098765432109876543210
11000  *  001000               00010001101
11001  *     rt -----
11002  *          rs -----
11003  *               rd -----
11004  */
11005 std::string NMD::MUL_D(uint64 instruction)
11006 {
11007     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11008     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11009     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
11010
11011     std::string fd = FPR(copy(fd_value));
11012     std::string fs = FPR(copy(fs_value));
11013     std::string ft = FPR(copy(ft_value));
11014
11015     return img::format("MUL.D %s, %s, %s", fd, fs, ft);
11016 }
11017
11018
11019 /*
11020  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11021  *
11022  *   3         2         1
11023  *  10987654321098765432109876543210
11024  *  001000               00010001101
11025  *     rt -----
11026  *          rs -----
11027  *               rd -----
11028  */
11029 std::string NMD::MUL_PH(uint64 instruction)
11030 {
11031     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11032     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11033     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11034
11035     std::string rd = GPR(copy(rd_value));
11036     std::string rs = GPR(copy(rs_value));
11037     std::string rt = GPR(copy(rt_value));
11038
11039     return img::format("MUL.PH %s, %s, %s", rd, rs, rt);
11040 }
11041
11042
11043 /*
11044  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11045  *
11046  *   3         2         1
11047  *  10987654321098765432109876543210
11048  *  001000               00010001101
11049  *     rt -----
11050  *          rs -----
11051  *               rd -----
11052  */
11053 std::string NMD::MUL_S_PH(uint64 instruction)
11054 {
11055     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11056     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11057     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11058
11059     std::string rd = GPR(copy(rd_value));
11060     std::string rs = GPR(copy(rs_value));
11061     std::string rt = GPR(copy(rt_value));
11062
11063     return img::format("MUL_S.PH %s, %s, %s", rd, rs, rt);
11064 }
11065
11066
11067 /*
11068  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11069  *
11070  *   3         2         1
11071  *  10987654321098765432109876543210
11072  *  001000               00010001101
11073  *     rt -----
11074  *          rs -----
11075  *               rd -----
11076  */
11077 std::string NMD::MUL_S(uint64 instruction)
11078 {
11079     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11080     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11081     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
11082
11083     std::string fd = FPR(copy(fd_value));
11084     std::string fs = FPR(copy(fs_value));
11085     std::string ft = FPR(copy(ft_value));
11086
11087     return img::format("MUL.S %s, %s, %s", fd, fs, ft);
11088 }
11089
11090
11091 /*
11092  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11093  *
11094  *   3         2         1
11095  *  10987654321098765432109876543210
11096  *  001000               00010001101
11097  *     rt -----
11098  *          rs -----
11099  *               rd -----
11100  */
11101 std::string NMD::MULEQ_S_W_PHL(uint64 instruction)
11102 {
11103     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11104     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11105     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11106
11107     std::string rd = GPR(copy(rd_value));
11108     std::string rs = GPR(copy(rs_value));
11109     std::string rt = GPR(copy(rt_value));
11110
11111     return img::format("MULEQ_S.W.PHL %s, %s, %s", rd, rs, rt);
11112 }
11113
11114
11115 /*
11116  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11117  *
11118  *   3         2         1
11119  *  10987654321098765432109876543210
11120  *  001000               00010001101
11121  *     rt -----
11122  *          rs -----
11123  *               rd -----
11124  */
11125 std::string NMD::MULEQ_S_W_PHR(uint64 instruction)
11126 {
11127     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11128     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11129     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11130
11131     std::string rd = GPR(copy(rd_value));
11132     std::string rs = GPR(copy(rs_value));
11133     std::string rt = GPR(copy(rt_value));
11134
11135     return img::format("MULEQ_S.W.PHR %s, %s, %s", rd, rs, rt);
11136 }
11137
11138
11139 /*
11140  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11141  *
11142  *   3         2         1
11143  *  10987654321098765432109876543210
11144  *  001000               00010001101
11145  *     rt -----
11146  *          rs -----
11147  *               rd -----
11148  */
11149 std::string NMD::MULEU_S_PH_QBL(uint64 instruction)
11150 {
11151     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11152     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11153     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11154
11155     std::string rd = GPR(copy(rd_value));
11156     std::string rs = GPR(copy(rs_value));
11157     std::string rt = GPR(copy(rt_value));
11158
11159     return img::format("MULEU_S.PH.QBL %s, %s, %s", rd, rs, rt);
11160 }
11161
11162
11163 /*
11164  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11165  *
11166  *   3         2         1
11167  *  10987654321098765432109876543210
11168  *  001000               00010001101
11169  *     rt -----
11170  *          rs -----
11171  *               rd -----
11172  */
11173 std::string NMD::MULEU_S_PH_QBR(uint64 instruction)
11174 {
11175     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11176     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11177     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11178
11179     std::string rd = GPR(copy(rd_value));
11180     std::string rs = GPR(copy(rs_value));
11181     std::string rt = GPR(copy(rt_value));
11182
11183     return img::format("MULEU_S.PH.QBR %s, %s, %s", rd, rs, rt);
11184 }
11185
11186
11187 /*
11188  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11189  *
11190  *   3         2         1
11191  *  10987654321098765432109876543210
11192  *  001000               00010001101
11193  *     rt -----
11194  *          rs -----
11195  *               rd -----
11196  */
11197 std::string NMD::MULQ_RS_PH(uint64 instruction)
11198 {
11199     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11200     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11201     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11202
11203     std::string rd = GPR(copy(rd_value));
11204     std::string rs = GPR(copy(rs_value));
11205     std::string rt = GPR(copy(rt_value));
11206
11207     return img::format("MULQ_RS.PH %s, %s, %s", rd, rs, rt);
11208 }
11209
11210
11211 /*
11212  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11213  *
11214  *   3         2         1
11215  *  10987654321098765432109876543210
11216  *  001000               00010001101
11217  *     rt -----
11218  *          rs -----
11219  *               rd -----
11220  */
11221 std::string NMD::MULQ_RS_W(uint64 instruction)
11222 {
11223     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11224     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11225     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11226
11227     std::string rd = GPR(copy(rd_value));
11228     std::string rs = GPR(copy(rs_value));
11229     std::string rt = GPR(copy(rt_value));
11230
11231     return img::format("MULQ_RS.W %s, %s, %s", rd, rs, rt);
11232 }
11233
11234
11235 /*
11236  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11237  *
11238  *   3         2         1
11239  *  10987654321098765432109876543210
11240  *  001000               00010001101
11241  *     rt -----
11242  *          rs -----
11243  *               rd -----
11244  */
11245 std::string NMD::MULQ_S_PH(uint64 instruction)
11246 {
11247     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11248     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11249     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11250
11251     std::string rd = GPR(copy(rd_value));
11252     std::string rs = GPR(copy(rs_value));
11253     std::string rt = GPR(copy(rt_value));
11254
11255     return img::format("MULQ_S.PH %s, %s, %s", rd, rs, rt);
11256 }
11257
11258
11259 /*
11260  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11261  *
11262  *   3         2         1
11263  *  10987654321098765432109876543210
11264  *  001000               00010001101
11265  *     rt -----
11266  *          rs -----
11267  *               rd -----
11268  */
11269 std::string NMD::MULQ_S_W(uint64 instruction)
11270 {
11271     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11272     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11273     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11274
11275     std::string rd = GPR(copy(rd_value));
11276     std::string rs = GPR(copy(rs_value));
11277     std::string rt = GPR(copy(rt_value));
11278
11279     return img::format("MULQ_S.W %s, %s, %s", rd, rs, rt);
11280 }
11281
11282
11283 /*
11284  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11285  *
11286  *   3         2         1
11287  *  10987654321098765432109876543210
11288  *  001000               00010001101
11289  *     rt -----
11290  *          rs -----
11291  *               rd -----
11292  */
11293 std::string NMD::MULSA_W_PH(uint64 instruction)
11294 {
11295     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11296     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11297     uint64 ac_value = extract_ac_13_12(instruction);
11298
11299     std::string ac = AC(copy(ac_value));
11300     std::string rs = GPR(copy(rs_value));
11301     std::string rt = GPR(copy(rt_value));
11302
11303     return img::format("MULSA.W.PH %s, %s, %s", ac, rs, rt);
11304 }
11305
11306
11307 /*
11308  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11309  *
11310  *   3         2         1
11311  *  10987654321098765432109876543210
11312  *  001000               00010001101
11313  *     rt -----
11314  *          rs -----
11315  *               rd -----
11316  */
11317 std::string NMD::MULSAQ_S_W_PH(uint64 instruction)
11318 {
11319     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11320     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11321     uint64 ac_value = extract_ac_13_12(instruction);
11322
11323     std::string ac = AC(copy(ac_value));
11324     std::string rs = GPR(copy(rs_value));
11325     std::string rt = GPR(copy(rt_value));
11326
11327     return img::format("MULSAQ_S.W.PH %s, %s, %s", ac, rs, rt);
11328 }
11329
11330
11331 /*
11332  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11333  *
11334  *   3         2         1
11335  *  10987654321098765432109876543210
11336  *  001000               00010001101
11337  *     rt -----
11338  *          rs -----
11339  *               rd -----
11340  */
11341 std::string NMD::MULT_DSP_(uint64 instruction)
11342 {
11343     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11344     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11345     uint64 ac_value = extract_ac_13_12(instruction);
11346
11347     std::string ac = AC(copy(ac_value));
11348     std::string rs = GPR(copy(rs_value));
11349     std::string rt = GPR(copy(rt_value));
11350
11351     return img::format("MULT %s, %s, %s", ac, rs, rt);
11352 }
11353
11354
11355 /*
11356  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11357  *
11358  *   3         2         1
11359  *  10987654321098765432109876543210
11360  *  001000               00010001101
11361  *     rt -----
11362  *          rs -----
11363  *               rd -----
11364  */
11365 std::string NMD::MULTU_DSP_(uint64 instruction)
11366 {
11367     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11368     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11369     uint64 ac_value = extract_ac_13_12(instruction);
11370
11371     std::string ac = AC(copy(ac_value));
11372     std::string rs = GPR(copy(rs_value));
11373     std::string rt = GPR(copy(rt_value));
11374
11375     return img::format("MULTU %s, %s, %s", ac, rs, rt);
11376 }
11377
11378
11379 /*
11380  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11381  *
11382  *   3         2         1
11383  *  10987654321098765432109876543210
11384  *  001000               00010001101
11385  *     rt -----
11386  *          rs -----
11387  *               rd -----
11388  */
11389 std::string NMD::MULU(uint64 instruction)
11390 {
11391     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11392     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11393     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11394
11395     std::string rd = GPR(copy(rd_value));
11396     std::string rs = GPR(copy(rs_value));
11397     std::string rt = GPR(copy(rt_value));
11398
11399     return img::format("MULU %s, %s, %s", rd, rs, rt);
11400 }
11401
11402
11403 /*
11404  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11405  *
11406  *   3         2         1
11407  *  10987654321098765432109876543210
11408  *  001000               00010001101
11409  *     rt -----
11410  *          rs -----
11411  *               rd -----
11412  */
11413 std::string NMD::NEG_D(uint64 instruction)
11414 {
11415     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11416     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11417
11418     std::string ft = FPR(copy(ft_value));
11419     std::string fs = FPR(copy(fs_value));
11420
11421     return img::format("NEG.D %s, %s", ft, fs);
11422 }
11423
11424
11425 /*
11426  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11427  *
11428  *   3         2         1
11429  *  10987654321098765432109876543210
11430  *  001000               00010001101
11431  *     rt -----
11432  *          rs -----
11433  *               rd -----
11434  */
11435 std::string NMD::NEG_S(uint64 instruction)
11436 {
11437     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11438     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11439
11440     std::string ft = FPR(copy(ft_value));
11441     std::string fs = FPR(copy(fs_value));
11442
11443     return img::format("NEG.S %s, %s", ft, fs);
11444 }
11445
11446
11447 /*
11448  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11449  *
11450  *   3         2         1
11451  *  10987654321098765432109876543210
11452  *  001000               00010001101
11453  *     rt -----
11454  *          rs -----
11455  *               rd -----
11456  */
11457 std::string NMD::NOP_16_(uint64 instruction)
11458 {
11459     (void)instruction;
11460
11461     return "NOP ";
11462 }
11463
11464
11465 /*
11466  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11467  *
11468  *   3         2         1
11469  *  10987654321098765432109876543210
11470  *  001000               00010001101
11471  *     rt -----
11472  *          rs -----
11473  *               rd -----
11474  */
11475 std::string NMD::NOP_32_(uint64 instruction)
11476 {
11477     (void)instruction;
11478
11479     return "NOP ";
11480 }
11481
11482
11483 /*
11484  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11485  *
11486  *   3         2         1
11487  *  10987654321098765432109876543210
11488  *  001000               00010001101
11489  *     rt -----
11490  *          rs -----
11491  *               rd -----
11492  */
11493 std::string NMD::NOR(uint64 instruction)
11494 {
11495     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11496     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11497     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11498
11499     std::string rd = GPR(copy(rd_value));
11500     std::string rs = GPR(copy(rs_value));
11501     std::string rt = GPR(copy(rt_value));
11502
11503     return img::format("NOR %s, %s, %s", rd, rs, rt);
11504 }
11505
11506
11507 /*
11508  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11509  *
11510  *   3         2         1
11511  *  10987654321098765432109876543210
11512  *  001000               00010001101
11513  *     rt -----
11514  *          rs -----
11515  *               rd -----
11516  */
11517 std::string NMD::NOT_16_(uint64 instruction)
11518 {
11519     uint64 rt3_value = extract_rt3_9_8_7(instruction);
11520     uint64 rs3_value = extract_rs3_6_5_4(instruction);
11521
11522     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
11523     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
11524
11525     return img::format("NOT %s, %s", rt3, rs3);
11526 }
11527
11528
11529 /*
11530  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11531  *
11532  *   3         2         1
11533  *  10987654321098765432109876543210
11534  *  001000               00010001101
11535  *     rt -----
11536  *          rs -----
11537  *               rd -----
11538  */
11539 std::string NMD::OR_16_(uint64 instruction)
11540 {
11541     uint64 rt3_value = extract_rt3_9_8_7(instruction);
11542     uint64 rs3_value = extract_rs3_6_5_4(instruction);
11543
11544     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
11545     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
11546
11547     return img::format("OR %s, %s", rs3, rt3);
11548 }
11549
11550
11551 /*
11552  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11553  *
11554  *   3         2         1
11555  *  10987654321098765432109876543210
11556  *  001000               00010001101
11557  *     rt -----
11558  *          rs -----
11559  *               rd -----
11560  */
11561 std::string NMD::OR_32_(uint64 instruction)
11562 {
11563     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11564     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11565     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11566
11567     std::string rd = GPR(copy(rd_value));
11568     std::string rs = GPR(copy(rs_value));
11569     std::string rt = GPR(copy(rt_value));
11570
11571     return img::format("OR %s, %s, %s", rd, rs, rt);
11572 }
11573
11574
11575 /*
11576  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11577  *
11578  *   3         2         1
11579  *  10987654321098765432109876543210
11580  *  001000               00010001101
11581  *     rt -----
11582  *          rs -----
11583  *               rd -----
11584  */
11585 std::string NMD::ORI(uint64 instruction)
11586 {
11587     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11588     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11589     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
11590
11591     std::string rt = GPR(copy(rt_value));
11592     std::string rs = GPR(copy(rs_value));
11593     std::string u = IMMEDIATE(copy(u_value));
11594
11595     return img::format("ORI %s, %s, %s", rt, rs, u);
11596 }
11597
11598
11599 /*
11600  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11601  *
11602  *   3         2         1
11603  *  10987654321098765432109876543210
11604  *  001000               00010001101
11605  *     rt -----
11606  *          rs -----
11607  *               rd -----
11608  */
11609 std::string NMD::PACKRL_PH(uint64 instruction)
11610 {
11611     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11612     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11613     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11614
11615     std::string rd = GPR(copy(rd_value));
11616     std::string rs = GPR(copy(rs_value));
11617     std::string rt = GPR(copy(rt_value));
11618
11619     return img::format("PACKRL.PH %s, %s, %s", rd, rs, rt);
11620 }
11621
11622
11623 /*
11624  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11625  *
11626  *   3         2         1
11627  *  10987654321098765432109876543210
11628  *  001000               00010001101
11629  *     rt -----
11630  *          rs -----
11631  *               rd -----
11632  */
11633 std::string NMD::PAUSE(uint64 instruction)
11634 {
11635     (void)instruction;
11636
11637     return "PAUSE ";
11638 }
11639
11640
11641 /*
11642  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11643  *
11644  *   3         2         1
11645  *  10987654321098765432109876543210
11646  *  001000               00010001101
11647  *     rt -----
11648  *          rs -----
11649  *               rd -----
11650  */
11651 std::string NMD::PICK_PH(uint64 instruction)
11652 {
11653     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11654     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11655     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11656
11657     std::string rd = GPR(copy(rd_value));
11658     std::string rs = GPR(copy(rs_value));
11659     std::string rt = GPR(copy(rt_value));
11660
11661     return img::format("PICK.PH %s, %s, %s", rd, rs, rt);
11662 }
11663
11664
11665 /*
11666  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11667  *
11668  *   3         2         1
11669  *  10987654321098765432109876543210
11670  *  001000               00010001101
11671  *     rt -----
11672  *          rs -----
11673  *               rd -----
11674  */
11675 std::string NMD::PICK_QB(uint64 instruction)
11676 {
11677     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11678     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11679     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11680
11681     std::string rd = GPR(copy(rd_value));
11682     std::string rs = GPR(copy(rs_value));
11683     std::string rt = GPR(copy(rt_value));
11684
11685     return img::format("PICK.QB %s, %s, %s", rd, rs, rt);
11686 }
11687
11688
11689 /*
11690  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11691  *
11692  *   3         2         1
11693  *  10987654321098765432109876543210
11694  *  001000               00010001101
11695  *     rt -----
11696  *          rs -----
11697  *               rd -----
11698  */
11699 std::string NMD::PRECEQ_W_PHL(uint64 instruction)
11700 {
11701     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11702     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11703
11704     std::string rt = GPR(copy(rt_value));
11705     std::string rs = GPR(copy(rs_value));
11706
11707     return img::format("PRECEQ.W.PHL %s, %s", rt, rs);
11708 }
11709
11710
11711 /*
11712  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11713  *
11714  *   3         2         1
11715  *  10987654321098765432109876543210
11716  *  001000               00010001101
11717  *     rt -----
11718  *          rs -----
11719  *               rd -----
11720  */
11721 std::string NMD::PRECEQ_W_PHR(uint64 instruction)
11722 {
11723     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11724     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11725
11726     std::string rt = GPR(copy(rt_value));
11727     std::string rs = GPR(copy(rs_value));
11728
11729     return img::format("PRECEQ.W.PHR %s, %s", rt, rs);
11730 }
11731
11732
11733 /*
11734  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11735  *
11736  *   3         2         1
11737  *  10987654321098765432109876543210
11738  *  001000               00010001101
11739  *     rt -----
11740  *          rs -----
11741  *               rd -----
11742  */
11743 std::string NMD::PRECEQU_PH_QBLA(uint64 instruction)
11744 {
11745     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11746     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11747
11748     std::string rt = GPR(copy(rt_value));
11749     std::string rs = GPR(copy(rs_value));
11750
11751     return img::format("PRECEQU.PH.QBLA %s, %s", rt, rs);
11752 }
11753
11754
11755 /*
11756  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11757  *
11758  *   3         2         1
11759  *  10987654321098765432109876543210
11760  *  001000               00010001101
11761  *     rt -----
11762  *          rs -----
11763  *               rd -----
11764  */
11765 std::string NMD::PRECEQU_PH_QBL(uint64 instruction)
11766 {
11767     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11768     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11769
11770     std::string rt = GPR(copy(rt_value));
11771     std::string rs = GPR(copy(rs_value));
11772
11773     return img::format("PRECEQU.PH.QBL %s, %s", rt, rs);
11774 }
11775
11776
11777 /*
11778  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11779  *
11780  *   3         2         1
11781  *  10987654321098765432109876543210
11782  *  001000               00010001101
11783  *     rt -----
11784  *          rs -----
11785  *               rd -----
11786  */
11787 std::string NMD::PRECEQU_PH_QBRA(uint64 instruction)
11788 {
11789     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11790     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11791
11792     std::string rt = GPR(copy(rt_value));
11793     std::string rs = GPR(copy(rs_value));
11794
11795     return img::format("PRECEQU.PH.QBRA %s, %s", rt, rs);
11796 }
11797
11798
11799 /*
11800  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11801  *
11802  *   3         2         1
11803  *  10987654321098765432109876543210
11804  *  001000               00010001101
11805  *     rt -----
11806  *          rs -----
11807  *               rd -----
11808  */
11809 std::string NMD::PRECEQU_PH_QBR(uint64 instruction)
11810 {
11811     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11812     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11813
11814     std::string rt = GPR(copy(rt_value));
11815     std::string rs = GPR(copy(rs_value));
11816
11817     return img::format("PRECEQU.PH.QBR %s, %s", rt, rs);
11818 }
11819
11820
11821 /*
11822  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11823  *
11824  *   3         2         1
11825  *  10987654321098765432109876543210
11826  *  001000               00010001101
11827  *     rt -----
11828  *          rs -----
11829  *               rd -----
11830  */
11831 std::string NMD::PRECEU_PH_QBLA(uint64 instruction)
11832 {
11833     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11834     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11835
11836     std::string rt = GPR(copy(rt_value));
11837     std::string rs = GPR(copy(rs_value));
11838
11839     return img::format("PRECEU.PH.QBLA %s, %s", rt, rs);
11840 }
11841
11842
11843 /*
11844  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11845  *
11846  *   3         2         1
11847  *  10987654321098765432109876543210
11848  *  001000               00010001101
11849  *     rt -----
11850  *          rs -----
11851  *               rd -----
11852  */
11853 std::string NMD::PRECEU_PH_QBL(uint64 instruction)
11854 {
11855     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11856     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11857
11858     std::string rt = GPR(copy(rt_value));
11859     std::string rs = GPR(copy(rs_value));
11860
11861     return img::format("PRECEU.PH.QBL %s, %s", rt, rs);
11862 }
11863
11864
11865 /*
11866  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11867  *
11868  *   3         2         1
11869  *  10987654321098765432109876543210
11870  *  001000               00010001101
11871  *     rt -----
11872  *          rs -----
11873  *               rd -----
11874  */
11875 std::string NMD::PRECEU_PH_QBRA(uint64 instruction)
11876 {
11877     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11878     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11879
11880     std::string rt = GPR(copy(rt_value));
11881     std::string rs = GPR(copy(rs_value));
11882
11883     return img::format("PRECEU.PH.QBRA %s, %s", rt, rs);
11884 }
11885
11886
11887 /*
11888  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11889  *
11890  *   3         2         1
11891  *  10987654321098765432109876543210
11892  *  001000               00010001101
11893  *     rt -----
11894  *          rs -----
11895  *               rd -----
11896  */
11897 std::string NMD::PRECEU_PH_QBR(uint64 instruction)
11898 {
11899     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11900     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11901
11902     std::string rt = GPR(copy(rt_value));
11903     std::string rs = GPR(copy(rs_value));
11904
11905     return img::format("PRECEU.PH.QBR %s, %s", rt, rs);
11906 }
11907
11908
11909 /*
11910  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11911  *
11912  *   3         2         1
11913  *  10987654321098765432109876543210
11914  *  001000               00010001101
11915  *     rt -----
11916  *          rs -----
11917  *               rd -----
11918  */
11919 std::string NMD::PRECR_QB_PH(uint64 instruction)
11920 {
11921     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11922     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11923     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11924
11925     std::string rd = GPR(copy(rd_value));
11926     std::string rs = GPR(copy(rs_value));
11927     std::string rt = GPR(copy(rt_value));
11928
11929     return img::format("PRECR.QB.PH %s, %s, %s", rd, rs, rt);
11930 }
11931
11932
11933 /*
11934  *
11935  *
11936  *   3         2         1
11937  *  10987654321098765432109876543210
11938  *  001000               x1110000101
11939  *     rt -----
11940  *          rs -----
11941  *               rd -----
11942  */
11943 std::string NMD::PRECR_SRA_PH_W(uint64 instruction)
11944 {
11945     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11946     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11947     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
11948
11949     std::string rt = GPR(copy(rt_value));
11950     std::string rs = GPR(copy(rs_value));
11951     std::string sa = IMMEDIATE(copy(sa_value));
11952
11953     return img::format("PRECR_SRA.PH.W %s, %s, %s", rt, rs, sa);
11954 }
11955
11956
11957 /*
11958  *
11959  *
11960  *   3         2         1
11961  *  10987654321098765432109876543210
11962  *  001000               x1110000101
11963  *     rt -----
11964  *          rs -----
11965  *               rd -----
11966  */
11967 std::string NMD::PRECR_SRA_R_PH_W(uint64 instruction)
11968 {
11969     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11970     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11971     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
11972
11973     std::string rt = GPR(copy(rt_value));
11974     std::string rs = GPR(copy(rs_value));
11975     std::string sa = IMMEDIATE(copy(sa_value));
11976
11977     return img::format("PRECR_SRA_R.PH.W %s, %s, %s", rt, rs, sa);
11978 }
11979
11980
11981 /*
11982  *
11983  *
11984  *   3         2         1
11985  *  10987654321098765432109876543210
11986  *  001000               x1110000101
11987  *     rt -----
11988  *          rs -----
11989  *               rd -----
11990  */
11991 std::string NMD::PRECRQ_PH_W(uint64 instruction)
11992 {
11993     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11994     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11995     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11996
11997     std::string rd = GPR(copy(rd_value));
11998     std::string rs = GPR(copy(rs_value));
11999     std::string rt = GPR(copy(rt_value));
12000
12001     return img::format("PRECRQ.PH.W %s, %s, %s", rd, rs, rt);
12002 }
12003
12004
12005 /*
12006  *
12007  *
12008  *   3         2         1
12009  *  10987654321098765432109876543210
12010  *  001000               x1110000101
12011  *     rt -----
12012  *          rs -----
12013  *               rd -----
12014  */
12015 std::string NMD::PRECRQ_QB_PH(uint64 instruction)
12016 {
12017     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12018     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12019     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12020
12021     std::string rd = GPR(copy(rd_value));
12022     std::string rs = GPR(copy(rs_value));
12023     std::string rt = GPR(copy(rt_value));
12024
12025     return img::format("PRECRQ.QB.PH %s, %s, %s", rd, rs, rt);
12026 }
12027
12028
12029 /*
12030  *
12031  *
12032  *   3         2         1
12033  *  10987654321098765432109876543210
12034  *  001000               x1110000101
12035  *     rt -----
12036  *          rs -----
12037  *               rd -----
12038  */
12039 std::string NMD::PRECRQ_RS_PH_W(uint64 instruction)
12040 {
12041     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12042     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12043     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12044
12045     std::string rd = GPR(copy(rd_value));
12046     std::string rs = GPR(copy(rs_value));
12047     std::string rt = GPR(copy(rt_value));
12048
12049     return img::format("PRECRQ_RS.PH.W %s, %s, %s", rd, rs, rt);
12050 }
12051
12052
12053 /*
12054  *
12055  *
12056  *   3         2         1
12057  *  10987654321098765432109876543210
12058  *  001000               x1110000101
12059  *     rt -----
12060  *          rs -----
12061  *               rd -----
12062  */
12063 std::string NMD::PRECRQU_S_QB_PH(uint64 instruction)
12064 {
12065     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12066     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12067     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12068
12069     std::string rd = GPR(copy(rd_value));
12070     std::string rs = GPR(copy(rs_value));
12071     std::string rt = GPR(copy(rt_value));
12072
12073     return img::format("PRECRQU_S.QB.PH %s, %s, %s", rd, rs, rt);
12074 }
12075
12076
12077 /*
12078  *
12079  *
12080  *   3         2         1
12081  *  10987654321098765432109876543210
12082  *  001000               x1110000101
12083  *     rt -----
12084  *          rs -----
12085  *               rd -----
12086  */
12087 std::string NMD::PREF_S9_(uint64 instruction)
12088 {
12089     uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
12090     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12091     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12092
12093     std::string hint = IMMEDIATE(copy(hint_value));
12094     std::string s = IMMEDIATE(copy(s_value));
12095     std::string rs = GPR(copy(rs_value));
12096
12097     return img::format("PREF %s, %s(%s)", hint, s, rs);
12098 }
12099
12100
12101 /*
12102  *
12103  *
12104  *   3         2         1
12105  *  10987654321098765432109876543210
12106  *  001000               x1110000101
12107  *     rt -----
12108  *          rs -----
12109  *               rd -----
12110  */
12111 std::string NMD::PREF_U12_(uint64 instruction)
12112 {
12113     uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
12114     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12115     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
12116
12117     std::string hint = IMMEDIATE(copy(hint_value));
12118     std::string u = IMMEDIATE(copy(u_value));
12119     std::string rs = GPR(copy(rs_value));
12120
12121     return img::format("PREF %s, %s(%s)", hint, u, rs);
12122 }
12123
12124
12125 /*
12126  *
12127  *
12128  *   3         2         1
12129  *  10987654321098765432109876543210
12130  *  001000               x1110000101
12131  *     rt -----
12132  *          rs -----
12133  *               rd -----
12134  */
12135 std::string NMD::PREFE(uint64 instruction)
12136 {
12137     uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
12138     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12139     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12140
12141     std::string hint = IMMEDIATE(copy(hint_value));
12142     std::string s = IMMEDIATE(copy(s_value));
12143     std::string rs = GPR(copy(rs_value));
12144
12145     return img::format("PREFE %s, %s(%s)", hint, s, rs);
12146 }
12147
12148
12149 /*
12150  *
12151  *
12152  *   3         2         1
12153  *  10987654321098765432109876543210
12154  *  001000               x1110000101
12155  *     rt -----
12156  *          rs -----
12157  *               rd -----
12158  */
12159 std::string NMD::PREPEND(uint64 instruction)
12160 {
12161     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12162     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12163     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
12164
12165     std::string rt = GPR(copy(rt_value));
12166     std::string rs = GPR(copy(rs_value));
12167     std::string sa = IMMEDIATE(copy(sa_value));
12168
12169     return img::format("PREPEND %s, %s, %s", rt, rs, sa);
12170 }
12171
12172
12173 /*
12174  *
12175  *
12176  *   3         2         1
12177  *  10987654321098765432109876543210
12178  *  001000               x1110000101
12179  *     rt -----
12180  *          rs -----
12181  *               rd -----
12182  */
12183 std::string NMD::RADDU_W_QB(uint64 instruction)
12184 {
12185     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12186     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12187
12188     std::string rt = GPR(copy(rt_value));
12189     std::string rs = GPR(copy(rs_value));
12190
12191     return img::format("RADDU.W.QB %s, %s", rt, rs);
12192 }
12193
12194
12195 /*
12196  *
12197  *
12198  *   3         2         1
12199  *  10987654321098765432109876543210
12200  *  001000               x1110000101
12201  *     rt -----
12202  *          rs -----
12203  *               rd -----
12204  */
12205 std::string NMD::RDDSP(uint64 instruction)
12206 {
12207     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12208     uint64 mask_value = extract_mask_20_19_18_17_16_15_14(instruction);
12209
12210     std::string rt = GPR(copy(rt_value));
12211     std::string mask = IMMEDIATE(copy(mask_value));
12212
12213     return img::format("RDDSP %s, %s", rt, mask);
12214 }
12215
12216
12217 /*
12218  *
12219  *
12220  *   3         2         1
12221  *  10987654321098765432109876543210
12222  *  001000               x1110000101
12223  *     rt -----
12224  *          rs -----
12225  *               rd -----
12226  */
12227 std::string NMD::RDHWR(uint64 instruction)
12228 {
12229     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12230     uint64 hs_value = extract_hs_20_19_18_17_16(instruction);
12231     uint64 sel_value = extract_sel_13_12_11(instruction);
12232
12233     std::string rt = GPR(copy(rt_value));
12234     std::string hs = CPR(copy(hs_value));
12235     std::string sel = IMMEDIATE(copy(sel_value));
12236
12237     return img::format("RDHWR %s, %s, %s", rt, hs, sel);
12238 }
12239
12240
12241 /*
12242  *
12243  *
12244  *   3         2         1
12245  *  10987654321098765432109876543210
12246  *  001000               x1110000101
12247  *     rt -----
12248  *          rs -----
12249  *               rd -----
12250  */
12251 std::string NMD::RDPGPR(uint64 instruction)
12252 {
12253     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12254     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12255
12256     std::string rt = GPR(copy(rt_value));
12257     std::string rs = GPR(copy(rs_value));
12258
12259     return img::format("RDPGPR %s, %s", rt, rs);
12260 }
12261
12262
12263 /*
12264  *
12265  *
12266  *   3         2         1
12267  *  10987654321098765432109876543210
12268  *  001000               x1110000101
12269  *     rt -----
12270  *          rs -----
12271  *               rd -----
12272  */
12273 std::string NMD::RECIP_D(uint64 instruction)
12274 {
12275     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12276     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12277
12278     std::string ft = FPR(copy(ft_value));
12279     std::string fs = FPR(copy(fs_value));
12280
12281     return img::format("RECIP.D %s, %s", ft, fs);
12282 }
12283
12284
12285 /*
12286  *
12287  *
12288  *   3         2         1
12289  *  10987654321098765432109876543210
12290  *  001000               x1110000101
12291  *     rt -----
12292  *          rs -----
12293  *               rd -----
12294  */
12295 std::string NMD::RECIP_S(uint64 instruction)
12296 {
12297     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12298     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12299
12300     std::string ft = FPR(copy(ft_value));
12301     std::string fs = FPR(copy(fs_value));
12302
12303     return img::format("RECIP.S %s, %s", ft, fs);
12304 }
12305
12306
12307 /*
12308  *
12309  *
12310  *   3         2         1
12311  *  10987654321098765432109876543210
12312  *  001000               x1110000101
12313  *     rt -----
12314  *          rs -----
12315  *               rd -----
12316  */
12317 std::string NMD::REPL_PH(uint64 instruction)
12318 {
12319     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12320     int64 s_value = extract_s__se9_20_19_18_17_16_15_14_13_12_11(instruction);
12321
12322     std::string rt = GPR(copy(rt_value));
12323     std::string s = IMMEDIATE(copy(s_value));
12324
12325     return img::format("REPL.PH %s, %s", rt, s);
12326 }
12327
12328
12329 /*
12330  *
12331  *
12332  *   3         2         1
12333  *  10987654321098765432109876543210
12334  *  001000               x1110000101
12335  *     rt -----
12336  *          rs -----
12337  *               rd -----
12338  */
12339 std::string NMD::REPL_QB(uint64 instruction)
12340 {
12341     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12342     uint64 u_value = extract_u_20_19_18_17_16_15_14_13(instruction);
12343
12344     std::string rt = GPR(copy(rt_value));
12345     std::string u = IMMEDIATE(copy(u_value));
12346
12347     return img::format("REPL.QB %s, %s", rt, u);
12348 }
12349
12350
12351 /*
12352  *
12353  *
12354  *   3         2         1
12355  *  10987654321098765432109876543210
12356  *  001000               x1110000101
12357  *     rt -----
12358  *          rs -----
12359  *               rd -----
12360  */
12361 std::string NMD::REPLV_PH(uint64 instruction)
12362 {
12363     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12364     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12365
12366     std::string rt = GPR(copy(rt_value));
12367     std::string rs = GPR(copy(rs_value));
12368
12369     return img::format("REPLV.PH %s, %s", rt, rs);
12370 }
12371
12372
12373 /*
12374  *
12375  *
12376  *   3         2         1
12377  *  10987654321098765432109876543210
12378  *  001000               x1110000101
12379  *     rt -----
12380  *          rs -----
12381  *               rd -----
12382  */
12383 std::string NMD::REPLV_QB(uint64 instruction)
12384 {
12385     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12386     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12387
12388     std::string rt = GPR(copy(rt_value));
12389     std::string rs = GPR(copy(rs_value));
12390
12391     return img::format("REPLV.QB %s, %s", rt, rs);
12392 }
12393
12394
12395 /*
12396  *
12397  *
12398  *   3         2         1
12399  *  10987654321098765432109876543210
12400  *  001000               x1110000101
12401  *     rt -----
12402  *          rs -----
12403  *               rd -----
12404  */
12405 std::string NMD::RESTORE_32_(uint64 instruction)
12406 {
12407     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12408     uint64 count_value = extract_count_19_18_17_16(instruction);
12409     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12410     uint64 gp_value = extract_gp_2(instruction);
12411
12412     std::string u = IMMEDIATE(copy(u_value));
12413     return img::format("RESTORE %s%s", u,
12414                save_restore_list(rt_value, count_value, gp_value));
12415 }
12416
12417
12418 /*
12419  *
12420  *
12421  *   3         2         1
12422  *  10987654321098765432109876543210
12423  *  001000               x1110000101
12424  *     rt -----
12425  *          rs -----
12426  *               rd -----
12427  */
12428 std::string NMD::RESTORE_JRC_16_(uint64 instruction)
12429 {
12430     uint64 rt1_value = extract_rtl_11(instruction);
12431     uint64 u_value = extract_u_7_6_5_4__s4(instruction);
12432     uint64 count_value = extract_count_3_2_1_0(instruction);
12433
12434     std::string u = IMMEDIATE(copy(u_value));
12435     return img::format("RESTORE.JRC %s%s", u,
12436         save_restore_list(encode_rt1_from_rt(rt1_value), count_value, 0));
12437 }
12438
12439
12440 /*
12441  *
12442  *
12443  *   3         2         1
12444  *  10987654321098765432109876543210
12445  *  001000               x1110000101
12446  *     rt -----
12447  *          rs -----
12448  *               rd -----
12449  */
12450 std::string NMD::RESTORE_JRC_32_(uint64 instruction)
12451 {
12452     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12453     uint64 count_value = extract_count_19_18_17_16(instruction);
12454     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12455     uint64 gp_value = extract_gp_2(instruction);
12456
12457     std::string u = IMMEDIATE(copy(u_value));
12458     return img::format("RESTORE.JRC %s%s", u,
12459                save_restore_list(rt_value, count_value, gp_value));
12460 }
12461
12462
12463 /*
12464  *
12465  *
12466  *   3         2         1
12467  *  10987654321098765432109876543210
12468  *  001000               x1110000101
12469  *     rt -----
12470  *          rs -----
12471  *               rd -----
12472  */
12473 std::string NMD::RESTOREF(uint64 instruction)
12474 {
12475     uint64 count_value = extract_count_19_18_17_16(instruction);
12476     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12477
12478     std::string u = IMMEDIATE(copy(u_value));
12479     std::string count = IMMEDIATE(copy(count_value));
12480
12481     return img::format("RESTOREF %s, %s", u, count);
12482 }
12483
12484
12485 /*
12486  *
12487  *
12488  *   3         2         1
12489  *  10987654321098765432109876543210
12490  *  001000               x1110000101
12491  *     rt -----
12492  *          rs -----
12493  *               rd -----
12494  */
12495 std::string NMD::RINT_D(uint64 instruction)
12496 {
12497     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12498     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12499
12500     std::string ft = FPR(copy(ft_value));
12501     std::string fs = FPR(copy(fs_value));
12502
12503     return img::format("RINT.D %s, %s", ft, fs);
12504 }
12505
12506
12507 /*
12508  *
12509  *
12510  *   3         2         1
12511  *  10987654321098765432109876543210
12512  *  001000               x1110000101
12513  *     rt -----
12514  *          rs -----
12515  *               rd -----
12516  */
12517 std::string NMD::RINT_S(uint64 instruction)
12518 {
12519     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12520     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12521
12522     std::string ft = FPR(copy(ft_value));
12523     std::string fs = FPR(copy(fs_value));
12524
12525     return img::format("RINT.S %s, %s", ft, fs);
12526 }
12527
12528
12529 /*
12530  *
12531  *
12532  *   3         2         1
12533  *  10987654321098765432109876543210
12534  *  001000               x1110000101
12535  *     rt -----
12536  *          rs -----
12537  *               rd -----
12538  */
12539 std::string NMD::ROTR(uint64 instruction)
12540 {
12541     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12542     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12543     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
12544
12545     std::string rt = GPR(copy(rt_value));
12546     std::string rs = GPR(copy(rs_value));
12547     std::string shift = IMMEDIATE(copy(shift_value));
12548
12549     return img::format("ROTR %s, %s, %s", rt, rs, shift);
12550 }
12551
12552
12553 /*
12554  *
12555  *
12556  *   3         2         1
12557  *  10987654321098765432109876543210
12558  *  001000               x1110000101
12559  *     rt -----
12560  *          rs -----
12561  *               rd -----
12562  */
12563 std::string NMD::ROTRV(uint64 instruction)
12564 {
12565     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12566     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12567     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12568
12569     std::string rd = GPR(copy(rd_value));
12570     std::string rs = GPR(copy(rs_value));
12571     std::string rt = GPR(copy(rt_value));
12572
12573     return img::format("ROTRV %s, %s, %s", rd, rs, rt);
12574 }
12575
12576
12577 /*
12578  *
12579  *
12580  *   3         2         1
12581  *  10987654321098765432109876543210
12582  *  001000               x1110000101
12583  *     rt -----
12584  *          rs -----
12585  *               rd -----
12586  */
12587 std::string NMD::ROTX(uint64 instruction)
12588 {
12589     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12590     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12591     uint64 shiftx_value = extract_shiftx_10_9_8_7__s1(instruction);
12592     uint64 stripe_value = extract_stripe_6(instruction);
12593     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
12594
12595     std::string rt = GPR(copy(rt_value));
12596     std::string rs = GPR(copy(rs_value));
12597     std::string shift = IMMEDIATE(copy(shift_value));
12598     std::string shiftx = IMMEDIATE(copy(shiftx_value));
12599     std::string stripe = IMMEDIATE(copy(stripe_value));
12600
12601     return img::format("ROTX %s, %s, %s, %s, %s",
12602                        rt, rs, shift, shiftx, stripe);
12603 }
12604
12605
12606 /*
12607  *
12608  *
12609  *   3         2         1
12610  *  10987654321098765432109876543210
12611  *  001000               x1110000101
12612  *     rt -----
12613  *          rs -----
12614  *               rd -----
12615  */
12616 std::string NMD::ROUND_L_D(uint64 instruction)
12617 {
12618     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12619     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12620
12621     std::string ft = FPR(copy(ft_value));
12622     std::string fs = FPR(copy(fs_value));
12623
12624     return img::format("ROUND.L.D %s, %s", ft, fs);
12625 }
12626
12627
12628 /*
12629  *
12630  *
12631  *   3         2         1
12632  *  10987654321098765432109876543210
12633  *  001000               x1110000101
12634  *     rt -----
12635  *          rs -----
12636  *               rd -----
12637  */
12638 std::string NMD::ROUND_L_S(uint64 instruction)
12639 {
12640     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12641     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12642
12643     std::string ft = FPR(copy(ft_value));
12644     std::string fs = FPR(copy(fs_value));
12645
12646     return img::format("ROUND.L.S %s, %s", ft, fs);
12647 }
12648
12649
12650 /*
12651  *
12652  *
12653  *   3         2         1
12654  *  10987654321098765432109876543210
12655  *  001000               x1110000101
12656  *     rt -----
12657  *          rs -----
12658  *               rd -----
12659  */
12660 std::string NMD::ROUND_W_D(uint64 instruction)
12661 {
12662     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12663     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12664
12665     std::string ft = FPR(copy(ft_value));
12666     std::string fs = FPR(copy(fs_value));
12667
12668     return img::format("ROUND.W.D %s, %s", ft, fs);
12669 }
12670
12671
12672 /*
12673  *
12674  *
12675  *   3         2         1
12676  *  10987654321098765432109876543210
12677  *  001000               x1110000101
12678  *     rt -----
12679  *          rs -----
12680  *               rd -----
12681  */
12682 std::string NMD::ROUND_W_S(uint64 instruction)
12683 {
12684     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12685     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12686
12687     std::string ft = FPR(copy(ft_value));
12688     std::string fs = FPR(copy(fs_value));
12689
12690     return img::format("ROUND.W.S %s, %s", ft, fs);
12691 }
12692
12693
12694 /*
12695  *
12696  *
12697  *   3         2         1
12698  *  10987654321098765432109876543210
12699  *  001000               x1110000101
12700  *     rt -----
12701  *          rs -----
12702  *               rd -----
12703  */
12704 std::string NMD::RSQRT_D(uint64 instruction)
12705 {
12706     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12707     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12708
12709     std::string ft = FPR(copy(ft_value));
12710     std::string fs = FPR(copy(fs_value));
12711
12712     return img::format("RSQRT.D %s, %s", ft, fs);
12713 }
12714
12715
12716 /*
12717  *
12718  *
12719  *   3         2         1
12720  *  10987654321098765432109876543210
12721  *  001000               x1110000101
12722  *     rt -----
12723  *          rs -----
12724  *               rd -----
12725  */
12726 std::string NMD::RSQRT_S(uint64 instruction)
12727 {
12728     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12729     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12730
12731     std::string ft = FPR(copy(ft_value));
12732     std::string fs = FPR(copy(fs_value));
12733
12734     return img::format("RSQRT.S %s, %s", ft, fs);
12735 }
12736
12737
12738 /*
12739  *
12740  *
12741  *   3         2         1
12742  *  10987654321098765432109876543210
12743  *  001000               01001001101
12744  *     rt -----
12745  *          rs -----
12746  *               rd -----
12747  */
12748 std::string NMD::SAVE_16_(uint64 instruction)
12749 {
12750     uint64 rt1_value = extract_rtl_11(instruction);
12751     uint64 u_value = extract_u_7_6_5_4__s4(instruction);
12752     uint64 count_value = extract_count_3_2_1_0(instruction);
12753
12754     std::string u = IMMEDIATE(copy(u_value));
12755     return img::format("SAVE %s%s", u,
12756         save_restore_list(encode_rt1_from_rt(rt1_value), count_value, 0));
12757 }
12758
12759
12760 /*
12761  *
12762  *
12763  *   3         2         1
12764  *  10987654321098765432109876543210
12765  *  001000               01001001101
12766  *     rt -----
12767  *          rs -----
12768  *               rd -----
12769  */
12770 std::string NMD::SAVE_32_(uint64 instruction)
12771 {
12772     uint64 count_value = extract_count_19_18_17_16(instruction);
12773     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12774     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12775     uint64 gp_value = extract_gp_2(instruction);
12776
12777     std::string u = IMMEDIATE(copy(u_value));
12778     return img::format("SAVE %s%s", u,
12779                save_restore_list(rt_value, count_value, gp_value));
12780 }
12781
12782
12783 /*
12784  *
12785  *
12786  *   3         2         1
12787  *  10987654321098765432109876543210
12788  *  001000               01001001101
12789  *     rt -----
12790  *          rs -----
12791  *               rd -----
12792  */
12793 std::string NMD::SAVEF(uint64 instruction)
12794 {
12795     uint64 count_value = extract_count_19_18_17_16(instruction);
12796     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12797
12798     std::string u = IMMEDIATE(copy(u_value));
12799     std::string count = IMMEDIATE(copy(count_value));
12800
12801     return img::format("SAVEF %s, %s", u, count);
12802 }
12803
12804
12805 /*
12806  *
12807  *
12808  *   3         2         1
12809  *  10987654321098765432109876543210
12810  *  001000               01001001101
12811  *     rt -----
12812  *          rs -----
12813  *               rd -----
12814  */
12815 std::string NMD::SB_16_(uint64 instruction)
12816 {
12817     uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
12818     uint64 rs3_value = extract_rs3_6_5_4(instruction);
12819     uint64 u_value = extract_u_1_0(instruction);
12820
12821     std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
12822     std::string u = IMMEDIATE(copy(u_value));
12823     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
12824
12825     return img::format("SB %s, %s(%s)", rtz3, u, rs3);
12826 }
12827
12828
12829 /*
12830  *
12831  *
12832  *   3         2         1
12833  *  10987654321098765432109876543210
12834  *  001000               01001001101
12835  *     rt -----
12836  *          rs -----
12837  *               rd -----
12838  */
12839 std::string NMD::SB_GP_(uint64 instruction)
12840 {
12841     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12842     uint64 u_value = extract_u_17_to_0(instruction);
12843
12844     std::string rt = GPR(copy(rt_value));
12845     std::string u = IMMEDIATE(copy(u_value));
12846
12847     return img::format("SB %s, %s($%d)", rt, u, 28);
12848 }
12849
12850
12851 /*
12852  *
12853  *
12854  *   3         2         1
12855  *  10987654321098765432109876543210
12856  *  001000               01001001101
12857  *     rt -----
12858  *          rs -----
12859  *               rd -----
12860  */
12861 std::string NMD::SB_S9_(uint64 instruction)
12862 {
12863     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12864     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12865     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12866
12867     std::string rt = GPR(copy(rt_value));
12868     std::string s = IMMEDIATE(copy(s_value));
12869     std::string rs = GPR(copy(rs_value));
12870
12871     return img::format("SB %s, %s(%s)", rt, s, rs);
12872 }
12873
12874
12875 /*
12876  *
12877  *
12878  *   3         2         1
12879  *  10987654321098765432109876543210
12880  *  001000               01001001101
12881  *     rt -----
12882  *          rs -----
12883  *               rd -----
12884  */
12885 std::string NMD::SB_U12_(uint64 instruction)
12886 {
12887     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12888     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12889     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
12890
12891     std::string rt = GPR(copy(rt_value));
12892     std::string u = IMMEDIATE(copy(u_value));
12893     std::string rs = GPR(copy(rs_value));
12894
12895     return img::format("SB %s, %s(%s)", rt, u, rs);
12896 }
12897
12898
12899 /*
12900  *
12901  *
12902  *   3         2         1
12903  *  10987654321098765432109876543210
12904  *  001000               01001001101
12905  *     rt -----
12906  *          rs -----
12907  *               rd -----
12908  */
12909 std::string NMD::SBE(uint64 instruction)
12910 {
12911     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12912     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12913     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12914
12915     std::string rt = GPR(copy(rt_value));
12916     std::string s = IMMEDIATE(copy(s_value));
12917     std::string rs = GPR(copy(rs_value));
12918
12919     return img::format("SBE %s, %s(%s)", rt, s, rs);
12920 }
12921
12922
12923 /*
12924  *
12925  *
12926  *   3         2         1
12927  *  10987654321098765432109876543210
12928  *  001000               01001001101
12929  *     rt -----
12930  *          rs -----
12931  *               rd -----
12932  */
12933 std::string NMD::SBX(uint64 instruction)
12934 {
12935     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12936     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12937     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12938
12939     std::string rd = GPR(copy(rd_value));
12940     std::string rs = GPR(copy(rs_value));
12941     std::string rt = GPR(copy(rt_value));
12942
12943     return img::format("SBX %s, %s(%s)", rd, rs, rt);
12944 }
12945
12946
12947 /*
12948  *
12949  *
12950  *   3         2         1
12951  *  10987654321098765432109876543210
12952  *  001000               01001001101
12953  *     rt -----
12954  *          rs -----
12955  *               rd -----
12956  */
12957 std::string NMD::SC(uint64 instruction)
12958 {
12959     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12960     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12961     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
12962
12963     std::string rt = GPR(copy(rt_value));
12964     std::string s = IMMEDIATE(copy(s_value));
12965     std::string rs = GPR(copy(rs_value));
12966
12967     return img::format("SC %s, %s(%s)", rt, s, rs);
12968 }
12969
12970
12971 /*
12972  *
12973  *
12974  *   3         2         1
12975  *  10987654321098765432109876543210
12976  *  001000               01001001101
12977  *     rt -----
12978  *          rs -----
12979  *               rd -----
12980  */
12981 std::string NMD::SCD(uint64 instruction)
12982 {
12983     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12984     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12985     int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
12986
12987     std::string rt = GPR(copy(rt_value));
12988     std::string s = IMMEDIATE(copy(s_value));
12989     std::string rs = GPR(copy(rs_value));
12990
12991     return img::format("SCD %s, %s(%s)", rt, s, rs);
12992 }
12993
12994
12995 /*
12996  *
12997  *
12998  *   3         2         1
12999  *  10987654321098765432109876543210
13000  *  001000               01001001101
13001  *     rt -----
13002  *          rs -----
13003  *               rd -----
13004  */
13005 std::string NMD::SCDP(uint64 instruction)
13006 {
13007     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13008     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13009     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
13010
13011     std::string rt = GPR(copy(rt_value));
13012     std::string ru = GPR(copy(ru_value));
13013     std::string rs = GPR(copy(rs_value));
13014
13015     return img::format("SCDP %s, %s, (%s)", rt, ru, rs);
13016 }
13017
13018
13019 /*
13020  *
13021  *
13022  *   3         2         1
13023  *  10987654321098765432109876543210
13024  *  001000               01001001101
13025  *     rt -----
13026  *          rs -----
13027  *               rd -----
13028  */
13029 std::string NMD::SCE(uint64 instruction)
13030 {
13031     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13032     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13033     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
13034
13035     std::string rt = GPR(copy(rt_value));
13036     std::string s = IMMEDIATE(copy(s_value));
13037     std::string rs = GPR(copy(rs_value));
13038
13039     return img::format("SCE %s, %s(%s)", rt, s, rs);
13040 }
13041
13042
13043 /*
13044  *
13045  *
13046  *   3         2         1
13047  *  10987654321098765432109876543210
13048  *  001000               01001001101
13049  *     rt -----
13050  *          rs -----
13051  *               rd -----
13052  */
13053 std::string NMD::SCWP(uint64 instruction)
13054 {
13055     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13056     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13057     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
13058
13059     std::string rt = GPR(copy(rt_value));
13060     std::string ru = GPR(copy(ru_value));
13061     std::string rs = GPR(copy(rs_value));
13062
13063     return img::format("SCWP %s, %s, (%s)", rt, ru, rs);
13064 }
13065
13066
13067 /*
13068  *
13069  *
13070  *   3         2         1
13071  *  10987654321098765432109876543210
13072  *  001000               01001001101
13073  *     rt -----
13074  *          rs -----
13075  *               rd -----
13076  */
13077 std::string NMD::SCWPE(uint64 instruction)
13078 {
13079     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13080     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13081     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
13082
13083     std::string rt = GPR(copy(rt_value));
13084     std::string ru = GPR(copy(ru_value));
13085     std::string rs = GPR(copy(rs_value));
13086
13087     return img::format("SCWPE %s, %s, (%s)", rt, ru, rs);
13088 }
13089
13090
13091 /*
13092  *
13093  *
13094  *   3         2         1
13095  *  10987654321098765432109876543210
13096  *  001000               01001001101
13097  *     rt -----
13098  *          rs -----
13099  *               rd -----
13100  */
13101 std::string NMD::SD_GP_(uint64 instruction)
13102 {
13103     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13104     uint64 u_value = extract_u_20_to_3__s3(instruction);
13105
13106     std::string rt = GPR(copy(rt_value));
13107     std::string u = IMMEDIATE(copy(u_value));
13108
13109     return img::format("SD %s, %s($%d)", rt, u, 28);
13110 }
13111
13112
13113 /*
13114  *
13115  *
13116  *   3         2         1
13117  *  10987654321098765432109876543210
13118  *  001000               01001001101
13119  *     rt -----
13120  *          rs -----
13121  *               rd -----
13122  */
13123 std::string NMD::SD_S9_(uint64 instruction)
13124 {
13125     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13126     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13127     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13128
13129     std::string rt = GPR(copy(rt_value));
13130     std::string s = IMMEDIATE(copy(s_value));
13131     std::string rs = GPR(copy(rs_value));
13132
13133     return img::format("SD %s, %s(%s)", rt, s, rs);
13134 }
13135
13136
13137 /*
13138  *
13139  *
13140  *   3         2         1
13141  *  10987654321098765432109876543210
13142  *  001000               01001001101
13143  *     rt -----
13144  *          rs -----
13145  *               rd -----
13146  */
13147 std::string NMD::SD_U12_(uint64 instruction)
13148 {
13149     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13150     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13151     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13152
13153     std::string rt = GPR(copy(rt_value));
13154     std::string u = IMMEDIATE(copy(u_value));
13155     std::string rs = GPR(copy(rs_value));
13156
13157     return img::format("SD %s, %s(%s)", rt, u, rs);
13158 }
13159
13160
13161 /*
13162  *
13163  *
13164  *   3         2         1
13165  *  10987654321098765432109876543210
13166  *  001000               01001001101
13167  *     rt -----
13168  *          rs -----
13169  *               rd -----
13170  */
13171 std::string NMD::SDBBP_16_(uint64 instruction)
13172 {
13173     uint64 code_value = extract_code_2_1_0(instruction);
13174
13175     std::string code = IMMEDIATE(copy(code_value));
13176
13177     return img::format("SDBBP %s", code);
13178 }
13179
13180
13181 /*
13182  *
13183  *
13184  *   3         2         1
13185  *  10987654321098765432109876543210
13186  *  001000               01001001101
13187  *     rt -----
13188  *          rs -----
13189  *               rd -----
13190  */
13191 std::string NMD::SDBBP_32_(uint64 instruction)
13192 {
13193     uint64 code_value = extract_code_18_to_0(instruction);
13194
13195     std::string code = IMMEDIATE(copy(code_value));
13196
13197     return img::format("SDBBP %s", code);
13198 }
13199
13200
13201 /*
13202  *
13203  *
13204  *   3         2         1
13205  *  10987654321098765432109876543210
13206  *  001000               01001001101
13207  *     rt -----
13208  *          rs -----
13209  *               rd -----
13210  */
13211 std::string NMD::SDC1_GP_(uint64 instruction)
13212 {
13213     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13214     uint64 u_value = extract_u_17_to_2__s2(instruction);
13215
13216     std::string ft = FPR(copy(ft_value));
13217     std::string u = IMMEDIATE(copy(u_value));
13218
13219     return img::format("SDC1 %s, %s($%d)", ft, u, 28);
13220 }
13221
13222
13223 /*
13224  *
13225  *
13226  *   3         2         1
13227  *  10987654321098765432109876543210
13228  *  001000               01001001101
13229  *     rt -----
13230  *          rs -----
13231  *               rd -----
13232  */
13233 std::string NMD::SDC1_S9_(uint64 instruction)
13234 {
13235     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13236     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13237     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13238
13239     std::string ft = FPR(copy(ft_value));
13240     std::string s = IMMEDIATE(copy(s_value));
13241     std::string rs = GPR(copy(rs_value));
13242
13243     return img::format("SDC1 %s, %s(%s)", ft, s, rs);
13244 }
13245
13246
13247 /*
13248  *
13249  *
13250  *   3         2         1
13251  *  10987654321098765432109876543210
13252  *  001000               01001001101
13253  *     rt -----
13254  *          rs -----
13255  *               rd -----
13256  */
13257 std::string NMD::SDC1_U12_(uint64 instruction)
13258 {
13259     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13260     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13261     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13262
13263     std::string ft = FPR(copy(ft_value));
13264     std::string u = IMMEDIATE(copy(u_value));
13265     std::string rs = GPR(copy(rs_value));
13266
13267     return img::format("SDC1 %s, %s(%s)", ft, u, rs);
13268 }
13269
13270
13271 /*
13272  *
13273  *
13274  *   3         2         1
13275  *  10987654321098765432109876543210
13276  *  001000               01001001101
13277  *     rt -----
13278  *          rs -----
13279  *               rd -----
13280  */
13281 std::string NMD::SDC1X(uint64 instruction)
13282 {
13283     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13284     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13285     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
13286
13287     std::string ft = FPR(copy(ft_value));
13288     std::string rs = GPR(copy(rs_value));
13289     std::string rt = GPR(copy(rt_value));
13290
13291     return img::format("SDC1X %s, %s(%s)", ft, rs, rt);
13292 }
13293
13294
13295 /*
13296  *
13297  *
13298  *   3         2         1
13299  *  10987654321098765432109876543210
13300  *  001000               01001001101
13301  *     rt -----
13302  *          rs -----
13303  *               rd -----
13304  */
13305 std::string NMD::SDC1XS(uint64 instruction)
13306 {
13307     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13308     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13309     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
13310
13311     std::string ft = FPR(copy(ft_value));
13312     std::string rs = GPR(copy(rs_value));
13313     std::string rt = GPR(copy(rt_value));
13314
13315     return img::format("SDC1XS %s, %s(%s)", ft, rs, rt);
13316 }
13317
13318
13319 /*
13320  *
13321  *
13322  *   3         2         1
13323  *  10987654321098765432109876543210
13324  *  001000               01001001101
13325  *     rt -----
13326  *          rs -----
13327  *               rd -----
13328  */
13329 std::string NMD::SDC2(uint64 instruction)
13330 {
13331     uint64 cs_value = extract_cs_25_24_23_22_21(instruction);
13332     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13333     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13334
13335     std::string cs = CPR(copy(cs_value));
13336     std::string s = IMMEDIATE(copy(s_value));
13337     std::string rs = GPR(copy(rs_value));
13338
13339     return img::format("SDC2 %s, %s(%s)", cs, s, rs);
13340 }
13341
13342
13343 /*
13344  *
13345  *
13346  *   3         2         1
13347  *  10987654321098765432109876543210
13348  *  001000               01001001101
13349  *     rt -----
13350  *          rs -----
13351  *               rd -----
13352  */
13353 std::string NMD::SDM(uint64 instruction)
13354 {
13355     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13356     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13357     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13358     uint64 count3_value = extract_count3_14_13_12(instruction);
13359
13360     std::string rt = GPR(copy(rt_value));
13361     std::string s = IMMEDIATE(copy(s_value));
13362     std::string rs = GPR(copy(rs_value));
13363     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
13364
13365     return img::format("SDM %s, %s(%s), %s", rt, s, rs, count3);
13366 }
13367
13368
13369 /*
13370  *
13371  *
13372  *   3         2         1
13373  *  10987654321098765432109876543210
13374  *  001000               01001001101
13375  *     rt -----
13376  *          rs -----
13377  *               rd -----
13378  */
13379 std::string NMD::SDPC_48_(uint64 instruction)
13380 {
13381     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
13382     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
13383
13384     std::string rt = GPR(copy(rt_value));
13385     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
13386
13387     return img::format("SDPC %s, %s", rt, s);
13388 }
13389
13390
13391 /*
13392  *
13393  *
13394  *   3         2         1
13395  *  10987654321098765432109876543210
13396  *  001000               01001001101
13397  *     rt -----
13398  *          rs -----
13399  *               rd -----
13400  */
13401 std::string NMD::SDXS(uint64 instruction)
13402 {
13403     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13404     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13405     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13406
13407     std::string rd = GPR(copy(rd_value));
13408     std::string rs = GPR(copy(rs_value));
13409     std::string rt = GPR(copy(rt_value));
13410
13411     return img::format("SDXS %s, %s(%s)", rd, rs, rt);
13412 }
13413
13414
13415 /*
13416  *
13417  *
13418  *   3         2         1
13419  *  10987654321098765432109876543210
13420  *  001000               01001001101
13421  *     rt -----
13422  *          rs -----
13423  *               rd -----
13424  */
13425 std::string NMD::SDX(uint64 instruction)
13426 {
13427     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13428     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13429     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13430
13431     std::string rd = GPR(copy(rd_value));
13432     std::string rs = GPR(copy(rs_value));
13433     std::string rt = GPR(copy(rt_value));
13434
13435     return img::format("SDX %s, %s(%s)", rd, rs, rt);
13436 }
13437
13438
13439 /*
13440  *
13441  *
13442  *   3         2         1
13443  *  10987654321098765432109876543210
13444  *  001000               01001001101
13445  *     rt -----
13446  *          rs -----
13447  *               rd -----
13448  */
13449 std::string NMD::SEB(uint64 instruction)
13450 {
13451     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13452     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13453
13454     std::string rt = GPR(copy(rt_value));
13455     std::string rs = GPR(copy(rs_value));
13456
13457     return img::format("SEB %s, %s", rt, rs);
13458 }
13459
13460
13461 /*
13462  *
13463  *
13464  *   3         2         1
13465  *  10987654321098765432109876543210
13466  *  001000               01001001101
13467  *     rt -----
13468  *          rs -----
13469  *               rd -----
13470  */
13471 std::string NMD::SEH(uint64 instruction)
13472 {
13473     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13474     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13475
13476     std::string rt = GPR(copy(rt_value));
13477     std::string rs = GPR(copy(rs_value));
13478
13479     return img::format("SEH %s, %s", rt, rs);
13480 }
13481
13482
13483 /*
13484  *
13485  *
13486  *   3         2         1
13487  *  10987654321098765432109876543210
13488  *  001000               01001001101
13489  *     rt -----
13490  *          rs -----
13491  *               rd -----
13492  */
13493 std::string NMD::SEL_D(uint64 instruction)
13494 {
13495     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13496     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13497     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13498
13499     std::string fd = FPR(copy(fd_value));
13500     std::string fs = FPR(copy(fs_value));
13501     std::string ft = FPR(copy(ft_value));
13502
13503     return img::format("SEL.D %s, %s, %s", fd, fs, ft);
13504 }
13505
13506
13507 /*
13508  *
13509  *
13510  *   3         2         1
13511  *  10987654321098765432109876543210
13512  *  001000               01001001101
13513  *     rt -----
13514  *          rs -----
13515  *               rd -----
13516  */
13517 std::string NMD::SEL_S(uint64 instruction)
13518 {
13519     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13520     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13521     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13522
13523     std::string fd = FPR(copy(fd_value));
13524     std::string fs = FPR(copy(fs_value));
13525     std::string ft = FPR(copy(ft_value));
13526
13527     return img::format("SEL.S %s, %s, %s", fd, fs, ft);
13528 }
13529
13530
13531 /*
13532  *
13533  *
13534  *   3         2         1
13535  *  10987654321098765432109876543210
13536  *  001000               01001001101
13537  *     rt -----
13538  *          rs -----
13539  *               rd -----
13540  */
13541 std::string NMD::SELEQZ_D(uint64 instruction)
13542 {
13543     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13544     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13545     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13546
13547     std::string fd = FPR(copy(fd_value));
13548     std::string fs = FPR(copy(fs_value));
13549     std::string ft = FPR(copy(ft_value));
13550
13551     return img::format("SELEQZ.D %s, %s, %s", fd, fs, ft);
13552 }
13553
13554
13555 /*
13556  *
13557  *
13558  *   3         2         1
13559  *  10987654321098765432109876543210
13560  *  001000               01001001101
13561  *     rt -----
13562  *          rs -----
13563  *               rd -----
13564  */
13565 std::string NMD::SELEQZ_S(uint64 instruction)
13566 {
13567     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13568     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13569     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13570
13571     std::string fd = FPR(copy(fd_value));
13572     std::string fs = FPR(copy(fs_value));
13573     std::string ft = FPR(copy(ft_value));
13574
13575     return img::format("SELEQZ.S %s, %s, %s", fd, fs, ft);
13576 }
13577
13578
13579 /*
13580  *
13581  *
13582  *   3         2         1
13583  *  10987654321098765432109876543210
13584  *  001000               01001001101
13585  *     rt -----
13586  *          rs -----
13587  *               rd -----
13588  */
13589 std::string NMD::SELNEZ_D(uint64 instruction)
13590 {
13591     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13592     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13593     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13594
13595     std::string fd = FPR(copy(fd_value));
13596     std::string fs = FPR(copy(fs_value));
13597     std::string ft = FPR(copy(ft_value));
13598
13599     return img::format("SELNEZ.D %s, %s, %s", fd, fs, ft);
13600 }
13601
13602
13603 /*
13604  *
13605  *
13606  *   3         2         1
13607  *  10987654321098765432109876543210
13608  *  001000               01001001101
13609  *     rt -----
13610  *          rs -----
13611  *               rd -----
13612  */
13613 std::string NMD::SELNEZ_S(uint64 instruction)
13614 {
13615     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13616     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13617     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13618
13619     std::string fd = FPR(copy(fd_value));
13620     std::string fs = FPR(copy(fs_value));
13621     std::string ft = FPR(copy(ft_value));
13622
13623     return img::format("SELNEZ.S %s, %s, %s", fd, fs, ft);
13624 }
13625
13626
13627 /*
13628  *
13629  *
13630  *   3         2         1
13631  *  10987654321098765432109876543210
13632  *  001000               01001001101
13633  *     rt -----
13634  *          rs -----
13635  *               rd -----
13636  */
13637 std::string NMD::SEQI(uint64 instruction)
13638 {
13639     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13640     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13641     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13642
13643     std::string rt = GPR(copy(rt_value));
13644     std::string rs = GPR(copy(rs_value));
13645     std::string u = IMMEDIATE(copy(u_value));
13646
13647     return img::format("SEQI %s, %s, %s", rt, rs, u);
13648 }
13649
13650
13651 /*
13652  *
13653  *
13654  *   3         2         1
13655  *  10987654321098765432109876543210
13656  *  001000               01001001101
13657  *     rt -----
13658  *          rs -----
13659  *               rd -----
13660  */
13661 std::string NMD::SH_16_(uint64 instruction)
13662 {
13663     uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
13664     uint64 rs3_value = extract_rs3_6_5_4(instruction);
13665     uint64 u_value = extract_u_2_1__s1(instruction);
13666
13667     std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
13668     std::string u = IMMEDIATE(copy(u_value));
13669     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
13670
13671     return img::format("SH %s, %s(%s)", rtz3, u, rs3);
13672 }
13673
13674
13675 /*
13676  *
13677  *
13678  *   3         2         1
13679  *  10987654321098765432109876543210
13680  *  001000               01001001101
13681  *     rt -----
13682  *          rs -----
13683  *               rd -----
13684  */
13685 std::string NMD::SH_GP_(uint64 instruction)
13686 {
13687     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13688     uint64 u_value = extract_u_17_to_1__s1(instruction);
13689
13690     std::string rt = GPR(copy(rt_value));
13691     std::string u = IMMEDIATE(copy(u_value));
13692
13693     return img::format("SH %s, %s($%d)", rt, u, 28);
13694 }
13695
13696
13697 /*
13698  *
13699  *
13700  *   3         2         1
13701  *  10987654321098765432109876543210
13702  *  001000               01001001101
13703  *     rt -----
13704  *          rs -----
13705  *               rd -----
13706  */
13707 std::string NMD::SH_S9_(uint64 instruction)
13708 {
13709     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13710     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13711     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13712
13713     std::string rt = GPR(copy(rt_value));
13714     std::string s = IMMEDIATE(copy(s_value));
13715     std::string rs = GPR(copy(rs_value));
13716
13717     return img::format("SH %s, %s(%s)", rt, s, rs);
13718 }
13719
13720
13721 /*
13722  *
13723  *
13724  *   3         2         1
13725  *  10987654321098765432109876543210
13726  *  001000               01001001101
13727  *     rt -----
13728  *          rs -----
13729  *               rd -----
13730  */
13731 std::string NMD::SH_U12_(uint64 instruction)
13732 {
13733     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13734     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13735     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13736
13737     std::string rt = GPR(copy(rt_value));
13738     std::string u = IMMEDIATE(copy(u_value));
13739     std::string rs = GPR(copy(rs_value));
13740
13741     return img::format("SH %s, %s(%s)", rt, u, rs);
13742 }
13743
13744
13745 /*
13746  *
13747  *
13748  *   3         2         1
13749  *  10987654321098765432109876543210
13750  *  001000               01001001101
13751  *     rt -----
13752  *          rs -----
13753  *               rd -----
13754  */
13755 std::string NMD::SHE(uint64 instruction)
13756 {
13757     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13758     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13759     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13760
13761     std::string rt = GPR(copy(rt_value));
13762     std::string s = IMMEDIATE(copy(s_value));
13763     std::string rs = GPR(copy(rs_value));
13764
13765     return img::format("SHE %s, %s(%s)", rt, s, rs);
13766 }
13767
13768
13769 /*
13770  * SHILO ac, shift - Shift an Accumulator Value Leaving the Result in the Same
13771  *                     Accumulator
13772  *
13773  *   3         2         1
13774  *  10987654321098765432109876543210
13775  *  001000xxxx        xxxx0000011101
13776  *      shift ------
13777  *               ac --
13778  */
13779 std::string NMD::SHILO(uint64 instruction)
13780 {
13781     int64 shift_value = extract_shift__se5_21_20_19_18_17_16(instruction);
13782     uint64 ac_value = extract_ac_13_12(instruction);
13783
13784     std::string shift = IMMEDIATE(copy(shift_value));
13785     std::string ac = AC(copy(ac_value));
13786
13787     return img::format("SHILO %s, %s", ac, shift);
13788 }
13789
13790
13791 /*
13792  * SHILOV ac, rs - Variable Shift of Accumulator Value Leaving the Result in
13793  *                   the Same Accumulator
13794  *
13795  *   3         2         1
13796  *  10987654321098765432109876543210
13797  *  001000xxxxx       01001001111111
13798  *          rs -----
13799  *               ac --
13800  */
13801 std::string NMD::SHILOV(uint64 instruction)
13802 {
13803     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13804     uint64 ac_value = extract_ac_13_12(instruction);
13805
13806     std::string rs = GPR(copy(rs_value));
13807     std::string ac = AC(copy(ac_value));
13808
13809     return img::format("SHILOV %s, %s", ac, rs);
13810 }
13811
13812
13813 /*
13814  * SHLL.PH rt, rs, sa - Shift Left Logical Vector Pair Halfwords
13815  *
13816  *   3         2         1
13817  *  10987654321098765432109876543210
13818  *  001000              001110110101
13819  *     rt -----
13820  *          rs -----
13821  *               sa ----
13822  */
13823 std::string NMD::SHLL_PH(uint64 instruction)
13824 {
13825     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13826     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13827     uint64 sa_value = extract_sa_15_14_13_12(instruction);
13828
13829     std::string rt = GPR(copy(rt_value));
13830     std::string rs = GPR(copy(rs_value));
13831     std::string sa = IMMEDIATE(copy(sa_value));
13832
13833     return img::format("SHLL.PH %s, %s, %s", rt, rs, sa);
13834 }
13835
13836
13837 /*
13838  * SHLL.QB rt, rs, sa - Shift Left Logical Vector Quad Bytes
13839  *
13840  *   3         2         1
13841  *  10987654321098765432109876543210
13842  *  001000             0100001111111
13843  *     rt -----
13844  *          rs -----
13845  *               sa ---
13846  */
13847 std::string NMD::SHLL_QB(uint64 instruction)
13848 {
13849     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13850     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13851     uint64 sa_value = extract_sa_15_14_13(instruction);
13852
13853     std::string rt = GPR(copy(rt_value));
13854     std::string rs = GPR(copy(rs_value));
13855     std::string sa = IMMEDIATE(copy(sa_value));
13856
13857     return img::format("SHLL.QB %s, %s, %s", rt, rs, sa);
13858 }
13859
13860
13861 /*
13862  * SHLL_S.PH rt, rs, sa - Shift Left Logical Vector Pair Halfwords (saturated)
13863  *
13864  *   3         2         1
13865  *  10987654321098765432109876543210
13866  *  001000              001110110101
13867  *     rt -----
13868  *          rs -----
13869  *               sa ----
13870  */
13871 std::string NMD::SHLL_S_PH(uint64 instruction)
13872 {
13873     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13874     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13875     uint64 sa_value = extract_sa_15_14_13_12(instruction);
13876
13877     std::string rt = GPR(copy(rt_value));
13878     std::string rs = GPR(copy(rs_value));
13879     std::string sa = IMMEDIATE(copy(sa_value));
13880
13881     return img::format("SHLL_S.PH %s, %s, %s", rt, rs, sa);
13882 }
13883
13884
13885 /*
13886  *
13887  *
13888  *   3         2         1
13889  *  10987654321098765432109876543210
13890  *  001000               01001001101
13891  *     rt -----
13892  *          rs -----
13893  *               rd -----
13894  */
13895 std::string NMD::SHLL_S_W(uint64 instruction)
13896 {
13897     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13898     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13899     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
13900
13901     std::string rt = GPR(copy(rt_value));
13902     std::string rs = GPR(copy(rs_value));
13903     std::string sa = IMMEDIATE(copy(sa_value));
13904
13905     return img::format("SHLL_S.W %s, %s, %s", rt, rs, sa);
13906 }
13907
13908
13909 /*
13910  *
13911  *
13912  *   3         2         1
13913  *  10987654321098765432109876543210
13914  *  001000               01001001101
13915  *     rt -----
13916  *          rs -----
13917  *               rd -----
13918  */
13919 std::string NMD::SHLLV_PH(uint64 instruction)
13920 {
13921     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13922     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13923     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13924
13925     std::string rd = GPR(copy(rd_value));
13926     std::string rt = GPR(copy(rt_value));
13927     std::string rs = GPR(copy(rs_value));
13928
13929     return img::format("SHLLV.PH %s, %s, %s", rd, rt, rs);
13930 }
13931
13932
13933 /*
13934  *
13935  *
13936  *   3         2         1
13937  *  10987654321098765432109876543210
13938  *  001000               01001001101
13939  *     rt -----
13940  *          rs -----
13941  *               rd -----
13942  */
13943 std::string NMD::SHLLV_QB(uint64 instruction)
13944 {
13945     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13946     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13947     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13948
13949     std::string rd = GPR(copy(rd_value));
13950     std::string rt = GPR(copy(rt_value));
13951     std::string rs = GPR(copy(rs_value));
13952
13953     return img::format("SHLLV.QB %s, %s, %s", rd, rt, rs);
13954 }
13955
13956
13957 /*
13958  *
13959  *
13960  *   3         2         1
13961  *  10987654321098765432109876543210
13962  *  001000               01001001101
13963  *     rt -----
13964  *          rs -----
13965  *               rd -----
13966  */
13967 std::string NMD::SHLLV_S_PH(uint64 instruction)
13968 {
13969     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13970     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13971     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13972
13973     std::string rd = GPR(copy(rd_value));
13974     std::string rt = GPR(copy(rt_value));
13975     std::string rs = GPR(copy(rs_value));
13976
13977     return img::format("SHLLV_S.PH %s, %s, %s", rd, rt, rs);
13978 }
13979
13980
13981 /*
13982  *
13983  *
13984  *   3         2         1
13985  *  10987654321098765432109876543210
13986  *  001000               01001001101
13987  *     rt -----
13988  *          rs -----
13989  *               rd -----
13990  */
13991 std::string NMD::SHLLV_S_W(uint64 instruction)
13992 {
13993     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13994     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13995     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13996
13997     std::string rd = GPR(copy(rd_value));
13998     std::string rt = GPR(copy(rt_value));
13999     std::string rs = GPR(copy(rs_value));
14000
14001     return img::format("SHLLV_S.W %s, %s, %s", rd, rt, rs);
14002 }
14003
14004
14005 /*
14006  *
14007  *
14008  *   3         2         1
14009  *  10987654321098765432109876543210
14010  *  001000               01001001101
14011  *     rt -----
14012  *          rs -----
14013  *               rd -----
14014  */
14015 std::string NMD::SHRA_PH(uint64 instruction)
14016 {
14017     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14018     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14019     uint64 sa_value = extract_sa_15_14_13_12(instruction);
14020
14021     std::string rt = GPR(copy(rt_value));
14022     std::string rs = GPR(copy(rs_value));
14023     std::string sa = IMMEDIATE(copy(sa_value));
14024
14025     return img::format("SHRA.PH %s, %s, %s", rt, rs, sa);
14026 }
14027
14028
14029 /*
14030  *
14031  *
14032  *   3         2         1
14033  *  10987654321098765432109876543210
14034  *  001000               01001001101
14035  *     rt -----
14036  *          rs -----
14037  *               rd -----
14038  */
14039 std::string NMD::SHRA_QB(uint64 instruction)
14040 {
14041     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14042     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14043     uint64 sa_value = extract_sa_15_14_13(instruction);
14044
14045     std::string rt = GPR(copy(rt_value));
14046     std::string rs = GPR(copy(rs_value));
14047     std::string sa = IMMEDIATE(copy(sa_value));
14048
14049     return img::format("SHRA.QB %s, %s, %s", rt, rs, sa);
14050 }
14051
14052
14053 /*
14054  *
14055  *
14056  *   3         2         1
14057  *  10987654321098765432109876543210
14058  *  001000               01001001101
14059  *     rt -----
14060  *          rs -----
14061  *               rd -----
14062  */
14063 std::string NMD::SHRA_R_PH(uint64 instruction)
14064 {
14065     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14066     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14067     uint64 sa_value = extract_sa_15_14_13_12(instruction);
14068
14069     std::string rt = GPR(copy(rt_value));
14070     std::string rs = GPR(copy(rs_value));
14071     std::string sa = IMMEDIATE(copy(sa_value));
14072
14073     return img::format("SHRA_R.PH %s, %s, %s", rt, rs, sa);
14074 }
14075
14076
14077 /*
14078  *
14079  *
14080  *   3         2         1
14081  *  10987654321098765432109876543210
14082  *  001000               01001001101
14083  *     rt -----
14084  *          rs -----
14085  *               rd -----
14086  */
14087 std::string NMD::SHRA_R_QB(uint64 instruction)
14088 {
14089     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14090     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14091     uint64 sa_value = extract_sa_15_14_13(instruction);
14092
14093     std::string rt = GPR(copy(rt_value));
14094     std::string rs = GPR(copy(rs_value));
14095     std::string sa = IMMEDIATE(copy(sa_value));
14096
14097     return img::format("SHRA_R.QB %s, %s, %s", rt, rs, sa);
14098 }
14099
14100
14101 /*
14102  *
14103  *
14104  *   3         2         1
14105  *  10987654321098765432109876543210
14106  *  001000               01001001101
14107  *     rt -----
14108  *          rs -----
14109  *               rd -----
14110  */
14111 std::string NMD::SHRA_R_W(uint64 instruction)
14112 {
14113     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14114     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14115     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
14116
14117     std::string rt = GPR(copy(rt_value));
14118     std::string rs = GPR(copy(rs_value));
14119     std::string sa = IMMEDIATE(copy(sa_value));
14120
14121     return img::format("SHRA_R.W %s, %s, %s", rt, rs, sa);
14122 }
14123
14124
14125 /*
14126  *
14127  *
14128  *   3         2         1
14129  *  10987654321098765432109876543210
14130  *  001000               01001001101
14131  *     rt -----
14132  *          rs -----
14133  *               rd -----
14134  */
14135 std::string NMD::SHRAV_PH(uint64 instruction)
14136 {
14137     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14138     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14139     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14140
14141     std::string rd = GPR(copy(rd_value));
14142     std::string rt = GPR(copy(rt_value));
14143     std::string rs = GPR(copy(rs_value));
14144
14145     return img::format("SHRAV.PH %s, %s, %s", rd, rt, rs);
14146 }
14147
14148
14149 /*
14150  *
14151  *
14152  *   3         2         1
14153  *  10987654321098765432109876543210
14154  *  001000               01001001101
14155  *     rt -----
14156  *          rs -----
14157  *               rd -----
14158  */
14159 std::string NMD::SHRAV_QB(uint64 instruction)
14160 {
14161     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14162     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14163     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14164
14165     std::string rd = GPR(copy(rd_value));
14166     std::string rt = GPR(copy(rt_value));
14167     std::string rs = GPR(copy(rs_value));
14168
14169     return img::format("SHRAV.QB %s, %s, %s", rd, rt, rs);
14170 }
14171
14172
14173 /*
14174  *
14175  *
14176  *   3         2         1
14177  *  10987654321098765432109876543210
14178  *  001000               01001001101
14179  *     rt -----
14180  *          rs -----
14181  *               rd -----
14182  */
14183 std::string NMD::SHRAV_R_PH(uint64 instruction)
14184 {
14185     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14186     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14187     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14188
14189     std::string rd = GPR(copy(rd_value));
14190     std::string rt = GPR(copy(rt_value));
14191     std::string rs = GPR(copy(rs_value));
14192
14193     return img::format("SHRAV_R.PH %s, %s, %s", rd, rt, rs);
14194 }
14195
14196
14197 /*
14198  *
14199  *
14200  *   3         2         1
14201  *  10987654321098765432109876543210
14202  *  001000               01001001101
14203  *     rt -----
14204  *          rs -----
14205  *               rd -----
14206  */
14207 std::string NMD::SHRAV_R_QB(uint64 instruction)
14208 {
14209     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14210     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14211     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14212
14213     std::string rd = GPR(copy(rd_value));
14214     std::string rt = GPR(copy(rt_value));
14215     std::string rs = GPR(copy(rs_value));
14216
14217     return img::format("SHRAV_R.QB %s, %s, %s", rd, rt, rs);
14218 }
14219
14220
14221 /*
14222  *
14223  *
14224  *   3         2         1
14225  *  10987654321098765432109876543210
14226  *  001000               01001001101
14227  *     rt -----
14228  *          rs -----
14229  *               rd -----
14230  */
14231 std::string NMD::SHRAV_R_W(uint64 instruction)
14232 {
14233     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14234     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14235     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14236
14237     std::string rd = GPR(copy(rd_value));
14238     std::string rt = GPR(copy(rt_value));
14239     std::string rs = GPR(copy(rs_value));
14240
14241     return img::format("SHRAV_R.W %s, %s, %s", rd, rt, rs);
14242 }
14243
14244
14245 /*
14246  *
14247  *
14248  *   3         2         1
14249  *  10987654321098765432109876543210
14250  *  001000               01001001101
14251  *     rt -----
14252  *          rs -----
14253  *               rd -----
14254  */
14255 std::string NMD::SHRL_PH(uint64 instruction)
14256 {
14257     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14258     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14259     uint64 sa_value = extract_sa_15_14_13_12(instruction);
14260
14261     std::string rt = GPR(copy(rt_value));
14262     std::string rs = GPR(copy(rs_value));
14263     std::string sa = IMMEDIATE(copy(sa_value));
14264
14265     return img::format("SHRL.PH %s, %s, %s", rt, rs, sa);
14266 }
14267
14268
14269 /*
14270  *
14271  *
14272  *   3         2         1
14273  *  10987654321098765432109876543210
14274  *  001000               01001001101
14275  *     rt -----
14276  *          rs -----
14277  *               rd -----
14278  */
14279 std::string NMD::SHRL_QB(uint64 instruction)
14280 {
14281     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14282     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14283     uint64 sa_value = extract_sa_15_14_13(instruction);
14284
14285     std::string rt = GPR(copy(rt_value));
14286     std::string rs = GPR(copy(rs_value));
14287     std::string sa = IMMEDIATE(copy(sa_value));
14288
14289     return img::format("SHRL.QB %s, %s, %s", rt, rs, sa);
14290 }
14291
14292
14293 /*
14294  *
14295  *
14296  *   3         2         1
14297  *  10987654321098765432109876543210
14298  *  001000               01001001101
14299  *     rt -----
14300  *          rs -----
14301  *               rd -----
14302  */
14303 std::string NMD::SHRLV_PH(uint64 instruction)
14304 {
14305     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14306     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14307     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14308
14309     std::string rd = GPR(copy(rd_value));
14310     std::string rt = GPR(copy(rt_value));
14311     std::string rs = GPR(copy(rs_value));
14312
14313     return img::format("SHRLV.PH %s, %s, %s", rd, rt, rs);
14314 }
14315
14316
14317 /*
14318  *
14319  *
14320  *   3         2         1
14321  *  10987654321098765432109876543210
14322  *  001000               01001001101
14323  *     rt -----
14324  *          rs -----
14325  *               rd -----
14326  */
14327 std::string NMD::SHRLV_QB(uint64 instruction)
14328 {
14329     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14330     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14331     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14332
14333     std::string rd = GPR(copy(rd_value));
14334     std::string rt = GPR(copy(rt_value));
14335     std::string rs = GPR(copy(rs_value));
14336
14337     return img::format("SHRLV.QB %s, %s, %s", rd, rt, rs);
14338 }
14339
14340
14341 /*
14342  *
14343  *
14344  *   3         2         1
14345  *  10987654321098765432109876543210
14346  *  001000               01001001101
14347  *     rt -----
14348  *          rs -----
14349  *               rd -----
14350  */
14351 std::string NMD::SHX(uint64 instruction)
14352 {
14353     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14354     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14355     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14356
14357     std::string rd = GPR(copy(rd_value));
14358     std::string rs = GPR(copy(rs_value));
14359     std::string rt = GPR(copy(rt_value));
14360
14361     return img::format("SHX %s, %s(%s)", rd, rs, rt);
14362 }
14363
14364
14365 /*
14366  *
14367  *
14368  *   3         2         1
14369  *  10987654321098765432109876543210
14370  *  001000               01001001101
14371  *     rt -----
14372  *          rs -----
14373  *               rd -----
14374  */
14375 std::string NMD::SHXS(uint64 instruction)
14376 {
14377     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14378     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14379     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14380
14381     std::string rd = GPR(copy(rd_value));
14382     std::string rs = GPR(copy(rs_value));
14383     std::string rt = GPR(copy(rt_value));
14384
14385     return img::format("SHXS %s, %s(%s)", rd, rs, rt);
14386 }
14387
14388
14389 /*
14390  *
14391  *
14392  *   3         2         1
14393  *  10987654321098765432109876543210
14394  *  001000               01001001101
14395  *     rt -----
14396  *          rs -----
14397  *               rd -----
14398  */
14399 std::string NMD::SIGRIE(uint64 instruction)
14400 {
14401     uint64 code_value = extract_code_18_to_0(instruction);
14402
14403     std::string code = IMMEDIATE(copy(code_value));
14404
14405     return img::format("SIGRIE %s", code);
14406 }
14407
14408
14409 /*
14410  *
14411  *
14412  *   3         2         1
14413  *  10987654321098765432109876543210
14414  *  001000               01001001101
14415  *     rt -----
14416  *          rs -----
14417  *               rd -----
14418  */
14419 std::string NMD::SLL_16_(uint64 instruction)
14420 {
14421     uint64 rt3_value = extract_rt3_9_8_7(instruction);
14422     uint64 rs3_value = extract_rs3_6_5_4(instruction);
14423     uint64 shift3_value = extract_shift3_2_1_0(instruction);
14424
14425     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
14426     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
14427     std::string shift3 = IMMEDIATE(encode_shift3_from_shift(shift3_value));
14428
14429     return img::format("SLL %s, %s, %s", rt3, rs3, shift3);
14430 }
14431
14432
14433 /*
14434  *
14435  *
14436  *   3         2         1
14437  *  10987654321098765432109876543210
14438  *  001000               01001001101
14439  *     rt -----
14440  *          rs -----
14441  *               rd -----
14442  */
14443 std::string NMD::SLL_32_(uint64 instruction)
14444 {
14445     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14446     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14447     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
14448
14449     std::string rt = GPR(copy(rt_value));
14450     std::string rs = GPR(copy(rs_value));
14451     std::string shift = IMMEDIATE(copy(shift_value));
14452
14453     return img::format("SLL %s, %s, %s", rt, rs, shift);
14454 }
14455
14456
14457 /*
14458  *
14459  *
14460  *   3         2         1
14461  *  10987654321098765432109876543210
14462  *  001000               01001001101
14463  *     rt -----
14464  *          rs -----
14465  *               rd -----
14466  */
14467 std::string NMD::SLLV(uint64 instruction)
14468 {
14469     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14470     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14471     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14472
14473     std::string rd = GPR(copy(rd_value));
14474     std::string rs = GPR(copy(rs_value));
14475     std::string rt = GPR(copy(rt_value));
14476
14477     return img::format("SLLV %s, %s, %s", rd, rs, rt);
14478 }
14479
14480
14481 /*
14482  *
14483  *
14484  *   3         2         1
14485  *  10987654321098765432109876543210
14486  *  001000               01001001101
14487  *     rt -----
14488  *          rs -----
14489  *               rd -----
14490  */
14491 std::string NMD::SLT(uint64 instruction)
14492 {
14493     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14494     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14495     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14496
14497     std::string rd = GPR(copy(rd_value));
14498     std::string rs = GPR(copy(rs_value));
14499     std::string rt = GPR(copy(rt_value));
14500
14501     return img::format("SLT %s, %s, %s", rd, rs, rt);
14502 }
14503
14504
14505 /*
14506  *
14507  *
14508  *   3         2         1
14509  *  10987654321098765432109876543210
14510  *  001000               01001001101
14511  *     rt -----
14512  *          rs -----
14513  *               rd -----
14514  */
14515 std::string NMD::SLTI(uint64 instruction)
14516 {
14517     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14518     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14519     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
14520
14521     std::string rt = GPR(copy(rt_value));
14522     std::string rs = GPR(copy(rs_value));
14523     std::string u = IMMEDIATE(copy(u_value));
14524
14525     return img::format("SLTI %s, %s, %s", rt, rs, u);
14526 }
14527
14528
14529 /*
14530  *
14531  *
14532  *   3         2         1
14533  *  10987654321098765432109876543210
14534  *  001000               01001001101
14535  *     rt -----
14536  *          rs -----
14537  *               rd -----
14538  */
14539 std::string NMD::SLTIU(uint64 instruction)
14540 {
14541     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14542     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14543     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
14544
14545     std::string rt = GPR(copy(rt_value));
14546     std::string rs = GPR(copy(rs_value));
14547     std::string u = IMMEDIATE(copy(u_value));
14548
14549     return img::format("SLTIU %s, %s, %s", rt, rs, u);
14550 }
14551
14552
14553 /*
14554  *
14555  *
14556  *   3         2         1
14557  *  10987654321098765432109876543210
14558  *  001000               01001001101
14559  *     rt -----
14560  *          rs -----
14561  *               rd -----
14562  */
14563 std::string NMD::SLTU(uint64 instruction)
14564 {
14565     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14566     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14567     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14568
14569     std::string rd = GPR(copy(rd_value));
14570     std::string rs = GPR(copy(rs_value));
14571     std::string rt = GPR(copy(rt_value));
14572
14573     return img::format("SLTU %s, %s, %s", rd, rs, rt);
14574 }
14575
14576
14577 /*
14578  *
14579  *
14580  *   3         2         1
14581  *  10987654321098765432109876543210
14582  *  001000               01001001101
14583  *     rt -----
14584  *          rs -----
14585  *               rd -----
14586  */
14587 std::string NMD::SOV(uint64 instruction)
14588 {
14589     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14590     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14591     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14592
14593     std::string rd = GPR(copy(rd_value));
14594     std::string rs = GPR(copy(rs_value));
14595     std::string rt = GPR(copy(rt_value));
14596
14597     return img::format("SOV %s, %s, %s", rd, rs, rt);
14598 }
14599
14600
14601 /*
14602  *
14603  *
14604  *   3         2         1
14605  *  10987654321098765432109876543210
14606  *  001000               01001001101
14607  *     rt -----
14608  *          rs -----
14609  *               rd -----
14610  */
14611 std::string NMD::SPECIAL2(uint64 instruction)
14612 {
14613     uint64 op_value = extract_op_25_to_3(instruction);
14614
14615     std::string op = IMMEDIATE(copy(op_value));
14616
14617     return img::format("SPECIAL2 %s", op);
14618 }
14619
14620
14621 /*
14622  *
14623  *
14624  *   3         2         1
14625  *  10987654321098765432109876543210
14626  *  001000               01001001101
14627  *     rt -----
14628  *          rs -----
14629  *               rd -----
14630  */
14631 std::string NMD::SQRT_D(uint64 instruction)
14632 {
14633     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14634     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14635
14636     std::string ft = FPR(copy(ft_value));
14637     std::string fs = FPR(copy(fs_value));
14638
14639     return img::format("SQRT.D %s, %s", ft, fs);
14640 }
14641
14642
14643 /*
14644  *
14645  *
14646  *   3         2         1
14647  *  10987654321098765432109876543210
14648  *  001000               01001001101
14649  *     rt -----
14650  *          rs -----
14651  *               rd -----
14652  */
14653 std::string NMD::SQRT_S(uint64 instruction)
14654 {
14655     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14656     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14657
14658     std::string ft = FPR(copy(ft_value));
14659     std::string fs = FPR(copy(fs_value));
14660
14661     return img::format("SQRT.S %s, %s", ft, fs);
14662 }
14663
14664
14665 /*
14666  * SRA rd, rt, sa - Shift Word Right Arithmetic
14667  *
14668  *   3         2         1
14669  *  10987654321098765432109876543210
14670  *  00000000000               000011
14671  *          rt -----
14672  *               rd -----
14673  *                    sa -----
14674  */
14675 std::string NMD::SRA(uint64 instruction)
14676 {
14677     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14678     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14679     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
14680
14681     std::string rt = GPR(copy(rt_value));
14682     std::string rs = GPR(copy(rs_value));
14683     std::string shift = IMMEDIATE(copy(shift_value));
14684
14685     return img::format("SRA %s, %s, %s", rt, rs, shift);
14686 }
14687
14688
14689 /*
14690  * SRAV rd, rt, rs - Shift Word Right Arithmetic Variable
14691  *
14692  *   3         2         1
14693  *  10987654321098765432109876543210
14694  *  001000               00000000111
14695  *     rs -----
14696  *          rt -----
14697  *               rd -----
14698  */
14699 std::string NMD::SRAV(uint64 instruction)
14700 {
14701     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14702     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14703     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14704
14705     std::string rd = GPR(copy(rd_value));
14706     std::string rs = GPR(copy(rs_value));
14707     std::string rt = GPR(copy(rt_value));
14708
14709     return img::format("SRAV %s, %s, %s", rd, rs, rt);
14710 }
14711
14712
14713 /*
14714  *
14715  *
14716  *   3         2         1
14717  *  10987654321098765432109876543210
14718  *  001000               00000000111
14719  *     rs -----
14720  *          rt -----
14721  *               rd -----
14722  */
14723 std::string NMD::SRL_16_(uint64 instruction)
14724 {
14725     uint64 rt3_value = extract_rt3_9_8_7(instruction);
14726     uint64 rs3_value = extract_rs3_6_5_4(instruction);
14727     uint64 shift3_value = extract_shift3_2_1_0(instruction);
14728
14729     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
14730     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
14731     std::string shift3 = IMMEDIATE(encode_shift3_from_shift(shift3_value));
14732
14733     return img::format("SRL %s, %s, %s", rt3, rs3, shift3);
14734 }
14735
14736
14737 /*
14738  *
14739  *
14740  *   3         2         1
14741  *  10987654321098765432109876543210
14742  *  001000               01001001101
14743  *     rt -----
14744  *          rs -----
14745  *               rd -----
14746  */
14747 std::string NMD::SRL_32_(uint64 instruction)
14748 {
14749     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14750     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14751     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
14752
14753     std::string rt = GPR(copy(rt_value));
14754     std::string rs = GPR(copy(rs_value));
14755     std::string shift = IMMEDIATE(copy(shift_value));
14756
14757     return img::format("SRL %s, %s, %s", rt, rs, shift);
14758 }
14759
14760
14761 /*
14762  *
14763  *
14764  *   3         2         1
14765  *  10987654321098765432109876543210
14766  *  001000               01001001101
14767  *     rt -----
14768  *          rs -----
14769  *               rd -----
14770  */
14771 std::string NMD::SRLV(uint64 instruction)
14772 {
14773     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14774     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14775     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14776
14777     std::string rd = GPR(copy(rd_value));
14778     std::string rs = GPR(copy(rs_value));
14779     std::string rt = GPR(copy(rt_value));
14780
14781     return img::format("SRLV %s, %s, %s", rd, rs, rt);
14782 }
14783
14784
14785 /*
14786  *
14787  *
14788  *   3         2         1
14789  *  10987654321098765432109876543210
14790  *  001000               01001001101
14791  *     rt -----
14792  *          rs -----
14793  *               rd -----
14794  */
14795 std::string NMD::SUB(uint64 instruction)
14796 {
14797     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14798     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14799     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14800
14801     std::string rd = GPR(copy(rd_value));
14802     std::string rs = GPR(copy(rs_value));
14803     std::string rt = GPR(copy(rt_value));
14804
14805     return img::format("SUB %s, %s, %s", rd, rs, rt);
14806 }
14807
14808
14809 /*
14810  *
14811  *
14812  *   3         2         1
14813  *  10987654321098765432109876543210
14814  *  001000               01001001101
14815  *     rt -----
14816  *          rs -----
14817  *               rd -----
14818  */
14819 std::string NMD::SUB_D(uint64 instruction)
14820 {
14821     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14822     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14823     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
14824
14825     std::string fd = FPR(copy(fd_value));
14826     std::string fs = FPR(copy(fs_value));
14827     std::string ft = FPR(copy(ft_value));
14828
14829     return img::format("SUB.D %s, %s, %s", fd, fs, ft);
14830 }
14831
14832
14833 /*
14834  *
14835  *
14836  *   3         2         1
14837  *  10987654321098765432109876543210
14838  *  001000               01001001101
14839  *     rt -----
14840  *          rs -----
14841  *               rd -----
14842  */
14843 std::string NMD::SUB_S(uint64 instruction)
14844 {
14845     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14846     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14847     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
14848
14849     std::string fd = FPR(copy(fd_value));
14850     std::string fs = FPR(copy(fs_value));
14851     std::string ft = FPR(copy(ft_value));
14852
14853     return img::format("SUB.S %s, %s, %s", fd, fs, ft);
14854 }
14855
14856
14857 /*
14858  *
14859  *
14860  *   3         2         1
14861  *  10987654321098765432109876543210
14862  *  001000               01001001101
14863  *     rt -----
14864  *          rs -----
14865  *               rd -----
14866  */
14867 std::string NMD::SUBQ_PH(uint64 instruction)
14868 {
14869     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14870     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14871     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14872
14873     std::string rd = GPR(copy(rd_value));
14874     std::string rs = GPR(copy(rs_value));
14875     std::string rt = GPR(copy(rt_value));
14876
14877     return img::format("SUBQ.PH %s, %s, %s", rd, rs, rt);
14878 }
14879
14880
14881 /*
14882  * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
14883  *                         to Halve Results
14884  *
14885  *   3         2         1
14886  *  10987654321098765432109876543210
14887  *  001000               01001001101
14888  *     rt -----
14889  *          rs -----
14890  *               rd -----
14891  */
14892 std::string NMD::SUBQ_S_PH(uint64 instruction)
14893 {
14894     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14895     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14896     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14897
14898     std::string rd = GPR(copy(rd_value));
14899     std::string rs = GPR(copy(rs_value));
14900     std::string rt = GPR(copy(rt_value));
14901
14902     return img::format("SUBQ_S.PH %s, %s, %s", rd, rs, rt);
14903 }
14904
14905
14906 /*
14907  * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
14908  *                         to Halve Results
14909  *
14910  *   3         2         1
14911  *  10987654321098765432109876543210
14912  *  001000               01001001101
14913  *     rt -----
14914  *          rs -----
14915  *               rd -----
14916  */
14917 std::string NMD::SUBQ_S_W(uint64 instruction)
14918 {
14919     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14920     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14921     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14922
14923     std::string rd = GPR(copy(rd_value));
14924     std::string rs = GPR(copy(rs_value));
14925     std::string rt = GPR(copy(rt_value));
14926
14927     return img::format("SUBQ_S.W %s, %s, %s", rd, rs, rt);
14928 }
14929
14930
14931 /*
14932  * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
14933  *                         to Halve Results
14934  *
14935  *   3         2         1
14936  *  10987654321098765432109876543210
14937  *  001000               01001001101
14938  *     rt -----
14939  *          rs -----
14940  *               rd -----
14941  */
14942 std::string NMD::SUBQH_PH(uint64 instruction)
14943 {
14944     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14945     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14946     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14947
14948     std::string rd = GPR(copy(rd_value));
14949     std::string rs = GPR(copy(rs_value));
14950     std::string rt = GPR(copy(rt_value));
14951
14952     return img::format("SUBQH.PH %s, %s, %s", rd, rs, rt);
14953 }
14954
14955
14956 /*
14957  * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
14958  *                         to Halve Results
14959  *
14960  *   3         2         1
14961  *  10987654321098765432109876543210
14962  *  001000               01001001101
14963  *     rt -----
14964  *          rs -----
14965  *               rd -----
14966  */
14967 std::string NMD::SUBQH_R_PH(uint64 instruction)
14968 {
14969     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14970     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14971     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14972
14973     std::string rd = GPR(copy(rd_value));
14974     std::string rs = GPR(copy(rs_value));
14975     std::string rt = GPR(copy(rt_value));
14976
14977     return img::format("SUBQH_R.PH %s, %s, %s", rd, rs, rt);
14978 }
14979
14980
14981 /*
14982  * SUBQH_R.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
14983  *                           to Halve Results (rounding)
14984  *
14985  *   3         2         1
14986  *  10987654321098765432109876543210
14987  *  001000               11001001101
14988  *     rt -----
14989  *          rs -----
14990  *               rd -----
14991  */
14992 std::string NMD::SUBQH_R_W(uint64 instruction)
14993 {
14994     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14995     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14996     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14997
14998     std::string rd = GPR(copy(rd_value));
14999     std::string rs = GPR(copy(rs_value));
15000     std::string rt = GPR(copy(rt_value));
15001
15002     return img::format("SUBQH_R.W %s, %s, %s", rd, rs, rt);
15003 }
15004
15005
15006 /*
15007  * SUBQH.W rd, rs, rt - Subtract Fractional Words And Shift Right to Halve
15008  *                        Results
15009  *
15010  *   3         2         1
15011  *  10987654321098765432109876543210
15012  *  001000               01010001101
15013  *     rt -----
15014  *          rs -----
15015  *               rd -----
15016  */
15017 std::string NMD::SUBQH_W(uint64 instruction)
15018 {
15019     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15020     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15021     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15022
15023     std::string rd = GPR(copy(rd_value));
15024     std::string rs = GPR(copy(rs_value));
15025     std::string rt = GPR(copy(rt_value));
15026
15027     return img::format("SUBQH.W %s, %s, %s", rd, rs, rt);
15028 }
15029
15030
15031 /*
15032  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15033  *
15034  *   3         2         1
15035  *  10987654321098765432109876543210
15036  *  001000               00010001101
15037  *     rt -----
15038  *          rs -----
15039  *               rd -----
15040  */
15041 std::string NMD::SUBU_16_(uint64 instruction)
15042 {
15043     uint64 rt3_value = extract_rt3_9_8_7(instruction);
15044     uint64 rs3_value = extract_rs3_6_5_4(instruction);
15045     uint64 rd3_value = extract_rd3_3_2_1(instruction);
15046
15047     std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
15048     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
15049     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
15050
15051     return img::format("SUBU %s, %s, %s", rd3, rs3, rt3);
15052 }
15053
15054
15055 /*
15056  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15057  *
15058  *   3         2         1
15059  *  10987654321098765432109876543210
15060  *  001000               00010001101
15061  *     rt -----
15062  *          rs -----
15063  *               rd -----
15064  */
15065 std::string NMD::SUBU_32_(uint64 instruction)
15066 {
15067     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15068     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15069     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15070
15071     std::string rd = GPR(copy(rd_value));
15072     std::string rs = GPR(copy(rs_value));
15073     std::string rt = GPR(copy(rt_value));
15074
15075     return img::format("SUBU %s, %s, %s", rd, rs, rt);
15076 }
15077
15078
15079 /*
15080  * SUBU.PH rd, rs, rt - Subtract Unsigned Integer Halfwords
15081  *
15082  *   3         2         1
15083  *  10987654321098765432109876543210
15084  *  001000               01100001101
15085  *     rt -----
15086  *          rs -----
15087  *               rd -----
15088  */
15089 std::string NMD::SUBU_PH(uint64 instruction)
15090 {
15091     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15092     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15093     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15094
15095     std::string rd = GPR(copy(rd_value));
15096     std::string rs = GPR(copy(rs_value));
15097     std::string rt = GPR(copy(rt_value));
15098
15099     return img::format("SUBU.PH %s, %s, %s", rd, rs, rt);
15100 }
15101
15102
15103 /*
15104  * SUBU.QB rd, rs, rt - Subtract Unsigned Quad Byte Vector
15105  *
15106  *   3         2         1
15107  *  10987654321098765432109876543210
15108  *  001000               01011001101
15109  *     rt -----
15110  *          rs -----
15111  *               rd -----
15112  */
15113 std::string NMD::SUBU_QB(uint64 instruction)
15114 {
15115     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15116     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15117     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15118
15119     std::string rd = GPR(copy(rd_value));
15120     std::string rs = GPR(copy(rs_value));
15121     std::string rt = GPR(copy(rt_value));
15122
15123     return img::format("SUBU.QB %s, %s, %s", rd, rs, rt);
15124 }
15125
15126
15127 /*
15128  * SUBU_S.PH rd, rs, rt - Subtract Unsigned Integer Halfwords (saturating)
15129  *
15130  *   3         2         1
15131  *  10987654321098765432109876543210
15132  *  001000               11100001101
15133  *     rt -----
15134  *          rs -----
15135  *               rd -----
15136  */
15137 std::string NMD::SUBU_S_PH(uint64 instruction)
15138 {
15139     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15140     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15141     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15142
15143     std::string rd = GPR(copy(rd_value));
15144     std::string rs = GPR(copy(rs_value));
15145     std::string rt = GPR(copy(rt_value));
15146
15147     return img::format("SUBU_S.PH %s, %s, %s", rd, rs, rt);
15148 }
15149
15150
15151 /*
15152  * SUBU_S.QB rd, rs, rt - Subtract Unsigned Quad Byte Vector (saturating)
15153  *
15154  *   3         2         1
15155  *  10987654321098765432109876543210
15156  *  001000               11011001101
15157  *     rt -----
15158  *          rs -----
15159  *               rd -----
15160  */
15161 std::string NMD::SUBU_S_QB(uint64 instruction)
15162 {
15163     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15164     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15165     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15166
15167     std::string rd = GPR(copy(rd_value));
15168     std::string rs = GPR(copy(rs_value));
15169     std::string rt = GPR(copy(rt_value));
15170
15171     return img::format("SUBU_S.QB %s, %s, %s", rd, rs, rt);
15172 }
15173
15174
15175 /*
15176  * SUBUH.QB rd, rs, rt - Subtract Unsigned Bytes And Right Shift to Halve
15177  *                         Results
15178  *
15179  *   3         2         1
15180  *  10987654321098765432109876543210
15181  *  001000               01101001101
15182  *     rt -----
15183  *          rs -----
15184  *               rd -----
15185  */
15186 std::string NMD::SUBUH_QB(uint64 instruction)
15187 {
15188     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15189     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15190     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15191
15192     std::string rd = GPR(copy(rd_value));
15193     std::string rs = GPR(copy(rs_value));
15194     std::string rt = GPR(copy(rt_value));
15195
15196     return img::format("SUBUH.QB %s, %s, %s", rd, rs, rt);
15197 }
15198
15199
15200 /*
15201  * SUBUH_R.QB rd, rs, rt - Subtract Unsigned Bytes And Right Shift to Halve
15202  *                           Results (rounding)
15203  *
15204  *   3         2         1
15205  *  10987654321098765432109876543210
15206  *  001000               11101001101
15207  *     rt -----
15208  *          rs -----
15209  *               rd -----
15210  */
15211 std::string NMD::SUBUH_R_QB(uint64 instruction)
15212 {
15213     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15214     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15215     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15216
15217     std::string rd = GPR(copy(rd_value));
15218     std::string rs = GPR(copy(rs_value));
15219     std::string rt = GPR(copy(rt_value));
15220
15221     return img::format("SUBUH_R.QB %s, %s, %s", rd, rs, rt);
15222 }
15223
15224
15225 /*
15226  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15227  *
15228  *   3         2         1
15229  *  10987654321098765432109876543210
15230  *  001000               00010001101
15231  *     rt -----
15232  *          rs -----
15233  *               rd -----
15234  */
15235 std::string NMD::SW_16_(uint64 instruction)
15236 {
15237     uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
15238     uint64 rs3_value = extract_rs3_6_5_4(instruction);
15239     uint64 u_value = extract_u_3_2_1_0__s2(instruction);
15240
15241     std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
15242     std::string u = IMMEDIATE(copy(u_value));
15243     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
15244
15245     return img::format("SW %s, %s(%s)", rtz3, u, rs3);
15246 }
15247
15248
15249 /*
15250  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15251  *
15252  *   3         2         1
15253  *  10987654321098765432109876543210
15254  *  001000               00010001101
15255  *     rt -----
15256  *          rs -----
15257  *               rd -----
15258  */
15259 std::string NMD::SW_4X4_(uint64 instruction)
15260 {
15261     uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction);
15262     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
15263     uint64 u_value = extract_u_3_8__s2(instruction);
15264
15265     std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
15266     std::string u = IMMEDIATE(copy(u_value));
15267     std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
15268
15269     return img::format("SW %s, %s(%s)", rtz4, u, rs4);
15270 }
15271
15272
15273 /*
15274  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15275  *
15276  *   3         2         1
15277  *  10987654321098765432109876543210
15278  *  001000               00010001101
15279  *     rt -----
15280  *          rs -----
15281  *               rd -----
15282  */
15283 std::string NMD::SW_GP16_(uint64 instruction)
15284 {
15285     uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
15286     uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
15287
15288     std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
15289     std::string u = IMMEDIATE(copy(u_value));
15290
15291     return img::format("SW %s, %s($%d)", rtz3, u, 28);
15292 }
15293
15294
15295 /*
15296  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15297  *
15298  *   3         2         1
15299  *  10987654321098765432109876543210
15300  *  001000               00010001101
15301  *     rt -----
15302  *          rs -----
15303  *               rd -----
15304  */
15305 std::string NMD::SW_GP_(uint64 instruction)
15306 {
15307     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15308     uint64 u_value = extract_u_20_to_2__s2(instruction);
15309
15310     std::string rt = GPR(copy(rt_value));
15311     std::string u = IMMEDIATE(copy(u_value));
15312
15313     return img::format("SW %s, %s($%d)", rt, u, 28);
15314 }
15315
15316
15317 /*
15318  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15319  *
15320  *   3         2         1
15321  *  10987654321098765432109876543210
15322  *  001000               00010001101
15323  *     rt -----
15324  *          rs -----
15325  *               rd -----
15326  */
15327 std::string NMD::SW_S9_(uint64 instruction)
15328 {
15329     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15330     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15331     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15332
15333     std::string rt = GPR(copy(rt_value));
15334     std::string s = IMMEDIATE(copy(s_value));
15335     std::string rs = GPR(copy(rs_value));
15336
15337     return img::format("SW %s, %s(%s)", rt, s, rs);
15338 }
15339
15340
15341 /*
15342  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15343  *
15344  *   3         2         1
15345  *  10987654321098765432109876543210
15346  *  001000               00010001101
15347  *     rt -----
15348  *          rs -----
15349  *               rd -----
15350  */
15351 std::string NMD::SW_SP_(uint64 instruction)
15352 {
15353     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
15354     uint64 u_value = extract_u_4_3_2_1_0__s2(instruction);
15355
15356     std::string rt = GPR(copy(rt_value));
15357     std::string u = IMMEDIATE(copy(u_value));
15358
15359     return img::format("SW %s, %s($%d)", rt, u, 29);
15360 }
15361
15362
15363 /*
15364  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15365  *
15366  *   3         2         1
15367  *  10987654321098765432109876543210
15368  *  001000               00010001101
15369  *     rt -----
15370  *          rs -----
15371  *               rd -----
15372  */
15373 std::string NMD::SW_U12_(uint64 instruction)
15374 {
15375     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15376     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15377     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
15378
15379     std::string rt = GPR(copy(rt_value));
15380     std::string u = IMMEDIATE(copy(u_value));
15381     std::string rs = GPR(copy(rs_value));
15382
15383     return img::format("SW %s, %s(%s)", rt, u, rs);
15384 }
15385
15386
15387 /*
15388  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15389  *
15390  *   3         2         1
15391  *  10987654321098765432109876543210
15392  *  001000               00010001101
15393  *     rt -----
15394  *          rs -----
15395  *               rd -----
15396  */
15397 std::string NMD::SWC1_GP_(uint64 instruction)
15398 {
15399     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15400     uint64 u_value = extract_u_17_to_2__s2(instruction);
15401
15402     std::string ft = FPR(copy(ft_value));
15403     std::string u = IMMEDIATE(copy(u_value));
15404
15405     return img::format("SWC1 %s, %s($%d)", ft, u, 28);
15406 }
15407
15408
15409 /*
15410  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15411  *
15412  *   3         2         1
15413  *  10987654321098765432109876543210
15414  *  001000               00010001101
15415  *     rt -----
15416  *          rs -----
15417  *               rd -----
15418  */
15419 std::string NMD::SWC1_S9_(uint64 instruction)
15420 {
15421     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15422     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15423     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15424
15425     std::string ft = FPR(copy(ft_value));
15426     std::string s = IMMEDIATE(copy(s_value));
15427     std::string rs = GPR(copy(rs_value));
15428
15429     return img::format("SWC1 %s, %s(%s)", ft, s, rs);
15430 }
15431
15432
15433 /*
15434  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15435  *
15436  *   3         2         1
15437  *  10987654321098765432109876543210
15438  *  001000               00010001101
15439  *     rt -----
15440  *          rs -----
15441  *               rd -----
15442  */
15443 std::string NMD::SWC1_U12_(uint64 instruction)
15444 {
15445     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15446     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15447     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
15448
15449     std::string ft = FPR(copy(ft_value));
15450     std::string u = IMMEDIATE(copy(u_value));
15451     std::string rs = GPR(copy(rs_value));
15452
15453     return img::format("SWC1 %s, %s(%s)", ft, u, rs);
15454 }
15455
15456
15457 /*
15458  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15459  *
15460  *   3         2         1
15461  *  10987654321098765432109876543210
15462  *  001000               00010001101
15463  *     rt -----
15464  *          rs -----
15465  *               rd -----
15466  */
15467 std::string NMD::SWC1X(uint64 instruction)
15468 {
15469     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15470     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15471     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
15472
15473     std::string ft = FPR(copy(ft_value));
15474     std::string rs = GPR(copy(rs_value));
15475     std::string rt = GPR(copy(rt_value));
15476
15477     return img::format("SWC1X %s, %s(%s)", ft, rs, rt);
15478 }
15479
15480
15481 /*
15482  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15483  *
15484  *   3         2         1
15485  *  10987654321098765432109876543210
15486  *  001000               00010001101
15487  *     rt -----
15488  *          rs -----
15489  *               rd -----
15490  */
15491 std::string NMD::SWC1XS(uint64 instruction)
15492 {
15493     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15494     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15495     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
15496
15497     std::string ft = FPR(copy(ft_value));
15498     std::string rs = GPR(copy(rs_value));
15499     std::string rt = GPR(copy(rt_value));
15500
15501     return img::format("SWC1XS %s, %s(%s)", ft, rs, rt);
15502 }
15503
15504
15505 /*
15506  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15507  *
15508  *   3         2         1
15509  *  10987654321098765432109876543210
15510  *  001000               00010001101
15511  *     rt -----
15512  *          rs -----
15513  *               rd -----
15514  */
15515 std::string NMD::SWC2(uint64 instruction)
15516 {
15517     uint64 cs_value = extract_cs_25_24_23_22_21(instruction);
15518     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15519     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15520
15521     std::string cs = CPR(copy(cs_value));
15522     std::string s = IMMEDIATE(copy(s_value));
15523     std::string rs = GPR(copy(rs_value));
15524
15525     return img::format("SWC2 %s, %s(%s)", cs, s, rs);
15526 }
15527
15528
15529 /*
15530  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15531  *
15532  *   3         2         1
15533  *  10987654321098765432109876543210
15534  *  001000               00010001101
15535  *     rt -----
15536  *          rs -----
15537  *               rd -----
15538  */
15539 std::string NMD::SWE(uint64 instruction)
15540 {
15541     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15542     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15543     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15544
15545     std::string rt = GPR(copy(rt_value));
15546     std::string s = IMMEDIATE(copy(s_value));
15547     std::string rs = GPR(copy(rs_value));
15548
15549     return img::format("SWE %s, %s(%s)", rt, s, rs);
15550 }
15551
15552
15553 /*
15554  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15555  *
15556  *   3         2         1
15557  *  10987654321098765432109876543210
15558  *  001000               00010001101
15559  *     rt -----
15560  *          rs -----
15561  *               rd -----
15562  */
15563 std::string NMD::SWM(uint64 instruction)
15564 {
15565     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15566     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15567     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15568     uint64 count3_value = extract_count3_14_13_12(instruction);
15569
15570     std::string rt = GPR(copy(rt_value));
15571     std::string s = IMMEDIATE(copy(s_value));
15572     std::string rs = GPR(copy(rs_value));
15573     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
15574
15575     return img::format("SWM %s, %s(%s), %s", rt, s, rs, count3);
15576 }
15577
15578
15579 /*
15580  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15581  *
15582  *   3         2         1
15583  *  10987654321098765432109876543210
15584  *  001000               00010001101
15585  *     rt -----
15586  *          rs -----
15587  *               rd -----
15588  */
15589 std::string NMD::SWPC_48_(uint64 instruction)
15590 {
15591     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
15592     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
15593
15594     std::string rt = GPR(copy(rt_value));
15595     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
15596
15597     return img::format("SWPC %s, %s", rt, s);
15598 }
15599
15600
15601 /*
15602  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15603  *
15604  *   3         2         1
15605  *  10987654321098765432109876543210
15606  *  001000               00010001101
15607  *     rt -----
15608  *          rs -----
15609  *               rd -----
15610  */
15611 std::string NMD::SWX(uint64 instruction)
15612 {
15613     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15614     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15615     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15616
15617     std::string rd = GPR(copy(rd_value));
15618     std::string rs = GPR(copy(rs_value));
15619     std::string rt = GPR(copy(rt_value));
15620
15621     return img::format("SWX %s, %s(%s)", rd, rs, rt);
15622 }
15623
15624
15625 /*
15626  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15627  *
15628  *   3         2         1
15629  *  10987654321098765432109876543210
15630  *  001000               00010001101
15631  *     rt -----
15632  *          rs -----
15633  *               rd -----
15634  */
15635 std::string NMD::SWXS(uint64 instruction)
15636 {
15637     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15638     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15639     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15640
15641     std::string rd = GPR(copy(rd_value));
15642     std::string rs = GPR(copy(rs_value));
15643     std::string rt = GPR(copy(rt_value));
15644
15645     return img::format("SWXS %s, %s(%s)", rd, rs, rt);
15646 }
15647
15648
15649 /*
15650  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15651  *
15652  *   3         2         1
15653  *  10987654321098765432109876543210
15654  *  001000               00010001101
15655  *     rt -----
15656  *          rs -----
15657  *               rd -----
15658  */
15659 std::string NMD::SYNC(uint64 instruction)
15660 {
15661     uint64 stype_value = extract_stype_20_19_18_17_16(instruction);
15662
15663     std::string stype = IMMEDIATE(copy(stype_value));
15664
15665     return img::format("SYNC %s", stype);
15666 }
15667
15668
15669 /*
15670  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15671  *
15672  *   3         2         1
15673  *  10987654321098765432109876543210
15674  *  001000               00010001101
15675  *     rt -----
15676  *          rs -----
15677  *               rd -----
15678  */
15679 std::string NMD::SYNCI(uint64 instruction)
15680 {
15681     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15682     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15683
15684     std::string s = IMMEDIATE(copy(s_value));
15685     std::string rs = GPR(copy(rs_value));
15686
15687     return img::format("SYNCI %s(%s)", s, rs);
15688 }
15689
15690
15691 /*
15692  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15693  *
15694  *   3         2         1
15695  *  10987654321098765432109876543210
15696  *  001000               00010001101
15697  *     rt -----
15698  *          rs -----
15699  *               rd -----
15700  */
15701 std::string NMD::SYNCIE(uint64 instruction)
15702 {
15703     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15704     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15705
15706     std::string s = IMMEDIATE(copy(s_value));
15707     std::string rs = GPR(copy(rs_value));
15708
15709     return img::format("SYNCIE %s(%s)", s, rs);
15710 }
15711
15712
15713 /*
15714  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15715  *
15716  *   3         2         1
15717  *  10987654321098765432109876543210
15718  *  001000               00010001101
15719  *     rt -----
15720  *          rs -----
15721  *               rd -----
15722  */
15723 std::string NMD::SYSCALL_16_(uint64 instruction)
15724 {
15725     uint64 code_value = extract_code_1_0(instruction);
15726
15727     std::string code = IMMEDIATE(copy(code_value));
15728
15729     return img::format("SYSCALL %s", code);
15730 }
15731
15732
15733 /*
15734  * SYSCALL code - System Call. Cause a System Call Exception
15735  *
15736  *   3         2         1
15737  *  10987654321098765432109876543210
15738  *  00000000000010
15739  *           code ------------------
15740  */
15741 std::string NMD::SYSCALL_32_(uint64 instruction)
15742 {
15743     uint64 code_value = extract_code_17_to_0(instruction);
15744
15745     std::string code = IMMEDIATE(copy(code_value));
15746
15747     return img::format("SYSCALL %s", code);
15748 }
15749
15750
15751 /*
15752  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15753  *
15754  *   3         2         1
15755  *  10987654321098765432109876543210
15756  *  001000               00010001101
15757  *     rt -----
15758  *          rs -----
15759  *               rd -----
15760  */
15761 std::string NMD::TEQ(uint64 instruction)
15762 {
15763     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15764     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15765
15766     std::string rs = GPR(copy(rs_value));
15767     std::string rt = GPR(copy(rt_value));
15768
15769     return img::format("TEQ %s, %s", rs, rt);
15770 }
15771
15772
15773 /*
15774  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15775  *
15776  *   3         2         1
15777  *  10987654321098765432109876543210
15778  *  001000               00010001101
15779  *     rt -----
15780  *          rs -----
15781  *               rd -----
15782  */
15783 std::string NMD::TLBGINV(uint64 instruction)
15784 {
15785     (void)instruction;
15786
15787     return "TLBGINV ";
15788 }
15789
15790
15791 /*
15792  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15793  *
15794  *   3         2         1
15795  *  10987654321098765432109876543210
15796  *  001000               00010001101
15797  *     rt -----
15798  *          rs -----
15799  *               rd -----
15800  */
15801 std::string NMD::TLBGINVF(uint64 instruction)
15802 {
15803     (void)instruction;
15804
15805     return "TLBGINVF ";
15806 }
15807
15808
15809 /*
15810  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15811  *
15812  *   3         2         1
15813  *  10987654321098765432109876543210
15814  *  001000               00010001101
15815  *     rt -----
15816  *          rs -----
15817  *               rd -----
15818  */
15819 std::string NMD::TLBGP(uint64 instruction)
15820 {
15821     (void)instruction;
15822
15823     return "TLBGP ";
15824 }
15825
15826
15827 /*
15828  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15829  *
15830  *   3         2         1
15831  *  10987654321098765432109876543210
15832  *  001000               00010001101
15833  *     rt -----
15834  *          rs -----
15835  *               rd -----
15836  */
15837 std::string NMD::TLBGR(uint64 instruction)
15838 {
15839     (void)instruction;
15840
15841     return "TLBGR ";
15842 }
15843
15844
15845 /*
15846  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15847  *
15848  *   3         2         1
15849  *  10987654321098765432109876543210
15850  *  001000               00010001101
15851  *     rt -----
15852  *          rs -----
15853  *               rd -----
15854  */
15855 std::string NMD::TLBGWI(uint64 instruction)
15856 {
15857     (void)instruction;
15858
15859     return "TLBGWI ";
15860 }
15861
15862
15863 /*
15864  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15865  *
15866  *   3         2         1
15867  *  10987654321098765432109876543210
15868  *  001000               00010001101
15869  *     rt -----
15870  *          rs -----
15871  *               rd -----
15872  */
15873 std::string NMD::TLBGWR(uint64 instruction)
15874 {
15875     (void)instruction;
15876
15877     return "TLBGWR ";
15878 }
15879
15880
15881 /*
15882  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15883  *
15884  *   3         2         1
15885  *  10987654321098765432109876543210
15886  *  001000               00010001101
15887  *     rt -----
15888  *          rs -----
15889  *               rd -----
15890  */
15891 std::string NMD::TLBINV(uint64 instruction)
15892 {
15893     (void)instruction;
15894
15895     return "TLBINV ";
15896 }
15897
15898
15899 /*
15900  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15901  *
15902  *   3         2         1
15903  *  10987654321098765432109876543210
15904  *  001000               00010001101
15905  *     rt -----
15906  *          rs -----
15907  *               rd -----
15908  */
15909 std::string NMD::TLBINVF(uint64 instruction)
15910 {
15911     (void)instruction;
15912
15913     return "TLBINVF ";
15914 }
15915
15916
15917 /*
15918  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15919  *
15920  *   3         2         1
15921  *  10987654321098765432109876543210
15922  *  001000               00010001101
15923  *     rt -----
15924  *          rs -----
15925  *               rd -----
15926  */
15927 std::string NMD::TLBP(uint64 instruction)
15928 {
15929     (void)instruction;
15930
15931     return "TLBP ";
15932 }
15933
15934
15935 /*
15936  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15937  *
15938  *   3         2         1
15939  *  10987654321098765432109876543210
15940  *  001000               00010001101
15941  *     rt -----
15942  *          rs -----
15943  *               rd -----
15944  */
15945 std::string NMD::TLBR(uint64 instruction)
15946 {
15947     (void)instruction;
15948
15949     return "TLBR ";
15950 }
15951
15952
15953 /*
15954  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15955  *
15956  *   3         2         1
15957  *  10987654321098765432109876543210
15958  *  001000               00010001101
15959  *     rt -----
15960  *          rs -----
15961  *               rd -----
15962  */
15963 std::string NMD::TLBWI(uint64 instruction)
15964 {
15965     (void)instruction;
15966
15967     return "TLBWI ";
15968 }
15969
15970
15971 /*
15972  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15973  *
15974  *   3         2         1
15975  *  10987654321098765432109876543210
15976  *  001000               00010001101
15977  *     rt -----
15978  *          rs -----
15979  *               rd -----
15980  */
15981 std::string NMD::TLBWR(uint64 instruction)
15982 {
15983     (void)instruction;
15984
15985     return "TLBWR ";
15986 }
15987
15988
15989 /*
15990  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15991  *
15992  *   3         2         1
15993  *  10987654321098765432109876543210
15994  *  001000               00010001101
15995  *     rt -----
15996  *          rs -----
15997  *               rd -----
15998  */
15999 std::string NMD::TNE(uint64 instruction)
16000 {
16001     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16002     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16003
16004     std::string rs = GPR(copy(rs_value));
16005     std::string rt = GPR(copy(rt_value));
16006
16007     return img::format("TNE %s, %s", rs, rt);
16008 }
16009
16010
16011 /*
16012  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16013  *
16014  *   3         2         1
16015  *  10987654321098765432109876543210
16016  *  001000               00010001101
16017  *     rt -----
16018  *          rs -----
16019  *               rd -----
16020  */
16021 std::string NMD::TRUNC_L_D(uint64 instruction)
16022 {
16023     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16024     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16025
16026     std::string ft = FPR(copy(ft_value));
16027     std::string fs = FPR(copy(fs_value));
16028
16029     return img::format("TRUNC.L.D %s, %s", ft, fs);
16030 }
16031
16032
16033 /*
16034  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16035  *
16036  *   3         2         1
16037  *  10987654321098765432109876543210
16038  *  001000               00010001101
16039  *     rt -----
16040  *          rs -----
16041  *               rd -----
16042  */
16043 std::string NMD::TRUNC_L_S(uint64 instruction)
16044 {
16045     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16046     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16047
16048     std::string ft = FPR(copy(ft_value));
16049     std::string fs = FPR(copy(fs_value));
16050
16051     return img::format("TRUNC.L.S %s, %s", ft, fs);
16052 }
16053
16054
16055 /*
16056  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16057  *
16058  *   3         2         1
16059  *  10987654321098765432109876543210
16060  *  001000               00010001101
16061  *     rt -----
16062  *          rs -----
16063  *               rd -----
16064  */
16065 std::string NMD::TRUNC_W_D(uint64 instruction)
16066 {
16067     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16068     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16069
16070     std::string ft = FPR(copy(ft_value));
16071     std::string fs = FPR(copy(fs_value));
16072
16073     return img::format("TRUNC.W.D %s, %s", ft, fs);
16074 }
16075
16076
16077 /*
16078  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16079  *
16080  *   3         2         1
16081  *  10987654321098765432109876543210
16082  *  001000               00010001101
16083  *     rt -----
16084  *          rs -----
16085  *               rd -----
16086  */
16087 std::string NMD::TRUNC_W_S(uint64 instruction)
16088 {
16089     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16090     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16091
16092     std::string ft = FPR(copy(ft_value));
16093     std::string fs = FPR(copy(fs_value));
16094
16095     return img::format("TRUNC.W.S %s, %s", ft, fs);
16096 }
16097
16098
16099 /*
16100  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16101  *
16102  *   3         2         1
16103  *  10987654321098765432109876543210
16104  *  001000               00010001101
16105  *     rt -----
16106  *          rs -----
16107  *               rd -----
16108  */
16109 std::string NMD::UALDM(uint64 instruction)
16110 {
16111     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16112     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16113     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16114     uint64 count3_value = extract_count3_14_13_12(instruction);
16115
16116     std::string rt = GPR(copy(rt_value));
16117     std::string s = IMMEDIATE(copy(s_value));
16118     std::string rs = GPR(copy(rs_value));
16119     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16120
16121     return img::format("UALDM %s, %s(%s), %s", rt, s, rs, count3);
16122 }
16123
16124
16125 /*
16126  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16127  *
16128  *   3         2         1
16129  *  10987654321098765432109876543210
16130  *  001000               00010001101
16131  *     rt -----
16132  *          rs -----
16133  *               rd -----
16134  */
16135 std::string NMD::UALH(uint64 instruction)
16136 {
16137     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16138     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16139     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16140
16141     std::string rt = GPR(copy(rt_value));
16142     std::string s = IMMEDIATE(copy(s_value));
16143     std::string rs = GPR(copy(rs_value));
16144
16145     return img::format("UALH %s, %s(%s)", rt, s, rs);
16146 }
16147
16148
16149 /*
16150  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16151  *
16152  *   3         2         1
16153  *  10987654321098765432109876543210
16154  *  001000               00010001101
16155  *     rt -----
16156  *          rs -----
16157  *               rd -----
16158  */
16159 std::string NMD::UALWM(uint64 instruction)
16160 {
16161     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16162     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16163     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16164     uint64 count3_value = extract_count3_14_13_12(instruction);
16165
16166     std::string rt = GPR(copy(rt_value));
16167     std::string s = IMMEDIATE(copy(s_value));
16168     std::string rs = GPR(copy(rs_value));
16169     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16170
16171     return img::format("UALWM %s, %s(%s), %s", rt, s, rs, count3);
16172 }
16173
16174
16175 /*
16176  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16177  *
16178  *   3         2         1
16179  *  10987654321098765432109876543210
16180  *  001000               00010001101
16181  *     rt -----
16182  *          rs -----
16183  *               rd -----
16184  */
16185 std::string NMD::UASDM(uint64 instruction)
16186 {
16187     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16188     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16189     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16190     uint64 count3_value = extract_count3_14_13_12(instruction);
16191
16192     std::string rt = GPR(copy(rt_value));
16193     std::string s = IMMEDIATE(copy(s_value));
16194     std::string rs = GPR(copy(rs_value));
16195     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16196
16197     return img::format("UASDM %s, %s(%s), %s", rt, s, rs, count3);
16198 }
16199
16200
16201 /*
16202  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16203  *
16204  *   3         2         1
16205  *  10987654321098765432109876543210
16206  *  001000               00010001101
16207  *     rt -----
16208  *          rs -----
16209  *               rd -----
16210  */
16211 std::string NMD::UASH(uint64 instruction)
16212 {
16213     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16214     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16215     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16216
16217     std::string rt = GPR(copy(rt_value));
16218     std::string s = IMMEDIATE(copy(s_value));
16219     std::string rs = GPR(copy(rs_value));
16220
16221     return img::format("UASH %s, %s(%s)", rt, s, rs);
16222 }
16223
16224
16225 /*
16226  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16227  *
16228  *   3         2         1
16229  *  10987654321098765432109876543210
16230  *  001000               00010001101
16231  *     rt -----
16232  *          rs -----
16233  *               rd -----
16234  */
16235 std::string NMD::UASWM(uint64 instruction)
16236 {
16237     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16238     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16239     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16240     uint64 count3_value = extract_count3_14_13_12(instruction);
16241
16242     std::string rt = GPR(copy(rt_value));
16243     std::string s = IMMEDIATE(copy(s_value));
16244     std::string rs = GPR(copy(rs_value));
16245     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16246
16247     return img::format("UASWM %s, %s(%s), %s", rt, s, rs, count3);
16248 }
16249
16250
16251 /*
16252  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16253  *
16254  *   3         2         1
16255  *  10987654321098765432109876543210
16256  *  001000               00010001101
16257  *     rt -----
16258  *          rs -----
16259  *               rd -----
16260  */
16261 std::string NMD::UDI(uint64 instruction)
16262 {
16263     uint64 op_value = extract_op_25_to_3(instruction);
16264
16265     std::string op = IMMEDIATE(copy(op_value));
16266
16267     return img::format("UDI %s", op);
16268 }
16269
16270
16271 /*
16272  * WAIT code - Enter Wait State
16273  *
16274  *   3         2         1
16275  *  10987654321098765432109876543210
16276  *  001000          1100001101111111
16277  *   code ----------
16278  */
16279 std::string NMD::WAIT(uint64 instruction)
16280 {
16281     uint64 code_value = extract_code_25_24_23_22_21_20_19_18_17_16(instruction);
16282
16283     std::string code = IMMEDIATE(copy(code_value));
16284
16285     return img::format("WAIT %s", code);
16286 }
16287
16288
16289 /*
16290  * WRDSP rt, mask - Write Fields to DSPControl Register from a GPR
16291  *
16292  *   3         2         1
16293  *  10987654321098765432109876543210
16294  *  001000            01011001111111
16295  *     rt -----
16296  *        mask -------
16297  */
16298 std::string NMD::WRDSP(uint64 instruction)
16299 {
16300     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16301     uint64 mask_value = extract_mask_20_19_18_17_16_15_14(instruction);
16302
16303     std::string rt = GPR(copy(rt_value));
16304     std::string mask = IMMEDIATE(copy(mask_value));
16305
16306     return img::format("WRDSP %s, %s", rt, mask);
16307 }
16308
16309
16310 /*
16311  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16312  *
16313  *   3         2         1
16314  *  10987654321098765432109876543210
16315  *  001000               00010001101
16316  *     rt -----
16317  *          rs -----
16318  *               rd -----
16319  */
16320 std::string NMD::WRPGPR(uint64 instruction)
16321 {
16322     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16323     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16324
16325     std::string rt = GPR(copy(rt_value));
16326     std::string rs = GPR(copy(rs_value));
16327
16328     return img::format("WRPGPR %s, %s", rt, rs);
16329 }
16330
16331
16332 /*
16333  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16334  *
16335  *   3         2         1
16336  *  10987654321098765432109876543210
16337  *  001000               00010001101
16338  *     rt -----
16339  *          rs -----
16340  *               rd -----
16341  */
16342 std::string NMD::XOR_16_(uint64 instruction)
16343 {
16344     uint64 rt3_value = extract_rt3_9_8_7(instruction);
16345     uint64 rs3_value = extract_rs3_6_5_4(instruction);
16346
16347     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
16348     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
16349
16350     return img::format("XOR %s, %s", rs3, rt3);
16351 }
16352
16353
16354 /*
16355  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16356  *
16357  *   3         2         1
16358  *  10987654321098765432109876543210
16359  *  001000               00010001101
16360  *     rt -----
16361  *          rs -----
16362  *               rd -----
16363  */
16364 std::string NMD::XOR_32_(uint64 instruction)
16365 {
16366     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16367     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16368     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
16369
16370     std::string rd = GPR(copy(rd_value));
16371     std::string rs = GPR(copy(rs_value));
16372     std::string rt = GPR(copy(rt_value));
16373
16374     return img::format("XOR %s, %s, %s", rd, rs, rt);
16375 }
16376
16377
16378 /*
16379  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16380  *
16381  *   3         2         1
16382  *  10987654321098765432109876543210
16383  *  001000               00010001101
16384  *     rt -----
16385  *          rs -----
16386  *               rd -----
16387  */
16388 std::string NMD::XORI(uint64 instruction)
16389 {
16390     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16391     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16392     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
16393
16394     std::string rt = GPR(copy(rt_value));
16395     std::string rs = GPR(copy(rs_value));
16396     std::string u = IMMEDIATE(copy(u_value));
16397
16398     return img::format("XORI %s, %s, %s", rt, rs, u);
16399 }
16400
16401
16402 /*
16403  * YIELD rt, rs -
16404  *
16405  *   3         2         1
16406  *  10987654321098765432109876543210
16407  *  001000               00010001101
16408  *     rt -----
16409  *          rs -----
16410  */
16411 std::string NMD::YIELD(uint64 instruction)
16412 {
16413     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16414     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16415
16416     std::string rt = GPR(copy(rt_value));
16417     std::string rs = GPR(copy(rs_value));
16418
16419     return img::format("YIELD %s, %s", rt, rs);
16420 }
16421
16422
16423
16424 NMD::Pool NMD::P_SYSCALL[2] = {
16425     { instruction         , 0                   , 0   , 32,
16426        0xfffc0000, 0x00080000, &NMD::SYSCALL_32_      , 0,
16427        0x0                 },        /* SYSCALL[32] */
16428     { instruction         , 0                   , 0   , 32,
16429        0xfffc0000, 0x000c0000, &NMD::HYPCALL          , 0,
16430        CP0_ | VZ_          },        /* HYPCALL */
16431 };
16432
16433
16434 NMD::Pool NMD::P_RI[4] = {
16435     { instruction         , 0                   , 0   , 32,
16436        0xfff80000, 0x00000000, &NMD::SIGRIE           , 0,
16437        0x0                 },        /* SIGRIE */
16438     { pool                , P_SYSCALL           , 2   , 32,
16439        0xfff80000, 0x00080000, 0                      , 0,
16440        0x0                 },        /* P.SYSCALL */
16441     { instruction         , 0                   , 0   , 32,
16442        0xfff80000, 0x00100000, &NMD::BREAK_32_        , 0,
16443        0x0                 },        /* BREAK[32] */
16444     { instruction         , 0                   , 0   , 32,
16445        0xfff80000, 0x00180000, &NMD::SDBBP_32_        , 0,
16446        EJTAG_              },        /* SDBBP[32] */
16447 };
16448
16449
16450 NMD::Pool NMD::P_ADDIU[2] = {
16451     { pool                , P_RI                , 4   , 32,
16452        0xffe00000, 0x00000000, 0                      , 0,
16453        0x0                 },        /* P.RI */
16454     { instruction         , 0                   , 0   , 32,
16455        0xfc000000, 0x00000000, &NMD::ADDIU_32_        , &NMD::ADDIU_32__cond   ,
16456        0x0                 },        /* ADDIU[32] */
16457 };
16458
16459
16460 NMD::Pool NMD::P_TRAP[2] = {
16461     { instruction         , 0                   , 0   , 32,
16462        0xfc0007ff, 0x20000000, &NMD::TEQ              , 0,
16463        XMMS_               },        /* TEQ */
16464     { instruction         , 0                   , 0   , 32,
16465        0xfc0007ff, 0x20000400, &NMD::TNE              , 0,
16466        XMMS_               },        /* TNE */
16467 };
16468
16469
16470 NMD::Pool NMD::P_CMOVE[2] = {
16471     { instruction         , 0                   , 0   , 32,
16472        0xfc0007ff, 0x20000210, &NMD::MOVZ             , 0,
16473        0x0                 },        /* MOVZ */
16474     { instruction         , 0                   , 0   , 32,
16475        0xfc0007ff, 0x20000610, &NMD::MOVN             , 0,
16476        0x0                 },        /* MOVN */
16477 };
16478
16479
16480 NMD::Pool NMD::P_D_MT_VPE[2] = {
16481     { instruction         , 0                   , 0   , 32,
16482        0xfc1f3fff, 0x20010ab0, &NMD::DMT              , 0,
16483        MT_                 },        /* DMT */
16484     { instruction         , 0                   , 0   , 32,
16485        0xfc1f3fff, 0x20000ab0, &NMD::DVPE             , 0,
16486        MT_                 },        /* DVPE */
16487 };
16488
16489
16490 NMD::Pool NMD::P_E_MT_VPE[2] = {
16491     { instruction         , 0                   , 0   , 32,
16492        0xfc1f3fff, 0x20010eb0, &NMD::EMT              , 0,
16493        MT_                 },        /* EMT */
16494     { instruction         , 0                   , 0   , 32,
16495        0xfc1f3fff, 0x20000eb0, &NMD::EVPE             , 0,
16496        MT_                 },        /* EVPE */
16497 };
16498
16499
16500 NMD::Pool NMD::_P_MT_VPE[2] = {
16501     { pool                , P_D_MT_VPE          , 2   , 32,
16502        0xfc003fff, 0x20000ab0, 0                      , 0,
16503        0x0                 },        /* P.D_MT_VPE */
16504     { pool                , P_E_MT_VPE          , 2   , 32,
16505        0xfc003fff, 0x20000eb0, 0                      , 0,
16506        0x0                 },        /* P.E_MT_VPE */
16507 };
16508
16509
16510 NMD::Pool NMD::P_MT_VPE[8] = {
16511     { reserved_block      , 0                   , 0   , 32,
16512        0xfc003bff, 0x200002b0, 0                      , 0,
16513        0x0                 },        /* P.MT_VPE~*(0) */
16514     { pool                , _P_MT_VPE           , 2   , 32,
16515        0xfc003bff, 0x20000ab0, 0                      , 0,
16516        0x0                 },        /* _P.MT_VPE */
16517     { reserved_block      , 0                   , 0   , 32,
16518        0xfc003bff, 0x200012b0, 0                      , 0,
16519        0x0                 },        /* P.MT_VPE~*(2) */
16520     { reserved_block      , 0                   , 0   , 32,
16521        0xfc003bff, 0x20001ab0, 0                      , 0,
16522        0x0                 },        /* P.MT_VPE~*(3) */
16523     { reserved_block      , 0                   , 0   , 32,
16524        0xfc003bff, 0x200022b0, 0                      , 0,
16525        0x0                 },        /* P.MT_VPE~*(4) */
16526     { reserved_block      , 0                   , 0   , 32,
16527        0xfc003bff, 0x20002ab0, 0                      , 0,
16528        0x0                 },        /* P.MT_VPE~*(5) */
16529     { reserved_block      , 0                   , 0   , 32,
16530        0xfc003bff, 0x200032b0, 0                      , 0,
16531        0x0                 },        /* P.MT_VPE~*(6) */
16532     { reserved_block      , 0                   , 0   , 32,
16533        0xfc003bff, 0x20003ab0, 0                      , 0,
16534        0x0                 },        /* P.MT_VPE~*(7) */
16535 };
16536
16537
16538 NMD::Pool NMD::P_DVP[2] = {
16539     { instruction         , 0                   , 0   , 32,
16540        0xfc00ffff, 0x20000390, &NMD::DVP              , 0,
16541        0x0                 },        /* DVP */
16542     { instruction         , 0                   , 0   , 32,
16543        0xfc00ffff, 0x20000790, &NMD::EVP              , 0,
16544        0x0                 },        /* EVP */
16545 };
16546
16547
16548 NMD::Pool NMD::P_SLTU[2] = {
16549     { pool                , P_DVP               , 2   , 32,
16550        0xfc00fbff, 0x20000390, 0                      , 0,
16551        0x0                 },        /* P.DVP */
16552     { instruction         , 0                   , 0   , 32,
16553        0xfc0003ff, 0x20000390, &NMD::SLTU             , &NMD::SLTU_cond        ,
16554        0x0                 },        /* SLTU */
16555 };
16556
16557
16558 NMD::Pool NMD::_POOL32A0[128] = {
16559     { pool                , P_TRAP              , 2   , 32,
16560        0xfc0003ff, 0x20000000, 0                      , 0,
16561        0x0                 },        /* P.TRAP */
16562     { instruction         , 0                   , 0   , 32,
16563        0xfc0003ff, 0x20000008, &NMD::SEB              , 0,
16564        XMMS_               },        /* SEB */
16565     { instruction         , 0                   , 0   , 32,
16566        0xfc0003ff, 0x20000010, &NMD::SLLV             , 0,
16567        0x0                 },        /* SLLV */
16568     { instruction         , 0                   , 0   , 32,
16569        0xfc0003ff, 0x20000018, &NMD::MUL_32_          , 0,
16570        0x0                 },        /* MUL[32] */
16571     { reserved_block      , 0                   , 0   , 32,
16572        0xfc0003ff, 0x20000020, 0                      , 0,
16573        0x0                 },        /* _POOL32A0~*(4) */
16574     { reserved_block      , 0                   , 0   , 32,
16575        0xfc0003ff, 0x20000028, 0                      , 0,
16576        0x0                 },        /* _POOL32A0~*(5) */
16577     { instruction         , 0                   , 0   , 32,
16578        0xfc0003ff, 0x20000030, &NMD::MFC0             , 0,
16579        0x0                 },        /* MFC0 */
16580     { instruction         , 0                   , 0   , 32,
16581        0xfc0003ff, 0x20000038, &NMD::MFHC0            , 0,
16582        CP0_ | MVH_         },        /* MFHC0 */
16583     { reserved_block      , 0                   , 0   , 32,
16584        0xfc0003ff, 0x20000040, 0                      , 0,
16585        0x0                 },        /* _POOL32A0~*(8) */
16586     { instruction         , 0                   , 0   , 32,
16587        0xfc0003ff, 0x20000048, &NMD::SEH              , 0,
16588        0x0                 },        /* SEH */
16589     { instruction         , 0                   , 0   , 32,
16590        0xfc0003ff, 0x20000050, &NMD::SRLV             , 0,
16591        0x0                 },        /* SRLV */
16592     { instruction         , 0                   , 0   , 32,
16593        0xfc0003ff, 0x20000058, &NMD::MUH              , 0,
16594        0x0                 },        /* MUH */
16595     { reserved_block      , 0                   , 0   , 32,
16596        0xfc0003ff, 0x20000060, 0                      , 0,
16597        0x0                 },        /* _POOL32A0~*(12) */
16598     { reserved_block      , 0                   , 0   , 32,
16599        0xfc0003ff, 0x20000068, 0                      , 0,
16600        0x0                 },        /* _POOL32A0~*(13) */
16601     { instruction         , 0                   , 0   , 32,
16602        0xfc0003ff, 0x20000070, &NMD::MTC0             , 0,
16603        CP0_                },        /* MTC0 */
16604     { instruction         , 0                   , 0   , 32,
16605        0xfc0003ff, 0x20000078, &NMD::MTHC0            , 0,
16606        CP0_ | MVH_         },        /* MTHC0 */
16607     { reserved_block      , 0                   , 0   , 32,
16608        0xfc0003ff, 0x20000080, 0                      , 0,
16609        0x0                 },        /* _POOL32A0~*(16) */
16610     { reserved_block      , 0                   , 0   , 32,
16611        0xfc0003ff, 0x20000088, 0                      , 0,
16612        0x0                 },        /* _POOL32A0~*(17) */
16613     { instruction         , 0                   , 0   , 32,
16614        0xfc0003ff, 0x20000090, &NMD::SRAV             , 0,
16615        0x0                 },        /* SRAV */
16616     { instruction         , 0                   , 0   , 32,
16617        0xfc0003ff, 0x20000098, &NMD::MULU             , 0,
16618        0x0                 },        /* MULU */
16619     { reserved_block      , 0                   , 0   , 32,
16620        0xfc0003ff, 0x200000a0, 0                      , 0,
16621        0x0                 },        /* _POOL32A0~*(20) */
16622     { reserved_block      , 0                   , 0   , 32,
16623        0xfc0003ff, 0x200000a8, 0                      , 0,
16624        0x0                 },        /* _POOL32A0~*(21) */
16625     { instruction         , 0                   , 0   , 32,
16626        0xfc0003ff, 0x200000b0, &NMD::MFGC0            , 0,
16627        CP0_ | VZ_          },        /* MFGC0 */
16628     { instruction         , 0                   , 0   , 32,
16629        0xfc0003ff, 0x200000b8, &NMD::MFHGC0           , 0,
16630        CP0_ | VZ_ | MVH_   },        /* MFHGC0 */
16631     { reserved_block      , 0                   , 0   , 32,
16632        0xfc0003ff, 0x200000c0, 0                      , 0,
16633        0x0                 },        /* _POOL32A0~*(24) */
16634     { reserved_block      , 0                   , 0   , 32,
16635        0xfc0003ff, 0x200000c8, 0                      , 0,
16636        0x0                 },        /* _POOL32A0~*(25) */
16637     { instruction         , 0                   , 0   , 32,
16638        0xfc0003ff, 0x200000d0, &NMD::ROTRV            , 0,
16639        0x0                 },        /* ROTRV */
16640     { instruction         , 0                   , 0   , 32,
16641        0xfc0003ff, 0x200000d8, &NMD::MUHU             , 0,
16642        0x0                 },        /* MUHU */
16643     { reserved_block      , 0                   , 0   , 32,
16644        0xfc0003ff, 0x200000e0, 0                      , 0,
16645        0x0                 },        /* _POOL32A0~*(28) */
16646     { reserved_block      , 0                   , 0   , 32,
16647        0xfc0003ff, 0x200000e8, 0                      , 0,
16648        0x0                 },        /* _POOL32A0~*(29) */
16649     { instruction         , 0                   , 0   , 32,
16650        0xfc0003ff, 0x200000f0, &NMD::MTGC0            , 0,
16651        CP0_ | VZ_          },        /* MTGC0 */
16652     { instruction         , 0                   , 0   , 32,
16653        0xfc0003ff, 0x200000f8, &NMD::MTHGC0           , 0,
16654        CP0_ | VZ_ | MVH_   },        /* MTHGC0 */
16655     { reserved_block      , 0                   , 0   , 32,
16656        0xfc0003ff, 0x20000100, 0                      , 0,
16657        0x0                 },        /* _POOL32A0~*(32) */
16658     { reserved_block      , 0                   , 0   , 32,
16659        0xfc0003ff, 0x20000108, 0                      , 0,
16660        0x0                 },        /* _POOL32A0~*(33) */
16661     { instruction         , 0                   , 0   , 32,
16662        0xfc0003ff, 0x20000110, &NMD::ADD              , 0,
16663        XMMS_               },        /* ADD */
16664     { instruction         , 0                   , 0   , 32,
16665        0xfc0003ff, 0x20000118, &NMD::DIV              , 0,
16666        0x0                 },        /* DIV */
16667     { reserved_block      , 0                   , 0   , 32,
16668        0xfc0003ff, 0x20000120, 0                      , 0,
16669        0x0                 },        /* _POOL32A0~*(36) */
16670     { reserved_block      , 0                   , 0   , 32,
16671        0xfc0003ff, 0x20000128, 0                      , 0,
16672        0x0                 },        /* _POOL32A0~*(37) */
16673     { instruction         , 0                   , 0   , 32,
16674        0xfc0003ff, 0x20000130, &NMD::DMFC0            , 0,
16675        CP0_ | MIPS64_      },        /* DMFC0 */
16676     { reserved_block      , 0                   , 0   , 32,
16677        0xfc0003ff, 0x20000138, 0                      , 0,
16678        0x0                 },        /* _POOL32A0~*(39) */
16679     { reserved_block      , 0                   , 0   , 32,
16680        0xfc0003ff, 0x20000140, 0                      , 0,
16681        0x0                 },        /* _POOL32A0~*(40) */
16682     { reserved_block      , 0                   , 0   , 32,
16683        0xfc0003ff, 0x20000148, 0                      , 0,
16684        0x0                 },        /* _POOL32A0~*(41) */
16685     { instruction         , 0                   , 0   , 32,
16686        0xfc0003ff, 0x20000150, &NMD::ADDU_32_         , 0,
16687        0x0                 },        /* ADDU[32] */
16688     { instruction         , 0                   , 0   , 32,
16689        0xfc0003ff, 0x20000158, &NMD::MOD              , 0,
16690        0x0                 },        /* MOD */
16691     { reserved_block      , 0                   , 0   , 32,
16692        0xfc0003ff, 0x20000160, 0                      , 0,
16693        0x0                 },        /* _POOL32A0~*(44) */
16694     { reserved_block      , 0                   , 0   , 32,
16695        0xfc0003ff, 0x20000168, 0                      , 0,
16696        0x0                 },        /* _POOL32A0~*(45) */
16697     { instruction         , 0                   , 0   , 32,
16698        0xfc0003ff, 0x20000170, &NMD::DMTC0            , 0,
16699        CP0_ | MIPS64_      },        /* DMTC0 */
16700     { reserved_block      , 0                   , 0   , 32,
16701        0xfc0003ff, 0x20000178, 0                      , 0,
16702        0x0                 },        /* _POOL32A0~*(47) */
16703     { reserved_block      , 0                   , 0   , 32,
16704        0xfc0003ff, 0x20000180, 0                      , 0,
16705        0x0                 },        /* _POOL32A0~*(48) */
16706     { reserved_block      , 0                   , 0   , 32,
16707        0xfc0003ff, 0x20000188, 0                      , 0,
16708        0x0                 },        /* _POOL32A0~*(49) */
16709     { instruction         , 0                   , 0   , 32,
16710        0xfc0003ff, 0x20000190, &NMD::SUB              , 0,
16711        XMMS_               },        /* SUB */
16712     { instruction         , 0                   , 0   , 32,
16713        0xfc0003ff, 0x20000198, &NMD::DIVU             , 0,
16714        0x0                 },        /* DIVU */
16715     { reserved_block      , 0                   , 0   , 32,
16716        0xfc0003ff, 0x200001a0, 0                      , 0,
16717        0x0                 },        /* _POOL32A0~*(52) */
16718     { reserved_block      , 0                   , 0   , 32,
16719        0xfc0003ff, 0x200001a8, 0                      , 0,
16720        0x0                 },        /* _POOL32A0~*(53) */
16721     { instruction         , 0                   , 0   , 32,
16722        0xfc0003ff, 0x200001b0, &NMD::DMFGC0           , 0,
16723        CP0_ | MIPS64_ | VZ_},        /* DMFGC0 */
16724     { reserved_block      , 0                   , 0   , 32,
16725        0xfc0003ff, 0x200001b8, 0                      , 0,
16726        0x0                 },        /* _POOL32A0~*(55) */
16727     { instruction         , 0                   , 0   , 32,
16728        0xfc0003ff, 0x200001c0, &NMD::RDHWR            , 0,
16729        XMMS_               },        /* RDHWR */
16730     { reserved_block      , 0                   , 0   , 32,
16731        0xfc0003ff, 0x200001c8, 0                      , 0,
16732        0x0                 },        /* _POOL32A0~*(57) */
16733     { instruction         , 0                   , 0   , 32,
16734        0xfc0003ff, 0x200001d0, &NMD::SUBU_32_         , 0,
16735        0x0                 },        /* SUBU[32] */
16736     { instruction         , 0                   , 0   , 32,
16737        0xfc0003ff, 0x200001d8, &NMD::MODU             , 0,
16738        0x0                 },        /* MODU */
16739     { reserved_block      , 0                   , 0   , 32,
16740        0xfc0003ff, 0x200001e0, 0                      , 0,
16741        0x0                 },        /* _POOL32A0~*(60) */
16742     { reserved_block      , 0                   , 0   , 32,
16743        0xfc0003ff, 0x200001e8, 0                      , 0,
16744        0x0                 },        /* _POOL32A0~*(61) */
16745     { instruction         , 0                   , 0   , 32,
16746        0xfc0003ff, 0x200001f0, &NMD::DMTGC0           , 0,
16747        CP0_ | MIPS64_ | VZ_},        /* DMTGC0 */
16748     { reserved_block      , 0                   , 0   , 32,
16749        0xfc0003ff, 0x200001f8, 0                      , 0,
16750        0x0                 },        /* _POOL32A0~*(63) */
16751     { reserved_block      , 0                   , 0   , 32,
16752        0xfc0003ff, 0x20000200, 0                      , 0,
16753        0x0                 },        /* _POOL32A0~*(64) */
16754     { reserved_block      , 0                   , 0   , 32,
16755        0xfc0003ff, 0x20000208, 0                      , 0,
16756        0x0                 },        /* _POOL32A0~*(65) */
16757     { pool                , P_CMOVE             , 2   , 32,
16758        0xfc0003ff, 0x20000210, 0                      , 0,
16759        0x0                 },        /* P.CMOVE */
16760     { reserved_block      , 0                   , 0   , 32,
16761        0xfc0003ff, 0x20000218, 0                      , 0,
16762        0x0                 },        /* _POOL32A0~*(67) */
16763     { reserved_block      , 0                   , 0   , 32,
16764        0xfc0003ff, 0x20000220, 0                      , 0,
16765        0x0                 },        /* _POOL32A0~*(68) */
16766     { instruction         , 0                   , 0   , 32,
16767        0xfc0003ff, 0x20000228, &NMD::FORK             , 0,
16768        MT_                 },        /* FORK */
16769     { instruction         , 0                   , 0   , 32,
16770        0xfc0003ff, 0x20000230, &NMD::MFTR             , 0,
16771        MT_                 },        /* MFTR */
16772     { instruction         , 0                   , 0   , 32,
16773        0xfc0003ff, 0x20000238, &NMD::MFHTR            , 0,
16774        MT_                 },        /* MFHTR */
16775     { reserved_block      , 0                   , 0   , 32,
16776        0xfc0003ff, 0x20000240, 0                      , 0,
16777        0x0                 },        /* _POOL32A0~*(72) */
16778     { reserved_block      , 0                   , 0   , 32,
16779        0xfc0003ff, 0x20000248, 0                      , 0,
16780        0x0                 },        /* _POOL32A0~*(73) */
16781     { instruction         , 0                   , 0   , 32,
16782        0xfc0003ff, 0x20000250, &NMD::AND_32_          , 0,
16783        0x0                 },        /* AND[32] */
16784     { reserved_block      , 0                   , 0   , 32,
16785        0xfc0003ff, 0x20000258, 0                      , 0,
16786        0x0                 },        /* _POOL32A0~*(75) */
16787     { reserved_block      , 0                   , 0   , 32,
16788        0xfc0003ff, 0x20000260, 0                      , 0,
16789        0x0                 },        /* _POOL32A0~*(76) */
16790     { instruction         , 0                   , 0   , 32,
16791        0xfc0003ff, 0x20000268, &NMD::YIELD            , 0,
16792        MT_                 },        /* YIELD */
16793     { instruction         , 0                   , 0   , 32,
16794        0xfc0003ff, 0x20000270, &NMD::MTTR             , 0,
16795        MT_                 },        /* MTTR */
16796     { instruction         , 0                   , 0   , 32,
16797        0xfc0003ff, 0x20000278, &NMD::MTHTR            , 0,
16798        MT_                 },        /* MTHTR */
16799     { reserved_block      , 0                   , 0   , 32,
16800        0xfc0003ff, 0x20000280, 0                      , 0,
16801        0x0                 },        /* _POOL32A0~*(80) */
16802     { reserved_block      , 0                   , 0   , 32,
16803        0xfc0003ff, 0x20000288, 0                      , 0,
16804        0x0                 },        /* _POOL32A0~*(81) */
16805     { instruction         , 0                   , 0   , 32,
16806        0xfc0003ff, 0x20000290, &NMD::OR_32_           , 0,
16807        0x0                 },        /* OR[32] */
16808     { reserved_block      , 0                   , 0   , 32,
16809        0xfc0003ff, 0x20000298, 0                      , 0,
16810        0x0                 },        /* _POOL32A0~*(83) */
16811     { reserved_block      , 0                   , 0   , 32,
16812        0xfc0003ff, 0x200002a0, 0                      , 0,
16813        0x0                 },        /* _POOL32A0~*(84) */
16814     { reserved_block      , 0                   , 0   , 32,
16815        0xfc0003ff, 0x200002a8, 0                      , 0,
16816        0x0                 },        /* _POOL32A0~*(85) */
16817     { pool                , P_MT_VPE            , 8   , 32,
16818        0xfc0003ff, 0x200002b0, 0                      , 0,
16819        0x0                 },        /* P.MT_VPE */
16820     { reserved_block      , 0                   , 0   , 32,
16821        0xfc0003ff, 0x200002b8, 0                      , 0,
16822        0x0                 },        /* _POOL32A0~*(87) */
16823     { reserved_block      , 0                   , 0   , 32,
16824        0xfc0003ff, 0x200002c0, 0                      , 0,
16825        0x0                 },        /* _POOL32A0~*(88) */
16826     { reserved_block      , 0                   , 0   , 32,
16827        0xfc0003ff, 0x200002c8, 0                      , 0,
16828        0x0                 },        /* _POOL32A0~*(89) */
16829     { instruction         , 0                   , 0   , 32,
16830        0xfc0003ff, 0x200002d0, &NMD::NOR              , 0,
16831        0x0                 },        /* NOR */
16832     { reserved_block      , 0                   , 0   , 32,
16833        0xfc0003ff, 0x200002d8, 0                      , 0,
16834        0x0                 },        /* _POOL32A0~*(91) */
16835     { reserved_block      , 0                   , 0   , 32,
16836        0xfc0003ff, 0x200002e0, 0                      , 0,
16837        0x0                 },        /* _POOL32A0~*(92) */
16838     { reserved_block      , 0                   , 0   , 32,
16839        0xfc0003ff, 0x200002e8, 0                      , 0,
16840        0x0                 },        /* _POOL32A0~*(93) */
16841     { reserved_block      , 0                   , 0   , 32,
16842        0xfc0003ff, 0x200002f0, 0                      , 0,
16843        0x0                 },        /* _POOL32A0~*(94) */
16844     { reserved_block      , 0                   , 0   , 32,
16845        0xfc0003ff, 0x200002f8, 0                      , 0,
16846        0x0                 },        /* _POOL32A0~*(95) */
16847     { reserved_block      , 0                   , 0   , 32,
16848        0xfc0003ff, 0x20000300, 0                      , 0,
16849        0x0                 },        /* _POOL32A0~*(96) */
16850     { reserved_block      , 0                   , 0   , 32,
16851        0xfc0003ff, 0x20000308, 0                      , 0,
16852        0x0                 },        /* _POOL32A0~*(97) */
16853     { instruction         , 0                   , 0   , 32,
16854        0xfc0003ff, 0x20000310, &NMD::XOR_32_          , 0,
16855        0x0                 },        /* XOR[32] */
16856     { reserved_block      , 0                   , 0   , 32,
16857        0xfc0003ff, 0x20000318, 0                      , 0,
16858        0x0                 },        /* _POOL32A0~*(99) */
16859     { reserved_block      , 0                   , 0   , 32,
16860        0xfc0003ff, 0x20000320, 0                      , 0,
16861        0x0                 },        /* _POOL32A0~*(100) */
16862     { reserved_block      , 0                   , 0   , 32,
16863        0xfc0003ff, 0x20000328, 0                      , 0,
16864        0x0                 },        /* _POOL32A0~*(101) */
16865     { reserved_block      , 0                   , 0   , 32,
16866        0xfc0003ff, 0x20000330, 0                      , 0,
16867        0x0                 },        /* _POOL32A0~*(102) */
16868     { reserved_block      , 0                   , 0   , 32,
16869        0xfc0003ff, 0x20000338, 0                      , 0,
16870        0x0                 },        /* _POOL32A0~*(103) */
16871     { reserved_block      , 0                   , 0   , 32,
16872        0xfc0003ff, 0x20000340, 0                      , 0,
16873        0x0                 },        /* _POOL32A0~*(104) */
16874     { reserved_block      , 0                   , 0   , 32,
16875        0xfc0003ff, 0x20000348, 0                      , 0,
16876        0x0                 },        /* _POOL32A0~*(105) */
16877     { instruction         , 0                   , 0   , 32,
16878        0xfc0003ff, 0x20000350, &NMD::SLT              , 0,
16879        0x0                 },        /* SLT */
16880     { reserved_block      , 0                   , 0   , 32,
16881        0xfc0003ff, 0x20000358, 0                      , 0,
16882        0x0                 },        /* _POOL32A0~*(107) */
16883     { reserved_block      , 0                   , 0   , 32,
16884        0xfc0003ff, 0x20000360, 0                      , 0,
16885        0x0                 },        /* _POOL32A0~*(108) */
16886     { reserved_block      , 0                   , 0   , 32,
16887        0xfc0003ff, 0x20000368, 0                      , 0,
16888        0x0                 },        /* _POOL32A0~*(109) */
16889     { reserved_block      , 0                   , 0   , 32,
16890        0xfc0003ff, 0x20000370, 0                      , 0,
16891        0x0                 },        /* _POOL32A0~*(110) */
16892     { reserved_block      , 0                   , 0   , 32,
16893        0xfc0003ff, 0x20000378, 0                      , 0,
16894        0x0                 },        /* _POOL32A0~*(111) */
16895     { reserved_block      , 0                   , 0   , 32,
16896        0xfc0003ff, 0x20000380, 0                      , 0,
16897        0x0                 },        /* _POOL32A0~*(112) */
16898     { reserved_block      , 0                   , 0   , 32,
16899        0xfc0003ff, 0x20000388, 0                      , 0,
16900        0x0                 },        /* _POOL32A0~*(113) */
16901     { pool                , P_SLTU              , 2   , 32,
16902        0xfc0003ff, 0x20000390, 0                      , 0,
16903        0x0                 },        /* P.SLTU */
16904     { reserved_block      , 0                   , 0   , 32,
16905        0xfc0003ff, 0x20000398, 0                      , 0,
16906        0x0                 },        /* _POOL32A0~*(115) */
16907     { reserved_block      , 0                   , 0   , 32,
16908        0xfc0003ff, 0x200003a0, 0                      , 0,
16909        0x0                 },        /* _POOL32A0~*(116) */
16910     { reserved_block      , 0                   , 0   , 32,
16911        0xfc0003ff, 0x200003a8, 0                      , 0,
16912        0x0                 },        /* _POOL32A0~*(117) */
16913     { reserved_block      , 0                   , 0   , 32,
16914        0xfc0003ff, 0x200003b0, 0                      , 0,
16915        0x0                 },        /* _POOL32A0~*(118) */
16916     { reserved_block      , 0                   , 0   , 32,
16917        0xfc0003ff, 0x200003b8, 0                      , 0,
16918        0x0                 },        /* _POOL32A0~*(119) */
16919     { reserved_block      , 0                   , 0   , 32,
16920        0xfc0003ff, 0x200003c0, 0                      , 0,
16921        0x0                 },        /* _POOL32A0~*(120) */
16922     { reserved_block      , 0                   , 0   , 32,
16923        0xfc0003ff, 0x200003c8, 0                      , 0,
16924        0x0                 },        /* _POOL32A0~*(121) */
16925     { instruction         , 0                   , 0   , 32,
16926        0xfc0003ff, 0x200003d0, &NMD::SOV              , 0,
16927        0x0                 },        /* SOV */
16928     { reserved_block      , 0                   , 0   , 32,
16929        0xfc0003ff, 0x200003d8, 0                      , 0,
16930        0x0                 },        /* _POOL32A0~*(123) */
16931     { reserved_block      , 0                   , 0   , 32,
16932        0xfc0003ff, 0x200003e0, 0                      , 0,
16933        0x0                 },        /* _POOL32A0~*(124) */
16934     { reserved_block      , 0                   , 0   , 32,
16935        0xfc0003ff, 0x200003e8, 0                      , 0,
16936        0x0                 },        /* _POOL32A0~*(125) */
16937     { reserved_block      , 0                   , 0   , 32,
16938        0xfc0003ff, 0x200003f0, 0                      , 0,
16939        0x0                 },        /* _POOL32A0~*(126) */
16940     { reserved_block      , 0                   , 0   , 32,
16941        0xfc0003ff, 0x200003f8, 0                      , 0,
16942        0x0                 },        /* _POOL32A0~*(127) */
16943 };
16944
16945
16946 NMD::Pool NMD::ADDQ__S__PH[2] = {
16947     { instruction         , 0                   , 0   , 32,
16948        0xfc0007ff, 0x2000000d, &NMD::ADDQ_PH          , 0,
16949        DSP_                },        /* ADDQ.PH */
16950     { instruction         , 0                   , 0   , 32,
16951        0xfc0007ff, 0x2000040d, &NMD::ADDQ_S_PH        , 0,
16952        DSP_                },        /* ADDQ_S.PH */
16953 };
16954
16955
16956 NMD::Pool NMD::MUL__S__PH[2] = {
16957     { instruction         , 0                   , 0   , 32,
16958        0xfc0007ff, 0x2000002d, &NMD::MUL_PH           , 0,
16959        DSP_                },        /* MUL.PH */
16960     { instruction         , 0                   , 0   , 32,
16961        0xfc0007ff, 0x2000042d, &NMD::MUL_S_PH         , 0,
16962        DSP_                },        /* MUL_S.PH */
16963 };
16964
16965
16966 NMD::Pool NMD::ADDQH__R__PH[2] = {
16967     { instruction         , 0                   , 0   , 32,
16968        0xfc0007ff, 0x2000004d, &NMD::ADDQH_PH         , 0,
16969        DSP_                },        /* ADDQH.PH */
16970     { instruction         , 0                   , 0   , 32,
16971        0xfc0007ff, 0x2000044d, &NMD::ADDQH_R_PH       , 0,
16972        DSP_                },        /* ADDQH_R.PH */
16973 };
16974
16975
16976 NMD::Pool NMD::ADDQH__R__W[2] = {
16977     { instruction         , 0                   , 0   , 32,
16978        0xfc0007ff, 0x2000008d, &NMD::ADDQH_W          , 0,
16979        DSP_                },        /* ADDQH.W */
16980     { instruction         , 0                   , 0   , 32,
16981        0xfc0007ff, 0x2000048d, &NMD::ADDQH_R_W        , 0,
16982        DSP_                },        /* ADDQH_R.W */
16983 };
16984
16985
16986 NMD::Pool NMD::ADDU__S__QB[2] = {
16987     { instruction         , 0                   , 0   , 32,
16988        0xfc0007ff, 0x200000cd, &NMD::ADDU_QB          , 0,
16989        DSP_                },        /* ADDU.QB */
16990     { instruction         , 0                   , 0   , 32,
16991        0xfc0007ff, 0x200004cd, &NMD::ADDU_S_QB        , 0,
16992        DSP_                },        /* ADDU_S.QB */
16993 };
16994
16995
16996 NMD::Pool NMD::ADDU__S__PH[2] = {
16997     { instruction         , 0                   , 0   , 32,
16998        0xfc0007ff, 0x2000010d, &NMD::ADDU_PH          , 0,
16999        DSP_                },        /* ADDU.PH */
17000     { instruction         , 0                   , 0   , 32,
17001        0xfc0007ff, 0x2000050d, &NMD::ADDU_S_PH        , 0,
17002        DSP_                },        /* ADDU_S.PH */
17003 };
17004
17005
17006 NMD::Pool NMD::ADDUH__R__QB[2] = {
17007     { instruction         , 0                   , 0   , 32,
17008        0xfc0007ff, 0x2000014d, &NMD::ADDUH_QB         , 0,
17009        DSP_                },        /* ADDUH.QB */
17010     { instruction         , 0                   , 0   , 32,
17011        0xfc0007ff, 0x2000054d, &NMD::ADDUH_R_QB       , 0,
17012        DSP_                },        /* ADDUH_R.QB */
17013 };
17014
17015
17016 NMD::Pool NMD::SHRAV__R__PH[2] = {
17017     { instruction         , 0                   , 0   , 32,
17018        0xfc0007ff, 0x2000018d, &NMD::SHRAV_PH         , 0,
17019        DSP_                },        /* SHRAV.PH */
17020     { instruction         , 0                   , 0   , 32,
17021        0xfc0007ff, 0x2000058d, &NMD::SHRAV_R_PH       , 0,
17022        DSP_                },        /* SHRAV_R.PH */
17023 };
17024
17025
17026 NMD::Pool NMD::SHRAV__R__QB[2] = {
17027     { instruction         , 0                   , 0   , 32,
17028        0xfc0007ff, 0x200001cd, &NMD::SHRAV_QB         , 0,
17029        DSP_                },        /* SHRAV.QB */
17030     { instruction         , 0                   , 0   , 32,
17031        0xfc0007ff, 0x200005cd, &NMD::SHRAV_R_QB       , 0,
17032        DSP_                },        /* SHRAV_R.QB */
17033 };
17034
17035
17036 NMD::Pool NMD::SUBQ__S__PH[2] = {
17037     { instruction         , 0                   , 0   , 32,
17038        0xfc0007ff, 0x2000020d, &NMD::SUBQ_PH          , 0,
17039        DSP_                },        /* SUBQ.PH */
17040     { instruction         , 0                   , 0   , 32,
17041        0xfc0007ff, 0x2000060d, &NMD::SUBQ_S_PH        , 0,
17042        DSP_                },        /* SUBQ_S.PH */
17043 };
17044
17045
17046 NMD::Pool NMD::SUBQH__R__PH[2] = {
17047     { instruction         , 0                   , 0   , 32,
17048        0xfc0007ff, 0x2000024d, &NMD::SUBQH_PH         , 0,
17049        DSP_                },        /* SUBQH.PH */
17050     { instruction         , 0                   , 0   , 32,
17051        0xfc0007ff, 0x2000064d, &NMD::SUBQH_R_PH       , 0,
17052        DSP_                },        /* SUBQH_R.PH */
17053 };
17054
17055
17056 NMD::Pool NMD::SUBQH__R__W[2] = {
17057     { instruction         , 0                   , 0   , 32,
17058        0xfc0007ff, 0x2000028d, &NMD::SUBQH_W          , 0,
17059        DSP_                },        /* SUBQH.W */
17060     { instruction         , 0                   , 0   , 32,
17061        0xfc0007ff, 0x2000068d, &NMD::SUBQH_R_W        , 0,
17062        DSP_                },        /* SUBQH_R.W */
17063 };
17064
17065
17066 NMD::Pool NMD::SUBU__S__QB[2] = {
17067     { instruction         , 0                   , 0   , 32,
17068        0xfc0007ff, 0x200002cd, &NMD::SUBU_QB          , 0,
17069        DSP_                },        /* SUBU.QB */
17070     { instruction         , 0                   , 0   , 32,
17071        0xfc0007ff, 0x200006cd, &NMD::SUBU_S_QB        , 0,
17072        DSP_                },        /* SUBU_S.QB */
17073 };
17074
17075
17076 NMD::Pool NMD::SUBU__S__PH[2] = {
17077     { instruction         , 0                   , 0   , 32,
17078        0xfc0007ff, 0x2000030d, &NMD::SUBU_PH          , 0,
17079        DSP_                },        /* SUBU.PH */
17080     { instruction         , 0                   , 0   , 32,
17081        0xfc0007ff, 0x2000070d, &NMD::SUBU_S_PH        , 0,
17082        DSP_                },        /* SUBU_S.PH */
17083 };
17084
17085
17086 NMD::Pool NMD::SHRA__R__PH[2] = {
17087     { instruction         , 0                   , 0   , 32,
17088        0xfc0007ff, 0x20000335, &NMD::SHRA_PH          , 0,
17089        DSP_                },        /* SHRA.PH */
17090     { instruction         , 0                   , 0   , 32,
17091        0xfc0007ff, 0x20000735, &NMD::SHRA_R_PH        , 0,
17092        DSP_                },        /* SHRA_R.PH */
17093 };
17094
17095
17096 NMD::Pool NMD::SUBUH__R__QB[2] = {
17097     { instruction         , 0                   , 0   , 32,
17098        0xfc0007ff, 0x2000034d, &NMD::SUBUH_QB         , 0,
17099        DSP_                },        /* SUBUH.QB */
17100     { instruction         , 0                   , 0   , 32,
17101        0xfc0007ff, 0x2000074d, &NMD::SUBUH_R_QB       , 0,
17102        DSP_                },        /* SUBUH_R.QB */
17103 };
17104
17105
17106 NMD::Pool NMD::SHLLV__S__PH[2] = {
17107     { instruction         , 0                   , 0   , 32,
17108        0xfc0007ff, 0x2000038d, &NMD::SHLLV_PH         , 0,
17109        DSP_                },        /* SHLLV.PH */
17110     { instruction         , 0                   , 0   , 32,
17111        0xfc0007ff, 0x2000078d, &NMD::SHLLV_S_PH       , 0,
17112        DSP_                },        /* SHLLV_S.PH */
17113 };
17114
17115
17116 NMD::Pool NMD::SHLL__S__PH[4] = {
17117     { instruction         , 0                   , 0   , 32,
17118        0xfc000fff, 0x200003b5, &NMD::SHLL_PH          , 0,
17119        DSP_                },        /* SHLL.PH */
17120     { reserved_block      , 0                   , 0   , 32,
17121        0xfc000fff, 0x200007b5, 0                      , 0,
17122        0x0                 },        /* SHLL[_S].PH~*(1) */
17123     { instruction         , 0                   , 0   , 32,
17124        0xfc000fff, 0x20000bb5, &NMD::SHLL_S_PH        , 0,
17125        DSP_                },        /* SHLL_S.PH */
17126     { reserved_block      , 0                   , 0   , 32,
17127        0xfc000fff, 0x20000fb5, 0                      , 0,
17128        0x0                 },        /* SHLL[_S].PH~*(3) */
17129 };
17130
17131
17132 NMD::Pool NMD::PRECR_SRA__R__PH_W[2] = {
17133     { instruction         , 0                   , 0   , 32,
17134        0xfc0007ff, 0x200003cd, &NMD::PRECR_SRA_PH_W   , 0,
17135        DSP_                },        /* PRECR_SRA.PH.W */
17136     { instruction         , 0                   , 0   , 32,
17137        0xfc0007ff, 0x200007cd, &NMD::PRECR_SRA_R_PH_W , 0,
17138        DSP_                },        /* PRECR_SRA_R.PH.W */
17139 };
17140
17141
17142 NMD::Pool NMD::_POOL32A5[128] = {
17143     { instruction         , 0                   , 0   , 32,
17144        0xfc0003ff, 0x20000005, &NMD::CMP_EQ_PH        , 0,
17145        DSP_                },        /* CMP.EQ.PH */
17146     { pool                , ADDQ__S__PH         , 2   , 32,
17147        0xfc0003ff, 0x2000000d, 0                      , 0,
17148        0x0                 },        /* ADDQ[_S].PH */
17149     { reserved_block      , 0                   , 0   , 32,
17150        0xfc0003ff, 0x20000015, 0                      , 0,
17151        0x0                 },        /* _POOL32A5~*(2) */
17152     { instruction         , 0                   , 0   , 32,
17153        0xfc0003ff, 0x2000001d, &NMD::SHILO            , 0,
17154        DSP_                },        /* SHILO */
17155     { instruction         , 0                   , 0   , 32,
17156        0xfc0003ff, 0x20000025, &NMD::MULEQ_S_W_PHL    , 0,
17157        DSP_                },        /* MULEQ_S.W.PHL */
17158     { pool                , MUL__S__PH          , 2   , 32,
17159        0xfc0003ff, 0x2000002d, 0                      , 0,
17160        0x0                 },        /* MUL[_S].PH */
17161     { reserved_block      , 0                   , 0   , 32,
17162        0xfc0003ff, 0x20000035, 0                      , 0,
17163        0x0                 },        /* _POOL32A5~*(6) */
17164     { instruction         , 0                   , 0   , 32,
17165        0xfc0003ff, 0x2000003d, &NMD::REPL_PH          , 0,
17166        DSP_                },        /* REPL.PH */
17167     { instruction         , 0                   , 0   , 32,
17168        0xfc0003ff, 0x20000045, &NMD::CMP_LT_PH        , 0,
17169        DSP_                },        /* CMP.LT.PH */
17170     { pool                , ADDQH__R__PH        , 2   , 32,
17171        0xfc0003ff, 0x2000004d, 0                      , 0,
17172        0x0                 },        /* ADDQH[_R].PH */
17173     { reserved_block      , 0                   , 0   , 32,
17174        0xfc0003ff, 0x20000055, 0                      , 0,
17175        0x0                 },        /* _POOL32A5~*(10) */
17176     { reserved_block      , 0                   , 0   , 32,
17177        0xfc0003ff, 0x2000005d, 0                      , 0,
17178        0x0                 },        /* _POOL32A5~*(11) */
17179     { instruction         , 0                   , 0   , 32,
17180        0xfc0003ff, 0x20000065, &NMD::MULEQ_S_W_PHR    , 0,
17181        DSP_                },        /* MULEQ_S.W.PHR */
17182     { instruction         , 0                   , 0   , 32,
17183        0xfc0003ff, 0x2000006d, &NMD::PRECR_QB_PH      , 0,
17184        DSP_                },        /* PRECR.QB.PH */
17185     { reserved_block      , 0                   , 0   , 32,
17186        0xfc0003ff, 0x20000075, 0                      , 0,
17187        0x0                 },        /* _POOL32A5~*(14) */
17188     { reserved_block      , 0                   , 0   , 32,
17189        0xfc0003ff, 0x2000007d, 0                      , 0,
17190        0x0                 },        /* _POOL32A5~*(15) */
17191     { instruction         , 0                   , 0   , 32,
17192        0xfc0003ff, 0x20000085, &NMD::CMP_LE_PH        , 0,
17193        DSP_                },        /* CMP.LE.PH */
17194     { pool                , ADDQH__R__W         , 2   , 32,
17195        0xfc0003ff, 0x2000008d, 0                      , 0,
17196        0x0                 },        /* ADDQH[_R].W */
17197     { instruction         , 0                   , 0   , 32,
17198        0xfc0003ff, 0x20000095, &NMD::MULEU_S_PH_QBL   , 0,
17199        DSP_                },        /* MULEU_S.PH.QBL */
17200     { reserved_block      , 0                   , 0   , 32,
17201        0xfc0003ff, 0x2000009d, 0                      , 0,
17202        0x0                 },        /* _POOL32A5~*(19) */
17203     { reserved_block      , 0                   , 0   , 32,
17204        0xfc0003ff, 0x200000a5, 0                      , 0,
17205        0x0                 },        /* _POOL32A5~*(20) */
17206     { instruction         , 0                   , 0   , 32,
17207        0xfc0003ff, 0x200000ad, &NMD::PRECRQ_QB_PH     , 0,
17208        DSP_                },        /* PRECRQ.QB.PH */
17209     { reserved_block      , 0                   , 0   , 32,
17210        0xfc0003ff, 0x200000b5, 0                      , 0,
17211        0x0                 },        /* _POOL32A5~*(22) */
17212     { reserved_block      , 0                   , 0   , 32,
17213        0xfc0003ff, 0x200000bd, 0                      , 0,
17214        0x0                 },        /* _POOL32A5~*(23) */
17215     { instruction         , 0                   , 0   , 32,
17216        0xfc0003ff, 0x200000c5, &NMD::CMPGU_EQ_QB      , 0,
17217        DSP_                },        /* CMPGU.EQ.QB */
17218     { pool                , ADDU__S__QB         , 2   , 32,
17219        0xfc0003ff, 0x200000cd, 0                      , 0,
17220        0x0                 },        /* ADDU[_S].QB */
17221     { instruction         , 0                   , 0   , 32,
17222        0xfc0003ff, 0x200000d5, &NMD::MULEU_S_PH_QBR   , 0,
17223        DSP_                },        /* MULEU_S.PH.QBR */
17224     { reserved_block      , 0                   , 0   , 32,
17225        0xfc0003ff, 0x200000dd, 0                      , 0,
17226        0x0                 },        /* _POOL32A5~*(27) */
17227     { reserved_block      , 0                   , 0   , 32,
17228        0xfc0003ff, 0x200000e5, 0                      , 0,
17229        0x0                 },        /* _POOL32A5~*(28) */
17230     { instruction         , 0                   , 0   , 32,
17231        0xfc0003ff, 0x200000ed, &NMD::PRECRQ_PH_W      , 0,
17232        DSP_                },        /* PRECRQ.PH.W */
17233     { reserved_block      , 0                   , 0   , 32,
17234        0xfc0003ff, 0x200000f5, 0                      , 0,
17235        0x0                 },        /* _POOL32A5~*(30) */
17236     { reserved_block      , 0                   , 0   , 32,
17237        0xfc0003ff, 0x200000fd, 0                      , 0,
17238        0x0                 },        /* _POOL32A5~*(31) */
17239     { instruction         , 0                   , 0   , 32,
17240        0xfc0003ff, 0x20000105, &NMD::CMPGU_LT_QB      , 0,
17241        DSP_                },        /* CMPGU.LT.QB */
17242     { pool                , ADDU__S__PH         , 2   , 32,
17243        0xfc0003ff, 0x2000010d, 0                      , 0,
17244        0x0                 },        /* ADDU[_S].PH */
17245     { instruction         , 0                   , 0   , 32,
17246        0xfc0003ff, 0x20000115, &NMD::MULQ_RS_PH       , 0,
17247        DSP_                },        /* MULQ_RS.PH */
17248     { reserved_block      , 0                   , 0   , 32,
17249        0xfc0003ff, 0x2000011d, 0                      , 0,
17250        0x0                 },        /* _POOL32A5~*(35) */
17251     { reserved_block      , 0                   , 0   , 32,
17252        0xfc0003ff, 0x20000125, 0                      , 0,
17253        0x0                 },        /* _POOL32A5~*(36) */
17254     { instruction         , 0                   , 0   , 32,
17255        0xfc0003ff, 0x2000012d, &NMD::PRECRQ_RS_PH_W   , 0,
17256        DSP_                },        /* PRECRQ_RS.PH.W */
17257     { reserved_block      , 0                   , 0   , 32,
17258        0xfc0003ff, 0x20000135, 0                      , 0,
17259        0x0                 },        /* _POOL32A5~*(38) */
17260     { reserved_block      , 0                   , 0   , 32,
17261        0xfc0003ff, 0x2000013d, 0                      , 0,
17262        0x0                 },        /* _POOL32A5~*(39) */
17263     { instruction         , 0                   , 0   , 32,
17264        0xfc0003ff, 0x20000145, &NMD::CMPGU_LE_QB      , 0,
17265        DSP_                },        /* CMPGU.LE.QB */
17266     { pool                , ADDUH__R__QB        , 2   , 32,
17267        0xfc0003ff, 0x2000014d, 0                      , 0,
17268        0x0                 },        /* ADDUH[_R].QB */
17269     { instruction         , 0                   , 0   , 32,
17270        0xfc0003ff, 0x20000155, &NMD::MULQ_S_PH        , 0,
17271        DSP_                },        /* MULQ_S.PH */
17272     { reserved_block      , 0                   , 0   , 32,
17273        0xfc0003ff, 0x2000015d, 0                      , 0,
17274        0x0                 },        /* _POOL32A5~*(43) */
17275     { reserved_block      , 0                   , 0   , 32,
17276        0xfc0003ff, 0x20000165, 0                      , 0,
17277        0x0                 },        /* _POOL32A5~*(44) */
17278     { instruction         , 0                   , 0   , 32,
17279        0xfc0003ff, 0x2000016d, &NMD::PRECRQU_S_QB_PH  , 0,
17280        DSP_                },        /* PRECRQU_S.QB.PH */
17281     { reserved_block      , 0                   , 0   , 32,
17282        0xfc0003ff, 0x20000175, 0                      , 0,
17283        0x0                 },        /* _POOL32A5~*(46) */
17284     { reserved_block      , 0                   , 0   , 32,
17285        0xfc0003ff, 0x2000017d, 0                      , 0,
17286        0x0                 },        /* _POOL32A5~*(47) */
17287     { instruction         , 0                   , 0   , 32,
17288        0xfc0003ff, 0x20000185, &NMD::CMPGDU_EQ_QB     , 0,
17289        DSP_                },        /* CMPGDU.EQ.QB */
17290     { pool                , SHRAV__R__PH        , 2   , 32,
17291        0xfc0003ff, 0x2000018d, 0                      , 0,
17292        0x0                 },        /* SHRAV[_R].PH */
17293     { instruction         , 0                   , 0   , 32,
17294        0xfc0003ff, 0x20000195, &NMD::MULQ_RS_W        , 0,
17295        DSP_                },        /* MULQ_RS.W */
17296     { reserved_block      , 0                   , 0   , 32,
17297        0xfc0003ff, 0x2000019d, 0                      , 0,
17298        0x0                 },        /* _POOL32A5~*(51) */
17299     { reserved_block      , 0                   , 0   , 32,
17300        0xfc0003ff, 0x200001a5, 0                      , 0,
17301        0x0                 },        /* _POOL32A5~*(52) */
17302     { instruction         , 0                   , 0   , 32,
17303        0xfc0003ff, 0x200001ad, &NMD::PACKRL_PH        , 0,
17304        DSP_                },        /* PACKRL.PH */
17305     { reserved_block      , 0                   , 0   , 32,
17306        0xfc0003ff, 0x200001b5, 0                      , 0,
17307        0x0                 },        /* _POOL32A5~*(54) */
17308     { reserved_block      , 0                   , 0   , 32,
17309        0xfc0003ff, 0x200001bd, 0                      , 0,
17310        0x0                 },        /* _POOL32A5~*(55) */
17311     { instruction         , 0                   , 0   , 32,
17312        0xfc0003ff, 0x200001c5, &NMD::CMPGDU_LT_QB     , 0,
17313        DSP_                },        /* CMPGDU.LT.QB */
17314     { pool                , SHRAV__R__QB        , 2   , 32,
17315        0xfc0003ff, 0x200001cd, 0                      , 0,
17316        0x0                 },        /* SHRAV[_R].QB */
17317     { instruction         , 0                   , 0   , 32,
17318        0xfc0003ff, 0x200001d5, &NMD::MULQ_S_W         , 0,
17319        DSP_                },        /* MULQ_S.W */
17320     { reserved_block      , 0                   , 0   , 32,
17321        0xfc0003ff, 0x200001dd, 0                      , 0,
17322        0x0                 },        /* _POOL32A5~*(59) */
17323     { reserved_block      , 0                   , 0   , 32,
17324        0xfc0003ff, 0x200001e5, 0                      , 0,
17325        0x0                 },        /* _POOL32A5~*(60) */
17326     { instruction         , 0                   , 0   , 32,
17327        0xfc0003ff, 0x200001ed, &NMD::PICK_QB          , 0,
17328        DSP_                },        /* PICK.QB */
17329     { reserved_block      , 0                   , 0   , 32,
17330        0xfc0003ff, 0x200001f5, 0                      , 0,
17331        0x0                 },        /* _POOL32A5~*(62) */
17332     { reserved_block      , 0                   , 0   , 32,
17333        0xfc0003ff, 0x200001fd, 0                      , 0,
17334        0x0                 },        /* _POOL32A5~*(63) */
17335     { instruction         , 0                   , 0   , 32,
17336        0xfc0003ff, 0x20000205, &NMD::CMPGDU_LE_QB     , 0,
17337        DSP_                },        /* CMPGDU.LE.QB */
17338     { pool                , SUBQ__S__PH         , 2   , 32,
17339        0xfc0003ff, 0x2000020d, 0                      , 0,
17340        0x0                 },        /* SUBQ[_S].PH */
17341     { instruction         , 0                   , 0   , 32,
17342        0xfc0003ff, 0x20000215, &NMD::APPEND           , 0,
17343        DSP_                },        /* APPEND */
17344     { reserved_block      , 0                   , 0   , 32,
17345        0xfc0003ff, 0x2000021d, 0                      , 0,
17346        0x0                 },        /* _POOL32A5~*(67) */
17347     { reserved_block      , 0                   , 0   , 32,
17348        0xfc0003ff, 0x20000225, 0                      , 0,
17349        0x0                 },        /* _POOL32A5~*(68) */
17350     { instruction         , 0                   , 0   , 32,
17351        0xfc0003ff, 0x2000022d, &NMD::PICK_PH          , 0,
17352        DSP_                },        /* PICK.PH */
17353     { reserved_block      , 0                   , 0   , 32,
17354        0xfc0003ff, 0x20000235, 0                      , 0,
17355        0x0                 },        /* _POOL32A5~*(70) */
17356     { reserved_block      , 0                   , 0   , 32,
17357        0xfc0003ff, 0x2000023d, 0                      , 0,
17358        0x0                 },        /* _POOL32A5~*(71) */
17359     { instruction         , 0                   , 0   , 32,
17360        0xfc0003ff, 0x20000245, &NMD::CMPU_EQ_QB       , 0,
17361        DSP_                },        /* CMPU.EQ.QB */
17362     { pool                , SUBQH__R__PH        , 2   , 32,
17363        0xfc0003ff, 0x2000024d, 0                      , 0,
17364        0x0                 },        /* SUBQH[_R].PH */
17365     { instruction         , 0                   , 0   , 32,
17366        0xfc0003ff, 0x20000255, &NMD::PREPEND          , 0,
17367        DSP_                },        /* PREPEND */
17368     { reserved_block      , 0                   , 0   , 32,
17369        0xfc0003ff, 0x2000025d, 0                      , 0,
17370        0x0                 },        /* _POOL32A5~*(75) */
17371     { reserved_block      , 0                   , 0   , 32,
17372        0xfc0003ff, 0x20000265, 0                      , 0,
17373        0x0                 },        /* _POOL32A5~*(76) */
17374     { reserved_block      , 0                   , 0   , 32,
17375        0xfc0003ff, 0x2000026d, 0                      , 0,
17376        0x0                 },        /* _POOL32A5~*(77) */
17377     { reserved_block      , 0                   , 0   , 32,
17378        0xfc0003ff, 0x20000275, 0                      , 0,
17379        0x0                 },        /* _POOL32A5~*(78) */
17380     { reserved_block      , 0                   , 0   , 32,
17381        0xfc0003ff, 0x2000027d, 0                      , 0,
17382        0x0                 },        /* _POOL32A5~*(79) */
17383     { instruction         , 0                   , 0   , 32,
17384        0xfc0003ff, 0x20000285, &NMD::CMPU_LT_QB       , 0,
17385        DSP_                },        /* CMPU.LT.QB */
17386     { pool                , SUBQH__R__W         , 2   , 32,
17387        0xfc0003ff, 0x2000028d, 0                      , 0,
17388        0x0                 },        /* SUBQH[_R].W */
17389     { instruction         , 0                   , 0   , 32,
17390        0xfc0003ff, 0x20000295, &NMD::MODSUB           , 0,
17391        DSP_                },        /* MODSUB */
17392     { reserved_block      , 0                   , 0   , 32,
17393        0xfc0003ff, 0x2000029d, 0                      , 0,
17394        0x0                 },        /* _POOL32A5~*(83) */
17395     { reserved_block      , 0                   , 0   , 32,
17396        0xfc0003ff, 0x200002a5, 0                      , 0,
17397        0x0                 },        /* _POOL32A5~*(84) */
17398     { reserved_block      , 0                   , 0   , 32,
17399        0xfc0003ff, 0x200002ad, 0                      , 0,
17400        0x0                 },        /* _POOL32A5~*(85) */
17401     { reserved_block      , 0                   , 0   , 32,
17402        0xfc0003ff, 0x200002b5, 0                      , 0,
17403        0x0                 },        /* _POOL32A5~*(86) */
17404     { reserved_block      , 0                   , 0   , 32,
17405        0xfc0003ff, 0x200002bd, 0                      , 0,
17406        0x0                 },        /* _POOL32A5~*(87) */
17407     { instruction         , 0                   , 0   , 32,
17408        0xfc0003ff, 0x200002c5, &NMD::CMPU_LE_QB       , 0,
17409        DSP_                },        /* CMPU.LE.QB */
17410     { pool                , SUBU__S__QB         , 2   , 32,
17411        0xfc0003ff, 0x200002cd, 0                      , 0,
17412        0x0                 },        /* SUBU[_S].QB */
17413     { instruction         , 0                   , 0   , 32,
17414        0xfc0003ff, 0x200002d5, &NMD::SHRAV_R_W        , 0,
17415        DSP_                },        /* SHRAV_R.W */
17416     { reserved_block      , 0                   , 0   , 32,
17417        0xfc0003ff, 0x200002dd, 0                      , 0,
17418        0x0                 },        /* _POOL32A5~*(91) */
17419     { reserved_block      , 0                   , 0   , 32,
17420        0xfc0003ff, 0x200002e5, 0                      , 0,
17421        0x0                 },        /* _POOL32A5~*(92) */
17422     { reserved_block      , 0                   , 0   , 32,
17423        0xfc0003ff, 0x200002ed, 0                      , 0,
17424        0x0                 },        /* _POOL32A5~*(93) */
17425     { instruction         , 0                   , 0   , 32,
17426        0xfc0003ff, 0x200002f5, &NMD::SHRA_R_W         , 0,
17427        DSP_                },        /* SHRA_R.W */
17428     { reserved_block      , 0                   , 0   , 32,
17429        0xfc0003ff, 0x200002fd, 0                      , 0,
17430        0x0                 },        /* _POOL32A5~*(95) */
17431     { instruction         , 0                   , 0   , 32,
17432        0xfc0003ff, 0x20000305, &NMD::ADDQ_S_W         , 0,
17433        DSP_                },        /* ADDQ_S.W */
17434     { pool                , SUBU__S__PH         , 2   , 32,
17435        0xfc0003ff, 0x2000030d, 0                      , 0,
17436        0x0                 },        /* SUBU[_S].PH */
17437     { instruction         , 0                   , 0   , 32,
17438        0xfc0003ff, 0x20000315, &NMD::SHRLV_PH         , 0,
17439        DSP_                },        /* SHRLV.PH */
17440     { reserved_block      , 0                   , 0   , 32,
17441        0xfc0003ff, 0x2000031d, 0                      , 0,
17442        0x0                 },        /* _POOL32A5~*(99) */
17443     { reserved_block      , 0                   , 0   , 32,
17444        0xfc0003ff, 0x20000325, 0                      , 0,
17445        0x0                 },        /* _POOL32A5~*(100) */
17446     { reserved_block      , 0                   , 0   , 32,
17447        0xfc0003ff, 0x2000032d, 0                      , 0,
17448        0x0                 },        /* _POOL32A5~*(101) */
17449     { pool                , SHRA__R__PH         , 2   , 32,
17450        0xfc0003ff, 0x20000335, 0                      , 0,
17451        0x0                 },        /* SHRA[_R].PH */
17452     { reserved_block      , 0                   , 0   , 32,
17453        0xfc0003ff, 0x2000033d, 0                      , 0,
17454        0x0                 },        /* _POOL32A5~*(103) */
17455     { instruction         , 0                   , 0   , 32,
17456        0xfc0003ff, 0x20000345, &NMD::SUBQ_S_W         , 0,
17457        DSP_                },        /* SUBQ_S.W */
17458     { pool                , SUBUH__R__QB        , 2   , 32,
17459        0xfc0003ff, 0x2000034d, 0                      , 0,
17460        0x0                 },        /* SUBUH[_R].QB */
17461     { instruction         , 0                   , 0   , 32,
17462        0xfc0003ff, 0x20000355, &NMD::SHRLV_QB         , 0,
17463        DSP_                },        /* SHRLV.QB */
17464     { reserved_block      , 0                   , 0   , 32,
17465        0xfc0003ff, 0x2000035d, 0                      , 0,
17466        0x0                 },        /* _POOL32A5~*(107) */
17467     { reserved_block      , 0                   , 0   , 32,
17468        0xfc0003ff, 0x20000365, 0                      , 0,
17469        0x0                 },        /* _POOL32A5~*(108) */
17470     { reserved_block      , 0                   , 0   , 32,
17471        0xfc0003ff, 0x2000036d, 0                      , 0,
17472        0x0                 },        /* _POOL32A5~*(109) */
17473     { reserved_block      , 0                   , 0   , 32,
17474        0xfc0003ff, 0x20000375, 0                      , 0,
17475        0x0                 },        /* _POOL32A5~*(110) */
17476     { reserved_block      , 0                   , 0   , 32,
17477        0xfc0003ff, 0x2000037d, 0                      , 0,
17478        0x0                 },        /* _POOL32A5~*(111) */
17479     { instruction         , 0                   , 0   , 32,
17480        0xfc0003ff, 0x20000385, &NMD::ADDSC            , 0,
17481        DSP_                },        /* ADDSC */
17482     { pool                , SHLLV__S__PH        , 2   , 32,
17483        0xfc0003ff, 0x2000038d, 0                      , 0,
17484        0x0                 },        /* SHLLV[_S].PH */
17485     { instruction         , 0                   , 0   , 32,
17486        0xfc0003ff, 0x20000395, &NMD::SHLLV_QB         , 0,
17487        DSP_                },        /* SHLLV.QB */
17488     { reserved_block      , 0                   , 0   , 32,
17489        0xfc0003ff, 0x2000039d, 0                      , 0,
17490        0x0                 },        /* _POOL32A5~*(115) */
17491     { reserved_block      , 0                   , 0   , 32,
17492        0xfc0003ff, 0x200003a5, 0                      , 0,
17493        0x0                 },        /* _POOL32A5~*(116) */
17494     { reserved_block      , 0                   , 0   , 32,
17495        0xfc0003ff, 0x200003ad, 0                      , 0,
17496        0x0                 },        /* _POOL32A5~*(117) */
17497     { pool                , SHLL__S__PH         , 4   , 32,
17498        0xfc0003ff, 0x200003b5, 0                      , 0,
17499        0x0                 },        /* SHLL[_S].PH */
17500     { reserved_block      , 0                   , 0   , 32,
17501        0xfc0003ff, 0x200003bd, 0                      , 0,
17502        0x0                 },        /* _POOL32A5~*(119) */
17503     { instruction         , 0                   , 0   , 32,
17504        0xfc0003ff, 0x200003c5, &NMD::ADDWC            , 0,
17505        DSP_                },        /* ADDWC */
17506     { pool                , PRECR_SRA__R__PH_W  , 2   , 32,
17507        0xfc0003ff, 0x200003cd, 0                      , 0,
17508        0x0                 },        /* PRECR_SRA[_R].PH.W */
17509     { instruction         , 0                   , 0   , 32,
17510        0xfc0003ff, 0x200003d5, &NMD::SHLLV_S_W        , 0,
17511        DSP_                },        /* SHLLV_S.W */
17512     { reserved_block      , 0                   , 0   , 32,
17513        0xfc0003ff, 0x200003dd, 0                      , 0,
17514        0x0                 },        /* _POOL32A5~*(123) */
17515     { reserved_block      , 0                   , 0   , 32,
17516        0xfc0003ff, 0x200003e5, 0                      , 0,
17517        0x0                 },        /* _POOL32A5~*(124) */
17518     { reserved_block      , 0                   , 0   , 32,
17519        0xfc0003ff, 0x200003ed, 0                      , 0,
17520        0x0                 },        /* _POOL32A5~*(125) */
17521     { instruction         , 0                   , 0   , 32,
17522        0xfc0003ff, 0x200003f5, &NMD::SHLL_S_W         , 0,
17523        DSP_                },        /* SHLL_S.W */
17524     { reserved_block      , 0                   , 0   , 32,
17525        0xfc0003ff, 0x200003fd, 0                      , 0,
17526        0x0                 },        /* _POOL32A5~*(127) */
17527 };
17528
17529
17530 NMD::Pool NMD::PP_LSX[16] = {
17531     { instruction         , 0                   , 0   , 32,
17532        0xfc0007ff, 0x20000007, &NMD::LBX              , 0,
17533        0x0                 },        /* LBX */
17534     { instruction         , 0                   , 0   , 32,
17535        0xfc0007ff, 0x20000087, &NMD::SBX              , 0,
17536        XMMS_               },        /* SBX */
17537     { instruction         , 0                   , 0   , 32,
17538        0xfc0007ff, 0x20000107, &NMD::LBUX             , 0,
17539        0x0                 },        /* LBUX */
17540     { reserved_block      , 0                   , 0   , 32,
17541        0xfc0007ff, 0x20000187, 0                      , 0,
17542        0x0                 },        /* PP.LSX~*(3) */
17543     { instruction         , 0                   , 0   , 32,
17544        0xfc0007ff, 0x20000207, &NMD::LHX              , 0,
17545        0x0                 },        /* LHX */
17546     { instruction         , 0                   , 0   , 32,
17547        0xfc0007ff, 0x20000287, &NMD::SHX              , 0,
17548        XMMS_               },        /* SHX */
17549     { instruction         , 0                   , 0   , 32,
17550        0xfc0007ff, 0x20000307, &NMD::LHUX             , 0,
17551        0x0                 },        /* LHUX */
17552     { instruction         , 0                   , 0   , 32,
17553        0xfc0007ff, 0x20000387, &NMD::LWUX             , 0,
17554        MIPS64_             },        /* LWUX */
17555     { instruction         , 0                   , 0   , 32,
17556        0xfc0007ff, 0x20000407, &NMD::LWX              , 0,
17557        0x0                 },        /* LWX */
17558     { instruction         , 0                   , 0   , 32,
17559        0xfc0007ff, 0x20000487, &NMD::SWX              , 0,
17560        XMMS_               },        /* SWX */
17561     { instruction         , 0                   , 0   , 32,
17562        0xfc0007ff, 0x20000507, &NMD::LWC1X            , 0,
17563        CP1_                },        /* LWC1X */
17564     { instruction         , 0                   , 0   , 32,
17565        0xfc0007ff, 0x20000587, &NMD::SWC1X            , 0,
17566        CP1_                },        /* SWC1X */
17567     { instruction         , 0                   , 0   , 32,
17568        0xfc0007ff, 0x20000607, &NMD::LDX              , 0,
17569        MIPS64_             },        /* LDX */
17570     { instruction         , 0                   , 0   , 32,
17571        0xfc0007ff, 0x20000687, &NMD::SDX              , 0,
17572        MIPS64_             },        /* SDX */
17573     { instruction         , 0                   , 0   , 32,
17574        0xfc0007ff, 0x20000707, &NMD::LDC1X            , 0,
17575        CP1_                },        /* LDC1X */
17576     { instruction         , 0                   , 0   , 32,
17577        0xfc0007ff, 0x20000787, &NMD::SDC1X            , 0,
17578        CP1_                },        /* SDC1X */
17579 };
17580
17581
17582 NMD::Pool NMD::PP_LSXS[16] = {
17583     { reserved_block      , 0                   , 0   , 32,
17584        0xfc0007ff, 0x20000047, 0                      , 0,
17585        0x0                 },        /* PP.LSXS~*(0) */
17586     { reserved_block      , 0                   , 0   , 32,
17587        0xfc0007ff, 0x200000c7, 0                      , 0,
17588        0x0                 },        /* PP.LSXS~*(1) */
17589     { reserved_block      , 0                   , 0   , 32,
17590        0xfc0007ff, 0x20000147, 0                      , 0,
17591        0x0                 },        /* PP.LSXS~*(2) */
17592     { reserved_block      , 0                   , 0   , 32,
17593        0xfc0007ff, 0x200001c7, 0                      , 0,
17594        0x0                 },        /* PP.LSXS~*(3) */
17595     { instruction         , 0                   , 0   , 32,
17596        0xfc0007ff, 0x20000247, &NMD::LHXS             , 0,
17597        0x0                 },        /* LHXS */
17598     { instruction         , 0                   , 0   , 32,
17599        0xfc0007ff, 0x200002c7, &NMD::SHXS             , 0,
17600        XMMS_               },        /* SHXS */
17601     { instruction         , 0                   , 0   , 32,
17602        0xfc0007ff, 0x20000347, &NMD::LHUXS            , 0,
17603        0x0                 },        /* LHUXS */
17604     { instruction         , 0                   , 0   , 32,
17605        0xfc0007ff, 0x200003c7, &NMD::LWUXS            , 0,
17606        MIPS64_             },        /* LWUXS */
17607     { instruction         , 0                   , 0   , 32,
17608        0xfc0007ff, 0x20000447, &NMD::LWXS_32_         , 0,
17609        0x0                 },        /* LWXS[32] */
17610     { instruction         , 0                   , 0   , 32,
17611        0xfc0007ff, 0x200004c7, &NMD::SWXS             , 0,
17612        XMMS_               },        /* SWXS */
17613     { instruction         , 0                   , 0   , 32,
17614        0xfc0007ff, 0x20000547, &NMD::LWC1XS           , 0,
17615        CP1_                },        /* LWC1XS */
17616     { instruction         , 0                   , 0   , 32,
17617        0xfc0007ff, 0x200005c7, &NMD::SWC1XS           , 0,
17618        CP1_                },        /* SWC1XS */
17619     { instruction         , 0                   , 0   , 32,
17620        0xfc0007ff, 0x20000647, &NMD::LDXS             , 0,
17621        MIPS64_             },        /* LDXS */
17622     { instruction         , 0                   , 0   , 32,
17623        0xfc0007ff, 0x200006c7, &NMD::SDXS             , 0,
17624        MIPS64_             },        /* SDXS */
17625     { instruction         , 0                   , 0   , 32,
17626        0xfc0007ff, 0x20000747, &NMD::LDC1XS           , 0,
17627        CP1_                },        /* LDC1XS */
17628     { instruction         , 0                   , 0   , 32,
17629        0xfc0007ff, 0x200007c7, &NMD::SDC1XS           , 0,
17630        CP1_                },        /* SDC1XS */
17631 };
17632
17633
17634 NMD::Pool NMD::P_LSX[2] = {
17635     { pool                , PP_LSX              , 16  , 32,
17636        0xfc00007f, 0x20000007, 0                      , 0,
17637        0x0                 },        /* PP.LSX */
17638     { pool                , PP_LSXS             , 16  , 32,
17639        0xfc00007f, 0x20000047, 0                      , 0,
17640        0x0                 },        /* PP.LSXS */
17641 };
17642
17643
17644 NMD::Pool NMD::POOL32Axf_1_0[4] = {
17645     { instruction         , 0                   , 0   , 32,
17646        0xfc003fff, 0x2000007f, &NMD::MFHI_DSP_        , 0,
17647        DSP_                },        /* MFHI[DSP] */
17648     { instruction         , 0                   , 0   , 32,
17649        0xfc003fff, 0x2000107f, &NMD::MFLO_DSP_        , 0,
17650        DSP_                },        /* MFLO[DSP] */
17651     { instruction         , 0                   , 0   , 32,
17652        0xfc003fff, 0x2000207f, &NMD::MTHI_DSP_        , 0,
17653        DSP_                },        /* MTHI[DSP] */
17654     { instruction         , 0                   , 0   , 32,
17655        0xfc003fff, 0x2000307f, &NMD::MTLO_DSP_        , 0,
17656        DSP_                },        /* MTLO[DSP] */
17657 };
17658
17659
17660 NMD::Pool NMD::POOL32Axf_1_1[4] = {
17661     { instruction         , 0                   , 0   , 32,
17662        0xfc003fff, 0x2000027f, &NMD::MTHLIP           , 0,
17663        DSP_                },        /* MTHLIP */
17664     { instruction         , 0                   , 0   , 32,
17665        0xfc003fff, 0x2000127f, &NMD::SHILOV           , 0,
17666        DSP_                },        /* SHILOV */
17667     { reserved_block      , 0                   , 0   , 32,
17668        0xfc003fff, 0x2000227f, 0                      , 0,
17669        0x0                 },        /* POOL32Axf_1_1~*(2) */
17670     { reserved_block      , 0                   , 0   , 32,
17671        0xfc003fff, 0x2000327f, 0                      , 0,
17672        0x0                 },        /* POOL32Axf_1_1~*(3) */
17673 };
17674
17675
17676 NMD::Pool NMD::POOL32Axf_1_3[4] = {
17677     { instruction         , 0                   , 0   , 32,
17678        0xfc003fff, 0x2000067f, &NMD::RDDSP            , 0,
17679        DSP_                },        /* RDDSP */
17680     { instruction         , 0                   , 0   , 32,
17681        0xfc003fff, 0x2000167f, &NMD::WRDSP            , 0,
17682        DSP_                },        /* WRDSP */
17683     { instruction         , 0                   , 0   , 32,
17684        0xfc003fff, 0x2000267f, &NMD::EXTP             , 0,
17685        DSP_                },        /* EXTP */
17686     { instruction         , 0                   , 0   , 32,
17687        0xfc003fff, 0x2000367f, &NMD::EXTPDP           , 0,
17688        DSP_                },        /* EXTPDP */
17689 };
17690
17691
17692 NMD::Pool NMD::POOL32Axf_1_4[2] = {
17693     { instruction         , 0                   , 0   , 32,
17694        0xfc001fff, 0x2000087f, &NMD::SHLL_QB          , 0,
17695        DSP_                },        /* SHLL.QB */
17696     { instruction         , 0                   , 0   , 32,
17697        0xfc001fff, 0x2000187f, &NMD::SHRL_QB          , 0,
17698        DSP_                },        /* SHRL.QB */
17699 };
17700
17701
17702 NMD::Pool NMD::MAQ_S_A__W_PHR[2] = {
17703     { instruction         , 0                   , 0   , 32,
17704        0xfc003fff, 0x20000a7f, &NMD::MAQ_S_W_PHR      , 0,
17705        DSP_                },        /* MAQ_S.W.PHR */
17706     { instruction         , 0                   , 0   , 32,
17707        0xfc003fff, 0x20002a7f, &NMD::MAQ_SA_W_PHR     , 0,
17708        DSP_                },        /* MAQ_SA.W.PHR */
17709 };
17710
17711
17712 NMD::Pool NMD::MAQ_S_A__W_PHL[2] = {
17713     { instruction         , 0                   , 0   , 32,
17714        0xfc003fff, 0x20001a7f, &NMD::MAQ_S_W_PHL      , 0,
17715        DSP_                },        /* MAQ_S.W.PHL */
17716     { instruction         , 0                   , 0   , 32,
17717        0xfc003fff, 0x20003a7f, &NMD::MAQ_SA_W_PHL     , 0,
17718        DSP_                },        /* MAQ_SA.W.PHL */
17719 };
17720
17721
17722 NMD::Pool NMD::POOL32Axf_1_5[2] = {
17723     { pool                , MAQ_S_A__W_PHR      , 2   , 32,
17724        0xfc001fff, 0x20000a7f, 0                      , 0,
17725        0x0                 },        /* MAQ_S[A].W.PHR */
17726     { pool                , MAQ_S_A__W_PHL      , 2   , 32,
17727        0xfc001fff, 0x20001a7f, 0                      , 0,
17728        0x0                 },        /* MAQ_S[A].W.PHL */
17729 };
17730
17731
17732 NMD::Pool NMD::POOL32Axf_1_7[4] = {
17733     { instruction         , 0                   , 0   , 32,
17734        0xfc003fff, 0x20000e7f, &NMD::EXTR_W           , 0,
17735        DSP_                },        /* EXTR.W */
17736     { instruction         , 0                   , 0   , 32,
17737        0xfc003fff, 0x20001e7f, &NMD::EXTR_R_W         , 0,
17738        DSP_                },        /* EXTR_R.W */
17739     { instruction         , 0                   , 0   , 32,
17740        0xfc003fff, 0x20002e7f, &NMD::EXTR_RS_W        , 0,
17741        DSP_                },        /* EXTR_RS.W */
17742     { instruction         , 0                   , 0   , 32,
17743        0xfc003fff, 0x20003e7f, &NMD::EXTR_S_H         , 0,
17744        DSP_                },        /* EXTR_S.H */
17745 };
17746
17747
17748 NMD::Pool NMD::POOL32Axf_1[8] = {
17749     { pool                , POOL32Axf_1_0       , 4   , 32,
17750        0xfc000fff, 0x2000007f, 0                      , 0,
17751        0x0                 },        /* POOL32Axf_1_0 */
17752     { pool                , POOL32Axf_1_1       , 4   , 32,
17753        0xfc000fff, 0x2000027f, 0                      , 0,
17754        0x0                 },        /* POOL32Axf_1_1 */
17755     { reserved_block      , 0                   , 0   , 32,
17756        0xfc000fff, 0x2000047f, 0                      , 0,
17757        0x0                 },        /* POOL32Axf_1~*(2) */
17758     { pool                , POOL32Axf_1_3       , 4   , 32,
17759        0xfc000fff, 0x2000067f, 0                      , 0,
17760        0x0                 },        /* POOL32Axf_1_3 */
17761     { pool                , POOL32Axf_1_4       , 2   , 32,
17762        0xfc000fff, 0x2000087f, 0                      , 0,
17763        0x0                 },        /* POOL32Axf_1_4 */
17764     { pool                , POOL32Axf_1_5       , 2   , 32,
17765        0xfc000fff, 0x20000a7f, 0                      , 0,
17766        0x0                 },        /* POOL32Axf_1_5 */
17767     { reserved_block      , 0                   , 0   , 32,
17768        0xfc000fff, 0x20000c7f, 0                      , 0,
17769        0x0                 },        /* POOL32Axf_1~*(6) */
17770     { pool                , POOL32Axf_1_7       , 4   , 32,
17771        0xfc000fff, 0x20000e7f, 0                      , 0,
17772        0x0                 },        /* POOL32Axf_1_7 */
17773 };
17774
17775
17776 NMD::Pool NMD::POOL32Axf_2_DSP__0_7[8] = {
17777     { instruction         , 0                   , 0   , 32,
17778        0xfc003fff, 0x200000bf, &NMD::DPA_W_PH         , 0,
17779        DSP_                },        /* DPA.W.PH */
17780     { instruction         , 0                   , 0   , 32,
17781        0xfc003fff, 0x200002bf, &NMD::DPAQ_S_W_PH      , 0,
17782        DSP_                },        /* DPAQ_S.W.PH */
17783     { instruction         , 0                   , 0   , 32,
17784        0xfc003fff, 0x200004bf, &NMD::DPS_W_PH         , 0,
17785        DSP_                },        /* DPS.W.PH */
17786     { instruction         , 0                   , 0   , 32,
17787        0xfc003fff, 0x200006bf, &NMD::DPSQ_S_W_PH      , 0,
17788        DSP_                },        /* DPSQ_S.W.PH */
17789     { reserved_block      , 0                   , 0   , 32,
17790        0xfc003fff, 0x200008bf, 0                      , 0,
17791        0x0                 },        /* POOL32Axf_2(DSP)_0_7~*(4) */
17792     { instruction         , 0                   , 0   , 32,
17793        0xfc003fff, 0x20000abf, &NMD::MADD_DSP_        , 0,
17794        DSP_                },        /* MADD[DSP] */
17795     { instruction         , 0                   , 0   , 32,
17796        0xfc003fff, 0x20000cbf, &NMD::MULT_DSP_        , 0,
17797        DSP_                },        /* MULT[DSP] */
17798     { instruction         , 0                   , 0   , 32,
17799        0xfc003fff, 0x20000ebf, &NMD::EXTRV_W          , 0,
17800        DSP_                },        /* EXTRV.W */
17801 };
17802
17803
17804 NMD::Pool NMD::POOL32Axf_2_DSP__8_15[8] = {
17805     { instruction         , 0                   , 0   , 32,
17806        0xfc003fff, 0x200010bf, &NMD::DPAX_W_PH        , 0,
17807        DSP_                },        /* DPAX.W.PH */
17808     { instruction         , 0                   , 0   , 32,
17809        0xfc003fff, 0x200012bf, &NMD::DPAQ_SA_L_W      , 0,
17810        DSP_                },        /* DPAQ_SA.L.W */
17811     { instruction         , 0                   , 0   , 32,
17812        0xfc003fff, 0x200014bf, &NMD::DPSX_W_PH        , 0,
17813        DSP_                },        /* DPSX.W.PH */
17814     { instruction         , 0                   , 0   , 32,
17815        0xfc003fff, 0x200016bf, &NMD::DPSQ_SA_L_W      , 0,
17816        DSP_                },        /* DPSQ_SA.L.W */
17817     { reserved_block      , 0                   , 0   , 32,
17818        0xfc003fff, 0x200018bf, 0                      , 0,
17819        0x0                 },        /* POOL32Axf_2(DSP)_8_15~*(4) */
17820     { instruction         , 0                   , 0   , 32,
17821        0xfc003fff, 0x20001abf, &NMD::MADDU_DSP_       , 0,
17822        DSP_                },        /* MADDU[DSP] */
17823     { instruction         , 0                   , 0   , 32,
17824        0xfc003fff, 0x20001cbf, &NMD::MULTU_DSP_       , 0,
17825        DSP_                },        /* MULTU[DSP] */
17826     { instruction         , 0                   , 0   , 32,
17827        0xfc003fff, 0x20001ebf, &NMD::EXTRV_R_W        , 0,
17828        DSP_                },        /* EXTRV_R.W */
17829 };
17830
17831
17832 NMD::Pool NMD::POOL32Axf_2_DSP__16_23[8] = {
17833     { instruction         , 0                   , 0   , 32,
17834        0xfc003fff, 0x200020bf, &NMD::DPAU_H_QBL       , 0,
17835        DSP_                },        /* DPAU.H.QBL */
17836     { instruction         , 0                   , 0   , 32,
17837        0xfc003fff, 0x200022bf, &NMD::DPAQX_S_W_PH     , 0,
17838        DSP_                },        /* DPAQX_S.W.PH */
17839     { instruction         , 0                   , 0   , 32,
17840        0xfc003fff, 0x200024bf, &NMD::DPSU_H_QBL       , 0,
17841        DSP_                },        /* DPSU.H.QBL */
17842     { instruction         , 0                   , 0   , 32,
17843        0xfc003fff, 0x200026bf, &NMD::DPSQX_S_W_PH     , 0,
17844        DSP_                },        /* DPSQX_S.W.PH */
17845     { instruction         , 0                   , 0   , 32,
17846        0xfc003fff, 0x200028bf, &NMD::EXTPV            , 0,
17847        DSP_                },        /* EXTPV */
17848     { instruction         , 0                   , 0   , 32,
17849        0xfc003fff, 0x20002abf, &NMD::MSUB_DSP_        , 0,
17850        DSP_                },        /* MSUB[DSP] */
17851     { instruction         , 0                   , 0   , 32,
17852        0xfc003fff, 0x20002cbf, &NMD::MULSA_W_PH       , 0,
17853        DSP_                },        /* MULSA.W.PH */
17854     { instruction         , 0                   , 0   , 32,
17855        0xfc003fff, 0x20002ebf, &NMD::EXTRV_RS_W       , 0,
17856        DSP_                },        /* EXTRV_RS.W */
17857 };
17858
17859
17860 NMD::Pool NMD::POOL32Axf_2_DSP__24_31[8] = {
17861     { instruction         , 0                   , 0   , 32,
17862        0xfc003fff, 0x200030bf, &NMD::DPAU_H_QBR       , 0,
17863        DSP_                },        /* DPAU.H.QBR */
17864     { instruction         , 0                   , 0   , 32,
17865        0xfc003fff, 0x200032bf, &NMD::DPAQX_SA_W_PH    , 0,
17866        DSP_                },        /* DPAQX_SA.W.PH */
17867     { instruction         , 0                   , 0   , 32,
17868        0xfc003fff, 0x200034bf, &NMD::DPSU_H_QBR       , 0,
17869        DSP_                },        /* DPSU.H.QBR */
17870     { instruction         , 0                   , 0   , 32,
17871        0xfc003fff, 0x200036bf, &NMD::DPSQX_SA_W_PH    , 0,
17872        DSP_                },        /* DPSQX_SA.W.PH */
17873     { instruction         , 0                   , 0   , 32,
17874        0xfc003fff, 0x200038bf, &NMD::EXTPDPV          , 0,
17875        DSP_                },        /* EXTPDPV */
17876     { instruction         , 0                   , 0   , 32,
17877        0xfc003fff, 0x20003abf, &NMD::MSUBU_DSP_       , 0,
17878        DSP_                },        /* MSUBU[DSP] */
17879     { instruction         , 0                   , 0   , 32,
17880        0xfc003fff, 0x20003cbf, &NMD::MULSAQ_S_W_PH    , 0,
17881        DSP_                },        /* MULSAQ_S.W.PH */
17882     { instruction         , 0                   , 0   , 32,
17883        0xfc003fff, 0x20003ebf, &NMD::EXTRV_S_H        , 0,
17884        DSP_                },        /* EXTRV_S.H */
17885 };
17886
17887
17888 NMD::Pool NMD::POOL32Axf_2[4] = {
17889     { pool                , POOL32Axf_2_DSP__0_7, 8   , 32,
17890        0xfc0031ff, 0x200000bf, 0                      , 0,
17891        0x0                 },        /* POOL32Axf_2(DSP)_0_7 */
17892     { pool                , POOL32Axf_2_DSP__8_15, 8   , 32,
17893        0xfc0031ff, 0x200010bf, 0                      , 0,
17894        0x0                 },        /* POOL32Axf_2(DSP)_8_15 */
17895     { pool                , POOL32Axf_2_DSP__16_23, 8   , 32,
17896        0xfc0031ff, 0x200020bf, 0                      , 0,
17897        0x0                 },        /* POOL32Axf_2(DSP)_16_23 */
17898     { pool                , POOL32Axf_2_DSP__24_31, 8   , 32,
17899        0xfc0031ff, 0x200030bf, 0                      , 0,
17900        0x0                 },        /* POOL32Axf_2(DSP)_24_31 */
17901 };
17902
17903
17904 NMD::Pool NMD::POOL32Axf_4[128] = {
17905     { instruction         , 0                   , 0   , 32,
17906        0xfc00ffff, 0x2000013f, &NMD::ABSQ_S_QB        , 0,
17907        DSP_                },        /* ABSQ_S.QB */
17908     { instruction         , 0                   , 0   , 32,
17909        0xfc00ffff, 0x2000033f, &NMD::REPLV_PH         , 0,
17910        DSP_                },        /* REPLV.PH */
17911     { reserved_block      , 0                   , 0   , 32,
17912        0xfc00ffff, 0x2000053f, 0                      , 0,
17913        0x0                 },        /* POOL32Axf_4~*(2) */
17914     { reserved_block      , 0                   , 0   , 32,
17915        0xfc00ffff, 0x2000073f, 0                      , 0,
17916        0x0                 },        /* POOL32Axf_4~*(3) */
17917     { reserved_block      , 0                   , 0   , 32,
17918        0xfc00ffff, 0x2000093f, 0                      , 0,
17919        0x0                 },        /* POOL32Axf_4~*(4) */
17920     { reserved_block      , 0                   , 0   , 32,
17921        0xfc00ffff, 0x20000b3f, 0                      , 0,
17922        0x0                 },        /* POOL32Axf_4~*(5) */
17923     { reserved_block      , 0                   , 0   , 32,
17924        0xfc00ffff, 0x20000d3f, 0                      , 0,
17925        0x0                 },        /* POOL32Axf_4~*(6) */
17926     { reserved_block      , 0                   , 0   , 32,
17927        0xfc00ffff, 0x20000f3f, 0                      , 0,
17928        0x0                 },        /* POOL32Axf_4~*(7) */
17929     { instruction         , 0                   , 0   , 32,
17930        0xfc00ffff, 0x2000113f, &NMD::ABSQ_S_PH        , 0,
17931        DSP_                },        /* ABSQ_S.PH */
17932     { instruction         , 0                   , 0   , 32,
17933        0xfc00ffff, 0x2000133f, &NMD::REPLV_QB         , 0,
17934        DSP_                },        /* REPLV.QB */
17935     { reserved_block      , 0                   , 0   , 32,
17936        0xfc00ffff, 0x2000153f, 0                      , 0,
17937        0x0                 },        /* POOL32Axf_4~*(10) */
17938     { reserved_block      , 0                   , 0   , 32,
17939        0xfc00ffff, 0x2000173f, 0                      , 0,
17940        0x0                 },        /* POOL32Axf_4~*(11) */
17941     { reserved_block      , 0                   , 0   , 32,
17942        0xfc00ffff, 0x2000193f, 0                      , 0,
17943        0x0                 },        /* POOL32Axf_4~*(12) */
17944     { reserved_block      , 0                   , 0   , 32,
17945        0xfc00ffff, 0x20001b3f, 0                      , 0,
17946        0x0                 },        /* POOL32Axf_4~*(13) */
17947     { reserved_block      , 0                   , 0   , 32,
17948        0xfc00ffff, 0x20001d3f, 0                      , 0,
17949        0x0                 },        /* POOL32Axf_4~*(14) */
17950     { reserved_block      , 0                   , 0   , 32,
17951        0xfc00ffff, 0x20001f3f, 0                      , 0,
17952        0x0                 },        /* POOL32Axf_4~*(15) */
17953     { instruction         , 0                   , 0   , 32,
17954        0xfc00ffff, 0x2000213f, &NMD::ABSQ_S_W         , 0,
17955        DSP_                },        /* ABSQ_S.W */
17956     { reserved_block      , 0                   , 0   , 32,
17957        0xfc00ffff, 0x2000233f, 0                      , 0,
17958        0x0                 },        /* POOL32Axf_4~*(17) */
17959     { reserved_block      , 0                   , 0   , 32,
17960        0xfc00ffff, 0x2000253f, 0                      , 0,
17961        0x0                 },        /* POOL32Axf_4~*(18) */
17962     { reserved_block      , 0                   , 0   , 32,
17963        0xfc00ffff, 0x2000273f, 0                      , 0,
17964        0x0                 },        /* POOL32Axf_4~*(19) */
17965     { reserved_block      , 0                   , 0   , 32,
17966        0xfc00ffff, 0x2000293f, 0                      , 0,
17967        0x0                 },        /* POOL32Axf_4~*(20) */
17968     { reserved_block      , 0                   , 0   , 32,
17969        0xfc00ffff, 0x20002b3f, 0                      , 0,
17970        0x0                 },        /* POOL32Axf_4~*(21) */
17971     { reserved_block      , 0                   , 0   , 32,
17972        0xfc00ffff, 0x20002d3f, 0                      , 0,
17973        0x0                 },        /* POOL32Axf_4~*(22) */
17974     { reserved_block      , 0                   , 0   , 32,
17975        0xfc00ffff, 0x20002f3f, 0                      , 0,
17976        0x0                 },        /* POOL32Axf_4~*(23) */
17977     { reserved_block      , 0                   , 0   , 32,
17978        0xfc00ffff, 0x2000313f, 0                      , 0,
17979        0x0                 },        /* POOL32Axf_4~*(24) */
17980     { reserved_block      , 0                   , 0   , 32,
17981        0xfc00ffff, 0x2000333f, 0                      , 0,
17982        0x0                 },        /* POOL32Axf_4~*(25) */
17983     { reserved_block      , 0                   , 0   , 32,
17984        0xfc00ffff, 0x2000353f, 0                      , 0,
17985        0x0                 },        /* POOL32Axf_4~*(26) */
17986     { reserved_block      , 0                   , 0   , 32,
17987        0xfc00ffff, 0x2000373f, 0                      , 0,
17988        0x0                 },        /* POOL32Axf_4~*(27) */
17989     { reserved_block      , 0                   , 0   , 32,
17990        0xfc00ffff, 0x2000393f, 0                      , 0,
17991        0x0                 },        /* POOL32Axf_4~*(28) */
17992     { reserved_block      , 0                   , 0   , 32,
17993        0xfc00ffff, 0x20003b3f, 0                      , 0,
17994        0x0                 },        /* POOL32Axf_4~*(29) */
17995     { reserved_block      , 0                   , 0   , 32,
17996        0xfc00ffff, 0x20003d3f, 0                      , 0,
17997        0x0                 },        /* POOL32Axf_4~*(30) */
17998     { reserved_block      , 0                   , 0   , 32,
17999        0xfc00ffff, 0x20003f3f, 0                      , 0,
18000        0x0                 },        /* POOL32Axf_4~*(31) */
18001     { instruction         , 0                   , 0   , 32,
18002        0xfc00ffff, 0x2000413f, &NMD::INSV             , 0,
18003        DSP_                },        /* INSV */
18004     { reserved_block      , 0                   , 0   , 32,
18005        0xfc00ffff, 0x2000433f, 0                      , 0,
18006        0x0                 },        /* POOL32Axf_4~*(33) */
18007     { reserved_block      , 0                   , 0   , 32,
18008        0xfc00ffff, 0x2000453f, 0                      , 0,
18009        0x0                 },        /* POOL32Axf_4~*(34) */
18010     { reserved_block      , 0                   , 0   , 32,
18011        0xfc00ffff, 0x2000473f, 0                      , 0,
18012        0x0                 },        /* POOL32Axf_4~*(35) */
18013     { reserved_block      , 0                   , 0   , 32,
18014        0xfc00ffff, 0x2000493f, 0                      , 0,
18015        0x0                 },        /* POOL32Axf_4~*(36) */
18016     { instruction         , 0                   , 0   , 32,
18017        0xfc00ffff, 0x20004b3f, &NMD::CLO              , 0,
18018        XMMS_               },        /* CLO */
18019     { instruction         , 0                   , 0   , 32,
18020        0xfc00ffff, 0x20004d3f, &NMD::MFC2             , 0,
18021        CP2_                },        /* MFC2 */
18022     { reserved_block      , 0                   , 0   , 32,
18023        0xfc00ffff, 0x20004f3f, 0                      , 0,
18024        0x0                 },        /* POOL32Axf_4~*(39) */
18025     { instruction         , 0                   , 0   , 32,
18026        0xfc00ffff, 0x2000513f, &NMD::PRECEQ_W_PHL     , 0,
18027        DSP_                },        /* PRECEQ.W.PHL */
18028     { reserved_block      , 0                   , 0   , 32,
18029        0xfc00ffff, 0x2000533f, 0                      , 0,
18030        0x0                 },        /* POOL32Axf_4~*(41) */
18031     { reserved_block      , 0                   , 0   , 32,
18032        0xfc00ffff, 0x2000553f, 0                      , 0,
18033        0x0                 },        /* POOL32Axf_4~*(42) */
18034     { reserved_block      , 0                   , 0   , 32,
18035        0xfc00ffff, 0x2000573f, 0                      , 0,
18036        0x0                 },        /* POOL32Axf_4~*(43) */
18037     { reserved_block      , 0                   , 0   , 32,
18038        0xfc00ffff, 0x2000593f, 0                      , 0,
18039        0x0                 },        /* POOL32Axf_4~*(44) */
18040     { instruction         , 0                   , 0   , 32,
18041        0xfc00ffff, 0x20005b3f, &NMD::CLZ              , 0,
18042        XMMS_               },        /* CLZ */
18043     { instruction         , 0                   , 0   , 32,
18044        0xfc00ffff, 0x20005d3f, &NMD::MTC2             , 0,
18045        CP2_                },        /* MTC2 */
18046     { reserved_block      , 0                   , 0   , 32,
18047        0xfc00ffff, 0x20005f3f, 0                      , 0,
18048        0x0                 },        /* POOL32Axf_4~*(47) */
18049     { instruction         , 0                   , 0   , 32,
18050        0xfc00ffff, 0x2000613f, &NMD::PRECEQ_W_PHR     , 0,
18051        DSP_                },        /* PRECEQ.W.PHR */
18052     { reserved_block      , 0                   , 0   , 32,
18053        0xfc00ffff, 0x2000633f, 0                      , 0,
18054        0x0                 },        /* POOL32Axf_4~*(49) */
18055     { reserved_block      , 0                   , 0   , 32,
18056        0xfc00ffff, 0x2000653f, 0                      , 0,
18057        0x0                 },        /* POOL32Axf_4~*(50) */
18058     { reserved_block      , 0                   , 0   , 32,
18059        0xfc00ffff, 0x2000673f, 0                      , 0,
18060        0x0                 },        /* POOL32Axf_4~*(51) */
18061     { reserved_block      , 0                   , 0   , 32,
18062        0xfc00ffff, 0x2000693f, 0                      , 0,
18063        0x0                 },        /* POOL32Axf_4~*(52) */
18064     { reserved_block      , 0                   , 0   , 32,
18065        0xfc00ffff, 0x20006b3f, 0                      , 0,
18066        0x0                 },        /* POOL32Axf_4~*(53) */
18067     { instruction         , 0                   , 0   , 32,
18068        0xfc00ffff, 0x20006d3f, &NMD::DMFC2            , 0,
18069        CP2_                },        /* DMFC2 */
18070     { reserved_block      , 0                   , 0   , 32,
18071        0xfc00ffff, 0x20006f3f, 0                      , 0,
18072        0x0                 },        /* POOL32Axf_4~*(55) */
18073     { instruction         , 0                   , 0   , 32,
18074        0xfc00ffff, 0x2000713f, &NMD::PRECEQU_PH_QBL   , 0,
18075        DSP_                },        /* PRECEQU.PH.QBL */
18076     { instruction         , 0                   , 0   , 32,
18077        0xfc00ffff, 0x2000733f, &NMD::PRECEQU_PH_QBLA  , 0,
18078        DSP_                },        /* PRECEQU.PH.QBLA */
18079     { reserved_block      , 0                   , 0   , 32,
18080        0xfc00ffff, 0x2000753f, 0                      , 0,
18081        0x0                 },        /* POOL32Axf_4~*(58) */
18082     { reserved_block      , 0                   , 0   , 32,
18083        0xfc00ffff, 0x2000773f, 0                      , 0,
18084        0x0                 },        /* POOL32Axf_4~*(59) */
18085     { reserved_block      , 0                   , 0   , 32,
18086        0xfc00ffff, 0x2000793f, 0                      , 0,
18087        0x0                 },        /* POOL32Axf_4~*(60) */
18088     { reserved_block      , 0                   , 0   , 32,
18089        0xfc00ffff, 0x20007b3f, 0                      , 0,
18090        0x0                 },        /* POOL32Axf_4~*(61) */
18091     { instruction         , 0                   , 0   , 32,
18092        0xfc00ffff, 0x20007d3f, &NMD::DMTC2            , 0,
18093        CP2_                },        /* DMTC2 */
18094     { reserved_block      , 0                   , 0   , 32,
18095        0xfc00ffff, 0x20007f3f, 0                      , 0,
18096        0x0                 },        /* POOL32Axf_4~*(63) */
18097     { reserved_block      , 0                   , 0   , 32,
18098        0xfc00ffff, 0x2000813f, 0                      , 0,
18099        0x0                 },        /* POOL32Axf_4~*(64) */
18100     { reserved_block      , 0                   , 0   , 32,
18101        0xfc00ffff, 0x2000833f, 0                      , 0,
18102        0x0                 },        /* POOL32Axf_4~*(65) */
18103     { reserved_block      , 0                   , 0   , 32,
18104        0xfc00ffff, 0x2000853f, 0                      , 0,
18105        0x0                 },        /* POOL32Axf_4~*(66) */
18106     { reserved_block      , 0                   , 0   , 32,
18107        0xfc00ffff, 0x2000873f, 0                      , 0,
18108        0x0                 },        /* POOL32Axf_4~*(67) */
18109     { reserved_block      , 0                   , 0   , 32,
18110        0xfc00ffff, 0x2000893f, 0                      , 0,
18111        0x0                 },        /* POOL32Axf_4~*(68) */
18112     { reserved_block      , 0                   , 0   , 32,
18113        0xfc00ffff, 0x20008b3f, 0                      , 0,
18114        0x0                 },        /* POOL32Axf_4~*(69) */
18115     { instruction         , 0                   , 0   , 32,
18116        0xfc00ffff, 0x20008d3f, &NMD::MFHC2            , 0,
18117        CP2_                },        /* MFHC2 */
18118     { reserved_block      , 0                   , 0   , 32,
18119        0xfc00ffff, 0x20008f3f, 0                      , 0,
18120        0x0                 },        /* POOL32Axf_4~*(71) */
18121     { instruction         , 0                   , 0   , 32,
18122        0xfc00ffff, 0x2000913f, &NMD::PRECEQU_PH_QBR   , 0,
18123        DSP_                },        /* PRECEQU.PH.QBR */
18124     { instruction         , 0                   , 0   , 32,
18125        0xfc00ffff, 0x2000933f, &NMD::PRECEQU_PH_QBRA  , 0,
18126        DSP_                },        /* PRECEQU.PH.QBRA */
18127     { reserved_block      , 0                   , 0   , 32,
18128        0xfc00ffff, 0x2000953f, 0                      , 0,
18129        0x0                 },        /* POOL32Axf_4~*(74) */
18130     { reserved_block      , 0                   , 0   , 32,
18131        0xfc00ffff, 0x2000973f, 0                      , 0,
18132        0x0                 },        /* POOL32Axf_4~*(75) */
18133     { reserved_block      , 0                   , 0   , 32,
18134        0xfc00ffff, 0x2000993f, 0                      , 0,
18135        0x0                 },        /* POOL32Axf_4~*(76) */
18136     { reserved_block      , 0                   , 0   , 32,
18137        0xfc00ffff, 0x20009b3f, 0                      , 0,
18138        0x0                 },        /* POOL32Axf_4~*(77) */
18139     { instruction         , 0                   , 0   , 32,
18140        0xfc00ffff, 0x20009d3f, &NMD::MTHC2            , 0,
18141        CP2_                },        /* MTHC2 */
18142     { reserved_block      , 0                   , 0   , 32,
18143        0xfc00ffff, 0x20009f3f, 0                      , 0,
18144        0x0                 },        /* POOL32Axf_4~*(79) */
18145     { reserved_block      , 0                   , 0   , 32,
18146        0xfc00ffff, 0x2000a13f, 0                      , 0,
18147        0x0                 },        /* POOL32Axf_4~*(80) */
18148     { reserved_block      , 0                   , 0   , 32,
18149        0xfc00ffff, 0x2000a33f, 0                      , 0,
18150        0x0                 },        /* POOL32Axf_4~*(81) */
18151     { reserved_block      , 0                   , 0   , 32,
18152        0xfc00ffff, 0x2000a53f, 0                      , 0,
18153        0x0                 },        /* POOL32Axf_4~*(82) */
18154     { reserved_block      , 0                   , 0   , 32,
18155        0xfc00ffff, 0x2000a73f, 0                      , 0,
18156        0x0                 },        /* POOL32Axf_4~*(83) */
18157     { reserved_block      , 0                   , 0   , 32,
18158        0xfc00ffff, 0x2000a93f, 0                      , 0,
18159        0x0                 },        /* POOL32Axf_4~*(84) */
18160     { reserved_block      , 0                   , 0   , 32,
18161        0xfc00ffff, 0x2000ab3f, 0                      , 0,
18162        0x0                 },        /* POOL32Axf_4~*(85) */
18163     { reserved_block      , 0                   , 0   , 32,
18164        0xfc00ffff, 0x2000ad3f, 0                      , 0,
18165        0x0                 },        /* POOL32Axf_4~*(86) */
18166     { reserved_block      , 0                   , 0   , 32,
18167        0xfc00ffff, 0x2000af3f, 0                      , 0,
18168        0x0                 },        /* POOL32Axf_4~*(87) */
18169     { instruction         , 0                   , 0   , 32,
18170        0xfc00ffff, 0x2000b13f, &NMD::PRECEU_PH_QBL    , 0,
18171        DSP_                },        /* PRECEU.PH.QBL */
18172     { instruction         , 0                   , 0   , 32,
18173        0xfc00ffff, 0x2000b33f, &NMD::PRECEU_PH_QBLA   , 0,
18174        DSP_                },        /* PRECEU.PH.QBLA */
18175     { reserved_block      , 0                   , 0   , 32,
18176        0xfc00ffff, 0x2000b53f, 0                      , 0,
18177        0x0                 },        /* POOL32Axf_4~*(90) */
18178     { reserved_block      , 0                   , 0   , 32,
18179        0xfc00ffff, 0x2000b73f, 0                      , 0,
18180        0x0                 },        /* POOL32Axf_4~*(91) */
18181     { reserved_block      , 0                   , 0   , 32,
18182        0xfc00ffff, 0x2000b93f, 0                      , 0,
18183        0x0                 },        /* POOL32Axf_4~*(92) */
18184     { reserved_block      , 0                   , 0   , 32,
18185        0xfc00ffff, 0x2000bb3f, 0                      , 0,
18186        0x0                 },        /* POOL32Axf_4~*(93) */
18187     { reserved_block      , 0                   , 0   , 32,
18188        0xfc00ffff, 0x2000bd3f, 0                      , 0,
18189        0x0                 },        /* POOL32Axf_4~*(94) */
18190     { reserved_block      , 0                   , 0   , 32,
18191        0xfc00ffff, 0x2000bf3f, 0                      , 0,
18192        0x0                 },        /* POOL32Axf_4~*(95) */
18193     { reserved_block      , 0                   , 0   , 32,
18194        0xfc00ffff, 0x2000c13f, 0                      , 0,
18195        0x0                 },        /* POOL32Axf_4~*(96) */
18196     { reserved_block      , 0                   , 0   , 32,
18197        0xfc00ffff, 0x2000c33f, 0                      , 0,
18198        0x0                 },        /* POOL32Axf_4~*(97) */
18199     { reserved_block      , 0                   , 0   , 32,
18200        0xfc00ffff, 0x2000c53f, 0                      , 0,
18201        0x0                 },        /* POOL32Axf_4~*(98) */
18202     { reserved_block      , 0                   , 0   , 32,
18203        0xfc00ffff, 0x2000c73f, 0                      , 0,
18204        0x0                 },        /* POOL32Axf_4~*(99) */
18205     { reserved_block      , 0                   , 0   , 32,
18206        0xfc00ffff, 0x2000c93f, 0                      , 0,
18207        0x0                 },        /* POOL32Axf_4~*(100) */
18208     { reserved_block      , 0                   , 0   , 32,
18209        0xfc00ffff, 0x2000cb3f, 0                      , 0,
18210        0x0                 },        /* POOL32Axf_4~*(101) */
18211     { instruction         , 0                   , 0   , 32,
18212        0xfc00ffff, 0x2000cd3f, &NMD::CFC2             , 0,
18213        CP2_                },        /* CFC2 */
18214     { reserved_block      , 0                   , 0   , 32,
18215        0xfc00ffff, 0x2000cf3f, 0                      , 0,
18216        0x0                 },        /* POOL32Axf_4~*(103) */
18217     { instruction         , 0                   , 0   , 32,
18218        0xfc00ffff, 0x2000d13f, &NMD::PRECEU_PH_QBR    , 0,
18219        DSP_                },        /* PRECEU.PH.QBR */
18220     { instruction         , 0                   , 0   , 32,
18221        0xfc00ffff, 0x2000d33f, &NMD::PRECEU_PH_QBRA   , 0,
18222        DSP_                },        /* PRECEU.PH.QBRA */
18223     { reserved_block      , 0                   , 0   , 32,
18224        0xfc00ffff, 0x2000d53f, 0                      , 0,
18225        0x0                 },        /* POOL32Axf_4~*(106) */
18226     { reserved_block      , 0                   , 0   , 32,
18227        0xfc00ffff, 0x2000d73f, 0                      , 0,
18228        0x0                 },        /* POOL32Axf_4~*(107) */
18229     { reserved_block      , 0                   , 0   , 32,
18230        0xfc00ffff, 0x2000d93f, 0                      , 0,
18231        0x0                 },        /* POOL32Axf_4~*(108) */
18232     { reserved_block      , 0                   , 0   , 32,
18233        0xfc00ffff, 0x2000db3f, 0                      , 0,
18234        0x0                 },        /* POOL32Axf_4~*(109) */
18235     { instruction         , 0                   , 0   , 32,
18236        0xfc00ffff, 0x2000dd3f, &NMD::CTC2             , 0,
18237        CP2_                },        /* CTC2 */
18238     { reserved_block      , 0                   , 0   , 32,
18239        0xfc00ffff, 0x2000df3f, 0                      , 0,
18240        0x0                 },        /* POOL32Axf_4~*(111) */
18241     { reserved_block      , 0                   , 0   , 32,
18242        0xfc00ffff, 0x2000e13f, 0                      , 0,
18243        0x0                 },        /* POOL32Axf_4~*(112) */
18244     { reserved_block      , 0                   , 0   , 32,
18245        0xfc00ffff, 0x2000e33f, 0                      , 0,
18246        0x0                 },        /* POOL32Axf_4~*(113) */
18247     { reserved_block      , 0                   , 0   , 32,
18248        0xfc00ffff, 0x2000e53f, 0                      , 0,
18249        0x0                 },        /* POOL32Axf_4~*(114) */
18250     { reserved_block      , 0                   , 0   , 32,
18251        0xfc00ffff, 0x2000e73f, 0                      , 0,
18252        0x0                 },        /* POOL32Axf_4~*(115) */
18253     { reserved_block      , 0                   , 0   , 32,
18254        0xfc00ffff, 0x2000e93f, 0                      , 0,
18255        0x0                 },        /* POOL32Axf_4~*(116) */
18256     { reserved_block      , 0                   , 0   , 32,
18257        0xfc00ffff, 0x2000eb3f, 0                      , 0,
18258        0x0                 },        /* POOL32Axf_4~*(117) */
18259     { reserved_block      , 0                   , 0   , 32,
18260        0xfc00ffff, 0x2000ed3f, 0                      , 0,
18261        0x0                 },        /* POOL32Axf_4~*(118) */
18262     { reserved_block      , 0                   , 0   , 32,
18263        0xfc00ffff, 0x2000ef3f, 0                      , 0,
18264        0x0                 },        /* POOL32Axf_4~*(119) */
18265     { instruction         , 0                   , 0   , 32,
18266        0xfc00ffff, 0x2000f13f, &NMD::RADDU_W_QB       , 0,
18267        DSP_                },        /* RADDU.W.QB */
18268     { reserved_block      , 0                   , 0   , 32,
18269        0xfc00ffff, 0x2000f33f, 0                      , 0,
18270        0x0                 },        /* POOL32Axf_4~*(121) */
18271     { reserved_block      , 0                   , 0   , 32,
18272        0xfc00ffff, 0x2000f53f, 0                      , 0,
18273        0x0                 },        /* POOL32Axf_4~*(122) */
18274     { reserved_block      , 0                   , 0   , 32,
18275        0xfc00ffff, 0x2000f73f, 0                      , 0,
18276        0x0                 },        /* POOL32Axf_4~*(123) */
18277     { reserved_block      , 0                   , 0   , 32,
18278        0xfc00ffff, 0x2000f93f, 0                      , 0,
18279        0x0                 },        /* POOL32Axf_4~*(124) */
18280     { reserved_block      , 0                   , 0   , 32,
18281        0xfc00ffff, 0x2000fb3f, 0                      , 0,
18282        0x0                 },        /* POOL32Axf_4~*(125) */
18283     { reserved_block      , 0                   , 0   , 32,
18284        0xfc00ffff, 0x2000fd3f, 0                      , 0,
18285        0x0                 },        /* POOL32Axf_4~*(126) */
18286     { reserved_block      , 0                   , 0   , 32,
18287        0xfc00ffff, 0x2000ff3f, 0                      , 0,
18288        0x0                 },        /* POOL32Axf_4~*(127) */
18289 };
18290
18291
18292 NMD::Pool NMD::POOL32Axf_5_group0[32] = {
18293     { instruction         , 0                   , 0   , 32,
18294        0xfc00ffff, 0x2000017f, &NMD::TLBGP            , 0,
18295        CP0_ | VZ_ | TLB_   },        /* TLBGP */
18296     { instruction         , 0                   , 0   , 32,
18297        0xfc00ffff, 0x2000037f, &NMD::TLBP             , 0,
18298        CP0_ | TLB_         },        /* TLBP */
18299     { instruction         , 0                   , 0   , 32,
18300        0xfc00ffff, 0x2000057f, &NMD::TLBGINV          , 0,
18301        CP0_ | VZ_ | TLB_ | TLBINV_},        /* TLBGINV */
18302     { instruction         , 0                   , 0   , 32,
18303        0xfc00ffff, 0x2000077f, &NMD::TLBINV           , 0,
18304        CP0_ | TLB_ | TLBINV_},        /* TLBINV */
18305     { reserved_block      , 0                   , 0   , 32,
18306        0xfc00ffff, 0x2000097f, 0                      , 0,
18307        0x0                 },        /* POOL32Axf_5_group0~*(4) */
18308     { reserved_block      , 0                   , 0   , 32,
18309        0xfc00ffff, 0x20000b7f, 0                      , 0,
18310        0x0                 },        /* POOL32Axf_5_group0~*(5) */
18311     { reserved_block      , 0                   , 0   , 32,
18312        0xfc00ffff, 0x20000d7f, 0                      , 0,
18313        0x0                 },        /* POOL32Axf_5_group0~*(6) */
18314     { reserved_block      , 0                   , 0   , 32,
18315        0xfc00ffff, 0x20000f7f, 0                      , 0,
18316        0x0                 },        /* POOL32Axf_5_group0~*(7) */
18317     { instruction         , 0                   , 0   , 32,
18318        0xfc00ffff, 0x2000117f, &NMD::TLBGR            , 0,
18319        CP0_ | VZ_ | TLB_   },        /* TLBGR */
18320     { instruction         , 0                   , 0   , 32,
18321        0xfc00ffff, 0x2000137f, &NMD::TLBR             , 0,
18322        CP0_ | TLB_         },        /* TLBR */
18323     { instruction         , 0                   , 0   , 32,
18324        0xfc00ffff, 0x2000157f, &NMD::TLBGINVF         , 0,
18325        CP0_ | VZ_ | TLB_ | TLBINV_},        /* TLBGINVF */
18326     { instruction         , 0                   , 0   , 32,
18327        0xfc00ffff, 0x2000177f, &NMD::TLBINVF          , 0,
18328        CP0_ | TLB_ | TLBINV_},        /* TLBINVF */
18329     { reserved_block      , 0                   , 0   , 32,
18330        0xfc00ffff, 0x2000197f, 0                      , 0,
18331        0x0                 },        /* POOL32Axf_5_group0~*(12) */
18332     { reserved_block      , 0                   , 0   , 32,
18333        0xfc00ffff, 0x20001b7f, 0                      , 0,
18334        0x0                 },        /* POOL32Axf_5_group0~*(13) */
18335     { reserved_block      , 0                   , 0   , 32,
18336        0xfc00ffff, 0x20001d7f, 0                      , 0,
18337        0x0                 },        /* POOL32Axf_5_group0~*(14) */
18338     { reserved_block      , 0                   , 0   , 32,
18339        0xfc00ffff, 0x20001f7f, 0                      , 0,
18340        0x0                 },        /* POOL32Axf_5_group0~*(15) */
18341     { instruction         , 0                   , 0   , 32,
18342        0xfc00ffff, 0x2000217f, &NMD::TLBGWI           , 0,
18343        CP0_ | VZ_ | TLB_   },        /* TLBGWI */
18344     { instruction         , 0                   , 0   , 32,
18345        0xfc00ffff, 0x2000237f, &NMD::TLBWI            , 0,
18346        CP0_ | TLB_         },        /* TLBWI */
18347     { reserved_block      , 0                   , 0   , 32,
18348        0xfc00ffff, 0x2000257f, 0                      , 0,
18349        0x0                 },        /* POOL32Axf_5_group0~*(18) */
18350     { reserved_block      , 0                   , 0   , 32,
18351        0xfc00ffff, 0x2000277f, 0                      , 0,
18352        0x0                 },        /* POOL32Axf_5_group0~*(19) */
18353     { reserved_block      , 0                   , 0   , 32,
18354        0xfc00ffff, 0x2000297f, 0                      , 0,
18355        0x0                 },        /* POOL32Axf_5_group0~*(20) */
18356     { reserved_block      , 0                   , 0   , 32,
18357        0xfc00ffff, 0x20002b7f, 0                      , 0,
18358        0x0                 },        /* POOL32Axf_5_group0~*(21) */
18359     { reserved_block      , 0                   , 0   , 32,
18360        0xfc00ffff, 0x20002d7f, 0                      , 0,
18361        0x0                 },        /* POOL32Axf_5_group0~*(22) */
18362     { reserved_block      , 0                   , 0   , 32,
18363        0xfc00ffff, 0x20002f7f, 0                      , 0,
18364        0x0                 },        /* POOL32Axf_5_group0~*(23) */
18365     { instruction         , 0                   , 0   , 32,
18366        0xfc00ffff, 0x2000317f, &NMD::TLBGWR           , 0,
18367        CP0_ | VZ_ | TLB_   },        /* TLBGWR */
18368     { instruction         , 0                   , 0   , 32,
18369        0xfc00ffff, 0x2000337f, &NMD::TLBWR            , 0,
18370        CP0_ | TLB_         },        /* TLBWR */
18371     { reserved_block      , 0                   , 0   , 32,
18372        0xfc00ffff, 0x2000357f, 0                      , 0,
18373        0x0                 },        /* POOL32Axf_5_group0~*(26) */
18374     { reserved_block      , 0                   , 0   , 32,
18375        0xfc00ffff, 0x2000377f, 0                      , 0,
18376        0x0                 },        /* POOL32Axf_5_group0~*(27) */
18377     { reserved_block      , 0                   , 0   , 32,
18378        0xfc00ffff, 0x2000397f, 0                      , 0,
18379        0x0                 },        /* POOL32Axf_5_group0~*(28) */
18380     { reserved_block      , 0                   , 0   , 32,
18381        0xfc00ffff, 0x20003b7f, 0                      , 0,
18382        0x0                 },        /* POOL32Axf_5_group0~*(29) */
18383     { reserved_block      , 0                   , 0   , 32,
18384        0xfc00ffff, 0x20003d7f, 0                      , 0,
18385        0x0                 },        /* POOL32Axf_5_group0~*(30) */
18386     { reserved_block      , 0                   , 0   , 32,
18387        0xfc00ffff, 0x20003f7f, 0                      , 0,
18388        0x0                 },        /* POOL32Axf_5_group0~*(31) */
18389 };
18390
18391
18392 NMD::Pool NMD::POOL32Axf_5_group1[32] = {
18393     { reserved_block      , 0                   , 0   , 32,
18394        0xfc00ffff, 0x2000417f, 0                      , 0,
18395        0x0                 },        /* POOL32Axf_5_group1~*(0) */
18396     { reserved_block      , 0                   , 0   , 32,
18397        0xfc00ffff, 0x2000437f, 0                      , 0,
18398        0x0                 },        /* POOL32Axf_5_group1~*(1) */
18399     { reserved_block      , 0                   , 0   , 32,
18400        0xfc00ffff, 0x2000457f, 0                      , 0,
18401        0x0                 },        /* POOL32Axf_5_group1~*(2) */
18402     { instruction         , 0                   , 0   , 32,
18403        0xfc00ffff, 0x2000477f, &NMD::DI               , 0,
18404        0x0                 },        /* DI */
18405     { reserved_block      , 0                   , 0   , 32,
18406        0xfc00ffff, 0x2000497f, 0                      , 0,
18407        0x0                 },        /* POOL32Axf_5_group1~*(4) */
18408     { reserved_block      , 0                   , 0   , 32,
18409        0xfc00ffff, 0x20004b7f, 0                      , 0,
18410        0x0                 },        /* POOL32Axf_5_group1~*(5) */
18411     { reserved_block      , 0                   , 0   , 32,
18412        0xfc00ffff, 0x20004d7f, 0                      , 0,
18413        0x0                 },        /* POOL32Axf_5_group1~*(6) */
18414     { reserved_block      , 0                   , 0   , 32,
18415        0xfc00ffff, 0x20004f7f, 0                      , 0,
18416        0x0                 },        /* POOL32Axf_5_group1~*(7) */
18417     { reserved_block      , 0                   , 0   , 32,
18418        0xfc00ffff, 0x2000517f, 0                      , 0,
18419        0x0                 },        /* POOL32Axf_5_group1~*(8) */
18420     { reserved_block      , 0                   , 0   , 32,
18421        0xfc00ffff, 0x2000537f, 0                      , 0,
18422        0x0                 },        /* POOL32Axf_5_group1~*(9) */
18423     { reserved_block      , 0                   , 0   , 32,
18424        0xfc00ffff, 0x2000557f, 0                      , 0,
18425        0x0                 },        /* POOL32Axf_5_group1~*(10) */
18426     { instruction         , 0                   , 0   , 32,
18427        0xfc00ffff, 0x2000577f, &NMD::EI               , 0,
18428        0x0                 },        /* EI */
18429     { reserved_block      , 0                   , 0   , 32,
18430        0xfc00ffff, 0x2000597f, 0                      , 0,
18431        0x0                 },        /* POOL32Axf_5_group1~*(12) */
18432     { reserved_block      , 0                   , 0   , 32,
18433        0xfc00ffff, 0x20005b7f, 0                      , 0,
18434        0x0                 },        /* POOL32Axf_5_group1~*(13) */
18435     { reserved_block      , 0                   , 0   , 32,
18436        0xfc00ffff, 0x20005d7f, 0                      , 0,
18437        0x0                 },        /* POOL32Axf_5_group1~*(14) */
18438     { reserved_block      , 0                   , 0   , 32,
18439        0xfc00ffff, 0x20005f7f, 0                      , 0,
18440        0x0                 },        /* POOL32Axf_5_group1~*(15) */
18441     { reserved_block      , 0                   , 0   , 32,
18442        0xfc00ffff, 0x2000617f, 0                      , 0,
18443        0x0                 },        /* POOL32Axf_5_group1~*(16) */
18444     { reserved_block      , 0                   , 0   , 32,
18445        0xfc00ffff, 0x2000637f, 0                      , 0,
18446        0x0                 },        /* POOL32Axf_5_group1~*(17) */
18447     { reserved_block      , 0                   , 0   , 32,
18448        0xfc00ffff, 0x2000657f, 0                      , 0,
18449        0x0                 },        /* POOL32Axf_5_group1~*(18) */
18450     { reserved_block      , 0                   , 0   , 32,
18451        0xfc00ffff, 0x2000677f, 0                      , 0,
18452        0x0                 },        /* POOL32Axf_5_group1~*(19) */
18453     { reserved_block      , 0                   , 0   , 32,
18454        0xfc00ffff, 0x2000697f, 0                      , 0,
18455        0x0                 },        /* POOL32Axf_5_group1~*(20) */
18456     { reserved_block      , 0                   , 0   , 32,
18457        0xfc00ffff, 0x20006b7f, 0                      , 0,
18458        0x0                 },        /* POOL32Axf_5_group1~*(21) */
18459     { reserved_block      , 0                   , 0   , 32,
18460        0xfc00ffff, 0x20006d7f, 0                      , 0,
18461        0x0                 },        /* POOL32Axf_5_group1~*(22) */
18462     { reserved_block      , 0                   , 0   , 32,
18463        0xfc00ffff, 0x20006f7f, 0                      , 0,
18464        0x0                 },        /* POOL32Axf_5_group1~*(23) */
18465     { reserved_block      , 0                   , 0   , 32,
18466        0xfc00ffff, 0x2000717f, 0                      , 0,
18467        0x0                 },        /* POOL32Axf_5_group1~*(24) */
18468     { reserved_block      , 0                   , 0   , 32,
18469        0xfc00ffff, 0x2000737f, 0                      , 0,
18470        0x0                 },        /* POOL32Axf_5_group1~*(25) */
18471     { reserved_block      , 0                   , 0   , 32,
18472        0xfc00ffff, 0x2000757f, 0                      , 0,
18473        0x0                 },        /* POOL32Axf_5_group1~*(26) */
18474     { reserved_block      , 0                   , 0   , 32,
18475        0xfc00ffff, 0x2000777f, 0                      , 0,
18476        0x0                 },        /* POOL32Axf_5_group1~*(27) */
18477     { reserved_block      , 0                   , 0   , 32,
18478        0xfc00ffff, 0x2000797f, 0                      , 0,
18479        0x0                 },        /* POOL32Axf_5_group1~*(28) */
18480     { reserved_block      , 0                   , 0   , 32,
18481        0xfc00ffff, 0x20007b7f, 0                      , 0,
18482        0x0                 },        /* POOL32Axf_5_group1~*(29) */
18483     { reserved_block      , 0                   , 0   , 32,
18484        0xfc00ffff, 0x20007d7f, 0                      , 0,
18485        0x0                 },        /* POOL32Axf_5_group1~*(30) */
18486     { reserved_block      , 0                   , 0   , 32,
18487        0xfc00ffff, 0x20007f7f, 0                      , 0,
18488        0x0                 },        /* POOL32Axf_5_group1~*(31) */
18489 };
18490
18491
18492 NMD::Pool NMD::ERETx[2] = {
18493     { instruction         , 0                   , 0   , 32,
18494        0xfc01ffff, 0x2000f37f, &NMD::ERET             , 0,
18495        0x0                 },        /* ERET */
18496     { instruction         , 0                   , 0   , 32,
18497        0xfc01ffff, 0x2001f37f, &NMD::ERETNC           , 0,
18498        0x0                 },        /* ERETNC */
18499 };
18500
18501
18502 NMD::Pool NMD::POOL32Axf_5_group3[32] = {
18503     { reserved_block      , 0                   , 0   , 32,
18504        0xfc00ffff, 0x2000c17f, 0                      , 0,
18505        0x0                 },        /* POOL32Axf_5_group3~*(0) */
18506     { instruction         , 0                   , 0   , 32,
18507        0xfc00ffff, 0x2000c37f, &NMD::WAIT             , 0,
18508        0x0                 },        /* WAIT */
18509     { reserved_block      , 0                   , 0   , 32,
18510        0xfc00ffff, 0x2000c57f, 0                      , 0,
18511        0x0                 },        /* POOL32Axf_5_group3~*(2) */
18512     { reserved_block      , 0                   , 0   , 32,
18513        0xfc00ffff, 0x2000c77f, 0                      , 0,
18514        0x0                 },        /* POOL32Axf_5_group3~*(3) */
18515     { reserved_block      , 0                   , 0   , 32,
18516        0xfc00ffff, 0x2000c97f, 0                      , 0,
18517        0x0                 },        /* POOL32Axf_5_group3~*(4) */
18518     { reserved_block      , 0                   , 0   , 32,
18519        0xfc00ffff, 0x2000cb7f, 0                      , 0,
18520        0x0                 },        /* POOL32Axf_5_group3~*(5) */
18521     { reserved_block      , 0                   , 0   , 32,
18522        0xfc00ffff, 0x2000cd7f, 0                      , 0,
18523        0x0                 },        /* POOL32Axf_5_group3~*(6) */
18524     { reserved_block      , 0                   , 0   , 32,
18525        0xfc00ffff, 0x2000cf7f, 0                      , 0,
18526        0x0                 },        /* POOL32Axf_5_group3~*(7) */
18527     { reserved_block      , 0                   , 0   , 32,
18528        0xfc00ffff, 0x2000d17f, 0                      , 0,
18529        0x0                 },        /* POOL32Axf_5_group3~*(8) */
18530     { instruction         , 0                   , 0   , 32,
18531        0xfc00ffff, 0x2000d37f, &NMD::IRET             , 0,
18532        MCU_                },        /* IRET */
18533     { reserved_block      , 0                   , 0   , 32,
18534        0xfc00ffff, 0x2000d57f, 0                      , 0,
18535        0x0                 },        /* POOL32Axf_5_group3~*(10) */
18536     { reserved_block      , 0                   , 0   , 32,
18537        0xfc00ffff, 0x2000d77f, 0                      , 0,
18538        0x0                 },        /* POOL32Axf_5_group3~*(11) */
18539     { reserved_block      , 0                   , 0   , 32,
18540        0xfc00ffff, 0x2000d97f, 0                      , 0,
18541        0x0                 },        /* POOL32Axf_5_group3~*(12) */
18542     { reserved_block      , 0                   , 0   , 32,
18543        0xfc00ffff, 0x2000db7f, 0                      , 0,
18544        0x0                 },        /* POOL32Axf_5_group3~*(13) */
18545     { reserved_block      , 0                   , 0   , 32,
18546        0xfc00ffff, 0x2000dd7f, 0                      , 0,
18547        0x0                 },        /* POOL32Axf_5_group3~*(14) */
18548     { reserved_block      , 0                   , 0   , 32,
18549        0xfc00ffff, 0x2000df7f, 0                      , 0,
18550        0x0                 },        /* POOL32Axf_5_group3~*(15) */
18551     { instruction         , 0                   , 0   , 32,
18552        0xfc00ffff, 0x2000e17f, &NMD::RDPGPR           , 0,
18553        CP0_                },        /* RDPGPR */
18554     { instruction         , 0                   , 0   , 32,
18555        0xfc00ffff, 0x2000e37f, &NMD::DERET            , 0,
18556        EJTAG_              },        /* DERET */
18557     { reserved_block      , 0                   , 0   , 32,
18558        0xfc00ffff, 0x2000e57f, 0                      , 0,
18559        0x0                 },        /* POOL32Axf_5_group3~*(18) */
18560     { reserved_block      , 0                   , 0   , 32,
18561        0xfc00ffff, 0x2000e77f, 0                      , 0,
18562        0x0                 },        /* POOL32Axf_5_group3~*(19) */
18563     { reserved_block      , 0                   , 0   , 32,
18564        0xfc00ffff, 0x2000e97f, 0                      , 0,
18565        0x0                 },        /* POOL32Axf_5_group3~*(20) */
18566     { reserved_block      , 0                   , 0   , 32,
18567        0xfc00ffff, 0x2000eb7f, 0                      , 0,
18568        0x0                 },        /* POOL32Axf_5_group3~*(21) */
18569     { reserved_block      , 0                   , 0   , 32,
18570        0xfc00ffff, 0x2000ed7f, 0                      , 0,
18571        0x0                 },        /* POOL32Axf_5_group3~*(22) */
18572     { reserved_block      , 0                   , 0   , 32,
18573        0xfc00ffff, 0x2000ef7f, 0                      , 0,
18574        0x0                 },        /* POOL32Axf_5_group3~*(23) */
18575     { instruction         , 0                   , 0   , 32,
18576        0xfc00ffff, 0x2000f17f, &NMD::WRPGPR           , 0,
18577        CP0_                },        /* WRPGPR */
18578     { pool                , ERETx               , 2   , 32,
18579        0xfc00ffff, 0x2000f37f, 0                      , 0,
18580        0x0                 },        /* ERETx */
18581     { reserved_block      , 0                   , 0   , 32,
18582        0xfc00ffff, 0x2000f57f, 0                      , 0,
18583        0x0                 },        /* POOL32Axf_5_group3~*(26) */
18584     { reserved_block      , 0                   , 0   , 32,
18585        0xfc00ffff, 0x2000f77f, 0                      , 0,
18586        0x0                 },        /* POOL32Axf_5_group3~*(27) */
18587     { reserved_block      , 0                   , 0   , 32,
18588        0xfc00ffff, 0x2000f97f, 0                      , 0,
18589        0x0                 },        /* POOL32Axf_5_group3~*(28) */
18590     { reserved_block      , 0                   , 0   , 32,
18591        0xfc00ffff, 0x2000fb7f, 0                      , 0,
18592        0x0                 },        /* POOL32Axf_5_group3~*(29) */
18593     { reserved_block      , 0                   , 0   , 32,
18594        0xfc00ffff, 0x2000fd7f, 0                      , 0,
18595        0x0                 },        /* POOL32Axf_5_group3~*(30) */
18596     { reserved_block      , 0                   , 0   , 32,
18597        0xfc00ffff, 0x2000ff7f, 0                      , 0,
18598        0x0                 },        /* POOL32Axf_5_group3~*(31) */
18599 };
18600
18601
18602 NMD::Pool NMD::POOL32Axf_5[4] = {
18603     { pool                , POOL32Axf_5_group0  , 32  , 32,
18604        0xfc00c1ff, 0x2000017f, 0                      , 0,
18605        0x0                 },        /* POOL32Axf_5_group0 */
18606     { pool                , POOL32Axf_5_group1  , 32  , 32,
18607        0xfc00c1ff, 0x2000417f, 0                      , 0,
18608        0x0                 },        /* POOL32Axf_5_group1 */
18609     { reserved_block      , 0                   , 0   , 32,
18610        0xfc00c1ff, 0x2000817f, 0                      , 0,
18611        0x0                 },        /* POOL32Axf_5~*(2) */
18612     { pool                , POOL32Axf_5_group3  , 32  , 32,
18613        0xfc00c1ff, 0x2000c17f, 0                      , 0,
18614        0x0                 },        /* POOL32Axf_5_group3 */
18615 };
18616
18617
18618 NMD::Pool NMD::SHRA__R__QB[2] = {
18619     { instruction         , 0                   , 0   , 32,
18620        0xfc001fff, 0x200001ff, &NMD::SHRA_QB          , 0,
18621        DSP_                },        /* SHRA.QB */
18622     { instruction         , 0                   , 0   , 32,
18623        0xfc001fff, 0x200011ff, &NMD::SHRA_R_QB        , 0,
18624        DSP_                },        /* SHRA_R.QB */
18625 };
18626
18627
18628 NMD::Pool NMD::POOL32Axf_7[8] = {
18629     { pool                , SHRA__R__QB         , 2   , 32,
18630        0xfc000fff, 0x200001ff, 0                      , 0,
18631        0x0                 },        /* SHRA[_R].QB */
18632     { instruction         , 0                   , 0   , 32,
18633        0xfc000fff, 0x200003ff, &NMD::SHRL_PH          , 0,
18634        DSP_                },        /* SHRL.PH */
18635     { instruction         , 0                   , 0   , 32,
18636        0xfc000fff, 0x200005ff, &NMD::REPL_QB          , 0,
18637        DSP_                },        /* REPL.QB */
18638     { reserved_block      , 0                   , 0   , 32,
18639        0xfc000fff, 0x200007ff, 0                      , 0,
18640        0x0                 },        /* POOL32Axf_7~*(3) */
18641     { reserved_block      , 0                   , 0   , 32,
18642        0xfc000fff, 0x200009ff, 0                      , 0,
18643        0x0                 },        /* POOL32Axf_7~*(4) */
18644     { reserved_block      , 0                   , 0   , 32,
18645        0xfc000fff, 0x20000bff, 0                      , 0,
18646        0x0                 },        /* POOL32Axf_7~*(5) */
18647     { reserved_block      , 0                   , 0   , 32,
18648        0xfc000fff, 0x20000dff, 0                      , 0,
18649        0x0                 },        /* POOL32Axf_7~*(6) */
18650     { reserved_block      , 0                   , 0   , 32,
18651        0xfc000fff, 0x20000fff, 0                      , 0,
18652        0x0                 },        /* POOL32Axf_7~*(7) */
18653 };
18654
18655
18656 NMD::Pool NMD::POOL32Axf[8] = {
18657     { reserved_block      , 0                   , 0   , 32,
18658        0xfc0001ff, 0x2000003f, 0                      , 0,
18659        0x0                 },        /* POOL32Axf~*(0) */
18660     { pool                , POOL32Axf_1         , 8   , 32,
18661        0xfc0001ff, 0x2000007f, 0                      , 0,
18662        0x0                 },        /* POOL32Axf_1 */
18663     { pool                , POOL32Axf_2         , 4   , 32,
18664        0xfc0001ff, 0x200000bf, 0                      , 0,
18665        0x0                 },        /* POOL32Axf_2 */
18666     { reserved_block      , 0                   , 0   , 32,
18667        0xfc0001ff, 0x200000ff, 0                      , 0,
18668        0x0                 },        /* POOL32Axf~*(3) */
18669     { pool                , POOL32Axf_4         , 128 , 32,
18670        0xfc0001ff, 0x2000013f, 0                      , 0,
18671        0x0                 },        /* POOL32Axf_4 */
18672     { pool                , POOL32Axf_5         , 4   , 32,
18673        0xfc0001ff, 0x2000017f, 0                      , 0,
18674        0x0                 },        /* POOL32Axf_5 */
18675     { reserved_block      , 0                   , 0   , 32,
18676        0xfc0001ff, 0x200001bf, 0                      , 0,
18677        0x0                 },        /* POOL32Axf~*(6) */
18678     { pool                , POOL32Axf_7         , 8   , 32,
18679        0xfc0001ff, 0x200001ff, 0                      , 0,
18680        0x0                 },        /* POOL32Axf_7 */
18681 };
18682
18683
18684 NMD::Pool NMD::_POOL32A7[8] = {
18685     { pool                , P_LSX               , 2   , 32,
18686        0xfc00003f, 0x20000007, 0                      , 0,
18687        0x0                 },        /* P.LSX */
18688     { instruction         , 0                   , 0   , 32,
18689        0xfc00003f, 0x2000000f, &NMD::LSA              , 0,
18690        0x0                 },        /* LSA */
18691     { reserved_block      , 0                   , 0   , 32,
18692        0xfc00003f, 0x20000017, 0                      , 0,
18693        0x0                 },        /* _POOL32A7~*(2) */
18694     { instruction         , 0                   , 0   , 32,
18695        0xfc00003f, 0x2000001f, &NMD::EXTW             , 0,
18696        0x0                 },        /* EXTW */
18697     { reserved_block      , 0                   , 0   , 32,
18698        0xfc00003f, 0x20000027, 0                      , 0,
18699        0x0                 },        /* _POOL32A7~*(4) */
18700     { reserved_block      , 0                   , 0   , 32,
18701        0xfc00003f, 0x2000002f, 0                      , 0,
18702        0x0                 },        /* _POOL32A7~*(5) */
18703     { reserved_block      , 0                   , 0   , 32,
18704        0xfc00003f, 0x20000037, 0                      , 0,
18705        0x0                 },        /* _POOL32A7~*(6) */
18706     { pool                , POOL32Axf           , 8   , 32,
18707        0xfc00003f, 0x2000003f, 0                      , 0,
18708        0x0                 },        /* POOL32Axf */
18709 };
18710
18711
18712 NMD::Pool NMD::P32A[8] = {
18713     { pool                , _POOL32A0           , 128 , 32,
18714        0xfc000007, 0x20000000, 0                      , 0,
18715        0x0                 },        /* _POOL32A0 */
18716     { instruction         , 0                   , 0   , 32,
18717        0xfc000007, 0x20000001, &NMD::SPECIAL2         , 0,
18718        UDI_                },        /* SPECIAL2 */
18719     { instruction         , 0                   , 0   , 32,
18720        0xfc000007, 0x20000002, &NMD::COP2_1           , 0,
18721        CP2_                },        /* COP2_1 */
18722     { instruction         , 0                   , 0   , 32,
18723        0xfc000007, 0x20000003, &NMD::UDI              , 0,
18724        UDI_                },        /* UDI */
18725     { reserved_block      , 0                   , 0   , 32,
18726        0xfc000007, 0x20000004, 0                      , 0,
18727        0x0                 },        /* P32A~*(4) */
18728     { pool                , _POOL32A5           , 128 , 32,
18729        0xfc000007, 0x20000005, 0                      , 0,
18730        0x0                 },        /* _POOL32A5 */
18731     { reserved_block      , 0                   , 0   , 32,
18732        0xfc000007, 0x20000006, 0                      , 0,
18733        0x0                 },        /* P32A~*(6) */
18734     { pool                , _POOL32A7           , 8   , 32,
18735        0xfc000007, 0x20000007, 0                      , 0,
18736        0x0                 },        /* _POOL32A7 */
18737 };
18738
18739
18740 NMD::Pool NMD::P_GP_D[2] = {
18741     { instruction         , 0                   , 0   , 32,
18742        0xfc000007, 0x40000001, &NMD::LD_GP_           , 0,
18743        MIPS64_             },        /* LD[GP] */
18744     { instruction         , 0                   , 0   , 32,
18745        0xfc000007, 0x40000005, &NMD::SD_GP_           , 0,
18746        MIPS64_             },        /* SD[GP] */
18747 };
18748
18749
18750 NMD::Pool NMD::P_GP_W[4] = {
18751     { instruction         , 0                   , 0   , 32,
18752        0xfc000003, 0x40000000, &NMD::ADDIU_GP_W_      , 0,
18753        0x0                 },        /* ADDIU[GP.W] */
18754     { pool                , P_GP_D              , 2   , 32,
18755        0xfc000003, 0x40000001, 0                      , 0,
18756        0x0                 },        /* P.GP.D */
18757     { instruction         , 0                   , 0   , 32,
18758        0xfc000003, 0x40000002, &NMD::LW_GP_           , 0,
18759        0x0                 },        /* LW[GP] */
18760     { instruction         , 0                   , 0   , 32,
18761        0xfc000003, 0x40000003, &NMD::SW_GP_           , 0,
18762        0x0                 },        /* SW[GP] */
18763 };
18764
18765
18766 NMD::Pool NMD::POOL48I[32] = {
18767     { instruction         , 0                   , 0   , 48,
18768        0xfc1f00000000ull, 0x600000000000ull, &NMD::LI_48_           , 0,
18769        XMMS_               },        /* LI[48] */
18770     { instruction         , 0                   , 0   , 48,
18771        0xfc1f00000000ull, 0x600100000000ull, &NMD::ADDIU_48_        , 0,
18772        XMMS_               },        /* ADDIU[48] */
18773     { instruction         , 0                   , 0   , 48,
18774        0xfc1f00000000ull, 0x600200000000ull, &NMD::ADDIU_GP48_      , 0,
18775        XMMS_               },        /* ADDIU[GP48] */
18776     { instruction         , 0                   , 0   , 48,
18777        0xfc1f00000000ull, 0x600300000000ull, &NMD::ADDIUPC_48_      , 0,
18778        XMMS_               },        /* ADDIUPC[48] */
18779     { reserved_block      , 0                   , 0   , 48,
18780        0xfc1f00000000ull, 0x600400000000ull, 0                      , 0,
18781        0x0                 },        /* POOL48I~*(4) */
18782     { reserved_block      , 0                   , 0   , 48,
18783        0xfc1f00000000ull, 0x600500000000ull, 0                      , 0,
18784        0x0                 },        /* POOL48I~*(5) */
18785     { reserved_block      , 0                   , 0   , 48,
18786        0xfc1f00000000ull, 0x600600000000ull, 0                      , 0,
18787        0x0                 },        /* POOL48I~*(6) */
18788     { reserved_block      , 0                   , 0   , 48,
18789        0xfc1f00000000ull, 0x600700000000ull, 0                      , 0,
18790        0x0                 },        /* POOL48I~*(7) */
18791     { reserved_block      , 0                   , 0   , 48,
18792        0xfc1f00000000ull, 0x600800000000ull, 0                      , 0,
18793        0x0                 },        /* POOL48I~*(8) */
18794     { reserved_block      , 0                   , 0   , 48,
18795        0xfc1f00000000ull, 0x600900000000ull, 0                      , 0,
18796        0x0                 },        /* POOL48I~*(9) */
18797     { reserved_block      , 0                   , 0   , 48,
18798        0xfc1f00000000ull, 0x600a00000000ull, 0                      , 0,
18799        0x0                 },        /* POOL48I~*(10) */
18800     { instruction         , 0                   , 0   , 48,
18801        0xfc1f00000000ull, 0x600b00000000ull, &NMD::LWPC_48_         , 0,
18802        XMMS_               },        /* LWPC[48] */
18803     { reserved_block      , 0                   , 0   , 48,
18804        0xfc1f00000000ull, 0x600c00000000ull, 0                      , 0,
18805        0x0                 },        /* POOL48I~*(12) */
18806     { reserved_block      , 0                   , 0   , 48,
18807        0xfc1f00000000ull, 0x600d00000000ull, 0                      , 0,
18808        0x0                 },        /* POOL48I~*(13) */
18809     { reserved_block      , 0                   , 0   , 48,
18810        0xfc1f00000000ull, 0x600e00000000ull, 0                      , 0,
18811        0x0                 },        /* POOL48I~*(14) */
18812     { instruction         , 0                   , 0   , 48,
18813        0xfc1f00000000ull, 0x600f00000000ull, &NMD::SWPC_48_         , 0,
18814        XMMS_               },        /* SWPC[48] */
18815     { reserved_block      , 0                   , 0   , 48,
18816        0xfc1f00000000ull, 0x601000000000ull, 0                      , 0,
18817        0x0                 },        /* POOL48I~*(16) */
18818     { instruction         , 0                   , 0   , 48,
18819        0xfc1f00000000ull, 0x601100000000ull, &NMD::DADDIU_48_       , 0,
18820        MIPS64_             },        /* DADDIU[48] */
18821     { reserved_block      , 0                   , 0   , 48,
18822        0xfc1f00000000ull, 0x601200000000ull, 0                      , 0,
18823        0x0                 },        /* POOL48I~*(18) */
18824     { reserved_block      , 0                   , 0   , 48,
18825        0xfc1f00000000ull, 0x601300000000ull, 0                      , 0,
18826        0x0                 },        /* POOL48I~*(19) */
18827     { instruction         , 0                   , 0   , 48,
18828        0xfc1f00000000ull, 0x601400000000ull, &NMD::DLUI_48_         , 0,
18829        MIPS64_             },        /* DLUI[48] */
18830     { reserved_block      , 0                   , 0   , 48,
18831        0xfc1f00000000ull, 0x601500000000ull, 0                      , 0,
18832        0x0                 },        /* POOL48I~*(21) */
18833     { reserved_block      , 0                   , 0   , 48,
18834        0xfc1f00000000ull, 0x601600000000ull, 0                      , 0,
18835        0x0                 },        /* POOL48I~*(22) */
18836     { reserved_block      , 0                   , 0   , 48,
18837        0xfc1f00000000ull, 0x601700000000ull, 0                      , 0,
18838        0x0                 },        /* POOL48I~*(23) */
18839     { reserved_block      , 0                   , 0   , 48,
18840        0xfc1f00000000ull, 0x601800000000ull, 0                      , 0,
18841        0x0                 },        /* POOL48I~*(24) */
18842     { reserved_block      , 0                   , 0   , 48,
18843        0xfc1f00000000ull, 0x601900000000ull, 0                      , 0,
18844        0x0                 },        /* POOL48I~*(25) */
18845     { reserved_block      , 0                   , 0   , 48,
18846        0xfc1f00000000ull, 0x601a00000000ull, 0                      , 0,
18847        0x0                 },        /* POOL48I~*(26) */
18848     { instruction         , 0                   , 0   , 48,
18849        0xfc1f00000000ull, 0x601b00000000ull, &NMD::LDPC_48_         , 0,
18850        MIPS64_             },        /* LDPC[48] */
18851     { reserved_block      , 0                   , 0   , 48,
18852        0xfc1f00000000ull, 0x601c00000000ull, 0                      , 0,
18853        0x0                 },        /* POOL48I~*(28) */
18854     { reserved_block      , 0                   , 0   , 48,
18855        0xfc1f00000000ull, 0x601d00000000ull, 0                      , 0,
18856        0x0                 },        /* POOL48I~*(29) */
18857     { reserved_block      , 0                   , 0   , 48,
18858        0xfc1f00000000ull, 0x601e00000000ull, 0                      , 0,
18859        0x0                 },        /* POOL48I~*(30) */
18860     { instruction         , 0                   , 0   , 48,
18861        0xfc1f00000000ull, 0x601f00000000ull, &NMD::SDPC_48_         , 0,
18862        MIPS64_             },        /* SDPC[48] */
18863 };
18864
18865
18866 NMD::Pool NMD::PP_SR[4] = {
18867     { instruction         , 0                   , 0   , 32,
18868        0xfc10f003, 0x80003000, &NMD::SAVE_32_         , 0,
18869        0x0                 },        /* SAVE[32] */
18870     { reserved_block      , 0                   , 0   , 32,
18871        0xfc10f003, 0x80003001, 0                      , 0,
18872        0x0                 },        /* PP.SR~*(1) */
18873     { instruction         , 0                   , 0   , 32,
18874        0xfc10f003, 0x80003002, &NMD::RESTORE_32_      , 0,
18875        0x0                 },        /* RESTORE[32] */
18876     { return_instruction  , 0                   , 0   , 32,
18877        0xfc10f003, 0x80003003, &NMD::RESTORE_JRC_32_  , 0,
18878        0x0                 },        /* RESTORE.JRC[32] */
18879 };
18880
18881
18882 NMD::Pool NMD::P_SR_F[8] = {
18883     { instruction         , 0                   , 0   , 32,
18884        0xfc10f007, 0x80103000, &NMD::SAVEF            , 0,
18885        CP1_                },        /* SAVEF */
18886     { instruction         , 0                   , 0   , 32,
18887        0xfc10f007, 0x80103001, &NMD::RESTOREF         , 0,
18888        CP1_                },        /* RESTOREF */
18889     { reserved_block      , 0                   , 0   , 32,
18890        0xfc10f007, 0x80103002, 0                      , 0,
18891        0x0                 },        /* P.SR.F~*(2) */
18892     { reserved_block      , 0                   , 0   , 32,
18893        0xfc10f007, 0x80103003, 0                      , 0,
18894        0x0                 },        /* P.SR.F~*(3) */
18895     { reserved_block      , 0                   , 0   , 32,
18896        0xfc10f007, 0x80103004, 0                      , 0,
18897        0x0                 },        /* P.SR.F~*(4) */
18898     { reserved_block      , 0                   , 0   , 32,
18899        0xfc10f007, 0x80103005, 0                      , 0,
18900        0x0                 },        /* P.SR.F~*(5) */
18901     { reserved_block      , 0                   , 0   , 32,
18902        0xfc10f007, 0x80103006, 0                      , 0,
18903        0x0                 },        /* P.SR.F~*(6) */
18904     { reserved_block      , 0                   , 0   , 32,
18905        0xfc10f007, 0x80103007, 0                      , 0,
18906        0x0                 },        /* P.SR.F~*(7) */
18907 };
18908
18909
18910 NMD::Pool NMD::P_SR[2] = {
18911     { pool                , PP_SR               , 4   , 32,
18912        0xfc10f000, 0x80003000, 0                      , 0,
18913        0x0                 },        /* PP.SR */
18914     { pool                , P_SR_F              , 8   , 32,
18915        0xfc10f000, 0x80103000, 0                      , 0,
18916        0x0                 },        /* P.SR.F */
18917 };
18918
18919
18920 NMD::Pool NMD::P_SLL[5] = {
18921     { instruction         , 0                   , 0   , 32,
18922        0xffe0f1ff, 0x8000c000, &NMD::NOP_32_          , 0,
18923        0x0                 },        /* NOP[32] */
18924     { instruction         , 0                   , 0   , 32,
18925        0xffe0f1ff, 0x8000c003, &NMD::EHB              , 0,
18926        0x0                 },        /* EHB */
18927     { instruction         , 0                   , 0   , 32,
18928        0xffe0f1ff, 0x8000c005, &NMD::PAUSE            , 0,
18929        0x0                 },        /* PAUSE */
18930     { instruction         , 0                   , 0   , 32,
18931        0xffe0f1ff, 0x8000c006, &NMD::SYNC             , 0,
18932        0x0                 },        /* SYNC */
18933     { instruction         , 0                   , 0   , 32,
18934        0xfc00f1e0, 0x8000c000, &NMD::SLL_32_          , 0,
18935        0x0                 },        /* SLL[32] */
18936 };
18937
18938
18939 NMD::Pool NMD::P_SHIFT[16] = {
18940     { pool                , P_SLL               , 5   , 32,
18941        0xfc00f1e0, 0x8000c000, 0                      , 0,
18942        0x0                 },        /* P.SLL */
18943     { reserved_block      , 0                   , 0   , 32,
18944        0xfc00f1e0, 0x8000c020, 0                      , 0,
18945        0x0                 },        /* P.SHIFT~*(1) */
18946     { instruction         , 0                   , 0   , 32,
18947        0xfc00f1e0, 0x8000c040, &NMD::SRL_32_          , 0,
18948        0x0                 },        /* SRL[32] */
18949     { reserved_block      , 0                   , 0   , 32,
18950        0xfc00f1e0, 0x8000c060, 0                      , 0,
18951        0x0                 },        /* P.SHIFT~*(3) */
18952     { instruction         , 0                   , 0   , 32,
18953        0xfc00f1e0, 0x8000c080, &NMD::SRA              , 0,
18954        0x0                 },        /* SRA */
18955     { reserved_block      , 0                   , 0   , 32,
18956        0xfc00f1e0, 0x8000c0a0, 0                      , 0,
18957        0x0                 },        /* P.SHIFT~*(5) */
18958     { instruction         , 0                   , 0   , 32,
18959        0xfc00f1e0, 0x8000c0c0, &NMD::ROTR             , 0,
18960        0x0                 },        /* ROTR */
18961     { reserved_block      , 0                   , 0   , 32,
18962        0xfc00f1e0, 0x8000c0e0, 0                      , 0,
18963        0x0                 },        /* P.SHIFT~*(7) */
18964     { instruction         , 0                   , 0   , 32,
18965        0xfc00f1e0, 0x8000c100, &NMD::DSLL             , 0,
18966        MIPS64_             },        /* DSLL */
18967     { instruction         , 0                   , 0   , 32,
18968        0xfc00f1e0, 0x8000c120, &NMD::DSLL32           , 0,
18969        MIPS64_             },        /* DSLL32 */
18970     { instruction         , 0                   , 0   , 32,
18971        0xfc00f1e0, 0x8000c140, &NMD::DSRL             , 0,
18972        MIPS64_             },        /* DSRL */
18973     { instruction         , 0                   , 0   , 32,
18974        0xfc00f1e0, 0x8000c160, &NMD::DSRL32           , 0,
18975        MIPS64_             },        /* DSRL32 */
18976     { instruction         , 0                   , 0   , 32,
18977        0xfc00f1e0, 0x8000c180, &NMD::DSRA             , 0,
18978        MIPS64_             },        /* DSRA */
18979     { instruction         , 0                   , 0   , 32,
18980        0xfc00f1e0, 0x8000c1a0, &NMD::DSRA32           , 0,
18981        MIPS64_             },        /* DSRA32 */
18982     { instruction         , 0                   , 0   , 32,
18983        0xfc00f1e0, 0x8000c1c0, &NMD::DROTR            , 0,
18984        MIPS64_             },        /* DROTR */
18985     { instruction         , 0                   , 0   , 32,
18986        0xfc00f1e0, 0x8000c1e0, &NMD::DROTR32          , 0,
18987        MIPS64_             },        /* DROTR32 */
18988 };
18989
18990
18991 NMD::Pool NMD::P_ROTX[4] = {
18992     { instruction         , 0                   , 0   , 32,
18993        0xfc00f820, 0x8000d000, &NMD::ROTX             , 0,
18994        XMMS_               },        /* ROTX */
18995     { reserved_block      , 0                   , 0   , 32,
18996        0xfc00f820, 0x8000d020, 0                      , 0,
18997        0x0                 },        /* P.ROTX~*(1) */
18998     { reserved_block      , 0                   , 0   , 32,
18999        0xfc00f820, 0x8000d800, 0                      , 0,
19000        0x0                 },        /* P.ROTX~*(2) */
19001     { reserved_block      , 0                   , 0   , 32,
19002        0xfc00f820, 0x8000d820, 0                      , 0,
19003        0x0                 },        /* P.ROTX~*(3) */
19004 };
19005
19006
19007 NMD::Pool NMD::P_INS[4] = {
19008     { instruction         , 0                   , 0   , 32,
19009        0xfc00f820, 0x8000e000, &NMD::INS              , 0,
19010        XMMS_               },        /* INS */
19011     { instruction         , 0                   , 0   , 32,
19012        0xfc00f820, 0x8000e020, &NMD::DINSU            , 0,
19013        MIPS64_             },        /* DINSU */
19014     { instruction         , 0                   , 0   , 32,
19015        0xfc00f820, 0x8000e800, &NMD::DINSM            , 0,
19016        MIPS64_             },        /* DINSM */
19017     { instruction         , 0                   , 0   , 32,
19018        0xfc00f820, 0x8000e820, &NMD::DINS             , 0,
19019        MIPS64_             },        /* DINS */
19020 };
19021
19022
19023 NMD::Pool NMD::P_EXT[4] = {
19024     { instruction         , 0                   , 0   , 32,
19025        0xfc00f820, 0x8000f000, &NMD::EXT              , 0,
19026        XMMS_               },        /* EXT */
19027     { instruction         , 0                   , 0   , 32,
19028        0xfc00f820, 0x8000f020, &NMD::DEXTU            , 0,
19029        MIPS64_             },        /* DEXTU */
19030     { instruction         , 0                   , 0   , 32,
19031        0xfc00f820, 0x8000f800, &NMD::DEXTM            , 0,
19032        MIPS64_             },        /* DEXTM */
19033     { instruction         , 0                   , 0   , 32,
19034        0xfc00f820, 0x8000f820, &NMD::DEXT             , 0,
19035        MIPS64_             },        /* DEXT */
19036 };
19037
19038
19039 NMD::Pool NMD::P_U12[16] = {
19040     { instruction         , 0                   , 0   , 32,
19041        0xfc00f000, 0x80000000, &NMD::ORI              , 0,
19042        0x0                 },        /* ORI */
19043     { instruction         , 0                   , 0   , 32,
19044        0xfc00f000, 0x80001000, &NMD::XORI             , 0,
19045        0x0                 },        /* XORI */
19046     { instruction         , 0                   , 0   , 32,
19047        0xfc00f000, 0x80002000, &NMD::ANDI_32_         , 0,
19048        0x0                 },        /* ANDI[32] */
19049     { pool                , P_SR                , 2   , 32,
19050        0xfc00f000, 0x80003000, 0                      , 0,
19051        0x0                 },        /* P.SR */
19052     { instruction         , 0                   , 0   , 32,
19053        0xfc00f000, 0x80004000, &NMD::SLTI             , 0,
19054        0x0                 },        /* SLTI */
19055     { instruction         , 0                   , 0   , 32,
19056        0xfc00f000, 0x80005000, &NMD::SLTIU            , 0,
19057        0x0                 },        /* SLTIU */
19058     { instruction         , 0                   , 0   , 32,
19059        0xfc00f000, 0x80006000, &NMD::SEQI             , 0,
19060        0x0                 },        /* SEQI */
19061     { reserved_block      , 0                   , 0   , 32,
19062        0xfc00f000, 0x80007000, 0                      , 0,
19063        0x0                 },        /* P.U12~*(7) */
19064     { instruction         , 0                   , 0   , 32,
19065        0xfc00f000, 0x80008000, &NMD::ADDIU_NEG_       , 0,
19066        0x0                 },        /* ADDIU[NEG] */
19067     { instruction         , 0                   , 0   , 32,
19068        0xfc00f000, 0x80009000, &NMD::DADDIU_U12_      , 0,
19069        MIPS64_             },        /* DADDIU[U12] */
19070     { instruction         , 0                   , 0   , 32,
19071        0xfc00f000, 0x8000a000, &NMD::DADDIU_NEG_      , 0,
19072        MIPS64_             },        /* DADDIU[NEG] */
19073     { instruction         , 0                   , 0   , 32,
19074        0xfc00f000, 0x8000b000, &NMD::DROTX            , 0,
19075        MIPS64_             },        /* DROTX */
19076     { pool                , P_SHIFT             , 16  , 32,
19077        0xfc00f000, 0x8000c000, 0                      , 0,
19078        0x0                 },        /* P.SHIFT */
19079     { pool                , P_ROTX              , 4   , 32,
19080        0xfc00f000, 0x8000d000, 0                      , 0,
19081        0x0                 },        /* P.ROTX */
19082     { pool                , P_INS               , 4   , 32,
19083        0xfc00f000, 0x8000e000, 0                      , 0,
19084        0x0                 },        /* P.INS */
19085     { pool                , P_EXT               , 4   , 32,
19086        0xfc00f000, 0x8000f000, 0                      , 0,
19087        0x0                 },        /* P.EXT */
19088 };
19089
19090
19091 NMD::Pool NMD::RINT_fmt[2] = {
19092     { instruction         , 0                   , 0   , 32,
19093        0xfc0003ff, 0xa0000020, &NMD::RINT_S           , 0,
19094        CP1_                },        /* RINT.S */
19095     { instruction         , 0                   , 0   , 32,
19096        0xfc0003ff, 0xa0000220, &NMD::RINT_D           , 0,
19097        CP1_                },        /* RINT.D */
19098 };
19099
19100
19101 NMD::Pool NMD::ADD_fmt0[2] = {
19102     { instruction         , 0                   , 0   , 32,
19103        0xfc0003ff, 0xa0000030, &NMD::ADD_S            , 0,
19104        CP1_                },        /* ADD.S */
19105     { reserved_block      , 0                   , 0   , 32,
19106        0xfc0003ff, 0xa0000230, 0                      , 0,
19107        CP1_                },        /* ADD.fmt0~*(1) */
19108 };
19109
19110
19111 NMD::Pool NMD::SELEQZ_fmt[2] = {
19112     { instruction         , 0                   , 0   , 32,
19113        0xfc0003ff, 0xa0000038, &NMD::SELEQZ_S         , 0,
19114        CP1_                },        /* SELEQZ.S */
19115     { instruction         , 0                   , 0   , 32,
19116        0xfc0003ff, 0xa0000238, &NMD::SELEQZ_D         , 0,
19117        CP1_                },        /* SELEQZ.D */
19118 };
19119
19120
19121 NMD::Pool NMD::CLASS_fmt[2] = {
19122     { instruction         , 0                   , 0   , 32,
19123        0xfc0003ff, 0xa0000060, &NMD::CLASS_S          , 0,
19124        CP1_                },        /* CLASS.S */
19125     { instruction         , 0                   , 0   , 32,
19126        0xfc0003ff, 0xa0000260, &NMD::CLASS_D          , 0,
19127        CP1_                },        /* CLASS.D */
19128 };
19129
19130
19131 NMD::Pool NMD::SUB_fmt0[2] = {
19132     { instruction         , 0                   , 0   , 32,
19133        0xfc0003ff, 0xa0000070, &NMD::SUB_S            , 0,
19134        CP1_                },        /* SUB.S */
19135     { reserved_block      , 0                   , 0   , 32,
19136        0xfc0003ff, 0xa0000270, 0                      , 0,
19137        CP1_                },        /* SUB.fmt0~*(1) */
19138 };
19139
19140
19141 NMD::Pool NMD::SELNEZ_fmt[2] = {
19142     { instruction         , 0                   , 0   , 32,
19143        0xfc0003ff, 0xa0000078, &NMD::SELNEZ_S         , 0,
19144        CP1_                },        /* SELNEZ.S */
19145     { instruction         , 0                   , 0   , 32,
19146        0xfc0003ff, 0xa0000278, &NMD::SELNEZ_D         , 0,
19147        CP1_                },        /* SELNEZ.D */
19148 };
19149
19150
19151 NMD::Pool NMD::MUL_fmt0[2] = {
19152     { instruction         , 0                   , 0   , 32,
19153        0xfc0003ff, 0xa00000b0, &NMD::MUL_S            , 0,
19154        CP1_                },        /* MUL.S */
19155     { reserved_block      , 0                   , 0   , 32,
19156        0xfc0003ff, 0xa00002b0, 0                      , 0,
19157        CP1_                },        /* MUL.fmt0~*(1) */
19158 };
19159
19160
19161 NMD::Pool NMD::SEL_fmt[2] = {
19162     { instruction         , 0                   , 0   , 32,
19163        0xfc0003ff, 0xa00000b8, &NMD::SEL_S            , 0,
19164        CP1_                },        /* SEL.S */
19165     { instruction         , 0                   , 0   , 32,
19166        0xfc0003ff, 0xa00002b8, &NMD::SEL_D            , 0,
19167        CP1_                },        /* SEL.D */
19168 };
19169
19170
19171 NMD::Pool NMD::DIV_fmt0[2] = {
19172     { instruction         , 0                   , 0   , 32,
19173        0xfc0003ff, 0xa00000f0, &NMD::DIV_S            , 0,
19174        CP1_                },        /* DIV.S */
19175     { reserved_block      , 0                   , 0   , 32,
19176        0xfc0003ff, 0xa00002f0, 0                      , 0,
19177        CP1_                },        /* DIV.fmt0~*(1) */
19178 };
19179
19180
19181 NMD::Pool NMD::ADD_fmt1[2] = {
19182     { instruction         , 0                   , 0   , 32,
19183        0xfc0003ff, 0xa0000130, &NMD::ADD_D            , 0,
19184        CP1_                },        /* ADD.D */
19185     { reserved_block      , 0                   , 0   , 32,
19186        0xfc0003ff, 0xa0000330, 0                      , 0,
19187        CP1_                },        /* ADD.fmt1~*(1) */
19188 };
19189
19190
19191 NMD::Pool NMD::SUB_fmt1[2] = {
19192     { instruction         , 0                   , 0   , 32,
19193        0xfc0003ff, 0xa0000170, &NMD::SUB_D            , 0,
19194        CP1_                },        /* SUB.D */
19195     { reserved_block      , 0                   , 0   , 32,
19196        0xfc0003ff, 0xa0000370, 0                      , 0,
19197        CP1_                },        /* SUB.fmt1~*(1) */
19198 };
19199
19200
19201 NMD::Pool NMD::MUL_fmt1[2] = {
19202     { instruction         , 0                   , 0   , 32,
19203        0xfc0003ff, 0xa00001b0, &NMD::MUL_D            , 0,
19204        CP1_                },        /* MUL.D */
19205     { reserved_block      , 0                   , 0   , 32,
19206        0xfc0003ff, 0xa00003b0, 0                      , 0,
19207        CP1_                },        /* MUL.fmt1~*(1) */
19208 };
19209
19210
19211 NMD::Pool NMD::MADDF_fmt[2] = {
19212     { instruction         , 0                   , 0   , 32,
19213        0xfc0003ff, 0xa00001b8, &NMD::MADDF_S          , 0,
19214        CP1_                },        /* MADDF.S */
19215     { instruction         , 0                   , 0   , 32,
19216        0xfc0003ff, 0xa00003b8, &NMD::MADDF_D          , 0,
19217        CP1_                },        /* MADDF.D */
19218 };
19219
19220
19221 NMD::Pool NMD::DIV_fmt1[2] = {
19222     { instruction         , 0                   , 0   , 32,
19223        0xfc0003ff, 0xa00001f0, &NMD::DIV_D            , 0,
19224        CP1_                },        /* DIV.D */
19225     { reserved_block      , 0                   , 0   , 32,
19226        0xfc0003ff, 0xa00003f0, 0                      , 0,
19227        CP1_                },        /* DIV.fmt1~*(1) */
19228 };
19229
19230
19231 NMD::Pool NMD::MSUBF_fmt[2] = {
19232     { instruction         , 0                   , 0   , 32,
19233        0xfc0003ff, 0xa00001f8, &NMD::MSUBF_S          , 0,
19234        CP1_                },        /* MSUBF.S */
19235     { instruction         , 0                   , 0   , 32,
19236        0xfc0003ff, 0xa00003f8, &NMD::MSUBF_D          , 0,
19237        CP1_                },        /* MSUBF.D */
19238 };
19239
19240
19241 NMD::Pool NMD::POOL32F_0[64] = {
19242     { reserved_block      , 0                   , 0   , 32,
19243        0xfc0001ff, 0xa0000000, 0                      , 0,
19244        CP1_                },        /* POOL32F_0~*(0) */
19245     { reserved_block      , 0                   , 0   , 32,
19246        0xfc0001ff, 0xa0000008, 0                      , 0,
19247        CP1_                },        /* POOL32F_0~*(1) */
19248     { reserved_block      , 0                   , 0   , 32,
19249        0xfc0001ff, 0xa0000010, 0                      , 0,
19250        CP1_                },        /* POOL32F_0~*(2) */
19251     { reserved_block      , 0                   , 0   , 32,
19252        0xfc0001ff, 0xa0000018, 0                      , 0,
19253        CP1_                },        /* POOL32F_0~*(3) */
19254     { pool                , RINT_fmt            , 2   , 32,
19255        0xfc0001ff, 0xa0000020, 0                      , 0,
19256        CP1_                },        /* RINT.fmt */
19257     { reserved_block      , 0                   , 0   , 32,
19258        0xfc0001ff, 0xa0000028, 0                      , 0,
19259        CP1_                },        /* POOL32F_0~*(5) */
19260     { pool                , ADD_fmt0            , 2   , 32,
19261        0xfc0001ff, 0xa0000030, 0                      , 0,
19262        CP1_                },        /* ADD.fmt0 */
19263     { pool                , SELEQZ_fmt          , 2   , 32,
19264        0xfc0001ff, 0xa0000038, 0                      , 0,
19265        CP1_                },        /* SELEQZ.fmt */
19266     { reserved_block      , 0                   , 0   , 32,
19267        0xfc0001ff, 0xa0000040, 0                      , 0,
19268        CP1_                },        /* POOL32F_0~*(8) */
19269     { reserved_block      , 0                   , 0   , 32,
19270        0xfc0001ff, 0xa0000048, 0                      , 0,
19271        CP1_                },        /* POOL32F_0~*(9) */
19272     { reserved_block      , 0                   , 0   , 32,
19273        0xfc0001ff, 0xa0000050, 0                      , 0,
19274        CP1_                },        /* POOL32F_0~*(10) */
19275     { reserved_block      , 0                   , 0   , 32,
19276        0xfc0001ff, 0xa0000058, 0                      , 0,
19277        CP1_                },        /* POOL32F_0~*(11) */
19278     { pool                , CLASS_fmt           , 2   , 32,
19279        0xfc0001ff, 0xa0000060, 0                      , 0,
19280        CP1_                },        /* CLASS.fmt */
19281     { reserved_block      , 0                   , 0   , 32,
19282        0xfc0001ff, 0xa0000068, 0                      , 0,
19283        CP1_                },        /* POOL32F_0~*(13) */
19284     { pool                , SUB_fmt0            , 2   , 32,
19285        0xfc0001ff, 0xa0000070, 0                      , 0,
19286        CP1_                },        /* SUB.fmt0 */
19287     { pool                , SELNEZ_fmt          , 2   , 32,
19288        0xfc0001ff, 0xa0000078, 0                      , 0,
19289        CP1_                },        /* SELNEZ.fmt */
19290     { reserved_block      , 0                   , 0   , 32,
19291        0xfc0001ff, 0xa0000080, 0                      , 0,
19292        CP1_                },        /* POOL32F_0~*(16) */
19293     { reserved_block      , 0                   , 0   , 32,
19294        0xfc0001ff, 0xa0000088, 0                      , 0,
19295        CP1_                },        /* POOL32F_0~*(17) */
19296     { reserved_block      , 0                   , 0   , 32,
19297        0xfc0001ff, 0xa0000090, 0                      , 0,
19298        CP1_                },        /* POOL32F_0~*(18) */
19299     { reserved_block      , 0                   , 0   , 32,
19300        0xfc0001ff, 0xa0000098, 0                      , 0,
19301        CP1_                },        /* POOL32F_0~*(19) */
19302     { reserved_block      , 0                   , 0   , 32,
19303        0xfc0001ff, 0xa00000a0, 0                      , 0,
19304        CP1_                },        /* POOL32F_0~*(20) */
19305     { reserved_block      , 0                   , 0   , 32,
19306        0xfc0001ff, 0xa00000a8, 0                      , 0,
19307        CP1_                },        /* POOL32F_0~*(21) */
19308     { pool                , MUL_fmt0            , 2   , 32,
19309        0xfc0001ff, 0xa00000b0, 0                      , 0,
19310        CP1_                },        /* MUL.fmt0 */
19311     { pool                , SEL_fmt             , 2   , 32,
19312        0xfc0001ff, 0xa00000b8, 0                      , 0,
19313        CP1_                },        /* SEL.fmt */
19314     { reserved_block      , 0                   , 0   , 32,
19315        0xfc0001ff, 0xa00000c0, 0                      , 0,
19316        CP1_                },        /* POOL32F_0~*(24) */
19317     { reserved_block      , 0                   , 0   , 32,
19318        0xfc0001ff, 0xa00000c8, 0                      , 0,
19319        CP1_                },        /* POOL32F_0~*(25) */
19320     { reserved_block      , 0                   , 0   , 32,
19321        0xfc0001ff, 0xa00000d0, 0                      , 0,
19322        CP1_                },        /* POOL32F_0~*(26) */
19323     { reserved_block      , 0                   , 0   , 32,
19324        0xfc0001ff, 0xa00000d8, 0                      , 0,
19325        CP1_                },        /* POOL32F_0~*(27) */
19326     { reserved_block      , 0                   , 0   , 32,
19327        0xfc0001ff, 0xa00000e0, 0                      , 0,
19328        CP1_                },        /* POOL32F_0~*(28) */
19329     { reserved_block      , 0                   , 0   , 32,
19330        0xfc0001ff, 0xa00000e8, 0                      , 0,
19331        CP1_                },        /* POOL32F_0~*(29) */
19332     { pool                , DIV_fmt0            , 2   , 32,
19333        0xfc0001ff, 0xa00000f0, 0                      , 0,
19334        CP1_                },        /* DIV.fmt0 */
19335     { reserved_block      , 0                   , 0   , 32,
19336        0xfc0001ff, 0xa00000f8, 0                      , 0,
19337        CP1_                },        /* POOL32F_0~*(31) */
19338     { reserved_block      , 0                   , 0   , 32,
19339        0xfc0001ff, 0xa0000100, 0                      , 0,
19340        CP1_                },        /* POOL32F_0~*(32) */
19341     { reserved_block      , 0                   , 0   , 32,
19342        0xfc0001ff, 0xa0000108, 0                      , 0,
19343        CP1_                },        /* POOL32F_0~*(33) */
19344     { reserved_block      , 0                   , 0   , 32,
19345        0xfc0001ff, 0xa0000110, 0                      , 0,
19346        CP1_                },        /* POOL32F_0~*(34) */
19347     { reserved_block      , 0                   , 0   , 32,
19348        0xfc0001ff, 0xa0000118, 0                      , 0,
19349        CP1_                },        /* POOL32F_0~*(35) */
19350     { reserved_block      , 0                   , 0   , 32,
19351        0xfc0001ff, 0xa0000120, 0                      , 0,
19352        CP1_                },        /* POOL32F_0~*(36) */
19353     { reserved_block      , 0                   , 0   , 32,
19354        0xfc0001ff, 0xa0000128, 0                      , 0,
19355        CP1_                },        /* POOL32F_0~*(37) */
19356     { pool                , ADD_fmt1            , 2   , 32,
19357        0xfc0001ff, 0xa0000130, 0                      , 0,
19358        CP1_                },        /* ADD.fmt1 */
19359     { reserved_block      , 0                   , 0   , 32,
19360        0xfc0001ff, 0xa0000138, 0                      , 0,
19361        CP1_                },        /* POOL32F_0~*(39) */
19362     { reserved_block      , 0                   , 0   , 32,
19363        0xfc0001ff, 0xa0000140, 0                      , 0,
19364        CP1_                },        /* POOL32F_0~*(40) */
19365     { reserved_block      , 0                   , 0   , 32,
19366        0xfc0001ff, 0xa0000148, 0                      , 0,
19367        CP1_                },        /* POOL32F_0~*(41) */
19368     { reserved_block      , 0                   , 0   , 32,
19369        0xfc0001ff, 0xa0000150, 0                      , 0,
19370        CP1_                },        /* POOL32F_0~*(42) */
19371     { reserved_block      , 0                   , 0   , 32,
19372        0xfc0001ff, 0xa0000158, 0                      , 0,
19373        CP1_                },        /* POOL32F_0~*(43) */
19374     { reserved_block      , 0                   , 0   , 32,
19375        0xfc0001ff, 0xa0000160, 0                      , 0,
19376        CP1_                },        /* POOL32F_0~*(44) */
19377     { reserved_block      , 0                   , 0   , 32,
19378        0xfc0001ff, 0xa0000168, 0                      , 0,
19379        CP1_                },        /* POOL32F_0~*(45) */
19380     { pool                , SUB_fmt1            , 2   , 32,
19381        0xfc0001ff, 0xa0000170, 0                      , 0,
19382        CP1_                },        /* SUB.fmt1 */
19383     { reserved_block      , 0                   , 0   , 32,
19384        0xfc0001ff, 0xa0000178, 0                      , 0,
19385        CP1_                },        /* POOL32F_0~*(47) */
19386     { reserved_block      , 0                   , 0   , 32,
19387        0xfc0001ff, 0xa0000180, 0                      , 0,
19388        CP1_                },        /* POOL32F_0~*(48) */
19389     { reserved_block      , 0                   , 0   , 32,
19390        0xfc0001ff, 0xa0000188, 0                      , 0,
19391        CP1_                },        /* POOL32F_0~*(49) */
19392     { reserved_block      , 0                   , 0   , 32,
19393        0xfc0001ff, 0xa0000190, 0                      , 0,
19394        CP1_                },        /* POOL32F_0~*(50) */
19395     { reserved_block      , 0                   , 0   , 32,
19396        0xfc0001ff, 0xa0000198, 0                      , 0,
19397        CP1_                },        /* POOL32F_0~*(51) */
19398     { reserved_block      , 0                   , 0   , 32,
19399        0xfc0001ff, 0xa00001a0, 0                      , 0,
19400        CP1_                },        /* POOL32F_0~*(52) */
19401     { reserved_block      , 0                   , 0   , 32,
19402        0xfc0001ff, 0xa00001a8, 0                      , 0,
19403        CP1_                },        /* POOL32F_0~*(53) */
19404     { pool                , MUL_fmt1            , 2   , 32,
19405        0xfc0001ff, 0xa00001b0, 0                      , 0,
19406        CP1_                },        /* MUL.fmt1 */
19407     { pool                , MADDF_fmt           , 2   , 32,
19408        0xfc0001ff, 0xa00001b8, 0                      , 0,
19409        CP1_                },        /* MADDF.fmt */
19410     { reserved_block      , 0                   , 0   , 32,
19411        0xfc0001ff, 0xa00001c0, 0                      , 0,
19412        CP1_                },        /* POOL32F_0~*(56) */
19413     { reserved_block      , 0                   , 0   , 32,
19414        0xfc0001ff, 0xa00001c8, 0                      , 0,
19415        CP1_                },        /* POOL32F_0~*(57) */
19416     { reserved_block      , 0                   , 0   , 32,
19417        0xfc0001ff, 0xa00001d0, 0                      , 0,
19418        CP1_                },        /* POOL32F_0~*(58) */
19419     { reserved_block      , 0                   , 0   , 32,
19420        0xfc0001ff, 0xa00001d8, 0                      , 0,
19421        CP1_                },        /* POOL32F_0~*(59) */
19422     { reserved_block      , 0                   , 0   , 32,
19423        0xfc0001ff, 0xa00001e0, 0                      , 0,
19424        CP1_                },        /* POOL32F_0~*(60) */
19425     { reserved_block      , 0                   , 0   , 32,
19426        0xfc0001ff, 0xa00001e8, 0                      , 0,
19427        CP1_                },        /* POOL32F_0~*(61) */
19428     { pool                , DIV_fmt1            , 2   , 32,
19429        0xfc0001ff, 0xa00001f0, 0                      , 0,
19430        CP1_                },        /* DIV.fmt1 */
19431     { pool                , MSUBF_fmt           , 2   , 32,
19432        0xfc0001ff, 0xa00001f8, 0                      , 0,
19433        CP1_                },        /* MSUBF.fmt */
19434 };
19435
19436
19437 NMD::Pool NMD::MIN_fmt[2] = {
19438     { instruction         , 0                   , 0   , 32,
19439        0xfc00023f, 0xa0000003, &NMD::MIN_S            , 0,
19440        CP1_                },        /* MIN.S */
19441     { instruction         , 0                   , 0   , 32,
19442        0xfc00023f, 0xa0000203, &NMD::MIN_D            , 0,
19443        CP1_                },        /* MIN.D */
19444 };
19445
19446
19447 NMD::Pool NMD::MAX_fmt[2] = {
19448     { instruction         , 0                   , 0   , 32,
19449        0xfc00023f, 0xa000000b, &NMD::MAX_S            , 0,
19450        CP1_                },        /* MAX.S */
19451     { instruction         , 0                   , 0   , 32,
19452        0xfc00023f, 0xa000020b, &NMD::MAX_D            , 0,
19453        CP1_                },        /* MAX.D */
19454 };
19455
19456
19457 NMD::Pool NMD::MINA_fmt[2] = {
19458     { instruction         , 0                   , 0   , 32,
19459        0xfc00023f, 0xa0000023, &NMD::MINA_S           , 0,
19460        CP1_                },        /* MINA.S */
19461     { instruction         , 0                   , 0   , 32,
19462        0xfc00023f, 0xa0000223, &NMD::MINA_D           , 0,
19463        CP1_                },        /* MINA.D */
19464 };
19465
19466
19467 NMD::Pool NMD::MAXA_fmt[2] = {
19468     { instruction         , 0                   , 0   , 32,
19469        0xfc00023f, 0xa000002b, &NMD::MAXA_S           , 0,
19470        CP1_                },        /* MAXA.S */
19471     { instruction         , 0                   , 0   , 32,
19472        0xfc00023f, 0xa000022b, &NMD::MAXA_D           , 0,
19473        CP1_                },        /* MAXA.D */
19474 };
19475
19476
19477 NMD::Pool NMD::CVT_L_fmt[2] = {
19478     { instruction         , 0                   , 0   , 32,
19479        0xfc007fff, 0xa000013b, &NMD::CVT_L_S          , 0,
19480        CP1_                },        /* CVT.L.S */
19481     { instruction         , 0                   , 0   , 32,
19482        0xfc007fff, 0xa000413b, &NMD::CVT_L_D          , 0,
19483        CP1_                },        /* CVT.L.D */
19484 };
19485
19486
19487 NMD::Pool NMD::RSQRT_fmt[2] = {
19488     { instruction         , 0                   , 0   , 32,
19489        0xfc007fff, 0xa000023b, &NMD::RSQRT_S          , 0,
19490        CP1_                },        /* RSQRT.S */
19491     { instruction         , 0                   , 0   , 32,
19492        0xfc007fff, 0xa000423b, &NMD::RSQRT_D          , 0,
19493        CP1_                },        /* RSQRT.D */
19494 };
19495
19496
19497 NMD::Pool NMD::FLOOR_L_fmt[2] = {
19498     { instruction         , 0                   , 0   , 32,
19499        0xfc007fff, 0xa000033b, &NMD::FLOOR_L_S        , 0,
19500        CP1_                },        /* FLOOR.L.S */
19501     { instruction         , 0                   , 0   , 32,
19502        0xfc007fff, 0xa000433b, &NMD::FLOOR_L_D        , 0,
19503        CP1_                },        /* FLOOR.L.D */
19504 };
19505
19506
19507 NMD::Pool NMD::CVT_W_fmt[2] = {
19508     { instruction         , 0                   , 0   , 32,
19509        0xfc007fff, 0xa000093b, &NMD::CVT_W_S          , 0,
19510        CP1_                },        /* CVT.W.S */
19511     { instruction         , 0                   , 0   , 32,
19512        0xfc007fff, 0xa000493b, &NMD::CVT_W_D          , 0,
19513        CP1_                },        /* CVT.W.D */
19514 };
19515
19516
19517 NMD::Pool NMD::SQRT_fmt[2] = {
19518     { instruction         , 0                   , 0   , 32,
19519        0xfc007fff, 0xa0000a3b, &NMD::SQRT_S           , 0,
19520        CP1_                },        /* SQRT.S */
19521     { instruction         , 0                   , 0   , 32,
19522        0xfc007fff, 0xa0004a3b, &NMD::SQRT_D           , 0,
19523        CP1_                },        /* SQRT.D */
19524 };
19525
19526
19527 NMD::Pool NMD::FLOOR_W_fmt[2] = {
19528     { instruction         , 0                   , 0   , 32,
19529        0xfc007fff, 0xa0000b3b, &NMD::FLOOR_W_S        , 0,
19530        CP1_                },        /* FLOOR.W.S */
19531     { instruction         , 0                   , 0   , 32,
19532        0xfc007fff, 0xa0004b3b, &NMD::FLOOR_W_D        , 0,
19533        CP1_                },        /* FLOOR.W.D */
19534 };
19535
19536
19537 NMD::Pool NMD::RECIP_fmt[2] = {
19538     { instruction         , 0                   , 0   , 32,
19539        0xfc007fff, 0xa000123b, &NMD::RECIP_S          , 0,
19540        CP1_                },        /* RECIP.S */
19541     { instruction         , 0                   , 0   , 32,
19542        0xfc007fff, 0xa000523b, &NMD::RECIP_D          , 0,
19543        CP1_                },        /* RECIP.D */
19544 };
19545
19546
19547 NMD::Pool NMD::CEIL_L_fmt[2] = {
19548     { instruction         , 0                   , 0   , 32,
19549        0xfc007fff, 0xa000133b, &NMD::CEIL_L_S         , 0,
19550        CP1_                },        /* CEIL.L.S */
19551     { instruction         , 0                   , 0   , 32,
19552        0xfc007fff, 0xa000533b, &NMD::CEIL_L_D         , 0,
19553        CP1_                },        /* CEIL.L.D */
19554 };
19555
19556
19557 NMD::Pool NMD::CEIL_W_fmt[2] = {
19558     { instruction         , 0                   , 0   , 32,
19559        0xfc007fff, 0xa0001b3b, &NMD::CEIL_W_S         , 0,
19560        CP1_                },        /* CEIL.W.S */
19561     { instruction         , 0                   , 0   , 32,
19562        0xfc007fff, 0xa0005b3b, &NMD::CEIL_W_D         , 0,
19563        CP1_                },        /* CEIL.W.D */
19564 };
19565
19566
19567 NMD::Pool NMD::TRUNC_L_fmt[2] = {
19568     { instruction         , 0                   , 0   , 32,
19569        0xfc007fff, 0xa000233b, &NMD::TRUNC_L_S        , 0,
19570        CP1_                },        /* TRUNC.L.S */
19571     { instruction         , 0                   , 0   , 32,
19572        0xfc007fff, 0xa000633b, &NMD::TRUNC_L_D        , 0,
19573        CP1_                },        /* TRUNC.L.D */
19574 };
19575
19576
19577 NMD::Pool NMD::TRUNC_W_fmt[2] = {
19578     { instruction         , 0                   , 0   , 32,
19579        0xfc007fff, 0xa0002b3b, &NMD::TRUNC_W_S        , 0,
19580        CP1_                },        /* TRUNC.W.S */
19581     { instruction         , 0                   , 0   , 32,
19582        0xfc007fff, 0xa0006b3b, &NMD::TRUNC_W_D        , 0,
19583        CP1_                },        /* TRUNC.W.D */
19584 };
19585
19586
19587 NMD::Pool NMD::ROUND_L_fmt[2] = {
19588     { instruction         , 0                   , 0   , 32,
19589        0xfc007fff, 0xa000333b, &NMD::ROUND_L_S        , 0,
19590        CP1_                },        /* ROUND.L.S */
19591     { instruction         , 0                   , 0   , 32,
19592        0xfc007fff, 0xa000733b, &NMD::ROUND_L_D        , 0,
19593        CP1_                },        /* ROUND.L.D */
19594 };
19595
19596
19597 NMD::Pool NMD::ROUND_W_fmt[2] = {
19598     { instruction         , 0                   , 0   , 32,
19599        0xfc007fff, 0xa0003b3b, &NMD::ROUND_W_S        , 0,
19600        CP1_                },        /* ROUND.W.S */
19601     { instruction         , 0                   , 0   , 32,
19602        0xfc007fff, 0xa0007b3b, &NMD::ROUND_W_D        , 0,
19603        CP1_                },        /* ROUND.W.D */
19604 };
19605
19606
19607 NMD::Pool NMD::POOL32Fxf_0[64] = {
19608     { reserved_block      , 0                   , 0   , 32,
19609        0xfc003fff, 0xa000003b, 0                      , 0,
19610        CP1_                },        /* POOL32Fxf_0~*(0) */
19611     { pool                , CVT_L_fmt           , 2   , 32,
19612        0xfc003fff, 0xa000013b, 0                      , 0,
19613        CP1_                },        /* CVT.L.fmt */
19614     { pool                , RSQRT_fmt           , 2   , 32,
19615        0xfc003fff, 0xa000023b, 0                      , 0,
19616        CP1_                },        /* RSQRT.fmt */
19617     { pool                , FLOOR_L_fmt         , 2   , 32,
19618        0xfc003fff, 0xa000033b, 0                      , 0,
19619        CP1_                },        /* FLOOR.L.fmt */
19620     { reserved_block      , 0                   , 0   , 32,
19621        0xfc003fff, 0xa000043b, 0                      , 0,
19622        CP1_                },        /* POOL32Fxf_0~*(4) */
19623     { reserved_block      , 0                   , 0   , 32,
19624        0xfc003fff, 0xa000053b, 0                      , 0,
19625        CP1_                },        /* POOL32Fxf_0~*(5) */
19626     { reserved_block      , 0                   , 0   , 32,
19627        0xfc003fff, 0xa000063b, 0                      , 0,
19628        CP1_                },        /* POOL32Fxf_0~*(6) */
19629     { reserved_block      , 0                   , 0   , 32,
19630        0xfc003fff, 0xa000073b, 0                      , 0,
19631        CP1_                },        /* POOL32Fxf_0~*(7) */
19632     { reserved_block      , 0                   , 0   , 32,
19633        0xfc003fff, 0xa000083b, 0                      , 0,
19634        CP1_                },        /* POOL32Fxf_0~*(8) */
19635     { pool                , CVT_W_fmt           , 2   , 32,
19636        0xfc003fff, 0xa000093b, 0                      , 0,
19637        CP1_                },        /* CVT.W.fmt */
19638     { pool                , SQRT_fmt            , 2   , 32,
19639        0xfc003fff, 0xa0000a3b, 0                      , 0,
19640        CP1_                },        /* SQRT.fmt */
19641     { pool                , FLOOR_W_fmt         , 2   , 32,
19642        0xfc003fff, 0xa0000b3b, 0                      , 0,
19643        CP1_                },        /* FLOOR.W.fmt */
19644     { reserved_block      , 0                   , 0   , 32,
19645        0xfc003fff, 0xa0000c3b, 0                      , 0,
19646        CP1_                },        /* POOL32Fxf_0~*(12) */
19647     { reserved_block      , 0                   , 0   , 32,
19648        0xfc003fff, 0xa0000d3b, 0                      , 0,
19649        CP1_                },        /* POOL32Fxf_0~*(13) */
19650     { reserved_block      , 0                   , 0   , 32,
19651        0xfc003fff, 0xa0000e3b, 0                      , 0,
19652        CP1_                },        /* POOL32Fxf_0~*(14) */
19653     { reserved_block      , 0                   , 0   , 32,
19654        0xfc003fff, 0xa0000f3b, 0                      , 0,
19655        CP1_                },        /* POOL32Fxf_0~*(15) */
19656     { instruction         , 0                   , 0   , 32,
19657        0xfc003fff, 0xa000103b, &NMD::CFC1             , 0,
19658        CP1_                },        /* CFC1 */
19659     { reserved_block      , 0                   , 0   , 32,
19660        0xfc003fff, 0xa000113b, 0                      , 0,
19661        CP1_                },        /* POOL32Fxf_0~*(17) */
19662     { pool                , RECIP_fmt           , 2   , 32,
19663        0xfc003fff, 0xa000123b, 0                      , 0,
19664        CP1_                },        /* RECIP.fmt */
19665     { pool                , CEIL_L_fmt          , 2   , 32,
19666        0xfc003fff, 0xa000133b, 0                      , 0,
19667        CP1_                },        /* CEIL.L.fmt */
19668     { reserved_block      , 0                   , 0   , 32,
19669        0xfc003fff, 0xa000143b, 0                      , 0,
19670        CP1_                },        /* POOL32Fxf_0~*(20) */
19671     { reserved_block      , 0                   , 0   , 32,
19672        0xfc003fff, 0xa000153b, 0                      , 0,
19673        CP1_                },        /* POOL32Fxf_0~*(21) */
19674     { reserved_block      , 0                   , 0   , 32,
19675        0xfc003fff, 0xa000163b, 0                      , 0,
19676        CP1_                },        /* POOL32Fxf_0~*(22) */
19677     { reserved_block      , 0                   , 0   , 32,
19678        0xfc003fff, 0xa000173b, 0                      , 0,
19679        CP1_                },        /* POOL32Fxf_0~*(23) */
19680     { instruction         , 0                   , 0   , 32,
19681        0xfc003fff, 0xa000183b, &NMD::CTC1             , 0,
19682        CP1_                },        /* CTC1 */
19683     { reserved_block      , 0                   , 0   , 32,
19684        0xfc003fff, 0xa000193b, 0                      , 0,
19685        CP1_                },        /* POOL32Fxf_0~*(25) */
19686     { reserved_block      , 0                   , 0   , 32,
19687        0xfc003fff, 0xa0001a3b, 0                      , 0,
19688        CP1_                },        /* POOL32Fxf_0~*(26) */
19689     { pool                , CEIL_W_fmt          , 2   , 32,
19690        0xfc003fff, 0xa0001b3b, 0                      , 0,
19691        CP1_                },        /* CEIL.W.fmt */
19692     { reserved_block      , 0                   , 0   , 32,
19693        0xfc003fff, 0xa0001c3b, 0                      , 0,
19694        CP1_                },        /* POOL32Fxf_0~*(28) */
19695     { reserved_block      , 0                   , 0   , 32,
19696        0xfc003fff, 0xa0001d3b, 0                      , 0,
19697        CP1_                },        /* POOL32Fxf_0~*(29) */
19698     { reserved_block      , 0                   , 0   , 32,
19699        0xfc003fff, 0xa0001e3b, 0                      , 0,
19700        CP1_                },        /* POOL32Fxf_0~*(30) */
19701     { reserved_block      , 0                   , 0   , 32,
19702        0xfc003fff, 0xa0001f3b, 0                      , 0,
19703        CP1_                },        /* POOL32Fxf_0~*(31) */
19704     { instruction         , 0                   , 0   , 32,
19705        0xfc003fff, 0xa000203b, &NMD::MFC1             , 0,
19706        CP1_                },        /* MFC1 */
19707     { instruction         , 0                   , 0   , 32,
19708        0xfc003fff, 0xa000213b, &NMD::CVT_S_PL         , 0,
19709        CP1_                },        /* CVT.S.PL */
19710     { reserved_block      , 0                   , 0   , 32,
19711        0xfc003fff, 0xa000223b, 0                      , 0,
19712        CP1_                },        /* POOL32Fxf_0~*(34) */
19713     { pool                , TRUNC_L_fmt         , 2   , 32,
19714        0xfc003fff, 0xa000233b, 0                      , 0,
19715        CP1_                },        /* TRUNC.L.fmt */
19716     { instruction         , 0                   , 0   , 32,
19717        0xfc003fff, 0xa000243b, &NMD::DMFC1            , 0,
19718        CP1_ | MIPS64_      },        /* DMFC1 */
19719     { reserved_block      , 0                   , 0   , 32,
19720        0xfc003fff, 0xa000253b, 0                      , 0,
19721        CP1_                },        /* POOL32Fxf_0~*(37) */
19722     { reserved_block      , 0                   , 0   , 32,
19723        0xfc003fff, 0xa000263b, 0                      , 0,
19724        CP1_                },        /* POOL32Fxf_0~*(38) */
19725     { reserved_block      , 0                   , 0   , 32,
19726        0xfc003fff, 0xa000273b, 0                      , 0,
19727        CP1_                },        /* POOL32Fxf_0~*(39) */
19728     { instruction         , 0                   , 0   , 32,
19729        0xfc003fff, 0xa000283b, &NMD::MTC1             , 0,
19730        CP1_                },        /* MTC1 */
19731     { instruction         , 0                   , 0   , 32,
19732        0xfc003fff, 0xa000293b, &NMD::CVT_S_PU         , 0,
19733        CP1_                },        /* CVT.S.PU */
19734     { reserved_block      , 0                   , 0   , 32,
19735        0xfc003fff, 0xa0002a3b, 0                      , 0,
19736        CP1_                },        /* POOL32Fxf_0~*(42) */
19737     { pool                , TRUNC_W_fmt         , 2   , 32,
19738        0xfc003fff, 0xa0002b3b, 0                      , 0,
19739        CP1_                },        /* TRUNC.W.fmt */
19740     { instruction         , 0                   , 0   , 32,
19741        0xfc003fff, 0xa0002c3b, &NMD::DMTC1            , 0,
19742        CP1_ | MIPS64_      },        /* DMTC1 */
19743     { reserved_block      , 0                   , 0   , 32,
19744        0xfc003fff, 0xa0002d3b, 0                      , 0,
19745        CP1_                },        /* POOL32Fxf_0~*(45) */
19746     { reserved_block      , 0                   , 0   , 32,
19747        0xfc003fff, 0xa0002e3b, 0                      , 0,
19748        CP1_                },        /* POOL32Fxf_0~*(46) */
19749     { reserved_block      , 0                   , 0   , 32,
19750        0xfc003fff, 0xa0002f3b, 0                      , 0,
19751        CP1_                },        /* POOL32Fxf_0~*(47) */
19752     { instruction         , 0                   , 0   , 32,
19753        0xfc003fff, 0xa000303b, &NMD::MFHC1            , 0,
19754        CP1_                },        /* MFHC1 */
19755     { reserved_block      , 0                   , 0   , 32,
19756        0xfc003fff, 0xa000313b, 0                      , 0,
19757        CP1_                },        /* POOL32Fxf_0~*(49) */
19758     { reserved_block      , 0                   , 0   , 32,
19759        0xfc003fff, 0xa000323b, 0                      , 0,
19760        CP1_                },        /* POOL32Fxf_0~*(50) */
19761     { pool                , ROUND_L_fmt         , 2   , 32,
19762        0xfc003fff, 0xa000333b, 0                      , 0,
19763        CP1_                },        /* ROUND.L.fmt */
19764     { reserved_block      , 0                   , 0   , 32,
19765        0xfc003fff, 0xa000343b, 0                      , 0,
19766        CP1_                },        /* POOL32Fxf_0~*(52) */
19767     { reserved_block      , 0                   , 0   , 32,
19768        0xfc003fff, 0xa000353b, 0                      , 0,
19769        CP1_                },        /* POOL32Fxf_0~*(53) */
19770     { reserved_block      , 0                   , 0   , 32,
19771        0xfc003fff, 0xa000363b, 0                      , 0,
19772        CP1_                },        /* POOL32Fxf_0~*(54) */
19773     { reserved_block      , 0                   , 0   , 32,
19774        0xfc003fff, 0xa000373b, 0                      , 0,
19775        CP1_                },        /* POOL32Fxf_0~*(55) */
19776     { instruction         , 0                   , 0   , 32,
19777        0xfc003fff, 0xa000383b, &NMD::MTHC1            , 0,
19778        CP1_                },        /* MTHC1 */
19779     { reserved_block      , 0                   , 0   , 32,
19780        0xfc003fff, 0xa000393b, 0                      , 0,
19781        CP1_                },        /* POOL32Fxf_0~*(57) */
19782     { reserved_block      , 0                   , 0   , 32,
19783        0xfc003fff, 0xa0003a3b, 0                      , 0,
19784        CP1_                },        /* POOL32Fxf_0~*(58) */
19785     { pool                , ROUND_W_fmt         , 2   , 32,
19786        0xfc003fff, 0xa0003b3b, 0                      , 0,
19787        CP1_                },        /* ROUND.W.fmt */
19788     { reserved_block      , 0                   , 0   , 32,
19789        0xfc003fff, 0xa0003c3b, 0                      , 0,
19790        CP1_                },        /* POOL32Fxf_0~*(60) */
19791     { reserved_block      , 0                   , 0   , 32,
19792        0xfc003fff, 0xa0003d3b, 0                      , 0,
19793        CP1_                },        /* POOL32Fxf_0~*(61) */
19794     { reserved_block      , 0                   , 0   , 32,
19795        0xfc003fff, 0xa0003e3b, 0                      , 0,
19796        CP1_                },        /* POOL32Fxf_0~*(62) */
19797     { reserved_block      , 0                   , 0   , 32,
19798        0xfc003fff, 0xa0003f3b, 0                      , 0,
19799        CP1_                },        /* POOL32Fxf_0~*(63) */
19800 };
19801
19802
19803 NMD::Pool NMD::MOV_fmt[4] = {
19804     { instruction         , 0                   , 0   , 32,
19805        0xfc007fff, 0xa000007b, &NMD::MOV_S            , 0,
19806        CP1_                },        /* MOV.S */
19807     { instruction         , 0                   , 0   , 32,
19808        0xfc007fff, 0xa000207b, &NMD::MOV_D            , 0,
19809        CP1_                },        /* MOV.D */
19810     { reserved_block      , 0                   , 0   , 32,
19811        0xfc007fff, 0xa000407b, 0                      , 0,
19812        CP1_                },        /* MOV.fmt~*(2) */
19813     { reserved_block      , 0                   , 0   , 32,
19814        0xfc007fff, 0xa000607b, 0                      , 0,
19815        CP1_                },        /* MOV.fmt~*(3) */
19816 };
19817
19818
19819 NMD::Pool NMD::ABS_fmt[4] = {
19820     { instruction         , 0                   , 0   , 32,
19821        0xfc007fff, 0xa000037b, &NMD::ABS_S            , 0,
19822        CP1_                },        /* ABS.S */
19823     { instruction         , 0                   , 0   , 32,
19824        0xfc007fff, 0xa000237b, &NMD::ABS_D            , 0,
19825        CP1_                },        /* ABS.D */
19826     { reserved_block      , 0                   , 0   , 32,
19827        0xfc007fff, 0xa000437b, 0                      , 0,
19828        CP1_                },        /* ABS.fmt~*(2) */
19829     { reserved_block      , 0                   , 0   , 32,
19830        0xfc007fff, 0xa000637b, 0                      , 0,
19831        CP1_                },        /* ABS.fmt~*(3) */
19832 };
19833
19834
19835 NMD::Pool NMD::NEG_fmt[4] = {
19836     { instruction         , 0                   , 0   , 32,
19837        0xfc007fff, 0xa0000b7b, &NMD::NEG_S            , 0,
19838        CP1_                },        /* NEG.S */
19839     { instruction         , 0                   , 0   , 32,
19840        0xfc007fff, 0xa0002b7b, &NMD::NEG_D            , 0,
19841        CP1_                },        /* NEG.D */
19842     { reserved_block      , 0                   , 0   , 32,
19843        0xfc007fff, 0xa0004b7b, 0                      , 0,
19844        CP1_                },        /* NEG.fmt~*(2) */
19845     { reserved_block      , 0                   , 0   , 32,
19846        0xfc007fff, 0xa0006b7b, 0                      , 0,
19847        CP1_                },        /* NEG.fmt~*(3) */
19848 };
19849
19850
19851 NMD::Pool NMD::CVT_D_fmt[4] = {
19852     { instruction         , 0                   , 0   , 32,
19853        0xfc007fff, 0xa000137b, &NMD::CVT_D_S          , 0,
19854        CP1_                },        /* CVT.D.S */
19855     { instruction         , 0                   , 0   , 32,
19856        0xfc007fff, 0xa000337b, &NMD::CVT_D_W          , 0,
19857        CP1_                },        /* CVT.D.W */
19858     { instruction         , 0                   , 0   , 32,
19859        0xfc007fff, 0xa000537b, &NMD::CVT_D_L          , 0,
19860        CP1_                },        /* CVT.D.L */
19861     { reserved_block      , 0                   , 0   , 32,
19862        0xfc007fff, 0xa000737b, 0                      , 0,
19863        CP1_                },        /* CVT.D.fmt~*(3) */
19864 };
19865
19866
19867 NMD::Pool NMD::CVT_S_fmt[4] = {
19868     { instruction         , 0                   , 0   , 32,
19869        0xfc007fff, 0xa0001b7b, &NMD::CVT_S_D          , 0,
19870        CP1_                },        /* CVT.S.D */
19871     { instruction         , 0                   , 0   , 32,
19872        0xfc007fff, 0xa0003b7b, &NMD::CVT_S_W          , 0,
19873        CP1_                },        /* CVT.S.W */
19874     { instruction         , 0                   , 0   , 32,
19875        0xfc007fff, 0xa0005b7b, &NMD::CVT_S_L          , 0,
19876        CP1_                },        /* CVT.S.L */
19877     { reserved_block      , 0                   , 0   , 32,
19878        0xfc007fff, 0xa0007b7b, 0                      , 0,
19879        CP1_                },        /* CVT.S.fmt~*(3) */
19880 };
19881
19882
19883 NMD::Pool NMD::POOL32Fxf_1[32] = {
19884     { pool                , MOV_fmt             , 4   , 32,
19885        0xfc001fff, 0xa000007b, 0                      , 0,
19886        CP1_                },        /* MOV.fmt */
19887     { reserved_block      , 0                   , 0   , 32,
19888        0xfc001fff, 0xa000017b, 0                      , 0,
19889        CP1_                },        /* POOL32Fxf_1~*(1) */
19890     { reserved_block      , 0                   , 0   , 32,
19891        0xfc001fff, 0xa000027b, 0                      , 0,
19892        CP1_                },        /* POOL32Fxf_1~*(2) */
19893     { pool                , ABS_fmt             , 4   , 32,
19894        0xfc001fff, 0xa000037b, 0                      , 0,
19895        CP1_                },        /* ABS.fmt */
19896     { reserved_block      , 0                   , 0   , 32,
19897        0xfc001fff, 0xa000047b, 0                      , 0,
19898        CP1_                },        /* POOL32Fxf_1~*(4) */
19899     { reserved_block      , 0                   , 0   , 32,
19900        0xfc001fff, 0xa000057b, 0                      , 0,
19901        CP1_                },        /* POOL32Fxf_1~*(5) */
19902     { reserved_block      , 0                   , 0   , 32,
19903        0xfc001fff, 0xa000067b, 0                      , 0,
19904        CP1_                },        /* POOL32Fxf_1~*(6) */
19905     { reserved_block      , 0                   , 0   , 32,
19906        0xfc001fff, 0xa000077b, 0                      , 0,
19907        CP1_                },        /* POOL32Fxf_1~*(7) */
19908     { reserved_block      , 0                   , 0   , 32,
19909        0xfc001fff, 0xa000087b, 0                      , 0,
19910        CP1_                },        /* POOL32Fxf_1~*(8) */
19911     { reserved_block      , 0                   , 0   , 32,
19912        0xfc001fff, 0xa000097b, 0                      , 0,
19913        CP1_                },        /* POOL32Fxf_1~*(9) */
19914     { reserved_block      , 0                   , 0   , 32,
19915        0xfc001fff, 0xa0000a7b, 0                      , 0,
19916        CP1_                },        /* POOL32Fxf_1~*(10) */
19917     { pool                , NEG_fmt             , 4   , 32,
19918        0xfc001fff, 0xa0000b7b, 0                      , 0,
19919        CP1_                },        /* NEG.fmt */
19920     { reserved_block      , 0                   , 0   , 32,
19921        0xfc001fff, 0xa0000c7b, 0                      , 0,
19922        CP1_                },        /* POOL32Fxf_1~*(12) */
19923     { reserved_block      , 0                   , 0   , 32,
19924        0xfc001fff, 0xa0000d7b, 0                      , 0,
19925        CP1_                },        /* POOL32Fxf_1~*(13) */
19926     { reserved_block      , 0                   , 0   , 32,
19927        0xfc001fff, 0xa0000e7b, 0                      , 0,
19928        CP1_                },        /* POOL32Fxf_1~*(14) */
19929     { reserved_block      , 0                   , 0   , 32,
19930        0xfc001fff, 0xa0000f7b, 0                      , 0,
19931        CP1_                },        /* POOL32Fxf_1~*(15) */
19932     { reserved_block      , 0                   , 0   , 32,
19933        0xfc001fff, 0xa000107b, 0                      , 0,
19934        CP1_                },        /* POOL32Fxf_1~*(16) */
19935     { reserved_block      , 0                   , 0   , 32,
19936        0xfc001fff, 0xa000117b, 0                      , 0,
19937        CP1_                },        /* POOL32Fxf_1~*(17) */
19938     { reserved_block      , 0                   , 0   , 32,
19939        0xfc001fff, 0xa000127b, 0                      , 0,
19940        CP1_                },        /* POOL32Fxf_1~*(18) */
19941     { pool                , CVT_D_fmt           , 4   , 32,
19942        0xfc001fff, 0xa000137b, 0                      , 0,
19943        CP1_                },        /* CVT.D.fmt */
19944     { reserved_block      , 0                   , 0   , 32,
19945        0xfc001fff, 0xa000147b, 0                      , 0,
19946        CP1_                },        /* POOL32Fxf_1~*(20) */
19947     { reserved_block      , 0                   , 0   , 32,
19948        0xfc001fff, 0xa000157b, 0                      , 0,
19949        CP1_                },        /* POOL32Fxf_1~*(21) */
19950     { reserved_block      , 0                   , 0   , 32,
19951        0xfc001fff, 0xa000167b, 0                      , 0,
19952        CP1_                },        /* POOL32Fxf_1~*(22) */
19953     { reserved_block      , 0                   , 0   , 32,
19954        0xfc001fff, 0xa000177b, 0                      , 0,
19955        CP1_                },        /* POOL32Fxf_1~*(23) */
19956     { reserved_block      , 0                   , 0   , 32,
19957        0xfc001fff, 0xa000187b, 0                      , 0,
19958        CP1_                },        /* POOL32Fxf_1~*(24) */
19959     { reserved_block      , 0                   , 0   , 32,
19960        0xfc001fff, 0xa000197b, 0                      , 0,
19961        CP1_                },        /* POOL32Fxf_1~*(25) */
19962     { reserved_block      , 0                   , 0   , 32,
19963        0xfc001fff, 0xa0001a7b, 0                      , 0,
19964        CP1_                },        /* POOL32Fxf_1~*(26) */
19965     { pool                , CVT_S_fmt           , 4   , 32,
19966        0xfc001fff, 0xa0001b7b, 0                      , 0,
19967        CP1_                },        /* CVT.S.fmt */
19968     { reserved_block      , 0                   , 0   , 32,
19969        0xfc001fff, 0xa0001c7b, 0                      , 0,
19970        CP1_                },        /* POOL32Fxf_1~*(28) */
19971     { reserved_block      , 0                   , 0   , 32,
19972        0xfc001fff, 0xa0001d7b, 0                      , 0,
19973        CP1_                },        /* POOL32Fxf_1~*(29) */
19974     { reserved_block      , 0                   , 0   , 32,
19975        0xfc001fff, 0xa0001e7b, 0                      , 0,
19976        CP1_                },        /* POOL32Fxf_1~*(30) */
19977     { reserved_block      , 0                   , 0   , 32,
19978        0xfc001fff, 0xa0001f7b, 0                      , 0,
19979        CP1_                },        /* POOL32Fxf_1~*(31) */
19980 };
19981
19982
19983 NMD::Pool NMD::POOL32Fxf[4] = {
19984     { pool                , POOL32Fxf_0         , 64  , 32,
19985        0xfc0000ff, 0xa000003b, 0                      , 0,
19986        CP1_                },        /* POOL32Fxf_0 */
19987     { pool                , POOL32Fxf_1         , 32  , 32,
19988        0xfc0000ff, 0xa000007b, 0                      , 0,
19989        CP1_                },        /* POOL32Fxf_1 */
19990     { reserved_block      , 0                   , 0   , 32,
19991        0xfc0000ff, 0xa00000bb, 0                      , 0,
19992        CP1_                },        /* POOL32Fxf~*(2) */
19993     { reserved_block      , 0                   , 0   , 32,
19994        0xfc0000ff, 0xa00000fb, 0                      , 0,
19995        CP1_                },        /* POOL32Fxf~*(3) */
19996 };
19997
19998
19999 NMD::Pool NMD::POOL32F_3[8] = {
20000     { pool                , MIN_fmt             , 2   , 32,
20001        0xfc00003f, 0xa0000003, 0                      , 0,
20002        CP1_                },        /* MIN.fmt */
20003     { pool                , MAX_fmt             , 2   , 32,
20004        0xfc00003f, 0xa000000b, 0                      , 0,
20005        CP1_                },        /* MAX.fmt */
20006     { reserved_block      , 0                   , 0   , 32,
20007        0xfc00003f, 0xa0000013, 0                      , 0,
20008        CP1_                },        /* POOL32F_3~*(2) */
20009     { reserved_block      , 0                   , 0   , 32,
20010        0xfc00003f, 0xa000001b, 0                      , 0,
20011        CP1_                },        /* POOL32F_3~*(3) */
20012     { pool                , MINA_fmt            , 2   , 32,
20013        0xfc00003f, 0xa0000023, 0                      , 0,
20014        CP1_                },        /* MINA.fmt */
20015     { pool                , MAXA_fmt            , 2   , 32,
20016        0xfc00003f, 0xa000002b, 0                      , 0,
20017        CP1_                },        /* MAXA.fmt */
20018     { reserved_block      , 0                   , 0   , 32,
20019        0xfc00003f, 0xa0000033, 0                      , 0,
20020        CP1_                },        /* POOL32F_3~*(6) */
20021     { pool                , POOL32Fxf           , 4   , 32,
20022        0xfc00003f, 0xa000003b, 0                      , 0,
20023        CP1_                },        /* POOL32Fxf */
20024 };
20025
20026
20027 NMD::Pool NMD::CMP_condn_S[32] = {
20028     { instruction         , 0                   , 0   , 32,
20029        0xfc0007ff, 0xa0000005, &NMD::CMP_AF_S         , 0,
20030        CP1_                },        /* CMP.AF.S */
20031     { instruction         , 0                   , 0   , 32,
20032        0xfc0007ff, 0xa0000045, &NMD::CMP_UN_S         , 0,
20033        CP1_                },        /* CMP.UN.S */
20034     { instruction         , 0                   , 0   , 32,
20035        0xfc0007ff, 0xa0000085, &NMD::CMP_EQ_S         , 0,
20036        CP1_                },        /* CMP.EQ.S */
20037     { instruction         , 0                   , 0   , 32,
20038        0xfc0007ff, 0xa00000c5, &NMD::CMP_UEQ_S        , 0,
20039        CP1_                },        /* CMP.UEQ.S */
20040     { instruction         , 0                   , 0   , 32,
20041        0xfc0007ff, 0xa0000105, &NMD::CMP_LT_S         , 0,
20042        CP1_                },        /* CMP.LT.S */
20043     { instruction         , 0                   , 0   , 32,
20044        0xfc0007ff, 0xa0000145, &NMD::CMP_ULT_S        , 0,
20045        CP1_                },        /* CMP.ULT.S */
20046     { instruction         , 0                   , 0   , 32,
20047        0xfc0007ff, 0xa0000185, &NMD::CMP_LE_S         , 0,
20048        CP1_                },        /* CMP.LE.S */
20049     { instruction         , 0                   , 0   , 32,
20050        0xfc0007ff, 0xa00001c5, &NMD::CMP_ULE_S        , 0,
20051        CP1_                },        /* CMP.ULE.S */
20052     { instruction         , 0                   , 0   , 32,
20053        0xfc0007ff, 0xa0000205, &NMD::CMP_SAF_S        , 0,
20054        CP1_                },        /* CMP.SAF.S */
20055     { instruction         , 0                   , 0   , 32,
20056        0xfc0007ff, 0xa0000245, &NMD::CMP_SUN_S        , 0,
20057        CP1_                },        /* CMP.SUN.S */
20058     { instruction         , 0                   , 0   , 32,
20059        0xfc0007ff, 0xa0000285, &NMD::CMP_SEQ_S        , 0,
20060        CP1_                },        /* CMP.SEQ.S */
20061     { instruction         , 0                   , 0   , 32,
20062        0xfc0007ff, 0xa00002c5, &NMD::CMP_SUEQ_S       , 0,
20063        CP1_                },        /* CMP.SUEQ.S */
20064     { instruction         , 0                   , 0   , 32,
20065        0xfc0007ff, 0xa0000305, &NMD::CMP_SLT_S        , 0,
20066        CP1_                },        /* CMP.SLT.S */
20067     { instruction         , 0                   , 0   , 32,
20068        0xfc0007ff, 0xa0000345, &NMD::CMP_SULT_S       , 0,
20069        CP1_                },        /* CMP.SULT.S */
20070     { instruction         , 0                   , 0   , 32,
20071        0xfc0007ff, 0xa0000385, &NMD::CMP_SLE_S        , 0,
20072        CP1_                },        /* CMP.SLE.S */
20073     { instruction         , 0                   , 0   , 32,
20074        0xfc0007ff, 0xa00003c5, &NMD::CMP_SULE_S       , 0,
20075        CP1_                },        /* CMP.SULE.S */
20076     { reserved_block      , 0                   , 0   , 32,
20077        0xfc0007ff, 0xa0000405, 0                      , 0,
20078        CP1_                },        /* CMP.condn.S~*(16) */
20079     { instruction         , 0                   , 0   , 32,
20080        0xfc0007ff, 0xa0000445, &NMD::CMP_OR_S         , 0,
20081        CP1_                },        /* CMP.OR.S */
20082     { instruction         , 0                   , 0   , 32,
20083        0xfc0007ff, 0xa0000485, &NMD::CMP_UNE_S        , 0,
20084        CP1_                },        /* CMP.UNE.S */
20085     { instruction         , 0                   , 0   , 32,
20086        0xfc0007ff, 0xa00004c5, &NMD::CMP_NE_S         , 0,
20087        CP1_                },        /* CMP.NE.S */
20088     { reserved_block      , 0                   , 0   , 32,
20089        0xfc0007ff, 0xa0000505, 0                      , 0,
20090        CP1_                },        /* CMP.condn.S~*(20) */
20091     { reserved_block      , 0                   , 0   , 32,
20092        0xfc0007ff, 0xa0000545, 0                      , 0,
20093        CP1_                },        /* CMP.condn.S~*(21) */
20094     { reserved_block      , 0                   , 0   , 32,
20095        0xfc0007ff, 0xa0000585, 0                      , 0,
20096        CP1_                },        /* CMP.condn.S~*(22) */
20097     { reserved_block      , 0                   , 0   , 32,
20098        0xfc0007ff, 0xa00005c5, 0                      , 0,
20099        CP1_                },        /* CMP.condn.S~*(23) */
20100     { reserved_block      , 0                   , 0   , 32,
20101        0xfc0007ff, 0xa0000605, 0                      , 0,
20102        CP1_                },        /* CMP.condn.S~*(24) */
20103     { instruction         , 0                   , 0   , 32,
20104        0xfc0007ff, 0xa0000645, &NMD::CMP_SOR_S        , 0,
20105        CP1_                },        /* CMP.SOR.S */
20106     { instruction         , 0                   , 0   , 32,
20107        0xfc0007ff, 0xa0000685, &NMD::CMP_SUNE_S       , 0,
20108        CP1_                },        /* CMP.SUNE.S */
20109     { instruction         , 0                   , 0   , 32,
20110        0xfc0007ff, 0xa00006c5, &NMD::CMP_SNE_S        , 0,
20111        CP1_                },        /* CMP.SNE.S */
20112     { reserved_block      , 0                   , 0   , 32,
20113        0xfc0007ff, 0xa0000705, 0                      , 0,
20114        CP1_                },        /* CMP.condn.S~*(28) */
20115     { reserved_block      , 0                   , 0   , 32,
20116        0xfc0007ff, 0xa0000745, 0                      , 0,
20117        CP1_                },        /* CMP.condn.S~*(29) */
20118     { reserved_block      , 0                   , 0   , 32,
20119        0xfc0007ff, 0xa0000785, 0                      , 0,
20120        CP1_                },        /* CMP.condn.S~*(30) */
20121     { reserved_block      , 0                   , 0   , 32,
20122        0xfc0007ff, 0xa00007c5, 0                      , 0,
20123        CP1_                },        /* CMP.condn.S~*(31) */
20124 };
20125
20126
20127 NMD::Pool NMD::CMP_condn_D[32] = {
20128     { instruction         , 0                   , 0   , 32,
20129        0xfc0007ff, 0xa0000015, &NMD::CMP_AF_D         , 0,
20130        CP1_                },        /* CMP.AF.D */
20131     { instruction         , 0                   , 0   , 32,
20132        0xfc0007ff, 0xa0000055, &NMD::CMP_UN_D         , 0,
20133        CP1_                },        /* CMP.UN.D */
20134     { instruction         , 0                   , 0   , 32,
20135        0xfc0007ff, 0xa0000095, &NMD::CMP_EQ_D         , 0,
20136        CP1_                },        /* CMP.EQ.D */
20137     { instruction         , 0                   , 0   , 32,
20138        0xfc0007ff, 0xa00000d5, &NMD::CMP_UEQ_D        , 0,
20139        CP1_                },        /* CMP.UEQ.D */
20140     { instruction         , 0                   , 0   , 32,
20141        0xfc0007ff, 0xa0000115, &NMD::CMP_LT_D         , 0,
20142        CP1_                },        /* CMP.LT.D */
20143     { instruction         , 0                   , 0   , 32,
20144        0xfc0007ff, 0xa0000155, &NMD::CMP_ULT_D        , 0,
20145        CP1_                },        /* CMP.ULT.D */
20146     { instruction         , 0                   , 0   , 32,
20147        0xfc0007ff, 0xa0000195, &NMD::CMP_LE_D         , 0,
20148        CP1_                },        /* CMP.LE.D */
20149     { instruction         , 0                   , 0   , 32,
20150        0xfc0007ff, 0xa00001d5, &NMD::CMP_ULE_D        , 0,
20151        CP1_                },        /* CMP.ULE.D */
20152     { instruction         , 0                   , 0   , 32,
20153        0xfc0007ff, 0xa0000215, &NMD::CMP_SAF_D        , 0,
20154        CP1_                },        /* CMP.SAF.D */
20155     { instruction         , 0                   , 0   , 32,
20156        0xfc0007ff, 0xa0000255, &NMD::CMP_SUN_D        , 0,
20157        CP1_                },        /* CMP.SUN.D */
20158     { instruction         , 0                   , 0   , 32,
20159        0xfc0007ff, 0xa0000295, &NMD::CMP_SEQ_D        , 0,
20160        CP1_                },        /* CMP.SEQ.D */
20161     { instruction         , 0                   , 0   , 32,
20162        0xfc0007ff, 0xa00002d5, &NMD::CMP_SUEQ_D       , 0,
20163        CP1_                },        /* CMP.SUEQ.D */
20164     { instruction         , 0                   , 0   , 32,
20165        0xfc0007ff, 0xa0000315, &NMD::CMP_SLT_D        , 0,
20166        CP1_                },        /* CMP.SLT.D */
20167     { instruction         , 0                   , 0   , 32,
20168        0xfc0007ff, 0xa0000355, &NMD::CMP_SULT_D       , 0,
20169        CP1_                },        /* CMP.SULT.D */
20170     { instruction         , 0                   , 0   , 32,
20171        0xfc0007ff, 0xa0000395, &NMD::CMP_SLE_D        , 0,
20172        CP1_                },        /* CMP.SLE.D */
20173     { instruction         , 0                   , 0   , 32,
20174        0xfc0007ff, 0xa00003d5, &NMD::CMP_SULE_D       , 0,
20175        CP1_                },        /* CMP.SULE.D */
20176     { reserved_block      , 0                   , 0   , 32,
20177        0xfc0007ff, 0xa0000415, 0                      , 0,
20178        CP1_                },        /* CMP.condn.D~*(16) */
20179     { instruction         , 0                   , 0   , 32,
20180        0xfc0007ff, 0xa0000455, &NMD::CMP_OR_D         , 0,
20181        CP1_                },        /* CMP.OR.D */
20182     { instruction         , 0                   , 0   , 32,
20183        0xfc0007ff, 0xa0000495, &NMD::CMP_UNE_D        , 0,
20184        CP1_                },        /* CMP.UNE.D */
20185     { instruction         , 0                   , 0   , 32,
20186        0xfc0007ff, 0xa00004d5, &NMD::CMP_NE_D         , 0,
20187        CP1_                },        /* CMP.NE.D */
20188     { reserved_block      , 0                   , 0   , 32,
20189        0xfc0007ff, 0xa0000515, 0                      , 0,
20190        CP1_                },        /* CMP.condn.D~*(20) */
20191     { reserved_block      , 0                   , 0   , 32,
20192        0xfc0007ff, 0xa0000555, 0                      , 0,
20193        CP1_                },        /* CMP.condn.D~*(21) */
20194     { reserved_block      , 0                   , 0   , 32,
20195        0xfc0007ff, 0xa0000595, 0                      , 0,
20196        CP1_                },        /* CMP.condn.D~*(22) */
20197     { reserved_block      , 0                   , 0   , 32,
20198        0xfc0007ff, 0xa00005d5, 0                      , 0,
20199        CP1_                },        /* CMP.condn.D~*(23) */
20200     { reserved_block      , 0                   , 0   , 32,
20201        0xfc0007ff, 0xa0000615, 0                      , 0,
20202        CP1_                },        /* CMP.condn.D~*(24) */
20203     { instruction         , 0                   , 0   , 32,
20204        0xfc0007ff, 0xa0000655, &NMD::CMP_SOR_D        , 0,
20205        CP1_                },        /* CMP.SOR.D */
20206     { instruction         , 0                   , 0   , 32,
20207        0xfc0007ff, 0xa0000695, &NMD::CMP_SUNE_D       , 0,
20208        CP1_                },        /* CMP.SUNE.D */
20209     { instruction         , 0                   , 0   , 32,
20210        0xfc0007ff, 0xa00006d5, &NMD::CMP_SNE_D        , 0,
20211        CP1_                },        /* CMP.SNE.D */
20212     { reserved_block      , 0                   , 0   , 32,
20213        0xfc0007ff, 0xa0000715, 0                      , 0,
20214        CP1_                },        /* CMP.condn.D~*(28) */
20215     { reserved_block      , 0                   , 0   , 32,
20216        0xfc0007ff, 0xa0000755, 0                      , 0,
20217        CP1_                },        /* CMP.condn.D~*(29) */
20218     { reserved_block      , 0                   , 0   , 32,
20219        0xfc0007ff, 0xa0000795, 0                      , 0,
20220        CP1_                },        /* CMP.condn.D~*(30) */
20221     { reserved_block      , 0                   , 0   , 32,
20222        0xfc0007ff, 0xa00007d5, 0                      , 0,
20223        CP1_                },        /* CMP.condn.D~*(31) */
20224 };
20225
20226
20227 NMD::Pool NMD::POOL32F_5[8] = {
20228     { pool                , CMP_condn_S         , 32  , 32,
20229        0xfc00003f, 0xa0000005, 0                      , 0,
20230        CP1_                },        /* CMP.condn.S */
20231     { reserved_block      , 0                   , 0   , 32,
20232        0xfc00003f, 0xa000000d, 0                      , 0,
20233        CP1_                },        /* POOL32F_5~*(1) */
20234     { pool                , CMP_condn_D         , 32  , 32,
20235        0xfc00003f, 0xa0000015, 0                      , 0,
20236        CP1_                },        /* CMP.condn.D */
20237     { reserved_block      , 0                   , 0   , 32,
20238        0xfc00003f, 0xa000001d, 0                      , 0,
20239        CP1_                },        /* POOL32F_5~*(3) */
20240     { reserved_block      , 0                   , 0   , 32,
20241        0xfc00003f, 0xa0000025, 0                      , 0,
20242        CP1_                },        /* POOL32F_5~*(4) */
20243     { reserved_block      , 0                   , 0   , 32,
20244        0xfc00003f, 0xa000002d, 0                      , 0,
20245        CP1_                },        /* POOL32F_5~*(5) */
20246     { reserved_block      , 0                   , 0   , 32,
20247        0xfc00003f, 0xa0000035, 0                      , 0,
20248        CP1_                },        /* POOL32F_5~*(6) */
20249     { reserved_block      , 0                   , 0   , 32,
20250        0xfc00003f, 0xa000003d, 0                      , 0,
20251        CP1_                },        /* POOL32F_5~*(7) */
20252 };
20253
20254
20255 NMD::Pool NMD::POOL32F[8] = {
20256     { pool                , POOL32F_0           , 64  , 32,
20257        0xfc000007, 0xa0000000, 0                      , 0,
20258        CP1_                },        /* POOL32F_0 */
20259     { reserved_block      , 0                   , 0   , 32,
20260        0xfc000007, 0xa0000001, 0                      , 0,
20261        CP1_                },        /* POOL32F~*(1) */
20262     { reserved_block      , 0                   , 0   , 32,
20263        0xfc000007, 0xa0000002, 0                      , 0,
20264        CP1_                },        /* POOL32F~*(2) */
20265     { pool                , POOL32F_3           , 8   , 32,
20266        0xfc000007, 0xa0000003, 0                      , 0,
20267        CP1_                },        /* POOL32F_3 */
20268     { reserved_block      , 0                   , 0   , 32,
20269        0xfc000007, 0xa0000004, 0                      , 0,
20270        CP1_                },        /* POOL32F~*(4) */
20271     { pool                , POOL32F_5           , 8   , 32,
20272        0xfc000007, 0xa0000005, 0                      , 0,
20273        CP1_                },        /* POOL32F_5 */
20274     { reserved_block      , 0                   , 0   , 32,
20275        0xfc000007, 0xa0000006, 0                      , 0,
20276        CP1_                },        /* POOL32F~*(6) */
20277     { reserved_block      , 0                   , 0   , 32,
20278        0xfc000007, 0xa0000007, 0                      , 0,
20279        CP1_                },        /* POOL32F~*(7) */
20280 };
20281
20282
20283 NMD::Pool NMD::POOL32S_0[64] = {
20284     { reserved_block      , 0                   , 0   , 32,
20285        0xfc0001ff, 0xc0000000, 0                      , 0,
20286        0x0                 },        /* POOL32S_0~*(0) */
20287     { instruction         , 0                   , 0   , 32,
20288        0xfc0001ff, 0xc0000008, &NMD::DLSA             , 0,
20289        MIPS64_             },        /* DLSA */
20290     { instruction         , 0                   , 0   , 32,
20291        0xfc0001ff, 0xc0000010, &NMD::DSLLV            , 0,
20292        MIPS64_             },        /* DSLLV */
20293     { instruction         , 0                   , 0   , 32,
20294        0xfc0001ff, 0xc0000018, &NMD::DMUL             , 0,
20295        MIPS64_             },        /* DMUL */
20296     { reserved_block      , 0                   , 0   , 32,
20297        0xfc0001ff, 0xc0000020, 0                      , 0,
20298        0x0                 },        /* POOL32S_0~*(4) */
20299     { reserved_block      , 0                   , 0   , 32,
20300        0xfc0001ff, 0xc0000028, 0                      , 0,
20301        0x0                 },        /* POOL32S_0~*(5) */
20302     { reserved_block      , 0                   , 0   , 32,
20303        0xfc0001ff, 0xc0000030, 0                      , 0,
20304        0x0                 },        /* POOL32S_0~*(6) */
20305     { reserved_block      , 0                   , 0   , 32,
20306        0xfc0001ff, 0xc0000038, 0                      , 0,
20307        0x0                 },        /* POOL32S_0~*(7) */
20308     { reserved_block      , 0                   , 0   , 32,
20309        0xfc0001ff, 0xc0000040, 0                      , 0,
20310        0x0                 },        /* POOL32S_0~*(8) */
20311     { reserved_block      , 0                   , 0   , 32,
20312        0xfc0001ff, 0xc0000048, 0                      , 0,
20313        0x0                 },        /* POOL32S_0~*(9) */
20314     { instruction         , 0                   , 0   , 32,
20315        0xfc0001ff, 0xc0000050, &NMD::DSRLV            , 0,
20316        MIPS64_             },        /* DSRLV */
20317     { instruction         , 0                   , 0   , 32,
20318        0xfc0001ff, 0xc0000058, &NMD::DMUH             , 0,
20319        MIPS64_             },        /* DMUH */
20320     { reserved_block      , 0                   , 0   , 32,
20321        0xfc0001ff, 0xc0000060, 0                      , 0,
20322        0x0                 },        /* POOL32S_0~*(12) */
20323     { reserved_block      , 0                   , 0   , 32,
20324        0xfc0001ff, 0xc0000068, 0                      , 0,
20325        0x0                 },        /* POOL32S_0~*(13) */
20326     { reserved_block      , 0                   , 0   , 32,
20327        0xfc0001ff, 0xc0000070, 0                      , 0,
20328        0x0                 },        /* POOL32S_0~*(14) */
20329     { reserved_block      , 0                   , 0   , 32,
20330        0xfc0001ff, 0xc0000078, 0                      , 0,
20331        0x0                 },        /* POOL32S_0~*(15) */
20332     { reserved_block      , 0                   , 0   , 32,
20333        0xfc0001ff, 0xc0000080, 0                      , 0,
20334        0x0                 },        /* POOL32S_0~*(16) */
20335     { reserved_block      , 0                   , 0   , 32,
20336        0xfc0001ff, 0xc0000088, 0                      , 0,
20337        0x0                 },        /* POOL32S_0~*(17) */
20338     { instruction         , 0                   , 0   , 32,
20339        0xfc0001ff, 0xc0000090, &NMD::DSRAV            , 0,
20340        MIPS64_             },        /* DSRAV */
20341     { instruction         , 0                   , 0   , 32,
20342        0xfc0001ff, 0xc0000098, &NMD::DMULU            , 0,
20343        MIPS64_             },        /* DMULU */
20344     { reserved_block      , 0                   , 0   , 32,
20345        0xfc0001ff, 0xc00000a0, 0                      , 0,
20346        0x0                 },        /* POOL32S_0~*(20) */
20347     { reserved_block      , 0                   , 0   , 32,
20348        0xfc0001ff, 0xc00000a8, 0                      , 0,
20349        0x0                 },        /* POOL32S_0~*(21) */
20350     { reserved_block      , 0                   , 0   , 32,
20351        0xfc0001ff, 0xc00000b0, 0                      , 0,
20352        0x0                 },        /* POOL32S_0~*(22) */
20353     { reserved_block      , 0                   , 0   , 32,
20354        0xfc0001ff, 0xc00000b8, 0                      , 0,
20355        0x0                 },        /* POOL32S_0~*(23) */
20356     { reserved_block      , 0                   , 0   , 32,
20357        0xfc0001ff, 0xc00000c0, 0                      , 0,
20358        0x0                 },        /* POOL32S_0~*(24) */
20359     { reserved_block      , 0                   , 0   , 32,
20360        0xfc0001ff, 0xc00000c8, 0                      , 0,
20361        0x0                 },        /* POOL32S_0~*(25) */
20362     { instruction         , 0                   , 0   , 32,
20363        0xfc0001ff, 0xc00000d0, &NMD::DROTRV           , 0,
20364        MIPS64_             },        /* DROTRV */
20365     { instruction         , 0                   , 0   , 32,
20366        0xfc0001ff, 0xc00000d8, &NMD::DMUHU            , 0,
20367        MIPS64_             },        /* DMUHU */
20368     { reserved_block      , 0                   , 0   , 32,
20369        0xfc0001ff, 0xc00000e0, 0                      , 0,
20370        0x0                 },        /* POOL32S_0~*(28) */
20371     { reserved_block      , 0                   , 0   , 32,
20372        0xfc0001ff, 0xc00000e8, 0                      , 0,
20373        0x0                 },        /* POOL32S_0~*(29) */
20374     { reserved_block      , 0                   , 0   , 32,
20375        0xfc0001ff, 0xc00000f0, 0                      , 0,
20376        0x0                 },        /* POOL32S_0~*(30) */
20377     { reserved_block      , 0                   , 0   , 32,
20378        0xfc0001ff, 0xc00000f8, 0                      , 0,
20379        0x0                 },        /* POOL32S_0~*(31) */
20380     { reserved_block      , 0                   , 0   , 32,
20381        0xfc0001ff, 0xc0000100, 0                      , 0,
20382        0x0                 },        /* POOL32S_0~*(32) */
20383     { reserved_block      , 0                   , 0   , 32,
20384        0xfc0001ff, 0xc0000108, 0                      , 0,
20385        0x0                 },        /* POOL32S_0~*(33) */
20386     { instruction         , 0                   , 0   , 32,
20387        0xfc0001ff, 0xc0000110, &NMD::DADD             , 0,
20388        MIPS64_             },        /* DADD */
20389     { instruction         , 0                   , 0   , 32,
20390        0xfc0001ff, 0xc0000118, &NMD::DDIV             , 0,
20391        MIPS64_             },        /* DDIV */
20392     { reserved_block      , 0                   , 0   , 32,
20393        0xfc0001ff, 0xc0000120, 0                      , 0,
20394        0x0                 },        /* POOL32S_0~*(36) */
20395     { reserved_block      , 0                   , 0   , 32,
20396        0xfc0001ff, 0xc0000128, 0                      , 0,
20397        0x0                 },        /* POOL32S_0~*(37) */
20398     { reserved_block      , 0                   , 0   , 32,
20399        0xfc0001ff, 0xc0000130, 0                      , 0,
20400        0x0                 },        /* POOL32S_0~*(38) */
20401     { reserved_block      , 0                   , 0   , 32,
20402        0xfc0001ff, 0xc0000138, 0                      , 0,
20403        0x0                 },        /* POOL32S_0~*(39) */
20404     { reserved_block      , 0                   , 0   , 32,
20405        0xfc0001ff, 0xc0000140, 0                      , 0,
20406        0x0                 },        /* POOL32S_0~*(40) */
20407     { reserved_block      , 0                   , 0   , 32,
20408        0xfc0001ff, 0xc0000148, 0                      , 0,
20409        0x0                 },        /* POOL32S_0~*(41) */
20410     { instruction         , 0                   , 0   , 32,
20411        0xfc0001ff, 0xc0000150, &NMD::DADDU            , 0,
20412        MIPS64_             },        /* DADDU */
20413     { instruction         , 0                   , 0   , 32,
20414        0xfc0001ff, 0xc0000158, &NMD::DMOD             , 0,
20415        MIPS64_             },        /* DMOD */
20416     { reserved_block      , 0                   , 0   , 32,
20417        0xfc0001ff, 0xc0000160, 0                      , 0,
20418        0x0                 },        /* POOL32S_0~*(44) */
20419     { reserved_block      , 0                   , 0   , 32,
20420        0xfc0001ff, 0xc0000168, 0                      , 0,
20421        0x0                 },        /* POOL32S_0~*(45) */
20422     { reserved_block      , 0                   , 0   , 32,
20423        0xfc0001ff, 0xc0000170, 0                      , 0,
20424        0x0                 },        /* POOL32S_0~*(46) */
20425     { reserved_block      , 0                   , 0   , 32,
20426        0xfc0001ff, 0xc0000178, 0                      , 0,
20427        0x0                 },        /* POOL32S_0~*(47) */
20428     { reserved_block      , 0                   , 0   , 32,
20429        0xfc0001ff, 0xc0000180, 0                      , 0,
20430        0x0                 },        /* POOL32S_0~*(48) */
20431     { reserved_block      , 0                   , 0   , 32,
20432        0xfc0001ff, 0xc0000188, 0                      , 0,
20433        0x0                 },        /* POOL32S_0~*(49) */
20434     { instruction         , 0                   , 0   , 32,
20435        0xfc0001ff, 0xc0000190, &NMD::DSUB             , 0,
20436        MIPS64_             },        /* DSUB */
20437     { instruction         , 0                   , 0   , 32,
20438        0xfc0001ff, 0xc0000198, &NMD::DDIVU            , 0,
20439        MIPS64_             },        /* DDIVU */
20440     { reserved_block      , 0                   , 0   , 32,
20441        0xfc0001ff, 0xc00001a0, 0                      , 0,
20442        0x0                 },        /* POOL32S_0~*(52) */
20443     { reserved_block      , 0                   , 0   , 32,
20444        0xfc0001ff, 0xc00001a8, 0                      , 0,
20445        0x0                 },        /* POOL32S_0~*(53) */
20446     { reserved_block      , 0                   , 0   , 32,
20447        0xfc0001ff, 0xc00001b0, 0                      , 0,
20448        0x0                 },        /* POOL32S_0~*(54) */
20449     { reserved_block      , 0                   , 0   , 32,
20450        0xfc0001ff, 0xc00001b8, 0                      , 0,
20451        0x0                 },        /* POOL32S_0~*(55) */
20452     { reserved_block      , 0                   , 0   , 32,
20453        0xfc0001ff, 0xc00001c0, 0                      , 0,
20454        0x0                 },        /* POOL32S_0~*(56) */
20455     { reserved_block      , 0                   , 0   , 32,
20456        0xfc0001ff, 0xc00001c8, 0                      , 0,
20457        0x0                 },        /* POOL32S_0~*(57) */
20458     { instruction         , 0                   , 0   , 32,
20459        0xfc0001ff, 0xc00001d0, &NMD::DSUBU            , 0,
20460        MIPS64_             },        /* DSUBU */
20461     { instruction         , 0                   , 0   , 32,
20462        0xfc0001ff, 0xc00001d8, &NMD::DMODU            , 0,
20463        MIPS64_             },        /* DMODU */
20464     { reserved_block      , 0                   , 0   , 32,
20465        0xfc0001ff, 0xc00001e0, 0                      , 0,
20466        0x0                 },        /* POOL32S_0~*(60) */
20467     { reserved_block      , 0                   , 0   , 32,
20468        0xfc0001ff, 0xc00001e8, 0                      , 0,
20469        0x0                 },        /* POOL32S_0~*(61) */
20470     { reserved_block      , 0                   , 0   , 32,
20471        0xfc0001ff, 0xc00001f0, 0                      , 0,
20472        0x0                 },        /* POOL32S_0~*(62) */
20473     { reserved_block      , 0                   , 0   , 32,
20474        0xfc0001ff, 0xc00001f8, 0                      , 0,
20475        0x0                 },        /* POOL32S_0~*(63) */
20476 };
20477
20478
20479 NMD::Pool NMD::POOL32Sxf_4[128] = {
20480     { reserved_block      , 0                   , 0   , 32,
20481        0xfc00ffff, 0xc000013c, 0                      , 0,
20482        0x0                 },        /* POOL32Sxf_4~*(0) */
20483     { reserved_block      , 0                   , 0   , 32,
20484        0xfc00ffff, 0xc000033c, 0                      , 0,
20485        0x0                 },        /* POOL32Sxf_4~*(1) */
20486     { reserved_block      , 0                   , 0   , 32,
20487        0xfc00ffff, 0xc000053c, 0                      , 0,
20488        0x0                 },        /* POOL32Sxf_4~*(2) */
20489     { reserved_block      , 0                   , 0   , 32,
20490        0xfc00ffff, 0xc000073c, 0                      , 0,
20491        0x0                 },        /* POOL32Sxf_4~*(3) */
20492     { reserved_block      , 0                   , 0   , 32,
20493        0xfc00ffff, 0xc000093c, 0                      , 0,
20494        0x0                 },        /* POOL32Sxf_4~*(4) */
20495     { reserved_block      , 0                   , 0   , 32,
20496        0xfc00ffff, 0xc0000b3c, 0                      , 0,
20497        0x0                 },        /* POOL32Sxf_4~*(5) */
20498     { reserved_block      , 0                   , 0   , 32,
20499        0xfc00ffff, 0xc0000d3c, 0                      , 0,
20500        0x0                 },        /* POOL32Sxf_4~*(6) */
20501     { reserved_block      , 0                   , 0   , 32,
20502        0xfc00ffff, 0xc0000f3c, 0                      , 0,
20503        0x0                 },        /* POOL32Sxf_4~*(7) */
20504     { reserved_block      , 0                   , 0   , 32,
20505        0xfc00ffff, 0xc000113c, 0                      , 0,
20506        0x0                 },        /* POOL32Sxf_4~*(8) */
20507     { reserved_block      , 0                   , 0   , 32,
20508        0xfc00ffff, 0xc000133c, 0                      , 0,
20509        0x0                 },        /* POOL32Sxf_4~*(9) */
20510     { reserved_block      , 0                   , 0   , 32,
20511        0xfc00ffff, 0xc000153c, 0                      , 0,
20512        0x0                 },        /* POOL32Sxf_4~*(10) */
20513     { reserved_block      , 0                   , 0   , 32,
20514        0xfc00ffff, 0xc000173c, 0                      , 0,
20515        0x0                 },        /* POOL32Sxf_4~*(11) */
20516     { reserved_block      , 0                   , 0   , 32,
20517        0xfc00ffff, 0xc000193c, 0                      , 0,
20518        0x0                 },        /* POOL32Sxf_4~*(12) */
20519     { reserved_block      , 0                   , 0   , 32,
20520        0xfc00ffff, 0xc0001b3c, 0                      , 0,
20521        0x0                 },        /* POOL32Sxf_4~*(13) */
20522     { reserved_block      , 0                   , 0   , 32,
20523        0xfc00ffff, 0xc0001d3c, 0                      , 0,
20524        0x0                 },        /* POOL32Sxf_4~*(14) */
20525     { reserved_block      , 0                   , 0   , 32,
20526        0xfc00ffff, 0xc0001f3c, 0                      , 0,
20527        0x0                 },        /* POOL32Sxf_4~*(15) */
20528     { reserved_block      , 0                   , 0   , 32,
20529        0xfc00ffff, 0xc000213c, 0                      , 0,
20530        0x0                 },        /* POOL32Sxf_4~*(16) */
20531     { reserved_block      , 0                   , 0   , 32,
20532        0xfc00ffff, 0xc000233c, 0                      , 0,
20533        0x0                 },        /* POOL32Sxf_4~*(17) */
20534     { reserved_block      , 0                   , 0   , 32,
20535        0xfc00ffff, 0xc000253c, 0                      , 0,
20536        0x0                 },        /* POOL32Sxf_4~*(18) */
20537     { reserved_block      , 0                   , 0   , 32,
20538        0xfc00ffff, 0xc000273c, 0                      , 0,
20539        0x0                 },        /* POOL32Sxf_4~*(19) */
20540     { reserved_block      , 0                   , 0   , 32,
20541        0xfc00ffff, 0xc000293c, 0                      , 0,
20542        0x0                 },        /* POOL32Sxf_4~*(20) */
20543     { reserved_block      , 0                   , 0   , 32,
20544        0xfc00ffff, 0xc0002b3c, 0                      , 0,
20545        0x0                 },        /* POOL32Sxf_4~*(21) */
20546     { reserved_block      , 0                   , 0   , 32,
20547        0xfc00ffff, 0xc0002d3c, 0                      , 0,
20548        0x0                 },        /* POOL32Sxf_4~*(22) */
20549     { reserved_block      , 0                   , 0   , 32,
20550        0xfc00ffff, 0xc0002f3c, 0                      , 0,
20551        0x0                 },        /* POOL32Sxf_4~*(23) */
20552     { reserved_block      , 0                   , 0   , 32,
20553        0xfc00ffff, 0xc000313c, 0                      , 0,
20554        0x0                 },        /* POOL32Sxf_4~*(24) */
20555     { reserved_block      , 0                   , 0   , 32,
20556        0xfc00ffff, 0xc000333c, 0                      , 0,
20557        0x0                 },        /* POOL32Sxf_4~*(25) */
20558     { reserved_block      , 0                   , 0   , 32,
20559        0xfc00ffff, 0xc000353c, 0                      , 0,
20560        0x0                 },        /* POOL32Sxf_4~*(26) */
20561     { reserved_block      , 0                   , 0   , 32,
20562        0xfc00ffff, 0xc000373c, 0                      , 0,
20563        0x0                 },        /* POOL32Sxf_4~*(27) */
20564     { reserved_block      , 0                   , 0   , 32,
20565        0xfc00ffff, 0xc000393c, 0                      , 0,
20566        0x0                 },        /* POOL32Sxf_4~*(28) */
20567     { reserved_block      , 0                   , 0   , 32,
20568        0xfc00ffff, 0xc0003b3c, 0                      , 0,
20569        0x0                 },        /* POOL32Sxf_4~*(29) */
20570     { reserved_block      , 0                   , 0   , 32,
20571        0xfc00ffff, 0xc0003d3c, 0                      , 0,
20572        0x0                 },        /* POOL32Sxf_4~*(30) */
20573     { reserved_block      , 0                   , 0   , 32,
20574        0xfc00ffff, 0xc0003f3c, 0                      , 0,
20575        0x0                 },        /* POOL32Sxf_4~*(31) */
20576     { reserved_block      , 0                   , 0   , 32,
20577        0xfc00ffff, 0xc000413c, 0                      , 0,
20578        0x0                 },        /* POOL32Sxf_4~*(32) */
20579     { reserved_block      , 0                   , 0   , 32,
20580        0xfc00ffff, 0xc000433c, 0                      , 0,
20581        0x0                 },        /* POOL32Sxf_4~*(33) */
20582     { reserved_block      , 0                   , 0   , 32,
20583        0xfc00ffff, 0xc000453c, 0                      , 0,
20584        0x0                 },        /* POOL32Sxf_4~*(34) */
20585     { reserved_block      , 0                   , 0   , 32,
20586        0xfc00ffff, 0xc000473c, 0                      , 0,
20587        0x0                 },        /* POOL32Sxf_4~*(35) */
20588     { reserved_block      , 0                   , 0   , 32,
20589        0xfc00ffff, 0xc000493c, 0                      , 0,
20590        0x0                 },        /* POOL32Sxf_4~*(36) */
20591     { instruction         , 0                   , 0   , 32,
20592        0xfc00ffff, 0xc0004b3c, &NMD::DCLO             , 0,
20593        MIPS64_             },        /* DCLO */
20594     { reserved_block      , 0                   , 0   , 32,
20595        0xfc00ffff, 0xc0004d3c, 0                      , 0,
20596        0x0                 },        /* POOL32Sxf_4~*(38) */
20597     { reserved_block      , 0                   , 0   , 32,
20598        0xfc00ffff, 0xc0004f3c, 0                      , 0,
20599        0x0                 },        /* POOL32Sxf_4~*(39) */
20600     { reserved_block      , 0                   , 0   , 32,
20601        0xfc00ffff, 0xc000513c, 0                      , 0,
20602        0x0                 },        /* POOL32Sxf_4~*(40) */
20603     { reserved_block      , 0                   , 0   , 32,
20604        0xfc00ffff, 0xc000533c, 0                      , 0,
20605        0x0                 },        /* POOL32Sxf_4~*(41) */
20606     { reserved_block      , 0                   , 0   , 32,
20607        0xfc00ffff, 0xc000553c, 0                      , 0,
20608        0x0                 },        /* POOL32Sxf_4~*(42) */
20609     { reserved_block      , 0                   , 0   , 32,
20610        0xfc00ffff, 0xc000573c, 0                      , 0,
20611        0x0                 },        /* POOL32Sxf_4~*(43) */
20612     { reserved_block      , 0                   , 0   , 32,
20613        0xfc00ffff, 0xc000593c, 0                      , 0,
20614        0x0                 },        /* POOL32Sxf_4~*(44) */
20615     { instruction         , 0                   , 0   , 32,
20616        0xfc00ffff, 0xc0005b3c, &NMD::DCLZ             , 0,
20617        MIPS64_             },        /* DCLZ */
20618     { reserved_block      , 0                   , 0   , 32,
20619        0xfc00ffff, 0xc0005d3c, 0                      , 0,
20620        0x0                 },        /* POOL32Sxf_4~*(46) */
20621     { reserved_block      , 0                   , 0   , 32,
20622        0xfc00ffff, 0xc0005f3c, 0                      , 0,
20623        0x0                 },        /* POOL32Sxf_4~*(47) */
20624     { reserved_block      , 0                   , 0   , 32,
20625        0xfc00ffff, 0xc000613c, 0                      , 0,
20626        0x0                 },        /* POOL32Sxf_4~*(48) */
20627     { reserved_block      , 0                   , 0   , 32,
20628        0xfc00ffff, 0xc000633c, 0                      , 0,
20629        0x0                 },        /* POOL32Sxf_4~*(49) */
20630     { reserved_block      , 0                   , 0   , 32,
20631        0xfc00ffff, 0xc000653c, 0                      , 0,
20632        0x0                 },        /* POOL32Sxf_4~*(50) */
20633     { reserved_block      , 0                   , 0   , 32,
20634        0xfc00ffff, 0xc000673c, 0                      , 0,
20635        0x0                 },        /* POOL32Sxf_4~*(51) */
20636     { reserved_block      , 0                   , 0   , 32,
20637        0xfc00ffff, 0xc000693c, 0                      , 0,
20638        0x0                 },        /* POOL32Sxf_4~*(52) */
20639     { reserved_block      , 0                   , 0   , 32,
20640        0xfc00ffff, 0xc0006b3c, 0                      , 0,
20641        0x0                 },        /* POOL32Sxf_4~*(53) */
20642     { reserved_block      , 0                   , 0   , 32,
20643        0xfc00ffff, 0xc0006d3c, 0                      , 0,
20644        0x0                 },        /* POOL32Sxf_4~*(54) */
20645     { reserved_block      , 0                   , 0   , 32,
20646        0xfc00ffff, 0xc0006f3c, 0                      , 0,
20647        0x0                 },        /* POOL32Sxf_4~*(55) */
20648     { reserved_block      , 0                   , 0   , 32,
20649        0xfc00ffff, 0xc000713c, 0                      , 0,
20650        0x0                 },        /* POOL32Sxf_4~*(56) */
20651     { reserved_block      , 0                   , 0   , 32,
20652        0xfc00ffff, 0xc000733c, 0                      , 0,
20653        0x0                 },        /* POOL32Sxf_4~*(57) */
20654     { reserved_block      , 0                   , 0   , 32,
20655        0xfc00ffff, 0xc000753c, 0                      , 0,
20656        0x0                 },        /* POOL32Sxf_4~*(58) */
20657     { reserved_block      , 0                   , 0   , 32,
20658        0xfc00ffff, 0xc000773c, 0                      , 0,
20659        0x0                 },        /* POOL32Sxf_4~*(59) */
20660     { reserved_block      , 0                   , 0   , 32,
20661        0xfc00ffff, 0xc000793c, 0                      , 0,
20662        0x0                 },        /* POOL32Sxf_4~*(60) */
20663     { reserved_block      , 0                   , 0   , 32,
20664        0xfc00ffff, 0xc0007b3c, 0                      , 0,
20665        0x0                 },        /* POOL32Sxf_4~*(61) */
20666     { reserved_block      , 0                   , 0   , 32,
20667        0xfc00ffff, 0xc0007d3c, 0                      , 0,
20668        0x0                 },        /* POOL32Sxf_4~*(62) */
20669     { reserved_block      , 0                   , 0   , 32,
20670        0xfc00ffff, 0xc0007f3c, 0                      , 0,
20671        0x0                 },        /* POOL32Sxf_4~*(63) */
20672     { reserved_block      , 0                   , 0   , 32,
20673        0xfc00ffff, 0xc000813c, 0                      , 0,
20674        0x0                 },        /* POOL32Sxf_4~*(64) */
20675     { reserved_block      , 0                   , 0   , 32,
20676        0xfc00ffff, 0xc000833c, 0                      , 0,
20677        0x0                 },        /* POOL32Sxf_4~*(65) */
20678     { reserved_block      , 0                   , 0   , 32,
20679        0xfc00ffff, 0xc000853c, 0                      , 0,
20680        0x0                 },        /* POOL32Sxf_4~*(66) */
20681     { reserved_block      , 0                   , 0   , 32,
20682        0xfc00ffff, 0xc000873c, 0                      , 0,
20683        0x0                 },        /* POOL32Sxf_4~*(67) */
20684     { reserved_block      , 0                   , 0   , 32,
20685        0xfc00ffff, 0xc000893c, 0                      , 0,
20686        0x0                 },        /* POOL32Sxf_4~*(68) */
20687     { reserved_block      , 0                   , 0   , 32,
20688        0xfc00ffff, 0xc0008b3c, 0                      , 0,
20689        0x0                 },        /* POOL32Sxf_4~*(69) */
20690     { reserved_block      , 0                   , 0   , 32,
20691        0xfc00ffff, 0xc0008d3c, 0                      , 0,
20692        0x0                 },        /* POOL32Sxf_4~*(70) */
20693     { reserved_block      , 0                   , 0   , 32,
20694        0xfc00ffff, 0xc0008f3c, 0                      , 0,
20695        0x0                 },        /* POOL32Sxf_4~*(71) */
20696     { reserved_block      , 0                   , 0   , 32,
20697        0xfc00ffff, 0xc000913c, 0                      , 0,
20698        0x0                 },        /* POOL32Sxf_4~*(72) */
20699     { reserved_block      , 0                   , 0   , 32,
20700        0xfc00ffff, 0xc000933c, 0                      , 0,
20701        0x0                 },        /* POOL32Sxf_4~*(73) */
20702     { reserved_block      , 0                   , 0   , 32,
20703        0xfc00ffff, 0xc000953c, 0                      , 0,
20704        0x0                 },        /* POOL32Sxf_4~*(74) */
20705     { reserved_block      , 0                   , 0   , 32,
20706        0xfc00ffff, 0xc000973c, 0                      , 0,
20707        0x0                 },        /* POOL32Sxf_4~*(75) */
20708     { reserved_block      , 0                   , 0   , 32,
20709        0xfc00ffff, 0xc000993c, 0                      , 0,
20710        0x0                 },        /* POOL32Sxf_4~*(76) */
20711     { reserved_block      , 0                   , 0   , 32,
20712        0xfc00ffff, 0xc0009b3c, 0                      , 0,
20713        0x0                 },        /* POOL32Sxf_4~*(77) */
20714     { reserved_block      , 0                   , 0   , 32,
20715        0xfc00ffff, 0xc0009d3c, 0                      , 0,
20716        0x0                 },        /* POOL32Sxf_4~*(78) */
20717     { reserved_block      , 0                   , 0   , 32,
20718        0xfc00ffff, 0xc0009f3c, 0                      , 0,
20719        0x0                 },        /* POOL32Sxf_4~*(79) */
20720     { reserved_block      , 0                   , 0   , 32,
20721        0xfc00ffff, 0xc000a13c, 0                      , 0,
20722        0x0                 },        /* POOL32Sxf_4~*(80) */
20723     { reserved_block      , 0                   , 0   , 32,
20724        0xfc00ffff, 0xc000a33c, 0                      , 0,
20725        0x0                 },        /* POOL32Sxf_4~*(81) */
20726     { reserved_block      , 0                   , 0   , 32,
20727        0xfc00ffff, 0xc000a53c, 0                      , 0,
20728        0x0                 },        /* POOL32Sxf_4~*(82) */
20729     { reserved_block      , 0                   , 0   , 32,
20730        0xfc00ffff, 0xc000a73c, 0                      , 0,
20731        0x0                 },        /* POOL32Sxf_4~*(83) */
20732     { reserved_block      , 0                   , 0   , 32,
20733        0xfc00ffff, 0xc000a93c, 0                      , 0,
20734        0x0                 },        /* POOL32Sxf_4~*(84) */
20735     { reserved_block      , 0                   , 0   , 32,
20736        0xfc00ffff, 0xc000ab3c, 0                      , 0,
20737        0x0                 },        /* POOL32Sxf_4~*(85) */
20738     { reserved_block      , 0                   , 0   , 32,
20739        0xfc00ffff, 0xc000ad3c, 0                      , 0,
20740        0x0                 },        /* POOL32Sxf_4~*(86) */
20741     { reserved_block      , 0                   , 0   , 32,
20742        0xfc00ffff, 0xc000af3c, 0                      , 0,
20743        0x0                 },        /* POOL32Sxf_4~*(87) */
20744     { reserved_block      , 0                   , 0   , 32,
20745        0xfc00ffff, 0xc000b13c, 0                      , 0,
20746        0x0                 },        /* POOL32Sxf_4~*(88) */
20747     { reserved_block      , 0                   , 0   , 32,
20748        0xfc00ffff, 0xc000b33c, 0                      , 0,
20749        0x0                 },        /* POOL32Sxf_4~*(89) */
20750     { reserved_block      , 0                   , 0   , 32,
20751        0xfc00ffff, 0xc000b53c, 0                      , 0,
20752        0x0                 },        /* POOL32Sxf_4~*(90) */
20753     { reserved_block      , 0                   , 0   , 32,
20754        0xfc00ffff, 0xc000b73c, 0                      , 0,
20755        0x0                 },        /* POOL32Sxf_4~*(91) */
20756     { reserved_block      , 0                   , 0   , 32,
20757        0xfc00ffff, 0xc000b93c, 0                      , 0,
20758        0x0                 },        /* POOL32Sxf_4~*(92) */
20759     { reserved_block      , 0                   , 0   , 32,
20760        0xfc00ffff, 0xc000bb3c, 0                      , 0,
20761        0x0                 },        /* POOL32Sxf_4~*(93) */
20762     { reserved_block      , 0                   , 0   , 32,
20763        0xfc00ffff, 0xc000bd3c, 0                      , 0,
20764        0x0                 },        /* POOL32Sxf_4~*(94) */
20765     { reserved_block      , 0                   , 0   , 32,
20766        0xfc00ffff, 0xc000bf3c, 0                      , 0,
20767        0x0                 },        /* POOL32Sxf_4~*(95) */
20768     { reserved_block      , 0                   , 0   , 32,
20769        0xfc00ffff, 0xc000c13c, 0                      , 0,
20770        0x0                 },        /* POOL32Sxf_4~*(96) */
20771     { reserved_block      , 0                   , 0   , 32,
20772        0xfc00ffff, 0xc000c33c, 0                      , 0,
20773        0x0                 },        /* POOL32Sxf_4~*(97) */
20774     { reserved_block      , 0                   , 0   , 32,
20775        0xfc00ffff, 0xc000c53c, 0                      , 0,
20776        0x0                 },        /* POOL32Sxf_4~*(98) */
20777     { reserved_block      , 0                   , 0   , 32,
20778        0xfc00ffff, 0xc000c73c, 0                      , 0,
20779        0x0                 },        /* POOL32Sxf_4~*(99) */
20780     { reserved_block      , 0                   , 0   , 32,
20781        0xfc00ffff, 0xc000c93c, 0                      , 0,
20782        0x0                 },        /* POOL32Sxf_4~*(100) */
20783     { reserved_block      , 0                   , 0   , 32,
20784        0xfc00ffff, 0xc000cb3c, 0                      , 0,
20785        0x0                 },        /* POOL32Sxf_4~*(101) */
20786     { reserved_block      , 0                   , 0   , 32,
20787        0xfc00ffff, 0xc000cd3c, 0                      , 0,
20788        0x0                 },        /* POOL32Sxf_4~*(102) */
20789     { reserved_block      , 0                   , 0   , 32,
20790        0xfc00ffff, 0xc000cf3c, 0                      , 0,
20791        0x0                 },        /* POOL32Sxf_4~*(103) */
20792     { reserved_block      , 0                   , 0   , 32,
20793        0xfc00ffff, 0xc000d13c, 0                      , 0,
20794        0x0                 },        /* POOL32Sxf_4~*(104) */
20795     { reserved_block      , 0                   , 0   , 32,
20796        0xfc00ffff, 0xc000d33c, 0                      , 0,
20797        0x0                 },        /* POOL32Sxf_4~*(105) */
20798     { reserved_block      , 0                   , 0   , 32,
20799        0xfc00ffff, 0xc000d53c, 0                      , 0,
20800        0x0                 },        /* POOL32Sxf_4~*(106) */
20801     { reserved_block      , 0                   , 0   , 32,
20802        0xfc00ffff, 0xc000d73c, 0                      , 0,
20803        0x0                 },        /* POOL32Sxf_4~*(107) */
20804     { reserved_block      , 0                   , 0   , 32,
20805        0xfc00ffff, 0xc000d93c, 0                      , 0,
20806        0x0                 },        /* POOL32Sxf_4~*(108) */
20807     { reserved_block      , 0                   , 0   , 32,
20808        0xfc00ffff, 0xc000db3c, 0                      , 0,
20809        0x0                 },        /* POOL32Sxf_4~*(109) */
20810     { reserved_block      , 0                   , 0   , 32,
20811        0xfc00ffff, 0xc000dd3c, 0                      , 0,
20812        0x0                 },        /* POOL32Sxf_4~*(110) */
20813     { reserved_block      , 0                   , 0   , 32,
20814        0xfc00ffff, 0xc000df3c, 0                      , 0,
20815        0x0                 },        /* POOL32Sxf_4~*(111) */
20816     { reserved_block      , 0                   , 0   , 32,
20817        0xfc00ffff, 0xc000e13c, 0                      , 0,
20818        0x0                 },        /* POOL32Sxf_4~*(112) */
20819     { reserved_block      , 0                   , 0   , 32,
20820        0xfc00ffff, 0xc000e33c, 0                      , 0,
20821        0x0                 },        /* POOL32Sxf_4~*(113) */
20822     { reserved_block      , 0                   , 0   , 32,
20823        0xfc00ffff, 0xc000e53c, 0                      , 0,
20824        0x0                 },        /* POOL32Sxf_4~*(114) */
20825     { reserved_block      , 0                   , 0   , 32,
20826        0xfc00ffff, 0xc000e73c, 0                      , 0,
20827        0x0                 },        /* POOL32Sxf_4~*(115) */
20828     { reserved_block      , 0                   , 0   , 32,
20829        0xfc00ffff, 0xc000e93c, 0                      , 0,
20830        0x0                 },        /* POOL32Sxf_4~*(116) */
20831     { reserved_block      , 0                   , 0   , 32,
20832        0xfc00ffff, 0xc000eb3c, 0                      , 0,
20833        0x0                 },        /* POOL32Sxf_4~*(117) */
20834     { reserved_block      , 0                   , 0   , 32,
20835        0xfc00ffff, 0xc000ed3c, 0                      , 0,
20836        0x0                 },        /* POOL32Sxf_4~*(118) */
20837     { reserved_block      , 0                   , 0   , 32,
20838        0xfc00ffff, 0xc000ef3c, 0                      , 0,
20839        0x0                 },        /* POOL32Sxf_4~*(119) */
20840     { reserved_block      , 0                   , 0   , 32,
20841        0xfc00ffff, 0xc000f13c, 0                      , 0,
20842        0x0                 },        /* POOL32Sxf_4~*(120) */
20843     { reserved_block      , 0                   , 0   , 32,
20844        0xfc00ffff, 0xc000f33c, 0                      , 0,
20845        0x0                 },        /* POOL32Sxf_4~*(121) */
20846     { reserved_block      , 0                   , 0   , 32,
20847        0xfc00ffff, 0xc000f53c, 0                      , 0,
20848        0x0                 },        /* POOL32Sxf_4~*(122) */
20849     { reserved_block      , 0                   , 0   , 32,
20850        0xfc00ffff, 0xc000f73c, 0                      , 0,
20851        0x0                 },        /* POOL32Sxf_4~*(123) */
20852     { reserved_block      , 0                   , 0   , 32,
20853        0xfc00ffff, 0xc000f93c, 0                      , 0,
20854        0x0                 },        /* POOL32Sxf_4~*(124) */
20855     { reserved_block      , 0                   , 0   , 32,
20856        0xfc00ffff, 0xc000fb3c, 0                      , 0,
20857        0x0                 },        /* POOL32Sxf_4~*(125) */
20858     { reserved_block      , 0                   , 0   , 32,
20859        0xfc00ffff, 0xc000fd3c, 0                      , 0,
20860        0x0                 },        /* POOL32Sxf_4~*(126) */
20861     { reserved_block      , 0                   , 0   , 32,
20862        0xfc00ffff, 0xc000ff3c, 0                      , 0,
20863        0x0                 },        /* POOL32Sxf_4~*(127) */
20864 };
20865
20866
20867 NMD::Pool NMD::POOL32Sxf[8] = {
20868     { reserved_block      , 0                   , 0   , 32,
20869        0xfc0001ff, 0xc000003c, 0                      , 0,
20870        0x0                 },        /* POOL32Sxf~*(0) */
20871     { reserved_block      , 0                   , 0   , 32,
20872        0xfc0001ff, 0xc000007c, 0                      , 0,
20873        0x0                 },        /* POOL32Sxf~*(1) */
20874     { reserved_block      , 0                   , 0   , 32,
20875        0xfc0001ff, 0xc00000bc, 0                      , 0,
20876        0x0                 },        /* POOL32Sxf~*(2) */
20877     { reserved_block      , 0                   , 0   , 32,
20878        0xfc0001ff, 0xc00000fc, 0                      , 0,
20879        0x0                 },        /* POOL32Sxf~*(3) */
20880     { pool                , POOL32Sxf_4         , 128 , 32,
20881        0xfc0001ff, 0xc000013c, 0                      , 0,
20882        0x0                 },        /* POOL32Sxf_4 */
20883     { reserved_block      , 0                   , 0   , 32,
20884        0xfc0001ff, 0xc000017c, 0                      , 0,
20885        0x0                 },        /* POOL32Sxf~*(5) */
20886     { reserved_block      , 0                   , 0   , 32,
20887        0xfc0001ff, 0xc00001bc, 0                      , 0,
20888        0x0                 },        /* POOL32Sxf~*(6) */
20889     { reserved_block      , 0                   , 0   , 32,
20890        0xfc0001ff, 0xc00001fc, 0                      , 0,
20891        0x0                 },        /* POOL32Sxf~*(7) */
20892 };
20893
20894
20895 NMD::Pool NMD::POOL32S_4[8] = {
20896     { instruction         , 0                   , 0   , 32,
20897        0xfc00003f, 0xc0000004, &NMD::EXTD             , 0,
20898        MIPS64_             },        /* EXTD */
20899     { instruction         , 0                   , 0   , 32,
20900        0xfc00003f, 0xc000000c, &NMD::EXTD32           , 0,
20901        MIPS64_             },        /* EXTD32 */
20902     { reserved_block      , 0                   , 0   , 32,
20903        0xfc00003f, 0xc0000014, 0                      , 0,
20904        0x0                 },        /* POOL32S_4~*(2) */
20905     { reserved_block      , 0                   , 0   , 32,
20906        0xfc00003f, 0xc000001c, 0                      , 0,
20907        0x0                 },        /* POOL32S_4~*(3) */
20908     { reserved_block      , 0                   , 0   , 32,
20909        0xfc00003f, 0xc0000024, 0                      , 0,
20910        0x0                 },        /* POOL32S_4~*(4) */
20911     { reserved_block      , 0                   , 0   , 32,
20912        0xfc00003f, 0xc000002c, 0                      , 0,
20913        0x0                 },        /* POOL32S_4~*(5) */
20914     { reserved_block      , 0                   , 0   , 32,
20915        0xfc00003f, 0xc0000034, 0                      , 0,
20916        0x0                 },        /* POOL32S_4~*(6) */
20917     { pool                , POOL32Sxf           , 8   , 32,
20918        0xfc00003f, 0xc000003c, 0                      , 0,
20919        0x0                 },        /* POOL32Sxf */
20920 };
20921
20922
20923 NMD::Pool NMD::POOL32S[8] = {
20924     { pool                , POOL32S_0           , 64  , 32,
20925        0xfc000007, 0xc0000000, 0                      , 0,
20926        0x0                 },        /* POOL32S_0 */
20927     { reserved_block      , 0                   , 0   , 32,
20928        0xfc000007, 0xc0000001, 0                      , 0,
20929        0x0                 },        /* POOL32S~*(1) */
20930     { reserved_block      , 0                   , 0   , 32,
20931        0xfc000007, 0xc0000002, 0                      , 0,
20932        0x0                 },        /* POOL32S~*(2) */
20933     { reserved_block      , 0                   , 0   , 32,
20934        0xfc000007, 0xc0000003, 0                      , 0,
20935        0x0                 },        /* POOL32S~*(3) */
20936     { pool                , POOL32S_4           , 8   , 32,
20937        0xfc000007, 0xc0000004, 0                      , 0,
20938        0x0                 },        /* POOL32S_4 */
20939     { reserved_block      , 0                   , 0   , 32,
20940        0xfc000007, 0xc0000005, 0                      , 0,
20941        0x0                 },        /* POOL32S~*(5) */
20942     { reserved_block      , 0                   , 0   , 32,
20943        0xfc000007, 0xc0000006, 0                      , 0,
20944        0x0                 },        /* POOL32S~*(6) */
20945     { reserved_block      , 0                   , 0   , 32,
20946        0xfc000007, 0xc0000007, 0                      , 0,
20947        0x0                 },        /* POOL32S~*(7) */
20948 };
20949
20950
20951 NMD::Pool NMD::P_LUI[2] = {
20952     { instruction         , 0                   , 0   , 32,
20953        0xfc000002, 0xe0000000, &NMD::LUI              , 0,
20954        0x0                 },        /* LUI */
20955     { instruction         , 0                   , 0   , 32,
20956        0xfc000002, 0xe0000002, &NMD::ALUIPC           , 0,
20957        0x0                 },        /* ALUIPC */
20958 };
20959
20960
20961 NMD::Pool NMD::P_GP_LH[2] = {
20962     { instruction         , 0                   , 0   , 32,
20963        0xfc1c0001, 0x44100000, &NMD::LH_GP_           , 0,
20964        0x0                 },        /* LH[GP] */
20965     { instruction         , 0                   , 0   , 32,
20966        0xfc1c0001, 0x44100001, &NMD::LHU_GP_          , 0,
20967        0x0                 },        /* LHU[GP] */
20968 };
20969
20970
20971 NMD::Pool NMD::P_GP_SH[2] = {
20972     { instruction         , 0                   , 0   , 32,
20973        0xfc1c0001, 0x44140000, &NMD::SH_GP_           , 0,
20974        0x0                 },        /* SH[GP] */
20975     { reserved_block      , 0                   , 0   , 32,
20976        0xfc1c0001, 0x44140001, 0                      , 0,
20977        0x0                 },        /* P.GP.SH~*(1) */
20978 };
20979
20980
20981 NMD::Pool NMD::P_GP_CP1[4] = {
20982     { instruction         , 0                   , 0   , 32,
20983        0xfc1c0003, 0x44180000, &NMD::LWC1_GP_         , 0,
20984        CP1_                },        /* LWC1[GP] */
20985     { instruction         , 0                   , 0   , 32,
20986        0xfc1c0003, 0x44180001, &NMD::SWC1_GP_         , 0,
20987        CP1_                },        /* SWC1[GP] */
20988     { instruction         , 0                   , 0   , 32,
20989        0xfc1c0003, 0x44180002, &NMD::LDC1_GP_         , 0,
20990        CP1_                },        /* LDC1[GP] */
20991     { instruction         , 0                   , 0   , 32,
20992        0xfc1c0003, 0x44180003, &NMD::SDC1_GP_         , 0,
20993        CP1_                },        /* SDC1[GP] */
20994 };
20995
20996
20997 NMD::Pool NMD::P_GP_M64[4] = {
20998     { instruction         , 0                   , 0   , 32,
20999        0xfc1c0003, 0x441c0000, &NMD::LWU_GP_          , 0,
21000        MIPS64_             },        /* LWU[GP] */
21001     { reserved_block      , 0                   , 0   , 32,
21002        0xfc1c0003, 0x441c0001, 0                      , 0,
21003        0x0                 },        /* P.GP.M64~*(1) */
21004     { reserved_block      , 0                   , 0   , 32,
21005        0xfc1c0003, 0x441c0002, 0                      , 0,
21006        0x0                 },        /* P.GP.M64~*(2) */
21007     { reserved_block      , 0                   , 0   , 32,
21008        0xfc1c0003, 0x441c0003, 0                      , 0,
21009        0x0                 },        /* P.GP.M64~*(3) */
21010 };
21011
21012
21013 NMD::Pool NMD::P_GP_BH[8] = {
21014     { instruction         , 0                   , 0   , 32,
21015        0xfc1c0000, 0x44000000, &NMD::LB_GP_           , 0,
21016        0x0                 },        /* LB[GP] */
21017     { instruction         , 0                   , 0   , 32,
21018        0xfc1c0000, 0x44040000, &NMD::SB_GP_           , 0,
21019        0x0                 },        /* SB[GP] */
21020     { instruction         , 0                   , 0   , 32,
21021        0xfc1c0000, 0x44080000, &NMD::LBU_GP_          , 0,
21022        0x0                 },        /* LBU[GP] */
21023     { instruction         , 0                   , 0   , 32,
21024        0xfc1c0000, 0x440c0000, &NMD::ADDIU_GP_B_      , 0,
21025        0x0                 },        /* ADDIU[GP.B] */
21026     { pool                , P_GP_LH             , 2   , 32,
21027        0xfc1c0000, 0x44100000, 0                      , 0,
21028        0x0                 },        /* P.GP.LH */
21029     { pool                , P_GP_SH             , 2   , 32,
21030        0xfc1c0000, 0x44140000, 0                      , 0,
21031        0x0                 },        /* P.GP.SH */
21032     { pool                , P_GP_CP1            , 4   , 32,
21033        0xfc1c0000, 0x44180000, 0                      , 0,
21034        0x0                 },        /* P.GP.CP1 */
21035     { pool                , P_GP_M64            , 4   , 32,
21036        0xfc1c0000, 0x441c0000, 0                      , 0,
21037        0x0                 },        /* P.GP.M64 */
21038 };
21039
21040
21041 NMD::Pool NMD::P_LS_U12[16] = {
21042     { instruction         , 0                   , 0   , 32,
21043        0xfc00f000, 0x84000000, &NMD::LB_U12_          , 0,
21044        0x0                 },        /* LB[U12] */
21045     { instruction         , 0                   , 0   , 32,
21046        0xfc00f000, 0x84001000, &NMD::SB_U12_          , 0,
21047        0x0                 },        /* SB[U12] */
21048     { instruction         , 0                   , 0   , 32,
21049        0xfc00f000, 0x84002000, &NMD::LBU_U12_         , 0,
21050        0x0                 },        /* LBU[U12] */
21051     { instruction         , 0                   , 0   , 32,
21052        0xfc00f000, 0x84003000, &NMD::PREF_U12_        , 0,
21053        0x0                 },        /* PREF[U12] */
21054     { instruction         , 0                   , 0   , 32,
21055        0xfc00f000, 0x84004000, &NMD::LH_U12_          , 0,
21056        0x0                 },        /* LH[U12] */
21057     { instruction         , 0                   , 0   , 32,
21058        0xfc00f000, 0x84005000, &NMD::SH_U12_          , 0,
21059        0x0                 },        /* SH[U12] */
21060     { instruction         , 0                   , 0   , 32,
21061        0xfc00f000, 0x84006000, &NMD::LHU_U12_         , 0,
21062        0x0                 },        /* LHU[U12] */
21063     { instruction         , 0                   , 0   , 32,
21064        0xfc00f000, 0x84007000, &NMD::LWU_U12_         , 0,
21065        MIPS64_             },        /* LWU[U12] */
21066     { instruction         , 0                   , 0   , 32,
21067        0xfc00f000, 0x84008000, &NMD::LW_U12_          , 0,
21068        0x0                 },        /* LW[U12] */
21069     { instruction         , 0                   , 0   , 32,
21070        0xfc00f000, 0x84009000, &NMD::SW_U12_          , 0,
21071        0x0                 },        /* SW[U12] */
21072     { instruction         , 0                   , 0   , 32,
21073        0xfc00f000, 0x8400a000, &NMD::LWC1_U12_        , 0,
21074        CP1_                },        /* LWC1[U12] */
21075     { instruction         , 0                   , 0   , 32,
21076        0xfc00f000, 0x8400b000, &NMD::SWC1_U12_        , 0,
21077        CP1_                },        /* SWC1[U12] */
21078     { instruction         , 0                   , 0   , 32,
21079        0xfc00f000, 0x8400c000, &NMD::LD_U12_          , 0,
21080        MIPS64_             },        /* LD[U12] */
21081     { instruction         , 0                   , 0   , 32,
21082        0xfc00f000, 0x8400d000, &NMD::SD_U12_          , 0,
21083        MIPS64_             },        /* SD[U12] */
21084     { instruction         , 0                   , 0   , 32,
21085        0xfc00f000, 0x8400e000, &NMD::LDC1_U12_        , 0,
21086        CP1_                },        /* LDC1[U12] */
21087     { instruction         , 0                   , 0   , 32,
21088        0xfc00f000, 0x8400f000, &NMD::SDC1_U12_        , 0,
21089        CP1_                },        /* SDC1[U12] */
21090 };
21091
21092
21093 NMD::Pool NMD::P_PREF_S9_[2] = {
21094     { instruction         , 0                   , 0   , 32,
21095        0xffe07f00, 0xa7e01800, &NMD::SYNCI            , 0,
21096        0x0                 },        /* SYNCI */
21097     { instruction         , 0                   , 0   , 32,
21098        0xfc007f00, 0xa4001800, &NMD::PREF_S9_         , &NMD::PREF_S9__cond    ,
21099        0x0                 },        /* PREF[S9] */
21100 };
21101
21102
21103 NMD::Pool NMD::P_LS_S0[16] = {
21104     { instruction         , 0                   , 0   , 32,
21105        0xfc007f00, 0xa4000000, &NMD::LB_S9_           , 0,
21106        0x0                 },        /* LB[S9] */
21107     { instruction         , 0                   , 0   , 32,
21108        0xfc007f00, 0xa4000800, &NMD::SB_S9_           , 0,
21109        0x0                 },        /* SB[S9] */
21110     { instruction         , 0                   , 0   , 32,
21111        0xfc007f00, 0xa4001000, &NMD::LBU_S9_          , 0,
21112        0x0                 },        /* LBU[S9] */
21113     { pool                , P_PREF_S9_          , 2   , 32,
21114        0xfc007f00, 0xa4001800, 0                      , 0,
21115        0x0                 },        /* P.PREF[S9] */
21116     { instruction         , 0                   , 0   , 32,
21117        0xfc007f00, 0xa4002000, &NMD::LH_S9_           , 0,
21118        0x0                 },        /* LH[S9] */
21119     { instruction         , 0                   , 0   , 32,
21120        0xfc007f00, 0xa4002800, &NMD::SH_S9_           , 0,
21121        0x0                 },        /* SH[S9] */
21122     { instruction         , 0                   , 0   , 32,
21123        0xfc007f00, 0xa4003000, &NMD::LHU_S9_          , 0,
21124        0x0                 },        /* LHU[S9] */
21125     { instruction         , 0                   , 0   , 32,
21126        0xfc007f00, 0xa4003800, &NMD::LWU_S9_          , 0,
21127        MIPS64_             },        /* LWU[S9] */
21128     { instruction         , 0                   , 0   , 32,
21129        0xfc007f00, 0xa4004000, &NMD::LW_S9_           , 0,
21130        0x0                 },        /* LW[S9] */
21131     { instruction         , 0                   , 0   , 32,
21132        0xfc007f00, 0xa4004800, &NMD::SW_S9_           , 0,
21133        0x0                 },        /* SW[S9] */
21134     { instruction         , 0                   , 0   , 32,
21135        0xfc007f00, 0xa4005000, &NMD::LWC1_S9_         , 0,
21136        CP1_                },        /* LWC1[S9] */
21137     { instruction         , 0                   , 0   , 32,
21138        0xfc007f00, 0xa4005800, &NMD::SWC1_S9_         , 0,
21139        CP1_                },        /* SWC1[S9] */
21140     { instruction         , 0                   , 0   , 32,
21141        0xfc007f00, 0xa4006000, &NMD::LD_S9_           , 0,
21142        MIPS64_             },        /* LD[S9] */
21143     { instruction         , 0                   , 0   , 32,
21144        0xfc007f00, 0xa4006800, &NMD::SD_S9_           , 0,
21145        MIPS64_             },        /* SD[S9] */
21146     { instruction         , 0                   , 0   , 32,
21147        0xfc007f00, 0xa4007000, &NMD::LDC1_S9_         , 0,
21148        CP1_                },        /* LDC1[S9] */
21149     { instruction         , 0                   , 0   , 32,
21150        0xfc007f00, 0xa4007800, &NMD::SDC1_S9_         , 0,
21151        CP1_                },        /* SDC1[S9] */
21152 };
21153
21154
21155 NMD::Pool NMD::ASET_ACLR[2] = {
21156     { instruction         , 0                   , 0   , 32,
21157        0xfe007f00, 0xa4001100, &NMD::ASET             , 0,
21158        MCU_                },        /* ASET */
21159     { instruction         , 0                   , 0   , 32,
21160        0xfe007f00, 0xa6001100, &NMD::ACLR             , 0,
21161        MCU_                },        /* ACLR */
21162 };
21163
21164
21165 NMD::Pool NMD::P_LL[4] = {
21166     { instruction         , 0                   , 0   , 32,
21167        0xfc007f03, 0xa4005100, &NMD::LL               , 0,
21168        0x0                 },        /* LL */
21169     { instruction         , 0                   , 0   , 32,
21170        0xfc007f03, 0xa4005101, &NMD::LLWP             , 0,
21171        XNP_                },        /* LLWP */
21172     { reserved_block      , 0                   , 0   , 32,
21173        0xfc007f03, 0xa4005102, 0                      , 0,
21174        0x0                 },        /* P.LL~*(2) */
21175     { reserved_block      , 0                   , 0   , 32,
21176        0xfc007f03, 0xa4005103, 0                      , 0,
21177        0x0                 },        /* P.LL~*(3) */
21178 };
21179
21180
21181 NMD::Pool NMD::P_SC[4] = {
21182     { instruction         , 0                   , 0   , 32,
21183        0xfc007f03, 0xa4005900, &NMD::SC               , 0,
21184        0x0                 },        /* SC */
21185     { instruction         , 0                   , 0   , 32,
21186        0xfc007f03, 0xa4005901, &NMD::SCWP             , 0,
21187        XNP_                },        /* SCWP */
21188     { reserved_block      , 0                   , 0   , 32,
21189        0xfc007f03, 0xa4005902, 0                      , 0,
21190        0x0                 },        /* P.SC~*(2) */
21191     { reserved_block      , 0                   , 0   , 32,
21192        0xfc007f03, 0xa4005903, 0                      , 0,
21193        0x0                 },        /* P.SC~*(3) */
21194 };
21195
21196
21197 NMD::Pool NMD::P_LLD[8] = {
21198     { instruction         , 0                   , 0   , 32,
21199        0xfc007f07, 0xa4007100, &NMD::LLD              , 0,
21200        MIPS64_             },        /* LLD */
21201     { instruction         , 0                   , 0   , 32,
21202        0xfc007f07, 0xa4007101, &NMD::LLDP             , 0,
21203        MIPS64_             },        /* LLDP */
21204     { reserved_block      , 0                   , 0   , 32,
21205        0xfc007f07, 0xa4007102, 0                      , 0,
21206        0x0                 },        /* P.LLD~*(2) */
21207     { reserved_block      , 0                   , 0   , 32,
21208        0xfc007f07, 0xa4007103, 0                      , 0,
21209        0x0                 },        /* P.LLD~*(3) */
21210     { reserved_block      , 0                   , 0   , 32,
21211        0xfc007f07, 0xa4007104, 0                      , 0,
21212        0x0                 },        /* P.LLD~*(4) */
21213     { reserved_block      , 0                   , 0   , 32,
21214        0xfc007f07, 0xa4007105, 0                      , 0,
21215        0x0                 },        /* P.LLD~*(5) */
21216     { reserved_block      , 0                   , 0   , 32,
21217        0xfc007f07, 0xa4007106, 0                      , 0,
21218        0x0                 },        /* P.LLD~*(6) */
21219     { reserved_block      , 0                   , 0   , 32,
21220        0xfc007f07, 0xa4007107, 0                      , 0,
21221        0x0                 },        /* P.LLD~*(7) */
21222 };
21223
21224
21225 NMD::Pool NMD::P_SCD[8] = {
21226     { instruction         , 0                   , 0   , 32,
21227        0xfc007f07, 0xa4007900, &NMD::SCD              , 0,
21228        MIPS64_             },        /* SCD */
21229     { instruction         , 0                   , 0   , 32,
21230        0xfc007f07, 0xa4007901, &NMD::SCDP             , 0,
21231        MIPS64_             },        /* SCDP */
21232     { reserved_block      , 0                   , 0   , 32,
21233        0xfc007f07, 0xa4007902, 0                      , 0,
21234        0x0                 },        /* P.SCD~*(2) */
21235     { reserved_block      , 0                   , 0   , 32,
21236        0xfc007f07, 0xa4007903, 0                      , 0,
21237        0x0                 },        /* P.SCD~*(3) */
21238     { reserved_block      , 0                   , 0   , 32,
21239        0xfc007f07, 0xa4007904, 0                      , 0,
21240        0x0                 },        /* P.SCD~*(4) */
21241     { reserved_block      , 0                   , 0   , 32,
21242        0xfc007f07, 0xa4007905, 0                      , 0,
21243        0x0                 },        /* P.SCD~*(5) */
21244     { reserved_block      , 0                   , 0   , 32,
21245        0xfc007f07, 0xa4007906, 0                      , 0,
21246        0x0                 },        /* P.SCD~*(6) */
21247     { reserved_block      , 0                   , 0   , 32,
21248        0xfc007f07, 0xa4007907, 0                      , 0,
21249        0x0                 },        /* P.SCD~*(7) */
21250 };
21251
21252
21253 NMD::Pool NMD::P_LS_S1[16] = {
21254     { reserved_block      , 0                   , 0   , 32,
21255        0xfc007f00, 0xa4000100, 0                      , 0,
21256        0x0                 },        /* P.LS.S1~*(0) */
21257     { reserved_block      , 0                   , 0   , 32,
21258        0xfc007f00, 0xa4000900, 0                      , 0,
21259        0x0                 },        /* P.LS.S1~*(1) */
21260     { pool                , ASET_ACLR           , 2   , 32,
21261        0xfc007f00, 0xa4001100, 0                      , 0,
21262        0x0                 },        /* ASET_ACLR */
21263     { reserved_block      , 0                   , 0   , 32,
21264        0xfc007f00, 0xa4001900, 0                      , 0,
21265        0x0                 },        /* P.LS.S1~*(3) */
21266     { instruction         , 0                   , 0   , 32,
21267        0xfc007f00, 0xa4002100, &NMD::UALH             , 0,
21268        XMMS_               },        /* UALH */
21269     { instruction         , 0                   , 0   , 32,
21270        0xfc007f00, 0xa4002900, &NMD::UASH             , 0,
21271        XMMS_               },        /* UASH */
21272     { reserved_block      , 0                   , 0   , 32,
21273        0xfc007f00, 0xa4003100, 0                      , 0,
21274        0x0                 },        /* P.LS.S1~*(6) */
21275     { instruction         , 0                   , 0   , 32,
21276        0xfc007f00, 0xa4003900, &NMD::CACHE            , 0,
21277        CP0_                },        /* CACHE */
21278     { instruction         , 0                   , 0   , 32,
21279        0xfc007f00, 0xa4004100, &NMD::LWC2             , 0,
21280        CP2_                },        /* LWC2 */
21281     { instruction         , 0                   , 0   , 32,
21282        0xfc007f00, 0xa4004900, &NMD::SWC2             , 0,
21283        CP2_                },        /* SWC2 */
21284     { pool                , P_LL                , 4   , 32,
21285        0xfc007f00, 0xa4005100, 0                      , 0,
21286        0x0                 },        /* P.LL */
21287     { pool                , P_SC                , 4   , 32,
21288        0xfc007f00, 0xa4005900, 0                      , 0,
21289        0x0                 },        /* P.SC */
21290     { instruction         , 0                   , 0   , 32,
21291        0xfc007f00, 0xa4006100, &NMD::LDC2             , 0,
21292        CP2_                },        /* LDC2 */
21293     { instruction         , 0                   , 0   , 32,
21294        0xfc007f00, 0xa4006900, &NMD::SDC2             , 0,
21295        CP2_                },        /* SDC2 */
21296     { pool                , P_LLD               , 8   , 32,
21297        0xfc007f00, 0xa4007100, 0                      , 0,
21298        0x0                 },        /* P.LLD */
21299     { pool                , P_SCD               , 8   , 32,
21300        0xfc007f00, 0xa4007900, 0                      , 0,
21301        0x0                 },        /* P.SCD */
21302 };
21303
21304
21305 NMD::Pool NMD::P_PREFE[2] = {
21306     { instruction         , 0                   , 0   , 32,
21307        0xffe07f00, 0xa7e01a00, &NMD::SYNCIE           , 0,
21308        CP0_ | EVA_         },        /* SYNCIE */
21309     { instruction         , 0                   , 0   , 32,
21310        0xfc007f00, 0xa4001a00, &NMD::PREFE            , &NMD::PREFE_cond       ,
21311        CP0_ | EVA_         },        /* PREFE */
21312 };
21313
21314
21315 NMD::Pool NMD::P_LLE[4] = {
21316     { instruction         , 0                   , 0   , 32,
21317        0xfc007f03, 0xa4005200, &NMD::LLE              , 0,
21318        CP0_ | EVA_         },        /* LLE */
21319     { instruction         , 0                   , 0   , 32,
21320        0xfc007f03, 0xa4005201, &NMD::LLWPE            , 0,
21321        CP0_ | EVA_         },        /* LLWPE */
21322     { reserved_block      , 0                   , 0   , 32,
21323        0xfc007f03, 0xa4005202, 0                      , 0,
21324        0x0                 },        /* P.LLE~*(2) */
21325     { reserved_block      , 0                   , 0   , 32,
21326        0xfc007f03, 0xa4005203, 0                      , 0,
21327        0x0                 },        /* P.LLE~*(3) */
21328 };
21329
21330
21331 NMD::Pool NMD::P_SCE[4] = {
21332     { instruction         , 0                   , 0   , 32,
21333        0xfc007f03, 0xa4005a00, &NMD::SCE              , 0,
21334        CP0_ | EVA_         },        /* SCE */
21335     { instruction         , 0                   , 0   , 32,
21336        0xfc007f03, 0xa4005a01, &NMD::SCWPE            , 0,
21337        CP0_ | EVA_         },        /* SCWPE */
21338     { reserved_block      , 0                   , 0   , 32,
21339        0xfc007f03, 0xa4005a02, 0                      , 0,
21340        0x0                 },        /* P.SCE~*(2) */
21341     { reserved_block      , 0                   , 0   , 32,
21342        0xfc007f03, 0xa4005a03, 0                      , 0,
21343        0x0                 },        /* P.SCE~*(3) */
21344 };
21345
21346
21347 NMD::Pool NMD::P_LS_E0[16] = {
21348     { instruction         , 0                   , 0   , 32,
21349        0xfc007f00, 0xa4000200, &NMD::LBE              , 0,
21350        CP0_ | EVA_         },        /* LBE */
21351     { instruction         , 0                   , 0   , 32,
21352        0xfc007f00, 0xa4000a00, &NMD::SBE              , 0,
21353        CP0_ | EVA_         },        /* SBE */
21354     { instruction         , 0                   , 0   , 32,
21355        0xfc007f00, 0xa4001200, &NMD::LBUE             , 0,
21356        CP0_ | EVA_         },        /* LBUE */
21357     { pool                , P_PREFE             , 2   , 32,
21358        0xfc007f00, 0xa4001a00, 0                      , 0,
21359        0x0                 },        /* P.PREFE */
21360     { instruction         , 0                   , 0   , 32,
21361        0xfc007f00, 0xa4002200, &NMD::LHE              , 0,
21362        CP0_ | EVA_         },        /* LHE */
21363     { instruction         , 0                   , 0   , 32,
21364        0xfc007f00, 0xa4002a00, &NMD::SHE              , 0,
21365        CP0_ | EVA_         },        /* SHE */
21366     { instruction         , 0                   , 0   , 32,
21367        0xfc007f00, 0xa4003200, &NMD::LHUE             , 0,
21368        CP0_ | EVA_         },        /* LHUE */
21369     { instruction         , 0                   , 0   , 32,
21370        0xfc007f00, 0xa4003a00, &NMD::CACHEE           , 0,
21371        CP0_ | EVA_         },        /* CACHEE */
21372     { instruction         , 0                   , 0   , 32,
21373        0xfc007f00, 0xa4004200, &NMD::LWE              , 0,
21374        CP0_ | EVA_         },        /* LWE */
21375     { instruction         , 0                   , 0   , 32,
21376        0xfc007f00, 0xa4004a00, &NMD::SWE              , 0,
21377        CP0_ | EVA_         },        /* SWE */
21378     { pool                , P_LLE               , 4   , 32,
21379        0xfc007f00, 0xa4005200, 0                      , 0,
21380        0x0                 },        /* P.LLE */
21381     { pool                , P_SCE               , 4   , 32,
21382        0xfc007f00, 0xa4005a00, 0                      , 0,
21383        0x0                 },        /* P.SCE */
21384     { reserved_block      , 0                   , 0   , 32,
21385        0xfc007f00, 0xa4006200, 0                      , 0,
21386        0x0                 },        /* P.LS.E0~*(12) */
21387     { reserved_block      , 0                   , 0   , 32,
21388        0xfc007f00, 0xa4006a00, 0                      , 0,
21389        0x0                 },        /* P.LS.E0~*(13) */
21390     { reserved_block      , 0                   , 0   , 32,
21391        0xfc007f00, 0xa4007200, 0                      , 0,
21392        0x0                 },        /* P.LS.E0~*(14) */
21393     { reserved_block      , 0                   , 0   , 32,
21394        0xfc007f00, 0xa4007a00, 0                      , 0,
21395        0x0                 },        /* P.LS.E0~*(15) */
21396 };
21397
21398
21399 NMD::Pool NMD::P_LS_WM[2] = {
21400     { instruction         , 0                   , 0   , 32,
21401        0xfc000f00, 0xa4000400, &NMD::LWM              , 0,
21402        XMMS_               },        /* LWM */
21403     { instruction         , 0                   , 0   , 32,
21404        0xfc000f00, 0xa4000c00, &NMD::SWM              , 0,
21405        XMMS_               },        /* SWM */
21406 };
21407
21408
21409 NMD::Pool NMD::P_LS_UAWM[2] = {
21410     { instruction         , 0                   , 0   , 32,
21411        0xfc000f00, 0xa4000500, &NMD::UALWM            , 0,
21412        XMMS_               },        /* UALWM */
21413     { instruction         , 0                   , 0   , 32,
21414        0xfc000f00, 0xa4000d00, &NMD::UASWM            , 0,
21415        XMMS_               },        /* UASWM */
21416 };
21417
21418
21419 NMD::Pool NMD::P_LS_DM[2] = {
21420     { instruction         , 0                   , 0   , 32,
21421        0xfc000f00, 0xa4000600, &NMD::LDM              , 0,
21422        MIPS64_             },        /* LDM */
21423     { instruction         , 0                   , 0   , 32,
21424        0xfc000f00, 0xa4000e00, &NMD::SDM              , 0,
21425        MIPS64_             },        /* SDM */
21426 };
21427
21428
21429 NMD::Pool NMD::P_LS_UADM[2] = {
21430     { instruction         , 0                   , 0   , 32,
21431        0xfc000f00, 0xa4000700, &NMD::UALDM            , 0,
21432        MIPS64_             },        /* UALDM */
21433     { instruction         , 0                   , 0   , 32,
21434        0xfc000f00, 0xa4000f00, &NMD::UASDM            , 0,
21435        MIPS64_             },        /* UASDM */
21436 };
21437
21438
21439 NMD::Pool NMD::P_LS_S9[8] = {
21440     { pool                , P_LS_S0             , 16  , 32,
21441        0xfc000700, 0xa4000000, 0                      , 0,
21442        0x0                 },        /* P.LS.S0 */
21443     { pool                , P_LS_S1             , 16  , 32,
21444        0xfc000700, 0xa4000100, 0                      , 0,
21445        0x0                 },        /* P.LS.S1 */
21446     { pool                , P_LS_E0             , 16  , 32,
21447        0xfc000700, 0xa4000200, 0                      , 0,
21448        0x0                 },        /* P.LS.E0 */
21449     { reserved_block      , 0                   , 0   , 32,
21450        0xfc000700, 0xa4000300, 0                      , 0,
21451        0x0                 },        /* P.LS.S9~*(3) */
21452     { pool                , P_LS_WM             , 2   , 32,
21453        0xfc000700, 0xa4000400, 0                      , 0,
21454        0x0                 },        /* P.LS.WM */
21455     { pool                , P_LS_UAWM           , 2   , 32,
21456        0xfc000700, 0xa4000500, 0                      , 0,
21457        0x0                 },        /* P.LS.UAWM */
21458     { pool                , P_LS_DM             , 2   , 32,
21459        0xfc000700, 0xa4000600, 0                      , 0,
21460        0x0                 },        /* P.LS.DM */
21461     { pool                , P_LS_UADM           , 2   , 32,
21462        0xfc000700, 0xa4000700, 0                      , 0,
21463        0x0                 },        /* P.LS.UADM */
21464 };
21465
21466
21467 NMD::Pool NMD::P_BAL[2] = {
21468     { branch_instruction  , 0                   , 0   , 32,
21469        0xfe000000, 0x28000000, &NMD::BC_32_           , 0,
21470        0x0                 },        /* BC[32] */
21471     { call_instruction    , 0                   , 0   , 32,
21472        0xfe000000, 0x2a000000, &NMD::BALC_32_         , 0,
21473        0x0                 },        /* BALC[32] */
21474 };
21475
21476
21477 NMD::Pool NMD::P_BALRSC[2] = {
21478     { branch_instruction  , 0                   , 0   , 32,
21479        0xffe0f000, 0x48008000, &NMD::BRSC             , 0,
21480        0x0                 },        /* BRSC */
21481     { call_instruction    , 0                   , 0   , 32,
21482        0xfc00f000, 0x48008000, &NMD::BALRSC           , &NMD::BALRSC_cond      ,
21483        0x0                 },        /* BALRSC */
21484 };
21485
21486
21487 NMD::Pool NMD::P_J[16] = {
21488     { call_instruction    , 0                   , 0   , 32,
21489        0xfc00f000, 0x48000000, &NMD::JALRC_32_        , 0,
21490        0x0                 },        /* JALRC[32] */
21491     { call_instruction    , 0                   , 0   , 32,
21492        0xfc00f000, 0x48001000, &NMD::JALRC_HB         , 0,
21493        0x0                 },        /* JALRC.HB */
21494     { reserved_block      , 0                   , 0   , 32,
21495        0xfc00f000, 0x48002000, 0                      , 0,
21496        0x0                 },        /* P.J~*(2) */
21497     { reserved_block      , 0                   , 0   , 32,
21498        0xfc00f000, 0x48003000, 0                      , 0,
21499        0x0                 },        /* P.J~*(3) */
21500     { reserved_block      , 0                   , 0   , 32,
21501        0xfc00f000, 0x48004000, 0                      , 0,
21502        0x0                 },        /* P.J~*(4) */
21503     { reserved_block      , 0                   , 0   , 32,
21504        0xfc00f000, 0x48005000, 0                      , 0,
21505        0x0                 },        /* P.J~*(5) */
21506     { reserved_block      , 0                   , 0   , 32,
21507        0xfc00f000, 0x48006000, 0                      , 0,
21508        0x0                 },        /* P.J~*(6) */
21509     { reserved_block      , 0                   , 0   , 32,
21510        0xfc00f000, 0x48007000, 0                      , 0,
21511        0x0                 },        /* P.J~*(7) */
21512     { pool                , P_BALRSC            , 2   , 32,
21513        0xfc00f000, 0x48008000, 0                      , 0,
21514        0x0                 },        /* P.BALRSC */
21515     { reserved_block      , 0                   , 0   , 32,
21516        0xfc00f000, 0x48009000, 0                      , 0,
21517        0x0                 },        /* P.J~*(9) */
21518     { reserved_block      , 0                   , 0   , 32,
21519        0xfc00f000, 0x4800a000, 0                      , 0,
21520        0x0                 },        /* P.J~*(10) */
21521     { reserved_block      , 0                   , 0   , 32,
21522        0xfc00f000, 0x4800b000, 0                      , 0,
21523        0x0                 },        /* P.J~*(11) */
21524     { reserved_block      , 0                   , 0   , 32,
21525        0xfc00f000, 0x4800c000, 0                      , 0,
21526        0x0                 },        /* P.J~*(12) */
21527     { reserved_block      , 0                   , 0   , 32,
21528        0xfc00f000, 0x4800d000, 0                      , 0,
21529        0x0                 },        /* P.J~*(13) */
21530     { reserved_block      , 0                   , 0   , 32,
21531        0xfc00f000, 0x4800e000, 0                      , 0,
21532        0x0                 },        /* P.J~*(14) */
21533     { reserved_block      , 0                   , 0   , 32,
21534        0xfc00f000, 0x4800f000, 0                      , 0,
21535        0x0                 },        /* P.J~*(15) */
21536 };
21537
21538
21539 NMD::Pool NMD::P_BR3A[32] = {
21540     { branch_instruction  , 0                   , 0   , 32,
21541        0xfc1fc000, 0x88004000, &NMD::BC1EQZC          , 0,
21542        CP1_                },        /* BC1EQZC */
21543     { branch_instruction  , 0                   , 0   , 32,
21544        0xfc1fc000, 0x88014000, &NMD::BC1NEZC          , 0,
21545        CP1_                },        /* BC1NEZC */
21546     { branch_instruction  , 0                   , 0   , 32,
21547        0xfc1fc000, 0x88024000, &NMD::BC2EQZC          , 0,
21548        CP2_                },        /* BC2EQZC */
21549     { branch_instruction  , 0                   , 0   , 32,
21550        0xfc1fc000, 0x88034000, &NMD::BC2NEZC          , 0,
21551        CP2_                },        /* BC2NEZC */
21552     { branch_instruction  , 0                   , 0   , 32,
21553        0xfc1fc000, 0x88044000, &NMD::BPOSGE32C        , 0,
21554        DSP_                },        /* BPOSGE32C */
21555     { reserved_block      , 0                   , 0   , 32,
21556        0xfc1fc000, 0x88054000, 0                      , 0,
21557        0x0                 },        /* P.BR3A~*(5) */
21558     { reserved_block      , 0                   , 0   , 32,
21559        0xfc1fc000, 0x88064000, 0                      , 0,
21560        0x0                 },        /* P.BR3A~*(6) */
21561     { reserved_block      , 0                   , 0   , 32,
21562        0xfc1fc000, 0x88074000, 0                      , 0,
21563        0x0                 },        /* P.BR3A~*(7) */
21564     { reserved_block      , 0                   , 0   , 32,
21565        0xfc1fc000, 0x88084000, 0                      , 0,
21566        0x0                 },        /* P.BR3A~*(8) */
21567     { reserved_block      , 0                   , 0   , 32,
21568        0xfc1fc000, 0x88094000, 0                      , 0,
21569        0x0                 },        /* P.BR3A~*(9) */
21570     { reserved_block      , 0                   , 0   , 32,
21571        0xfc1fc000, 0x880a4000, 0                      , 0,
21572        0x0                 },        /* P.BR3A~*(10) */
21573     { reserved_block      , 0                   , 0   , 32,
21574        0xfc1fc000, 0x880b4000, 0                      , 0,
21575        0x0                 },        /* P.BR3A~*(11) */
21576     { reserved_block      , 0                   , 0   , 32,
21577        0xfc1fc000, 0x880c4000, 0                      , 0,
21578        0x0                 },        /* P.BR3A~*(12) */
21579     { reserved_block      , 0                   , 0   , 32,
21580        0xfc1fc000, 0x880d4000, 0                      , 0,
21581        0x0                 },        /* P.BR3A~*(13) */
21582     { reserved_block      , 0                   , 0   , 32,
21583        0xfc1fc000, 0x880e4000, 0                      , 0,
21584        0x0                 },        /* P.BR3A~*(14) */
21585     { reserved_block      , 0                   , 0   , 32,
21586        0xfc1fc000, 0x880f4000, 0                      , 0,
21587        0x0                 },        /* P.BR3A~*(15) */
21588     { reserved_block      , 0                   , 0   , 32,
21589        0xfc1fc000, 0x88104000, 0                      , 0,
21590        0x0                 },        /* P.BR3A~*(16) */
21591     { reserved_block      , 0                   , 0   , 32,
21592        0xfc1fc000, 0x88114000, 0                      , 0,
21593        0x0                 },        /* P.BR3A~*(17) */
21594     { reserved_block      , 0                   , 0   , 32,
21595        0xfc1fc000, 0x88124000, 0                      , 0,
21596        0x0                 },        /* P.BR3A~*(18) */
21597     { reserved_block      , 0                   , 0   , 32,
21598        0xfc1fc000, 0x88134000, 0                      , 0,
21599        0x0                 },        /* P.BR3A~*(19) */
21600     { reserved_block      , 0                   , 0   , 32,
21601        0xfc1fc000, 0x88144000, 0                      , 0,
21602        0x0                 },        /* P.BR3A~*(20) */
21603     { reserved_block      , 0                   , 0   , 32,
21604        0xfc1fc000, 0x88154000, 0                      , 0,
21605        0x0                 },        /* P.BR3A~*(21) */
21606     { reserved_block      , 0                   , 0   , 32,
21607        0xfc1fc000, 0x88164000, 0                      , 0,
21608        0x0                 },        /* P.BR3A~*(22) */
21609     { reserved_block      , 0                   , 0   , 32,
21610        0xfc1fc000, 0x88174000, 0                      , 0,
21611        0x0                 },        /* P.BR3A~*(23) */
21612     { reserved_block      , 0                   , 0   , 32,
21613        0xfc1fc000, 0x88184000, 0                      , 0,
21614        0x0                 },        /* P.BR3A~*(24) */
21615     { reserved_block      , 0                   , 0   , 32,
21616        0xfc1fc000, 0x88194000, 0                      , 0,
21617        0x0                 },        /* P.BR3A~*(25) */
21618     { reserved_block      , 0                   , 0   , 32,
21619        0xfc1fc000, 0x881a4000, 0                      , 0,
21620        0x0                 },        /* P.BR3A~*(26) */
21621     { reserved_block      , 0                   , 0   , 32,
21622        0xfc1fc000, 0x881b4000, 0                      , 0,
21623        0x0                 },        /* P.BR3A~*(27) */
21624     { reserved_block      , 0                   , 0   , 32,
21625        0xfc1fc000, 0x881c4000, 0                      , 0,
21626        0x0                 },        /* P.BR3A~*(28) */
21627     { reserved_block      , 0                   , 0   , 32,
21628        0xfc1fc000, 0x881d4000, 0                      , 0,
21629        0x0                 },        /* P.BR3A~*(29) */
21630     { reserved_block      , 0                   , 0   , 32,
21631        0xfc1fc000, 0x881e4000, 0                      , 0,
21632        0x0                 },        /* P.BR3A~*(30) */
21633     { reserved_block      , 0                   , 0   , 32,
21634        0xfc1fc000, 0x881f4000, 0                      , 0,
21635        0x0                 },        /* P.BR3A~*(31) */
21636 };
21637
21638
21639 NMD::Pool NMD::P_BR1[4] = {
21640     { branch_instruction  , 0                   , 0   , 32,
21641        0xfc00c000, 0x88000000, &NMD::BEQC_32_         , 0,
21642        0x0                 },        /* BEQC[32] */
21643     { pool                , P_BR3A              , 32  , 32,
21644        0xfc00c000, 0x88004000, 0                      , 0,
21645        0x0                 },        /* P.BR3A */
21646     { branch_instruction  , 0                   , 0   , 32,
21647        0xfc00c000, 0x88008000, &NMD::BGEC             , 0,
21648        0x0                 },        /* BGEC */
21649     { branch_instruction  , 0                   , 0   , 32,
21650        0xfc00c000, 0x8800c000, &NMD::BGEUC            , 0,
21651        0x0                 },        /* BGEUC */
21652 };
21653
21654
21655 NMD::Pool NMD::P_BR2[4] = {
21656     { branch_instruction  , 0                   , 0   , 32,
21657        0xfc00c000, 0xa8000000, &NMD::BNEC_32_         , 0,
21658        0x0                 },        /* BNEC[32] */
21659     { reserved_block      , 0                   , 0   , 32,
21660        0xfc00c000, 0xa8004000, 0                      , 0,
21661        0x0                 },        /* P.BR2~*(1) */
21662     { branch_instruction  , 0                   , 0   , 32,
21663        0xfc00c000, 0xa8008000, &NMD::BLTC             , 0,
21664        0x0                 },        /* BLTC */
21665     { branch_instruction  , 0                   , 0   , 32,
21666        0xfc00c000, 0xa800c000, &NMD::BLTUC            , 0,
21667        0x0                 },        /* BLTUC */
21668 };
21669
21670
21671 NMD::Pool NMD::P_BRI[8] = {
21672     { branch_instruction  , 0                   , 0   , 32,
21673        0xfc1c0000, 0xc8000000, &NMD::BEQIC            , 0,
21674        0x0                 },        /* BEQIC */
21675     { branch_instruction  , 0                   , 0   , 32,
21676        0xfc1c0000, 0xc8040000, &NMD::BBEQZC           , 0,
21677        XMMS_               },        /* BBEQZC */
21678     { branch_instruction  , 0                   , 0   , 32,
21679        0xfc1c0000, 0xc8080000, &NMD::BGEIC            , 0,
21680        0x0                 },        /* BGEIC */
21681     { branch_instruction  , 0                   , 0   , 32,
21682        0xfc1c0000, 0xc80c0000, &NMD::BGEIUC           , 0,
21683        0x0                 },        /* BGEIUC */
21684     { branch_instruction  , 0                   , 0   , 32,
21685        0xfc1c0000, 0xc8100000, &NMD::BNEIC            , 0,
21686        0x0                 },        /* BNEIC */
21687     { branch_instruction  , 0                   , 0   , 32,
21688        0xfc1c0000, 0xc8140000, &NMD::BBNEZC           , 0,
21689        XMMS_               },        /* BBNEZC */
21690     { branch_instruction  , 0                   , 0   , 32,
21691        0xfc1c0000, 0xc8180000, &NMD::BLTIC            , 0,
21692        0x0                 },        /* BLTIC */
21693     { branch_instruction  , 0                   , 0   , 32,
21694        0xfc1c0000, 0xc81c0000, &NMD::BLTIUC           , 0,
21695        0x0                 },        /* BLTIUC */
21696 };
21697
21698
21699 NMD::Pool NMD::P32[32] = {
21700     { pool                , P_ADDIU             , 2   , 32,
21701        0xfc000000, 0x00000000, 0                      , 0,
21702        0x0                 },        /* P.ADDIU */
21703     { pool                , P32A                , 8   , 32,
21704        0xfc000000, 0x20000000, 0                      , 0,
21705        0x0                 },        /* P32A */
21706     { pool                , P_GP_W              , 4   , 32,
21707        0xfc000000, 0x40000000, 0                      , 0,
21708        0x0                 },        /* P.GP.W */
21709     { pool                , POOL48I             , 32  , 48,
21710        0xfc0000000000ull, 0x600000000000ull, 0                      , 0,
21711        0x0                 },        /* POOL48I */
21712     { pool                , P_U12               , 16  , 32,
21713        0xfc000000, 0x80000000, 0                      , 0,
21714        0x0                 },        /* P.U12 */
21715     { pool                , POOL32F             , 8   , 32,
21716        0xfc000000, 0xa0000000, 0                      , 0,
21717        CP1_                },        /* POOL32F */
21718     { pool                , POOL32S             , 8   , 32,
21719        0xfc000000, 0xc0000000, 0                      , 0,
21720        0x0                 },        /* POOL32S */
21721     { pool                , P_LUI               , 2   , 32,
21722        0xfc000000, 0xe0000000, 0                      , 0,
21723        0x0                 },        /* P.LUI */
21724     { instruction         , 0                   , 0   , 32,
21725        0xfc000000, 0x04000000, &NMD::ADDIUPC_32_      , 0,
21726        0x0                 },        /* ADDIUPC[32] */
21727     { reserved_block      , 0                   , 0   , 32,
21728        0xfc000000, 0x24000000, 0                      , 0,
21729        0x0                 },        /* P32~*(5) */
21730     { pool                , P_GP_BH             , 8   , 32,
21731        0xfc000000, 0x44000000, 0                      , 0,
21732        0x0                 },        /* P.GP.BH */
21733     { reserved_block      , 0                   , 0   , 32,
21734        0xfc000000, 0x64000000, 0                      , 0,
21735        0x0                 },        /* P32~*(13) */
21736     { pool                , P_LS_U12            , 16  , 32,
21737        0xfc000000, 0x84000000, 0                      , 0,
21738        0x0                 },        /* P.LS.U12 */
21739     { pool                , P_LS_S9             , 8   , 32,
21740        0xfc000000, 0xa4000000, 0                      , 0,
21741        0x0                 },        /* P.LS.S9 */
21742     { reserved_block      , 0                   , 0   , 32,
21743        0xfc000000, 0xc4000000, 0                      , 0,
21744        0x0                 },        /* P32~*(25) */
21745     { reserved_block      , 0                   , 0   , 32,
21746        0xfc000000, 0xe4000000, 0                      , 0,
21747        0x0                 },        /* P32~*(29) */
21748     { call_instruction    , 0                   , 0   , 32,
21749        0xfc000000, 0x08000000, &NMD::MOVE_BALC        , 0,
21750        XMMS_               },        /* MOVE.BALC */
21751     { pool                , P_BAL               , 2   , 32,
21752        0xfc000000, 0x28000000, 0                      , 0,
21753        0x0                 },        /* P.BAL */
21754     { pool                , P_J                 , 16  , 32,
21755        0xfc000000, 0x48000000, 0                      , 0,
21756        0x0                 },        /* P.J */
21757     { reserved_block      , 0                   , 0   , 32,
21758        0xfc000000, 0x68000000, 0                      , 0,
21759        0x0                 },        /* P32~*(14) */
21760     { pool                , P_BR1               , 4   , 32,
21761        0xfc000000, 0x88000000, 0                      , 0,
21762        0x0                 },        /* P.BR1 */
21763     { pool                , P_BR2               , 4   , 32,
21764        0xfc000000, 0xa8000000, 0                      , 0,
21765        0x0                 },        /* P.BR2 */
21766     { pool                , P_BRI               , 8   , 32,
21767        0xfc000000, 0xc8000000, 0                      , 0,
21768        0x0                 },        /* P.BRI */
21769     { reserved_block      , 0                   , 0   , 32,
21770        0xfc000000, 0xe8000000, 0                      , 0,
21771        0x0                 },        /* P32~*(30) */
21772     { reserved_block      , 0                   , 0   , 32,
21773        0xfc000000, 0x0c000000, 0                      , 0,
21774        0x0                 },        /* P32~*(3) */
21775     { reserved_block      , 0                   , 0   , 32,
21776        0xfc000000, 0x2c000000, 0                      , 0,
21777        0x0                 },        /* P32~*(7) */
21778     { reserved_block      , 0                   , 0   , 32,
21779        0xfc000000, 0x4c000000, 0                      , 0,
21780        0x0                 },        /* P32~*(11) */
21781     { reserved_block      , 0                   , 0   , 32,
21782        0xfc000000, 0x6c000000, 0                      , 0,
21783        0x0                 },        /* P32~*(15) */
21784     { reserved_block      , 0                   , 0   , 32,
21785        0xfc000000, 0x8c000000, 0                      , 0,
21786        0x0                 },        /* P32~*(19) */
21787     { reserved_block      , 0                   , 0   , 32,
21788        0xfc000000, 0xac000000, 0                      , 0,
21789        0x0                 },        /* P32~*(23) */
21790     { reserved_block      , 0                   , 0   , 32,
21791        0xfc000000, 0xcc000000, 0                      , 0,
21792        0x0                 },        /* P32~*(27) */
21793     { reserved_block      , 0                   , 0   , 32,
21794        0xfc000000, 0xec000000, 0                      , 0,
21795        0x0                 },        /* P32~*(31) */
21796 };
21797
21798
21799 NMD::Pool NMD::P16_SYSCALL[2] = {
21800     { instruction         , 0                   , 0   , 16,
21801        0xfffc    , 0x1008    , &NMD::SYSCALL_16_      , 0,
21802        0x0                 },        /* SYSCALL[16] */
21803     { instruction         , 0                   , 0   , 16,
21804        0xfffc    , 0x100c    , &NMD::HYPCALL_16_      , 0,
21805        CP0_ | VZ_          },        /* HYPCALL[16] */
21806 };
21807
21808
21809 NMD::Pool NMD::P16_RI[4] = {
21810     { reserved_block      , 0                   , 0   , 16,
21811        0xfff8    , 0x1000    , 0                      , 0,
21812        0x0                 },        /* P16.RI~*(0) */
21813     { pool                , P16_SYSCALL         , 2   , 16,
21814        0xfff8    , 0x1008    , 0                      , 0,
21815        0x0                 },        /* P16.SYSCALL */
21816     { instruction         , 0                   , 0   , 16,
21817        0xfff8    , 0x1010    , &NMD::BREAK_16_        , 0,
21818        0x0                 },        /* BREAK[16] */
21819     { instruction         , 0                   , 0   , 16,
21820        0xfff8    , 0x1018    , &NMD::SDBBP_16_        , 0,
21821        EJTAG_              },        /* SDBBP[16] */
21822 };
21823
21824
21825 NMD::Pool NMD::P16_MV[2] = {
21826     { pool                , P16_RI              , 4   , 16,
21827        0xffe0    , 0x1000    , 0                      , 0,
21828        0x0                 },        /* P16.RI */
21829     { instruction         , 0                   , 0   , 16,
21830        0xfc00    , 0x1000    , &NMD::MOVE             , &NMD::MOVE_cond        ,
21831        0x0                 },        /* MOVE */
21832 };
21833
21834
21835 NMD::Pool NMD::P16_SHIFT[2] = {
21836     { instruction         , 0                   , 0   , 16,
21837        0xfc08    , 0x3000    , &NMD::SLL_16_          , 0,
21838        0x0                 },        /* SLL[16] */
21839     { instruction         , 0                   , 0   , 16,
21840        0xfc08    , 0x3008    , &NMD::SRL_16_          , 0,
21841        0x0                 },        /* SRL[16] */
21842 };
21843
21844
21845 NMD::Pool NMD::POOL16C_00[4] = {
21846     { instruction         , 0                   , 0   , 16,
21847        0xfc0f    , 0x5000    , &NMD::NOT_16_          , 0,
21848        0x0                 },        /* NOT[16] */
21849     { instruction         , 0                   , 0   , 16,
21850        0xfc0f    , 0x5004    , &NMD::XOR_16_          , 0,
21851        0x0                 },        /* XOR[16] */
21852     { instruction         , 0                   , 0   , 16,
21853        0xfc0f    , 0x5008    , &NMD::AND_16_          , 0,
21854        0x0                 },        /* AND[16] */
21855     { instruction         , 0                   , 0   , 16,
21856        0xfc0f    , 0x500c    , &NMD::OR_16_           , 0,
21857        0x0                 },        /* OR[16] */
21858 };
21859
21860
21861 NMD::Pool NMD::POOL16C_0[2] = {
21862     { pool                , POOL16C_00          , 4   , 16,
21863        0xfc03    , 0x5000    , 0                      , 0,
21864        0x0                 },        /* POOL16C_00 */
21865     { reserved_block      , 0                   , 0   , 16,
21866        0xfc03    , 0x5002    , 0                      , 0,
21867        0x0                 },        /* POOL16C_0~*(1) */
21868 };
21869
21870
21871 NMD::Pool NMD::P16C[2] = {
21872     { pool                , POOL16C_0           , 2   , 16,
21873        0xfc01    , 0x5000    , 0                      , 0,
21874        0x0                 },        /* POOL16C_0 */
21875     { instruction         , 0                   , 0   , 16,
21876        0xfc01    , 0x5001    , &NMD::LWXS_16_         , 0,
21877        0x0                 },        /* LWXS[16] */
21878 };
21879
21880
21881 NMD::Pool NMD::P16_A1[2] = {
21882     { reserved_block      , 0                   , 0   , 16,
21883        0xfc40    , 0x7000    , 0                      , 0,
21884        0x0                 },        /* P16.A1~*(0) */
21885     { instruction         , 0                   , 0   , 16,
21886        0xfc40    , 0x7040    , &NMD::ADDIU_R1_SP_     , 0,
21887        0x0                 },        /* ADDIU[R1.SP] */
21888 };
21889
21890
21891 NMD::Pool NMD::P_ADDIU_RS5_[2] = {
21892     { instruction         , 0                   , 0   , 16,
21893        0xffe8    , 0x9008    , &NMD::NOP_16_          , 0,
21894        0x0                 },        /* NOP[16] */
21895     { instruction         , 0                   , 0   , 16,
21896        0xfc08    , 0x9008    , &NMD::ADDIU_RS5_       , &NMD::ADDIU_RS5__cond  ,
21897        0x0                 },        /* ADDIU[RS5] */
21898 };
21899
21900
21901 NMD::Pool NMD::P16_A2[2] = {
21902     { instruction         , 0                   , 0   , 16,
21903        0xfc08    , 0x9000    , &NMD::ADDIU_R2_        , 0,
21904        0x0                 },        /* ADDIU[R2] */
21905     { pool                , P_ADDIU_RS5_        , 2   , 16,
21906        0xfc08    , 0x9008    , 0                      , 0,
21907        0x0                 },        /* P.ADDIU[RS5] */
21908 };
21909
21910
21911 NMD::Pool NMD::P16_ADDU[2] = {
21912     { instruction         , 0                   , 0   , 16,
21913        0xfc01    , 0xb000    , &NMD::ADDU_16_         , 0,
21914        0x0                 },        /* ADDU[16] */
21915     { instruction         , 0                   , 0   , 16,
21916        0xfc01    , 0xb001    , &NMD::SUBU_16_         , 0,
21917        0x0                 },        /* SUBU[16] */
21918 };
21919
21920
21921 NMD::Pool NMD::P16_JRC[2] = {
21922     { branch_instruction  , 0                   , 0   , 16,
21923        0xfc1f    , 0xd800    , &NMD::JRC              , 0,
21924        0x0                 },        /* JRC */
21925     { call_instruction    , 0                   , 0   , 16,
21926        0xfc1f    , 0xd810    , &NMD::JALRC_16_        , 0,
21927        0x0                 },        /* JALRC[16] */
21928 };
21929
21930
21931 NMD::Pool NMD::P16_BR1[2] = {
21932     { branch_instruction  , 0                   , 0   , 16,
21933        0xfc00    , 0xd800    , &NMD::BEQC_16_         , &NMD::BEQC_16__cond    ,
21934        XMMS_               },        /* BEQC[16] */
21935     { branch_instruction  , 0                   , 0   , 16,
21936        0xfc00    , 0xd800    , &NMD::BNEC_16_         , &NMD::BNEC_16__cond    ,
21937        XMMS_               },        /* BNEC[16] */
21938 };
21939
21940
21941 NMD::Pool NMD::P16_BR[2] = {
21942     { pool                , P16_JRC             , 2   , 16,
21943        0xfc0f    , 0xd800    , 0                      , 0,
21944        0x0                 },        /* P16.JRC */
21945     { pool                , P16_BR1             , 2   , 16,
21946        0xfc00    , 0xd800    , 0                      , &NMD::P16_BR1_cond     ,
21947        0x0                 },        /* P16.BR1 */
21948 };
21949
21950
21951 NMD::Pool NMD::P16_SR[2] = {
21952     { instruction         , 0                   , 0   , 16,
21953        0xfd00    , 0x1c00    , &NMD::SAVE_16_         , 0,
21954        0x0                 },        /* SAVE[16] */
21955     { return_instruction  , 0                   , 0   , 16,
21956        0xfd00    , 0x1d00    , &NMD::RESTORE_JRC_16_  , 0,
21957        0x0                 },        /* RESTORE.JRC[16] */
21958 };
21959
21960
21961 NMD::Pool NMD::P16_4X4[4] = {
21962     { instruction         , 0                   , 0   , 16,
21963        0xfd08    , 0x3c00    , &NMD::ADDU_4X4_        , 0,
21964        XMMS_               },        /* ADDU[4X4] */
21965     { instruction         , 0                   , 0   , 16,
21966        0xfd08    , 0x3c08    , &NMD::MUL_4X4_         , 0,
21967        XMMS_               },        /* MUL[4X4] */
21968     { reserved_block      , 0                   , 0   , 16,
21969        0xfd08    , 0x3d00    , 0                      , 0,
21970        0x0                 },        /* P16.4X4~*(2) */
21971     { reserved_block      , 0                   , 0   , 16,
21972        0xfd08    , 0x3d08    , 0                      , 0,
21973        0x0                 },        /* P16.4X4~*(3) */
21974 };
21975
21976
21977 NMD::Pool NMD::P16_LB[4] = {
21978     { instruction         , 0                   , 0   , 16,
21979        0xfc0c    , 0x5c00    , &NMD::LB_16_           , 0,
21980        0x0                 },        /* LB[16] */
21981     { instruction         , 0                   , 0   , 16,
21982        0xfc0c    , 0x5c04    , &NMD::SB_16_           , 0,
21983        0x0                 },        /* SB[16] */
21984     { instruction         , 0                   , 0   , 16,
21985        0xfc0c    , 0x5c08    , &NMD::LBU_16_          , 0,
21986        0x0                 },        /* LBU[16] */
21987     { reserved_block      , 0                   , 0   , 16,
21988        0xfc0c    , 0x5c0c    , 0                      , 0,
21989        0x0                 },        /* P16.LB~*(3) */
21990 };
21991
21992
21993 NMD::Pool NMD::P16_LH[4] = {
21994     { instruction         , 0                   , 0   , 16,
21995        0xfc09    , 0x7c00    , &NMD::LH_16_           , 0,
21996        0x0                 },        /* LH[16] */
21997     { instruction         , 0                   , 0   , 16,
21998        0xfc09    , 0x7c01    , &NMD::SH_16_           , 0,
21999        0x0                 },        /* SH[16] */
22000     { instruction         , 0                   , 0   , 16,
22001        0xfc09    , 0x7c08    , &NMD::LHU_16_          , 0,
22002        0x0                 },        /* LHU[16] */
22003     { reserved_block      , 0                   , 0   , 16,
22004        0xfc09    , 0x7c09    , 0                      , 0,
22005        0x0                 },        /* P16.LH~*(3) */
22006 };
22007
22008
22009 NMD::Pool NMD::P16[32] = {
22010     { pool                , P16_MV              , 2   , 16,
22011        0xfc00    , 0x1000    , 0                      , 0,
22012        0x0                 },        /* P16.MV */
22013     { pool                , P16_SHIFT           , 2   , 16,
22014        0xfc00    , 0x3000    , 0                      , 0,
22015        0x0                 },        /* P16.SHIFT */
22016     { pool                , P16C                , 2   , 16,
22017        0xfc00    , 0x5000    , 0                      , 0,
22018        0x0                 },        /* P16C */
22019     { pool                , P16_A1              , 2   , 16,
22020        0xfc00    , 0x7000    , 0                      , 0,
22021        0x0                 },        /* P16.A1 */
22022     { pool                , P16_A2              , 2   , 16,
22023        0xfc00    , 0x9000    , 0                      , 0,
22024        0x0                 },        /* P16.A2 */
22025     { pool                , P16_ADDU            , 2   , 16,
22026        0xfc00    , 0xb000    , 0                      , 0,
22027        0x0                 },        /* P16.ADDU */
22028     { instruction         , 0                   , 0   , 16,
22029        0xfc00    , 0xd000    , &NMD::LI_16_           , 0,
22030        0x0                 },        /* LI[16] */
22031     { instruction         , 0                   , 0   , 16,
22032        0xfc00    , 0xf000    , &NMD::ANDI_16_         , 0,
22033        0x0                 },        /* ANDI[16] */
22034     { instruction         , 0                   , 0   , 16,
22035        0xfc00    , 0x1400    , &NMD::LW_16_           , 0,
22036        0x0                 },        /* LW[16] */
22037     { instruction         , 0                   , 0   , 16,
22038        0xfc00    , 0x3400    , &NMD::LW_SP_           , 0,
22039        0x0                 },        /* LW[SP] */
22040     { instruction         , 0                   , 0   , 16,
22041        0xfc00    , 0x5400    , &NMD::LW_GP16_         , 0,
22042        0x0                 },        /* LW[GP16] */
22043     { instruction         , 0                   , 0   , 16,
22044        0xfc00    , 0x7400    , &NMD::LW_4X4_          , 0,
22045        XMMS_               },        /* LW[4X4] */
22046     { instruction         , 0                   , 0   , 16,
22047        0xfc00    , 0x9400    , &NMD::SW_16_           , 0,
22048        0x0                 },        /* SW[16] */
22049     { instruction         , 0                   , 0   , 16,
22050        0xfc00    , 0xb400    , &NMD::SW_SP_           , 0,
22051        0x0                 },        /* SW[SP] */
22052     { instruction         , 0                   , 0   , 16,
22053        0xfc00    , 0xd400    , &NMD::SW_GP16_         , 0,
22054        0x0                 },        /* SW[GP16] */
22055     { instruction         , 0                   , 0   , 16,
22056        0xfc00    , 0xf400    , &NMD::SW_4X4_          , 0,
22057        XMMS_               },        /* SW[4X4] */
22058     { branch_instruction  , 0                   , 0   , 16,
22059        0xfc00    , 0x1800    , &NMD::BC_16_           , 0,
22060        0x0                 },        /* BC[16] */
22061     { call_instruction    , 0                   , 0   , 16,
22062        0xfc00    , 0x3800    , &NMD::BALC_16_         , 0,
22063        0x0                 },        /* BALC[16] */
22064     { reserved_block      , 0                   , 0   , 16,
22065        0xfc00    , 0x5800    , 0                      , 0,
22066        0x0                 },        /* P16~*(10) */
22067     { reserved_block      , 0                   , 0   , 16,
22068        0xfc00    , 0x7800    , 0                      , 0,
22069        0x0                 },        /* P16~*(14) */
22070     { branch_instruction  , 0                   , 0   , 16,
22071        0xfc00    , 0x9800    , &NMD::BEQZC_16_        , 0,
22072        0x0                 },        /* BEQZC[16] */
22073     { branch_instruction  , 0                   , 0   , 16,
22074        0xfc00    , 0xb800    , &NMD::BNEZC_16_        , 0,
22075        0x0                 },        /* BNEZC[16] */
22076     { pool                , P16_BR              , 2   , 16,
22077        0xfc00    , 0xd800    , 0                      , 0,
22078        0x0                 },        /* P16.BR */
22079     { reserved_block      , 0                   , 0   , 16,
22080        0xfc00    , 0xf800    , 0                      , 0,
22081        0x0                 },        /* P16~*(30) */
22082     { pool                , P16_SR              , 2   , 16,
22083        0xfc00    , 0x1c00    , 0                      , 0,
22084        0x0                 },        /* P16.SR */
22085     { pool                , P16_4X4             , 4   , 16,
22086        0xfc00    , 0x3c00    , 0                      , 0,
22087        0x0                 },        /* P16.4X4 */
22088     { pool                , P16_LB              , 4   , 16,
22089        0xfc00    , 0x5c00    , 0                      , 0,
22090        0x0                 },        /* P16.LB */
22091     { pool                , P16_LH              , 4   , 16,
22092        0xfc00    , 0x7c00    , 0                      , 0,
22093        0x0                 },        /* P16.LH */
22094     { reserved_block      , 0                   , 0   , 16,
22095        0xfc00    , 0x9c00    , 0                      , 0,
22096        0x0                 },        /* P16~*(19) */
22097     { instruction         , 0                   , 0   , 16,
22098        0xfc00    , 0xbc00    , &NMD::MOVEP            , 0,
22099        XMMS_               },        /* MOVEP */
22100     { reserved_block      , 0                   , 0   , 16,
22101        0xfc00    , 0xdc00    , 0                      , 0,
22102        0x0                 },        /* P16~*(27) */
22103     { instruction         , 0                   , 0   , 16,
22104        0xfc00    , 0xfc00    , &NMD::MOVEP_REV_       , 0,
22105        XMMS_               },        /* MOVEP[REV] */
22106 };
22107
22108
22109 NMD::Pool NMD::MAJOR[2] = {
22110     { pool                , P32                 , 32  , 32,
22111        0x10000000, 0x00000000, 0                      , 0,
22112        0x0                 },        /* P32 */
22113     { pool                , P16                 , 32  , 16,
22114        0x1000    , 0x1000    , 0                      , 0,
22115        0x0                 },        /* P16 */
22116 };