1 /* General "disassemble this chunk" code. Used for debugging. */
3 #include "qemu-common.h"
9 #include "disas/disas.h"
11 typedef struct CPUDebug
{
12 struct disassemble_info info
;
16 /* Filled in by elfload.c. Simplistic, but will do for now. */
17 struct syminfo
*syminfos
= NULL
;
19 /* Get LENGTH bytes from info's buffer, at target address memaddr.
20 Transfer them to myaddr. */
22 buffer_read_memory(bfd_vma memaddr
, bfd_byte
*myaddr
, int length
,
23 struct disassemble_info
*info
)
25 if (memaddr
< info
->buffer_vma
26 || memaddr
+ length
> info
->buffer_vma
+ info
->buffer_length
)
27 /* Out of bounds. Use EIO because GDB uses it. */
29 memcpy (myaddr
, info
->buffer
+ (memaddr
- info
->buffer_vma
), length
);
33 /* Get LENGTH bytes from info's buffer, at target address memaddr.
34 Transfer them to myaddr. */
36 target_read_memory (bfd_vma memaddr
,
39 struct disassemble_info
*info
)
41 CPUDebug
*s
= container_of(info
, CPUDebug
, info
);
43 cpu_memory_rw_debug(s
->cpu
, memaddr
, myaddr
, length
, 0);
47 /* Print an error message. We can assume that this is in response to
48 an error return from buffer_read_memory. */
50 perror_memory (int status
, bfd_vma memaddr
, struct disassemble_info
*info
)
54 (*info
->fprintf_func
) (info
->stream
, "Unknown error %d\n", status
);
56 /* Actually, address between memaddr and memaddr + len was
58 (*info
->fprintf_func
) (info
->stream
,
59 "Address 0x%" PRIx64
" is out of bounds.\n", memaddr
);
62 /* This could be in a separate file, to save minuscule amounts of space
63 in statically linked executables. */
65 /* Just print the address is hex. This is included for completeness even
66 though both GDB and objdump provide their own (to print symbolic
70 generic_print_address (bfd_vma addr
, struct disassemble_info
*info
)
72 (*info
->fprintf_func
) (info
->stream
, "0x%" PRIx64
, addr
);
75 /* Print address in hex, truncated to the width of a host virtual address. */
77 generic_print_host_address(bfd_vma addr
, struct disassemble_info
*info
)
79 uint64_t mask
= ~0ULL >> (64 - (sizeof(void *) * 8));
80 generic_print_address(addr
& mask
, info
);
83 /* Just return the given address. */
86 generic_symbol_at_address (bfd_vma addr
, struct disassemble_info
*info
)
91 bfd_vma
bfd_getl64 (const bfd_byte
*addr
)
95 v
= (unsigned long long) addr
[0];
96 v
|= (unsigned long long) addr
[1] << 8;
97 v
|= (unsigned long long) addr
[2] << 16;
98 v
|= (unsigned long long) addr
[3] << 24;
99 v
|= (unsigned long long) addr
[4] << 32;
100 v
|= (unsigned long long) addr
[5] << 40;
101 v
|= (unsigned long long) addr
[6] << 48;
102 v
|= (unsigned long long) addr
[7] << 56;
106 bfd_vma
bfd_getl32 (const bfd_byte
*addr
)
110 v
= (unsigned long) addr
[0];
111 v
|= (unsigned long) addr
[1] << 8;
112 v
|= (unsigned long) addr
[2] << 16;
113 v
|= (unsigned long) addr
[3] << 24;
117 bfd_vma
bfd_getb32 (const bfd_byte
*addr
)
121 v
= (unsigned long) addr
[0] << 24;
122 v
|= (unsigned long) addr
[1] << 16;
123 v
|= (unsigned long) addr
[2] << 8;
124 v
|= (unsigned long) addr
[3];
128 bfd_vma
bfd_getl16 (const bfd_byte
*addr
)
132 v
= (unsigned long) addr
[0];
133 v
|= (unsigned long) addr
[1] << 8;
137 bfd_vma
bfd_getb16 (const bfd_byte
*addr
)
141 v
= (unsigned long) addr
[0] << 24;
142 v
|= (unsigned long) addr
[1] << 16;
146 static int print_insn_objdump(bfd_vma pc
, disassemble_info
*info
,
149 int i
, n
= info
->buffer_length
;
150 uint8_t *buf
= g_malloc(n
);
152 info
->read_memory_func(pc
, buf
, n
, info
);
154 for (i
= 0; i
< n
; ++i
) {
156 info
->fprintf_func(info
->stream
, "\n%s: ", prefix
);
158 info
->fprintf_func(info
->stream
, "%02x", buf
[i
]);
165 static int print_insn_od_host(bfd_vma pc
, disassemble_info
*info
)
167 return print_insn_objdump(pc
, info
, "OBJD-H");
170 static int print_insn_od_target(bfd_vma pc
, disassemble_info
*info
)
172 return print_insn_objdump(pc
, info
, "OBJD-T");
175 /* Disassemble this for me please... (debugging). 'flags' has the following
177 i386 - 1 means 16 bit code, 2 means 64 bit code
178 ppc - bits 0:15 specify (optionally) the machine instruction set;
179 bit 16 indicates little endian.
180 other targets - unused
182 void target_disas(FILE *out
, CPUState
*cpu
, target_ulong code
,
183 target_ulong size
, int flags
)
185 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
190 INIT_DISASSEMBLE_INFO(s
.info
, out
, fprintf
);
193 s
.info
.read_memory_func
= target_read_memory
;
194 s
.info
.buffer_vma
= code
;
195 s
.info
.buffer_length
= size
;
196 s
.info
.print_address_func
= generic_print_address
;
198 #ifdef TARGET_WORDS_BIGENDIAN
199 s
.info
.endian
= BFD_ENDIAN_BIG
;
201 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
204 if (cc
->disas_set_info
) {
205 cc
->disas_set_info(cpu
, &s
.info
);
208 #if defined(TARGET_I386)
210 s
.info
.mach
= bfd_mach_x86_64
;
211 } else if (flags
== 1) {
212 s
.info
.mach
= bfd_mach_i386_i8086
;
214 s
.info
.mach
= bfd_mach_i386_i386
;
216 s
.info
.print_insn
= print_insn_i386
;
217 #elif defined(TARGET_SPARC)
218 s
.info
.print_insn
= print_insn_sparc
;
219 #ifdef TARGET_SPARC64
220 s
.info
.mach
= bfd_mach_sparc_v9b
;
222 #elif defined(TARGET_PPC)
223 if ((flags
>> 16) & 1) {
224 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
226 if (flags
& 0xFFFF) {
227 /* If we have a precise definition of the instruction set, use it. */
228 s
.info
.mach
= flags
& 0xFFFF;
231 s
.info
.mach
= bfd_mach_ppc64
;
233 s
.info
.mach
= bfd_mach_ppc
;
236 s
.info
.disassembler_options
= (char *)"any";
237 s
.info
.print_insn
= print_insn_ppc
;
238 #elif defined(TARGET_M68K)
239 s
.info
.print_insn
= print_insn_m68k
;
240 #elif defined(TARGET_MIPS)
241 #ifdef TARGET_WORDS_BIGENDIAN
242 s
.info
.print_insn
= print_insn_big_mips
;
244 s
.info
.print_insn
= print_insn_little_mips
;
246 #elif defined(TARGET_SH4)
247 s
.info
.mach
= bfd_mach_sh4
;
248 s
.info
.print_insn
= print_insn_sh
;
249 #elif defined(TARGET_ALPHA)
250 s
.info
.mach
= bfd_mach_alpha_ev6
;
251 s
.info
.print_insn
= print_insn_alpha
;
252 #elif defined(TARGET_LM32)
253 s
.info
.mach
= bfd_mach_lm32
;
254 s
.info
.print_insn
= print_insn_lm32
;
256 if (s
.info
.print_insn
== NULL
) {
257 s
.info
.print_insn
= print_insn_od_target
;
260 for (pc
= code
; size
> 0; pc
+= count
, size
-= count
) {
261 fprintf(out
, "0x" TARGET_FMT_lx
": ", pc
);
262 count
= s
.info
.print_insn(pc
, &s
.info
);
268 for(i
= 0; i
< count
; i
++) {
269 target_read_memory(pc
+ i
, &b
, 1, &s
.info
);
270 fprintf(out
, " %02x", b
);
280 "Disassembler disagrees with translator over instruction "
282 "Please report this to qemu-devel@nongnu.org\n");
288 /* Disassemble this for me please... (debugging). */
289 void disas(FILE *out
, void *code
, unsigned long size
)
294 int (*print_insn
)(bfd_vma pc
, disassemble_info
*info
) = NULL
;
296 INIT_DISASSEMBLE_INFO(s
.info
, out
, fprintf
);
297 s
.info
.print_address_func
= generic_print_host_address
;
299 s
.info
.buffer
= code
;
300 s
.info
.buffer_vma
= (uintptr_t)code
;
301 s
.info
.buffer_length
= size
;
303 #ifdef HOST_WORDS_BIGENDIAN
304 s
.info
.endian
= BFD_ENDIAN_BIG
;
306 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
308 #if defined(CONFIG_TCG_INTERPRETER)
309 print_insn
= print_insn_tci
;
310 #elif defined(__i386__)
311 s
.info
.mach
= bfd_mach_i386_i386
;
312 print_insn
= print_insn_i386
;
313 #elif defined(__x86_64__)
314 s
.info
.mach
= bfd_mach_x86_64
;
315 print_insn
= print_insn_i386
;
316 #elif defined(_ARCH_PPC)
317 s
.info
.disassembler_options
= (char *)"any";
318 print_insn
= print_insn_ppc
;
319 #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
320 print_insn
= print_insn_arm_a64
;
321 #elif defined(__alpha__)
322 print_insn
= print_insn_alpha
;
323 #elif defined(__sparc__)
324 print_insn
= print_insn_sparc
;
325 s
.info
.mach
= bfd_mach_sparc_v9b
;
326 #elif defined(__arm__)
327 print_insn
= print_insn_arm
;
328 #elif defined(__MIPSEB__)
329 print_insn
= print_insn_big_mips
;
330 #elif defined(__MIPSEL__)
331 print_insn
= print_insn_little_mips
;
332 #elif defined(__m68k__)
333 print_insn
= print_insn_m68k
;
334 #elif defined(__s390__)
335 print_insn
= print_insn_s390
;
336 #elif defined(__hppa__)
337 print_insn
= print_insn_hppa
;
338 #elif defined(__ia64__)
339 print_insn
= print_insn_ia64
;
341 if (print_insn
== NULL
) {
342 print_insn
= print_insn_od_host
;
344 for (pc
= (uintptr_t)code
; size
> 0; pc
+= count
, size
-= count
) {
345 fprintf(out
, "0x%08" PRIxPTR
": ", pc
);
346 count
= print_insn(pc
, &s
.info
);
353 /* Look up symbol for debugging purpose. Returns "" if unknown. */
354 const char *lookup_symbol(target_ulong orig_addr
)
356 const char *symbol
= "";
359 for (s
= syminfos
; s
; s
= s
->next
) {
360 symbol
= s
->lookup_symbol(s
, orig_addr
);
361 if (symbol
[0] != '\0') {
369 #if !defined(CONFIG_USER_ONLY)
371 #include "monitor/monitor.h"
373 static int monitor_disas_is_physical
;
376 monitor_read_memory (bfd_vma memaddr
, bfd_byte
*myaddr
, int length
,
377 struct disassemble_info
*info
)
379 CPUDebug
*s
= container_of(info
, CPUDebug
, info
);
381 if (monitor_disas_is_physical
) {
382 cpu_physical_memory_read(memaddr
, myaddr
, length
);
384 cpu_memory_rw_debug(s
->cpu
, memaddr
, myaddr
, length
, 0);
389 /* Disassembler for the monitor.
390 See target_disas for a description of flags. */
391 void monitor_disas(Monitor
*mon
, CPUState
*cpu
,
392 target_ulong pc
, int nb_insn
, int is_physical
, int flags
)
394 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
398 INIT_DISASSEMBLE_INFO(s
.info
, (FILE *)mon
, monitor_fprintf
);
401 monitor_disas_is_physical
= is_physical
;
402 s
.info
.read_memory_func
= monitor_read_memory
;
403 s
.info
.print_address_func
= generic_print_address
;
405 s
.info
.buffer_vma
= pc
;
407 #ifdef TARGET_WORDS_BIGENDIAN
408 s
.info
.endian
= BFD_ENDIAN_BIG
;
410 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
413 if (cc
->disas_set_info
) {
414 cc
->disas_set_info(cpu
, &s
.info
);
417 #if defined(TARGET_I386)
419 s
.info
.mach
= bfd_mach_x86_64
;
420 } else if (flags
== 1) {
421 s
.info
.mach
= bfd_mach_i386_i8086
;
423 s
.info
.mach
= bfd_mach_i386_i386
;
425 s
.info
.print_insn
= print_insn_i386
;
426 #elif defined(TARGET_ALPHA)
427 s
.info
.print_insn
= print_insn_alpha
;
428 #elif defined(TARGET_SPARC)
429 s
.info
.print_insn
= print_insn_sparc
;
430 #ifdef TARGET_SPARC64
431 s
.info
.mach
= bfd_mach_sparc_v9b
;
433 #elif defined(TARGET_PPC)
434 if (flags
& 0xFFFF) {
435 /* If we have a precise definition of the instruction set, use it. */
436 s
.info
.mach
= flags
& 0xFFFF;
439 s
.info
.mach
= bfd_mach_ppc64
;
441 s
.info
.mach
= bfd_mach_ppc
;
444 if ((flags
>> 16) & 1) {
445 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
447 s
.info
.print_insn
= print_insn_ppc
;
448 #elif defined(TARGET_M68K)
449 s
.info
.print_insn
= print_insn_m68k
;
450 #elif defined(TARGET_MIPS)
451 #ifdef TARGET_WORDS_BIGENDIAN
452 s
.info
.print_insn
= print_insn_big_mips
;
454 s
.info
.print_insn
= print_insn_little_mips
;
456 #elif defined(TARGET_SH4)
457 s
.info
.mach
= bfd_mach_sh4
;
458 s
.info
.print_insn
= print_insn_sh
;
459 #elif defined(TARGET_LM32)
460 s
.info
.mach
= bfd_mach_lm32
;
461 s
.info
.print_insn
= print_insn_lm32
;
463 if (!s
.info
.print_insn
) {
464 monitor_printf(mon
, "0x" TARGET_FMT_lx
465 ": Asm output not supported on this arch\n", pc
);
469 for(i
= 0; i
< nb_insn
; i
++) {
470 monitor_printf(mon
, "0x" TARGET_FMT_lx
": ", pc
);
471 count
= s
.info
.print_insn(pc
, &s
.info
);
472 monitor_printf(mon
, "\n");