disas.c

   1 /* General "disassemble this chunk" code.  Used for debugging. */
   2 #include "config.h"
   3 #include "qemu-common.h"
   4 #include "disas/bfd.h"
   5 #include "elf.h"
   6 #include <errno.h>
   7
   8 #include "cpu.h"
   9 #include "disas/disas.h"
  10
  11 typedef struct CPUDebug {
  12     struct disassemble_info info;
  13     CPUState *cpu;
  14 } CPUDebug;
  15
  16 /* Filled in by elfload.c.  Simplistic, but will do for now. */
  17 struct syminfo *syminfos = NULL;
  18
  19 /* Get LENGTH bytes from info's buffer, at target address memaddr.
  20    Transfer them to myaddr.  */
  21 int
  22 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
  23                    struct disassemble_info *info)
  24 {
  25     if (memaddr < info->buffer_vma
  26         || memaddr + length > info->buffer_vma + info->buffer_length)
  27         /* Out of bounds.  Use EIO because GDB uses it.  */
  28         return EIO;
  29     memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
  30     return 0;
  31 }
  32
  33 /* Get LENGTH bytes from info's buffer, at target address memaddr.
  34    Transfer them to myaddr.  */
  35 static int
  36 target_read_memory (bfd_vma memaddr,
  37                     bfd_byte *myaddr,
  38                     int length,
  39                     struct disassemble_info *info)
  40 {
  41     CPUDebug *s = container_of(info, CPUDebug, info);
  42
  43     cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
  44     return 0;
  45 }
  46
  47 /* Print an error message.  We can assume that this is in response to
  48    an error return from buffer_read_memory.  */
  49 void
  50 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
  51 {
  52   if (status != EIO)
  53     /* Can't happen.  */
  54     (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
  55   else
  56     /* Actually, address between memaddr and memaddr + len was
  57        out of bounds.  */
  58     (*info->fprintf_func) (info->stream,
  59                            "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
  60 }
  61
  62 /* This could be in a separate file, to save minuscule amounts of space
  63    in statically linked executables.  */
  64
  65 /* Just print the address is hex.  This is included for completeness even
  66    though both GDB and objdump provide their own (to print symbolic
  67    addresses).  */
  68
  69 void
  70 generic_print_address (bfd_vma addr, struct disassemble_info *info)
  71 {
  72     (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
  73 }
  74
  75 /* Print address in hex, truncated to the width of a host virtual address. */
  76 static void
  77 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
  78 {
  79     uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
  80     generic_print_address(addr & mask, info);
  81 }
  82
  83 /* Just return the given address.  */
  84
  85 int
  86 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
  87 {
  88   return 1;
  89 }
  90
  91 bfd_vma bfd_getl64 (const bfd_byte *addr)
  92 {
  93   unsigned long long v;
  94
  95   v = (unsigned long long) addr[0];
  96   v |= (unsigned long long) addr[1] << 8;
  97   v |= (unsigned long long) addr[2] << 16;
  98   v |= (unsigned long long) addr[3] << 24;
  99   v |= (unsigned long long) addr[4] << 32;
 100   v |= (unsigned long long) addr[5] << 40;
 101   v |= (unsigned long long) addr[6] << 48;
 102   v |= (unsigned long long) addr[7] << 56;
 103   return (bfd_vma) v;
 104 }
 105
 106 bfd_vma bfd_getl32 (const bfd_byte *addr)
 107 {
 108   unsigned long v;
 109
 110   v = (unsigned long) addr[0];
 111   v |= (unsigned long) addr[1] << 8;
 112   v |= (unsigned long) addr[2] << 16;
 113   v |= (unsigned long) addr[3] << 24;
 114   return (bfd_vma) v;
 115 }
 116
 117 bfd_vma bfd_getb32 (const bfd_byte *addr)
 118 {
 119   unsigned long v;
 120
 121   v = (unsigned long) addr[0] << 24;
 122   v |= (unsigned long) addr[1] << 16;
 123   v |= (unsigned long) addr[2] << 8;
 124   v |= (unsigned long) addr[3];
 125   return (bfd_vma) v;
 126 }
 127
 128 bfd_vma bfd_getl16 (const bfd_byte *addr)
 129 {
 130   unsigned long v;
 131
 132   v = (unsigned long) addr[0];
 133   v |= (unsigned long) addr[1] << 8;
 134   return (bfd_vma) v;
 135 }
 136
 137 bfd_vma bfd_getb16 (const bfd_byte *addr)
 138 {
 139   unsigned long v;
 140
 141   v = (unsigned long) addr[0] << 24;
 142   v |= (unsigned long) addr[1] << 16;
 143   return (bfd_vma) v;
 144 }
 145
 146 static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
 147                               const char *prefix)
 148 {
 149     int i, n = info->buffer_length;
 150     uint8_t *buf = g_malloc(n);
 151
 152     info->read_memory_func(pc, buf, n, info);
 153
 154     for (i = 0; i < n; ++i) {
 155         if (i % 32 == 0) {
 156             info->fprintf_func(info->stream, "\n%s: ", prefix);
 157         }
 158         info->fprintf_func(info->stream, "%02x", buf[i]);
 159     }
 160
 161     g_free(buf);
 162     return n;
 163 }
 164
 165 static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
 166 {
 167     return print_insn_objdump(pc, info, "OBJD-H");
 168 }
 169
 170 static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
 171 {
 172     return print_insn_objdump(pc, info, "OBJD-T");
 173 }
 174
 175 /* Disassemble this for me please... (debugging). 'flags' has the following
 176    values:
 177     i386 - 1 means 16 bit code, 2 means 64 bit code
 178     ppc  - bits 0:15 specify (optionally) the machine instruction set;
 179            bit 16 indicates little endian.
 180     other targets - unused
 181  */
 182 void target_disas(FILE *out, CPUState *cpu, target_ulong code,
 183                   target_ulong size, int flags)
 184 {
 185     CPUClass *cc = CPU_GET_CLASS(cpu);
 186     target_ulong pc;
 187     int count;
 188     CPUDebug s;
 189
 190     INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
 191
 192     s.cpu = cpu;
 193     s.info.read_memory_func = target_read_memory;
 194     s.info.buffer_vma = code;
 195     s.info.buffer_length = size;
 196     s.info.print_address_func = generic_print_address;
 197
 198 #ifdef TARGET_WORDS_BIGENDIAN
 199     s.info.endian = BFD_ENDIAN_BIG;
 200 #else
 201     s.info.endian = BFD_ENDIAN_LITTLE;
 202 #endif
 203
 204     if (cc->disas_set_info) {
 205         cc->disas_set_info(cpu, &s.info);
 206     }
 207
 208 #if defined(TARGET_I386)
 209     if (flags == 2) {
 210         s.info.mach = bfd_mach_x86_64;
 211     } else if (flags == 1) {
 212         s.info.mach = bfd_mach_i386_i8086;
 213     } else {
 214         s.info.mach = bfd_mach_i386_i386;
 215     }
 216     s.info.print_insn = print_insn_i386;
 217 #elif defined(TARGET_PPC)
 218     if ((flags >> 16) & 1) {
 219         s.info.endian = BFD_ENDIAN_LITTLE;
 220     }
 221     if (flags & 0xFFFF) {
 222         /* If we have a precise definition of the instruction set, use it. */
 223         s.info.mach = flags & 0xFFFF;
 224     } else {
 225 #ifdef TARGET_PPC64
 226         s.info.mach = bfd_mach_ppc64;
 227 #else
 228         s.info.mach = bfd_mach_ppc;
 229 #endif
 230     }
 231     s.info.disassembler_options = (char *)"any";
 232     s.info.print_insn = print_insn_ppc;
 233 #elif defined(TARGET_MIPS)
 234 #ifdef TARGET_WORDS_BIGENDIAN
 235     s.info.print_insn = print_insn_big_mips;
 236 #else
 237     s.info.print_insn = print_insn_little_mips;
 238 #endif
 239 #elif defined(TARGET_SH4)
 240     s.info.mach = bfd_mach_sh4;
 241     s.info.print_insn = print_insn_sh;
 242 #elif defined(TARGET_ALPHA)
 243     s.info.mach = bfd_mach_alpha_ev6;
 244     s.info.print_insn = print_insn_alpha;
 245 #elif defined(TARGET_LM32)
 246     s.info.mach = bfd_mach_lm32;
 247     s.info.print_insn = print_insn_lm32;
 248 #endif
 249     if (s.info.print_insn == NULL) {
 250         s.info.print_insn = print_insn_od_target;
 251     }
 252
 253     for (pc = code; size > 0; pc += count, size -= count) {
 254         fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
 255         count = s.info.print_insn(pc, &s.info);
 256 #if 0
 257         {
 258             int i;
 259             uint8_t b;
 260             fprintf(out, " {");
 261             for(i = 0; i < count; i++) {
 262                 target_read_memory(pc + i, &b, 1, &s.info);
 263                 fprintf(out, " %02x", b);
 264             }
 265             fprintf(out, " }");
 266         }
 267 #endif
 268         fprintf(out, "\n");
 269         if (count < 0)
 270             break;
 271         if (size < count) {
 272             fprintf(out,
 273                     "Disassembler disagrees with translator over instruction "
 274                     "decoding\n"
 275                     "Please report this to qemu-devel@nongnu.org\n");
 276             break;
 277         }
 278     }
 279 }
 280
 281 /* Disassemble this for me please... (debugging). */
 282 void disas(FILE *out, void *code, unsigned long size)
 283 {
 284     uintptr_t pc;
 285     int count;
 286     CPUDebug s;
 287     int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
 288
 289     INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
 290     s.info.print_address_func = generic_print_host_address;
 291
 292     s.info.buffer = code;
 293     s.info.buffer_vma = (uintptr_t)code;
 294     s.info.buffer_length = size;
 295
 296 #ifdef HOST_WORDS_BIGENDIAN
 297     s.info.endian = BFD_ENDIAN_BIG;
 298 #else
 299     s.info.endian = BFD_ENDIAN_LITTLE;
 300 #endif
 301 #if defined(CONFIG_TCG_INTERPRETER)
 302     print_insn = print_insn_tci;
 303 #elif defined(__i386__)
 304     s.info.mach = bfd_mach_i386_i386;
 305     print_insn = print_insn_i386;
 306 #elif defined(__x86_64__)
 307     s.info.mach = bfd_mach_x86_64;
 308     print_insn = print_insn_i386;
 309 #elif defined(_ARCH_PPC)
 310     s.info.disassembler_options = (char *)"any";
 311     print_insn = print_insn_ppc;
 312 #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
 313     print_insn = print_insn_arm_a64;
 314 #elif defined(__alpha__)
 315     print_insn = print_insn_alpha;
 316 #elif defined(__sparc__)
 317     print_insn = print_insn_sparc;
 318     s.info.mach = bfd_mach_sparc_v9b;
 319 #elif defined(__arm__)
 320     print_insn = print_insn_arm;
 321 #elif defined(__MIPSEB__)
 322     print_insn = print_insn_big_mips;
 323 #elif defined(__MIPSEL__)
 324     print_insn = print_insn_little_mips;
 325 #elif defined(__m68k__)
 326     print_insn = print_insn_m68k;
 327 #elif defined(__s390__)
 328     print_insn = print_insn_s390;
 329 #elif defined(__hppa__)
 330     print_insn = print_insn_hppa;
 331 #elif defined(__ia64__)
 332     print_insn = print_insn_ia64;
 333 #endif
 334     if (print_insn == NULL) {
 335         print_insn = print_insn_od_host;
 336     }
 337     for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
 338         fprintf(out, "0x%08" PRIxPTR ":  ", pc);
 339         count = print_insn(pc, &s.info);
 340         fprintf(out, "\n");
 341         if (count < 0)
 342             break;
 343     }
 344 }
 345
 346 /* Look up symbol for debugging purpose.  Returns "" if unknown. */
 347 const char *lookup_symbol(target_ulong orig_addr)
 348 {
 349     const char *symbol = "";
 350     struct syminfo *s;
 351
 352     for (s = syminfos; s; s = s->next) {
 353         symbol = s->lookup_symbol(s, orig_addr);
 354         if (symbol[0] != '\0') {
 355             break;
 356         }
 357     }
 358
 359     return symbol;
 360 }
 361
 362 #if !defined(CONFIG_USER_ONLY)
 363
 364 #include "monitor/monitor.h"
 365
 366 static int monitor_disas_is_physical;
 367
 368 static int
 369 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
 370                      struct disassemble_info *info)
 371 {
 372     CPUDebug *s = container_of(info, CPUDebug, info);
 373
 374     if (monitor_disas_is_physical) {
 375         cpu_physical_memory_read(memaddr, myaddr, length);
 376     } else {
 377         cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
 378     }
 379     return 0;
 380 }
 381
 382 /* Disassembler for the monitor.
 383    See target_disas for a description of flags. */
 384 void monitor_disas(Monitor *mon, CPUState *cpu,
 385                    target_ulong pc, int nb_insn, int is_physical, int flags)
 386 {
 387     CPUClass *cc = CPU_GET_CLASS(cpu);
 388     int count, i;
 389     CPUDebug s;
 390
 391     INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
 392
 393     s.cpu = cpu;
 394     monitor_disas_is_physical = is_physical;
 395     s.info.read_memory_func = monitor_read_memory;
 396     s.info.print_address_func = generic_print_address;
 397
 398     s.info.buffer_vma = pc;
 399
 400 #ifdef TARGET_WORDS_BIGENDIAN
 401     s.info.endian = BFD_ENDIAN_BIG;
 402 #else
 403     s.info.endian = BFD_ENDIAN_LITTLE;
 404 #endif
 405
 406     if (cc->disas_set_info) {
 407         cc->disas_set_info(cpu, &s.info);
 408     }
 409
 410 #if defined(TARGET_I386)
 411     if (flags == 2) {
 412         s.info.mach = bfd_mach_x86_64;
 413     } else if (flags == 1) {
 414         s.info.mach = bfd_mach_i386_i8086;
 415     } else {
 416         s.info.mach = bfd_mach_i386_i386;
 417     }
 418     s.info.print_insn = print_insn_i386;
 419 #elif defined(TARGET_ALPHA)
 420     s.info.print_insn = print_insn_alpha;
 421 #elif defined(TARGET_PPC)
 422     if (flags & 0xFFFF) {
 423         /* If we have a precise definition of the instruction set, use it. */
 424         s.info.mach = flags & 0xFFFF;
 425     } else {
 426 #ifdef TARGET_PPC64
 427         s.info.mach = bfd_mach_ppc64;
 428 #else
 429         s.info.mach = bfd_mach_ppc;
 430 #endif
 431     }
 432     if ((flags >> 16) & 1) {
 433         s.info.endian = BFD_ENDIAN_LITTLE;
 434     }
 435     s.info.print_insn = print_insn_ppc;
 436 #elif defined(TARGET_MIPS)
 437 #ifdef TARGET_WORDS_BIGENDIAN
 438     s.info.print_insn = print_insn_big_mips;
 439 #else
 440     s.info.print_insn = print_insn_little_mips;
 441 #endif
 442 #elif defined(TARGET_SH4)
 443     s.info.mach = bfd_mach_sh4;
 444     s.info.print_insn = print_insn_sh;
 445 #elif defined(TARGET_LM32)
 446     s.info.mach = bfd_mach_lm32;
 447     s.info.print_insn = print_insn_lm32;
 448 #endif
 449     if (!s.info.print_insn) {
 450         monitor_printf(mon, "0x" TARGET_FMT_lx
 451                        ": Asm output not supported on this arch\n", pc);
 452         return;
 453     }
 454
 455     for(i = 0; i < nb_insn; i++) {
 456         monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
 457         count = s.info.print_insn(pc, &s.info);
 458         monitor_printf(mon, "\n");
 459         if (count < 0)
 460             break;
 461         pc += count;
 462     }
 463 }
 464 #endif