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iommu: Make sglists and dma_bdrv helpers use new universal DMA helpers
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1 /*
2 * DMA helper functions
3 *
4 * Copyright (c) 2009 Red Hat
5 *
6 * This work is licensed under the terms of the GNU General Public License
7 * (GNU GPL), version 2 or later.
8 */
9
10 #ifndef DMA_H
11 #define DMA_H
12
13 #include <stdio.h>
14 #include "hw/hw.h"
15 #include "block.h"
16
17 typedef struct DMAContext DMAContext;
18 typedef struct ScatterGatherEntry ScatterGatherEntry;
19
20 typedef enum {
21 DMA_DIRECTION_TO_DEVICE = 0,
22 DMA_DIRECTION_FROM_DEVICE = 1,
23 } DMADirection;
24
25 struct QEMUSGList {
26 ScatterGatherEntry *sg;
27 int nsg;
28 int nalloc;
29 size_t size;
30 DMAContext *dma;
31 };
32
33 #if defined(TARGET_PHYS_ADDR_BITS)
34 typedef target_phys_addr_t dma_addr_t;
35
36 #define DMA_ADDR_BITS TARGET_PHYS_ADDR_BITS
37 #define DMA_ADDR_FMT TARGET_FMT_plx
38
39 /* Checks that the given range of addresses is valid for DMA. This is
40 * useful for certain cases, but usually you should just use
41 * dma_memory_{read,write}() and check for errors */
42 static inline bool dma_memory_valid(DMAContext *dma, dma_addr_t addr,
43 dma_addr_t len, DMADirection dir)
44 {
45 /* Stub version, with no iommu we assume all bus addresses are valid */
46 return true;
47 }
48
49 static inline int dma_memory_rw(DMAContext *dma, dma_addr_t addr,
50 void *buf, dma_addr_t len, DMADirection dir)
51 {
52 /* Stub version when we have no iommu support */
53 cpu_physical_memory_rw(addr, buf, (target_phys_addr_t)len,
54 dir == DMA_DIRECTION_FROM_DEVICE);
55 return 0;
56 }
57
58 static inline int dma_memory_read(DMAContext *dma, dma_addr_t addr,
59 void *buf, dma_addr_t len)
60 {
61 return dma_memory_rw(dma, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
62 }
63
64 static inline int dma_memory_write(DMAContext *dma, dma_addr_t addr,
65 const void *buf, dma_addr_t len)
66 {
67 return dma_memory_rw(dma, addr, (void *)buf, len,
68 DMA_DIRECTION_FROM_DEVICE);
69 }
70
71 int dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c, dma_addr_t len);
72
73 static inline void *dma_memory_map(DMAContext *dma,
74 dma_addr_t addr, dma_addr_t *len,
75 DMADirection dir)
76 {
77 target_phys_addr_t xlen = *len;
78 void *p;
79
80 p = cpu_physical_memory_map(addr, &xlen,
81 dir == DMA_DIRECTION_FROM_DEVICE);
82 *len = xlen;
83 return p;
84 }
85
86 static inline void dma_memory_unmap(DMAContext *dma,
87 void *buffer, dma_addr_t len,
88 DMADirection dir, dma_addr_t access_len)
89 {
90 return cpu_physical_memory_unmap(buffer, (target_phys_addr_t)len,
91 dir == DMA_DIRECTION_FROM_DEVICE,
92 access_len);
93 }
94
95 #define DEFINE_LDST_DMA(_lname, _sname, _bits, _end) \
96 static inline uint##_bits##_t ld##_lname##_##_end##_dma(DMAContext *dma, \
97 dma_addr_t addr) \
98 { \
99 uint##_bits##_t val; \
100 dma_memory_read(dma, addr, &val, (_bits) / 8); \
101 return _end##_bits##_to_cpu(val); \
102 } \
103 static inline void st##_sname##_##_end##_dma(DMAContext *dma, \
104 dma_addr_t addr, \
105 uint##_bits##_t val) \
106 { \
107 val = cpu_to_##_end##_bits(val); \
108 dma_memory_write(dma, addr, &val, (_bits) / 8); \
109 }
110
111 static inline uint8_t ldub_dma(DMAContext *dma, dma_addr_t addr)
112 {
113 uint8_t val;
114
115 dma_memory_read(dma, addr, &val, 1);
116 return val;
117 }
118
119 static inline void stb_dma(DMAContext *dma, dma_addr_t addr, uint8_t val)
120 {
121 dma_memory_write(dma, addr, &val, 1);
122 }
123
124 DEFINE_LDST_DMA(uw, w, 16, le);
125 DEFINE_LDST_DMA(l, l, 32, le);
126 DEFINE_LDST_DMA(q, q, 64, le);
127 DEFINE_LDST_DMA(uw, w, 16, be);
128 DEFINE_LDST_DMA(l, l, 32, be);
129 DEFINE_LDST_DMA(q, q, 64, be);
130
131 #undef DEFINE_LDST_DMA
132
133 struct ScatterGatherEntry {
134 dma_addr_t base;
135 dma_addr_t len;
136 };
137
138 void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, DMAContext *dma);
139 void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len);
140 void qemu_sglist_destroy(QEMUSGList *qsg);
141 #endif
142
143 typedef BlockDriverAIOCB *DMAIOFunc(BlockDriverState *bs, int64_t sector_num,
144 QEMUIOVector *iov, int nb_sectors,
145 BlockDriverCompletionFunc *cb, void *opaque);
146
147 BlockDriverAIOCB *dma_bdrv_io(BlockDriverState *bs,
148 QEMUSGList *sg, uint64_t sector_num,
149 DMAIOFunc *io_func, BlockDriverCompletionFunc *cb,
150 void *opaque, DMADirection dir);
151 BlockDriverAIOCB *dma_bdrv_read(BlockDriverState *bs,
152 QEMUSGList *sg, uint64_t sector,
153 BlockDriverCompletionFunc *cb, void *opaque);
154 BlockDriverAIOCB *dma_bdrv_write(BlockDriverState *bs,
155 QEMUSGList *sg, uint64_t sector,
156 BlockDriverCompletionFunc *cb, void *opaque);
157 uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg);
158 uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg);
159
160 void dma_acct_start(BlockDriverState *bs, BlockAcctCookie *cookie,
161 QEMUSGList *sg, enum BlockAcctType type);
162
163 #endif