docs/system/arm/nuvoton.rst

   1 Nuvoton iBMC boards (``npcm750-evb``, ``quanta-gsj``)
   2 =====================================================
   3
   4 The `Nuvoton iBMC`_ chips (NPCM7xx) are a family of ARM-based SoCs that are
   5 designed to be used as Baseboard Management Controllers (BMCs) in various
   6 servers. They all feature one or two ARM Cortex A9 CPU cores, as well as an
   7 assortment of peripherals targeted for either Enterprise or Data Center /
   8 Hyperscale applications. The former is a superset of the latter, so NPCM750 has
   9 all the peripherals of NPCM730 and more.
  10
  11 .. _Nuvoton iBMC: https://www.nuvoton.com/products/cloud-computing/ibmc/
  12
  13 The NPCM750 SoC has two Cortex A9 cores and is targeted for the Enterprise
  14 segment. The following machines are based on this chip :
  15
  16 - ``npcm750-evb``       Nuvoton NPCM750 Evaluation board
  17
  18 The NPCM730 SoC has two Cortex A9 cores and is targeted for Data Center and
  19 Hyperscale applications. The following machines are based on this chip :
  20
  21 - ``quanta-gsj``        Quanta GSJ server BMC
  22
  23 There are also two more SoCs, NPCM710 and NPCM705, which are single-core
  24 variants of NPCM750 and NPCM730, respectively. These are currently not
  25 supported by QEMU.
  26
  27 Supported devices
  28 -----------------
  29
  30  * SMP (Dual Core Cortex-A9)
  31  * Cortex-A9MPCore built-in peripherals: SCU, GIC, Global Timer, Private Timer
  32    and Watchdog.
  33  * SRAM, ROM and DRAM mappings
  34  * System Global Control Registers (GCR)
  35  * Clock and reset controller (CLK)
  36  * Timer controller (TIM)
  37  * Serial ports (16550-based)
  38  * DDR4 memory controller (dummy interface indicating memory training is done)
  39  * OTP controllers (no protection features)
  40  * Flash Interface Unit (FIU; no protection features)
  41  * Random Number Generator (RNG)
  42  * USB host (USBH)
  43  * GPIO controller
  44
  45 Missing devices
  46 ---------------
  47
  48  * LPC/eSPI host-to-BMC interface, including
  49
  50    * Keyboard and mouse controller interface (KBCI)
  51    * Keyboard Controller Style (KCS) channels
  52    * BIOS POST code FIFO
  53    * System Wake-up Control (SWC)
  54    * Shared memory (SHM)
  55    * eSPI slave interface
  56
  57  * Ethernet controllers (GMAC and EMC)
  58  * USB device (USBD)
  59  * SMBus controller (SMBF)
  60  * Peripheral SPI controller (PSPI)
  61  * Analog to Digital Converter (ADC)
  62  * SD/MMC host
  63  * PECI interface
  64  * Pulse Width Modulation (PWM)
  65  * Tachometer
  66  * PCI and PCIe root complex and bridges
  67  * VDM and MCTP support
  68  * Serial I/O expansion
  69  * LPC/eSPI host
  70  * Coprocessor
  71  * Graphics
  72  * Video capture
  73  * Encoding compression engine
  74  * Security features
  75
  76 Boot options
  77 ------------
  78
  79 The Nuvoton machines can boot from an OpenBMC firmware image, or directly into
  80 a kernel using the ``-kernel`` option. OpenBMC images for `quanta-gsj` and
  81 possibly others can be downloaded from the OpenPOWER jenkins :
  82
  83    https://openpower.xyz/
  84
  85 The firmware image should be attached as an MTD drive. Example :
  86
  87 .. code-block:: bash
  88
  89   $ qemu-system-arm -machine quanta-gsj -nographic \
  90       -drive file=image-bmc,if=mtd,bus=0,unit=0,format=raw
  91
  92 The default root password for test images is usually ``0penBmc``.