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[mirror_ubuntu-artful-kernel.git] / drivers / acpi / acpica / hwregs.c
1 /*******************************************************************************
2 *
3 * Module Name: hwregs - Read/write access functions for the various ACPI
4 * control and status registers.
5 *
6 ******************************************************************************/
7
8 /*
9 * Copyright (C) 2000 - 2017, Intel Corp.
10 * All rights reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions, and the following disclaimer,
17 * without modification.
18 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
19 * substantially similar to the "NO WARRANTY" disclaimer below
20 * ("Disclaimer") and any redistribution must be conditioned upon
21 * including a substantially similar Disclaimer requirement for further
22 * binary redistribution.
23 * 3. Neither the names of the above-listed copyright holders nor the names
24 * of any contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * Alternatively, this software may be distributed under the terms of the
28 * GNU General Public License ("GPL") version 2 as published by the Free
29 * Software Foundation.
30 *
31 * NO WARRANTY
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
35 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
36 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
40 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
41 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
42 * POSSIBILITY OF SUCH DAMAGES.
43 */
44
45 #include <acpi/acpi.h>
46 #include "accommon.h"
47 #include "acevents.h"
48
49 #define _COMPONENT ACPI_HARDWARE
50 ACPI_MODULE_NAME("hwregs")
51
52 #if (!ACPI_REDUCED_HARDWARE)
53 /* Local Prototypes */
54 static u8
55 acpi_hw_get_access_bit_width(u64 address,
56 struct acpi_generic_address *reg,
57 u8 max_bit_width);
58
59 static acpi_status
60 acpi_hw_read_multiple(u32 *value,
61 struct acpi_generic_address *register_a,
62 struct acpi_generic_address *register_b);
63
64 static acpi_status
65 acpi_hw_write_multiple(u32 value,
66 struct acpi_generic_address *register_a,
67 struct acpi_generic_address *register_b);
68
69 #endif /* !ACPI_REDUCED_HARDWARE */
70
71 /******************************************************************************
72 *
73 * FUNCTION: acpi_hw_get_access_bit_width
74 *
75 * PARAMETERS: address - GAS register address
76 * reg - GAS register structure
77 * max_bit_width - Max bit_width supported (32 or 64)
78 *
79 * RETURN: Status
80 *
81 * DESCRIPTION: Obtain optimal access bit width
82 *
83 ******************************************************************************/
84
85 static u8
86 acpi_hw_get_access_bit_width(u64 address,
87 struct acpi_generic_address *reg, u8 max_bit_width)
88 {
89 u8 access_bit_width;
90
91 /*
92 * GAS format "register", used by FADT:
93 * 1. Detected if bit_offset is 0 and bit_width is 8/16/32/64;
94 * 2. access_size field is ignored and bit_width field is used for
95 * determining the boundary of the IO accesses.
96 * GAS format "region", used by APEI registers:
97 * 1. Detected if bit_offset is not 0 or bit_width is not 8/16/32/64;
98 * 2. access_size field is used for determining the boundary of the
99 * IO accesses;
100 * 3. bit_offset/bit_width fields are used to describe the "region".
101 *
102 * Note: This algorithm assumes that the "Address" fields should always
103 * contain aligned values.
104 */
105 if (!reg->bit_offset && reg->bit_width &&
106 ACPI_IS_POWER_OF_TWO(reg->bit_width) &&
107 ACPI_IS_ALIGNED(reg->bit_width, 8)) {
108 access_bit_width = reg->bit_width;
109 } else if (reg->access_width) {
110 access_bit_width = (1 << (reg->access_width + 2));
111 } else {
112 access_bit_width =
113 ACPI_ROUND_UP_POWER_OF_TWO_8(reg->bit_offset +
114 reg->bit_width);
115 if (access_bit_width <= 8) {
116 access_bit_width = 8;
117 } else {
118 while (!ACPI_IS_ALIGNED(address, access_bit_width >> 3)) {
119 access_bit_width >>= 1;
120 }
121 }
122 }
123
124 /* Maximum IO port access bit width is 32 */
125
126 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
127 max_bit_width = 32;
128 }
129
130 /*
131 * Return access width according to the requested maximum access bit width,
132 * as the caller should know the format of the register and may enforce
133 * a 32-bit accesses.
134 */
135 if (access_bit_width < max_bit_width) {
136 return (access_bit_width);
137 }
138 return (max_bit_width);
139 }
140
141 /******************************************************************************
142 *
143 * FUNCTION: acpi_hw_validate_register
144 *
145 * PARAMETERS: reg - GAS register structure
146 * max_bit_width - Max bit_width supported (32 or 64)
147 * address - Pointer to where the gas->address
148 * is returned
149 *
150 * RETURN: Status
151 *
152 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
153 * pointer, Address, space_id, bit_width, and bit_offset.
154 *
155 ******************************************************************************/
156
157 acpi_status
158 acpi_hw_validate_register(struct acpi_generic_address *reg,
159 u8 max_bit_width, u64 *address)
160 {
161 u8 bit_width;
162 u8 access_width;
163
164 /* Must have a valid pointer to a GAS structure */
165
166 if (!reg) {
167 return (AE_BAD_PARAMETER);
168 }
169
170 /*
171 * Copy the target address. This handles possible alignment issues.
172 * Address must not be null. A null address also indicates an optional
173 * ACPI register that is not supported, so no error message.
174 */
175 ACPI_MOVE_64_TO_64(address, &reg->address);
176 if (!(*address)) {
177 return (AE_BAD_ADDRESS);
178 }
179
180 /* Validate the space_ID */
181
182 if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
183 (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) {
184 ACPI_ERROR((AE_INFO,
185 "Unsupported address space: 0x%X", reg->space_id));
186 return (AE_SUPPORT);
187 }
188
189 /* Validate the access_width */
190
191 if (reg->access_width > 4) {
192 ACPI_ERROR((AE_INFO,
193 "Unsupported register access width: 0x%X",
194 reg->access_width));
195 return (AE_SUPPORT);
196 }
197
198 /* Validate the bit_width, convert access_width into number of bits */
199
200 access_width =
201 acpi_hw_get_access_bit_width(*address, reg, max_bit_width);
202 bit_width =
203 ACPI_ROUND_UP(reg->bit_offset + reg->bit_width, access_width);
204 if (max_bit_width < bit_width) {
205 ACPI_WARNING((AE_INFO,
206 "Requested bit width 0x%X is smaller than register bit width 0x%X",
207 max_bit_width, bit_width));
208 return (AE_SUPPORT);
209 }
210
211 return (AE_OK);
212 }
213
214 /******************************************************************************
215 *
216 * FUNCTION: acpi_hw_read
217 *
218 * PARAMETERS: value - Where the value is returned
219 * reg - GAS register structure
220 *
221 * RETURN: Status
222 *
223 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max
224 * version of acpi_read, used internally since the overhead of
225 * 64-bit values is not needed.
226 *
227 * LIMITATIONS: <These limitations also apply to acpi_hw_write>
228 * space_ID must be system_memory or system_IO.
229 *
230 ******************************************************************************/
231
232 acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg)
233 {
234 u64 address;
235 u8 access_width;
236 u32 bit_width;
237 u8 bit_offset;
238 u64 value64;
239 u32 value32;
240 u8 index;
241 acpi_status status;
242
243 ACPI_FUNCTION_NAME(hw_read);
244
245 /* Validate contents of the GAS register */
246
247 status = acpi_hw_validate_register(reg, 32, &address);
248 if (ACPI_FAILURE(status)) {
249 return (status);
250 }
251
252 /*
253 * Initialize entire 32-bit return value to zero, convert access_width
254 * into number of bits based
255 */
256 *value = 0;
257 access_width = acpi_hw_get_access_bit_width(address, reg, 32);
258 bit_width = reg->bit_offset + reg->bit_width;
259 bit_offset = reg->bit_offset;
260
261 /*
262 * Two address spaces supported: Memory or IO. PCI_Config is
263 * not supported here because the GAS structure is insufficient
264 */
265 index = 0;
266 while (bit_width) {
267 if (bit_offset >= access_width) {
268 value32 = 0;
269 bit_offset -= access_width;
270 } else {
271 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
272 status =
273 acpi_os_read_memory((acpi_physical_address)
274 address +
275 index *
276 ACPI_DIV_8
277 (access_width),
278 &value64, access_width);
279 value32 = (u32)value64;
280 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
281
282 status = acpi_hw_read_port((acpi_io_address)
283 address +
284 index *
285 ACPI_DIV_8
286 (access_width),
287 &value32,
288 access_width);
289 }
290 }
291
292 /*
293 * Use offset style bit writes because "Index * AccessWidth" is
294 * ensured to be less than 32-bits by acpi_hw_validate_register().
295 */
296 ACPI_SET_BITS(value, index * access_width,
297 ACPI_MASK_BITS_ABOVE_32(access_width), value32);
298
299 bit_width -=
300 bit_width > access_width ? access_width : bit_width;
301 index++;
302 }
303
304 ACPI_DEBUG_PRINT((ACPI_DB_IO,
305 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n",
306 *value, access_width, ACPI_FORMAT_UINT64(address),
307 acpi_ut_get_region_name(reg->space_id)));
308
309 return (status);
310 }
311
312 /******************************************************************************
313 *
314 * FUNCTION: acpi_hw_write
315 *
316 * PARAMETERS: value - Value to be written
317 * reg - GAS register structure
318 *
319 * RETURN: Status
320 *
321 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
322 * version of acpi_write, used internally since the overhead of
323 * 64-bit values is not needed.
324 *
325 ******************************************************************************/
326
327 acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
328 {
329 u64 address;
330 u8 access_width;
331 u32 bit_width;
332 u8 bit_offset;
333 u64 value64;
334 u32 value32;
335 u8 index;
336 acpi_status status;
337
338 ACPI_FUNCTION_NAME(hw_write);
339
340 /* Validate contents of the GAS register */
341
342 status = acpi_hw_validate_register(reg, 32, &address);
343 if (ACPI_FAILURE(status)) {
344 return (status);
345 }
346
347 /* Convert access_width into number of bits based */
348
349 access_width = acpi_hw_get_access_bit_width(address, reg, 32);
350 bit_width = reg->bit_offset + reg->bit_width;
351 bit_offset = reg->bit_offset;
352
353 /*
354 * Two address spaces supported: Memory or IO. PCI_Config is
355 * not supported here because the GAS structure is insufficient
356 */
357 index = 0;
358 while (bit_width) {
359 /*
360 * Use offset style bit reads because "Index * AccessWidth" is
361 * ensured to be less than 32-bits by acpi_hw_validate_register().
362 */
363 value32 = ACPI_GET_BITS(&value, index * access_width,
364 ACPI_MASK_BITS_ABOVE_32(access_width));
365
366 if (bit_offset >= access_width) {
367 bit_offset -= access_width;
368 } else {
369 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
370 value64 = (u64)value32;
371 status =
372 acpi_os_write_memory((acpi_physical_address)
373 address +
374 index *
375 ACPI_DIV_8
376 (access_width),
377 value64, access_width);
378 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
379
380 status = acpi_hw_write_port((acpi_io_address)
381 address +
382 index *
383 ACPI_DIV_8
384 (access_width),
385 value32,
386 access_width);
387 }
388 }
389
390 /*
391 * Index * access_width is ensured to be less than 32-bits by
392 * acpi_hw_validate_register().
393 */
394 bit_width -=
395 bit_width > access_width ? access_width : bit_width;
396 index++;
397 }
398
399 ACPI_DEBUG_PRINT((ACPI_DB_IO,
400 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
401 value, access_width, ACPI_FORMAT_UINT64(address),
402 acpi_ut_get_region_name(reg->space_id)));
403
404 return (status);
405 }
406
407 #if (!ACPI_REDUCED_HARDWARE)
408 /*******************************************************************************
409 *
410 * FUNCTION: acpi_hw_clear_acpi_status
411 *
412 * PARAMETERS: None
413 *
414 * RETURN: Status
415 *
416 * DESCRIPTION: Clears all fixed and general purpose status bits
417 *
418 ******************************************************************************/
419
420 acpi_status acpi_hw_clear_acpi_status(void)
421 {
422 acpi_status status;
423 acpi_cpu_flags lock_flags = 0;
424
425 ACPI_FUNCTION_TRACE(hw_clear_acpi_status);
426
427 ACPI_DEBUG_PRINT((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
428 ACPI_BITMASK_ALL_FIXED_STATUS,
429 ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address)));
430
431 lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock);
432
433 /* Clear the fixed events in PM1 A/B */
434
435 status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS,
436 ACPI_BITMASK_ALL_FIXED_STATUS);
437
438 acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags);
439
440 if (ACPI_FAILURE(status)) {
441 goto exit;
442 }
443
444 /* Clear the GPE Bits in all GPE registers in all GPE blocks */
445
446 status = acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block, NULL);
447
448 exit:
449 return_ACPI_STATUS(status);
450 }
451
452 /*******************************************************************************
453 *
454 * FUNCTION: acpi_hw_get_bit_register_info
455 *
456 * PARAMETERS: register_id - Index of ACPI Register to access
457 *
458 * RETURN: The bitmask to be used when accessing the register
459 *
460 * DESCRIPTION: Map register_id into a register bitmask.
461 *
462 ******************************************************************************/
463
464 struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
465 {
466 ACPI_FUNCTION_ENTRY();
467
468 if (register_id > ACPI_BITREG_MAX) {
469 ACPI_ERROR((AE_INFO, "Invalid BitRegister ID: 0x%X",
470 register_id));
471 return (NULL);
472 }
473
474 return (&acpi_gbl_bit_register_info[register_id]);
475 }
476
477 /******************************************************************************
478 *
479 * FUNCTION: acpi_hw_write_pm1_control
480 *
481 * PARAMETERS: pm1a_control - Value to be written to PM1A control
482 * pm1b_control - Value to be written to PM1B control
483 *
484 * RETURN: Status
485 *
486 * DESCRIPTION: Write the PM1 A/B control registers. These registers are
487 * different than than the PM1 A/B status and enable registers
488 * in that different values can be written to the A/B registers.
489 * Most notably, the SLP_TYP bits can be different, as per the
490 * values returned from the _Sx predefined methods.
491 *
492 ******************************************************************************/
493
494 acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control)
495 {
496 acpi_status status;
497
498 ACPI_FUNCTION_TRACE(hw_write_pm1_control);
499
500 status =
501 acpi_hw_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block);
502 if (ACPI_FAILURE(status)) {
503 return_ACPI_STATUS(status);
504 }
505
506 if (acpi_gbl_FADT.xpm1b_control_block.address) {
507 status =
508 acpi_hw_write(pm1b_control,
509 &acpi_gbl_FADT.xpm1b_control_block);
510 }
511 return_ACPI_STATUS(status);
512 }
513
514 /******************************************************************************
515 *
516 * FUNCTION: acpi_hw_register_read
517 *
518 * PARAMETERS: register_id - ACPI Register ID
519 * return_value - Where the register value is returned
520 *
521 * RETURN: Status and the value read.
522 *
523 * DESCRIPTION: Read from the specified ACPI register
524 *
525 ******************************************************************************/
526 acpi_status acpi_hw_register_read(u32 register_id, u32 *return_value)
527 {
528 u32 value = 0;
529 acpi_status status;
530
531 ACPI_FUNCTION_TRACE(hw_register_read);
532
533 switch (register_id) {
534 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
535
536 status = acpi_hw_read_multiple(&value,
537 &acpi_gbl_xpm1a_status,
538 &acpi_gbl_xpm1b_status);
539 break;
540
541 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
542
543 status = acpi_hw_read_multiple(&value,
544 &acpi_gbl_xpm1a_enable,
545 &acpi_gbl_xpm1b_enable);
546 break;
547
548 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
549
550 status = acpi_hw_read_multiple(&value,
551 &acpi_gbl_FADT.
552 xpm1a_control_block,
553 &acpi_gbl_FADT.
554 xpm1b_control_block);
555
556 /*
557 * Zero the write-only bits. From the ACPI specification, "Hardware
558 * Write-Only Bits": "Upon reads to registers with write-only bits,
559 * software masks out all write-only bits."
560 */
561 value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
562 break;
563
564 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
565
566 status =
567 acpi_hw_read(&value, &acpi_gbl_FADT.xpm2_control_block);
568 break;
569
570 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
571
572 status = acpi_hw_read(&value, &acpi_gbl_FADT.xpm_timer_block);
573 break;
574
575 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
576
577 status =
578 acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8);
579 break;
580
581 default:
582
583 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
584 status = AE_BAD_PARAMETER;
585 break;
586 }
587
588 if (ACPI_SUCCESS(status)) {
589 *return_value = value;
590 }
591
592 return_ACPI_STATUS(status);
593 }
594
595 /******************************************************************************
596 *
597 * FUNCTION: acpi_hw_register_write
598 *
599 * PARAMETERS: register_id - ACPI Register ID
600 * value - The value to write
601 *
602 * RETURN: Status
603 *
604 * DESCRIPTION: Write to the specified ACPI register
605 *
606 * NOTE: In accordance with the ACPI specification, this function automatically
607 * preserves the value of the following bits, meaning that these bits cannot be
608 * changed via this interface:
609 *
610 * PM1_CONTROL[0] = SCI_EN
611 * PM1_CONTROL[9]
612 * PM1_STATUS[11]
613 *
614 * ACPI References:
615 * 1) Hardware Ignored Bits: When software writes to a register with ignored
616 * bit fields, it preserves the ignored bit fields
617 * 2) SCI_EN: OSPM always preserves this bit position
618 *
619 ******************************************************************************/
620
621 acpi_status acpi_hw_register_write(u32 register_id, u32 value)
622 {
623 acpi_status status;
624 u32 read_value;
625
626 ACPI_FUNCTION_TRACE(hw_register_write);
627
628 switch (register_id) {
629 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
630 /*
631 * Handle the "ignored" bit in PM1 Status. According to the ACPI
632 * specification, ignored bits are to be preserved when writing.
633 * Normally, this would mean a read/modify/write sequence. However,
634 * preserving a bit in the status register is different. Writing a
635 * one clears the status, and writing a zero preserves the status.
636 * Therefore, we must always write zero to the ignored bit.
637 *
638 * This behavior is clarified in the ACPI 4.0 specification.
639 */
640 value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
641
642 status = acpi_hw_write_multiple(value,
643 &acpi_gbl_xpm1a_status,
644 &acpi_gbl_xpm1b_status);
645 break;
646
647 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
648
649 status = acpi_hw_write_multiple(value,
650 &acpi_gbl_xpm1a_enable,
651 &acpi_gbl_xpm1b_enable);
652 break;
653
654 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
655 /*
656 * Perform a read first to preserve certain bits (per ACPI spec)
657 * Note: This includes SCI_EN, we never want to change this bit
658 */
659 status = acpi_hw_read_multiple(&read_value,
660 &acpi_gbl_FADT.
661 xpm1a_control_block,
662 &acpi_gbl_FADT.
663 xpm1b_control_block);
664 if (ACPI_FAILURE(status)) {
665 goto exit;
666 }
667
668 /* Insert the bits to be preserved */
669
670 ACPI_INSERT_BITS(value, ACPI_PM1_CONTROL_PRESERVED_BITS,
671 read_value);
672
673 /* Now we can write the data */
674
675 status = acpi_hw_write_multiple(value,
676 &acpi_gbl_FADT.
677 xpm1a_control_block,
678 &acpi_gbl_FADT.
679 xpm1b_control_block);
680 break;
681
682 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
683 /*
684 * For control registers, all reserved bits must be preserved,
685 * as per the ACPI spec.
686 */
687 status =
688 acpi_hw_read(&read_value,
689 &acpi_gbl_FADT.xpm2_control_block);
690 if (ACPI_FAILURE(status)) {
691 goto exit;
692 }
693
694 /* Insert the bits to be preserved */
695
696 ACPI_INSERT_BITS(value, ACPI_PM2_CONTROL_PRESERVED_BITS,
697 read_value);
698
699 status =
700 acpi_hw_write(value, &acpi_gbl_FADT.xpm2_control_block);
701 break;
702
703 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
704
705 status = acpi_hw_write(value, &acpi_gbl_FADT.xpm_timer_block);
706 break;
707
708 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
709
710 /* SMI_CMD is currently always in IO space */
711
712 status =
713 acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8);
714 break;
715
716 default:
717
718 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
719 status = AE_BAD_PARAMETER;
720 break;
721 }
722
723 exit:
724 return_ACPI_STATUS(status);
725 }
726
727 /******************************************************************************
728 *
729 * FUNCTION: acpi_hw_read_multiple
730 *
731 * PARAMETERS: value - Where the register value is returned
732 * register_a - First ACPI register (required)
733 * register_b - Second ACPI register (optional)
734 *
735 * RETURN: Status
736 *
737 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
738 *
739 ******************************************************************************/
740
741 static acpi_status
742 acpi_hw_read_multiple(u32 *value,
743 struct acpi_generic_address *register_a,
744 struct acpi_generic_address *register_b)
745 {
746 u32 value_a = 0;
747 u32 value_b = 0;
748 acpi_status status;
749
750 /* The first register is always required */
751
752 status = acpi_hw_read(&value_a, register_a);
753 if (ACPI_FAILURE(status)) {
754 return (status);
755 }
756
757 /* Second register is optional */
758
759 if (register_b->address) {
760 status = acpi_hw_read(&value_b, register_b);
761 if (ACPI_FAILURE(status)) {
762 return (status);
763 }
764 }
765
766 /*
767 * OR the two return values together. No shifting or masking is necessary,
768 * because of how the PM1 registers are defined in the ACPI specification:
769 *
770 * "Although the bits can be split between the two register blocks (each
771 * register block has a unique pointer within the FADT), the bit positions
772 * are maintained. The register block with unimplemented bits (that is,
773 * those implemented in the other register block) always returns zeros,
774 * and writes have no side effects"
775 */
776 *value = (value_a | value_b);
777 return (AE_OK);
778 }
779
780 /******************************************************************************
781 *
782 * FUNCTION: acpi_hw_write_multiple
783 *
784 * PARAMETERS: value - The value to write
785 * register_a - First ACPI register (required)
786 * register_b - Second ACPI register (optional)
787 *
788 * RETURN: Status
789 *
790 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
791 *
792 ******************************************************************************/
793
794 static acpi_status
795 acpi_hw_write_multiple(u32 value,
796 struct acpi_generic_address *register_a,
797 struct acpi_generic_address *register_b)
798 {
799 acpi_status status;
800
801 /* The first register is always required */
802
803 status = acpi_hw_write(value, register_a);
804 if (ACPI_FAILURE(status)) {
805 return (status);
806 }
807
808 /*
809 * Second register is optional
810 *
811 * No bit shifting or clearing is necessary, because of how the PM1
812 * registers are defined in the ACPI specification:
813 *
814 * "Although the bits can be split between the two register blocks (each
815 * register block has a unique pointer within the FADT), the bit positions
816 * are maintained. The register block with unimplemented bits (that is,
817 * those implemented in the other register block) always returns zeros,
818 * and writes have no side effects"
819 */
820 if (register_b->address) {
821 status = acpi_hw_write(value, register_b);
822 }
823
824 return (status);
825 }
826
827 #endif /* !ACPI_REDUCED_HARDWARE */
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