1 /*******************************************************************************
3 * Module Name: hwregs - Read/write access functions for the various ACPI
4 * control and status registers.
6 ******************************************************************************/
9 * Copyright (C) 2000 - 2016, Intel Corp.
10 * All rights reserved.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions, and the following disclaimer,
17 * without modification.
18 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
19 * substantially similar to the "NO WARRANTY" disclaimer below
20 * ("Disclaimer") and any redistribution must be conditioned upon
21 * including a substantially similar Disclaimer requirement for further
22 * binary redistribution.
23 * 3. Neither the names of the above-listed copyright holders nor the names
24 * of any contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
27 * Alternatively, this software may be distributed under the terms of the
28 * GNU General Public License ("GPL") version 2 as published by the Free
29 * Software Foundation.
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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42 * POSSIBILITY OF SUCH DAMAGES.
45 #include <acpi/acpi.h>
49 #define _COMPONENT ACPI_HARDWARE
50 ACPI_MODULE_NAME("hwregs")
52 #if (!ACPI_REDUCED_HARDWARE)
53 /* Local Prototypes */
55 acpi_hw_get_access_bit_width(struct acpi_generic_address
*reg
,
59 acpi_hw_read_multiple(u32
*value
,
60 struct acpi_generic_address
*register_a
,
61 struct acpi_generic_address
*register_b
);
64 acpi_hw_write_multiple(u32 value
,
65 struct acpi_generic_address
*register_a
,
66 struct acpi_generic_address
*register_b
);
68 #endif /* !ACPI_REDUCED_HARDWARE */
70 /******************************************************************************
72 * FUNCTION: acpi_hw_get_access_bit_width
74 * PARAMETERS: reg - GAS register structure
75 * max_bit_width - Max bit_width supported (32 or 64)
79 * DESCRIPTION: Obtain optimal access bit width
81 ******************************************************************************/
84 acpi_hw_get_access_bit_width(struct acpi_generic_address
*reg
, u8 max_bit_width
)
88 if (!reg
->access_width
) {
90 * Detect old register descriptors where only the bit_width field
91 * makes senses. The target address is copied to handle possible
94 ACPI_MOVE_64_TO_64(&address
, ®
->address
);
95 if (!reg
->bit_offset
&& reg
->bit_width
&&
96 ACPI_IS_POWER_OF_TWO(reg
->bit_width
) &&
97 ACPI_IS_ALIGNED(reg
->bit_width
, 8) &&
98 ACPI_IS_ALIGNED(address
, reg
->bit_width
)) {
99 return (reg
->bit_width
);
101 if (reg
->space_id
== ACPI_ADR_SPACE_SYSTEM_IO
) {
104 return (max_bit_width
);
108 return (1 << (reg
->access_width
+ 2));
112 /******************************************************************************
114 * FUNCTION: acpi_hw_validate_register
116 * PARAMETERS: reg - GAS register structure
117 * max_bit_width - Max bit_width supported (32 or 64)
118 * address - Pointer to where the gas->address
123 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
124 * pointer, Address, space_id, bit_width, and bit_offset.
126 ******************************************************************************/
129 acpi_hw_validate_register(struct acpi_generic_address
*reg
,
130 u8 max_bit_width
, u64
*address
)
135 /* Must have a valid pointer to a GAS structure */
138 return (AE_BAD_PARAMETER
);
142 * Copy the target address. This handles possible alignment issues.
143 * Address must not be null. A null address also indicates an optional
144 * ACPI register that is not supported, so no error message.
146 ACPI_MOVE_64_TO_64(address
, ®
->address
);
148 return (AE_BAD_ADDRESS
);
151 /* Validate the space_ID */
153 if ((reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_MEMORY
) &&
154 (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
)) {
156 "Unsupported address space: 0x%X", reg
->space_id
));
160 /* Validate the access_width */
162 if (reg
->access_width
> 4) {
164 "Unsupported register access width: 0x%X",
169 /* Validate the bit_width, convert access_width into number of bits */
171 access_width
= acpi_hw_get_access_bit_width(reg
, max_bit_width
);
173 ACPI_ROUND_UP(reg
->bit_offset
+ reg
->bit_width
, access_width
);
174 if (max_bit_width
< bit_width
) {
175 ACPI_WARNING((AE_INFO
,
176 "Requested bit width 0x%X is smaller than register bit width 0x%X",
177 max_bit_width
, bit_width
));
184 /******************************************************************************
186 * FUNCTION: acpi_hw_read
188 * PARAMETERS: value - Where the value is returned
189 * reg - GAS register structure
193 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max
194 * version of acpi_read, used internally since the overhead of
195 * 64-bit values is not needed.
197 * LIMITATIONS: <These limitations also apply to acpi_hw_write>
198 * bit_width must be exactly 8, 16, or 32.
199 * space_ID must be system_memory or system_IO.
200 * bit_offset and access_width are currently ignored, as there has
201 * not been a need to implement these.
203 ******************************************************************************/
205 acpi_status
acpi_hw_read(u32
*value
, struct acpi_generic_address
*reg
)
211 ACPI_FUNCTION_NAME(hw_read
);
213 /* Validate contents of the GAS register */
215 status
= acpi_hw_validate_register(reg
, 32, &address
);
216 if (ACPI_FAILURE(status
)) {
220 /* Initialize entire 32-bit return value to zero */
225 * Two address spaces supported: Memory or IO. PCI_Config is
226 * not supported here because the GAS structure is insufficient
228 if (reg
->space_id
== ACPI_ADR_SPACE_SYSTEM_MEMORY
) {
229 status
= acpi_os_read_memory((acpi_physical_address
)
230 address
, &value64
, reg
->bit_width
);
232 *value
= (u32
)value64
;
233 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
235 status
= acpi_hw_read_port((acpi_io_address
)
236 address
, value
, reg
->bit_width
);
239 ACPI_DEBUG_PRINT((ACPI_DB_IO
,
240 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n",
241 *value
, reg
->bit_width
, ACPI_FORMAT_UINT64(address
),
242 acpi_ut_get_region_name(reg
->space_id
)));
247 /******************************************************************************
249 * FUNCTION: acpi_hw_write
251 * PARAMETERS: value - Value to be written
252 * reg - GAS register structure
256 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
257 * version of acpi_write, used internally since the overhead of
258 * 64-bit values is not needed.
260 ******************************************************************************/
262 acpi_status
acpi_hw_write(u32 value
, struct acpi_generic_address
*reg
)
267 ACPI_FUNCTION_NAME(hw_write
);
269 /* Validate contents of the GAS register */
271 status
= acpi_hw_validate_register(reg
, 32, &address
);
272 if (ACPI_FAILURE(status
)) {
277 * Two address spaces supported: Memory or IO. PCI_Config is
278 * not supported here because the GAS structure is insufficient
280 if (reg
->space_id
== ACPI_ADR_SPACE_SYSTEM_MEMORY
) {
281 status
= acpi_os_write_memory((acpi_physical_address
)
284 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
286 status
= acpi_hw_write_port((acpi_io_address
)
287 address
, value
, reg
->bit_width
);
290 ACPI_DEBUG_PRINT((ACPI_DB_IO
,
291 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
292 value
, reg
->bit_width
, ACPI_FORMAT_UINT64(address
),
293 acpi_ut_get_region_name(reg
->space_id
)));
298 #if (!ACPI_REDUCED_HARDWARE)
299 /*******************************************************************************
301 * FUNCTION: acpi_hw_clear_acpi_status
307 * DESCRIPTION: Clears all fixed and general purpose status bits
309 ******************************************************************************/
311 acpi_status
acpi_hw_clear_acpi_status(void)
314 acpi_cpu_flags lock_flags
= 0;
316 ACPI_FUNCTION_TRACE(hw_clear_acpi_status
);
318 ACPI_DEBUG_PRINT((ACPI_DB_IO
, "About to write %04X to %8.8X%8.8X\n",
319 ACPI_BITMASK_ALL_FIXED_STATUS
,
320 ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status
.address
)));
322 lock_flags
= acpi_os_acquire_lock(acpi_gbl_hardware_lock
);
324 /* Clear the fixed events in PM1 A/B */
326 status
= acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS
,
327 ACPI_BITMASK_ALL_FIXED_STATUS
);
329 acpi_os_release_lock(acpi_gbl_hardware_lock
, lock_flags
);
331 if (ACPI_FAILURE(status
)) {
335 /* Clear the GPE Bits in all GPE registers in all GPE blocks */
337 status
= acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block
, NULL
);
340 return_ACPI_STATUS(status
);
343 /*******************************************************************************
345 * FUNCTION: acpi_hw_get_bit_register_info
347 * PARAMETERS: register_id - Index of ACPI Register to access
349 * RETURN: The bitmask to be used when accessing the register
351 * DESCRIPTION: Map register_id into a register bitmask.
353 ******************************************************************************/
355 struct acpi_bit_register_info
*acpi_hw_get_bit_register_info(u32 register_id
)
357 ACPI_FUNCTION_ENTRY();
359 if (register_id
> ACPI_BITREG_MAX
) {
360 ACPI_ERROR((AE_INFO
, "Invalid BitRegister ID: 0x%X",
365 return (&acpi_gbl_bit_register_info
[register_id
]);
368 /******************************************************************************
370 * FUNCTION: acpi_hw_write_pm1_control
372 * PARAMETERS: pm1a_control - Value to be written to PM1A control
373 * pm1b_control - Value to be written to PM1B control
377 * DESCRIPTION: Write the PM1 A/B control registers. These registers are
378 * different than than the PM1 A/B status and enable registers
379 * in that different values can be written to the A/B registers.
380 * Most notably, the SLP_TYP bits can be different, as per the
381 * values returned from the _Sx predefined methods.
383 ******************************************************************************/
385 acpi_status
acpi_hw_write_pm1_control(u32 pm1a_control
, u32 pm1b_control
)
389 ACPI_FUNCTION_TRACE(hw_write_pm1_control
);
392 acpi_hw_write(pm1a_control
, &acpi_gbl_FADT
.xpm1a_control_block
);
393 if (ACPI_FAILURE(status
)) {
394 return_ACPI_STATUS(status
);
397 if (acpi_gbl_FADT
.xpm1b_control_block
.address
) {
399 acpi_hw_write(pm1b_control
,
400 &acpi_gbl_FADT
.xpm1b_control_block
);
402 return_ACPI_STATUS(status
);
405 /******************************************************************************
407 * FUNCTION: acpi_hw_register_read
409 * PARAMETERS: register_id - ACPI Register ID
410 * return_value - Where the register value is returned
412 * RETURN: Status and the value read.
414 * DESCRIPTION: Read from the specified ACPI register
416 ******************************************************************************/
417 acpi_status
acpi_hw_register_read(u32 register_id
, u32
*return_value
)
422 ACPI_FUNCTION_TRACE(hw_register_read
);
424 switch (register_id
) {
425 case ACPI_REGISTER_PM1_STATUS
: /* PM1 A/B: 16-bit access each */
427 status
= acpi_hw_read_multiple(&value
,
428 &acpi_gbl_xpm1a_status
,
429 &acpi_gbl_xpm1b_status
);
432 case ACPI_REGISTER_PM1_ENABLE
: /* PM1 A/B: 16-bit access each */
434 status
= acpi_hw_read_multiple(&value
,
435 &acpi_gbl_xpm1a_enable
,
436 &acpi_gbl_xpm1b_enable
);
439 case ACPI_REGISTER_PM1_CONTROL
: /* PM1 A/B: 16-bit access each */
441 status
= acpi_hw_read_multiple(&value
,
445 xpm1b_control_block
);
448 * Zero the write-only bits. From the ACPI specification, "Hardware
449 * Write-Only Bits": "Upon reads to registers with write-only bits,
450 * software masks out all write-only bits."
452 value
&= ~ACPI_PM1_CONTROL_WRITEONLY_BITS
;
455 case ACPI_REGISTER_PM2_CONTROL
: /* 8-bit access */
458 acpi_hw_read(&value
, &acpi_gbl_FADT
.xpm2_control_block
);
461 case ACPI_REGISTER_PM_TIMER
: /* 32-bit access */
463 status
= acpi_hw_read(&value
, &acpi_gbl_FADT
.xpm_timer_block
);
466 case ACPI_REGISTER_SMI_COMMAND_BLOCK
: /* 8-bit access */
469 acpi_hw_read_port(acpi_gbl_FADT
.smi_command
, &value
, 8);
474 ACPI_ERROR((AE_INFO
, "Unknown Register ID: 0x%X", register_id
));
475 status
= AE_BAD_PARAMETER
;
479 if (ACPI_SUCCESS(status
)) {
480 *return_value
= value
;
483 return_ACPI_STATUS(status
);
486 /******************************************************************************
488 * FUNCTION: acpi_hw_register_write
490 * PARAMETERS: register_id - ACPI Register ID
491 * value - The value to write
495 * DESCRIPTION: Write to the specified ACPI register
497 * NOTE: In accordance with the ACPI specification, this function automatically
498 * preserves the value of the following bits, meaning that these bits cannot be
499 * changed via this interface:
501 * PM1_CONTROL[0] = SCI_EN
506 * 1) Hardware Ignored Bits: When software writes to a register with ignored
507 * bit fields, it preserves the ignored bit fields
508 * 2) SCI_EN: OSPM always preserves this bit position
510 ******************************************************************************/
512 acpi_status
acpi_hw_register_write(u32 register_id
, u32 value
)
517 ACPI_FUNCTION_TRACE(hw_register_write
);
519 switch (register_id
) {
520 case ACPI_REGISTER_PM1_STATUS
: /* PM1 A/B: 16-bit access each */
522 * Handle the "ignored" bit in PM1 Status. According to the ACPI
523 * specification, ignored bits are to be preserved when writing.
524 * Normally, this would mean a read/modify/write sequence. However,
525 * preserving a bit in the status register is different. Writing a
526 * one clears the status, and writing a zero preserves the status.
527 * Therefore, we must always write zero to the ignored bit.
529 * This behavior is clarified in the ACPI 4.0 specification.
531 value
&= ~ACPI_PM1_STATUS_PRESERVED_BITS
;
533 status
= acpi_hw_write_multiple(value
,
534 &acpi_gbl_xpm1a_status
,
535 &acpi_gbl_xpm1b_status
);
538 case ACPI_REGISTER_PM1_ENABLE
: /* PM1 A/B: 16-bit access each */
540 status
= acpi_hw_write_multiple(value
,
541 &acpi_gbl_xpm1a_enable
,
542 &acpi_gbl_xpm1b_enable
);
545 case ACPI_REGISTER_PM1_CONTROL
: /* PM1 A/B: 16-bit access each */
547 * Perform a read first to preserve certain bits (per ACPI spec)
548 * Note: This includes SCI_EN, we never want to change this bit
550 status
= acpi_hw_read_multiple(&read_value
,
554 xpm1b_control_block
);
555 if (ACPI_FAILURE(status
)) {
559 /* Insert the bits to be preserved */
561 ACPI_INSERT_BITS(value
, ACPI_PM1_CONTROL_PRESERVED_BITS
,
564 /* Now we can write the data */
566 status
= acpi_hw_write_multiple(value
,
570 xpm1b_control_block
);
573 case ACPI_REGISTER_PM2_CONTROL
: /* 8-bit access */
575 * For control registers, all reserved bits must be preserved,
576 * as per the ACPI spec.
579 acpi_hw_read(&read_value
,
580 &acpi_gbl_FADT
.xpm2_control_block
);
581 if (ACPI_FAILURE(status
)) {
585 /* Insert the bits to be preserved */
587 ACPI_INSERT_BITS(value
, ACPI_PM2_CONTROL_PRESERVED_BITS
,
591 acpi_hw_write(value
, &acpi_gbl_FADT
.xpm2_control_block
);
594 case ACPI_REGISTER_PM_TIMER
: /* 32-bit access */
596 status
= acpi_hw_write(value
, &acpi_gbl_FADT
.xpm_timer_block
);
599 case ACPI_REGISTER_SMI_COMMAND_BLOCK
: /* 8-bit access */
601 /* SMI_CMD is currently always in IO space */
604 acpi_hw_write_port(acpi_gbl_FADT
.smi_command
, value
, 8);
609 ACPI_ERROR((AE_INFO
, "Unknown Register ID: 0x%X", register_id
));
610 status
= AE_BAD_PARAMETER
;
615 return_ACPI_STATUS(status
);
618 /******************************************************************************
620 * FUNCTION: acpi_hw_read_multiple
622 * PARAMETERS: value - Where the register value is returned
623 * register_a - First ACPI register (required)
624 * register_b - Second ACPI register (optional)
628 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
630 ******************************************************************************/
633 acpi_hw_read_multiple(u32
*value
,
634 struct acpi_generic_address
*register_a
,
635 struct acpi_generic_address
*register_b
)
641 /* The first register is always required */
643 status
= acpi_hw_read(&value_a
, register_a
);
644 if (ACPI_FAILURE(status
)) {
648 /* Second register is optional */
650 if (register_b
->address
) {
651 status
= acpi_hw_read(&value_b
, register_b
);
652 if (ACPI_FAILURE(status
)) {
658 * OR the two return values together. No shifting or masking is necessary,
659 * because of how the PM1 registers are defined in the ACPI specification:
661 * "Although the bits can be split between the two register blocks (each
662 * register block has a unique pointer within the FADT), the bit positions
663 * are maintained. The register block with unimplemented bits (that is,
664 * those implemented in the other register block) always returns zeros,
665 * and writes have no side effects"
667 *value
= (value_a
| value_b
);
671 /******************************************************************************
673 * FUNCTION: acpi_hw_write_multiple
675 * PARAMETERS: value - The value to write
676 * register_a - First ACPI register (required)
677 * register_b - Second ACPI register (optional)
681 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
683 ******************************************************************************/
686 acpi_hw_write_multiple(u32 value
,
687 struct acpi_generic_address
*register_a
,
688 struct acpi_generic_address
*register_b
)
692 /* The first register is always required */
694 status
= acpi_hw_write(value
, register_a
);
695 if (ACPI_FAILURE(status
)) {
700 * Second register is optional
702 * No bit shifting or clearing is necessary, because of how the PM1
703 * registers are defined in the ACPI specification:
705 * "Although the bits can be split between the two register blocks (each
706 * register block has a unique pointer within the FADT), the bit positions
707 * are maintained. The register block with unimplemented bits (that is,
708 * those implemented in the other register block) always returns zeros,
709 * and writes have no side effects"
711 if (register_b
->address
) {
712 status
= acpi_hw_write(value
, register_b
);
718 #endif /* !ACPI_REDUCED_HARDWARE */