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ACPICA: Hardware: Add access_width/bit_offset support in acpi_hw_write()
[mirror_ubuntu-artful-kernel.git] / drivers / acpi / acpica / hwregs.c
1 /*******************************************************************************
2 *
3 * Module Name: hwregs - Read/write access functions for the various ACPI
4 * control and status registers.
5 *
6 ******************************************************************************/
7
8 /*
9 * Copyright (C) 2000 - 2016, Intel Corp.
10 * All rights reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions, and the following disclaimer,
17 * without modification.
18 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
19 * substantially similar to the "NO WARRANTY" disclaimer below
20 * ("Disclaimer") and any redistribution must be conditioned upon
21 * including a substantially similar Disclaimer requirement for further
22 * binary redistribution.
23 * 3. Neither the names of the above-listed copyright holders nor the names
24 * of any contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * Alternatively, this software may be distributed under the terms of the
28 * GNU General Public License ("GPL") version 2 as published by the Free
29 * Software Foundation.
30 *
31 * NO WARRANTY
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
35 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
36 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
40 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
41 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
42 * POSSIBILITY OF SUCH DAMAGES.
43 */
44
45 #include <acpi/acpi.h>
46 #include "accommon.h"
47 #include "acevents.h"
48
49 #define _COMPONENT ACPI_HARDWARE
50 ACPI_MODULE_NAME("hwregs")
51
52 #if (!ACPI_REDUCED_HARDWARE)
53 /* Local Prototypes */
54 static u8
55 acpi_hw_get_access_bit_width(struct acpi_generic_address *reg,
56 u8 max_bit_width);
57
58 static acpi_status
59 acpi_hw_read_multiple(u32 *value,
60 struct acpi_generic_address *register_a,
61 struct acpi_generic_address *register_b);
62
63 static acpi_status
64 acpi_hw_write_multiple(u32 value,
65 struct acpi_generic_address *register_a,
66 struct acpi_generic_address *register_b);
67
68 #endif /* !ACPI_REDUCED_HARDWARE */
69
70 /******************************************************************************
71 *
72 * FUNCTION: acpi_hw_get_access_bit_width
73 *
74 * PARAMETERS: reg - GAS register structure
75 * max_bit_width - Max bit_width supported (32 or 64)
76 *
77 * RETURN: Status
78 *
79 * DESCRIPTION: Obtain optimal access bit width
80 *
81 ******************************************************************************/
82
83 static u8
84 acpi_hw_get_access_bit_width(struct acpi_generic_address *reg, u8 max_bit_width)
85 {
86 if (!reg->access_width) {
87 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
88 max_bit_width = 32;
89 }
90
91 /*
92 * Detect old register descriptors where only the bit_width field
93 * makes senses.
94 */
95 if (reg->bit_width < max_bit_width &&
96 !reg->bit_offset && reg->bit_width &&
97 ACPI_IS_POWER_OF_TWO(reg->bit_width) &&
98 ACPI_IS_ALIGNED(reg->bit_width, 8)) {
99 return (reg->bit_width);
100 }
101 return (max_bit_width);
102 } else {
103 return (1 << (reg->access_width + 2));
104 }
105 }
106
107 /******************************************************************************
108 *
109 * FUNCTION: acpi_hw_validate_register
110 *
111 * PARAMETERS: reg - GAS register structure
112 * max_bit_width - Max bit_width supported (32 or 64)
113 * address - Pointer to where the gas->address
114 * is returned
115 *
116 * RETURN: Status
117 *
118 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
119 * pointer, Address, space_id, bit_width, and bit_offset.
120 *
121 ******************************************************************************/
122
123 acpi_status
124 acpi_hw_validate_register(struct acpi_generic_address *reg,
125 u8 max_bit_width, u64 *address)
126 {
127 u8 bit_width;
128 u8 access_width;
129
130 /* Must have a valid pointer to a GAS structure */
131
132 if (!reg) {
133 return (AE_BAD_PARAMETER);
134 }
135
136 /*
137 * Copy the target address. This handles possible alignment issues.
138 * Address must not be null. A null address also indicates an optional
139 * ACPI register that is not supported, so no error message.
140 */
141 ACPI_MOVE_64_TO_64(address, &reg->address);
142 if (!(*address)) {
143 return (AE_BAD_ADDRESS);
144 }
145
146 /* Validate the space_ID */
147
148 if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
149 (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) {
150 ACPI_ERROR((AE_INFO,
151 "Unsupported address space: 0x%X", reg->space_id));
152 return (AE_SUPPORT);
153 }
154
155 /* Validate the access_width */
156
157 if (reg->access_width > 4) {
158 ACPI_ERROR((AE_INFO,
159 "Unsupported register access width: 0x%X",
160 reg->access_width));
161 return (AE_SUPPORT);
162 }
163
164 /* Validate the bit_width, convert access_width into number of bits */
165
166 access_width = acpi_hw_get_access_bit_width(reg, max_bit_width);
167 bit_width =
168 ACPI_ROUND_UP(reg->bit_offset + reg->bit_width, access_width);
169 if (max_bit_width < bit_width) {
170 ACPI_WARNING((AE_INFO,
171 "Requested bit width 0x%X is smaller than register bit width 0x%X",
172 max_bit_width, bit_width));
173 return (AE_SUPPORT);
174 }
175
176 return (AE_OK);
177 }
178
179 /******************************************************************************
180 *
181 * FUNCTION: acpi_hw_read
182 *
183 * PARAMETERS: value - Where the value is returned
184 * reg - GAS register structure
185 *
186 * RETURN: Status
187 *
188 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max
189 * version of acpi_read, used internally since the overhead of
190 * 64-bit values is not needed.
191 *
192 * LIMITATIONS: <These limitations also apply to acpi_hw_write>
193 * space_ID must be system_memory or system_IO.
194 *
195 ******************************************************************************/
196
197 acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg)
198 {
199 u64 address;
200 u8 access_width;
201 u32 bit_width;
202 u8 bit_offset;
203 u64 value64;
204 u32 value32;
205 u8 index;
206 acpi_status status;
207
208 ACPI_FUNCTION_NAME(hw_read);
209
210 /* Validate contents of the GAS register */
211
212 status = acpi_hw_validate_register(reg, 32, &address);
213 if (ACPI_FAILURE(status)) {
214 return (status);
215 }
216
217 /*
218 * Initialize entire 32-bit return value to zero, convert access_width
219 * into number of bits based
220 */
221 *value = 0;
222 access_width = acpi_hw_get_access_bit_width(reg, 32);
223 bit_width = reg->bit_offset + reg->bit_width;
224 bit_offset = reg->bit_offset;
225
226 /*
227 * Two address spaces supported: Memory or IO. PCI_Config is
228 * not supported here because the GAS structure is insufficient
229 */
230 index = 0;
231 while (bit_width) {
232 if (bit_offset >= access_width) {
233 value32 = 0;
234 bit_offset -= access_width;
235 } else {
236 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
237 status =
238 acpi_os_read_memory((acpi_physical_address)
239 address +
240 index *
241 ACPI_DIV_8
242 (access_width),
243 &value64, access_width);
244 value32 = (u32)value64;
245 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
246
247 status = acpi_hw_read_port((acpi_io_address)
248 address +
249 index *
250 ACPI_DIV_8
251 (access_width),
252 &value32,
253 access_width);
254 }
255 }
256
257 /*
258 * Use offset style bit writes because "Index * AccessWidth" is
259 * ensured to be less than 32-bits by acpi_hw_validate_register().
260 */
261 ACPI_SET_BITS(value, index * access_width,
262 ACPI_MASK_BITS_ABOVE_32(access_width), value32);
263
264 bit_width -=
265 bit_width > access_width ? access_width : bit_width;
266 index++;
267 }
268
269 ACPI_DEBUG_PRINT((ACPI_DB_IO,
270 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n",
271 *value, access_width, ACPI_FORMAT_UINT64(address),
272 acpi_ut_get_region_name(reg->space_id)));
273
274 return (status);
275 }
276
277 /******************************************************************************
278 *
279 * FUNCTION: acpi_hw_write
280 *
281 * PARAMETERS: value - Value to be written
282 * reg - GAS register structure
283 *
284 * RETURN: Status
285 *
286 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
287 * version of acpi_write, used internally since the overhead of
288 * 64-bit values is not needed.
289 *
290 ******************************************************************************/
291
292 acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
293 {
294 u64 address;
295 u8 access_width;
296 u32 bit_width;
297 u8 bit_offset;
298 u64 value64;
299 u32 value32;
300 u8 index;
301 acpi_status status;
302
303 ACPI_FUNCTION_NAME(hw_write);
304
305 /* Validate contents of the GAS register */
306
307 status = acpi_hw_validate_register(reg, 32, &address);
308 if (ACPI_FAILURE(status)) {
309 return (status);
310 }
311
312 /* Convert access_width into number of bits based */
313
314 access_width = acpi_hw_get_access_bit_width(reg, 32);
315 bit_width = reg->bit_offset + reg->bit_width;
316 bit_offset = reg->bit_offset;
317
318 /*
319 * Two address spaces supported: Memory or IO. PCI_Config is
320 * not supported here because the GAS structure is insufficient
321 */
322 index = 0;
323 while (bit_width) {
324 /*
325 * Use offset style bit reads because "Index * AccessWidth" is
326 * ensured to be less than 32-bits by acpi_hw_validate_register().
327 */
328 value32 = ACPI_GET_BITS(&value, index * access_width,
329 ACPI_MASK_BITS_ABOVE_32(access_width));
330
331 if (bit_offset >= access_width) {
332 bit_offset -= access_width;
333 } else {
334 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
335 value64 = (u64)value32;
336 status =
337 acpi_os_write_memory((acpi_physical_address)
338 address +
339 index *
340 ACPI_DIV_8
341 (access_width),
342 value64, access_width);
343 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
344
345 status = acpi_hw_write_port((acpi_io_address)
346 address +
347 index *
348 ACPI_DIV_8
349 (access_width),
350 value32,
351 access_width);
352 }
353 }
354
355 /*
356 * Index * access_width is ensured to be less than 32-bits by
357 * acpi_hw_validate_register().
358 */
359 bit_width -=
360 bit_width > access_width ? access_width : bit_width;
361 index++;
362 }
363
364 ACPI_DEBUG_PRINT((ACPI_DB_IO,
365 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
366 value, access_width, ACPI_FORMAT_UINT64(address),
367 acpi_ut_get_region_name(reg->space_id)));
368
369 return (status);
370 }
371
372 #if (!ACPI_REDUCED_HARDWARE)
373 /*******************************************************************************
374 *
375 * FUNCTION: acpi_hw_clear_acpi_status
376 *
377 * PARAMETERS: None
378 *
379 * RETURN: Status
380 *
381 * DESCRIPTION: Clears all fixed and general purpose status bits
382 *
383 ******************************************************************************/
384
385 acpi_status acpi_hw_clear_acpi_status(void)
386 {
387 acpi_status status;
388 acpi_cpu_flags lock_flags = 0;
389
390 ACPI_FUNCTION_TRACE(hw_clear_acpi_status);
391
392 ACPI_DEBUG_PRINT((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
393 ACPI_BITMASK_ALL_FIXED_STATUS,
394 ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address)));
395
396 lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock);
397
398 /* Clear the fixed events in PM1 A/B */
399
400 status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS,
401 ACPI_BITMASK_ALL_FIXED_STATUS);
402
403 acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags);
404
405 if (ACPI_FAILURE(status)) {
406 goto exit;
407 }
408
409 /* Clear the GPE Bits in all GPE registers in all GPE blocks */
410
411 status = acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block, NULL);
412
413 exit:
414 return_ACPI_STATUS(status);
415 }
416
417 /*******************************************************************************
418 *
419 * FUNCTION: acpi_hw_get_bit_register_info
420 *
421 * PARAMETERS: register_id - Index of ACPI Register to access
422 *
423 * RETURN: The bitmask to be used when accessing the register
424 *
425 * DESCRIPTION: Map register_id into a register bitmask.
426 *
427 ******************************************************************************/
428
429 struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
430 {
431 ACPI_FUNCTION_ENTRY();
432
433 if (register_id > ACPI_BITREG_MAX) {
434 ACPI_ERROR((AE_INFO, "Invalid BitRegister ID: 0x%X",
435 register_id));
436 return (NULL);
437 }
438
439 return (&acpi_gbl_bit_register_info[register_id]);
440 }
441
442 /******************************************************************************
443 *
444 * FUNCTION: acpi_hw_write_pm1_control
445 *
446 * PARAMETERS: pm1a_control - Value to be written to PM1A control
447 * pm1b_control - Value to be written to PM1B control
448 *
449 * RETURN: Status
450 *
451 * DESCRIPTION: Write the PM1 A/B control registers. These registers are
452 * different than than the PM1 A/B status and enable registers
453 * in that different values can be written to the A/B registers.
454 * Most notably, the SLP_TYP bits can be different, as per the
455 * values returned from the _Sx predefined methods.
456 *
457 ******************************************************************************/
458
459 acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control)
460 {
461 acpi_status status;
462
463 ACPI_FUNCTION_TRACE(hw_write_pm1_control);
464
465 status =
466 acpi_hw_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block);
467 if (ACPI_FAILURE(status)) {
468 return_ACPI_STATUS(status);
469 }
470
471 if (acpi_gbl_FADT.xpm1b_control_block.address) {
472 status =
473 acpi_hw_write(pm1b_control,
474 &acpi_gbl_FADT.xpm1b_control_block);
475 }
476 return_ACPI_STATUS(status);
477 }
478
479 /******************************************************************************
480 *
481 * FUNCTION: acpi_hw_register_read
482 *
483 * PARAMETERS: register_id - ACPI Register ID
484 * return_value - Where the register value is returned
485 *
486 * RETURN: Status and the value read.
487 *
488 * DESCRIPTION: Read from the specified ACPI register
489 *
490 ******************************************************************************/
491 acpi_status acpi_hw_register_read(u32 register_id, u32 *return_value)
492 {
493 u32 value = 0;
494 acpi_status status;
495
496 ACPI_FUNCTION_TRACE(hw_register_read);
497
498 switch (register_id) {
499 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
500
501 status = acpi_hw_read_multiple(&value,
502 &acpi_gbl_xpm1a_status,
503 &acpi_gbl_xpm1b_status);
504 break;
505
506 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
507
508 status = acpi_hw_read_multiple(&value,
509 &acpi_gbl_xpm1a_enable,
510 &acpi_gbl_xpm1b_enable);
511 break;
512
513 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
514
515 status = acpi_hw_read_multiple(&value,
516 &acpi_gbl_FADT.
517 xpm1a_control_block,
518 &acpi_gbl_FADT.
519 xpm1b_control_block);
520
521 /*
522 * Zero the write-only bits. From the ACPI specification, "Hardware
523 * Write-Only Bits": "Upon reads to registers with write-only bits,
524 * software masks out all write-only bits."
525 */
526 value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
527 break;
528
529 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
530
531 status =
532 acpi_hw_read(&value, &acpi_gbl_FADT.xpm2_control_block);
533 break;
534
535 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
536
537 status = acpi_hw_read(&value, &acpi_gbl_FADT.xpm_timer_block);
538 break;
539
540 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
541
542 status =
543 acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8);
544 break;
545
546 default:
547
548 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
549 status = AE_BAD_PARAMETER;
550 break;
551 }
552
553 if (ACPI_SUCCESS(status)) {
554 *return_value = value;
555 }
556
557 return_ACPI_STATUS(status);
558 }
559
560 /******************************************************************************
561 *
562 * FUNCTION: acpi_hw_register_write
563 *
564 * PARAMETERS: register_id - ACPI Register ID
565 * value - The value to write
566 *
567 * RETURN: Status
568 *
569 * DESCRIPTION: Write to the specified ACPI register
570 *
571 * NOTE: In accordance with the ACPI specification, this function automatically
572 * preserves the value of the following bits, meaning that these bits cannot be
573 * changed via this interface:
574 *
575 * PM1_CONTROL[0] = SCI_EN
576 * PM1_CONTROL[9]
577 * PM1_STATUS[11]
578 *
579 * ACPI References:
580 * 1) Hardware Ignored Bits: When software writes to a register with ignored
581 * bit fields, it preserves the ignored bit fields
582 * 2) SCI_EN: OSPM always preserves this bit position
583 *
584 ******************************************************************************/
585
586 acpi_status acpi_hw_register_write(u32 register_id, u32 value)
587 {
588 acpi_status status;
589 u32 read_value;
590
591 ACPI_FUNCTION_TRACE(hw_register_write);
592
593 switch (register_id) {
594 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
595 /*
596 * Handle the "ignored" bit in PM1 Status. According to the ACPI
597 * specification, ignored bits are to be preserved when writing.
598 * Normally, this would mean a read/modify/write sequence. However,
599 * preserving a bit in the status register is different. Writing a
600 * one clears the status, and writing a zero preserves the status.
601 * Therefore, we must always write zero to the ignored bit.
602 *
603 * This behavior is clarified in the ACPI 4.0 specification.
604 */
605 value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
606
607 status = acpi_hw_write_multiple(value,
608 &acpi_gbl_xpm1a_status,
609 &acpi_gbl_xpm1b_status);
610 break;
611
612 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
613
614 status = acpi_hw_write_multiple(value,
615 &acpi_gbl_xpm1a_enable,
616 &acpi_gbl_xpm1b_enable);
617 break;
618
619 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
620 /*
621 * Perform a read first to preserve certain bits (per ACPI spec)
622 * Note: This includes SCI_EN, we never want to change this bit
623 */
624 status = acpi_hw_read_multiple(&read_value,
625 &acpi_gbl_FADT.
626 xpm1a_control_block,
627 &acpi_gbl_FADT.
628 xpm1b_control_block);
629 if (ACPI_FAILURE(status)) {
630 goto exit;
631 }
632
633 /* Insert the bits to be preserved */
634
635 ACPI_INSERT_BITS(value, ACPI_PM1_CONTROL_PRESERVED_BITS,
636 read_value);
637
638 /* Now we can write the data */
639
640 status = acpi_hw_write_multiple(value,
641 &acpi_gbl_FADT.
642 xpm1a_control_block,
643 &acpi_gbl_FADT.
644 xpm1b_control_block);
645 break;
646
647 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
648 /*
649 * For control registers, all reserved bits must be preserved,
650 * as per the ACPI spec.
651 */
652 status =
653 acpi_hw_read(&read_value,
654 &acpi_gbl_FADT.xpm2_control_block);
655 if (ACPI_FAILURE(status)) {
656 goto exit;
657 }
658
659 /* Insert the bits to be preserved */
660
661 ACPI_INSERT_BITS(value, ACPI_PM2_CONTROL_PRESERVED_BITS,
662 read_value);
663
664 status =
665 acpi_hw_write(value, &acpi_gbl_FADT.xpm2_control_block);
666 break;
667
668 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
669
670 status = acpi_hw_write(value, &acpi_gbl_FADT.xpm_timer_block);
671 break;
672
673 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
674
675 /* SMI_CMD is currently always in IO space */
676
677 status =
678 acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8);
679 break;
680
681 default:
682
683 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
684 status = AE_BAD_PARAMETER;
685 break;
686 }
687
688 exit:
689 return_ACPI_STATUS(status);
690 }
691
692 /******************************************************************************
693 *
694 * FUNCTION: acpi_hw_read_multiple
695 *
696 * PARAMETERS: value - Where the register value is returned
697 * register_a - First ACPI register (required)
698 * register_b - Second ACPI register (optional)
699 *
700 * RETURN: Status
701 *
702 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
703 *
704 ******************************************************************************/
705
706 static acpi_status
707 acpi_hw_read_multiple(u32 *value,
708 struct acpi_generic_address *register_a,
709 struct acpi_generic_address *register_b)
710 {
711 u32 value_a = 0;
712 u32 value_b = 0;
713 acpi_status status;
714
715 /* The first register is always required */
716
717 status = acpi_hw_read(&value_a, register_a);
718 if (ACPI_FAILURE(status)) {
719 return (status);
720 }
721
722 /* Second register is optional */
723
724 if (register_b->address) {
725 status = acpi_hw_read(&value_b, register_b);
726 if (ACPI_FAILURE(status)) {
727 return (status);
728 }
729 }
730
731 /*
732 * OR the two return values together. No shifting or masking is necessary,
733 * because of how the PM1 registers are defined in the ACPI specification:
734 *
735 * "Although the bits can be split between the two register blocks (each
736 * register block has a unique pointer within the FADT), the bit positions
737 * are maintained. The register block with unimplemented bits (that is,
738 * those implemented in the other register block) always returns zeros,
739 * and writes have no side effects"
740 */
741 *value = (value_a | value_b);
742 return (AE_OK);
743 }
744
745 /******************************************************************************
746 *
747 * FUNCTION: acpi_hw_write_multiple
748 *
749 * PARAMETERS: value - The value to write
750 * register_a - First ACPI register (required)
751 * register_b - Second ACPI register (optional)
752 *
753 * RETURN: Status
754 *
755 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
756 *
757 ******************************************************************************/
758
759 static acpi_status
760 acpi_hw_write_multiple(u32 value,
761 struct acpi_generic_address *register_a,
762 struct acpi_generic_address *register_b)
763 {
764 acpi_status status;
765
766 /* The first register is always required */
767
768 status = acpi_hw_write(value, register_a);
769 if (ACPI_FAILURE(status)) {
770 return (status);
771 }
772
773 /*
774 * Second register is optional
775 *
776 * No bit shifting or clearing is necessary, because of how the PM1
777 * registers are defined in the ACPI specification:
778 *
779 * "Although the bits can be split between the two register blocks (each
780 * register block has a unique pointer within the FADT), the bit positions
781 * are maintained. The register block with unimplemented bits (that is,
782 * those implemented in the other register block) always returns zeros,
783 * and writes have no side effects"
784 */
785 if (register_b->address) {
786 status = acpi_hw_write(value, register_b);
787 }
788
789 return (status);
790 }
791
792 #endif /* !ACPI_REDUCED_HARDWARE */
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