2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/pm_qos_params.h>
42 #include <linux/clockchips.h>
43 #include <linux/cpuidle.h>
44 #include <linux/irqflags.h>
47 * Include the apic definitions for x86 to have the APIC timer related defines
48 * available also for UP (on SMP it gets magically included via linux/smp.h).
49 * asm/acpi.h is not an option, as it would require more include magic. Also
50 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
57 #include <asm/uaccess.h>
59 #include <acpi/acpi_bus.h>
60 #include <acpi/processor.h>
61 #include <asm/processor.h>
63 #define ACPI_PROCESSOR_CLASS "processor"
64 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
65 ACPI_MODULE_NAME("processor_idle");
66 #define ACPI_PROCESSOR_FILE_POWER "power"
67 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
68 #define C2_OVERHEAD 1 /* 1us */
69 #define C3_OVERHEAD 1 /* 1us */
70 #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
72 static unsigned int max_cstate __read_mostly
= ACPI_PROCESSOR_MAX_POWER
;
73 module_param(max_cstate
, uint
, 0000);
74 static unsigned int nocst __read_mostly
;
75 module_param(nocst
, uint
, 0000);
77 static unsigned int latency_factor __read_mostly
= 2;
78 module_param(latency_factor
, uint
, 0644);
80 static s64
us_to_pm_timer_ticks(s64 t
)
82 return div64_u64(t
* PM_TIMER_FREQUENCY
, 1000000);
85 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
86 * For now disable this. Probably a bug somewhere else.
88 * To skip this limit, boot/load with a large max_cstate limit.
90 static int set_max_cstate(const struct dmi_system_id
*id
)
92 if (max_cstate
> ACPI_PROCESSOR_MAX_POWER
)
95 printk(KERN_NOTICE PREFIX
"%s detected - limiting to C%ld max_cstate."
96 " Override with \"processor.max_cstate=%d\"\n", id
->ident
,
97 (long)id
->driver_data
, ACPI_PROCESSOR_MAX_POWER
+ 1);
99 max_cstate
= (long)id
->driver_data
;
104 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
105 callers to only run once -AK */
106 static struct dmi_system_id __cpuinitdata processor_power_dmi_table
[] = {
107 { set_max_cstate
, "Clevo 5600D", {
108 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
109 DMI_MATCH(DMI_BIOS_VERSION
,"SHE845M0.86C.0013.D.0302131307")},
116 * Callers should disable interrupts before the call and enable
117 * interrupts after return.
119 static void acpi_safe_halt(void)
121 current_thread_info()->status
&= ~TS_POLLING
;
123 * TS_POLLING-cleared state must be visible before we
127 if (!need_resched()) {
131 current_thread_info()->status
|= TS_POLLING
;
134 #ifdef ARCH_APICTIMER_STOPS_ON_C3
137 * Some BIOS implementations switch to C3 in the published C2 state.
138 * This seems to be a common problem on AMD boxen, but other vendors
139 * are affected too. We pick the most conservative approach: we assume
140 * that the local APIC stops in both C2 and C3.
142 static void acpi_timer_check_state(int state
, struct acpi_processor
*pr
,
143 struct acpi_processor_cx
*cx
)
145 struct acpi_processor_power
*pwr
= &pr
->power
;
146 u8 type
= local_apic_timer_c2_ok
? ACPI_STATE_C3
: ACPI_STATE_C2
;
148 if (cpu_has(&cpu_data(pr
->id
), X86_FEATURE_ARAT
))
152 * Check, if one of the previous states already marked the lapic
155 if (pwr
->timer_broadcast_on_state
< state
)
158 if (cx
->type
>= type
)
159 pr
->power
.timer_broadcast_on_state
= state
;
162 static void acpi_propagate_timer_broadcast(struct acpi_processor
*pr
)
164 unsigned long reason
;
166 reason
= pr
->power
.timer_broadcast_on_state
< INT_MAX
?
167 CLOCK_EVT_NOTIFY_BROADCAST_ON
: CLOCK_EVT_NOTIFY_BROADCAST_OFF
;
169 clockevents_notify(reason
, &pr
->id
);
172 /* Power(C) State timer broadcast control */
173 static void acpi_state_timer_broadcast(struct acpi_processor
*pr
,
174 struct acpi_processor_cx
*cx
,
177 int state
= cx
- pr
->power
.states
;
179 if (state
>= pr
->power
.timer_broadcast_on_state
) {
180 unsigned long reason
;
182 reason
= broadcast
? CLOCK_EVT_NOTIFY_BROADCAST_ENTER
:
183 CLOCK_EVT_NOTIFY_BROADCAST_EXIT
;
184 clockevents_notify(reason
, &pr
->id
);
190 static void acpi_timer_check_state(int state
, struct acpi_processor
*pr
,
191 struct acpi_processor_cx
*cstate
) { }
192 static void acpi_propagate_timer_broadcast(struct acpi_processor
*pr
) { }
193 static void acpi_state_timer_broadcast(struct acpi_processor
*pr
,
194 struct acpi_processor_cx
*cx
,
202 * Suspend / resume control
204 static int acpi_idle_suspend
;
205 static u32 saved_bm_rld
;
207 static void acpi_idle_bm_rld_save(void)
209 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, &saved_bm_rld
);
211 static void acpi_idle_bm_rld_restore(void)
215 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, &resumed_bm_rld
);
217 if (resumed_bm_rld
!= saved_bm_rld
)
218 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, saved_bm_rld
);
221 int acpi_processor_suspend(struct acpi_device
* device
, pm_message_t state
)
223 if (acpi_idle_suspend
== 1)
226 acpi_idle_bm_rld_save();
227 acpi_idle_suspend
= 1;
231 int acpi_processor_resume(struct acpi_device
* device
)
233 if (acpi_idle_suspend
== 0)
236 acpi_idle_bm_rld_restore();
237 acpi_idle_suspend
= 0;
241 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
242 static int tsc_halts_in_c(int state
)
244 switch (boot_cpu_data
.x86_vendor
) {
246 case X86_VENDOR_INTEL
:
248 * AMD Fam10h TSC will tick in all
249 * C/P/S0/S1 states when this bit is set.
251 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC
))
256 return state
> ACPI_STATE_C1
;
261 static int acpi_processor_get_power_info_fadt(struct acpi_processor
*pr
)
270 /* if info is obtained from pblk/fadt, type equals state */
271 pr
->power
.states
[ACPI_STATE_C2
].type
= ACPI_STATE_C2
;
272 pr
->power
.states
[ACPI_STATE_C3
].type
= ACPI_STATE_C3
;
274 #ifndef CONFIG_HOTPLUG_CPU
276 * Check for P_LVL2_UP flag before entering C2 and above on
279 if ((num_online_cpus() > 1) &&
280 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
284 /* determine C2 and C3 address from pblk */
285 pr
->power
.states
[ACPI_STATE_C2
].address
= pr
->pblk
+ 4;
286 pr
->power
.states
[ACPI_STATE_C3
].address
= pr
->pblk
+ 5;
288 /* determine latencies from FADT */
289 pr
->power
.states
[ACPI_STATE_C2
].latency
= acpi_gbl_FADT
.C2latency
;
290 pr
->power
.states
[ACPI_STATE_C3
].latency
= acpi_gbl_FADT
.C3latency
;
292 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
293 "lvl2[0x%08x] lvl3[0x%08x]\n",
294 pr
->power
.states
[ACPI_STATE_C2
].address
,
295 pr
->power
.states
[ACPI_STATE_C3
].address
));
300 static int acpi_processor_get_power_info_default(struct acpi_processor
*pr
)
302 if (!pr
->power
.states
[ACPI_STATE_C1
].valid
) {
303 /* set the first C-State to C1 */
304 /* all processors need to support C1 */
305 pr
->power
.states
[ACPI_STATE_C1
].type
= ACPI_STATE_C1
;
306 pr
->power
.states
[ACPI_STATE_C1
].valid
= 1;
307 pr
->power
.states
[ACPI_STATE_C1
].entry_method
= ACPI_CSTATE_HALT
;
309 /* the C0 state only exists as a filler in our array */
310 pr
->power
.states
[ACPI_STATE_C0
].valid
= 1;
314 static int acpi_processor_get_power_info_cst(struct acpi_processor
*pr
)
316 acpi_status status
= 0;
320 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
321 union acpi_object
*cst
;
329 status
= acpi_evaluate_object(pr
->handle
, "_CST", NULL
, &buffer
);
330 if (ACPI_FAILURE(status
)) {
331 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "No _CST, giving up\n"));
335 cst
= buffer
.pointer
;
337 /* There must be at least 2 elements */
338 if (!cst
|| (cst
->type
!= ACPI_TYPE_PACKAGE
) || cst
->package
.count
< 2) {
339 printk(KERN_ERR PREFIX
"not enough elements in _CST\n");
344 count
= cst
->package
.elements
[0].integer
.value
;
346 /* Validate number of power states. */
347 if (count
< 1 || count
!= cst
->package
.count
- 1) {
348 printk(KERN_ERR PREFIX
"count given by _CST is not valid\n");
353 /* Tell driver that at least _CST is supported. */
354 pr
->flags
.has_cst
= 1;
356 for (i
= 1; i
<= count
; i
++) {
357 union acpi_object
*element
;
358 union acpi_object
*obj
;
359 struct acpi_power_register
*reg
;
360 struct acpi_processor_cx cx
;
362 memset(&cx
, 0, sizeof(cx
));
364 element
= &(cst
->package
.elements
[i
]);
365 if (element
->type
!= ACPI_TYPE_PACKAGE
)
368 if (element
->package
.count
!= 4)
371 obj
= &(element
->package
.elements
[0]);
373 if (obj
->type
!= ACPI_TYPE_BUFFER
)
376 reg
= (struct acpi_power_register
*)obj
->buffer
.pointer
;
378 if (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
&&
379 (reg
->space_id
!= ACPI_ADR_SPACE_FIXED_HARDWARE
))
382 /* There should be an easy way to extract an integer... */
383 obj
= &(element
->package
.elements
[1]);
384 if (obj
->type
!= ACPI_TYPE_INTEGER
)
387 cx
.type
= obj
->integer
.value
;
389 * Some buggy BIOSes won't list C1 in _CST -
390 * Let acpi_processor_get_power_info_default() handle them later
392 if (i
== 1 && cx
.type
!= ACPI_STATE_C1
)
395 cx
.address
= reg
->address
;
396 cx
.index
= current_count
+ 1;
398 cx
.entry_method
= ACPI_CSTATE_SYSTEMIO
;
399 if (reg
->space_id
== ACPI_ADR_SPACE_FIXED_HARDWARE
) {
400 if (acpi_processor_ffh_cstate_probe
401 (pr
->id
, &cx
, reg
) == 0) {
402 cx
.entry_method
= ACPI_CSTATE_FFH
;
403 } else if (cx
.type
== ACPI_STATE_C1
) {
405 * C1 is a special case where FIXED_HARDWARE
406 * can be handled in non-MWAIT way as well.
407 * In that case, save this _CST entry info.
408 * Otherwise, ignore this info and continue.
410 cx
.entry_method
= ACPI_CSTATE_HALT
;
411 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI HLT");
415 if (cx
.type
== ACPI_STATE_C1
&&
416 (idle_halt
|| idle_nomwait
)) {
418 * In most cases the C1 space_id obtained from
419 * _CST object is FIXED_HARDWARE access mode.
420 * But when the option of idle=halt is added,
421 * the entry_method type should be changed from
422 * CSTATE_FFH to CSTATE_HALT.
423 * When the option of idle=nomwait is added,
424 * the C1 entry_method type should be
427 cx
.entry_method
= ACPI_CSTATE_HALT
;
428 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI HLT");
431 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI IOPORT 0x%x",
435 if (cx
.type
== ACPI_STATE_C1
) {
439 obj
= &(element
->package
.elements
[2]);
440 if (obj
->type
!= ACPI_TYPE_INTEGER
)
443 cx
.latency
= obj
->integer
.value
;
445 obj
= &(element
->package
.elements
[3]);
446 if (obj
->type
!= ACPI_TYPE_INTEGER
)
449 cx
.power
= obj
->integer
.value
;
452 memcpy(&(pr
->power
.states
[current_count
]), &cx
, sizeof(cx
));
455 * We support total ACPI_PROCESSOR_MAX_POWER - 1
456 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
458 if (current_count
>= (ACPI_PROCESSOR_MAX_POWER
- 1)) {
460 "Limiting number of power states to max (%d)\n",
461 ACPI_PROCESSOR_MAX_POWER
);
463 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
468 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "Found %d power states\n",
471 /* Validate number of power states discovered */
472 if (current_count
< 2)
476 kfree(buffer
.pointer
);
481 static void acpi_processor_power_verify_c2(struct acpi_processor_cx
*cx
)
488 * C2 latency must be less than or equal to 100
491 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C2_LATENCY
) {
492 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
493 "latency too large [%d]\n", cx
->latency
));
498 * Otherwise we've met all of our C2 requirements.
499 * Normalize the C2 latency to expidite policy
503 cx
->latency_ticks
= cx
->latency
;
508 static void acpi_processor_power_verify_c3(struct acpi_processor
*pr
,
509 struct acpi_processor_cx
*cx
)
511 static int bm_check_flag
;
518 * C3 latency must be less than or equal to 1000
521 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C3_LATENCY
) {
522 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
523 "latency too large [%d]\n", cx
->latency
));
528 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
529 * DMA transfers are used by any ISA device to avoid livelock.
530 * Note that we could disable Type-F DMA (as recommended by
531 * the erratum), but this is known to disrupt certain ISA
532 * devices thus we take the conservative approach.
534 else if (errata
.piix4
.fdma
) {
535 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
536 "C3 not supported on PIIX4 with Type-F DMA\n"));
540 /* All the logic here assumes flags.bm_check is same across all CPUs */
541 if (!bm_check_flag
) {
542 /* Determine whether bm_check is needed based on CPU */
543 acpi_processor_power_init_bm_check(&(pr
->flags
), pr
->id
);
544 bm_check_flag
= pr
->flags
.bm_check
;
546 pr
->flags
.bm_check
= bm_check_flag
;
549 if (pr
->flags
.bm_check
) {
550 if (!pr
->flags
.bm_control
) {
551 if (pr
->flags
.has_cst
!= 1) {
552 /* bus mastering control is necessary */
553 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
554 "C3 support requires BM control\n"));
557 /* Here we enter C3 without bus mastering */
558 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
559 "C3 support without BM control\n"));
564 * WBINVD should be set in fadt, for C3 state to be
565 * supported on when bm_check is not required.
567 if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_WBINVD
)) {
568 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
569 "Cache invalidation should work properly"
570 " for C3 to be enabled on SMP systems\n"));
576 * Otherwise we've met all of our C3 requirements.
577 * Normalize the C3 latency to expidite policy. Enable
578 * checking of bus mastering status (bm_check) so we can
579 * use this in our C3 policy
583 cx
->latency_ticks
= cx
->latency
;
585 * On older chipsets, BM_RLD needs to be set
586 * in order for Bus Master activity to wake the
587 * system from C3. Newer chipsets handle DMA
588 * during C3 automatically and BM_RLD is a NOP.
589 * In either case, the proper way to
590 * handle BM_RLD is to set it and leave it set.
592 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, 1);
597 static int acpi_processor_power_verify(struct acpi_processor
*pr
)
600 unsigned int working
= 0;
602 pr
->power
.timer_broadcast_on_state
= INT_MAX
;
604 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
605 struct acpi_processor_cx
*cx
= &pr
->power
.states
[i
];
607 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
608 /* TSC could halt in idle, so notify users */
609 if (tsc_halts_in_c(cx
->type
))
610 mark_tsc_unstable("TSC halts in idle");;
618 acpi_processor_power_verify_c2(cx
);
620 acpi_timer_check_state(i
, pr
, cx
);
624 acpi_processor_power_verify_c3(pr
, cx
);
626 acpi_timer_check_state(i
, pr
, cx
);
634 acpi_propagate_timer_broadcast(pr
);
639 static int acpi_processor_get_power_info(struct acpi_processor
*pr
)
645 /* NOTE: the idle thread may not be running while calling
648 /* Zero initialize all the C-states info. */
649 memset(pr
->power
.states
, 0, sizeof(pr
->power
.states
));
651 result
= acpi_processor_get_power_info_cst(pr
);
652 if (result
== -ENODEV
)
653 result
= acpi_processor_get_power_info_fadt(pr
);
658 acpi_processor_get_power_info_default(pr
);
660 pr
->power
.count
= acpi_processor_power_verify(pr
);
663 * if one state of type C2 or C3 is available, mark this
664 * CPU as being "idle manageable"
666 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
667 if (pr
->power
.states
[i
].valid
) {
669 if (pr
->power
.states
[i
].type
>= ACPI_STATE_C2
)
677 static int acpi_processor_power_seq_show(struct seq_file
*seq
, void *offset
)
679 struct acpi_processor
*pr
= seq
->private;
686 seq_printf(seq
, "active state: C%zd\n"
688 "maximum allowed latency: %d usec\n",
689 pr
->power
.state
? pr
->power
.state
- pr
->power
.states
: 0,
690 max_cstate
, pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY
));
692 seq_puts(seq
, "states:\n");
694 for (i
= 1; i
<= pr
->power
.count
; i
++) {
695 seq_printf(seq
, " %cC%d: ",
696 (&pr
->power
.states
[i
] ==
697 pr
->power
.state
? '*' : ' '), i
);
699 if (!pr
->power
.states
[i
].valid
) {
700 seq_puts(seq
, "<not supported>\n");
704 switch (pr
->power
.states
[i
].type
) {
706 seq_printf(seq
, "type[C1] ");
709 seq_printf(seq
, "type[C2] ");
712 seq_printf(seq
, "type[C3] ");
715 seq_printf(seq
, "type[--] ");
719 if (pr
->power
.states
[i
].promotion
.state
)
720 seq_printf(seq
, "promotion[C%zd] ",
721 (pr
->power
.states
[i
].promotion
.state
-
724 seq_puts(seq
, "promotion[--] ");
726 if (pr
->power
.states
[i
].demotion
.state
)
727 seq_printf(seq
, "demotion[C%zd] ",
728 (pr
->power
.states
[i
].demotion
.state
-
731 seq_puts(seq
, "demotion[--] ");
733 seq_printf(seq
, "latency[%03d] usage[%08d] duration[%020llu]\n",
734 pr
->power
.states
[i
].latency
,
735 pr
->power
.states
[i
].usage
,
736 (unsigned long long)pr
->power
.states
[i
].time
);
743 static int acpi_processor_power_open_fs(struct inode
*inode
, struct file
*file
)
745 return single_open(file
, acpi_processor_power_seq_show
,
749 static const struct file_operations acpi_processor_power_fops
= {
750 .owner
= THIS_MODULE
,
751 .open
= acpi_processor_power_open_fs
,
754 .release
= single_release
,
759 * acpi_idle_bm_check - checks if bus master activity was detected
761 static int acpi_idle_bm_check(void)
765 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS
, &bm_status
);
767 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS
, 1);
769 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
770 * the true state of bus mastering activity; forcing us to
771 * manually check the BMIDEA bit of each IDE channel.
773 else if (errata
.piix4
.bmisx
) {
774 if ((inb_p(errata
.piix4
.bmisx
+ 0x02) & 0x01)
775 || (inb_p(errata
.piix4
.bmisx
+ 0x0A) & 0x01))
782 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
785 * Caller disables interrupt before call and enables interrupt after return.
787 static inline void acpi_idle_do_entry(struct acpi_processor_cx
*cx
)
789 /* Don't trace irqs off for idle */
790 stop_critical_timings();
791 if (cx
->entry_method
== ACPI_CSTATE_FFH
) {
792 /* Call into architectural FFH based C-state */
793 acpi_processor_ffh_cstate_enter(cx
);
794 } else if (cx
->entry_method
== ACPI_CSTATE_HALT
) {
798 /* IO port based C-state */
800 /* Dummy wait op - must do something useless after P_LVL2 read
801 because chipsets cannot guarantee that STPCLK# signal
802 gets asserted in time to freeze execution properly. */
803 unused
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
805 start_critical_timings();
809 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
810 * @dev: the target CPU
811 * @state: the state data
813 * This is equivalent to the HALT instruction.
815 static int acpi_idle_enter_c1(struct cpuidle_device
*dev
,
816 struct cpuidle_state
*state
)
820 struct acpi_processor
*pr
;
821 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
823 pr
= __get_cpu_var(processors
);
830 /* Do not access any ACPI IO ports in suspend path */
831 if (acpi_idle_suspend
) {
837 kt1
= ktime_get_real();
838 acpi_idle_do_entry(cx
);
839 kt2
= ktime_get_real();
840 idle_time
= ktime_to_us(ktime_sub(kt2
, kt1
));
849 * acpi_idle_enter_simple - enters an ACPI state without BM handling
850 * @dev: the target CPU
851 * @state: the state data
853 static int acpi_idle_enter_simple(struct cpuidle_device
*dev
,
854 struct cpuidle_state
*state
)
856 struct acpi_processor
*pr
;
857 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
862 pr
= __get_cpu_var(processors
);
867 if (acpi_idle_suspend
)
868 return(acpi_idle_enter_c1(dev
, state
));
871 current_thread_info()->status
&= ~TS_POLLING
;
873 * TS_POLLING-cleared state must be visible before we test
878 if (unlikely(need_resched())) {
879 current_thread_info()->status
|= TS_POLLING
;
885 * Must be done before busmaster disable as we might need to
888 acpi_state_timer_broadcast(pr
, cx
, 1);
890 if (cx
->type
== ACPI_STATE_C3
)
891 ACPI_FLUSH_CPU_CACHE();
893 kt1
= ktime_get_real();
894 /* Tell the scheduler that we are going deep-idle: */
895 sched_clock_idle_sleep_event();
896 acpi_idle_do_entry(cx
);
897 kt2
= ktime_get_real();
898 idle_time
= ktime_to_us(ktime_sub(kt2
, kt1
));
900 sleep_ticks
= us_to_pm_timer_ticks(idle_time
);
902 /* Tell the scheduler how much we idled: */
903 sched_clock_idle_wakeup_event(sleep_ticks
*PM_TIMER_TICK_NS
);
906 current_thread_info()->status
|= TS_POLLING
;
910 acpi_state_timer_broadcast(pr
, cx
, 0);
911 cx
->time
+= sleep_ticks
;
915 static int c3_cpu_count
;
916 static DEFINE_SPINLOCK(c3_lock
);
919 * acpi_idle_enter_bm - enters C3 with proper BM handling
920 * @dev: the target CPU
921 * @state: the state data
923 * If BM is detected, the deepest non-C3 idle state is entered instead.
925 static int acpi_idle_enter_bm(struct cpuidle_device
*dev
,
926 struct cpuidle_state
*state
)
928 struct acpi_processor
*pr
;
929 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
935 pr
= __get_cpu_var(processors
);
940 if (acpi_idle_suspend
)
941 return(acpi_idle_enter_c1(dev
, state
));
943 if (acpi_idle_bm_check()) {
944 if (dev
->safe_state
) {
945 dev
->last_state
= dev
->safe_state
;
946 return dev
->safe_state
->enter(dev
, dev
->safe_state
);
956 current_thread_info()->status
&= ~TS_POLLING
;
958 * TS_POLLING-cleared state must be visible before we test
963 if (unlikely(need_resched())) {
964 current_thread_info()->status
|= TS_POLLING
;
969 acpi_unlazy_tlb(smp_processor_id());
971 /* Tell the scheduler that we are going deep-idle: */
972 sched_clock_idle_sleep_event();
974 * Must be done before busmaster disable as we might need to
977 acpi_state_timer_broadcast(pr
, cx
, 1);
979 kt1
= ktime_get_real();
982 * bm_check implies we need ARB_DIS
983 * !bm_check implies we need cache flush
984 * bm_control implies whether we can do ARB_DIS
986 * That leaves a case where bm_check is set and bm_control is
987 * not set. In that case we cannot do much, we enter C3
988 * without doing anything.
990 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
993 /* Disable bus master arbitration when all CPUs are in C3 */
994 if (c3_cpu_count
== num_online_cpus())
995 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE
, 1);
996 spin_unlock(&c3_lock
);
997 } else if (!pr
->flags
.bm_check
) {
998 ACPI_FLUSH_CPU_CACHE();
1001 acpi_idle_do_entry(cx
);
1003 /* Re-enable bus master arbitration */
1004 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
1005 spin_lock(&c3_lock
);
1006 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE
, 0);
1008 spin_unlock(&c3_lock
);
1010 kt2
= ktime_get_real();
1011 idle_time
= ktime_to_us(ktime_sub(kt2
, kt1
));
1013 sleep_ticks
= us_to_pm_timer_ticks(idle_time
);
1014 /* Tell the scheduler how much we idled: */
1015 sched_clock_idle_wakeup_event(sleep_ticks
*PM_TIMER_TICK_NS
);
1018 current_thread_info()->status
|= TS_POLLING
;
1022 acpi_state_timer_broadcast(pr
, cx
, 0);
1023 cx
->time
+= sleep_ticks
;
1027 struct cpuidle_driver acpi_idle_driver
= {
1028 .name
= "acpi_idle",
1029 .owner
= THIS_MODULE
,
1033 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1034 * @pr: the ACPI processor
1036 static int acpi_processor_setup_cpuidle(struct acpi_processor
*pr
)
1038 int i
, count
= CPUIDLE_DRIVER_STATE_START
;
1039 struct acpi_processor_cx
*cx
;
1040 struct cpuidle_state
*state
;
1041 struct cpuidle_device
*dev
= &pr
->power
.dev
;
1043 if (!pr
->flags
.power_setup_done
)
1046 if (pr
->flags
.power
== 0) {
1051 for (i
= 0; i
< CPUIDLE_STATE_MAX
; i
++) {
1052 dev
->states
[i
].name
[0] = '\0';
1053 dev
->states
[i
].desc
[0] = '\0';
1056 if (max_cstate
== 0)
1059 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
&& i
<= max_cstate
; i
++) {
1060 cx
= &pr
->power
.states
[i
];
1061 state
= &dev
->states
[count
];
1066 #ifdef CONFIG_HOTPLUG_CPU
1067 if ((cx
->type
!= ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
1068 !pr
->flags
.has_cst
&&
1069 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
1072 cpuidle_set_statedata(state
, cx
);
1074 snprintf(state
->name
, CPUIDLE_NAME_LEN
, "C%d", i
);
1075 strncpy(state
->desc
, cx
->desc
, CPUIDLE_DESC_LEN
);
1076 state
->exit_latency
= cx
->latency
;
1077 state
->target_residency
= cx
->latency
* latency_factor
;
1078 state
->power_usage
= cx
->power
;
1083 state
->flags
|= CPUIDLE_FLAG_SHALLOW
;
1084 if (cx
->entry_method
== ACPI_CSTATE_FFH
)
1085 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1087 state
->enter
= acpi_idle_enter_c1
;
1088 dev
->safe_state
= state
;
1092 state
->flags
|= CPUIDLE_FLAG_BALANCED
;
1093 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1094 state
->enter
= acpi_idle_enter_simple
;
1095 dev
->safe_state
= state
;
1099 state
->flags
|= CPUIDLE_FLAG_DEEP
;
1100 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1101 state
->flags
|= CPUIDLE_FLAG_CHECK_BM
;
1102 state
->enter
= pr
->flags
.bm_check
?
1103 acpi_idle_enter_bm
:
1104 acpi_idle_enter_simple
;
1109 if (count
== CPUIDLE_STATE_MAX
)
1113 dev
->state_count
= count
;
1121 int acpi_processor_cst_has_changed(struct acpi_processor
*pr
)
1125 if (boot_option_idle_override
)
1135 if (!pr
->flags
.power_setup_done
)
1138 cpuidle_pause_and_lock();
1139 cpuidle_disable_device(&pr
->power
.dev
);
1140 acpi_processor_get_power_info(pr
);
1141 if (pr
->flags
.power
) {
1142 acpi_processor_setup_cpuidle(pr
);
1143 ret
= cpuidle_enable_device(&pr
->power
.dev
);
1145 cpuidle_resume_and_unlock();
1150 int __cpuinit
acpi_processor_power_init(struct acpi_processor
*pr
,
1151 struct acpi_device
*device
)
1153 acpi_status status
= 0;
1154 static int first_run
;
1155 struct proc_dir_entry
*entry
= NULL
;
1158 if (boot_option_idle_override
)
1164 * When the boot option of "idle=halt" is added, halt
1165 * is used for CPU IDLE.
1166 * In such case C2/C3 is meaningless. So the max_cstate
1171 dmi_check_system(processor_power_dmi_table
);
1172 max_cstate
= acpi_processor_cstate_check(max_cstate
);
1173 if (max_cstate
< ACPI_C_STATES_MAX
)
1175 "ACPI: processor limited to max C-state %d\n",
1183 if (acpi_gbl_FADT
.cst_control
&& !nocst
) {
1185 acpi_os_write_port(acpi_gbl_FADT
.smi_command
, acpi_gbl_FADT
.cst_control
, 8);
1186 if (ACPI_FAILURE(status
)) {
1187 ACPI_EXCEPTION((AE_INFO
, status
,
1188 "Notifying BIOS of _CST ability failed"));
1192 acpi_processor_get_power_info(pr
);
1193 pr
->flags
.power_setup_done
= 1;
1196 * Install the idle handler if processor power management is supported.
1197 * Note that we use previously set idle handler will be used on
1198 * platforms that only support C1.
1200 if (pr
->flags
.power
) {
1201 acpi_processor_setup_cpuidle(pr
);
1202 if (cpuidle_register_device(&pr
->power
.dev
))
1205 printk(KERN_INFO PREFIX
"CPU%d (power states:", pr
->id
);
1206 for (i
= 1; i
<= pr
->power
.count
; i
++)
1207 if (pr
->power
.states
[i
].valid
)
1208 printk(" C%d[C%d]", i
,
1209 pr
->power
.states
[i
].type
);
1214 entry
= proc_create_data(ACPI_PROCESSOR_FILE_POWER
,
1215 S_IRUGO
, acpi_device_dir(device
),
1216 &acpi_processor_power_fops
,
1217 acpi_driver_data(device
));
1223 int acpi_processor_power_exit(struct acpi_processor
*pr
,
1224 struct acpi_device
*device
)
1226 if (boot_option_idle_override
)
1229 cpuidle_unregister_device(&pr
->power
.dev
);
1230 pr
->flags
.power_setup_done
= 0;
1232 if (acpi_device_dir(device
))
1233 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1234 acpi_device_dir(device
));