2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/latency.h>
42 #include <linux/clockchips.h>
45 * Include the apic definitions for x86 to have the APIC timer related defines
46 * available also for UP (on SMP it gets magically included via linux/smp.h).
47 * asm/acpi.h is not an option, as it would require more include magic. Also
48 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
55 #include <asm/uaccess.h>
57 #include <acpi/acpi_bus.h>
58 #include <acpi/processor.h>
60 #define ACPI_PROCESSOR_COMPONENT 0x01000000
61 #define ACPI_PROCESSOR_CLASS "processor"
62 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
63 ACPI_MODULE_NAME("processor_idle");
64 #define ACPI_PROCESSOR_FILE_POWER "power"
65 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
66 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
67 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
68 static void (*pm_idle_save
) (void) __read_mostly
;
69 module_param(max_cstate
, uint
, 0644);
71 static unsigned int nocst __read_mostly
;
72 module_param(nocst
, uint
, 0000);
75 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
76 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
77 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
78 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
79 * reduce history for more aggressive entry into C3
81 static unsigned int bm_history __read_mostly
=
82 (HZ
>= 800 ? 0xFFFFFFFF : ((1U << (HZ
/ 25)) - 1));
83 module_param(bm_history
, uint
, 0644);
84 /* --------------------------------------------------------------------------
86 -------------------------------------------------------------------------- */
89 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
90 * For now disable this. Probably a bug somewhere else.
92 * To skip this limit, boot/load with a large max_cstate limit.
94 static int set_max_cstate(struct dmi_system_id
*id
)
96 if (max_cstate
> ACPI_PROCESSOR_MAX_POWER
)
99 printk(KERN_NOTICE PREFIX
"%s detected - limiting to C%ld max_cstate."
100 " Override with \"processor.max_cstate=%d\"\n", id
->ident
,
101 (long)id
->driver_data
, ACPI_PROCESSOR_MAX_POWER
+ 1);
103 max_cstate
= (long)id
->driver_data
;
108 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
109 callers to only run once -AK */
110 static struct dmi_system_id __cpuinitdata processor_power_dmi_table
[] = {
111 { set_max_cstate
, "IBM ThinkPad R40e", {
112 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
113 DMI_MATCH(DMI_BIOS_VERSION
,"1SET70WW")}, (void *)1},
114 { set_max_cstate
, "IBM ThinkPad R40e", {
115 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
116 DMI_MATCH(DMI_BIOS_VERSION
,"1SET60WW")}, (void *)1},
117 { set_max_cstate
, "IBM ThinkPad R40e", {
118 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
119 DMI_MATCH(DMI_BIOS_VERSION
,"1SET43WW") }, (void*)1},
120 { set_max_cstate
, "IBM ThinkPad R40e", {
121 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
122 DMI_MATCH(DMI_BIOS_VERSION
,"1SET45WW") }, (void*)1},
123 { set_max_cstate
, "IBM ThinkPad R40e", {
124 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
125 DMI_MATCH(DMI_BIOS_VERSION
,"1SET47WW") }, (void*)1},
126 { set_max_cstate
, "IBM ThinkPad R40e", {
127 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
128 DMI_MATCH(DMI_BIOS_VERSION
,"1SET50WW") }, (void*)1},
129 { set_max_cstate
, "IBM ThinkPad R40e", {
130 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
131 DMI_MATCH(DMI_BIOS_VERSION
,"1SET52WW") }, (void*)1},
132 { set_max_cstate
, "IBM ThinkPad R40e", {
133 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
134 DMI_MATCH(DMI_BIOS_VERSION
,"1SET55WW") }, (void*)1},
135 { set_max_cstate
, "IBM ThinkPad R40e", {
136 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
137 DMI_MATCH(DMI_BIOS_VERSION
,"1SET56WW") }, (void*)1},
138 { set_max_cstate
, "IBM ThinkPad R40e", {
139 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
140 DMI_MATCH(DMI_BIOS_VERSION
,"1SET59WW") }, (void*)1},
141 { set_max_cstate
, "IBM ThinkPad R40e", {
142 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
143 DMI_MATCH(DMI_BIOS_VERSION
,"1SET60WW") }, (void*)1},
144 { set_max_cstate
, "IBM ThinkPad R40e", {
145 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
146 DMI_MATCH(DMI_BIOS_VERSION
,"1SET61WW") }, (void*)1},
147 { set_max_cstate
, "IBM ThinkPad R40e", {
148 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
149 DMI_MATCH(DMI_BIOS_VERSION
,"1SET62WW") }, (void*)1},
150 { set_max_cstate
, "IBM ThinkPad R40e", {
151 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
152 DMI_MATCH(DMI_BIOS_VERSION
,"1SET64WW") }, (void*)1},
153 { set_max_cstate
, "IBM ThinkPad R40e", {
154 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
155 DMI_MATCH(DMI_BIOS_VERSION
,"1SET65WW") }, (void*)1},
156 { set_max_cstate
, "IBM ThinkPad R40e", {
157 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
158 DMI_MATCH(DMI_BIOS_VERSION
,"1SET68WW") }, (void*)1},
159 { set_max_cstate
, "Medion 41700", {
160 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
161 DMI_MATCH(DMI_BIOS_VERSION
,"R01-A1J")}, (void *)1},
162 { set_max_cstate
, "Clevo 5600D", {
163 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
164 DMI_MATCH(DMI_BIOS_VERSION
,"SHE845M0.86C.0013.D.0302131307")},
169 static inline u32
ticks_elapsed(u32 t1
, u32 t2
)
173 else if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_32BIT_TIMER
))
174 return (((0x00FFFFFF - t1
) + t2
) & 0x00FFFFFF);
176 return ((0xFFFFFFFF - t1
) + t2
);
180 acpi_processor_power_activate(struct acpi_processor
*pr
,
181 struct acpi_processor_cx
*new)
183 struct acpi_processor_cx
*old
;
188 old
= pr
->power
.state
;
191 old
->promotion
.count
= 0;
192 new->demotion
.count
= 0;
194 /* Cleanup from old state. */
198 /* Disable bus master reload */
199 if (new->type
!= ACPI_STATE_C3
&& pr
->flags
.bm_check
)
200 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 0);
205 /* Prepare to use new state. */
208 /* Enable bus master reload */
209 if (old
->type
!= ACPI_STATE_C3
&& pr
->flags
.bm_check
)
210 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 1);
214 pr
->power
.state
= new;
219 static void acpi_safe_halt(void)
221 current_thread_info()->status
&= ~TS_POLLING
;
223 * TS_POLLING-cleared state must be visible before we
229 current_thread_info()->status
|= TS_POLLING
;
232 static atomic_t c3_cpu_count
;
234 /* Common C-state entry for C2, C3, .. */
235 static void acpi_cstate_enter(struct acpi_processor_cx
*cstate
)
237 if (cstate
->space_id
== ACPI_CSTATE_FFH
) {
238 /* Call into architectural FFH based C-state */
239 acpi_processor_ffh_cstate_enter(cstate
);
242 /* IO port based C-state */
243 inb(cstate
->address
);
244 /* Dummy wait op - must do something useless after P_LVL2 read
245 because chipsets cannot guarantee that STPCLK# signal
246 gets asserted in time to freeze execution properly. */
247 unused
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
251 #ifdef ARCH_APICTIMER_STOPS_ON_C3
254 * Some BIOS implementations switch to C3 in the published C2 state.
255 * This seems to be a common problem on AMD boxen, but other vendors
256 * are affected too. We pick the most conservative approach: we assume
257 * that the local APIC stops in both C2 and C3.
259 static void acpi_timer_check_state(int state
, struct acpi_processor
*pr
,
260 struct acpi_processor_cx
*cx
)
262 struct acpi_processor_power
*pwr
= &pr
->power
;
263 u8 type
= local_apic_timer_c2_ok
? ACPI_STATE_C3
: ACPI_STATE_C2
;
266 * Check, if one of the previous states already marked the lapic
269 if (pwr
->timer_broadcast_on_state
< state
)
272 if (cx
->type
>= type
)
273 pr
->power
.timer_broadcast_on_state
= state
;
276 static void acpi_propagate_timer_broadcast(struct acpi_processor
*pr
)
278 #ifdef CONFIG_GENERIC_CLOCKEVENTS
279 unsigned long reason
;
281 reason
= pr
->power
.timer_broadcast_on_state
< INT_MAX
?
282 CLOCK_EVT_NOTIFY_BROADCAST_ON
: CLOCK_EVT_NOTIFY_BROADCAST_OFF
;
284 clockevents_notify(reason
, &pr
->id
);
286 cpumask_t mask
= cpumask_of_cpu(pr
->id
);
288 if (pr
->power
.timer_broadcast_on_state
< INT_MAX
)
289 on_each_cpu(switch_APIC_timer_to_ipi
, &mask
, 1, 1);
291 on_each_cpu(switch_ipi_to_APIC_timer
, &mask
, 1, 1);
295 /* Power(C) State timer broadcast control */
296 static void acpi_state_timer_broadcast(struct acpi_processor
*pr
,
297 struct acpi_processor_cx
*cx
,
300 #ifdef CONFIG_GENERIC_CLOCKEVENTS
302 int state
= cx
- pr
->power
.states
;
304 if (state
>= pr
->power
.timer_broadcast_on_state
) {
305 unsigned long reason
;
307 reason
= broadcast
? CLOCK_EVT_NOTIFY_BROADCAST_ENTER
:
308 CLOCK_EVT_NOTIFY_BROADCAST_EXIT
;
309 clockevents_notify(reason
, &pr
->id
);
316 static void acpi_timer_check_state(int state
, struct acpi_processor
*pr
,
317 struct acpi_processor_cx
*cstate
) { }
318 static void acpi_propagate_timer_broadcast(struct acpi_processor
*pr
) { }
319 static void acpi_state_timer_broadcast(struct acpi_processor
*pr
,
320 struct acpi_processor_cx
*cx
,
327 static void acpi_processor_idle(void)
329 struct acpi_processor
*pr
= NULL
;
330 struct acpi_processor_cx
*cx
= NULL
;
331 struct acpi_processor_cx
*next_state
= NULL
;
336 * Interrupts must be disabled during bus mastering calculations and
337 * for C2/C3 transitions.
341 pr
= processors
[smp_processor_id()];
348 * Check whether we truly need to go idle, or should
351 if (unlikely(need_resched())) {
356 cx
= pr
->power
.state
;
368 * Check for bus mastering activity (if required), record, and check
371 if (pr
->flags
.bm_check
) {
373 unsigned long diff
= jiffies
- pr
->power
.bm_check_timestamp
;
378 pr
->power
.bm_activity
<<= diff
;
380 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS
, &bm_status
);
382 pr
->power
.bm_activity
|= 0x1;
383 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS
, 1);
386 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
387 * the true state of bus mastering activity; forcing us to
388 * manually check the BMIDEA bit of each IDE channel.
390 else if (errata
.piix4
.bmisx
) {
391 if ((inb_p(errata
.piix4
.bmisx
+ 0x02) & 0x01)
392 || (inb_p(errata
.piix4
.bmisx
+ 0x0A) & 0x01))
393 pr
->power
.bm_activity
|= 0x1;
396 pr
->power
.bm_check_timestamp
= jiffies
;
399 * If bus mastering is or was active this jiffy, demote
400 * to avoid a faulty transition. Note that the processor
401 * won't enter a low-power state during this call (to this
402 * function) but should upon the next.
404 * TBD: A better policy might be to fallback to the demotion
405 * state (use it for this quantum only) istead of
406 * demoting -- and rely on duration as our sole demotion
407 * qualification. This may, however, introduce DMA
408 * issues (e.g. floppy DMA transfer overrun/underrun).
410 if ((pr
->power
.bm_activity
& 0x1) &&
411 cx
->demotion
.threshold
.bm
) {
413 next_state
= cx
->demotion
.state
;
418 #ifdef CONFIG_HOTPLUG_CPU
420 * Check for P_LVL2_UP flag before entering C2 and above on
421 * an SMP system. We do it here instead of doing it at _CST/P_LVL
422 * detection phase, to work cleanly with logical CPU hotplug.
424 if ((cx
->type
!= ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
425 !pr
->flags
.has_cst
&& !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
426 cx
= &pr
->power
.states
[ACPI_STATE_C1
];
432 * Invoke the current Cx state to put the processor to sleep.
434 if (cx
->type
== ACPI_STATE_C2
|| cx
->type
== ACPI_STATE_C3
) {
435 current_thread_info()->status
&= ~TS_POLLING
;
437 * TS_POLLING-cleared state must be visible before we
441 if (need_resched()) {
442 current_thread_info()->status
|= TS_POLLING
;
453 * Use the appropriate idle routine, the one that would
454 * be used without acpi C-states.
462 * TBD: Can't get time duration while in C1, as resumes
463 * go to an ISR rather than here. Need to instrument
464 * base interrupt handler.
466 sleep_ticks
= 0xFFFFFFFF;
470 /* Get start time (ticks) */
471 t1
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
473 acpi_state_timer_broadcast(pr
, cx
, 1);
474 acpi_cstate_enter(cx
);
475 /* Get end time (ticks) */
476 t2
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
478 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
479 /* TSC halts in C2, so notify users */
480 mark_tsc_unstable("possible TSC halt in C2");
482 /* Re-enable interrupts */
484 current_thread_info()->status
|= TS_POLLING
;
485 /* Compute time (ticks) that we were actually asleep */
487 ticks_elapsed(t1
, t2
) - cx
->latency_ticks
- C2_OVERHEAD
;
488 acpi_state_timer_broadcast(pr
, cx
, 0);
495 * bm_check implies we need ARB_DIS
496 * !bm_check implies we need cache flush
497 * bm_control implies whether we can do ARB_DIS
499 * That leaves a case where bm_check is set and bm_control is
500 * not set. In that case we cannot do much, we enter C3
501 * without doing anything.
503 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
504 if (atomic_inc_return(&c3_cpu_count
) ==
507 * All CPUs are trying to go to C3
508 * Disable bus master arbitration
510 acpi_set_register(ACPI_BITREG_ARB_DISABLE
, 1);
512 } else if (!pr
->flags
.bm_check
) {
513 /* SMP with no shared cache... Invalidate cache */
514 ACPI_FLUSH_CPU_CACHE();
517 /* Get start time (ticks) */
518 t1
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
520 acpi_state_timer_broadcast(pr
, cx
, 1);
521 acpi_cstate_enter(cx
);
522 /* Get end time (ticks) */
523 t2
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
524 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
525 /* Enable bus master arbitration */
526 atomic_dec(&c3_cpu_count
);
527 acpi_set_register(ACPI_BITREG_ARB_DISABLE
, 0);
530 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
531 /* TSC halts in C3, so notify users */
532 mark_tsc_unstable("TSC halts in C3");
534 /* Re-enable interrupts */
536 current_thread_info()->status
|= TS_POLLING
;
537 /* Compute time (ticks) that we were actually asleep */
539 ticks_elapsed(t1
, t2
) - cx
->latency_ticks
- C3_OVERHEAD
;
540 acpi_state_timer_broadcast(pr
, cx
, 0);
548 if ((cx
->type
!= ACPI_STATE_C1
) && (sleep_ticks
> 0))
549 cx
->time
+= sleep_ticks
;
551 next_state
= pr
->power
.state
;
553 #ifdef CONFIG_HOTPLUG_CPU
554 /* Don't do promotion/demotion */
555 if ((cx
->type
== ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
556 !pr
->flags
.has_cst
&& !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
)) {
565 * Track the number of longs (time asleep is greater than threshold)
566 * and promote when the count threshold is reached. Note that bus
567 * mastering activity may prevent promotions.
568 * Do not promote above max_cstate.
570 if (cx
->promotion
.state
&&
571 ((cx
->promotion
.state
- pr
->power
.states
) <= max_cstate
)) {
572 if (sleep_ticks
> cx
->promotion
.threshold
.ticks
&&
573 cx
->promotion
.state
->latency
<= system_latency_constraint()) {
574 cx
->promotion
.count
++;
575 cx
->demotion
.count
= 0;
576 if (cx
->promotion
.count
>=
577 cx
->promotion
.threshold
.count
) {
578 if (pr
->flags
.bm_check
) {
580 (pr
->power
.bm_activity
& cx
->
581 promotion
.threshold
.bm
)) {
587 next_state
= cx
->promotion
.state
;
597 * Track the number of shorts (time asleep is less than time threshold)
598 * and demote when the usage threshold is reached.
600 if (cx
->demotion
.state
) {
601 if (sleep_ticks
< cx
->demotion
.threshold
.ticks
) {
602 cx
->demotion
.count
++;
603 cx
->promotion
.count
= 0;
604 if (cx
->demotion
.count
>= cx
->demotion
.threshold
.count
) {
605 next_state
= cx
->demotion
.state
;
613 * Demote if current state exceeds max_cstate
614 * or if the latency of the current state is unacceptable
616 if ((pr
->power
.state
- pr
->power
.states
) > max_cstate
||
617 pr
->power
.state
->latency
> system_latency_constraint()) {
618 if (cx
->demotion
.state
)
619 next_state
= cx
->demotion
.state
;
625 * If we're going to start using a new Cx state we must clean up
626 * from the previous and prepare to use the new.
628 if (next_state
!= pr
->power
.state
)
629 acpi_processor_power_activate(pr
, next_state
);
632 static int acpi_processor_set_power_policy(struct acpi_processor
*pr
)
635 unsigned int state_is_set
= 0;
636 struct acpi_processor_cx
*lower
= NULL
;
637 struct acpi_processor_cx
*higher
= NULL
;
638 struct acpi_processor_cx
*cx
;
645 * This function sets the default Cx state policy (OS idle handler).
646 * Our scheme is to promote quickly to C2 but more conservatively
647 * to C3. We're favoring C2 for its characteristics of low latency
648 * (quick response), good power savings, and ability to allow bus
649 * mastering activity. Note that the Cx state policy is completely
650 * customizable and can be altered dynamically.
654 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
655 cx
= &pr
->power
.states
[i
];
660 pr
->power
.state
= cx
;
669 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
670 cx
= &pr
->power
.states
[i
];
675 cx
->demotion
.state
= lower
;
676 cx
->demotion
.threshold
.ticks
= cx
->latency_ticks
;
677 cx
->demotion
.threshold
.count
= 1;
678 if (cx
->type
== ACPI_STATE_C3
)
679 cx
->demotion
.threshold
.bm
= bm_history
;
686 for (i
= (ACPI_PROCESSOR_MAX_POWER
- 1); i
> 0; i
--) {
687 cx
= &pr
->power
.states
[i
];
692 cx
->promotion
.state
= higher
;
693 cx
->promotion
.threshold
.ticks
= cx
->latency_ticks
;
694 if (cx
->type
>= ACPI_STATE_C2
)
695 cx
->promotion
.threshold
.count
= 4;
697 cx
->promotion
.threshold
.count
= 10;
698 if (higher
->type
== ACPI_STATE_C3
)
699 cx
->promotion
.threshold
.bm
= bm_history
;
708 static int acpi_processor_get_power_info_fadt(struct acpi_processor
*pr
)
717 /* if info is obtained from pblk/fadt, type equals state */
718 pr
->power
.states
[ACPI_STATE_C2
].type
= ACPI_STATE_C2
;
719 pr
->power
.states
[ACPI_STATE_C3
].type
= ACPI_STATE_C3
;
721 #ifndef CONFIG_HOTPLUG_CPU
723 * Check for P_LVL2_UP flag before entering C2 and above on
726 if ((num_online_cpus() > 1) &&
727 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
731 /* determine C2 and C3 address from pblk */
732 pr
->power
.states
[ACPI_STATE_C2
].address
= pr
->pblk
+ 4;
733 pr
->power
.states
[ACPI_STATE_C3
].address
= pr
->pblk
+ 5;
735 /* determine latencies from FADT */
736 pr
->power
.states
[ACPI_STATE_C2
].latency
= acpi_gbl_FADT
.C2latency
;
737 pr
->power
.states
[ACPI_STATE_C3
].latency
= acpi_gbl_FADT
.C3latency
;
739 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
740 "lvl2[0x%08x] lvl3[0x%08x]\n",
741 pr
->power
.states
[ACPI_STATE_C2
].address
,
742 pr
->power
.states
[ACPI_STATE_C3
].address
));
747 static int acpi_processor_get_power_info_default(struct acpi_processor
*pr
)
749 if (!pr
->power
.states
[ACPI_STATE_C1
].valid
) {
750 /* set the first C-State to C1 */
751 /* all processors need to support C1 */
752 pr
->power
.states
[ACPI_STATE_C1
].type
= ACPI_STATE_C1
;
753 pr
->power
.states
[ACPI_STATE_C1
].valid
= 1;
755 /* the C0 state only exists as a filler in our array */
756 pr
->power
.states
[ACPI_STATE_C0
].valid
= 1;
760 static int acpi_processor_get_power_info_cst(struct acpi_processor
*pr
)
762 acpi_status status
= 0;
766 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
767 union acpi_object
*cst
;
775 status
= acpi_evaluate_object(pr
->handle
, "_CST", NULL
, &buffer
);
776 if (ACPI_FAILURE(status
)) {
777 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "No _CST, giving up\n"));
781 cst
= buffer
.pointer
;
783 /* There must be at least 2 elements */
784 if (!cst
|| (cst
->type
!= ACPI_TYPE_PACKAGE
) || cst
->package
.count
< 2) {
785 printk(KERN_ERR PREFIX
"not enough elements in _CST\n");
790 count
= cst
->package
.elements
[0].integer
.value
;
792 /* Validate number of power states. */
793 if (count
< 1 || count
!= cst
->package
.count
- 1) {
794 printk(KERN_ERR PREFIX
"count given by _CST is not valid\n");
799 /* Tell driver that at least _CST is supported. */
800 pr
->flags
.has_cst
= 1;
802 for (i
= 1; i
<= count
; i
++) {
803 union acpi_object
*element
;
804 union acpi_object
*obj
;
805 struct acpi_power_register
*reg
;
806 struct acpi_processor_cx cx
;
808 memset(&cx
, 0, sizeof(cx
));
810 element
= &(cst
->package
.elements
[i
]);
811 if (element
->type
!= ACPI_TYPE_PACKAGE
)
814 if (element
->package
.count
!= 4)
817 obj
= &(element
->package
.elements
[0]);
819 if (obj
->type
!= ACPI_TYPE_BUFFER
)
822 reg
= (struct acpi_power_register
*)obj
->buffer
.pointer
;
824 if (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
&&
825 (reg
->space_id
!= ACPI_ADR_SPACE_FIXED_HARDWARE
))
828 /* There should be an easy way to extract an integer... */
829 obj
= &(element
->package
.elements
[1]);
830 if (obj
->type
!= ACPI_TYPE_INTEGER
)
833 cx
.type
= obj
->integer
.value
;
835 * Some buggy BIOSes won't list C1 in _CST -
836 * Let acpi_processor_get_power_info_default() handle them later
838 if (i
== 1 && cx
.type
!= ACPI_STATE_C1
)
841 cx
.address
= reg
->address
;
842 cx
.index
= current_count
+ 1;
844 cx
.space_id
= ACPI_CSTATE_SYSTEMIO
;
845 if (reg
->space_id
== ACPI_ADR_SPACE_FIXED_HARDWARE
) {
846 if (acpi_processor_ffh_cstate_probe
847 (pr
->id
, &cx
, reg
) == 0) {
848 cx
.space_id
= ACPI_CSTATE_FFH
;
849 } else if (cx
.type
!= ACPI_STATE_C1
) {
851 * C1 is a special case where FIXED_HARDWARE
852 * can be handled in non-MWAIT way as well.
853 * In that case, save this _CST entry info.
854 * That is, we retain space_id of SYSTEM_IO for
856 * Otherwise, ignore this info and continue.
862 obj
= &(element
->package
.elements
[2]);
863 if (obj
->type
!= ACPI_TYPE_INTEGER
)
866 cx
.latency
= obj
->integer
.value
;
868 obj
= &(element
->package
.elements
[3]);
869 if (obj
->type
!= ACPI_TYPE_INTEGER
)
872 cx
.power
= obj
->integer
.value
;
875 memcpy(&(pr
->power
.states
[current_count
]), &cx
, sizeof(cx
));
878 * We support total ACPI_PROCESSOR_MAX_POWER - 1
879 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
881 if (current_count
>= (ACPI_PROCESSOR_MAX_POWER
- 1)) {
883 "Limiting number of power states to max (%d)\n",
884 ACPI_PROCESSOR_MAX_POWER
);
886 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
891 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "Found %d power states\n",
894 /* Validate number of power states discovered */
895 if (current_count
< 2)
899 kfree(buffer
.pointer
);
904 static void acpi_processor_power_verify_c2(struct acpi_processor_cx
*cx
)
911 * C2 latency must be less than or equal to 100
914 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C2_LATENCY
) {
915 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
916 "latency too large [%d]\n", cx
->latency
));
921 * Otherwise we've met all of our C2 requirements.
922 * Normalize the C2 latency to expidite policy
925 cx
->latency_ticks
= US_TO_PM_TIMER_TICKS(cx
->latency
);
930 static void acpi_processor_power_verify_c3(struct acpi_processor
*pr
,
931 struct acpi_processor_cx
*cx
)
933 static int bm_check_flag
;
940 * C3 latency must be less than or equal to 1000
943 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C3_LATENCY
) {
944 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
945 "latency too large [%d]\n", cx
->latency
));
950 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
951 * DMA transfers are used by any ISA device to avoid livelock.
952 * Note that we could disable Type-F DMA (as recommended by
953 * the erratum), but this is known to disrupt certain ISA
954 * devices thus we take the conservative approach.
956 else if (errata
.piix4
.fdma
) {
957 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
958 "C3 not supported on PIIX4 with Type-F DMA\n"));
962 /* All the logic here assumes flags.bm_check is same across all CPUs */
963 if (!bm_check_flag
) {
964 /* Determine whether bm_check is needed based on CPU */
965 acpi_processor_power_init_bm_check(&(pr
->flags
), pr
->id
);
966 bm_check_flag
= pr
->flags
.bm_check
;
968 pr
->flags
.bm_check
= bm_check_flag
;
971 if (pr
->flags
.bm_check
) {
972 /* bus mastering control is necessary */
973 if (!pr
->flags
.bm_control
) {
974 /* In this case we enter C3 without bus mastering */
975 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
976 "C3 support without bus mastering control\n"));
980 * WBINVD should be set in fadt, for C3 state to be
981 * supported on when bm_check is not required.
983 if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_WBINVD
)) {
984 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
985 "Cache invalidation should work properly"
986 " for C3 to be enabled on SMP systems\n"));
989 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 0);
993 * Otherwise we've met all of our C3 requirements.
994 * Normalize the C3 latency to expidite policy. Enable
995 * checking of bus mastering status (bm_check) so we can
996 * use this in our C3 policy
999 cx
->latency_ticks
= US_TO_PM_TIMER_TICKS(cx
->latency
);
1004 static int acpi_processor_power_verify(struct acpi_processor
*pr
)
1007 unsigned int working
= 0;
1009 pr
->power
.timer_broadcast_on_state
= INT_MAX
;
1011 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
1012 struct acpi_processor_cx
*cx
= &pr
->power
.states
[i
];
1020 acpi_processor_power_verify_c2(cx
);
1022 acpi_timer_check_state(i
, pr
, cx
);
1026 acpi_processor_power_verify_c3(pr
, cx
);
1028 acpi_timer_check_state(i
, pr
, cx
);
1036 acpi_propagate_timer_broadcast(pr
);
1041 static int acpi_processor_get_power_info(struct acpi_processor
*pr
)
1047 /* NOTE: the idle thread may not be running while calling
1050 /* Zero initialize all the C-states info. */
1051 memset(pr
->power
.states
, 0, sizeof(pr
->power
.states
));
1053 result
= acpi_processor_get_power_info_cst(pr
);
1054 if (result
== -ENODEV
)
1055 result
= acpi_processor_get_power_info_fadt(pr
);
1060 acpi_processor_get_power_info_default(pr
);
1062 pr
->power
.count
= acpi_processor_power_verify(pr
);
1065 * Set Default Policy
1066 * ------------------
1067 * Now that we know which states are supported, set the default
1068 * policy. Note that this policy can be changed dynamically
1069 * (e.g. encourage deeper sleeps to conserve battery life when
1072 result
= acpi_processor_set_power_policy(pr
);
1077 * if one state of type C2 or C3 is available, mark this
1078 * CPU as being "idle manageable"
1080 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
1081 if (pr
->power
.states
[i
].valid
) {
1082 pr
->power
.count
= i
;
1083 if (pr
->power
.states
[i
].type
>= ACPI_STATE_C2
)
1084 pr
->flags
.power
= 1;
1091 int acpi_processor_cst_has_changed(struct acpi_processor
*pr
)
1103 if (!pr
->flags
.power_setup_done
)
1106 /* Fall back to the default idle loop */
1107 pm_idle
= pm_idle_save
;
1108 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
1110 pr
->flags
.power
= 0;
1111 result
= acpi_processor_get_power_info(pr
);
1112 if ((pr
->flags
.power
== 1) && (pr
->flags
.power_setup_done
))
1113 pm_idle
= acpi_processor_idle
;
1118 /* proc interface */
1120 static int acpi_processor_power_seq_show(struct seq_file
*seq
, void *offset
)
1122 struct acpi_processor
*pr
= seq
->private;
1129 seq_printf(seq
, "active state: C%zd\n"
1131 "bus master activity: %08x\n"
1132 "maximum allowed latency: %d usec\n",
1133 pr
->power
.state
? pr
->power
.state
- pr
->power
.states
: 0,
1134 max_cstate
, (unsigned)pr
->power
.bm_activity
,
1135 system_latency_constraint());
1137 seq_puts(seq
, "states:\n");
1139 for (i
= 1; i
<= pr
->power
.count
; i
++) {
1140 seq_printf(seq
, " %cC%d: ",
1141 (&pr
->power
.states
[i
] ==
1142 pr
->power
.state
? '*' : ' '), i
);
1144 if (!pr
->power
.states
[i
].valid
) {
1145 seq_puts(seq
, "<not supported>\n");
1149 switch (pr
->power
.states
[i
].type
) {
1151 seq_printf(seq
, "type[C1] ");
1154 seq_printf(seq
, "type[C2] ");
1157 seq_printf(seq
, "type[C3] ");
1160 seq_printf(seq
, "type[--] ");
1164 if (pr
->power
.states
[i
].promotion
.state
)
1165 seq_printf(seq
, "promotion[C%zd] ",
1166 (pr
->power
.states
[i
].promotion
.state
-
1169 seq_puts(seq
, "promotion[--] ");
1171 if (pr
->power
.states
[i
].demotion
.state
)
1172 seq_printf(seq
, "demotion[C%zd] ",
1173 (pr
->power
.states
[i
].demotion
.state
-
1176 seq_puts(seq
, "demotion[--] ");
1178 seq_printf(seq
, "latency[%03d] usage[%08d] duration[%020llu]\n",
1179 pr
->power
.states
[i
].latency
,
1180 pr
->power
.states
[i
].usage
,
1181 (unsigned long long)pr
->power
.states
[i
].time
);
1188 static int acpi_processor_power_open_fs(struct inode
*inode
, struct file
*file
)
1190 return single_open(file
, acpi_processor_power_seq_show
,
1194 static const struct file_operations acpi_processor_power_fops
= {
1195 .open
= acpi_processor_power_open_fs
,
1197 .llseek
= seq_lseek
,
1198 .release
= single_release
,
1202 static void smp_callback(void *v
)
1204 /* we already woke the CPU up, nothing more to do */
1208 * This function gets called when a part of the kernel has a new latency
1209 * requirement. This means we need to get all processors out of their C-state,
1210 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1211 * wakes them all right up.
1213 static int acpi_processor_latency_notify(struct notifier_block
*b
,
1214 unsigned long l
, void *v
)
1216 smp_call_function(smp_callback
, NULL
, 0, 1);
1220 static struct notifier_block acpi_processor_latency_notifier
= {
1221 .notifier_call
= acpi_processor_latency_notify
,
1225 int __cpuinit
acpi_processor_power_init(struct acpi_processor
*pr
,
1226 struct acpi_device
*device
)
1228 acpi_status status
= 0;
1229 static int first_run
;
1230 struct proc_dir_entry
*entry
= NULL
;
1235 dmi_check_system(processor_power_dmi_table
);
1236 if (max_cstate
< ACPI_C_STATES_MAX
)
1238 "ACPI: processor limited to max C-state %d\n",
1242 register_latency_notifier(&acpi_processor_latency_notifier
);
1249 if (acpi_gbl_FADT
.cst_control
&& !nocst
) {
1251 acpi_os_write_port(acpi_gbl_FADT
.smi_command
, acpi_gbl_FADT
.cst_control
, 8);
1252 if (ACPI_FAILURE(status
)) {
1253 ACPI_EXCEPTION((AE_INFO
, status
,
1254 "Notifying BIOS of _CST ability failed"));
1258 acpi_processor_get_power_info(pr
);
1261 * Install the idle handler if processor power management is supported.
1262 * Note that we use previously set idle handler will be used on
1263 * platforms that only support C1.
1265 if ((pr
->flags
.power
) && (!boot_option_idle_override
)) {
1266 printk(KERN_INFO PREFIX
"CPU%d (power states:", pr
->id
);
1267 for (i
= 1; i
<= pr
->power
.count
; i
++)
1268 if (pr
->power
.states
[i
].valid
)
1269 printk(" C%d[C%d]", i
,
1270 pr
->power
.states
[i
].type
);
1274 pm_idle_save
= pm_idle
;
1275 pm_idle
= acpi_processor_idle
;
1280 entry
= create_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1281 S_IRUGO
, acpi_device_dir(device
));
1285 entry
->proc_fops
= &acpi_processor_power_fops
;
1286 entry
->data
= acpi_driver_data(device
);
1287 entry
->owner
= THIS_MODULE
;
1290 pr
->flags
.power_setup_done
= 1;
1295 int acpi_processor_power_exit(struct acpi_processor
*pr
,
1296 struct acpi_device
*device
)
1299 pr
->flags
.power_setup_done
= 0;
1301 if (acpi_device_dir(device
))
1302 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1303 acpi_device_dir(device
));
1305 /* Unregister the idle handler when processor #0 is removed. */
1307 pm_idle
= pm_idle_save
;
1310 * We are about to unload the current idle thread pm callback
1311 * (pm_idle), Wait for all processors to update cached/local
1312 * copies of pm_idle before proceeding.
1316 unregister_latency_notifier(&acpi_processor_latency_notifier
);