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1 /*
2 * processor_idle - idle state submodule to the ACPI processor driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
11 *
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 *
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 */
30
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/latency.h>
42 #include <linux/clockchips.h>
43
44 /*
45 * Include the apic definitions for x86 to have the APIC timer related defines
46 * available also for UP (on SMP it gets magically included via linux/smp.h).
47 * asm/acpi.h is not an option, as it would require more include magic. Also
48 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
49 */
50 #ifdef CONFIG_X86
51 #include <asm/apic.h>
52 #endif
53
54 #include <asm/io.h>
55 #include <asm/uaccess.h>
56
57 #include <acpi/acpi_bus.h>
58 #include <acpi/processor.h>
59
60 #define ACPI_PROCESSOR_COMPONENT 0x01000000
61 #define ACPI_PROCESSOR_CLASS "processor"
62 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
63 ACPI_MODULE_NAME("processor_idle");
64 #define ACPI_PROCESSOR_FILE_POWER "power"
65 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
66 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
67 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
68 static void (*pm_idle_save) (void) __read_mostly;
69 module_param(max_cstate, uint, 0644);
70
71 static unsigned int nocst __read_mostly;
72 module_param(nocst, uint, 0000);
73
74 /*
75 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
76 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
77 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
78 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
79 * reduce history for more aggressive entry into C3
80 */
81 static unsigned int bm_history __read_mostly =
82 (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
83 module_param(bm_history, uint, 0644);
84 /* --------------------------------------------------------------------------
85 Power Management
86 -------------------------------------------------------------------------- */
87
88 /*
89 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
90 * For now disable this. Probably a bug somewhere else.
91 *
92 * To skip this limit, boot/load with a large max_cstate limit.
93 */
94 static int set_max_cstate(struct dmi_system_id *id)
95 {
96 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
97 return 0;
98
99 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
100 " Override with \"processor.max_cstate=%d\"\n", id->ident,
101 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
102
103 max_cstate = (long)id->driver_data;
104
105 return 0;
106 }
107
108 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
109 callers to only run once -AK */
110 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
111 { set_max_cstate, "IBM ThinkPad R40e", {
112 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
113 DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
114 { set_max_cstate, "IBM ThinkPad R40e", {
115 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
116 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
117 { set_max_cstate, "IBM ThinkPad R40e", {
118 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
119 DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
120 { set_max_cstate, "IBM ThinkPad R40e", {
121 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
122 DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
123 { set_max_cstate, "IBM ThinkPad R40e", {
124 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
125 DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
126 { set_max_cstate, "IBM ThinkPad R40e", {
127 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
128 DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
129 { set_max_cstate, "IBM ThinkPad R40e", {
130 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
131 DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
132 { set_max_cstate, "IBM ThinkPad R40e", {
133 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
134 DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
135 { set_max_cstate, "IBM ThinkPad R40e", {
136 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
137 DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
138 { set_max_cstate, "IBM ThinkPad R40e", {
139 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
140 DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
141 { set_max_cstate, "IBM ThinkPad R40e", {
142 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
143 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
144 { set_max_cstate, "IBM ThinkPad R40e", {
145 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
146 DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
147 { set_max_cstate, "IBM ThinkPad R40e", {
148 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
149 DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
150 { set_max_cstate, "IBM ThinkPad R40e", {
151 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
152 DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
153 { set_max_cstate, "IBM ThinkPad R40e", {
154 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
155 DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
156 { set_max_cstate, "IBM ThinkPad R40e", {
157 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
158 DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
159 { set_max_cstate, "Medion 41700", {
160 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
161 DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
162 { set_max_cstate, "Clevo 5600D", {
163 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
164 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
165 (void *)2},
166 {},
167 };
168
169 static inline u32 ticks_elapsed(u32 t1, u32 t2)
170 {
171 if (t2 >= t1)
172 return (t2 - t1);
173 else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
174 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
175 else
176 return ((0xFFFFFFFF - t1) + t2);
177 }
178
179 static void
180 acpi_processor_power_activate(struct acpi_processor *pr,
181 struct acpi_processor_cx *new)
182 {
183 struct acpi_processor_cx *old;
184
185 if (!pr || !new)
186 return;
187
188 old = pr->power.state;
189
190 if (old)
191 old->promotion.count = 0;
192 new->demotion.count = 0;
193
194 /* Cleanup from old state. */
195 if (old) {
196 switch (old->type) {
197 case ACPI_STATE_C3:
198 /* Disable bus master reload */
199 if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
200 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
201 break;
202 }
203 }
204
205 /* Prepare to use new state. */
206 switch (new->type) {
207 case ACPI_STATE_C3:
208 /* Enable bus master reload */
209 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
210 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
211 break;
212 }
213
214 pr->power.state = new;
215
216 return;
217 }
218
219 static void acpi_safe_halt(void)
220 {
221 current_thread_info()->status &= ~TS_POLLING;
222 /*
223 * TS_POLLING-cleared state must be visible before we
224 * test NEED_RESCHED:
225 */
226 smp_mb();
227 if (!need_resched())
228 safe_halt();
229 current_thread_info()->status |= TS_POLLING;
230 }
231
232 static atomic_t c3_cpu_count;
233
234 /* Common C-state entry for C2, C3, .. */
235 static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
236 {
237 if (cstate->space_id == ACPI_CSTATE_FFH) {
238 /* Call into architectural FFH based C-state */
239 acpi_processor_ffh_cstate_enter(cstate);
240 } else {
241 int unused;
242 /* IO port based C-state */
243 inb(cstate->address);
244 /* Dummy wait op - must do something useless after P_LVL2 read
245 because chipsets cannot guarantee that STPCLK# signal
246 gets asserted in time to freeze execution properly. */
247 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
248 }
249 }
250
251 #ifdef ARCH_APICTIMER_STOPS_ON_C3
252
253 /*
254 * Some BIOS implementations switch to C3 in the published C2 state.
255 * This seems to be a common problem on AMD boxen, but other vendors
256 * are affected too. We pick the most conservative approach: we assume
257 * that the local APIC stops in both C2 and C3.
258 */
259 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
260 struct acpi_processor_cx *cx)
261 {
262 struct acpi_processor_power *pwr = &pr->power;
263 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
264
265 /*
266 * Check, if one of the previous states already marked the lapic
267 * unstable
268 */
269 if (pwr->timer_broadcast_on_state < state)
270 return;
271
272 if (cx->type >= type)
273 pr->power.timer_broadcast_on_state = state;
274 }
275
276 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
277 {
278 #ifdef CONFIG_GENERIC_CLOCKEVENTS
279 unsigned long reason;
280
281 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
282 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
283
284 clockevents_notify(reason, &pr->id);
285 #else
286 cpumask_t mask = cpumask_of_cpu(pr->id);
287
288 if (pr->power.timer_broadcast_on_state < INT_MAX)
289 on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
290 else
291 on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
292 #endif
293 }
294
295 /* Power(C) State timer broadcast control */
296 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
297 struct acpi_processor_cx *cx,
298 int broadcast)
299 {
300 #ifdef CONFIG_GENERIC_CLOCKEVENTS
301
302 int state = cx - pr->power.states;
303
304 if (state >= pr->power.timer_broadcast_on_state) {
305 unsigned long reason;
306
307 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
308 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
309 clockevents_notify(reason, &pr->id);
310 }
311 #endif
312 }
313
314 #else
315
316 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
317 struct acpi_processor_cx *cstate) { }
318 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
319 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
320 struct acpi_processor_cx *cx,
321 int broadcast)
322 {
323 }
324
325 #endif
326
327 static void acpi_processor_idle(void)
328 {
329 struct acpi_processor *pr = NULL;
330 struct acpi_processor_cx *cx = NULL;
331 struct acpi_processor_cx *next_state = NULL;
332 int sleep_ticks = 0;
333 u32 t1, t2 = 0;
334
335 /*
336 * Interrupts must be disabled during bus mastering calculations and
337 * for C2/C3 transitions.
338 */
339 local_irq_disable();
340
341 pr = processors[smp_processor_id()];
342 if (!pr) {
343 local_irq_enable();
344 return;
345 }
346
347 /*
348 * Check whether we truly need to go idle, or should
349 * reschedule:
350 */
351 if (unlikely(need_resched())) {
352 local_irq_enable();
353 return;
354 }
355
356 cx = pr->power.state;
357 if (!cx) {
358 if (pm_idle_save)
359 pm_idle_save();
360 else
361 acpi_safe_halt();
362 return;
363 }
364
365 /*
366 * Check BM Activity
367 * -----------------
368 * Check for bus mastering activity (if required), record, and check
369 * for demotion.
370 */
371 if (pr->flags.bm_check) {
372 u32 bm_status = 0;
373 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
374
375 if (diff > 31)
376 diff = 31;
377
378 pr->power.bm_activity <<= diff;
379
380 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
381 if (bm_status) {
382 pr->power.bm_activity |= 0x1;
383 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
384 }
385 /*
386 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
387 * the true state of bus mastering activity; forcing us to
388 * manually check the BMIDEA bit of each IDE channel.
389 */
390 else if (errata.piix4.bmisx) {
391 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
392 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
393 pr->power.bm_activity |= 0x1;
394 }
395
396 pr->power.bm_check_timestamp = jiffies;
397
398 /*
399 * If bus mastering is or was active this jiffy, demote
400 * to avoid a faulty transition. Note that the processor
401 * won't enter a low-power state during this call (to this
402 * function) but should upon the next.
403 *
404 * TBD: A better policy might be to fallback to the demotion
405 * state (use it for this quantum only) istead of
406 * demoting -- and rely on duration as our sole demotion
407 * qualification. This may, however, introduce DMA
408 * issues (e.g. floppy DMA transfer overrun/underrun).
409 */
410 if ((pr->power.bm_activity & 0x1) &&
411 cx->demotion.threshold.bm) {
412 local_irq_enable();
413 next_state = cx->demotion.state;
414 goto end;
415 }
416 }
417
418 #ifdef CONFIG_HOTPLUG_CPU
419 /*
420 * Check for P_LVL2_UP flag before entering C2 and above on
421 * an SMP system. We do it here instead of doing it at _CST/P_LVL
422 * detection phase, to work cleanly with logical CPU hotplug.
423 */
424 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
425 !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
426 cx = &pr->power.states[ACPI_STATE_C1];
427 #endif
428
429 /*
430 * Sleep:
431 * ------
432 * Invoke the current Cx state to put the processor to sleep.
433 */
434 if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
435 current_thread_info()->status &= ~TS_POLLING;
436 /*
437 * TS_POLLING-cleared state must be visible before we
438 * test NEED_RESCHED:
439 */
440 smp_mb();
441 if (need_resched()) {
442 current_thread_info()->status |= TS_POLLING;
443 local_irq_enable();
444 return;
445 }
446 }
447
448 switch (cx->type) {
449
450 case ACPI_STATE_C1:
451 /*
452 * Invoke C1.
453 * Use the appropriate idle routine, the one that would
454 * be used without acpi C-states.
455 */
456 if (pm_idle_save)
457 pm_idle_save();
458 else
459 acpi_safe_halt();
460
461 /*
462 * TBD: Can't get time duration while in C1, as resumes
463 * go to an ISR rather than here. Need to instrument
464 * base interrupt handler.
465 */
466 sleep_ticks = 0xFFFFFFFF;
467 break;
468
469 case ACPI_STATE_C2:
470 /* Get start time (ticks) */
471 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
472 /* Invoke C2 */
473 acpi_state_timer_broadcast(pr, cx, 1);
474 acpi_cstate_enter(cx);
475 /* Get end time (ticks) */
476 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
477
478 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
479 /* TSC halts in C2, so notify users */
480 mark_tsc_unstable("possible TSC halt in C2");
481 #endif
482 /* Re-enable interrupts */
483 local_irq_enable();
484 current_thread_info()->status |= TS_POLLING;
485 /* Compute time (ticks) that we were actually asleep */
486 sleep_ticks =
487 ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
488 acpi_state_timer_broadcast(pr, cx, 0);
489 break;
490
491 case ACPI_STATE_C3:
492
493 if (pr->flags.bm_check) {
494 if (atomic_inc_return(&c3_cpu_count) ==
495 num_online_cpus()) {
496 /*
497 * All CPUs are trying to go to C3
498 * Disable bus master arbitration
499 */
500 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
501 }
502 } else {
503 /* SMP with no shared cache... Invalidate cache */
504 ACPI_FLUSH_CPU_CACHE();
505 }
506
507 /* Get start time (ticks) */
508 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
509 /* Invoke C3 */
510 acpi_state_timer_broadcast(pr, cx, 1);
511 acpi_cstate_enter(cx);
512 /* Get end time (ticks) */
513 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
514 if (pr->flags.bm_check) {
515 /* Enable bus master arbitration */
516 atomic_dec(&c3_cpu_count);
517 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
518 }
519
520 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
521 /* TSC halts in C3, so notify users */
522 mark_tsc_unstable("TSC halts in C3");
523 #endif
524 /* Re-enable interrupts */
525 local_irq_enable();
526 current_thread_info()->status |= TS_POLLING;
527 /* Compute time (ticks) that we were actually asleep */
528 sleep_ticks =
529 ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
530 acpi_state_timer_broadcast(pr, cx, 0);
531 break;
532
533 default:
534 local_irq_enable();
535 return;
536 }
537 cx->usage++;
538 if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
539 cx->time += sleep_ticks;
540
541 next_state = pr->power.state;
542
543 #ifdef CONFIG_HOTPLUG_CPU
544 /* Don't do promotion/demotion */
545 if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
546 !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
547 next_state = cx;
548 goto end;
549 }
550 #endif
551
552 /*
553 * Promotion?
554 * ----------
555 * Track the number of longs (time asleep is greater than threshold)
556 * and promote when the count threshold is reached. Note that bus
557 * mastering activity may prevent promotions.
558 * Do not promote above max_cstate.
559 */
560 if (cx->promotion.state &&
561 ((cx->promotion.state - pr->power.states) <= max_cstate)) {
562 if (sleep_ticks > cx->promotion.threshold.ticks &&
563 cx->promotion.state->latency <= system_latency_constraint()) {
564 cx->promotion.count++;
565 cx->demotion.count = 0;
566 if (cx->promotion.count >=
567 cx->promotion.threshold.count) {
568 if (pr->flags.bm_check) {
569 if (!
570 (pr->power.bm_activity & cx->
571 promotion.threshold.bm)) {
572 next_state =
573 cx->promotion.state;
574 goto end;
575 }
576 } else {
577 next_state = cx->promotion.state;
578 goto end;
579 }
580 }
581 }
582 }
583
584 /*
585 * Demotion?
586 * ---------
587 * Track the number of shorts (time asleep is less than time threshold)
588 * and demote when the usage threshold is reached.
589 */
590 if (cx->demotion.state) {
591 if (sleep_ticks < cx->demotion.threshold.ticks) {
592 cx->demotion.count++;
593 cx->promotion.count = 0;
594 if (cx->demotion.count >= cx->demotion.threshold.count) {
595 next_state = cx->demotion.state;
596 goto end;
597 }
598 }
599 }
600
601 end:
602 /*
603 * Demote if current state exceeds max_cstate
604 * or if the latency of the current state is unacceptable
605 */
606 if ((pr->power.state - pr->power.states) > max_cstate ||
607 pr->power.state->latency > system_latency_constraint()) {
608 if (cx->demotion.state)
609 next_state = cx->demotion.state;
610 }
611
612 /*
613 * New Cx State?
614 * -------------
615 * If we're going to start using a new Cx state we must clean up
616 * from the previous and prepare to use the new.
617 */
618 if (next_state != pr->power.state)
619 acpi_processor_power_activate(pr, next_state);
620 }
621
622 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
623 {
624 unsigned int i;
625 unsigned int state_is_set = 0;
626 struct acpi_processor_cx *lower = NULL;
627 struct acpi_processor_cx *higher = NULL;
628 struct acpi_processor_cx *cx;
629
630
631 if (!pr)
632 return -EINVAL;
633
634 /*
635 * This function sets the default Cx state policy (OS idle handler).
636 * Our scheme is to promote quickly to C2 but more conservatively
637 * to C3. We're favoring C2 for its characteristics of low latency
638 * (quick response), good power savings, and ability to allow bus
639 * mastering activity. Note that the Cx state policy is completely
640 * customizable and can be altered dynamically.
641 */
642
643 /* startup state */
644 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
645 cx = &pr->power.states[i];
646 if (!cx->valid)
647 continue;
648
649 if (!state_is_set)
650 pr->power.state = cx;
651 state_is_set++;
652 break;
653 }
654
655 if (!state_is_set)
656 return -ENODEV;
657
658 /* demotion */
659 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
660 cx = &pr->power.states[i];
661 if (!cx->valid)
662 continue;
663
664 if (lower) {
665 cx->demotion.state = lower;
666 cx->demotion.threshold.ticks = cx->latency_ticks;
667 cx->demotion.threshold.count = 1;
668 if (cx->type == ACPI_STATE_C3)
669 cx->demotion.threshold.bm = bm_history;
670 }
671
672 lower = cx;
673 }
674
675 /* promotion */
676 for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
677 cx = &pr->power.states[i];
678 if (!cx->valid)
679 continue;
680
681 if (higher) {
682 cx->promotion.state = higher;
683 cx->promotion.threshold.ticks = cx->latency_ticks;
684 if (cx->type >= ACPI_STATE_C2)
685 cx->promotion.threshold.count = 4;
686 else
687 cx->promotion.threshold.count = 10;
688 if (higher->type == ACPI_STATE_C3)
689 cx->promotion.threshold.bm = bm_history;
690 }
691
692 higher = cx;
693 }
694
695 return 0;
696 }
697
698 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
699 {
700
701 if (!pr)
702 return -EINVAL;
703
704 if (!pr->pblk)
705 return -ENODEV;
706
707 /* if info is obtained from pblk/fadt, type equals state */
708 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
709 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
710
711 #ifndef CONFIG_HOTPLUG_CPU
712 /*
713 * Check for P_LVL2_UP flag before entering C2 and above on
714 * an SMP system.
715 */
716 if ((num_online_cpus() > 1) &&
717 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
718 return -ENODEV;
719 #endif
720
721 /* determine C2 and C3 address from pblk */
722 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
723 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
724
725 /* determine latencies from FADT */
726 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
727 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
728
729 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
730 "lvl2[0x%08x] lvl3[0x%08x]\n",
731 pr->power.states[ACPI_STATE_C2].address,
732 pr->power.states[ACPI_STATE_C3].address));
733
734 return 0;
735 }
736
737 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
738 {
739 if (!pr->power.states[ACPI_STATE_C1].valid) {
740 /* set the first C-State to C1 */
741 /* all processors need to support C1 */
742 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
743 pr->power.states[ACPI_STATE_C1].valid = 1;
744 }
745 /* the C0 state only exists as a filler in our array */
746 pr->power.states[ACPI_STATE_C0].valid = 1;
747 return 0;
748 }
749
750 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
751 {
752 acpi_status status = 0;
753 acpi_integer count;
754 int current_count;
755 int i;
756 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
757 union acpi_object *cst;
758
759
760 if (nocst)
761 return -ENODEV;
762
763 current_count = 0;
764
765 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
766 if (ACPI_FAILURE(status)) {
767 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
768 return -ENODEV;
769 }
770
771 cst = buffer.pointer;
772
773 /* There must be at least 2 elements */
774 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
775 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
776 status = -EFAULT;
777 goto end;
778 }
779
780 count = cst->package.elements[0].integer.value;
781
782 /* Validate number of power states. */
783 if (count < 1 || count != cst->package.count - 1) {
784 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
785 status = -EFAULT;
786 goto end;
787 }
788
789 /* Tell driver that at least _CST is supported. */
790 pr->flags.has_cst = 1;
791
792 for (i = 1; i <= count; i++) {
793 union acpi_object *element;
794 union acpi_object *obj;
795 struct acpi_power_register *reg;
796 struct acpi_processor_cx cx;
797
798 memset(&cx, 0, sizeof(cx));
799
800 element = &(cst->package.elements[i]);
801 if (element->type != ACPI_TYPE_PACKAGE)
802 continue;
803
804 if (element->package.count != 4)
805 continue;
806
807 obj = &(element->package.elements[0]);
808
809 if (obj->type != ACPI_TYPE_BUFFER)
810 continue;
811
812 reg = (struct acpi_power_register *)obj->buffer.pointer;
813
814 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
815 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
816 continue;
817
818 /* There should be an easy way to extract an integer... */
819 obj = &(element->package.elements[1]);
820 if (obj->type != ACPI_TYPE_INTEGER)
821 continue;
822
823 cx.type = obj->integer.value;
824 /*
825 * Some buggy BIOSes won't list C1 in _CST -
826 * Let acpi_processor_get_power_info_default() handle them later
827 */
828 if (i == 1 && cx.type != ACPI_STATE_C1)
829 current_count++;
830
831 cx.address = reg->address;
832 cx.index = current_count + 1;
833
834 cx.space_id = ACPI_CSTATE_SYSTEMIO;
835 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
836 if (acpi_processor_ffh_cstate_probe
837 (pr->id, &cx, reg) == 0) {
838 cx.space_id = ACPI_CSTATE_FFH;
839 } else if (cx.type != ACPI_STATE_C1) {
840 /*
841 * C1 is a special case where FIXED_HARDWARE
842 * can be handled in non-MWAIT way as well.
843 * In that case, save this _CST entry info.
844 * That is, we retain space_id of SYSTEM_IO for
845 * halt based C1.
846 * Otherwise, ignore this info and continue.
847 */
848 continue;
849 }
850 }
851
852 obj = &(element->package.elements[2]);
853 if (obj->type != ACPI_TYPE_INTEGER)
854 continue;
855
856 cx.latency = obj->integer.value;
857
858 obj = &(element->package.elements[3]);
859 if (obj->type != ACPI_TYPE_INTEGER)
860 continue;
861
862 cx.power = obj->integer.value;
863
864 current_count++;
865 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
866
867 /*
868 * We support total ACPI_PROCESSOR_MAX_POWER - 1
869 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
870 */
871 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
872 printk(KERN_WARNING
873 "Limiting number of power states to max (%d)\n",
874 ACPI_PROCESSOR_MAX_POWER);
875 printk(KERN_WARNING
876 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
877 break;
878 }
879 }
880
881 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
882 current_count));
883
884 /* Validate number of power states discovered */
885 if (current_count < 2)
886 status = -EFAULT;
887
888 end:
889 kfree(buffer.pointer);
890
891 return status;
892 }
893
894 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
895 {
896
897 if (!cx->address)
898 return;
899
900 /*
901 * C2 latency must be less than or equal to 100
902 * microseconds.
903 */
904 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
905 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
906 "latency too large [%d]\n", cx->latency));
907 return;
908 }
909
910 /*
911 * Otherwise we've met all of our C2 requirements.
912 * Normalize the C2 latency to expidite policy
913 */
914 cx->valid = 1;
915 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
916
917 return;
918 }
919
920 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
921 struct acpi_processor_cx *cx)
922 {
923 static int bm_check_flag;
924
925
926 if (!cx->address)
927 return;
928
929 /*
930 * C3 latency must be less than or equal to 1000
931 * microseconds.
932 */
933 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
934 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
935 "latency too large [%d]\n", cx->latency));
936 return;
937 }
938
939 /*
940 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
941 * DMA transfers are used by any ISA device to avoid livelock.
942 * Note that we could disable Type-F DMA (as recommended by
943 * the erratum), but this is known to disrupt certain ISA
944 * devices thus we take the conservative approach.
945 */
946 else if (errata.piix4.fdma) {
947 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
948 "C3 not supported on PIIX4 with Type-F DMA\n"));
949 return;
950 }
951
952 /* All the logic here assumes flags.bm_check is same across all CPUs */
953 if (!bm_check_flag) {
954 /* Determine whether bm_check is needed based on CPU */
955 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
956 bm_check_flag = pr->flags.bm_check;
957 } else {
958 pr->flags.bm_check = bm_check_flag;
959 }
960
961 if (pr->flags.bm_check) {
962 /* bus mastering control is necessary */
963 if (!pr->flags.bm_control) {
964 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
965 "C3 support requires bus mastering control\n"));
966 return;
967 }
968 } else {
969 /*
970 * WBINVD should be set in fadt, for C3 state to be
971 * supported on when bm_check is not required.
972 */
973 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
974 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
975 "Cache invalidation should work properly"
976 " for C3 to be enabled on SMP systems\n"));
977 return;
978 }
979 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
980 }
981
982 /*
983 * Otherwise we've met all of our C3 requirements.
984 * Normalize the C3 latency to expidite policy. Enable
985 * checking of bus mastering status (bm_check) so we can
986 * use this in our C3 policy
987 */
988 cx->valid = 1;
989 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
990
991 return;
992 }
993
994 static int acpi_processor_power_verify(struct acpi_processor *pr)
995 {
996 unsigned int i;
997 unsigned int working = 0;
998
999 pr->power.timer_broadcast_on_state = INT_MAX;
1000
1001 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1002 struct acpi_processor_cx *cx = &pr->power.states[i];
1003
1004 switch (cx->type) {
1005 case ACPI_STATE_C1:
1006 cx->valid = 1;
1007 break;
1008
1009 case ACPI_STATE_C2:
1010 acpi_processor_power_verify_c2(cx);
1011 if (cx->valid)
1012 acpi_timer_check_state(i, pr, cx);
1013 break;
1014
1015 case ACPI_STATE_C3:
1016 acpi_processor_power_verify_c3(pr, cx);
1017 if (cx->valid)
1018 acpi_timer_check_state(i, pr, cx);
1019 break;
1020 }
1021
1022 if (cx->valid)
1023 working++;
1024 }
1025
1026 acpi_propagate_timer_broadcast(pr);
1027
1028 return (working);
1029 }
1030
1031 static int acpi_processor_get_power_info(struct acpi_processor *pr)
1032 {
1033 unsigned int i;
1034 int result;
1035
1036
1037 /* NOTE: the idle thread may not be running while calling
1038 * this function */
1039
1040 /* Zero initialize all the C-states info. */
1041 memset(pr->power.states, 0, sizeof(pr->power.states));
1042
1043 result = acpi_processor_get_power_info_cst(pr);
1044 if (result == -ENODEV)
1045 result = acpi_processor_get_power_info_fadt(pr);
1046
1047 if (result)
1048 return result;
1049
1050 acpi_processor_get_power_info_default(pr);
1051
1052 pr->power.count = acpi_processor_power_verify(pr);
1053
1054 /*
1055 * Set Default Policy
1056 * ------------------
1057 * Now that we know which states are supported, set the default
1058 * policy. Note that this policy can be changed dynamically
1059 * (e.g. encourage deeper sleeps to conserve battery life when
1060 * not on AC).
1061 */
1062 result = acpi_processor_set_power_policy(pr);
1063 if (result)
1064 return result;
1065
1066 /*
1067 * if one state of type C2 or C3 is available, mark this
1068 * CPU as being "idle manageable"
1069 */
1070 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1071 if (pr->power.states[i].valid) {
1072 pr->power.count = i;
1073 if (pr->power.states[i].type >= ACPI_STATE_C2)
1074 pr->flags.power = 1;
1075 }
1076 }
1077
1078 return 0;
1079 }
1080
1081 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1082 {
1083 int result = 0;
1084
1085
1086 if (!pr)
1087 return -EINVAL;
1088
1089 if (nocst) {
1090 return -ENODEV;
1091 }
1092
1093 if (!pr->flags.power_setup_done)
1094 return -ENODEV;
1095
1096 /* Fall back to the default idle loop */
1097 pm_idle = pm_idle_save;
1098 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
1099
1100 pr->flags.power = 0;
1101 result = acpi_processor_get_power_info(pr);
1102 if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
1103 pm_idle = acpi_processor_idle;
1104
1105 return result;
1106 }
1107
1108 /* proc interface */
1109
1110 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1111 {
1112 struct acpi_processor *pr = seq->private;
1113 unsigned int i;
1114
1115
1116 if (!pr)
1117 goto end;
1118
1119 seq_printf(seq, "active state: C%zd\n"
1120 "max_cstate: C%d\n"
1121 "bus master activity: %08x\n"
1122 "maximum allowed latency: %d usec\n",
1123 pr->power.state ? pr->power.state - pr->power.states : 0,
1124 max_cstate, (unsigned)pr->power.bm_activity,
1125 system_latency_constraint());
1126
1127 seq_puts(seq, "states:\n");
1128
1129 for (i = 1; i <= pr->power.count; i++) {
1130 seq_printf(seq, " %cC%d: ",
1131 (&pr->power.states[i] ==
1132 pr->power.state ? '*' : ' '), i);
1133
1134 if (!pr->power.states[i].valid) {
1135 seq_puts(seq, "<not supported>\n");
1136 continue;
1137 }
1138
1139 switch (pr->power.states[i].type) {
1140 case ACPI_STATE_C1:
1141 seq_printf(seq, "type[C1] ");
1142 break;
1143 case ACPI_STATE_C2:
1144 seq_printf(seq, "type[C2] ");
1145 break;
1146 case ACPI_STATE_C3:
1147 seq_printf(seq, "type[C3] ");
1148 break;
1149 default:
1150 seq_printf(seq, "type[--] ");
1151 break;
1152 }
1153
1154 if (pr->power.states[i].promotion.state)
1155 seq_printf(seq, "promotion[C%zd] ",
1156 (pr->power.states[i].promotion.state -
1157 pr->power.states));
1158 else
1159 seq_puts(seq, "promotion[--] ");
1160
1161 if (pr->power.states[i].demotion.state)
1162 seq_printf(seq, "demotion[C%zd] ",
1163 (pr->power.states[i].demotion.state -
1164 pr->power.states));
1165 else
1166 seq_puts(seq, "demotion[--] ");
1167
1168 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
1169 pr->power.states[i].latency,
1170 pr->power.states[i].usage,
1171 (unsigned long long)pr->power.states[i].time);
1172 }
1173
1174 end:
1175 return 0;
1176 }
1177
1178 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1179 {
1180 return single_open(file, acpi_processor_power_seq_show,
1181 PDE(inode)->data);
1182 }
1183
1184 static const struct file_operations acpi_processor_power_fops = {
1185 .open = acpi_processor_power_open_fs,
1186 .read = seq_read,
1187 .llseek = seq_lseek,
1188 .release = single_release,
1189 };
1190
1191 #ifdef CONFIG_SMP
1192 static void smp_callback(void *v)
1193 {
1194 /* we already woke the CPU up, nothing more to do */
1195 }
1196
1197 /*
1198 * This function gets called when a part of the kernel has a new latency
1199 * requirement. This means we need to get all processors out of their C-state,
1200 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1201 * wakes them all right up.
1202 */
1203 static int acpi_processor_latency_notify(struct notifier_block *b,
1204 unsigned long l, void *v)
1205 {
1206 smp_call_function(smp_callback, NULL, 0, 1);
1207 return NOTIFY_OK;
1208 }
1209
1210 static struct notifier_block acpi_processor_latency_notifier = {
1211 .notifier_call = acpi_processor_latency_notify,
1212 };
1213 #endif
1214
1215 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1216 struct acpi_device *device)
1217 {
1218 acpi_status status = 0;
1219 static int first_run;
1220 struct proc_dir_entry *entry = NULL;
1221 unsigned int i;
1222
1223
1224 if (!first_run) {
1225 dmi_check_system(processor_power_dmi_table);
1226 if (max_cstate < ACPI_C_STATES_MAX)
1227 printk(KERN_NOTICE
1228 "ACPI: processor limited to max C-state %d\n",
1229 max_cstate);
1230 first_run++;
1231 #ifdef CONFIG_SMP
1232 register_latency_notifier(&acpi_processor_latency_notifier);
1233 #endif
1234 }
1235
1236 if (!pr)
1237 return -EINVAL;
1238
1239 if (acpi_gbl_FADT.cst_control && !nocst) {
1240 status =
1241 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1242 if (ACPI_FAILURE(status)) {
1243 ACPI_EXCEPTION((AE_INFO, status,
1244 "Notifying BIOS of _CST ability failed"));
1245 }
1246 }
1247
1248 acpi_processor_get_power_info(pr);
1249
1250 /*
1251 * Install the idle handler if processor power management is supported.
1252 * Note that we use previously set idle handler will be used on
1253 * platforms that only support C1.
1254 */
1255 if ((pr->flags.power) && (!boot_option_idle_override)) {
1256 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1257 for (i = 1; i <= pr->power.count; i++)
1258 if (pr->power.states[i].valid)
1259 printk(" C%d[C%d]", i,
1260 pr->power.states[i].type);
1261 printk(")\n");
1262
1263 if (pr->id == 0) {
1264 pm_idle_save = pm_idle;
1265 pm_idle = acpi_processor_idle;
1266 }
1267 }
1268
1269 /* 'power' [R] */
1270 entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1271 S_IRUGO, acpi_device_dir(device));
1272 if (!entry)
1273 return -EIO;
1274 else {
1275 entry->proc_fops = &acpi_processor_power_fops;
1276 entry->data = acpi_driver_data(device);
1277 entry->owner = THIS_MODULE;
1278 }
1279
1280 pr->flags.power_setup_done = 1;
1281
1282 return 0;
1283 }
1284
1285 int acpi_processor_power_exit(struct acpi_processor *pr,
1286 struct acpi_device *device)
1287 {
1288
1289 pr->flags.power_setup_done = 0;
1290
1291 if (acpi_device_dir(device))
1292 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1293 acpi_device_dir(device));
1294
1295 /* Unregister the idle handler when processor #0 is removed. */
1296 if (pr->id == 0) {
1297 pm_idle = pm_idle_save;
1298
1299 /*
1300 * We are about to unload the current idle thread pm callback
1301 * (pm_idle), Wait for all processors to update cached/local
1302 * copies of pm_idle before proceeding.
1303 */
1304 cpu_idle_wait();
1305 #ifdef CONFIG_SMP
1306 unregister_latency_notifier(&acpi_processor_latency_notifier);
1307 #endif
1308 }
1309
1310 return 0;
1311 }