2 * libata-sff.c - helper library for PCI IDE BMDMA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/pci.h>
37 #include <linux/libata.h>
38 #include <linux/highmem.h>
42 const struct ata_port_operations ata_sff_port_ops
= {
43 .inherits
= &ata_base_port_ops
,
45 .qc_prep
= ata_sff_qc_prep
,
46 .qc_issue
= ata_sff_qc_issue
,
48 .freeze
= ata_sff_freeze
,
50 .prereset
= ata_sff_prereset
,
51 .softreset
= ata_sff_softreset
,
52 .postreset
= ata_sff_postreset
,
53 .error_handler
= ata_sff_error_handler
,
54 .post_internal_cmd
= ata_sff_post_internal_cmd
,
56 .sff_dev_select
= ata_sff_dev_select
,
57 .sff_check_status
= ata_sff_check_status
,
58 .sff_tf_load
= ata_sff_tf_load
,
59 .sff_tf_read
= ata_sff_tf_read
,
60 .sff_exec_command
= ata_sff_exec_command
,
61 .sff_data_xfer
= ata_sff_data_xfer
,
62 .sff_irq_on
= ata_sff_irq_on
,
63 .sff_irq_clear
= ata_sff_irq_clear
,
65 .port_start
= ata_sff_port_start
,
68 const struct ata_port_operations ata_bmdma_port_ops
= {
69 .inherits
= &ata_sff_port_ops
,
71 .mode_filter
= ata_bmdma_mode_filter
,
73 .bmdma_setup
= ata_bmdma_setup
,
74 .bmdma_start
= ata_bmdma_start
,
75 .bmdma_stop
= ata_bmdma_stop
,
76 .bmdma_status
= ata_bmdma_status
,
80 * ata_fill_sg - Fill PCI IDE PRD table
81 * @qc: Metadata associated with taskfile to be transferred
83 * Fill PCI IDE PRD (scatter-gather) table with segments
84 * associated with the current disk command.
87 * spin_lock_irqsave(host lock)
90 static void ata_fill_sg(struct ata_queued_cmd
*qc
)
92 struct ata_port
*ap
= qc
->ap
;
93 struct scatterlist
*sg
;
97 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
101 /* determine if physical DMA addr spans 64K boundary.
102 * Note h/w doesn't support 64-bit, so we unconditionally
103 * truncate dma_addr_t to u32.
105 addr
= (u32
) sg_dma_address(sg
);
106 sg_len
= sg_dma_len(sg
);
109 offset
= addr
& 0xffff;
111 if ((offset
+ sg_len
) > 0x10000)
112 len
= 0x10000 - offset
;
114 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
115 ap
->prd
[pi
].flags_len
= cpu_to_le32(len
& 0xffff);
116 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
124 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
128 * ata_fill_sg_dumb - Fill PCI IDE PRD table
129 * @qc: Metadata associated with taskfile to be transferred
131 * Fill PCI IDE PRD (scatter-gather) table with segments
132 * associated with the current disk command. Perform the fill
133 * so that we avoid writing any length 64K records for
134 * controllers that don't follow the spec.
137 * spin_lock_irqsave(host lock)
140 static void ata_fill_sg_dumb(struct ata_queued_cmd
*qc
)
142 struct ata_port
*ap
= qc
->ap
;
143 struct scatterlist
*sg
;
147 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
149 u32 sg_len
, len
, blen
;
151 /* determine if physical DMA addr spans 64K boundary.
152 * Note h/w doesn't support 64-bit, so we unconditionally
153 * truncate dma_addr_t to u32.
155 addr
= (u32
) sg_dma_address(sg
);
156 sg_len
= sg_dma_len(sg
);
159 offset
= addr
& 0xffff;
161 if ((offset
+ sg_len
) > 0x10000)
162 len
= 0x10000 - offset
;
165 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
167 /* Some PATA chipsets like the CS5530 can't
168 cope with 0x0000 meaning 64K as the spec says */
169 ap
->prd
[pi
].flags_len
= cpu_to_le32(0x8000);
171 ap
->prd
[++pi
].addr
= cpu_to_le32(addr
+ 0x8000);
173 ap
->prd
[pi
].flags_len
= cpu_to_le32(blen
);
174 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
182 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
186 * ata_sff_qc_prep - Prepare taskfile for submission
187 * @qc: Metadata associated with taskfile to be prepared
189 * Prepare ATA taskfile for submission.
192 * spin_lock_irqsave(host lock)
194 void ata_sff_qc_prep(struct ata_queued_cmd
*qc
)
196 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
203 * ata_sff_dumb_qc_prep - Prepare taskfile for submission
204 * @qc: Metadata associated with taskfile to be prepared
206 * Prepare ATA taskfile for submission.
209 * spin_lock_irqsave(host lock)
211 void ata_sff_dumb_qc_prep(struct ata_queued_cmd
*qc
)
213 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
216 ata_fill_sg_dumb(qc
);
220 * ata_sff_check_status - Read device status reg & clear interrupt
221 * @ap: port where the device is
223 * Reads ATA taskfile status register for currently-selected device
224 * and return its value. This also clears pending interrupts
228 * Inherited from caller.
230 u8
ata_sff_check_status(struct ata_port
*ap
)
232 return ioread8(ap
->ioaddr
.status_addr
);
236 * ata_sff_altstatus - Read device alternate status reg
237 * @ap: port where the device is
239 * Reads ATA taskfile alternate status register for
240 * currently-selected device and return its value.
242 * Note: may NOT be used as the check_altstatus() entry in
243 * ata_port_operations.
246 * Inherited from caller.
248 u8
ata_sff_altstatus(struct ata_port
*ap
)
250 if (ap
->ops
->sff_check_altstatus
)
251 return ap
->ops
->sff_check_altstatus(ap
);
253 return ioread8(ap
->ioaddr
.altstatus_addr
);
257 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
258 * @ap: port containing status register to be polled
259 * @tmout_pat: impatience timeout
260 * @tmout: overall timeout
262 * Sleep until ATA Status register bit BSY clears,
263 * or a timeout occurs.
266 * Kernel thread context (may sleep).
269 * 0 on success, -errno otherwise.
271 int ata_sff_busy_sleep(struct ata_port
*ap
,
272 unsigned long tmout_pat
, unsigned long tmout
)
274 unsigned long timer_start
, timeout
;
277 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 300);
278 timer_start
= jiffies
;
279 timeout
= timer_start
+ tmout_pat
;
280 while (status
!= 0xff && (status
& ATA_BUSY
) &&
281 time_before(jiffies
, timeout
)) {
283 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 3);
286 if (status
!= 0xff && (status
& ATA_BUSY
))
287 ata_port_printk(ap
, KERN_WARNING
,
288 "port is slow to respond, please be patient "
289 "(Status 0x%x)\n", status
);
291 timeout
= timer_start
+ tmout
;
292 while (status
!= 0xff && (status
& ATA_BUSY
) &&
293 time_before(jiffies
, timeout
)) {
295 status
= ap
->ops
->sff_check_status(ap
);
301 if (status
& ATA_BUSY
) {
302 ata_port_printk(ap
, KERN_ERR
, "port failed to respond "
303 "(%lu secs, Status 0x%x)\n",
312 * ata_sff_wait_ready - sleep until BSY clears, or timeout
313 * @link: SFF link to wait ready status for
314 * @deadline: deadline jiffies for the operation
316 * Sleep until ATA Status register bit BSY clears, or timeout
320 * Kernel thread context (may sleep).
323 * 0 on success, -errno otherwise.
325 int ata_sff_wait_ready(struct ata_link
*link
, unsigned long deadline
)
327 struct ata_port
*ap
= link
->ap
;
328 unsigned long start
= jiffies
;
329 unsigned long nodev_deadline
= start
+ ATA_TMOUT_FF_WAIT
;
332 if (time_after(nodev_deadline
, deadline
))
333 nodev_deadline
= deadline
;
336 u8 status
= ap
->ops
->sff_check_status(ap
);
337 unsigned long now
= jiffies
;
339 if (!(status
& ATA_BUSY
))
342 /* No device status could be transient. Ignore it if
343 * link is online. Also, some SATA devices take a
344 * long time to clear 0xff after reset. For example,
345 * HHD424020F7SV00 iVDR needs >= 800ms while Quantum
346 * GoVault needs even more than that. Wait for
347 * ATA_TMOUT_FF_WAIT on -ENODEV if link isn't offline.
349 * Note that some PATA controllers (pata_ali) explode
350 * if status register is read more than once when
351 * there's no device attached.
353 if (status
== 0xff) {
354 if (ata_link_online(link
))
356 else if ((link
->ap
->flags
& ATA_FLAG_SATA
) &&
357 !ata_link_offline(link
) &&
358 time_before(now
, nodev_deadline
))
364 if (time_after(now
, deadline
))
367 if (!warned
&& time_after(now
, start
+ 5 * HZ
) &&
368 (deadline
- now
> 3 * HZ
)) {
369 ata_link_printk(link
, KERN_WARNING
,
370 "link is slow to respond, please be patient "
371 "(Status 0x%x)\n", status
);
380 * ata_sff_dev_select - Select device 0/1 on ATA bus
381 * @ap: ATA channel to manipulate
382 * @device: ATA device (numbered from zero) to select
384 * Use the method defined in the ATA specification to
385 * make either device 0, or device 1, active on the
386 * ATA channel. Works with both PIO and MMIO.
388 * May be used as the dev_select() entry in ata_port_operations.
393 void ata_sff_dev_select(struct ata_port
*ap
, unsigned int device
)
398 tmp
= ATA_DEVICE_OBS
;
400 tmp
= ATA_DEVICE_OBS
| ATA_DEV1
;
402 iowrite8(tmp
, ap
->ioaddr
.device_addr
);
403 ata_sff_pause(ap
); /* needed; also flushes, for mmio */
407 * ata_dev_select - Select device 0/1 on ATA bus
408 * @ap: ATA channel to manipulate
409 * @device: ATA device (numbered from zero) to select
410 * @wait: non-zero to wait for Status register BSY bit to clear
411 * @can_sleep: non-zero if context allows sleeping
413 * Use the method defined in the ATA specification to
414 * make either device 0, or device 1, active on the
417 * This is a high-level version of ata_sff_dev_select(), which
418 * additionally provides the services of inserting the proper
419 * pauses and status polling, where needed.
424 void ata_dev_select(struct ata_port
*ap
, unsigned int device
,
425 unsigned int wait
, unsigned int can_sleep
)
427 if (ata_msg_probe(ap
))
428 ata_port_printk(ap
, KERN_INFO
, "ata_dev_select: ENTER, "
429 "device %u, wait %u\n", device
, wait
);
434 ap
->ops
->sff_dev_select(ap
, device
);
437 if (can_sleep
&& ap
->link
.device
[device
].class == ATA_DEV_ATAPI
)
444 * ata_sff_irq_on - Enable interrupts on a port.
445 * @ap: Port on which interrupts are enabled.
447 * Enable interrupts on a legacy IDE device using MMIO or PIO,
448 * wait for idle, clear any pending interrupts.
451 * Inherited from caller.
453 u8
ata_sff_irq_on(struct ata_port
*ap
)
455 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
458 ap
->ctl
&= ~ATA_NIEN
;
459 ap
->last_ctl
= ap
->ctl
;
461 if (ioaddr
->ctl_addr
)
462 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
463 tmp
= ata_wait_idle(ap
);
465 ap
->ops
->sff_irq_clear(ap
);
471 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
472 * @ap: Port associated with this ATA transaction.
474 * Clear interrupt and error flags in DMA status register.
476 * May be used as the irq_clear() entry in ata_port_operations.
479 * spin_lock_irqsave(host lock)
481 void ata_sff_irq_clear(struct ata_port
*ap
)
483 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
488 iowrite8(ioread8(mmio
+ ATA_DMA_STATUS
), mmio
+ ATA_DMA_STATUS
);
492 * ata_sff_tf_load - send taskfile registers to host controller
493 * @ap: Port to which output is sent
494 * @tf: ATA taskfile register set
496 * Outputs ATA taskfile to standard ATA host controller.
499 * Inherited from caller.
501 void ata_sff_tf_load(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
503 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
504 unsigned int is_addr
= tf
->flags
& ATA_TFLAG_ISADDR
;
506 if (tf
->ctl
!= ap
->last_ctl
) {
507 if (ioaddr
->ctl_addr
)
508 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
509 ap
->last_ctl
= tf
->ctl
;
513 if (is_addr
&& (tf
->flags
& ATA_TFLAG_LBA48
)) {
514 WARN_ON(!ioaddr
->ctl_addr
);
515 iowrite8(tf
->hob_feature
, ioaddr
->feature_addr
);
516 iowrite8(tf
->hob_nsect
, ioaddr
->nsect_addr
);
517 iowrite8(tf
->hob_lbal
, ioaddr
->lbal_addr
);
518 iowrite8(tf
->hob_lbam
, ioaddr
->lbam_addr
);
519 iowrite8(tf
->hob_lbah
, ioaddr
->lbah_addr
);
520 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
529 iowrite8(tf
->feature
, ioaddr
->feature_addr
);
530 iowrite8(tf
->nsect
, ioaddr
->nsect_addr
);
531 iowrite8(tf
->lbal
, ioaddr
->lbal_addr
);
532 iowrite8(tf
->lbam
, ioaddr
->lbam_addr
);
533 iowrite8(tf
->lbah
, ioaddr
->lbah_addr
);
534 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
542 if (tf
->flags
& ATA_TFLAG_DEVICE
) {
543 iowrite8(tf
->device
, ioaddr
->device_addr
);
544 VPRINTK("device 0x%X\n", tf
->device
);
551 * ata_sff_tf_read - input device's ATA taskfile shadow registers
552 * @ap: Port from which input is read
553 * @tf: ATA taskfile register set for storing input
555 * Reads ATA taskfile registers for currently-selected device
556 * into @tf. Assumes the device has a fully SFF compliant task file
557 * layout and behaviour. If you device does not (eg has a different
558 * status method) then you will need to provide a replacement tf_read
561 * Inherited from caller.
563 void ata_sff_tf_read(struct ata_port
*ap
, struct ata_taskfile
*tf
)
565 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
567 tf
->command
= ata_sff_check_status(ap
);
568 tf
->feature
= ioread8(ioaddr
->error_addr
);
569 tf
->nsect
= ioread8(ioaddr
->nsect_addr
);
570 tf
->lbal
= ioread8(ioaddr
->lbal_addr
);
571 tf
->lbam
= ioread8(ioaddr
->lbam_addr
);
572 tf
->lbah
= ioread8(ioaddr
->lbah_addr
);
573 tf
->device
= ioread8(ioaddr
->device_addr
);
575 if (tf
->flags
& ATA_TFLAG_LBA48
) {
576 if (likely(ioaddr
->ctl_addr
)) {
577 iowrite8(tf
->ctl
| ATA_HOB
, ioaddr
->ctl_addr
);
578 tf
->hob_feature
= ioread8(ioaddr
->error_addr
);
579 tf
->hob_nsect
= ioread8(ioaddr
->nsect_addr
);
580 tf
->hob_lbal
= ioread8(ioaddr
->lbal_addr
);
581 tf
->hob_lbam
= ioread8(ioaddr
->lbam_addr
);
582 tf
->hob_lbah
= ioread8(ioaddr
->lbah_addr
);
583 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
584 ap
->last_ctl
= tf
->ctl
;
591 * ata_sff_exec_command - issue ATA command to host controller
592 * @ap: port to which command is being issued
593 * @tf: ATA taskfile register set
595 * Issues ATA command, with proper synchronization with interrupt
596 * handler / other threads.
599 * spin_lock_irqsave(host lock)
601 void ata_sff_exec_command(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
603 DPRINTK("ata%u: cmd 0x%X\n", ap
->print_id
, tf
->command
);
605 iowrite8(tf
->command
, ap
->ioaddr
.command_addr
);
610 * ata_tf_to_host - issue ATA taskfile to host controller
611 * @ap: port to which command is being issued
612 * @tf: ATA taskfile register set
614 * Issues ATA taskfile register set to ATA host controller,
615 * with proper synchronization with interrupt handler and
619 * spin_lock_irqsave(host lock)
621 static inline void ata_tf_to_host(struct ata_port
*ap
,
622 const struct ata_taskfile
*tf
)
624 ap
->ops
->sff_tf_load(ap
, tf
);
625 ap
->ops
->sff_exec_command(ap
, tf
);
629 * ata_sff_data_xfer - Transfer data by PIO
630 * @dev: device to target
632 * @buflen: buffer length
635 * Transfer data from/to the device data register by PIO.
638 * Inherited from caller.
643 unsigned int ata_sff_data_xfer(struct ata_device
*dev
, unsigned char *buf
,
644 unsigned int buflen
, int rw
)
646 struct ata_port
*ap
= dev
->link
->ap
;
647 void __iomem
*data_addr
= ap
->ioaddr
.data_addr
;
648 unsigned int words
= buflen
>> 1;
650 /* Transfer multiple of 2 bytes */
652 ioread16_rep(data_addr
, buf
, words
);
654 iowrite16_rep(data_addr
, buf
, words
);
656 /* Transfer trailing 1 byte, if any. */
657 if (unlikely(buflen
& 0x01)) {
658 __le16 align_buf
[1] = { 0 };
659 unsigned char *trailing_buf
= buf
+ buflen
- 1;
662 align_buf
[0] = cpu_to_le16(ioread16(data_addr
));
663 memcpy(trailing_buf
, align_buf
, 1);
665 memcpy(align_buf
, trailing_buf
, 1);
666 iowrite16(le16_to_cpu(align_buf
[0]), data_addr
);
675 * ata_sff_data_xfer_noirq - Transfer data by PIO
676 * @dev: device to target
678 * @buflen: buffer length
681 * Transfer data from/to the device data register by PIO. Do the
682 * transfer with interrupts disabled.
685 * Inherited from caller.
690 unsigned int ata_sff_data_xfer_noirq(struct ata_device
*dev
, unsigned char *buf
,
691 unsigned int buflen
, int rw
)
694 unsigned int consumed
;
696 local_irq_save(flags
);
697 consumed
= ata_sff_data_xfer(dev
, buf
, buflen
, rw
);
698 local_irq_restore(flags
);
704 * ata_pio_sector - Transfer a sector of data.
705 * @qc: Command on going
707 * Transfer qc->sect_size bytes of data from/to the ATA device.
710 * Inherited from caller.
712 static void ata_pio_sector(struct ata_queued_cmd
*qc
)
714 int do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
715 struct ata_port
*ap
= qc
->ap
;
720 if (qc
->curbytes
== qc
->nbytes
- qc
->sect_size
)
721 ap
->hsm_task_state
= HSM_ST_LAST
;
723 page
= sg_page(qc
->cursg
);
724 offset
= qc
->cursg
->offset
+ qc
->cursg_ofs
;
726 /* get the current page and offset */
727 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
730 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
732 if (PageHighMem(page
)) {
735 /* FIXME: use a bounce buffer */
736 local_irq_save(flags
);
737 buf
= kmap_atomic(page
, KM_IRQ0
);
739 /* do the actual data transfer */
740 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
743 kunmap_atomic(buf
, KM_IRQ0
);
744 local_irq_restore(flags
);
746 buf
= page_address(page
);
747 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
751 qc
->curbytes
+= qc
->sect_size
;
752 qc
->cursg_ofs
+= qc
->sect_size
;
754 if (qc
->cursg_ofs
== qc
->cursg
->length
) {
755 qc
->cursg
= sg_next(qc
->cursg
);
761 * ata_pio_sectors - Transfer one or many sectors.
762 * @qc: Command on going
764 * Transfer one or many sectors of data from/to the
765 * ATA device for the DRQ request.
768 * Inherited from caller.
770 static void ata_pio_sectors(struct ata_queued_cmd
*qc
)
772 if (is_multi_taskfile(&qc
->tf
)) {
773 /* READ/WRITE MULTIPLE */
776 WARN_ON(qc
->dev
->multi_count
== 0);
778 nsect
= min((qc
->nbytes
- qc
->curbytes
) / qc
->sect_size
,
779 qc
->dev
->multi_count
);
785 ata_sff_altstatus(qc
->ap
); /* flush */
789 * atapi_send_cdb - Write CDB bytes to hardware
790 * @ap: Port to which ATAPI device is attached.
791 * @qc: Taskfile currently active
793 * When device has indicated its readiness to accept
794 * a CDB, this function is called. Send the CDB.
799 static void atapi_send_cdb(struct ata_port
*ap
, struct ata_queued_cmd
*qc
)
802 DPRINTK("send cdb\n");
803 WARN_ON(qc
->dev
->cdb_len
< 12);
805 ap
->ops
->sff_data_xfer(qc
->dev
, qc
->cdb
, qc
->dev
->cdb_len
, 1);
806 ata_sff_altstatus(ap
); /* flush */
808 switch (qc
->tf
.protocol
) {
810 ap
->hsm_task_state
= HSM_ST
;
812 case ATAPI_PROT_NODATA
:
813 ap
->hsm_task_state
= HSM_ST_LAST
;
816 ap
->hsm_task_state
= HSM_ST_LAST
;
818 ap
->ops
->bmdma_start(qc
);
824 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
825 * @qc: Command on going
826 * @bytes: number of bytes
828 * Transfer Transfer data from/to the ATAPI device.
831 * Inherited from caller.
834 static int __atapi_pio_bytes(struct ata_queued_cmd
*qc
, unsigned int bytes
)
836 int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? WRITE
: READ
;
837 struct ata_port
*ap
= qc
->ap
;
838 struct ata_device
*dev
= qc
->dev
;
839 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
840 struct scatterlist
*sg
;
843 unsigned int offset
, count
, consumed
;
848 ata_ehi_push_desc(ehi
, "unexpected or too much trailing data "
849 "buf=%u cur=%u bytes=%u",
850 qc
->nbytes
, qc
->curbytes
, bytes
);
855 offset
= sg
->offset
+ qc
->cursg_ofs
;
857 /* get the current page and offset */
858 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
861 /* don't overrun current sg */
862 count
= min(sg
->length
- qc
->cursg_ofs
, bytes
);
864 /* don't cross page boundaries */
865 count
= min(count
, (unsigned int)PAGE_SIZE
- offset
);
867 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
869 if (PageHighMem(page
)) {
872 /* FIXME: use bounce buffer */
873 local_irq_save(flags
);
874 buf
= kmap_atomic(page
, KM_IRQ0
);
876 /* do the actual data transfer */
877 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
, count
, rw
);
879 kunmap_atomic(buf
, KM_IRQ0
);
880 local_irq_restore(flags
);
882 buf
= page_address(page
);
883 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
, count
, rw
);
886 bytes
-= min(bytes
, consumed
);
887 qc
->curbytes
+= count
;
888 qc
->cursg_ofs
+= count
;
890 if (qc
->cursg_ofs
== sg
->length
) {
891 qc
->cursg
= sg_next(qc
->cursg
);
895 /* consumed can be larger than count only for the last transfer */
896 WARN_ON(qc
->cursg
&& count
!= consumed
);
904 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
905 * @qc: Command on going
907 * Transfer Transfer data from/to the ATAPI device.
910 * Inherited from caller.
912 static void atapi_pio_bytes(struct ata_queued_cmd
*qc
)
914 struct ata_port
*ap
= qc
->ap
;
915 struct ata_device
*dev
= qc
->dev
;
916 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
917 unsigned int ireason
, bc_lo
, bc_hi
, bytes
;
918 int i_write
, do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? 1 : 0;
920 /* Abuse qc->result_tf for temp storage of intermediate TF
921 * here to save some kernel stack usage.
922 * For normal completion, qc->result_tf is not relevant. For
923 * error, qc->result_tf is later overwritten by ata_qc_complete().
924 * So, the correctness of qc->result_tf is not affected.
926 ap
->ops
->sff_tf_read(ap
, &qc
->result_tf
);
927 ireason
= qc
->result_tf
.nsect
;
928 bc_lo
= qc
->result_tf
.lbam
;
929 bc_hi
= qc
->result_tf
.lbah
;
930 bytes
= (bc_hi
<< 8) | bc_lo
;
932 /* shall be cleared to zero, indicating xfer of data */
933 if (unlikely(ireason
& (1 << 0)))
936 /* make sure transfer direction matches expected */
937 i_write
= ((ireason
& (1 << 1)) == 0) ? 1 : 0;
938 if (unlikely(do_write
!= i_write
))
941 if (unlikely(!bytes
))
944 VPRINTK("ata%u: xfering %d bytes\n", ap
->print_id
, bytes
);
946 if (unlikely(__atapi_pio_bytes(qc
, bytes
)))
948 ata_sff_altstatus(ap
); /* flush */
953 ata_ehi_push_desc(ehi
, "ATAPI check failed (ireason=0x%x bytes=%u)",
956 qc
->err_mask
|= AC_ERR_HSM
;
957 ap
->hsm_task_state
= HSM_ST_ERR
;
961 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
962 * @ap: the target ata_port
966 * 1 if ok in workqueue, 0 otherwise.
968 static inline int ata_hsm_ok_in_wq(struct ata_port
*ap
, struct ata_queued_cmd
*qc
)
970 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
973 if (ap
->hsm_task_state
== HSM_ST_FIRST
) {
974 if (qc
->tf
.protocol
== ATA_PROT_PIO
&&
975 (qc
->tf
.flags
& ATA_TFLAG_WRITE
))
978 if (ata_is_atapi(qc
->tf
.protocol
) &&
979 !(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
987 * ata_hsm_qc_complete - finish a qc running on standard HSM
988 * @qc: Command to complete
989 * @in_wq: 1 if called from workqueue, 0 otherwise
991 * Finish @qc which is running on standard HSM.
994 * If @in_wq is zero, spin_lock_irqsave(host lock).
995 * Otherwise, none on entry and grabs host lock.
997 static void ata_hsm_qc_complete(struct ata_queued_cmd
*qc
, int in_wq
)
999 struct ata_port
*ap
= qc
->ap
;
1000 unsigned long flags
;
1002 if (ap
->ops
->error_handler
) {
1004 spin_lock_irqsave(ap
->lock
, flags
);
1006 /* EH might have kicked in while host lock is
1009 qc
= ata_qc_from_tag(ap
, qc
->tag
);
1011 if (likely(!(qc
->err_mask
& AC_ERR_HSM
))) {
1012 ap
->ops
->sff_irq_on(ap
);
1013 ata_qc_complete(qc
);
1015 ata_port_freeze(ap
);
1018 spin_unlock_irqrestore(ap
->lock
, flags
);
1020 if (likely(!(qc
->err_mask
& AC_ERR_HSM
)))
1021 ata_qc_complete(qc
);
1023 ata_port_freeze(ap
);
1027 spin_lock_irqsave(ap
->lock
, flags
);
1028 ap
->ops
->sff_irq_on(ap
);
1029 ata_qc_complete(qc
);
1030 spin_unlock_irqrestore(ap
->lock
, flags
);
1032 ata_qc_complete(qc
);
1037 * ata_sff_hsm_move - move the HSM to the next state.
1038 * @ap: the target ata_port
1040 * @status: current device status
1041 * @in_wq: 1 if called from workqueue, 0 otherwise
1044 * 1 when poll next status needed, 0 otherwise.
1046 int ata_sff_hsm_move(struct ata_port
*ap
, struct ata_queued_cmd
*qc
,
1047 u8 status
, int in_wq
)
1049 unsigned long flags
= 0;
1052 WARN_ON((qc
->flags
& ATA_QCFLAG_ACTIVE
) == 0);
1054 /* Make sure ata_sff_qc_issue() does not throw things
1055 * like DMA polling into the workqueue. Notice that
1056 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1058 WARN_ON(in_wq
!= ata_hsm_ok_in_wq(ap
, qc
));
1061 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1062 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
, status
);
1064 switch (ap
->hsm_task_state
) {
1066 /* Send first data block or PACKET CDB */
1068 /* If polling, we will stay in the work queue after
1069 * sending the data. Otherwise, interrupt handler
1070 * takes over after sending the data.
1072 poll_next
= (qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1074 /* check device status */
1075 if (unlikely((status
& ATA_DRQ
) == 0)) {
1076 /* handle BSY=0, DRQ=0 as error */
1077 if (likely(status
& (ATA_ERR
| ATA_DF
)))
1078 /* device stops HSM for abort/error */
1079 qc
->err_mask
|= AC_ERR_DEV
;
1081 /* HSM violation. Let EH handle this */
1082 qc
->err_mask
|= AC_ERR_HSM
;
1084 ap
->hsm_task_state
= HSM_ST_ERR
;
1088 /* Device should not ask for data transfer (DRQ=1)
1089 * when it finds something wrong.
1090 * We ignore DRQ here and stop the HSM by
1091 * changing hsm_task_state to HSM_ST_ERR and
1092 * let the EH abort the command or reset the device.
1094 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1095 /* Some ATAPI tape drives forget to clear the ERR bit
1096 * when doing the next command (mostly request sense).
1097 * We ignore ERR here to workaround and proceed sending
1100 if (!(qc
->dev
->horkage
& ATA_HORKAGE_STUCK_ERR
)) {
1101 ata_port_printk(ap
, KERN_WARNING
,
1102 "DRQ=1 with device error, "
1103 "dev_stat 0x%X\n", status
);
1104 qc
->err_mask
|= AC_ERR_HSM
;
1105 ap
->hsm_task_state
= HSM_ST_ERR
;
1110 /* Send the CDB (atapi) or the first data block (ata pio out).
1111 * During the state transition, interrupt handler shouldn't
1112 * be invoked before the data transfer is complete and
1113 * hsm_task_state is changed. Hence, the following locking.
1116 spin_lock_irqsave(ap
->lock
, flags
);
1118 if (qc
->tf
.protocol
== ATA_PROT_PIO
) {
1119 /* PIO data out protocol.
1120 * send first data block.
1123 /* ata_pio_sectors() might change the state
1124 * to HSM_ST_LAST. so, the state is changed here
1125 * before ata_pio_sectors().
1127 ap
->hsm_task_state
= HSM_ST
;
1128 ata_pio_sectors(qc
);
1131 atapi_send_cdb(ap
, qc
);
1134 spin_unlock_irqrestore(ap
->lock
, flags
);
1136 /* if polling, ata_pio_task() handles the rest.
1137 * otherwise, interrupt handler takes over from here.
1142 /* complete command or read/write the data register */
1143 if (qc
->tf
.protocol
== ATAPI_PROT_PIO
) {
1144 /* ATAPI PIO protocol */
1145 if ((status
& ATA_DRQ
) == 0) {
1146 /* No more data to transfer or device error.
1147 * Device error will be tagged in HSM_ST_LAST.
1149 ap
->hsm_task_state
= HSM_ST_LAST
;
1153 /* Device should not ask for data transfer (DRQ=1)
1154 * when it finds something wrong.
1155 * We ignore DRQ here and stop the HSM by
1156 * changing hsm_task_state to HSM_ST_ERR and
1157 * let the EH abort the command or reset the device.
1159 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1160 ata_port_printk(ap
, KERN_WARNING
, "DRQ=1 with "
1161 "device error, dev_stat 0x%X\n",
1163 qc
->err_mask
|= AC_ERR_HSM
;
1164 ap
->hsm_task_state
= HSM_ST_ERR
;
1168 atapi_pio_bytes(qc
);
1170 if (unlikely(ap
->hsm_task_state
== HSM_ST_ERR
))
1171 /* bad ireason reported by device */
1175 /* ATA PIO protocol */
1176 if (unlikely((status
& ATA_DRQ
) == 0)) {
1177 /* handle BSY=0, DRQ=0 as error */
1178 if (likely(status
& (ATA_ERR
| ATA_DF
)))
1179 /* device stops HSM for abort/error */
1180 qc
->err_mask
|= AC_ERR_DEV
;
1182 /* HSM violation. Let EH handle this.
1183 * Phantom devices also trigger this
1184 * condition. Mark hint.
1186 qc
->err_mask
|= AC_ERR_HSM
|
1189 ap
->hsm_task_state
= HSM_ST_ERR
;
1193 /* For PIO reads, some devices may ask for
1194 * data transfer (DRQ=1) alone with ERR=1.
1195 * We respect DRQ here and transfer one
1196 * block of junk data before changing the
1197 * hsm_task_state to HSM_ST_ERR.
1199 * For PIO writes, ERR=1 DRQ=1 doesn't make
1200 * sense since the data block has been
1201 * transferred to the device.
1203 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1204 /* data might be corrputed */
1205 qc
->err_mask
|= AC_ERR_DEV
;
1207 if (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
)) {
1208 ata_pio_sectors(qc
);
1209 status
= ata_wait_idle(ap
);
1212 if (status
& (ATA_BUSY
| ATA_DRQ
))
1213 qc
->err_mask
|= AC_ERR_HSM
;
1215 /* ata_pio_sectors() might change the
1216 * state to HSM_ST_LAST. so, the state
1217 * is changed after ata_pio_sectors().
1219 ap
->hsm_task_state
= HSM_ST_ERR
;
1223 ata_pio_sectors(qc
);
1225 if (ap
->hsm_task_state
== HSM_ST_LAST
&&
1226 (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
))) {
1228 status
= ata_wait_idle(ap
);
1237 if (unlikely(!ata_ok(status
))) {
1238 qc
->err_mask
|= __ac_err_mask(status
);
1239 ap
->hsm_task_state
= HSM_ST_ERR
;
1243 /* no more data to transfer */
1244 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1245 ap
->print_id
, qc
->dev
->devno
, status
);
1247 WARN_ON(qc
->err_mask
);
1249 ap
->hsm_task_state
= HSM_ST_IDLE
;
1251 /* complete taskfile transaction */
1252 ata_hsm_qc_complete(qc
, in_wq
);
1258 /* make sure qc->err_mask is available to
1259 * know what's wrong and recover
1261 WARN_ON(qc
->err_mask
== 0);
1263 ap
->hsm_task_state
= HSM_ST_IDLE
;
1265 /* complete taskfile transaction */
1266 ata_hsm_qc_complete(qc
, in_wq
);
1278 void ata_pio_task(struct work_struct
*work
)
1280 struct ata_port
*ap
=
1281 container_of(work
, struct ata_port
, port_task
.work
);
1282 struct ata_queued_cmd
*qc
= ap
->port_task_data
;
1287 WARN_ON(ap
->hsm_task_state
== HSM_ST_IDLE
);
1290 * This is purely heuristic. This is a fast path.
1291 * Sometimes when we enter, BSY will be cleared in
1292 * a chk-status or two. If not, the drive is probably seeking
1293 * or something. Snooze for a couple msecs, then
1294 * chk-status again. If still busy, queue delayed work.
1296 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 5);
1297 if (status
& ATA_BUSY
) {
1299 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 10);
1300 if (status
& ATA_BUSY
) {
1301 ata_pio_queue_task(ap
, qc
, ATA_SHORT_PAUSE
);
1307 poll_next
= ata_sff_hsm_move(ap
, qc
, status
, 1);
1309 /* another command or interrupt handler
1310 * may be running at this point.
1317 * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner
1318 * @qc: command to issue to device
1320 * Using various libata functions and hooks, this function
1321 * starts an ATA command. ATA commands are grouped into
1322 * classes called "protocols", and issuing each type of protocol
1323 * is slightly different.
1325 * May be used as the qc_issue() entry in ata_port_operations.
1328 * spin_lock_irqsave(host lock)
1331 * Zero on success, AC_ERR_* mask on failure
1333 unsigned int ata_sff_qc_issue(struct ata_queued_cmd
*qc
)
1335 struct ata_port
*ap
= qc
->ap
;
1337 /* Use polling pio if the LLD doesn't handle
1338 * interrupt driven pio and atapi CDB interrupt.
1340 if (ap
->flags
& ATA_FLAG_PIO_POLLING
) {
1341 switch (qc
->tf
.protocol
) {
1343 case ATA_PROT_NODATA
:
1344 case ATAPI_PROT_PIO
:
1345 case ATAPI_PROT_NODATA
:
1346 qc
->tf
.flags
|= ATA_TFLAG_POLLING
;
1348 case ATAPI_PROT_DMA
:
1349 if (qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)
1350 /* see ata_dma_blacklisted() */
1358 /* select the device */
1359 ata_dev_select(ap
, qc
->dev
->devno
, 1, 0);
1361 /* start the command */
1362 switch (qc
->tf
.protocol
) {
1363 case ATA_PROT_NODATA
:
1364 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1365 ata_qc_set_polling(qc
);
1367 ata_tf_to_host(ap
, &qc
->tf
);
1368 ap
->hsm_task_state
= HSM_ST_LAST
;
1370 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1371 ata_pio_queue_task(ap
, qc
, 0);
1376 WARN_ON(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1378 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1379 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1380 ap
->ops
->bmdma_start(qc
); /* initiate bmdma */
1381 ap
->hsm_task_state
= HSM_ST_LAST
;
1385 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1386 ata_qc_set_polling(qc
);
1388 ata_tf_to_host(ap
, &qc
->tf
);
1390 if (qc
->tf
.flags
& ATA_TFLAG_WRITE
) {
1391 /* PIO data out protocol */
1392 ap
->hsm_task_state
= HSM_ST_FIRST
;
1393 ata_pio_queue_task(ap
, qc
, 0);
1395 /* always send first data block using
1396 * the ata_pio_task() codepath.
1399 /* PIO data in protocol */
1400 ap
->hsm_task_state
= HSM_ST
;
1402 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1403 ata_pio_queue_task(ap
, qc
, 0);
1405 /* if polling, ata_pio_task() handles the rest.
1406 * otherwise, interrupt handler takes over from here.
1412 case ATAPI_PROT_PIO
:
1413 case ATAPI_PROT_NODATA
:
1414 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1415 ata_qc_set_polling(qc
);
1417 ata_tf_to_host(ap
, &qc
->tf
);
1419 ap
->hsm_task_state
= HSM_ST_FIRST
;
1421 /* send cdb by polling if no cdb interrupt */
1422 if ((!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)) ||
1423 (qc
->tf
.flags
& ATA_TFLAG_POLLING
))
1424 ata_pio_queue_task(ap
, qc
, 0);
1427 case ATAPI_PROT_DMA
:
1428 WARN_ON(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1430 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1431 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1432 ap
->hsm_task_state
= HSM_ST_FIRST
;
1434 /* send cdb by polling if no cdb interrupt */
1435 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1436 ata_pio_queue_task(ap
, qc
, 0);
1441 return AC_ERR_SYSTEM
;
1448 * ata_sff_host_intr - Handle host interrupt for given (port, task)
1449 * @ap: Port on which interrupt arrived (possibly...)
1450 * @qc: Taskfile currently active in engine
1452 * Handle host interrupt for given queued command. Currently,
1453 * only DMA interrupts are handled. All other commands are
1454 * handled via polling with interrupts disabled (nIEN bit).
1457 * spin_lock_irqsave(host lock)
1460 * One if interrupt was handled, zero if not (shared irq).
1462 inline unsigned int ata_sff_host_intr(struct ata_port
*ap
,
1463 struct ata_queued_cmd
*qc
)
1465 struct ata_eh_info
*ehi
= &ap
->link
.eh_info
;
1466 u8 status
, host_stat
= 0;
1468 VPRINTK("ata%u: protocol %d task_state %d\n",
1469 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
);
1471 /* Check whether we are expecting interrupt in this state */
1472 switch (ap
->hsm_task_state
) {
1474 /* Some pre-ATAPI-4 devices assert INTRQ
1475 * at this state when ready to receive CDB.
1478 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1479 * The flag was turned on only for atapi devices. No
1480 * need to check ata_is_atapi(qc->tf.protocol) again.
1482 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1486 if (qc
->tf
.protocol
== ATA_PROT_DMA
||
1487 qc
->tf
.protocol
== ATAPI_PROT_DMA
) {
1488 /* check status of DMA engine */
1489 host_stat
= ap
->ops
->bmdma_status(ap
);
1490 VPRINTK("ata%u: host_stat 0x%X\n",
1491 ap
->print_id
, host_stat
);
1493 /* if it's not our irq... */
1494 if (!(host_stat
& ATA_DMA_INTR
))
1497 /* before we do anything else, clear DMA-Start bit */
1498 ap
->ops
->bmdma_stop(qc
);
1500 if (unlikely(host_stat
& ATA_DMA_ERR
)) {
1501 /* error when transfering data to/from memory */
1502 qc
->err_mask
|= AC_ERR_HOST_BUS
;
1503 ap
->hsm_task_state
= HSM_ST_ERR
;
1513 /* check altstatus */
1514 status
= ata_sff_altstatus(ap
);
1515 if (status
& ATA_BUSY
)
1518 /* check main status, clearing INTRQ */
1519 status
= ap
->ops
->sff_check_status(ap
);
1520 if (unlikely(status
& ATA_BUSY
))
1523 /* ack bmdma irq events */
1524 ap
->ops
->sff_irq_clear(ap
);
1526 ata_sff_hsm_move(ap
, qc
, status
, 0);
1528 if (unlikely(qc
->err_mask
) && (qc
->tf
.protocol
== ATA_PROT_DMA
||
1529 qc
->tf
.protocol
== ATAPI_PROT_DMA
))
1530 ata_ehi_push_desc(ehi
, "BMDMA stat 0x%x", host_stat
);
1532 return 1; /* irq handled */
1535 ap
->stats
.idle_irq
++;
1538 if ((ap
->stats
.idle_irq
% 1000) == 0) {
1539 ap
->ops
->sff_check_status(ap
);
1540 ap
->ops
->sff_irq_clear(ap
);
1541 ata_port_printk(ap
, KERN_WARNING
, "irq trap\n");
1545 return 0; /* irq not handled */
1549 * ata_sff_interrupt - Default ATA host interrupt handler
1550 * @irq: irq line (unused)
1551 * @dev_instance: pointer to our ata_host information structure
1553 * Default interrupt handler for PCI IDE devices. Calls
1554 * ata_sff_host_intr() for each port that is not disabled.
1557 * Obtains host lock during operation.
1560 * IRQ_NONE or IRQ_HANDLED.
1562 irqreturn_t
ata_sff_interrupt(int irq
, void *dev_instance
)
1564 struct ata_host
*host
= dev_instance
;
1566 unsigned int handled
= 0;
1567 unsigned long flags
;
1569 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1570 spin_lock_irqsave(&host
->lock
, flags
);
1572 for (i
= 0; i
< host
->n_ports
; i
++) {
1573 struct ata_port
*ap
;
1575 ap
= host
->ports
[i
];
1577 !(ap
->flags
& ATA_FLAG_DISABLED
)) {
1578 struct ata_queued_cmd
*qc
;
1580 qc
= ata_qc_from_tag(ap
, ap
->link
.active_tag
);
1581 if (qc
&& (!(qc
->tf
.flags
& ATA_TFLAG_POLLING
)) &&
1582 (qc
->flags
& ATA_QCFLAG_ACTIVE
))
1583 handled
|= ata_sff_host_intr(ap
, qc
);
1587 spin_unlock_irqrestore(&host
->lock
, flags
);
1589 return IRQ_RETVAL(handled
);
1593 * ata_sff_freeze - Freeze SFF controller port
1594 * @ap: port to freeze
1596 * Freeze BMDMA controller port.
1599 * Inherited from caller.
1601 void ata_sff_freeze(struct ata_port
*ap
)
1603 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1605 ap
->ctl
|= ATA_NIEN
;
1606 ap
->last_ctl
= ap
->ctl
;
1608 if (ioaddr
->ctl_addr
)
1609 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1611 /* Under certain circumstances, some controllers raise IRQ on
1612 * ATA_NIEN manipulation. Also, many controllers fail to mask
1613 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1615 ap
->ops
->sff_check_status(ap
);
1617 ap
->ops
->sff_irq_clear(ap
);
1621 * ata_sff_thaw - Thaw SFF controller port
1624 * Thaw SFF controller port.
1627 * Inherited from caller.
1629 void ata_sff_thaw(struct ata_port
*ap
)
1631 /* clear & re-enable interrupts */
1632 ap
->ops
->sff_check_status(ap
);
1633 ap
->ops
->sff_irq_clear(ap
);
1634 ap
->ops
->sff_irq_on(ap
);
1638 * ata_sff_prereset - prepare SFF link for reset
1639 * @link: SFF link to be reset
1640 * @deadline: deadline jiffies for the operation
1642 * SFF link @link is about to be reset. Initialize it. It first
1643 * calls ata_std_prereset() and wait for !BSY if the port is
1647 * Kernel thread context (may sleep)
1650 * 0 on success, -errno otherwise.
1652 int ata_sff_prereset(struct ata_link
*link
, unsigned long deadline
)
1654 struct ata_eh_context
*ehc
= &link
->eh_context
;
1657 rc
= ata_std_prereset(link
, deadline
);
1661 /* if we're about to do hardreset, nothing more to do */
1662 if (ehc
->i
.action
& ATA_EH_HARDRESET
)
1665 /* wait for !BSY if we don't know that no device is attached */
1666 if (!ata_link_offline(link
)) {
1667 rc
= ata_sff_wait_ready(link
, deadline
);
1668 if (rc
&& rc
!= -ENODEV
) {
1669 ata_link_printk(link
, KERN_WARNING
, "device not ready "
1670 "(errno=%d), forcing hardreset\n", rc
);
1671 ehc
->i
.action
|= ATA_EH_HARDRESET
;
1679 * ata_devchk - PATA device presence detection
1680 * @ap: ATA channel to examine
1681 * @device: Device to examine (starting at zero)
1683 * This technique was originally described in
1684 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1685 * later found its way into the ATA/ATAPI spec.
1687 * Write a pattern to the ATA shadow registers,
1688 * and if a device is present, it will respond by
1689 * correctly storing and echoing back the
1690 * ATA shadow register contents.
1695 static unsigned int ata_devchk(struct ata_port
*ap
, unsigned int device
)
1697 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1700 ap
->ops
->sff_dev_select(ap
, device
);
1702 iowrite8(0x55, ioaddr
->nsect_addr
);
1703 iowrite8(0xaa, ioaddr
->lbal_addr
);
1705 iowrite8(0xaa, ioaddr
->nsect_addr
);
1706 iowrite8(0x55, ioaddr
->lbal_addr
);
1708 iowrite8(0x55, ioaddr
->nsect_addr
);
1709 iowrite8(0xaa, ioaddr
->lbal_addr
);
1711 nsect
= ioread8(ioaddr
->nsect_addr
);
1712 lbal
= ioread8(ioaddr
->lbal_addr
);
1714 if ((nsect
== 0x55) && (lbal
== 0xaa))
1715 return 1; /* we found a device */
1717 return 0; /* nothing found */
1721 * ata_sff_dev_classify - Parse returned ATA device signature
1722 * @dev: ATA device to classify (starting at zero)
1723 * @present: device seems present
1724 * @r_err: Value of error register on completion
1726 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1727 * an ATA/ATAPI-defined set of values is placed in the ATA
1728 * shadow registers, indicating the results of device detection
1731 * Select the ATA device, and read the values from the ATA shadow
1732 * registers. Then parse according to the Error register value,
1733 * and the spec-defined values examined by ata_dev_classify().
1739 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1741 unsigned int ata_sff_dev_classify(struct ata_device
*dev
, int present
,
1744 struct ata_port
*ap
= dev
->link
->ap
;
1745 struct ata_taskfile tf
;
1749 ap
->ops
->sff_dev_select(ap
, dev
->devno
);
1751 memset(&tf
, 0, sizeof(tf
));
1753 ap
->ops
->sff_tf_read(ap
, &tf
);
1758 /* see if device passed diags: continue and warn later */
1760 /* diagnostic fail : do nothing _YET_ */
1761 dev
->horkage
|= ATA_HORKAGE_DIAGNOSTIC
;
1764 else if ((dev
->devno
== 0) && (err
== 0x81))
1767 return ATA_DEV_NONE
;
1769 /* determine if device is ATA or ATAPI */
1770 class = ata_dev_classify(&tf
);
1772 if (class == ATA_DEV_UNKNOWN
) {
1773 /* If the device failed diagnostic, it's likely to
1774 * have reported incorrect device signature too.
1775 * Assume ATA device if the device seems present but
1776 * device signature is invalid with diagnostic
1779 if (present
&& (dev
->horkage
& ATA_HORKAGE_DIAGNOSTIC
))
1780 class = ATA_DEV_ATA
;
1782 class = ATA_DEV_NONE
;
1783 } else if ((class == ATA_DEV_ATA
) &&
1784 (ap
->ops
->sff_check_status(ap
) == 0))
1785 class = ATA_DEV_NONE
;
1791 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1792 * @link: SFF link which is just reset
1793 * @devmask: mask of present devices
1794 * @deadline: deadline jiffies for the operation
1796 * Wait devices attached to SFF @link to become ready after
1797 * reset. It contains preceding 150ms wait to avoid accessing TF
1798 * status register too early.
1801 * Kernel thread context (may sleep).
1804 * 0 on success, -ENODEV if some or all of devices in @devmask
1805 * don't seem to exist. -errno on other errors.
1807 int ata_sff_wait_after_reset(struct ata_link
*link
, unsigned int devmask
,
1808 unsigned long deadline
)
1810 struct ata_port
*ap
= link
->ap
;
1811 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1812 unsigned int dev0
= devmask
& (1 << 0);
1813 unsigned int dev1
= devmask
& (1 << 1);
1816 msleep(ATA_WAIT_AFTER_RESET_MSECS
);
1818 /* always check readiness of the master device */
1819 rc
= ata_sff_wait_ready(link
, deadline
);
1820 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
1821 * and TF status is 0xff, bail out on it too.
1826 /* if device 1 was found in ata_devchk, wait for register
1827 * access briefly, then wait for BSY to clear.
1832 ap
->ops
->sff_dev_select(ap
, 1);
1834 /* Wait for register access. Some ATAPI devices fail
1835 * to set nsect/lbal after reset, so don't waste too
1836 * much time on it. We're gonna wait for !BSY anyway.
1838 for (i
= 0; i
< 2; i
++) {
1841 nsect
= ioread8(ioaddr
->nsect_addr
);
1842 lbal
= ioread8(ioaddr
->lbal_addr
);
1843 if ((nsect
== 1) && (lbal
== 1))
1845 msleep(50); /* give drive a breather */
1848 rc
= ata_sff_wait_ready(link
, deadline
);
1856 /* is all this really necessary? */
1857 ap
->ops
->sff_dev_select(ap
, 0);
1859 ap
->ops
->sff_dev_select(ap
, 1);
1861 ap
->ops
->sff_dev_select(ap
, 0);
1866 static int ata_bus_softreset(struct ata_port
*ap
, unsigned int devmask
,
1867 unsigned long deadline
)
1869 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1871 DPRINTK("ata%u: bus reset via SRST\n", ap
->print_id
);
1873 /* software reset. causes dev0 to be selected */
1874 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1875 udelay(20); /* FIXME: flush */
1876 iowrite8(ap
->ctl
| ATA_SRST
, ioaddr
->ctl_addr
);
1877 udelay(20); /* FIXME: flush */
1878 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1880 /* wait the port to become ready */
1881 return ata_sff_wait_after_reset(&ap
->link
, devmask
, deadline
);
1885 * ata_sff_softreset - reset host port via ATA SRST
1886 * @link: ATA link to reset
1887 * @classes: resulting classes of attached devices
1888 * @deadline: deadline jiffies for the operation
1890 * Reset host port using ATA SRST.
1893 * Kernel thread context (may sleep)
1896 * 0 on success, -errno otherwise.
1898 int ata_sff_softreset(struct ata_link
*link
, unsigned int *classes
,
1899 unsigned long deadline
)
1901 struct ata_port
*ap
= link
->ap
;
1902 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
1903 unsigned int devmask
= 0;
1909 if (ata_link_offline(link
)) {
1910 classes
[0] = ATA_DEV_NONE
;
1914 /* determine if device 0/1 are present */
1915 if (ata_devchk(ap
, 0))
1916 devmask
|= (1 << 0);
1917 if (slave_possible
&& ata_devchk(ap
, 1))
1918 devmask
|= (1 << 1);
1920 /* select device 0 again */
1921 ap
->ops
->sff_dev_select(ap
, 0);
1923 /* issue bus reset */
1924 DPRINTK("about to softreset, devmask=%x\n", devmask
);
1925 rc
= ata_bus_softreset(ap
, devmask
, deadline
);
1926 /* if link is occupied, -ENODEV too is an error */
1927 if (rc
&& (rc
!= -ENODEV
|| sata_scr_valid(link
))) {
1928 ata_link_printk(link
, KERN_ERR
, "SRST failed (errno=%d)\n", rc
);
1932 /* determine by signature whether we have ATA or ATAPI devices */
1933 classes
[0] = ata_sff_dev_classify(&link
->device
[0],
1934 devmask
& (1 << 0), &err
);
1935 if (slave_possible
&& err
!= 0x81)
1936 classes
[1] = ata_sff_dev_classify(&link
->device
[1],
1937 devmask
& (1 << 1), &err
);
1940 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes
[0], classes
[1]);
1945 * sata_sff_hardreset - reset host port via SATA phy reset
1946 * @link: link to reset
1947 * @class: resulting class of attached device
1948 * @deadline: deadline jiffies for the operation
1950 * SATA phy-reset host port using DET bits of SControl register,
1951 * wait for !BSY and classify the attached device.
1954 * Kernel thread context (may sleep)
1957 * 0 on success, -errno otherwise.
1959 int sata_sff_hardreset(struct ata_link
*link
, unsigned int *class,
1960 unsigned long deadline
)
1962 struct ata_port
*ap
= link
->ap
;
1963 const unsigned long *timing
= sata_ehc_deb_timing(&link
->eh_context
);
1969 rc
= sata_link_hardreset(link
, timing
, deadline
);
1971 ata_link_printk(link
, KERN_ERR
,
1972 "COMRESET failed (errno=%d)\n", rc
);
1976 /* TODO: phy layer with polling, timeouts, etc. */
1977 if (ata_link_offline(link
)) {
1978 *class = ATA_DEV_NONE
;
1979 DPRINTK("EXIT, link offline\n");
1983 /* If PMP is supported, we have to do follow-up SRST. Note
1984 * that some PMPs don't send D2H Reg FIS after hardreset at
1985 * all if the first port is empty. Wait for it just for a
1986 * second and request follow-up SRST.
1988 if (ap
->flags
& ATA_FLAG_PMP
) {
1989 ata_sff_wait_after_reset(link
, 1, jiffies
+ HZ
);
1993 /* wait for the link to become online */
1994 rc
= ata_sff_wait_after_reset(link
, 1, deadline
);
1995 /* link occupied, -ENODEV too is an error */
1997 ata_link_printk(link
, KERN_ERR
,
1998 "COMRESET failed (errno=%d)\n", rc
);
2002 *class = ata_sff_dev_classify(link
->device
, 1, NULL
);
2004 DPRINTK("EXIT, class=%u\n", *class);
2009 * ata_sff_postreset - SFF postreset callback
2010 * @link: the target SFF ata_link
2011 * @classes: classes of attached devices
2013 * This function is invoked after a successful reset. It first
2014 * calls ata_std_postreset() and performs SFF specific postreset
2018 * Kernel thread context (may sleep)
2020 void ata_sff_postreset(struct ata_link
*link
, unsigned int *classes
)
2022 struct ata_port
*ap
= link
->ap
;
2024 ata_std_postreset(link
, classes
);
2026 /* is double-select really necessary? */
2027 if (classes
[0] != ATA_DEV_NONE
)
2028 ap
->ops
->sff_dev_select(ap
, 1);
2029 if (classes
[1] != ATA_DEV_NONE
)
2030 ap
->ops
->sff_dev_select(ap
, 0);
2032 /* bail out if no device is present */
2033 if (classes
[0] == ATA_DEV_NONE
&& classes
[1] == ATA_DEV_NONE
) {
2034 DPRINTK("EXIT, no device\n");
2038 /* set up device control */
2039 if (ap
->ioaddr
.ctl_addr
)
2040 iowrite8(ap
->ctl
, ap
->ioaddr
.ctl_addr
);
2044 * ata_sff_error_handler - Stock error handler for BMDMA controller
2045 * @ap: port to handle error for
2047 * Stock error handler for SFF controller. It can handle both
2048 * PATA and SATA controllers. Many controllers should be able to
2049 * use this EH as-is or with some added handling before and
2053 * Kernel thread context (may sleep)
2055 void ata_sff_error_handler(struct ata_port
*ap
)
2057 ata_reset_fn_t softreset
= ap
->ops
->softreset
;
2058 ata_reset_fn_t hardreset
= ap
->ops
->hardreset
;
2059 struct ata_queued_cmd
*qc
;
2060 unsigned long flags
;
2063 qc
= __ata_qc_from_tag(ap
, ap
->link
.active_tag
);
2064 if (qc
&& !(qc
->flags
& ATA_QCFLAG_FAILED
))
2067 /* reset PIO HSM and stop DMA engine */
2068 spin_lock_irqsave(ap
->lock
, flags
);
2070 ap
->hsm_task_state
= HSM_ST_IDLE
;
2072 if (ap
->ioaddr
.bmdma_addr
&&
2073 qc
&& (qc
->tf
.protocol
== ATA_PROT_DMA
||
2074 qc
->tf
.protocol
== ATAPI_PROT_DMA
)) {
2077 host_stat
= ap
->ops
->bmdma_status(ap
);
2079 /* BMDMA controllers indicate host bus error by
2080 * setting DMA_ERR bit and timing out. As it wasn't
2081 * really a timeout event, adjust error mask and
2082 * cancel frozen state.
2084 if (qc
->err_mask
== AC_ERR_TIMEOUT
&& (host_stat
& ATA_DMA_ERR
)) {
2085 qc
->err_mask
= AC_ERR_HOST_BUS
;
2089 ap
->ops
->bmdma_stop(qc
);
2092 ata_sff_altstatus(ap
);
2093 ap
->ops
->sff_check_status(ap
);
2094 ap
->ops
->sff_irq_clear(ap
);
2096 spin_unlock_irqrestore(ap
->lock
, flags
);
2099 ata_eh_thaw_port(ap
);
2101 /* PIO and DMA engines have been stopped, perform recovery */
2103 /* ata_sff_softreset and sata_sff_hardreset are inherited to
2104 * all SFF drivers from ata_sff_port_ops. Ignore softreset if
2105 * ctl isn't accessible. Ignore hardreset if SCR access isn't
2108 if (softreset
== ata_sff_softreset
&& !ap
->ioaddr
.ctl_addr
)
2110 if (hardreset
== sata_sff_hardreset
&& !sata_scr_valid(&ap
->link
))
2113 ata_do_eh(ap
, ap
->ops
->prereset
, softreset
, hardreset
,
2114 ap
->ops
->postreset
);
2118 * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
2119 * @qc: internal command to clean up
2122 * Kernel thread context (may sleep)
2124 void ata_sff_post_internal_cmd(struct ata_queued_cmd
*qc
)
2126 if (qc
->ap
->ioaddr
.bmdma_addr
)
2131 * ata_sff_port_start - Set port up for dma.
2132 * @ap: Port to initialize
2134 * Called just after data structures for each port are
2135 * initialized. Allocates space for PRD table if the device
2136 * is DMA capable SFF.
2138 * May be used as the port_start() entry in ata_port_operations.
2141 * Inherited from caller.
2143 int ata_sff_port_start(struct ata_port
*ap
)
2145 if (ap
->ioaddr
.bmdma_addr
)
2146 return ata_port_start(ap
);
2151 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
2152 * @ioaddr: IO address structure to be initialized
2154 * Utility function which initializes data_addr, error_addr,
2155 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2156 * device_addr, status_addr, and command_addr to standard offsets
2157 * relative to cmd_addr.
2159 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2161 void ata_sff_std_ports(struct ata_ioports
*ioaddr
)
2163 ioaddr
->data_addr
= ioaddr
->cmd_addr
+ ATA_REG_DATA
;
2164 ioaddr
->error_addr
= ioaddr
->cmd_addr
+ ATA_REG_ERR
;
2165 ioaddr
->feature_addr
= ioaddr
->cmd_addr
+ ATA_REG_FEATURE
;
2166 ioaddr
->nsect_addr
= ioaddr
->cmd_addr
+ ATA_REG_NSECT
;
2167 ioaddr
->lbal_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAL
;
2168 ioaddr
->lbam_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAM
;
2169 ioaddr
->lbah_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAH
;
2170 ioaddr
->device_addr
= ioaddr
->cmd_addr
+ ATA_REG_DEVICE
;
2171 ioaddr
->status_addr
= ioaddr
->cmd_addr
+ ATA_REG_STATUS
;
2172 ioaddr
->command_addr
= ioaddr
->cmd_addr
+ ATA_REG_CMD
;
2175 unsigned long ata_bmdma_mode_filter(struct ata_device
*adev
,
2176 unsigned long xfer_mask
)
2178 /* Filter out DMA modes if the device has been configured by
2179 the BIOS as PIO only */
2181 if (adev
->link
->ap
->ioaddr
.bmdma_addr
== NULL
)
2182 xfer_mask
&= ~(ATA_MASK_MWDMA
| ATA_MASK_UDMA
);
2187 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2188 * @qc: Info associated with this ATA transaction.
2191 * spin_lock_irqsave(host lock)
2193 void ata_bmdma_setup(struct ata_queued_cmd
*qc
)
2195 struct ata_port
*ap
= qc
->ap
;
2196 unsigned int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
2199 /* load PRD table addr. */
2200 mb(); /* make sure PRD table writes are visible to controller */
2201 iowrite32(ap
->prd_dma
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_TABLE_OFS
);
2203 /* specify data direction, triple-check start bit is clear */
2204 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2205 dmactl
&= ~(ATA_DMA_WR
| ATA_DMA_START
);
2207 dmactl
|= ATA_DMA_WR
;
2208 iowrite8(dmactl
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2210 /* issue r/w command */
2211 ap
->ops
->sff_exec_command(ap
, &qc
->tf
);
2215 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2216 * @qc: Info associated with this ATA transaction.
2219 * spin_lock_irqsave(host lock)
2221 void ata_bmdma_start(struct ata_queued_cmd
*qc
)
2223 struct ata_port
*ap
= qc
->ap
;
2226 /* start host DMA transaction */
2227 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2228 iowrite8(dmactl
| ATA_DMA_START
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2230 /* Strictly, one may wish to issue an ioread8() here, to
2231 * flush the mmio write. However, control also passes
2232 * to the hardware at this point, and it will interrupt
2233 * us when we are to resume control. So, in effect,
2234 * we don't care when the mmio write flushes.
2235 * Further, a read of the DMA status register _immediately_
2236 * following the write may not be what certain flaky hardware
2237 * is expected, so I think it is best to not add a readb()
2238 * without first all the MMIO ATA cards/mobos.
2239 * Or maybe I'm just being paranoid.
2241 * FIXME: The posting of this write means I/O starts are
2242 * unneccessarily delayed for MMIO
2247 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2248 * @qc: Command we are ending DMA for
2250 * Clears the ATA_DMA_START flag in the dma control register
2252 * May be used as the bmdma_stop() entry in ata_port_operations.
2255 * spin_lock_irqsave(host lock)
2257 void ata_bmdma_stop(struct ata_queued_cmd
*qc
)
2259 struct ata_port
*ap
= qc
->ap
;
2260 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
2262 /* clear start/stop bit */
2263 iowrite8(ioread8(mmio
+ ATA_DMA_CMD
) & ~ATA_DMA_START
,
2264 mmio
+ ATA_DMA_CMD
);
2266 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
2267 ata_sff_altstatus(ap
); /* dummy read */
2271 * ata_bmdma_status - Read PCI IDE BMDMA status
2272 * @ap: Port associated with this ATA transaction.
2274 * Read and return BMDMA status register.
2276 * May be used as the bmdma_status() entry in ata_port_operations.
2279 * spin_lock_irqsave(host lock)
2281 u8
ata_bmdma_status(struct ata_port
*ap
)
2283 return ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
2287 * ata_bus_reset - reset host port and associated ATA channel
2288 * @ap: port to reset
2290 * This is typically the first time we actually start issuing
2291 * commands to the ATA channel. We wait for BSY to clear, then
2292 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2293 * result. Determine what devices, if any, are on the channel
2294 * by looking at the device 0/1 error register. Look at the signature
2295 * stored in each device's taskfile registers, to determine if
2296 * the device is ATA or ATAPI.
2299 * PCI/etc. bus probe sem.
2300 * Obtains host lock.
2303 * Sets ATA_FLAG_DISABLED if bus reset fails.
2306 * This function is only for drivers which still use old EH and
2307 * will be removed soon.
2309 void ata_bus_reset(struct ata_port
*ap
)
2311 struct ata_device
*device
= ap
->link
.device
;
2312 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2313 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
2315 unsigned int dev0
, dev1
= 0, devmask
= 0;
2318 DPRINTK("ENTER, host %u, port %u\n", ap
->print_id
, ap
->port_no
);
2320 /* determine if device 0/1 are present */
2321 if (ap
->flags
& ATA_FLAG_SATA_RESET
)
2324 dev0
= ata_devchk(ap
, 0);
2326 dev1
= ata_devchk(ap
, 1);
2330 devmask
|= (1 << 0);
2332 devmask
|= (1 << 1);
2334 /* select device 0 again */
2335 ap
->ops
->sff_dev_select(ap
, 0);
2337 /* issue bus reset */
2338 if (ap
->flags
& ATA_FLAG_SRST
) {
2339 rc
= ata_bus_softreset(ap
, devmask
, jiffies
+ 40 * HZ
);
2340 if (rc
&& rc
!= -ENODEV
)
2345 * determine by signature whether we have ATA or ATAPI devices
2347 device
[0].class = ata_sff_dev_classify(&device
[0], dev0
, &err
);
2348 if ((slave_possible
) && (err
!= 0x81))
2349 device
[1].class = ata_sff_dev_classify(&device
[1], dev1
, &err
);
2351 /* is double-select really necessary? */
2352 if (device
[1].class != ATA_DEV_NONE
)
2353 ap
->ops
->sff_dev_select(ap
, 1);
2354 if (device
[0].class != ATA_DEV_NONE
)
2355 ap
->ops
->sff_dev_select(ap
, 0);
2357 /* if no devices were detected, disable this port */
2358 if ((device
[0].class == ATA_DEV_NONE
) &&
2359 (device
[1].class == ATA_DEV_NONE
))
2362 if (ap
->flags
& (ATA_FLAG_SATA_RESET
| ATA_FLAG_SRST
)) {
2363 /* set up device control for ATA_FLAG_SATA_RESET */
2364 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2371 ata_port_printk(ap
, KERN_ERR
, "disabling port\n");
2372 ata_port_disable(ap
);
2380 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
2383 * Some PCI ATA devices report simplex mode but in fact can be told to
2384 * enter non simplex mode. This implements the necessary logic to
2385 * perform the task on such devices. Calling it on other devices will
2386 * have -undefined- behaviour.
2388 int ata_pci_bmdma_clear_simplex(struct pci_dev
*pdev
)
2390 unsigned long bmdma
= pci_resource_start(pdev
, 4);
2396 simplex
= inb(bmdma
+ 0x02);
2397 outb(simplex
& 0x60, bmdma
+ 0x02);
2398 simplex
= inb(bmdma
+ 0x02);
2405 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
2406 * @host: target ATA host
2408 * Acquire PCI BMDMA resources and initialize @host accordingly.
2411 * Inherited from calling layer (may sleep).
2414 * 0 on success, -errno otherwise.
2416 int ata_pci_bmdma_init(struct ata_host
*host
)
2418 struct device
*gdev
= host
->dev
;
2419 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2422 /* No BAR4 allocation: No DMA */
2423 if (pci_resource_start(pdev
, 4) == 0)
2426 /* TODO: If we get no DMA mask we should fall back to PIO */
2427 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
2430 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
2434 /* request and iomap DMA region */
2435 rc
= pcim_iomap_regions(pdev
, 1 << 4, dev_driver_string(gdev
));
2437 dev_printk(KERN_ERR
, gdev
, "failed to request/iomap BAR4\n");
2440 host
->iomap
= pcim_iomap_table(pdev
);
2442 for (i
= 0; i
< 2; i
++) {
2443 struct ata_port
*ap
= host
->ports
[i
];
2444 void __iomem
*bmdma
= host
->iomap
[4] + 8 * i
;
2446 if (ata_port_is_dummy(ap
))
2449 ap
->ioaddr
.bmdma_addr
= bmdma
;
2450 if ((!(ap
->flags
& ATA_FLAG_IGN_SIMPLEX
)) &&
2451 (ioread8(bmdma
+ 2) & 0x80))
2452 host
->flags
|= ATA_HOST_SIMPLEX
;
2454 ata_port_desc(ap
, "bmdma 0x%llx",
2455 (unsigned long long)pci_resource_start(pdev
, 4) + 8 * i
);
2461 static int ata_resources_present(struct pci_dev
*pdev
, int port
)
2465 /* Check the PCI resources for this channel are enabled */
2467 for (i
= 0; i
< 2; i
++) {
2468 if (pci_resource_start(pdev
, port
+ i
) == 0 ||
2469 pci_resource_len(pdev
, port
+ i
) == 0)
2476 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
2477 * @host: target ATA host
2479 * Acquire native PCI ATA resources for @host and initialize the
2480 * first two ports of @host accordingly. Ports marked dummy are
2481 * skipped and allocation failure makes the port dummy.
2483 * Note that native PCI resources are valid even for legacy hosts
2484 * as we fix up pdev resources array early in boot, so this
2485 * function can be used for both native and legacy SFF hosts.
2488 * Inherited from calling layer (may sleep).
2491 * 0 if at least one port is initialized, -ENODEV if no port is
2494 int ata_pci_sff_init_host(struct ata_host
*host
)
2496 struct device
*gdev
= host
->dev
;
2497 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2498 unsigned int mask
= 0;
2501 /* request, iomap BARs and init port addresses accordingly */
2502 for (i
= 0; i
< 2; i
++) {
2503 struct ata_port
*ap
= host
->ports
[i
];
2505 void __iomem
* const *iomap
;
2507 if (ata_port_is_dummy(ap
))
2510 /* Discard disabled ports. Some controllers show
2511 * their unused channels this way. Disabled ports are
2514 if (!ata_resources_present(pdev
, i
)) {
2515 ap
->ops
= &ata_dummy_port_ops
;
2519 rc
= pcim_iomap_regions(pdev
, 0x3 << base
,
2520 dev_driver_string(gdev
));
2522 dev_printk(KERN_WARNING
, gdev
,
2523 "failed to request/iomap BARs for port %d "
2524 "(errno=%d)\n", i
, rc
);
2526 pcim_pin_device(pdev
);
2527 ap
->ops
= &ata_dummy_port_ops
;
2530 host
->iomap
= iomap
= pcim_iomap_table(pdev
);
2532 ap
->ioaddr
.cmd_addr
= iomap
[base
];
2533 ap
->ioaddr
.altstatus_addr
=
2534 ap
->ioaddr
.ctl_addr
= (void __iomem
*)
2535 ((unsigned long)iomap
[base
+ 1] | ATA_PCI_CTL_OFS
);
2536 ata_sff_std_ports(&ap
->ioaddr
);
2538 ata_port_desc(ap
, "cmd 0x%llx ctl 0x%llx",
2539 (unsigned long long)pci_resource_start(pdev
, base
),
2540 (unsigned long long)pci_resource_start(pdev
, base
+ 1));
2546 dev_printk(KERN_ERR
, gdev
, "no available native port\n");
2554 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
2555 * @pdev: target PCI device
2556 * @ppi: array of port_info, must be enough for two ports
2557 * @r_host: out argument for the initialized ATA host
2559 * Helper to allocate ATA host for @pdev, acquire all native PCI
2560 * resources and initialize it accordingly in one go.
2563 * Inherited from calling layer (may sleep).
2566 * 0 on success, -errno otherwise.
2568 int ata_pci_sff_prepare_host(struct pci_dev
*pdev
,
2569 const struct ata_port_info
* const * ppi
,
2570 struct ata_host
**r_host
)
2572 struct ata_host
*host
;
2575 if (!devres_open_group(&pdev
->dev
, NULL
, GFP_KERNEL
))
2578 host
= ata_host_alloc_pinfo(&pdev
->dev
, ppi
, 2);
2580 dev_printk(KERN_ERR
, &pdev
->dev
,
2581 "failed to allocate ATA host\n");
2586 rc
= ata_pci_sff_init_host(host
);
2590 /* init DMA related stuff */
2591 rc
= ata_pci_bmdma_init(host
);
2595 devres_remove_group(&pdev
->dev
, NULL
);
2600 /* This is necessary because PCI and iomap resources are
2601 * merged and releasing the top group won't release the
2602 * acquired resources if some of those have been acquired
2603 * before entering this function.
2605 pcim_iounmap_regions(pdev
, 0xf);
2607 devres_release_group(&pdev
->dev
, NULL
);
2612 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
2613 * @host: target SFF ATA host
2614 * @irq_handler: irq_handler used when requesting IRQ(s)
2615 * @sht: scsi_host_template to use when registering the host
2617 * This is the counterpart of ata_host_activate() for SFF ATA
2618 * hosts. This separate helper is necessary because SFF hosts
2619 * use two separate interrupts in legacy mode.
2622 * Inherited from calling layer (may sleep).
2625 * 0 on success, -errno otherwise.
2627 int ata_pci_sff_activate_host(struct ata_host
*host
,
2628 irq_handler_t irq_handler
,
2629 struct scsi_host_template
*sht
)
2631 struct device
*dev
= host
->dev
;
2632 struct pci_dev
*pdev
= to_pci_dev(dev
);
2633 const char *drv_name
= dev_driver_string(host
->dev
);
2634 int legacy_mode
= 0, rc
;
2636 rc
= ata_host_start(host
);
2640 if ((pdev
->class >> 8) == PCI_CLASS_STORAGE_IDE
) {
2643 /* TODO: What if one channel is in native mode ... */
2644 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, &tmp8
);
2645 mask
= (1 << 2) | (1 << 0);
2646 if ((tmp8
& mask
) != mask
)
2648 #if defined(CONFIG_NO_ATA_LEGACY)
2649 /* Some platforms with PCI limits cannot address compat
2650 port space. In that case we punt if their firmware has
2651 left a device in compatibility mode */
2653 printk(KERN_ERR
"ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
2659 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
2662 if (!legacy_mode
&& pdev
->irq
) {
2663 rc
= devm_request_irq(dev
, pdev
->irq
, irq_handler
,
2664 IRQF_SHARED
, drv_name
, host
);
2668 ata_port_desc(host
->ports
[0], "irq %d", pdev
->irq
);
2669 ata_port_desc(host
->ports
[1], "irq %d", pdev
->irq
);
2670 } else if (legacy_mode
) {
2671 if (!ata_port_is_dummy(host
->ports
[0])) {
2672 rc
= devm_request_irq(dev
, ATA_PRIMARY_IRQ(pdev
),
2673 irq_handler
, IRQF_SHARED
,
2678 ata_port_desc(host
->ports
[0], "irq %d",
2679 ATA_PRIMARY_IRQ(pdev
));
2682 if (!ata_port_is_dummy(host
->ports
[1])) {
2683 rc
= devm_request_irq(dev
, ATA_SECONDARY_IRQ(pdev
),
2684 irq_handler
, IRQF_SHARED
,
2689 ata_port_desc(host
->ports
[1], "irq %d",
2690 ATA_SECONDARY_IRQ(pdev
));
2694 rc
= ata_host_register(host
, sht
);
2697 devres_remove_group(dev
, NULL
);
2699 devres_release_group(dev
, NULL
);
2705 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
2706 * @pdev: Controller to be initialized
2707 * @ppi: array of port_info, must be enough for two ports
2708 * @sht: scsi_host_template to use when registering the host
2709 * @host_priv: host private_data
2711 * This is a helper function which can be called from a driver's
2712 * xxx_init_one() probe function if the hardware uses traditional
2713 * IDE taskfile registers.
2715 * This function calls pci_enable_device(), reserves its register
2716 * regions, sets the dma mask, enables bus master mode, and calls
2720 * Nobody makes a single channel controller that appears solely as
2721 * the secondary legacy port on PCI.
2724 * Inherited from PCI layer (may sleep).
2727 * Zero on success, negative on errno-based value on error.
2729 int ata_pci_sff_init_one(struct pci_dev
*pdev
,
2730 const struct ata_port_info
* const * ppi
,
2731 struct scsi_host_template
*sht
, void *host_priv
)
2733 struct device
*dev
= &pdev
->dev
;
2734 const struct ata_port_info
*pi
= NULL
;
2735 struct ata_host
*host
= NULL
;
2740 /* look up the first valid port_info */
2741 for (i
= 0; i
< 2 && ppi
[i
]; i
++) {
2742 if (ppi
[i
]->port_ops
!= &ata_dummy_port_ops
) {
2749 dev_printk(KERN_ERR
, &pdev
->dev
,
2750 "no valid port_info specified\n");
2754 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
2757 rc
= pcim_enable_device(pdev
);
2761 /* prepare and activate SFF host */
2762 rc
= ata_pci_sff_prepare_host(pdev
, ppi
, &host
);
2765 host
->private_data
= host_priv
;
2767 pci_set_master(pdev
);
2768 rc
= ata_pci_sff_activate_host(host
, ata_sff_interrupt
, sht
);
2771 devres_remove_group(&pdev
->dev
, NULL
);
2773 devres_release_group(&pdev
->dev
, NULL
);
2778 #endif /* CONFIG_PCI */
2780 EXPORT_SYMBOL_GPL(ata_sff_port_ops
);
2781 EXPORT_SYMBOL_GPL(ata_bmdma_port_ops
);
2782 EXPORT_SYMBOL_GPL(ata_sff_qc_prep
);
2783 EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep
);
2784 EXPORT_SYMBOL_GPL(ata_sff_dev_select
);
2785 EXPORT_SYMBOL_GPL(ata_sff_check_status
);
2786 EXPORT_SYMBOL_GPL(ata_sff_altstatus
);
2787 EXPORT_SYMBOL_GPL(ata_sff_busy_sleep
);
2788 EXPORT_SYMBOL_GPL(ata_sff_wait_ready
);
2789 EXPORT_SYMBOL_GPL(ata_sff_tf_load
);
2790 EXPORT_SYMBOL_GPL(ata_sff_tf_read
);
2791 EXPORT_SYMBOL_GPL(ata_sff_exec_command
);
2792 EXPORT_SYMBOL_GPL(ata_sff_data_xfer
);
2793 EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq
);
2794 EXPORT_SYMBOL_GPL(ata_sff_irq_on
);
2795 EXPORT_SYMBOL_GPL(ata_sff_irq_clear
);
2796 EXPORT_SYMBOL_GPL(ata_sff_hsm_move
);
2797 EXPORT_SYMBOL_GPL(ata_sff_qc_issue
);
2798 EXPORT_SYMBOL_GPL(ata_sff_host_intr
);
2799 EXPORT_SYMBOL_GPL(ata_sff_interrupt
);
2800 EXPORT_SYMBOL_GPL(ata_sff_freeze
);
2801 EXPORT_SYMBOL_GPL(ata_sff_thaw
);
2802 EXPORT_SYMBOL_GPL(ata_sff_prereset
);
2803 EXPORT_SYMBOL_GPL(ata_sff_dev_classify
);
2804 EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset
);
2805 EXPORT_SYMBOL_GPL(ata_sff_softreset
);
2806 EXPORT_SYMBOL_GPL(sata_sff_hardreset
);
2807 EXPORT_SYMBOL_GPL(ata_sff_postreset
);
2808 EXPORT_SYMBOL_GPL(ata_sff_error_handler
);
2809 EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd
);
2810 EXPORT_SYMBOL_GPL(ata_sff_port_start
);
2811 EXPORT_SYMBOL_GPL(ata_sff_std_ports
);
2812 EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter
);
2813 EXPORT_SYMBOL_GPL(ata_bmdma_setup
);
2814 EXPORT_SYMBOL_GPL(ata_bmdma_start
);
2815 EXPORT_SYMBOL_GPL(ata_bmdma_stop
);
2816 EXPORT_SYMBOL_GPL(ata_bmdma_status
);
2817 EXPORT_SYMBOL_GPL(ata_bus_reset
);
2819 EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex
);
2820 EXPORT_SYMBOL_GPL(ata_pci_bmdma_init
);
2821 EXPORT_SYMBOL_GPL(ata_pci_sff_init_host
);
2822 EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host
);
2823 EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host
);
2824 EXPORT_SYMBOL_GPL(ata_pci_sff_init_one
);
2825 #endif /* CONFIG_PCI */