2 * libata-sff.c - helper library for PCI IDE BMDMA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/pci.h>
37 #include <linux/libata.h>
38 #include <linux/highmem.h>
42 const struct ata_port_operations ata_sff_port_ops
= {
43 .inherits
= &ata_base_port_ops
,
45 .qc_prep
= ata_sff_qc_prep
,
46 .qc_issue
= ata_sff_qc_issue
,
47 .qc_fill_rtf
= ata_sff_qc_fill_rtf
,
49 .freeze
= ata_sff_freeze
,
51 .prereset
= ata_sff_prereset
,
52 .softreset
= ata_sff_softreset
,
53 .hardreset
= sata_sff_hardreset
,
54 .postreset
= ata_sff_postreset
,
55 .drain_fifo
= ata_sff_drain_fifo
,
56 .error_handler
= ata_sff_error_handler
,
57 .post_internal_cmd
= ata_sff_post_internal_cmd
,
59 .sff_dev_select
= ata_sff_dev_select
,
60 .sff_check_status
= ata_sff_check_status
,
61 .sff_tf_load
= ata_sff_tf_load
,
62 .sff_tf_read
= ata_sff_tf_read
,
63 .sff_exec_command
= ata_sff_exec_command
,
64 .sff_data_xfer
= ata_sff_data_xfer
,
65 .sff_irq_on
= ata_sff_irq_on
,
66 .sff_irq_clear
= ata_sff_irq_clear
,
68 .lost_interrupt
= ata_sff_lost_interrupt
,
70 .port_start
= ata_sff_port_start
,
72 EXPORT_SYMBOL_GPL(ata_sff_port_ops
);
74 const struct ata_port_operations ata_bmdma_port_ops
= {
75 .inherits
= &ata_sff_port_ops
,
77 .mode_filter
= ata_bmdma_mode_filter
,
79 .bmdma_setup
= ata_bmdma_setup
,
80 .bmdma_start
= ata_bmdma_start
,
81 .bmdma_stop
= ata_bmdma_stop
,
82 .bmdma_status
= ata_bmdma_status
,
84 EXPORT_SYMBOL_GPL(ata_bmdma_port_ops
);
86 const struct ata_port_operations ata_bmdma32_port_ops
= {
87 .inherits
= &ata_bmdma_port_ops
,
89 .sff_data_xfer
= ata_sff_data_xfer32
,
90 .port_start
= ata_sff_port_start32
,
92 EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops
);
95 * ata_fill_sg - Fill PCI IDE PRD table
96 * @qc: Metadata associated with taskfile to be transferred
98 * Fill PCI IDE PRD (scatter-gather) table with segments
99 * associated with the current disk command.
102 * spin_lock_irqsave(host lock)
105 static void ata_fill_sg(struct ata_queued_cmd
*qc
)
107 struct ata_port
*ap
= qc
->ap
;
108 struct scatterlist
*sg
;
112 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
116 /* determine if physical DMA addr spans 64K boundary.
117 * Note h/w doesn't support 64-bit, so we unconditionally
118 * truncate dma_addr_t to u32.
120 addr
= (u32
) sg_dma_address(sg
);
121 sg_len
= sg_dma_len(sg
);
124 offset
= addr
& 0xffff;
126 if ((offset
+ sg_len
) > 0x10000)
127 len
= 0x10000 - offset
;
129 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
130 ap
->prd
[pi
].flags_len
= cpu_to_le32(len
& 0xffff);
131 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
139 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
143 * ata_fill_sg_dumb - Fill PCI IDE PRD table
144 * @qc: Metadata associated with taskfile to be transferred
146 * Fill PCI IDE PRD (scatter-gather) table with segments
147 * associated with the current disk command. Perform the fill
148 * so that we avoid writing any length 64K records for
149 * controllers that don't follow the spec.
152 * spin_lock_irqsave(host lock)
155 static void ata_fill_sg_dumb(struct ata_queued_cmd
*qc
)
157 struct ata_port
*ap
= qc
->ap
;
158 struct scatterlist
*sg
;
162 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
164 u32 sg_len
, len
, blen
;
166 /* determine if physical DMA addr spans 64K boundary.
167 * Note h/w doesn't support 64-bit, so we unconditionally
168 * truncate dma_addr_t to u32.
170 addr
= (u32
) sg_dma_address(sg
);
171 sg_len
= sg_dma_len(sg
);
174 offset
= addr
& 0xffff;
176 if ((offset
+ sg_len
) > 0x10000)
177 len
= 0x10000 - offset
;
180 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
182 /* Some PATA chipsets like the CS5530 can't
183 cope with 0x0000 meaning 64K as the spec
185 ap
->prd
[pi
].flags_len
= cpu_to_le32(0x8000);
187 ap
->prd
[++pi
].addr
= cpu_to_le32(addr
+ 0x8000);
189 ap
->prd
[pi
].flags_len
= cpu_to_le32(blen
);
190 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
198 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
202 * ata_sff_qc_prep - Prepare taskfile for submission
203 * @qc: Metadata associated with taskfile to be prepared
205 * Prepare ATA taskfile for submission.
208 * spin_lock_irqsave(host lock)
210 void ata_sff_qc_prep(struct ata_queued_cmd
*qc
)
212 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
217 EXPORT_SYMBOL_GPL(ata_sff_qc_prep
);
220 * ata_sff_dumb_qc_prep - Prepare taskfile for submission
221 * @qc: Metadata associated with taskfile to be prepared
223 * Prepare ATA taskfile for submission.
226 * spin_lock_irqsave(host lock)
228 void ata_sff_dumb_qc_prep(struct ata_queued_cmd
*qc
)
230 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
233 ata_fill_sg_dumb(qc
);
235 EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep
);
238 * ata_sff_check_status - Read device status reg & clear interrupt
239 * @ap: port where the device is
241 * Reads ATA taskfile status register for currently-selected device
242 * and return its value. This also clears pending interrupts
246 * Inherited from caller.
248 u8
ata_sff_check_status(struct ata_port
*ap
)
250 return ioread8(ap
->ioaddr
.status_addr
);
252 EXPORT_SYMBOL_GPL(ata_sff_check_status
);
255 * ata_sff_altstatus - Read device alternate status reg
256 * @ap: port where the device is
258 * Reads ATA taskfile alternate status register for
259 * currently-selected device and return its value.
261 * Note: may NOT be used as the check_altstatus() entry in
262 * ata_port_operations.
265 * Inherited from caller.
267 static u8
ata_sff_altstatus(struct ata_port
*ap
)
269 if (ap
->ops
->sff_check_altstatus
)
270 return ap
->ops
->sff_check_altstatus(ap
);
272 return ioread8(ap
->ioaddr
.altstatus_addr
);
276 * ata_sff_irq_status - Check if the device is busy
277 * @ap: port where the device is
279 * Determine if the port is currently busy. Uses altstatus
280 * if available in order to avoid clearing shared IRQ status
281 * when finding an IRQ source. Non ctl capable devices don't
282 * share interrupt lines fortunately for us.
285 * Inherited from caller.
287 static u8
ata_sff_irq_status(struct ata_port
*ap
)
291 if (ap
->ops
->sff_check_altstatus
|| ap
->ioaddr
.altstatus_addr
) {
292 status
= ata_sff_altstatus(ap
);
293 /* Not us: We are busy */
294 if (status
& ATA_BUSY
)
297 /* Clear INTRQ latch */
298 status
= ap
->ops
->sff_check_status(ap
);
303 * ata_sff_sync - Flush writes
304 * @ap: Port to wait for.
307 * If we have an mmio device with no ctl and no altstatus
308 * method this will fail. No such devices are known to exist.
311 * Inherited from caller.
314 static void ata_sff_sync(struct ata_port
*ap
)
316 if (ap
->ops
->sff_check_altstatus
)
317 ap
->ops
->sff_check_altstatus(ap
);
318 else if (ap
->ioaddr
.altstatus_addr
)
319 ioread8(ap
->ioaddr
.altstatus_addr
);
323 * ata_sff_pause - Flush writes and wait 400nS
324 * @ap: Port to pause for.
327 * If we have an mmio device with no ctl and no altstatus
328 * method this will fail. No such devices are known to exist.
331 * Inherited from caller.
334 void ata_sff_pause(struct ata_port
*ap
)
339 EXPORT_SYMBOL_GPL(ata_sff_pause
);
342 * ata_sff_dma_pause - Pause before commencing DMA
343 * @ap: Port to pause for.
345 * Perform I/O fencing and ensure sufficient cycle delays occur
346 * for the HDMA1:0 transition
349 void ata_sff_dma_pause(struct ata_port
*ap
)
351 if (ap
->ops
->sff_check_altstatus
|| ap
->ioaddr
.altstatus_addr
) {
352 /* An altstatus read will cause the needed delay without
353 messing up the IRQ status */
354 ata_sff_altstatus(ap
);
357 /* There are no DMA controllers without ctl. BUG here to ensure
358 we never violate the HDMA1:0 transition timing and risk
362 EXPORT_SYMBOL_GPL(ata_sff_dma_pause
);
365 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
366 * @ap: port containing status register to be polled
367 * @tmout_pat: impatience timeout in msecs
368 * @tmout: overall timeout in msecs
370 * Sleep until ATA Status register bit BSY clears,
371 * or a timeout occurs.
374 * Kernel thread context (may sleep).
377 * 0 on success, -errno otherwise.
379 int ata_sff_busy_sleep(struct ata_port
*ap
,
380 unsigned long tmout_pat
, unsigned long tmout
)
382 unsigned long timer_start
, timeout
;
385 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 300);
386 timer_start
= jiffies
;
387 timeout
= ata_deadline(timer_start
, tmout_pat
);
388 while (status
!= 0xff && (status
& ATA_BUSY
) &&
389 time_before(jiffies
, timeout
)) {
391 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 3);
394 if (status
!= 0xff && (status
& ATA_BUSY
))
395 ata_port_printk(ap
, KERN_WARNING
,
396 "port is slow to respond, please be patient "
397 "(Status 0x%x)\n", status
);
399 timeout
= ata_deadline(timer_start
, tmout
);
400 while (status
!= 0xff && (status
& ATA_BUSY
) &&
401 time_before(jiffies
, timeout
)) {
403 status
= ap
->ops
->sff_check_status(ap
);
409 if (status
& ATA_BUSY
) {
410 ata_port_printk(ap
, KERN_ERR
, "port failed to respond "
411 "(%lu secs, Status 0x%x)\n",
412 DIV_ROUND_UP(tmout
, 1000), status
);
418 EXPORT_SYMBOL_GPL(ata_sff_busy_sleep
);
420 static int ata_sff_check_ready(struct ata_link
*link
)
422 u8 status
= link
->ap
->ops
->sff_check_status(link
->ap
);
424 return ata_check_ready(status
);
428 * ata_sff_wait_ready - sleep until BSY clears, or timeout
429 * @link: SFF link to wait ready status for
430 * @deadline: deadline jiffies for the operation
432 * Sleep until ATA Status register bit BSY clears, or timeout
436 * Kernel thread context (may sleep).
439 * 0 on success, -errno otherwise.
441 int ata_sff_wait_ready(struct ata_link
*link
, unsigned long deadline
)
443 return ata_wait_ready(link
, deadline
, ata_sff_check_ready
);
445 EXPORT_SYMBOL_GPL(ata_sff_wait_ready
);
448 * ata_sff_dev_select - Select device 0/1 on ATA bus
449 * @ap: ATA channel to manipulate
450 * @device: ATA device (numbered from zero) to select
452 * Use the method defined in the ATA specification to
453 * make either device 0, or device 1, active on the
454 * ATA channel. Works with both PIO and MMIO.
456 * May be used as the dev_select() entry in ata_port_operations.
461 void ata_sff_dev_select(struct ata_port
*ap
, unsigned int device
)
466 tmp
= ATA_DEVICE_OBS
;
468 tmp
= ATA_DEVICE_OBS
| ATA_DEV1
;
470 iowrite8(tmp
, ap
->ioaddr
.device_addr
);
471 ata_sff_pause(ap
); /* needed; also flushes, for mmio */
473 EXPORT_SYMBOL_GPL(ata_sff_dev_select
);
476 * ata_dev_select - Select device 0/1 on ATA bus
477 * @ap: ATA channel to manipulate
478 * @device: ATA device (numbered from zero) to select
479 * @wait: non-zero to wait for Status register BSY bit to clear
480 * @can_sleep: non-zero if context allows sleeping
482 * Use the method defined in the ATA specification to
483 * make either device 0, or device 1, active on the
486 * This is a high-level version of ata_sff_dev_select(), which
487 * additionally provides the services of inserting the proper
488 * pauses and status polling, where needed.
493 void ata_dev_select(struct ata_port
*ap
, unsigned int device
,
494 unsigned int wait
, unsigned int can_sleep
)
496 if (ata_msg_probe(ap
))
497 ata_port_printk(ap
, KERN_INFO
, "ata_dev_select: ENTER, "
498 "device %u, wait %u\n", device
, wait
);
503 ap
->ops
->sff_dev_select(ap
, device
);
506 if (can_sleep
&& ap
->link
.device
[device
].class == ATA_DEV_ATAPI
)
513 * ata_sff_irq_on - Enable interrupts on a port.
514 * @ap: Port on which interrupts are enabled.
516 * Enable interrupts on a legacy IDE device using MMIO or PIO,
517 * wait for idle, clear any pending interrupts.
520 * Inherited from caller.
522 u8
ata_sff_irq_on(struct ata_port
*ap
)
524 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
527 ap
->ctl
&= ~ATA_NIEN
;
528 ap
->last_ctl
= ap
->ctl
;
530 if (ioaddr
->ctl_addr
)
531 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
532 tmp
= ata_wait_idle(ap
);
534 ap
->ops
->sff_irq_clear(ap
);
538 EXPORT_SYMBOL_GPL(ata_sff_irq_on
);
541 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
542 * @ap: Port associated with this ATA transaction.
544 * Clear interrupt and error flags in DMA status register.
546 * May be used as the irq_clear() entry in ata_port_operations.
549 * spin_lock_irqsave(host lock)
551 void ata_sff_irq_clear(struct ata_port
*ap
)
553 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
558 iowrite8(ioread8(mmio
+ ATA_DMA_STATUS
), mmio
+ ATA_DMA_STATUS
);
560 EXPORT_SYMBOL_GPL(ata_sff_irq_clear
);
563 * ata_sff_tf_load - send taskfile registers to host controller
564 * @ap: Port to which output is sent
565 * @tf: ATA taskfile register set
567 * Outputs ATA taskfile to standard ATA host controller.
570 * Inherited from caller.
572 void ata_sff_tf_load(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
574 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
575 unsigned int is_addr
= tf
->flags
& ATA_TFLAG_ISADDR
;
577 if (tf
->ctl
!= ap
->last_ctl
) {
578 if (ioaddr
->ctl_addr
)
579 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
580 ap
->last_ctl
= tf
->ctl
;
584 if (is_addr
&& (tf
->flags
& ATA_TFLAG_LBA48
)) {
585 WARN_ON_ONCE(!ioaddr
->ctl_addr
);
586 iowrite8(tf
->hob_feature
, ioaddr
->feature_addr
);
587 iowrite8(tf
->hob_nsect
, ioaddr
->nsect_addr
);
588 iowrite8(tf
->hob_lbal
, ioaddr
->lbal_addr
);
589 iowrite8(tf
->hob_lbam
, ioaddr
->lbam_addr
);
590 iowrite8(tf
->hob_lbah
, ioaddr
->lbah_addr
);
591 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
600 iowrite8(tf
->feature
, ioaddr
->feature_addr
);
601 iowrite8(tf
->nsect
, ioaddr
->nsect_addr
);
602 iowrite8(tf
->lbal
, ioaddr
->lbal_addr
);
603 iowrite8(tf
->lbam
, ioaddr
->lbam_addr
);
604 iowrite8(tf
->lbah
, ioaddr
->lbah_addr
);
605 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
613 if (tf
->flags
& ATA_TFLAG_DEVICE
) {
614 iowrite8(tf
->device
, ioaddr
->device_addr
);
615 VPRINTK("device 0x%X\n", tf
->device
);
620 EXPORT_SYMBOL_GPL(ata_sff_tf_load
);
623 * ata_sff_tf_read - input device's ATA taskfile shadow registers
624 * @ap: Port from which input is read
625 * @tf: ATA taskfile register set for storing input
627 * Reads ATA taskfile registers for currently-selected device
628 * into @tf. Assumes the device has a fully SFF compliant task file
629 * layout and behaviour. If you device does not (eg has a different
630 * status method) then you will need to provide a replacement tf_read
633 * Inherited from caller.
635 void ata_sff_tf_read(struct ata_port
*ap
, struct ata_taskfile
*tf
)
637 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
639 tf
->command
= ata_sff_check_status(ap
);
640 tf
->feature
= ioread8(ioaddr
->error_addr
);
641 tf
->nsect
= ioread8(ioaddr
->nsect_addr
);
642 tf
->lbal
= ioread8(ioaddr
->lbal_addr
);
643 tf
->lbam
= ioread8(ioaddr
->lbam_addr
);
644 tf
->lbah
= ioread8(ioaddr
->lbah_addr
);
645 tf
->device
= ioread8(ioaddr
->device_addr
);
647 if (tf
->flags
& ATA_TFLAG_LBA48
) {
648 if (likely(ioaddr
->ctl_addr
)) {
649 iowrite8(tf
->ctl
| ATA_HOB
, ioaddr
->ctl_addr
);
650 tf
->hob_feature
= ioread8(ioaddr
->error_addr
);
651 tf
->hob_nsect
= ioread8(ioaddr
->nsect_addr
);
652 tf
->hob_lbal
= ioread8(ioaddr
->lbal_addr
);
653 tf
->hob_lbam
= ioread8(ioaddr
->lbam_addr
);
654 tf
->hob_lbah
= ioread8(ioaddr
->lbah_addr
);
655 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
656 ap
->last_ctl
= tf
->ctl
;
661 EXPORT_SYMBOL_GPL(ata_sff_tf_read
);
664 * ata_sff_exec_command - issue ATA command to host controller
665 * @ap: port to which command is being issued
666 * @tf: ATA taskfile register set
668 * Issues ATA command, with proper synchronization with interrupt
669 * handler / other threads.
672 * spin_lock_irqsave(host lock)
674 void ata_sff_exec_command(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
676 DPRINTK("ata%u: cmd 0x%X\n", ap
->print_id
, tf
->command
);
678 iowrite8(tf
->command
, ap
->ioaddr
.command_addr
);
681 EXPORT_SYMBOL_GPL(ata_sff_exec_command
);
684 * ata_tf_to_host - issue ATA taskfile to host controller
685 * @ap: port to which command is being issued
686 * @tf: ATA taskfile register set
688 * Issues ATA taskfile register set to ATA host controller,
689 * with proper synchronization with interrupt handler and
693 * spin_lock_irqsave(host lock)
695 static inline void ata_tf_to_host(struct ata_port
*ap
,
696 const struct ata_taskfile
*tf
)
698 ap
->ops
->sff_tf_load(ap
, tf
);
699 ap
->ops
->sff_exec_command(ap
, tf
);
703 * ata_sff_data_xfer - Transfer data by PIO
704 * @dev: device to target
706 * @buflen: buffer length
709 * Transfer data from/to the device data register by PIO.
712 * Inherited from caller.
717 unsigned int ata_sff_data_xfer(struct ata_device
*dev
, unsigned char *buf
,
718 unsigned int buflen
, int rw
)
720 struct ata_port
*ap
= dev
->link
->ap
;
721 void __iomem
*data_addr
= ap
->ioaddr
.data_addr
;
722 unsigned int words
= buflen
>> 1;
724 /* Transfer multiple of 2 bytes */
726 ioread16_rep(data_addr
, buf
, words
);
728 iowrite16_rep(data_addr
, buf
, words
);
730 /* Transfer trailing byte, if any. */
731 if (unlikely(buflen
& 0x01)) {
732 unsigned char pad
[2];
734 /* Point buf to the tail of buffer */
738 * Use io*16_rep() accessors here as well to avoid pointlessly
739 * swapping bytes to and from on the big endian machines...
742 ioread16_rep(data_addr
, pad
, 1);
746 iowrite16_rep(data_addr
, pad
, 1);
753 EXPORT_SYMBOL_GPL(ata_sff_data_xfer
);
756 * ata_sff_data_xfer32 - Transfer data by PIO
757 * @dev: device to target
759 * @buflen: buffer length
762 * Transfer data from/to the device data register by PIO using 32bit
766 * Inherited from caller.
772 unsigned int ata_sff_data_xfer32(struct ata_device
*dev
, unsigned char *buf
,
773 unsigned int buflen
, int rw
)
775 struct ata_port
*ap
= dev
->link
->ap
;
776 void __iomem
*data_addr
= ap
->ioaddr
.data_addr
;
777 unsigned int words
= buflen
>> 2;
778 int slop
= buflen
& 3;
780 if (!(ap
->pflags
& ATA_PFLAG_PIO32
))
781 return ata_sff_data_xfer(dev
, buf
, buflen
, rw
);
783 /* Transfer multiple of 4 bytes */
785 ioread32_rep(data_addr
, buf
, words
);
787 iowrite32_rep(data_addr
, buf
, words
);
789 /* Transfer trailing bytes, if any */
790 if (unlikely(slop
)) {
791 unsigned char pad
[4];
793 /* Point buf to the tail of buffer */
794 buf
+= buflen
- slop
;
797 * Use io*_rep() accessors here as well to avoid pointlessly
798 * swapping bytes to and from on the big endian machines...
802 ioread16_rep(data_addr
, pad
, 1);
804 ioread32_rep(data_addr
, pad
, 1);
805 memcpy(buf
, pad
, slop
);
807 memcpy(pad
, buf
, slop
);
809 iowrite16_rep(data_addr
, pad
, 1);
811 iowrite32_rep(data_addr
, pad
, 1);
814 return (buflen
+ 1) & ~1;
816 EXPORT_SYMBOL_GPL(ata_sff_data_xfer32
);
819 * ata_sff_data_xfer_noirq - Transfer data by PIO
820 * @dev: device to target
822 * @buflen: buffer length
825 * Transfer data from/to the device data register by PIO. Do the
826 * transfer with interrupts disabled.
829 * Inherited from caller.
834 unsigned int ata_sff_data_xfer_noirq(struct ata_device
*dev
, unsigned char *buf
,
835 unsigned int buflen
, int rw
)
838 unsigned int consumed
;
840 local_irq_save(flags
);
841 consumed
= ata_sff_data_xfer(dev
, buf
, buflen
, rw
);
842 local_irq_restore(flags
);
846 EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq
);
849 * ata_pio_sector - Transfer a sector of data.
850 * @qc: Command on going
852 * Transfer qc->sect_size bytes of data from/to the ATA device.
855 * Inherited from caller.
857 static void ata_pio_sector(struct ata_queued_cmd
*qc
)
859 int do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
860 struct ata_port
*ap
= qc
->ap
;
865 if (qc
->curbytes
== qc
->nbytes
- qc
->sect_size
)
866 ap
->hsm_task_state
= HSM_ST_LAST
;
868 page
= sg_page(qc
->cursg
);
869 offset
= qc
->cursg
->offset
+ qc
->cursg_ofs
;
871 /* get the current page and offset */
872 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
875 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
877 if (PageHighMem(page
)) {
880 /* FIXME: use a bounce buffer */
881 local_irq_save(flags
);
882 buf
= kmap_atomic(page
, KM_IRQ0
);
884 /* do the actual data transfer */
885 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
888 kunmap_atomic(buf
, KM_IRQ0
);
889 local_irq_restore(flags
);
891 buf
= page_address(page
);
892 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
897 flush_dcache_page(page
);
899 qc
->curbytes
+= qc
->sect_size
;
900 qc
->cursg_ofs
+= qc
->sect_size
;
902 if (qc
->cursg_ofs
== qc
->cursg
->length
) {
903 qc
->cursg
= sg_next(qc
->cursg
);
909 * ata_pio_sectors - Transfer one or many sectors.
910 * @qc: Command on going
912 * Transfer one or many sectors of data from/to the
913 * ATA device for the DRQ request.
916 * Inherited from caller.
918 static void ata_pio_sectors(struct ata_queued_cmd
*qc
)
920 if (is_multi_taskfile(&qc
->tf
)) {
921 /* READ/WRITE MULTIPLE */
924 WARN_ON_ONCE(qc
->dev
->multi_count
== 0);
926 nsect
= min((qc
->nbytes
- qc
->curbytes
) / qc
->sect_size
,
927 qc
->dev
->multi_count
);
933 ata_sff_sync(qc
->ap
); /* flush */
937 * atapi_send_cdb - Write CDB bytes to hardware
938 * @ap: Port to which ATAPI device is attached.
939 * @qc: Taskfile currently active
941 * When device has indicated its readiness to accept
942 * a CDB, this function is called. Send the CDB.
947 static void atapi_send_cdb(struct ata_port
*ap
, struct ata_queued_cmd
*qc
)
950 DPRINTK("send cdb\n");
951 WARN_ON_ONCE(qc
->dev
->cdb_len
< 12);
953 ap
->ops
->sff_data_xfer(qc
->dev
, qc
->cdb
, qc
->dev
->cdb_len
, 1);
955 /* FIXME: If the CDB is for DMA do we need to do the transition delay
956 or is bmdma_start guaranteed to do it ? */
957 switch (qc
->tf
.protocol
) {
959 ap
->hsm_task_state
= HSM_ST
;
961 case ATAPI_PROT_NODATA
:
962 ap
->hsm_task_state
= HSM_ST_LAST
;
965 ap
->hsm_task_state
= HSM_ST_LAST
;
967 ap
->ops
->bmdma_start(qc
);
973 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
974 * @qc: Command on going
975 * @bytes: number of bytes
977 * Transfer Transfer data from/to the ATAPI device.
980 * Inherited from caller.
983 static int __atapi_pio_bytes(struct ata_queued_cmd
*qc
, unsigned int bytes
)
985 int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? WRITE
: READ
;
986 struct ata_port
*ap
= qc
->ap
;
987 struct ata_device
*dev
= qc
->dev
;
988 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
989 struct scatterlist
*sg
;
992 unsigned int offset
, count
, consumed
;
997 ata_ehi_push_desc(ehi
, "unexpected or too much trailing data "
998 "buf=%u cur=%u bytes=%u",
999 qc
->nbytes
, qc
->curbytes
, bytes
);
1004 offset
= sg
->offset
+ qc
->cursg_ofs
;
1006 /* get the current page and offset */
1007 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
1008 offset
%= PAGE_SIZE
;
1010 /* don't overrun current sg */
1011 count
= min(sg
->length
- qc
->cursg_ofs
, bytes
);
1013 /* don't cross page boundaries */
1014 count
= min(count
, (unsigned int)PAGE_SIZE
- offset
);
1016 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
1018 if (PageHighMem(page
)) {
1019 unsigned long flags
;
1021 /* FIXME: use bounce buffer */
1022 local_irq_save(flags
);
1023 buf
= kmap_atomic(page
, KM_IRQ0
);
1025 /* do the actual data transfer */
1026 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
,
1029 kunmap_atomic(buf
, KM_IRQ0
);
1030 local_irq_restore(flags
);
1032 buf
= page_address(page
);
1033 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
,
1037 bytes
-= min(bytes
, consumed
);
1038 qc
->curbytes
+= count
;
1039 qc
->cursg_ofs
+= count
;
1041 if (qc
->cursg_ofs
== sg
->length
) {
1042 qc
->cursg
= sg_next(qc
->cursg
);
1047 * There used to be a WARN_ON_ONCE(qc->cursg && count != consumed);
1048 * Unfortunately __atapi_pio_bytes doesn't know enough to do the WARN
1049 * check correctly as it doesn't know if it is the last request being
1050 * made. Somebody should implement a proper sanity check.
1058 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
1059 * @qc: Command on going
1061 * Transfer Transfer data from/to the ATAPI device.
1064 * Inherited from caller.
1066 static void atapi_pio_bytes(struct ata_queued_cmd
*qc
)
1068 struct ata_port
*ap
= qc
->ap
;
1069 struct ata_device
*dev
= qc
->dev
;
1070 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
1071 unsigned int ireason
, bc_lo
, bc_hi
, bytes
;
1072 int i_write
, do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? 1 : 0;
1074 /* Abuse qc->result_tf for temp storage of intermediate TF
1075 * here to save some kernel stack usage.
1076 * For normal completion, qc->result_tf is not relevant. For
1077 * error, qc->result_tf is later overwritten by ata_qc_complete().
1078 * So, the correctness of qc->result_tf is not affected.
1080 ap
->ops
->sff_tf_read(ap
, &qc
->result_tf
);
1081 ireason
= qc
->result_tf
.nsect
;
1082 bc_lo
= qc
->result_tf
.lbam
;
1083 bc_hi
= qc
->result_tf
.lbah
;
1084 bytes
= (bc_hi
<< 8) | bc_lo
;
1086 /* shall be cleared to zero, indicating xfer of data */
1087 if (unlikely(ireason
& (1 << 0)))
1090 /* make sure transfer direction matches expected */
1091 i_write
= ((ireason
& (1 << 1)) == 0) ? 1 : 0;
1092 if (unlikely(do_write
!= i_write
))
1095 if (unlikely(!bytes
))
1098 VPRINTK("ata%u: xfering %d bytes\n", ap
->print_id
, bytes
);
1100 if (unlikely(__atapi_pio_bytes(qc
, bytes
)))
1102 ata_sff_sync(ap
); /* flush */
1107 ata_ehi_push_desc(ehi
, "ATAPI check failed (ireason=0x%x bytes=%u)",
1110 qc
->err_mask
|= AC_ERR_HSM
;
1111 ap
->hsm_task_state
= HSM_ST_ERR
;
1115 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
1116 * @ap: the target ata_port
1120 * 1 if ok in workqueue, 0 otherwise.
1122 static inline int ata_hsm_ok_in_wq(struct ata_port
*ap
,
1123 struct ata_queued_cmd
*qc
)
1125 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1128 if (ap
->hsm_task_state
== HSM_ST_FIRST
) {
1129 if (qc
->tf
.protocol
== ATA_PROT_PIO
&&
1130 (qc
->tf
.flags
& ATA_TFLAG_WRITE
))
1133 if (ata_is_atapi(qc
->tf
.protocol
) &&
1134 !(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1142 * ata_hsm_qc_complete - finish a qc running on standard HSM
1143 * @qc: Command to complete
1144 * @in_wq: 1 if called from workqueue, 0 otherwise
1146 * Finish @qc which is running on standard HSM.
1149 * If @in_wq is zero, spin_lock_irqsave(host lock).
1150 * Otherwise, none on entry and grabs host lock.
1152 static void ata_hsm_qc_complete(struct ata_queued_cmd
*qc
, int in_wq
)
1154 struct ata_port
*ap
= qc
->ap
;
1155 unsigned long flags
;
1157 if (ap
->ops
->error_handler
) {
1159 spin_lock_irqsave(ap
->lock
, flags
);
1161 /* EH might have kicked in while host lock is
1164 qc
= ata_qc_from_tag(ap
, qc
->tag
);
1166 if (likely(!(qc
->err_mask
& AC_ERR_HSM
))) {
1167 ap
->ops
->sff_irq_on(ap
);
1168 ata_qc_complete(qc
);
1170 ata_port_freeze(ap
);
1173 spin_unlock_irqrestore(ap
->lock
, flags
);
1175 if (likely(!(qc
->err_mask
& AC_ERR_HSM
)))
1176 ata_qc_complete(qc
);
1178 ata_port_freeze(ap
);
1182 spin_lock_irqsave(ap
->lock
, flags
);
1183 ap
->ops
->sff_irq_on(ap
);
1184 ata_qc_complete(qc
);
1185 spin_unlock_irqrestore(ap
->lock
, flags
);
1187 ata_qc_complete(qc
);
1192 * ata_sff_hsm_move - move the HSM to the next state.
1193 * @ap: the target ata_port
1195 * @status: current device status
1196 * @in_wq: 1 if called from workqueue, 0 otherwise
1199 * 1 when poll next status needed, 0 otherwise.
1201 int ata_sff_hsm_move(struct ata_port
*ap
, struct ata_queued_cmd
*qc
,
1202 u8 status
, int in_wq
)
1204 struct ata_eh_info
*ehi
= &ap
->link
.eh_info
;
1205 unsigned long flags
= 0;
1208 WARN_ON_ONCE((qc
->flags
& ATA_QCFLAG_ACTIVE
) == 0);
1210 /* Make sure ata_sff_qc_issue() does not throw things
1211 * like DMA polling into the workqueue. Notice that
1212 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1214 WARN_ON_ONCE(in_wq
!= ata_hsm_ok_in_wq(ap
, qc
));
1217 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1218 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
, status
);
1220 switch (ap
->hsm_task_state
) {
1222 /* Send first data block or PACKET CDB */
1224 /* If polling, we will stay in the work queue after
1225 * sending the data. Otherwise, interrupt handler
1226 * takes over after sending the data.
1228 poll_next
= (qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1230 /* check device status */
1231 if (unlikely((status
& ATA_DRQ
) == 0)) {
1232 /* handle BSY=0, DRQ=0 as error */
1233 if (likely(status
& (ATA_ERR
| ATA_DF
)))
1234 /* device stops HSM for abort/error */
1235 qc
->err_mask
|= AC_ERR_DEV
;
1237 /* HSM violation. Let EH handle this */
1238 ata_ehi_push_desc(ehi
,
1239 "ST_FIRST: !(DRQ|ERR|DF)");
1240 qc
->err_mask
|= AC_ERR_HSM
;
1243 ap
->hsm_task_state
= HSM_ST_ERR
;
1247 /* Device should not ask for data transfer (DRQ=1)
1248 * when it finds something wrong.
1249 * We ignore DRQ here and stop the HSM by
1250 * changing hsm_task_state to HSM_ST_ERR and
1251 * let the EH abort the command or reset the device.
1253 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1254 /* Some ATAPI tape drives forget to clear the ERR bit
1255 * when doing the next command (mostly request sense).
1256 * We ignore ERR here to workaround and proceed sending
1259 if (!(qc
->dev
->horkage
& ATA_HORKAGE_STUCK_ERR
)) {
1260 ata_ehi_push_desc(ehi
, "ST_FIRST: "
1261 "DRQ=1 with device error, "
1262 "dev_stat 0x%X", status
);
1263 qc
->err_mask
|= AC_ERR_HSM
;
1264 ap
->hsm_task_state
= HSM_ST_ERR
;
1269 /* Send the CDB (atapi) or the first data block (ata pio out).
1270 * During the state transition, interrupt handler shouldn't
1271 * be invoked before the data transfer is complete and
1272 * hsm_task_state is changed. Hence, the following locking.
1275 spin_lock_irqsave(ap
->lock
, flags
);
1277 if (qc
->tf
.protocol
== ATA_PROT_PIO
) {
1278 /* PIO data out protocol.
1279 * send first data block.
1282 /* ata_pio_sectors() might change the state
1283 * to HSM_ST_LAST. so, the state is changed here
1284 * before ata_pio_sectors().
1286 ap
->hsm_task_state
= HSM_ST
;
1287 ata_pio_sectors(qc
);
1290 atapi_send_cdb(ap
, qc
);
1293 spin_unlock_irqrestore(ap
->lock
, flags
);
1295 /* if polling, ata_pio_task() handles the rest.
1296 * otherwise, interrupt handler takes over from here.
1301 /* complete command or read/write the data register */
1302 if (qc
->tf
.protocol
== ATAPI_PROT_PIO
) {
1303 /* ATAPI PIO protocol */
1304 if ((status
& ATA_DRQ
) == 0) {
1305 /* No more data to transfer or device error.
1306 * Device error will be tagged in HSM_ST_LAST.
1308 ap
->hsm_task_state
= HSM_ST_LAST
;
1312 /* Device should not ask for data transfer (DRQ=1)
1313 * when it finds something wrong.
1314 * We ignore DRQ here and stop the HSM by
1315 * changing hsm_task_state to HSM_ST_ERR and
1316 * let the EH abort the command or reset the device.
1318 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1319 ata_ehi_push_desc(ehi
, "ST-ATAPI: "
1320 "DRQ=1 with device error, "
1321 "dev_stat 0x%X", status
);
1322 qc
->err_mask
|= AC_ERR_HSM
;
1323 ap
->hsm_task_state
= HSM_ST_ERR
;
1327 atapi_pio_bytes(qc
);
1329 if (unlikely(ap
->hsm_task_state
== HSM_ST_ERR
))
1330 /* bad ireason reported by device */
1334 /* ATA PIO protocol */
1335 if (unlikely((status
& ATA_DRQ
) == 0)) {
1336 /* handle BSY=0, DRQ=0 as error */
1337 if (likely(status
& (ATA_ERR
| ATA_DF
))) {
1338 /* device stops HSM for abort/error */
1339 qc
->err_mask
|= AC_ERR_DEV
;
1341 /* If diagnostic failed and this is
1342 * IDENTIFY, it's likely a phantom
1343 * device. Mark hint.
1345 if (qc
->dev
->horkage
&
1346 ATA_HORKAGE_DIAGNOSTIC
)
1350 /* HSM violation. Let EH handle this.
1351 * Phantom devices also trigger this
1352 * condition. Mark hint.
1354 ata_ehi_push_desc(ehi
, "ST-ATA: "
1355 "DRQ=0 without device error, "
1356 "dev_stat 0x%X", status
);
1357 qc
->err_mask
|= AC_ERR_HSM
|
1361 ap
->hsm_task_state
= HSM_ST_ERR
;
1365 /* For PIO reads, some devices may ask for
1366 * data transfer (DRQ=1) alone with ERR=1.
1367 * We respect DRQ here and transfer one
1368 * block of junk data before changing the
1369 * hsm_task_state to HSM_ST_ERR.
1371 * For PIO writes, ERR=1 DRQ=1 doesn't make
1372 * sense since the data block has been
1373 * transferred to the device.
1375 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1376 /* data might be corrputed */
1377 qc
->err_mask
|= AC_ERR_DEV
;
1379 if (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
)) {
1380 ata_pio_sectors(qc
);
1381 status
= ata_wait_idle(ap
);
1384 if (status
& (ATA_BUSY
| ATA_DRQ
)) {
1385 ata_ehi_push_desc(ehi
, "ST-ATA: "
1386 "BUSY|DRQ persists on ERR|DF, "
1387 "dev_stat 0x%X", status
);
1388 qc
->err_mask
|= AC_ERR_HSM
;
1391 /* There are oddball controllers with
1392 * status register stuck at 0x7f and
1393 * lbal/m/h at zero which makes it
1394 * pass all other presence detection
1395 * mechanisms we have. Set NODEV_HINT
1396 * for it. Kernel bz#7241.
1399 qc
->err_mask
|= AC_ERR_NODEV_HINT
;
1401 /* ata_pio_sectors() might change the
1402 * state to HSM_ST_LAST. so, the state
1403 * is changed after ata_pio_sectors().
1405 ap
->hsm_task_state
= HSM_ST_ERR
;
1409 ata_pio_sectors(qc
);
1411 if (ap
->hsm_task_state
== HSM_ST_LAST
&&
1412 (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
))) {
1414 status
= ata_wait_idle(ap
);
1423 if (unlikely(!ata_ok(status
))) {
1424 qc
->err_mask
|= __ac_err_mask(status
);
1425 ap
->hsm_task_state
= HSM_ST_ERR
;
1429 /* no more data to transfer */
1430 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1431 ap
->print_id
, qc
->dev
->devno
, status
);
1433 WARN_ON_ONCE(qc
->err_mask
& (AC_ERR_DEV
| AC_ERR_HSM
));
1435 ap
->hsm_task_state
= HSM_ST_IDLE
;
1437 /* complete taskfile transaction */
1438 ata_hsm_qc_complete(qc
, in_wq
);
1444 ap
->hsm_task_state
= HSM_ST_IDLE
;
1446 /* complete taskfile transaction */
1447 ata_hsm_qc_complete(qc
, in_wq
);
1458 EXPORT_SYMBOL_GPL(ata_sff_hsm_move
);
1460 void ata_pio_task(struct work_struct
*work
)
1462 struct ata_port
*ap
=
1463 container_of(work
, struct ata_port
, port_task
.work
);
1464 struct ata_queued_cmd
*qc
= ap
->port_task_data
;
1469 WARN_ON_ONCE(ap
->hsm_task_state
== HSM_ST_IDLE
);
1472 * This is purely heuristic. This is a fast path.
1473 * Sometimes when we enter, BSY will be cleared in
1474 * a chk-status or two. If not, the drive is probably seeking
1475 * or something. Snooze for a couple msecs, then
1476 * chk-status again. If still busy, queue delayed work.
1478 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 5);
1479 if (status
& ATA_BUSY
) {
1481 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 10);
1482 if (status
& ATA_BUSY
) {
1483 ata_pio_queue_task(ap
, qc
, ATA_SHORT_PAUSE
);
1489 poll_next
= ata_sff_hsm_move(ap
, qc
, status
, 1);
1491 /* another command or interrupt handler
1492 * may be running at this point.
1499 * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner
1500 * @qc: command to issue to device
1502 * Using various libata functions and hooks, this function
1503 * starts an ATA command. ATA commands are grouped into
1504 * classes called "protocols", and issuing each type of protocol
1505 * is slightly different.
1507 * May be used as the qc_issue() entry in ata_port_operations.
1510 * spin_lock_irqsave(host lock)
1513 * Zero on success, AC_ERR_* mask on failure
1515 unsigned int ata_sff_qc_issue(struct ata_queued_cmd
*qc
)
1517 struct ata_port
*ap
= qc
->ap
;
1519 /* Use polling pio if the LLD doesn't handle
1520 * interrupt driven pio and atapi CDB interrupt.
1522 if (ap
->flags
& ATA_FLAG_PIO_POLLING
) {
1523 switch (qc
->tf
.protocol
) {
1525 case ATA_PROT_NODATA
:
1526 case ATAPI_PROT_PIO
:
1527 case ATAPI_PROT_NODATA
:
1528 qc
->tf
.flags
|= ATA_TFLAG_POLLING
;
1530 case ATAPI_PROT_DMA
:
1531 if (qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)
1532 /* see ata_dma_blacklisted() */
1540 /* select the device */
1541 ata_dev_select(ap
, qc
->dev
->devno
, 1, 0);
1543 /* start the command */
1544 switch (qc
->tf
.protocol
) {
1545 case ATA_PROT_NODATA
:
1546 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1547 ata_qc_set_polling(qc
);
1549 ata_tf_to_host(ap
, &qc
->tf
);
1550 ap
->hsm_task_state
= HSM_ST_LAST
;
1552 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1553 ata_pio_queue_task(ap
, qc
, 0);
1558 WARN_ON_ONCE(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1560 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1561 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1562 ap
->ops
->bmdma_start(qc
); /* initiate bmdma */
1563 ap
->hsm_task_state
= HSM_ST_LAST
;
1567 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1568 ata_qc_set_polling(qc
);
1570 ata_tf_to_host(ap
, &qc
->tf
);
1572 if (qc
->tf
.flags
& ATA_TFLAG_WRITE
) {
1573 /* PIO data out protocol */
1574 ap
->hsm_task_state
= HSM_ST_FIRST
;
1575 ata_pio_queue_task(ap
, qc
, 0);
1577 /* always send first data block using
1578 * the ata_pio_task() codepath.
1581 /* PIO data in protocol */
1582 ap
->hsm_task_state
= HSM_ST
;
1584 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1585 ata_pio_queue_task(ap
, qc
, 0);
1587 /* if polling, ata_pio_task() handles the rest.
1588 * otherwise, interrupt handler takes over from here.
1594 case ATAPI_PROT_PIO
:
1595 case ATAPI_PROT_NODATA
:
1596 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1597 ata_qc_set_polling(qc
);
1599 ata_tf_to_host(ap
, &qc
->tf
);
1601 ap
->hsm_task_state
= HSM_ST_FIRST
;
1603 /* send cdb by polling if no cdb interrupt */
1604 if ((!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)) ||
1605 (qc
->tf
.flags
& ATA_TFLAG_POLLING
))
1606 ata_pio_queue_task(ap
, qc
, 0);
1609 case ATAPI_PROT_DMA
:
1610 WARN_ON_ONCE(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1612 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1613 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1614 ap
->hsm_task_state
= HSM_ST_FIRST
;
1616 /* send cdb by polling if no cdb interrupt */
1617 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1618 ata_pio_queue_task(ap
, qc
, 0);
1623 return AC_ERR_SYSTEM
;
1628 EXPORT_SYMBOL_GPL(ata_sff_qc_issue
);
1631 * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read
1632 * @qc: qc to fill result TF for
1634 * @qc is finished and result TF needs to be filled. Fill it
1635 * using ->sff_tf_read.
1638 * spin_lock_irqsave(host lock)
1641 * true indicating that result TF is successfully filled.
1643 bool ata_sff_qc_fill_rtf(struct ata_queued_cmd
*qc
)
1645 qc
->ap
->ops
->sff_tf_read(qc
->ap
, &qc
->result_tf
);
1648 EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf
);
1651 * ata_sff_host_intr - Handle host interrupt for given (port, task)
1652 * @ap: Port on which interrupt arrived (possibly...)
1653 * @qc: Taskfile currently active in engine
1655 * Handle host interrupt for given queued command. Currently,
1656 * only DMA interrupts are handled. All other commands are
1657 * handled via polling with interrupts disabled (nIEN bit).
1660 * spin_lock_irqsave(host lock)
1663 * One if interrupt was handled, zero if not (shared irq).
1665 unsigned int ata_sff_host_intr(struct ata_port
*ap
,
1666 struct ata_queued_cmd
*qc
)
1668 struct ata_eh_info
*ehi
= &ap
->link
.eh_info
;
1669 u8 status
, host_stat
= 0;
1671 VPRINTK("ata%u: protocol %d task_state %d\n",
1672 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
);
1674 /* Check whether we are expecting interrupt in this state */
1675 switch (ap
->hsm_task_state
) {
1677 /* Some pre-ATAPI-4 devices assert INTRQ
1678 * at this state when ready to receive CDB.
1681 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1682 * The flag was turned on only for atapi devices. No
1683 * need to check ata_is_atapi(qc->tf.protocol) again.
1685 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1689 if (qc
->tf
.protocol
== ATA_PROT_DMA
||
1690 qc
->tf
.protocol
== ATAPI_PROT_DMA
) {
1691 /* check status of DMA engine */
1692 host_stat
= ap
->ops
->bmdma_status(ap
);
1693 VPRINTK("ata%u: host_stat 0x%X\n",
1694 ap
->print_id
, host_stat
);
1696 /* if it's not our irq... */
1697 if (!(host_stat
& ATA_DMA_INTR
))
1700 /* before we do anything else, clear DMA-Start bit */
1701 ap
->ops
->bmdma_stop(qc
);
1703 if (unlikely(host_stat
& ATA_DMA_ERR
)) {
1704 /* error when transfering data to/from memory */
1705 qc
->err_mask
|= AC_ERR_HOST_BUS
;
1706 ap
->hsm_task_state
= HSM_ST_ERR
;
1717 /* check main status, clearing INTRQ if needed */
1718 status
= ata_sff_irq_status(ap
);
1719 if (status
& ATA_BUSY
)
1722 /* ack bmdma irq events */
1723 ap
->ops
->sff_irq_clear(ap
);
1725 ata_sff_hsm_move(ap
, qc
, status
, 0);
1727 if (unlikely(qc
->err_mask
) && (qc
->tf
.protocol
== ATA_PROT_DMA
||
1728 qc
->tf
.protocol
== ATAPI_PROT_DMA
))
1729 ata_ehi_push_desc(ehi
, "BMDMA stat 0x%x", host_stat
);
1731 return 1; /* irq handled */
1734 ap
->stats
.idle_irq
++;
1737 if ((ap
->stats
.idle_irq
% 1000) == 0) {
1738 ap
->ops
->sff_check_status(ap
);
1739 ap
->ops
->sff_irq_clear(ap
);
1740 ata_port_printk(ap
, KERN_WARNING
, "irq trap\n");
1744 return 0; /* irq not handled */
1746 EXPORT_SYMBOL_GPL(ata_sff_host_intr
);
1749 * ata_sff_interrupt - Default ATA host interrupt handler
1750 * @irq: irq line (unused)
1751 * @dev_instance: pointer to our ata_host information structure
1753 * Default interrupt handler for PCI IDE devices. Calls
1754 * ata_sff_host_intr() for each port that is not disabled.
1757 * Obtains host lock during operation.
1760 * IRQ_NONE or IRQ_HANDLED.
1762 irqreturn_t
ata_sff_interrupt(int irq
, void *dev_instance
)
1764 struct ata_host
*host
= dev_instance
;
1766 unsigned int handled
= 0, polling
= 0;
1767 unsigned long flags
;
1769 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1770 spin_lock_irqsave(&host
->lock
, flags
);
1772 for (i
= 0; i
< host
->n_ports
; i
++) {
1773 struct ata_port
*ap
= host
->ports
[i
];
1774 struct ata_queued_cmd
*qc
;
1776 if (unlikely(ap
->flags
& ATA_FLAG_DISABLED
))
1779 qc
= ata_qc_from_tag(ap
, ap
->link
.active_tag
);
1781 if (!(qc
->tf
.flags
& ATA_TFLAG_POLLING
))
1782 handled
|= ata_sff_host_intr(ap
, qc
);
1789 * If no port was expecting IRQ but the controller is actually
1790 * asserting IRQ line, nobody cared will ensue. Check IRQ
1791 * pending status if available and clear spurious IRQ.
1794 for (i
= 0; i
< host
->n_ports
; i
++) {
1795 struct ata_port
*ap
= host
->ports
[i
];
1797 if (polling
& (1 << i
))
1800 if (!ap
->ops
->sff_irq_check
||
1801 !ap
->ops
->sff_irq_check(ap
))
1804 if (printk_ratelimit())
1805 ata_port_printk(ap
, KERN_INFO
,
1806 "clearing spurious IRQ\n");
1808 ap
->ops
->sff_check_status(ap
);
1809 ap
->ops
->sff_irq_clear(ap
);
1813 spin_unlock_irqrestore(&host
->lock
, flags
);
1815 return IRQ_RETVAL(handled
);
1817 EXPORT_SYMBOL_GPL(ata_sff_interrupt
);
1820 * ata_sff_lost_interrupt - Check for an apparent lost interrupt
1821 * @ap: port that appears to have timed out
1823 * Called from the libata error handlers when the core code suspects
1824 * an interrupt has been lost. If it has complete anything we can and
1825 * then return. Interface must support altstatus for this faster
1826 * recovery to occur.
1829 * Caller holds host lock
1832 void ata_sff_lost_interrupt(struct ata_port
*ap
)
1835 struct ata_queued_cmd
*qc
;
1837 /* Only one outstanding command per SFF channel */
1838 qc
= ata_qc_from_tag(ap
, ap
->link
.active_tag
);
1839 /* Check we have a live one.. */
1840 if (qc
== NULL
|| !(qc
->flags
& ATA_QCFLAG_ACTIVE
))
1842 /* We cannot lose an interrupt on a polled command */
1843 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1845 /* See if the controller thinks it is still busy - if so the command
1846 isn't a lost IRQ but is still in progress */
1847 status
= ata_sff_altstatus(ap
);
1848 if (status
& ATA_BUSY
)
1851 /* There was a command running, we are no longer busy and we have
1853 ata_port_printk(ap
, KERN_WARNING
, "lost interrupt (Status 0x%x)\n",
1855 /* Run the host interrupt logic as if the interrupt had not been
1857 ata_sff_host_intr(ap
, qc
);
1859 EXPORT_SYMBOL_GPL(ata_sff_lost_interrupt
);
1862 * ata_sff_freeze - Freeze SFF controller port
1863 * @ap: port to freeze
1865 * Freeze BMDMA controller port.
1868 * Inherited from caller.
1870 void ata_sff_freeze(struct ata_port
*ap
)
1872 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1874 ap
->ctl
|= ATA_NIEN
;
1875 ap
->last_ctl
= ap
->ctl
;
1877 if (ioaddr
->ctl_addr
)
1878 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1880 /* Under certain circumstances, some controllers raise IRQ on
1881 * ATA_NIEN manipulation. Also, many controllers fail to mask
1882 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1884 ap
->ops
->sff_check_status(ap
);
1886 ap
->ops
->sff_irq_clear(ap
);
1888 EXPORT_SYMBOL_GPL(ata_sff_freeze
);
1891 * ata_sff_thaw - Thaw SFF controller port
1894 * Thaw SFF controller port.
1897 * Inherited from caller.
1899 void ata_sff_thaw(struct ata_port
*ap
)
1901 /* clear & re-enable interrupts */
1902 ap
->ops
->sff_check_status(ap
);
1903 ap
->ops
->sff_irq_clear(ap
);
1904 ap
->ops
->sff_irq_on(ap
);
1906 EXPORT_SYMBOL_GPL(ata_sff_thaw
);
1909 * ata_sff_prereset - prepare SFF link for reset
1910 * @link: SFF link to be reset
1911 * @deadline: deadline jiffies for the operation
1913 * SFF link @link is about to be reset. Initialize it. It first
1914 * calls ata_std_prereset() and wait for !BSY if the port is
1918 * Kernel thread context (may sleep)
1921 * 0 on success, -errno otherwise.
1923 int ata_sff_prereset(struct ata_link
*link
, unsigned long deadline
)
1925 struct ata_eh_context
*ehc
= &link
->eh_context
;
1928 rc
= ata_std_prereset(link
, deadline
);
1932 /* if we're about to do hardreset, nothing more to do */
1933 if (ehc
->i
.action
& ATA_EH_HARDRESET
)
1936 /* wait for !BSY if we don't know that no device is attached */
1937 if (!ata_link_offline(link
)) {
1938 rc
= ata_sff_wait_ready(link
, deadline
);
1939 if (rc
&& rc
!= -ENODEV
) {
1940 ata_link_printk(link
, KERN_WARNING
, "device not ready "
1941 "(errno=%d), forcing hardreset\n", rc
);
1942 ehc
->i
.action
|= ATA_EH_HARDRESET
;
1948 EXPORT_SYMBOL_GPL(ata_sff_prereset
);
1951 * ata_devchk - PATA device presence detection
1952 * @ap: ATA channel to examine
1953 * @device: Device to examine (starting at zero)
1955 * This technique was originally described in
1956 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1957 * later found its way into the ATA/ATAPI spec.
1959 * Write a pattern to the ATA shadow registers,
1960 * and if a device is present, it will respond by
1961 * correctly storing and echoing back the
1962 * ATA shadow register contents.
1967 static unsigned int ata_devchk(struct ata_port
*ap
, unsigned int device
)
1969 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1972 ap
->ops
->sff_dev_select(ap
, device
);
1974 iowrite8(0x55, ioaddr
->nsect_addr
);
1975 iowrite8(0xaa, ioaddr
->lbal_addr
);
1977 iowrite8(0xaa, ioaddr
->nsect_addr
);
1978 iowrite8(0x55, ioaddr
->lbal_addr
);
1980 iowrite8(0x55, ioaddr
->nsect_addr
);
1981 iowrite8(0xaa, ioaddr
->lbal_addr
);
1983 nsect
= ioread8(ioaddr
->nsect_addr
);
1984 lbal
= ioread8(ioaddr
->lbal_addr
);
1986 if ((nsect
== 0x55) && (lbal
== 0xaa))
1987 return 1; /* we found a device */
1989 return 0; /* nothing found */
1993 * ata_sff_dev_classify - Parse returned ATA device signature
1994 * @dev: ATA device to classify (starting at zero)
1995 * @present: device seems present
1996 * @r_err: Value of error register on completion
1998 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1999 * an ATA/ATAPI-defined set of values is placed in the ATA
2000 * shadow registers, indicating the results of device detection
2003 * Select the ATA device, and read the values from the ATA shadow
2004 * registers. Then parse according to the Error register value,
2005 * and the spec-defined values examined by ata_dev_classify().
2011 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
2013 unsigned int ata_sff_dev_classify(struct ata_device
*dev
, int present
,
2016 struct ata_port
*ap
= dev
->link
->ap
;
2017 struct ata_taskfile tf
;
2021 ap
->ops
->sff_dev_select(ap
, dev
->devno
);
2023 memset(&tf
, 0, sizeof(tf
));
2025 ap
->ops
->sff_tf_read(ap
, &tf
);
2030 /* see if device passed diags: continue and warn later */
2032 /* diagnostic fail : do nothing _YET_ */
2033 dev
->horkage
|= ATA_HORKAGE_DIAGNOSTIC
;
2036 else if ((dev
->devno
== 0) && (err
== 0x81))
2039 return ATA_DEV_NONE
;
2041 /* determine if device is ATA or ATAPI */
2042 class = ata_dev_classify(&tf
);
2044 if (class == ATA_DEV_UNKNOWN
) {
2045 /* If the device failed diagnostic, it's likely to
2046 * have reported incorrect device signature too.
2047 * Assume ATA device if the device seems present but
2048 * device signature is invalid with diagnostic
2051 if (present
&& (dev
->horkage
& ATA_HORKAGE_DIAGNOSTIC
))
2052 class = ATA_DEV_ATA
;
2054 class = ATA_DEV_NONE
;
2055 } else if ((class == ATA_DEV_ATA
) &&
2056 (ap
->ops
->sff_check_status(ap
) == 0))
2057 class = ATA_DEV_NONE
;
2061 EXPORT_SYMBOL_GPL(ata_sff_dev_classify
);
2064 * ata_sff_wait_after_reset - wait for devices to become ready after reset
2065 * @link: SFF link which is just reset
2066 * @devmask: mask of present devices
2067 * @deadline: deadline jiffies for the operation
2069 * Wait devices attached to SFF @link to become ready after
2070 * reset. It contains preceding 150ms wait to avoid accessing TF
2071 * status register too early.
2074 * Kernel thread context (may sleep).
2077 * 0 on success, -ENODEV if some or all of devices in @devmask
2078 * don't seem to exist. -errno on other errors.
2080 int ata_sff_wait_after_reset(struct ata_link
*link
, unsigned int devmask
,
2081 unsigned long deadline
)
2083 struct ata_port
*ap
= link
->ap
;
2084 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2085 unsigned int dev0
= devmask
& (1 << 0);
2086 unsigned int dev1
= devmask
& (1 << 1);
2089 msleep(ATA_WAIT_AFTER_RESET
);
2091 /* always check readiness of the master device */
2092 rc
= ata_sff_wait_ready(link
, deadline
);
2093 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
2094 * and TF status is 0xff, bail out on it too.
2099 /* if device 1 was found in ata_devchk, wait for register
2100 * access briefly, then wait for BSY to clear.
2105 ap
->ops
->sff_dev_select(ap
, 1);
2107 /* Wait for register access. Some ATAPI devices fail
2108 * to set nsect/lbal after reset, so don't waste too
2109 * much time on it. We're gonna wait for !BSY anyway.
2111 for (i
= 0; i
< 2; i
++) {
2114 nsect
= ioread8(ioaddr
->nsect_addr
);
2115 lbal
= ioread8(ioaddr
->lbal_addr
);
2116 if ((nsect
== 1) && (lbal
== 1))
2118 msleep(50); /* give drive a breather */
2121 rc
= ata_sff_wait_ready(link
, deadline
);
2129 /* is all this really necessary? */
2130 ap
->ops
->sff_dev_select(ap
, 0);
2132 ap
->ops
->sff_dev_select(ap
, 1);
2134 ap
->ops
->sff_dev_select(ap
, 0);
2138 EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset
);
2140 static int ata_bus_softreset(struct ata_port
*ap
, unsigned int devmask
,
2141 unsigned long deadline
)
2143 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2145 DPRINTK("ata%u: bus reset via SRST\n", ap
->print_id
);
2147 /* software reset. causes dev0 to be selected */
2148 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2149 udelay(20); /* FIXME: flush */
2150 iowrite8(ap
->ctl
| ATA_SRST
, ioaddr
->ctl_addr
);
2151 udelay(20); /* FIXME: flush */
2152 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2153 ap
->last_ctl
= ap
->ctl
;
2155 /* wait the port to become ready */
2156 return ata_sff_wait_after_reset(&ap
->link
, devmask
, deadline
);
2160 * ata_sff_softreset - reset host port via ATA SRST
2161 * @link: ATA link to reset
2162 * @classes: resulting classes of attached devices
2163 * @deadline: deadline jiffies for the operation
2165 * Reset host port using ATA SRST.
2168 * Kernel thread context (may sleep)
2171 * 0 on success, -errno otherwise.
2173 int ata_sff_softreset(struct ata_link
*link
, unsigned int *classes
,
2174 unsigned long deadline
)
2176 struct ata_port
*ap
= link
->ap
;
2177 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
2178 unsigned int devmask
= 0;
2184 /* determine if device 0/1 are present */
2185 if (ata_devchk(ap
, 0))
2186 devmask
|= (1 << 0);
2187 if (slave_possible
&& ata_devchk(ap
, 1))
2188 devmask
|= (1 << 1);
2190 /* select device 0 again */
2191 ap
->ops
->sff_dev_select(ap
, 0);
2193 /* issue bus reset */
2194 DPRINTK("about to softreset, devmask=%x\n", devmask
);
2195 rc
= ata_bus_softreset(ap
, devmask
, deadline
);
2196 /* if link is occupied, -ENODEV too is an error */
2197 if (rc
&& (rc
!= -ENODEV
|| sata_scr_valid(link
))) {
2198 ata_link_printk(link
, KERN_ERR
, "SRST failed (errno=%d)\n", rc
);
2202 /* determine by signature whether we have ATA or ATAPI devices */
2203 classes
[0] = ata_sff_dev_classify(&link
->device
[0],
2204 devmask
& (1 << 0), &err
);
2205 if (slave_possible
&& err
!= 0x81)
2206 classes
[1] = ata_sff_dev_classify(&link
->device
[1],
2207 devmask
& (1 << 1), &err
);
2209 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes
[0], classes
[1]);
2212 EXPORT_SYMBOL_GPL(ata_sff_softreset
);
2215 * sata_sff_hardreset - reset host port via SATA phy reset
2216 * @link: link to reset
2217 * @class: resulting class of attached device
2218 * @deadline: deadline jiffies for the operation
2220 * SATA phy-reset host port using DET bits of SControl register,
2221 * wait for !BSY and classify the attached device.
2224 * Kernel thread context (may sleep)
2227 * 0 on success, -errno otherwise.
2229 int sata_sff_hardreset(struct ata_link
*link
, unsigned int *class,
2230 unsigned long deadline
)
2232 struct ata_eh_context
*ehc
= &link
->eh_context
;
2233 const unsigned long *timing
= sata_ehc_deb_timing(ehc
);
2237 rc
= sata_link_hardreset(link
, timing
, deadline
, &online
,
2238 ata_sff_check_ready
);
2240 *class = ata_sff_dev_classify(link
->device
, 1, NULL
);
2242 DPRINTK("EXIT, class=%u\n", *class);
2245 EXPORT_SYMBOL_GPL(sata_sff_hardreset
);
2248 * ata_sff_postreset - SFF postreset callback
2249 * @link: the target SFF ata_link
2250 * @classes: classes of attached devices
2252 * This function is invoked after a successful reset. It first
2253 * calls ata_std_postreset() and performs SFF specific postreset
2257 * Kernel thread context (may sleep)
2259 void ata_sff_postreset(struct ata_link
*link
, unsigned int *classes
)
2261 struct ata_port
*ap
= link
->ap
;
2263 ata_std_postreset(link
, classes
);
2265 /* is double-select really necessary? */
2266 if (classes
[0] != ATA_DEV_NONE
)
2267 ap
->ops
->sff_dev_select(ap
, 1);
2268 if (classes
[1] != ATA_DEV_NONE
)
2269 ap
->ops
->sff_dev_select(ap
, 0);
2271 /* bail out if no device is present */
2272 if (classes
[0] == ATA_DEV_NONE
&& classes
[1] == ATA_DEV_NONE
) {
2273 DPRINTK("EXIT, no device\n");
2277 /* set up device control */
2278 if (ap
->ioaddr
.ctl_addr
) {
2279 iowrite8(ap
->ctl
, ap
->ioaddr
.ctl_addr
);
2280 ap
->last_ctl
= ap
->ctl
;
2283 EXPORT_SYMBOL_GPL(ata_sff_postreset
);
2286 * ata_sff_drain_fifo - Stock FIFO drain logic for SFF controllers
2289 * Drain the FIFO and device of any stuck data following a command
2290 * failing to complete. In some cases this is neccessary before a
2291 * reset will recover the device.
2295 void ata_sff_drain_fifo(struct ata_queued_cmd
*qc
)
2298 struct ata_port
*ap
;
2300 /* We only need to flush incoming data when a command was running */
2301 if (qc
== NULL
|| qc
->dma_dir
== DMA_TO_DEVICE
)
2305 /* Drain up to 64K of data before we give up this recovery method */
2306 for (count
= 0; (ap
->ops
->sff_check_status(ap
) & ATA_DRQ
)
2307 && count
< 65536; count
+= 2)
2308 ioread16(ap
->ioaddr
.data_addr
);
2310 /* Can become DEBUG later */
2312 ata_port_printk(ap
, KERN_DEBUG
,
2313 "drained %d bytes to clear DRQ.\n", count
);
2316 EXPORT_SYMBOL_GPL(ata_sff_drain_fifo
);
2319 * ata_sff_error_handler - Stock error handler for BMDMA controller
2320 * @ap: port to handle error for
2322 * Stock error handler for SFF controller. It can handle both
2323 * PATA and SATA controllers. Many controllers should be able to
2324 * use this EH as-is or with some added handling before and
2328 * Kernel thread context (may sleep)
2330 void ata_sff_error_handler(struct ata_port
*ap
)
2332 ata_reset_fn_t softreset
= ap
->ops
->softreset
;
2333 ata_reset_fn_t hardreset
= ap
->ops
->hardreset
;
2334 struct ata_queued_cmd
*qc
;
2335 unsigned long flags
;
2338 qc
= __ata_qc_from_tag(ap
, ap
->link
.active_tag
);
2339 if (qc
&& !(qc
->flags
& ATA_QCFLAG_FAILED
))
2342 /* reset PIO HSM and stop DMA engine */
2343 spin_lock_irqsave(ap
->lock
, flags
);
2345 ap
->hsm_task_state
= HSM_ST_IDLE
;
2347 if (ap
->ioaddr
.bmdma_addr
&&
2348 qc
&& (qc
->tf
.protocol
== ATA_PROT_DMA
||
2349 qc
->tf
.protocol
== ATAPI_PROT_DMA
)) {
2352 host_stat
= ap
->ops
->bmdma_status(ap
);
2354 /* BMDMA controllers indicate host bus error by
2355 * setting DMA_ERR bit and timing out. As it wasn't
2356 * really a timeout event, adjust error mask and
2357 * cancel frozen state.
2359 if (qc
->err_mask
== AC_ERR_TIMEOUT
2360 && (host_stat
& ATA_DMA_ERR
)) {
2361 qc
->err_mask
= AC_ERR_HOST_BUS
;
2365 ap
->ops
->bmdma_stop(qc
);
2368 ata_sff_sync(ap
); /* FIXME: We don't need this */
2369 ap
->ops
->sff_check_status(ap
);
2370 ap
->ops
->sff_irq_clear(ap
);
2371 /* We *MUST* do FIFO draining before we issue a reset as several
2372 * devices helpfully clear their internal state and will lock solid
2373 * if we touch the data port post reset. Pass qc in case anyone wants
2374 * to do different PIO/DMA recovery or has per command fixups
2376 if (ap
->ops
->drain_fifo
)
2377 ap
->ops
->drain_fifo(qc
);
2379 spin_unlock_irqrestore(ap
->lock
, flags
);
2382 ata_eh_thaw_port(ap
);
2384 /* PIO and DMA engines have been stopped, perform recovery */
2386 /* Ignore ata_sff_softreset if ctl isn't accessible and
2387 * built-in hardresets if SCR access isn't available.
2389 if (softreset
== ata_sff_softreset
&& !ap
->ioaddr
.ctl_addr
)
2391 if (ata_is_builtin_hardreset(hardreset
) && !sata_scr_valid(&ap
->link
))
2394 ata_do_eh(ap
, ap
->ops
->prereset
, softreset
, hardreset
,
2395 ap
->ops
->postreset
);
2397 EXPORT_SYMBOL_GPL(ata_sff_error_handler
);
2400 * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
2401 * @qc: internal command to clean up
2404 * Kernel thread context (may sleep)
2406 void ata_sff_post_internal_cmd(struct ata_queued_cmd
*qc
)
2408 struct ata_port
*ap
= qc
->ap
;
2409 unsigned long flags
;
2411 spin_lock_irqsave(ap
->lock
, flags
);
2413 ap
->hsm_task_state
= HSM_ST_IDLE
;
2415 if (ap
->ioaddr
.bmdma_addr
)
2416 ap
->ops
->bmdma_stop(qc
);
2418 spin_unlock_irqrestore(ap
->lock
, flags
);
2420 EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd
);
2423 * ata_sff_port_start - Set port up for dma.
2424 * @ap: Port to initialize
2426 * Called just after data structures for each port are
2427 * initialized. Allocates space for PRD table if the device
2428 * is DMA capable SFF.
2430 * May be used as the port_start() entry in ata_port_operations.
2433 * Inherited from caller.
2435 int ata_sff_port_start(struct ata_port
*ap
)
2437 if (ap
->ioaddr
.bmdma_addr
)
2438 return ata_port_start(ap
);
2441 EXPORT_SYMBOL_GPL(ata_sff_port_start
);
2444 * ata_sff_port_start32 - Set port up for dma.
2445 * @ap: Port to initialize
2447 * Called just after data structures for each port are
2448 * initialized. Allocates space for PRD table if the device
2449 * is DMA capable SFF.
2451 * May be used as the port_start() entry in ata_port_operations for
2452 * devices that are capable of 32bit PIO.
2455 * Inherited from caller.
2457 int ata_sff_port_start32(struct ata_port
*ap
)
2459 ap
->pflags
|= ATA_PFLAG_PIO32
| ATA_PFLAG_PIO32CHANGE
;
2460 if (ap
->ioaddr
.bmdma_addr
)
2461 return ata_port_start(ap
);
2464 EXPORT_SYMBOL_GPL(ata_sff_port_start32
);
2467 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
2468 * @ioaddr: IO address structure to be initialized
2470 * Utility function which initializes data_addr, error_addr,
2471 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2472 * device_addr, status_addr, and command_addr to standard offsets
2473 * relative to cmd_addr.
2475 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2477 void ata_sff_std_ports(struct ata_ioports
*ioaddr
)
2479 ioaddr
->data_addr
= ioaddr
->cmd_addr
+ ATA_REG_DATA
;
2480 ioaddr
->error_addr
= ioaddr
->cmd_addr
+ ATA_REG_ERR
;
2481 ioaddr
->feature_addr
= ioaddr
->cmd_addr
+ ATA_REG_FEATURE
;
2482 ioaddr
->nsect_addr
= ioaddr
->cmd_addr
+ ATA_REG_NSECT
;
2483 ioaddr
->lbal_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAL
;
2484 ioaddr
->lbam_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAM
;
2485 ioaddr
->lbah_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAH
;
2486 ioaddr
->device_addr
= ioaddr
->cmd_addr
+ ATA_REG_DEVICE
;
2487 ioaddr
->status_addr
= ioaddr
->cmd_addr
+ ATA_REG_STATUS
;
2488 ioaddr
->command_addr
= ioaddr
->cmd_addr
+ ATA_REG_CMD
;
2490 EXPORT_SYMBOL_GPL(ata_sff_std_ports
);
2492 unsigned long ata_bmdma_mode_filter(struct ata_device
*adev
,
2493 unsigned long xfer_mask
)
2495 /* Filter out DMA modes if the device has been configured by
2496 the BIOS as PIO only */
2498 if (adev
->link
->ap
->ioaddr
.bmdma_addr
== NULL
)
2499 xfer_mask
&= ~(ATA_MASK_MWDMA
| ATA_MASK_UDMA
);
2502 EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter
);
2505 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2506 * @qc: Info associated with this ATA transaction.
2509 * spin_lock_irqsave(host lock)
2511 void ata_bmdma_setup(struct ata_queued_cmd
*qc
)
2513 struct ata_port
*ap
= qc
->ap
;
2514 unsigned int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
2517 /* load PRD table addr. */
2518 mb(); /* make sure PRD table writes are visible to controller */
2519 iowrite32(ap
->prd_dma
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_TABLE_OFS
);
2521 /* specify data direction, triple-check start bit is clear */
2522 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2523 dmactl
&= ~(ATA_DMA_WR
| ATA_DMA_START
);
2525 dmactl
|= ATA_DMA_WR
;
2526 iowrite8(dmactl
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2528 /* issue r/w command */
2529 ap
->ops
->sff_exec_command(ap
, &qc
->tf
);
2531 EXPORT_SYMBOL_GPL(ata_bmdma_setup
);
2534 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2535 * @qc: Info associated with this ATA transaction.
2538 * spin_lock_irqsave(host lock)
2540 void ata_bmdma_start(struct ata_queued_cmd
*qc
)
2542 struct ata_port
*ap
= qc
->ap
;
2545 /* start host DMA transaction */
2546 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2547 iowrite8(dmactl
| ATA_DMA_START
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2549 /* Strictly, one may wish to issue an ioread8() here, to
2550 * flush the mmio write. However, control also passes
2551 * to the hardware at this point, and it will interrupt
2552 * us when we are to resume control. So, in effect,
2553 * we don't care when the mmio write flushes.
2554 * Further, a read of the DMA status register _immediately_
2555 * following the write may not be what certain flaky hardware
2556 * is expected, so I think it is best to not add a readb()
2557 * without first all the MMIO ATA cards/mobos.
2558 * Or maybe I'm just being paranoid.
2560 * FIXME: The posting of this write means I/O starts are
2561 * unneccessarily delayed for MMIO
2564 EXPORT_SYMBOL_GPL(ata_bmdma_start
);
2567 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2568 * @qc: Command we are ending DMA for
2570 * Clears the ATA_DMA_START flag in the dma control register
2572 * May be used as the bmdma_stop() entry in ata_port_operations.
2575 * spin_lock_irqsave(host lock)
2577 void ata_bmdma_stop(struct ata_queued_cmd
*qc
)
2579 struct ata_port
*ap
= qc
->ap
;
2580 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
2582 /* clear start/stop bit */
2583 iowrite8(ioread8(mmio
+ ATA_DMA_CMD
) & ~ATA_DMA_START
,
2584 mmio
+ ATA_DMA_CMD
);
2586 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
2587 ata_sff_dma_pause(ap
);
2589 EXPORT_SYMBOL_GPL(ata_bmdma_stop
);
2592 * ata_bmdma_status - Read PCI IDE BMDMA status
2593 * @ap: Port associated with this ATA transaction.
2595 * Read and return BMDMA status register.
2597 * May be used as the bmdma_status() entry in ata_port_operations.
2600 * spin_lock_irqsave(host lock)
2602 u8
ata_bmdma_status(struct ata_port
*ap
)
2604 return ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
2606 EXPORT_SYMBOL_GPL(ata_bmdma_status
);
2609 * ata_bus_reset - reset host port and associated ATA channel
2610 * @ap: port to reset
2612 * This is typically the first time we actually start issuing
2613 * commands to the ATA channel. We wait for BSY to clear, then
2614 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2615 * result. Determine what devices, if any, are on the channel
2616 * by looking at the device 0/1 error register. Look at the signature
2617 * stored in each device's taskfile registers, to determine if
2618 * the device is ATA or ATAPI.
2621 * PCI/etc. bus probe sem.
2622 * Obtains host lock.
2625 * Sets ATA_FLAG_DISABLED if bus reset fails.
2628 * This function is only for drivers which still use old EH and
2629 * will be removed soon.
2631 void ata_bus_reset(struct ata_port
*ap
)
2633 struct ata_device
*device
= ap
->link
.device
;
2634 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2635 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
2637 unsigned int dev0
, dev1
= 0, devmask
= 0;
2640 DPRINTK("ENTER, host %u, port %u\n", ap
->print_id
, ap
->port_no
);
2642 /* determine if device 0/1 are present */
2643 if (ap
->flags
& ATA_FLAG_SATA_RESET
)
2646 dev0
= ata_devchk(ap
, 0);
2648 dev1
= ata_devchk(ap
, 1);
2652 devmask
|= (1 << 0);
2654 devmask
|= (1 << 1);
2656 /* select device 0 again */
2657 ap
->ops
->sff_dev_select(ap
, 0);
2659 /* issue bus reset */
2660 if (ap
->flags
& ATA_FLAG_SRST
) {
2661 rc
= ata_bus_softreset(ap
, devmask
,
2662 ata_deadline(jiffies
, 40000));
2663 if (rc
&& rc
!= -ENODEV
)
2668 * determine by signature whether we have ATA or ATAPI devices
2670 device
[0].class = ata_sff_dev_classify(&device
[0], dev0
, &err
);
2671 if ((slave_possible
) && (err
!= 0x81))
2672 device
[1].class = ata_sff_dev_classify(&device
[1], dev1
, &err
);
2674 /* is double-select really necessary? */
2675 if (device
[1].class != ATA_DEV_NONE
)
2676 ap
->ops
->sff_dev_select(ap
, 1);
2677 if (device
[0].class != ATA_DEV_NONE
)
2678 ap
->ops
->sff_dev_select(ap
, 0);
2680 /* if no devices were detected, disable this port */
2681 if ((device
[0].class == ATA_DEV_NONE
) &&
2682 (device
[1].class == ATA_DEV_NONE
))
2685 if (ap
->flags
& (ATA_FLAG_SATA_RESET
| ATA_FLAG_SRST
)) {
2686 /* set up device control for ATA_FLAG_SATA_RESET */
2687 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2688 ap
->last_ctl
= ap
->ctl
;
2695 ata_port_printk(ap
, KERN_ERR
, "disabling port\n");
2696 ata_port_disable(ap
);
2700 EXPORT_SYMBOL_GPL(ata_bus_reset
);
2705 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
2708 * Some PCI ATA devices report simplex mode but in fact can be told to
2709 * enter non simplex mode. This implements the necessary logic to
2710 * perform the task on such devices. Calling it on other devices will
2711 * have -undefined- behaviour.
2713 int ata_pci_bmdma_clear_simplex(struct pci_dev
*pdev
)
2715 unsigned long bmdma
= pci_resource_start(pdev
, 4);
2721 simplex
= inb(bmdma
+ 0x02);
2722 outb(simplex
& 0x60, bmdma
+ 0x02);
2723 simplex
= inb(bmdma
+ 0x02);
2728 EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex
);
2731 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
2732 * @host: target ATA host
2734 * Acquire PCI BMDMA resources and initialize @host accordingly.
2737 * Inherited from calling layer (may sleep).
2740 * 0 on success, -errno otherwise.
2742 int ata_pci_bmdma_init(struct ata_host
*host
)
2744 struct device
*gdev
= host
->dev
;
2745 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2748 /* No BAR4 allocation: No DMA */
2749 if (pci_resource_start(pdev
, 4) == 0)
2752 /* TODO: If we get no DMA mask we should fall back to PIO */
2753 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
2756 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
2760 /* request and iomap DMA region */
2761 rc
= pcim_iomap_regions(pdev
, 1 << 4, dev_driver_string(gdev
));
2763 dev_printk(KERN_ERR
, gdev
, "failed to request/iomap BAR4\n");
2766 host
->iomap
= pcim_iomap_table(pdev
);
2768 for (i
= 0; i
< 2; i
++) {
2769 struct ata_port
*ap
= host
->ports
[i
];
2770 void __iomem
*bmdma
= host
->iomap
[4] + 8 * i
;
2772 if (ata_port_is_dummy(ap
))
2775 ap
->ioaddr
.bmdma_addr
= bmdma
;
2776 if ((!(ap
->flags
& ATA_FLAG_IGN_SIMPLEX
)) &&
2777 (ioread8(bmdma
+ 2) & 0x80))
2778 host
->flags
|= ATA_HOST_SIMPLEX
;
2780 ata_port_desc(ap
, "bmdma 0x%llx",
2781 (unsigned long long)pci_resource_start(pdev
, 4) + 8 * i
);
2786 EXPORT_SYMBOL_GPL(ata_pci_bmdma_init
);
2788 static int ata_resources_present(struct pci_dev
*pdev
, int port
)
2792 /* Check the PCI resources for this channel are enabled */
2794 for (i
= 0; i
< 2; i
++) {
2795 if (pci_resource_start(pdev
, port
+ i
) == 0 ||
2796 pci_resource_len(pdev
, port
+ i
) == 0)
2803 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
2804 * @host: target ATA host
2806 * Acquire native PCI ATA resources for @host and initialize the
2807 * first two ports of @host accordingly. Ports marked dummy are
2808 * skipped and allocation failure makes the port dummy.
2810 * Note that native PCI resources are valid even for legacy hosts
2811 * as we fix up pdev resources array early in boot, so this
2812 * function can be used for both native and legacy SFF hosts.
2815 * Inherited from calling layer (may sleep).
2818 * 0 if at least one port is initialized, -ENODEV if no port is
2821 int ata_pci_sff_init_host(struct ata_host
*host
)
2823 struct device
*gdev
= host
->dev
;
2824 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2825 unsigned int mask
= 0;
2828 /* request, iomap BARs and init port addresses accordingly */
2829 for (i
= 0; i
< 2; i
++) {
2830 struct ata_port
*ap
= host
->ports
[i
];
2832 void __iomem
* const *iomap
;
2834 if (ata_port_is_dummy(ap
))
2837 /* Discard disabled ports. Some controllers show
2838 * their unused channels this way. Disabled ports are
2841 if (!ata_resources_present(pdev
, i
)) {
2842 ap
->ops
= &ata_dummy_port_ops
;
2846 rc
= pcim_iomap_regions(pdev
, 0x3 << base
,
2847 dev_driver_string(gdev
));
2849 dev_printk(KERN_WARNING
, gdev
,
2850 "failed to request/iomap BARs for port %d "
2851 "(errno=%d)\n", i
, rc
);
2853 pcim_pin_device(pdev
);
2854 ap
->ops
= &ata_dummy_port_ops
;
2857 host
->iomap
= iomap
= pcim_iomap_table(pdev
);
2859 ap
->ioaddr
.cmd_addr
= iomap
[base
];
2860 ap
->ioaddr
.altstatus_addr
=
2861 ap
->ioaddr
.ctl_addr
= (void __iomem
*)
2862 ((unsigned long)iomap
[base
+ 1] | ATA_PCI_CTL_OFS
);
2863 ata_sff_std_ports(&ap
->ioaddr
);
2865 ata_port_desc(ap
, "cmd 0x%llx ctl 0x%llx",
2866 (unsigned long long)pci_resource_start(pdev
, base
),
2867 (unsigned long long)pci_resource_start(pdev
, base
+ 1));
2873 dev_printk(KERN_ERR
, gdev
, "no available native port\n");
2879 EXPORT_SYMBOL_GPL(ata_pci_sff_init_host
);
2882 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
2883 * @pdev: target PCI device
2884 * @ppi: array of port_info, must be enough for two ports
2885 * @r_host: out argument for the initialized ATA host
2887 * Helper to allocate ATA host for @pdev, acquire all native PCI
2888 * resources and initialize it accordingly in one go.
2891 * Inherited from calling layer (may sleep).
2894 * 0 on success, -errno otherwise.
2896 int ata_pci_sff_prepare_host(struct pci_dev
*pdev
,
2897 const struct ata_port_info
* const *ppi
,
2898 struct ata_host
**r_host
)
2900 struct ata_host
*host
;
2903 if (!devres_open_group(&pdev
->dev
, NULL
, GFP_KERNEL
))
2906 host
= ata_host_alloc_pinfo(&pdev
->dev
, ppi
, 2);
2908 dev_printk(KERN_ERR
, &pdev
->dev
,
2909 "failed to allocate ATA host\n");
2914 rc
= ata_pci_sff_init_host(host
);
2918 /* init DMA related stuff */
2919 rc
= ata_pci_bmdma_init(host
);
2923 devres_remove_group(&pdev
->dev
, NULL
);
2928 /* This is necessary because PCI and iomap resources are
2929 * merged and releasing the top group won't release the
2930 * acquired resources if some of those have been acquired
2931 * before entering this function.
2933 pcim_iounmap_regions(pdev
, 0xf);
2935 devres_release_group(&pdev
->dev
, NULL
);
2938 EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host
);
2941 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
2942 * @host: target SFF ATA host
2943 * @irq_handler: irq_handler used when requesting IRQ(s)
2944 * @sht: scsi_host_template to use when registering the host
2946 * This is the counterpart of ata_host_activate() for SFF ATA
2947 * hosts. This separate helper is necessary because SFF hosts
2948 * use two separate interrupts in legacy mode.
2951 * Inherited from calling layer (may sleep).
2954 * 0 on success, -errno otherwise.
2956 int ata_pci_sff_activate_host(struct ata_host
*host
,
2957 irq_handler_t irq_handler
,
2958 struct scsi_host_template
*sht
)
2960 struct device
*dev
= host
->dev
;
2961 struct pci_dev
*pdev
= to_pci_dev(dev
);
2962 const char *drv_name
= dev_driver_string(host
->dev
);
2963 int legacy_mode
= 0, rc
;
2965 rc
= ata_host_start(host
);
2969 if ((pdev
->class >> 8) == PCI_CLASS_STORAGE_IDE
) {
2972 /* TODO: What if one channel is in native mode ... */
2973 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, &tmp8
);
2974 mask
= (1 << 2) | (1 << 0);
2975 if ((tmp8
& mask
) != mask
)
2977 #if defined(CONFIG_NO_ATA_LEGACY)
2978 /* Some platforms with PCI limits cannot address compat
2979 port space. In that case we punt if their firmware has
2980 left a device in compatibility mode */
2982 printk(KERN_ERR
"ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
2988 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
2991 if (!legacy_mode
&& pdev
->irq
) {
2992 rc
= devm_request_irq(dev
, pdev
->irq
, irq_handler
,
2993 IRQF_SHARED
, drv_name
, host
);
2997 ata_port_desc(host
->ports
[0], "irq %d", pdev
->irq
);
2998 ata_port_desc(host
->ports
[1], "irq %d", pdev
->irq
);
2999 } else if (legacy_mode
) {
3000 if (!ata_port_is_dummy(host
->ports
[0])) {
3001 rc
= devm_request_irq(dev
, ATA_PRIMARY_IRQ(pdev
),
3002 irq_handler
, IRQF_SHARED
,
3007 ata_port_desc(host
->ports
[0], "irq %d",
3008 ATA_PRIMARY_IRQ(pdev
));
3011 if (!ata_port_is_dummy(host
->ports
[1])) {
3012 rc
= devm_request_irq(dev
, ATA_SECONDARY_IRQ(pdev
),
3013 irq_handler
, IRQF_SHARED
,
3018 ata_port_desc(host
->ports
[1], "irq %d",
3019 ATA_SECONDARY_IRQ(pdev
));
3023 rc
= ata_host_register(host
, sht
);
3026 devres_remove_group(dev
, NULL
);
3028 devres_release_group(dev
, NULL
);
3032 EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host
);
3035 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
3036 * @pdev: Controller to be initialized
3037 * @ppi: array of port_info, must be enough for two ports
3038 * @sht: scsi_host_template to use when registering the host
3039 * @host_priv: host private_data
3040 * @hflag: host flags
3042 * This is a helper function which can be called from a driver's
3043 * xxx_init_one() probe function if the hardware uses traditional
3044 * IDE taskfile registers.
3046 * This function calls pci_enable_device(), reserves its register
3047 * regions, sets the dma mask, enables bus master mode, and calls
3051 * Nobody makes a single channel controller that appears solely as
3052 * the secondary legacy port on PCI.
3055 * Inherited from PCI layer (may sleep).
3058 * Zero on success, negative on errno-based value on error.
3060 int ata_pci_sff_init_one(struct pci_dev
*pdev
,
3061 const struct ata_port_info
* const *ppi
,
3062 struct scsi_host_template
*sht
, void *host_priv
, int hflag
)
3064 struct device
*dev
= &pdev
->dev
;
3065 const struct ata_port_info
*pi
= NULL
;
3066 struct ata_host
*host
= NULL
;
3071 /* look up the first valid port_info */
3072 for (i
= 0; i
< 2 && ppi
[i
]; i
++) {
3073 if (ppi
[i
]->port_ops
!= &ata_dummy_port_ops
) {
3080 dev_printk(KERN_ERR
, &pdev
->dev
,
3081 "no valid port_info specified\n");
3085 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
3088 rc
= pcim_enable_device(pdev
);
3092 /* prepare and activate SFF host */
3093 rc
= ata_pci_sff_prepare_host(pdev
, ppi
, &host
);
3096 host
->private_data
= host_priv
;
3097 host
->flags
|= hflag
;
3099 pci_set_master(pdev
);
3100 rc
= ata_pci_sff_activate_host(host
, ata_sff_interrupt
, sht
);
3103 devres_remove_group(&pdev
->dev
, NULL
);
3105 devres_release_group(&pdev
->dev
, NULL
);
3109 EXPORT_SYMBOL_GPL(ata_pci_sff_init_one
);
3111 #endif /* CONFIG_PCI */