2 * libata-sff.c - helper library for PCI IDE BMDMA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/pci.h>
37 #include <linux/libata.h>
42 * ata_irq_on - Enable interrupts on a port.
43 * @ap: Port on which interrupts are enabled.
45 * Enable interrupts on a legacy IDE device using MMIO or PIO,
46 * wait for idle, clear any pending interrupts.
49 * Inherited from caller.
51 u8
ata_irq_on(struct ata_port
*ap
)
53 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
57 ap
->last_ctl
= ap
->ctl
;
59 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
60 tmp
= ata_wait_idle(ap
);
62 ap
->ops
->irq_clear(ap
);
67 u8
ata_dummy_irq_on (struct ata_port
*ap
) { return 0; }
70 * ata_irq_ack - Acknowledge a device interrupt.
71 * @ap: Port on which interrupts are enabled.
73 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
74 * or BUSY+DRQ clear). Obtain dma status and port status from
75 * device. Clear the interrupt. Return port status.
80 u8
ata_irq_ack(struct ata_port
*ap
, unsigned int chk_drq
)
82 unsigned int bits
= chk_drq
? ATA_BUSY
| ATA_DRQ
: ATA_BUSY
;
83 u8 host_stat
= 0, post_stat
= 0, status
;
85 status
= ata_busy_wait(ap
, bits
, 1000);
88 printk(KERN_ERR
"abnormal status 0x%X\n", status
);
90 if (ap
->ioaddr
.bmdma_addr
) {
91 /* get controller status; clear intr, err bits */
92 host_stat
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
93 iowrite8(host_stat
| ATA_DMA_INTR
| ATA_DMA_ERR
,
94 ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
96 post_stat
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
99 printk(KERN_INFO
"%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
101 host_stat
, post_stat
, status
);
105 u8
ata_dummy_irq_ack(struct ata_port
*ap
, unsigned int chk_drq
) { return 0; }
108 * ata_tf_load - send taskfile registers to host controller
109 * @ap: Port to which output is sent
110 * @tf: ATA taskfile register set
112 * Outputs ATA taskfile to standard ATA host controller.
115 * Inherited from caller.
118 void ata_tf_load(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
120 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
121 unsigned int is_addr
= tf
->flags
& ATA_TFLAG_ISADDR
;
123 if (tf
->ctl
!= ap
->last_ctl
) {
124 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
125 ap
->last_ctl
= tf
->ctl
;
129 if (is_addr
&& (tf
->flags
& ATA_TFLAG_LBA48
)) {
130 iowrite8(tf
->hob_feature
, ioaddr
->feature_addr
);
131 iowrite8(tf
->hob_nsect
, ioaddr
->nsect_addr
);
132 iowrite8(tf
->hob_lbal
, ioaddr
->lbal_addr
);
133 iowrite8(tf
->hob_lbam
, ioaddr
->lbam_addr
);
134 iowrite8(tf
->hob_lbah
, ioaddr
->lbah_addr
);
135 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
144 iowrite8(tf
->feature
, ioaddr
->feature_addr
);
145 iowrite8(tf
->nsect
, ioaddr
->nsect_addr
);
146 iowrite8(tf
->lbal
, ioaddr
->lbal_addr
);
147 iowrite8(tf
->lbam
, ioaddr
->lbam_addr
);
148 iowrite8(tf
->lbah
, ioaddr
->lbah_addr
);
149 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
157 if (tf
->flags
& ATA_TFLAG_DEVICE
) {
158 iowrite8(tf
->device
, ioaddr
->device_addr
);
159 VPRINTK("device 0x%X\n", tf
->device
);
166 * ata_exec_command - issue ATA command to host controller
167 * @ap: port to which command is being issued
168 * @tf: ATA taskfile register set
170 * Issues ATA command, with proper synchronization with interrupt
171 * handler / other threads.
174 * spin_lock_irqsave(host lock)
176 void ata_exec_command(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
178 DPRINTK("ata%u: cmd 0x%X\n", ap
->print_id
, tf
->command
);
180 iowrite8(tf
->command
, ap
->ioaddr
.command_addr
);
185 * ata_tf_read - input device's ATA taskfile shadow registers
186 * @ap: Port from which input is read
187 * @tf: ATA taskfile register set for storing input
189 * Reads ATA taskfile registers for currently-selected device
193 * Inherited from caller.
195 void ata_tf_read(struct ata_port
*ap
, struct ata_taskfile
*tf
)
197 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
199 tf
->command
= ata_check_status(ap
);
200 tf
->feature
= ioread8(ioaddr
->error_addr
);
201 tf
->nsect
= ioread8(ioaddr
->nsect_addr
);
202 tf
->lbal
= ioread8(ioaddr
->lbal_addr
);
203 tf
->lbam
= ioread8(ioaddr
->lbam_addr
);
204 tf
->lbah
= ioread8(ioaddr
->lbah_addr
);
205 tf
->device
= ioread8(ioaddr
->device_addr
);
207 if (tf
->flags
& ATA_TFLAG_LBA48
) {
208 iowrite8(tf
->ctl
| ATA_HOB
, ioaddr
->ctl_addr
);
209 tf
->hob_feature
= ioread8(ioaddr
->error_addr
);
210 tf
->hob_nsect
= ioread8(ioaddr
->nsect_addr
);
211 tf
->hob_lbal
= ioread8(ioaddr
->lbal_addr
);
212 tf
->hob_lbam
= ioread8(ioaddr
->lbam_addr
);
213 tf
->hob_lbah
= ioread8(ioaddr
->lbah_addr
);
214 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
215 ap
->last_ctl
= tf
->ctl
;
220 * ata_check_status - Read device status reg & clear interrupt
221 * @ap: port where the device is
223 * Reads ATA taskfile status register for currently-selected device
224 * and return its value. This also clears pending interrupts
228 * Inherited from caller.
230 u8
ata_check_status(struct ata_port
*ap
)
232 return ioread8(ap
->ioaddr
.status_addr
);
236 * ata_altstatus - Read device alternate status reg
237 * @ap: port where the device is
239 * Reads ATA taskfile alternate status register for
240 * currently-selected device and return its value.
242 * Note: may NOT be used as the check_altstatus() entry in
243 * ata_port_operations.
246 * Inherited from caller.
248 u8
ata_altstatus(struct ata_port
*ap
)
250 if (ap
->ops
->check_altstatus
)
251 return ap
->ops
->check_altstatus(ap
);
253 return ioread8(ap
->ioaddr
.altstatus_addr
);
257 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
258 * @qc: Info associated with this ATA transaction.
261 * spin_lock_irqsave(host lock)
263 void ata_bmdma_setup(struct ata_queued_cmd
*qc
)
265 struct ata_port
*ap
= qc
->ap
;
266 unsigned int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
269 /* load PRD table addr. */
270 mb(); /* make sure PRD table writes are visible to controller */
271 iowrite32(ap
->prd_dma
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_TABLE_OFS
);
273 /* specify data direction, triple-check start bit is clear */
274 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
275 dmactl
&= ~(ATA_DMA_WR
| ATA_DMA_START
);
277 dmactl
|= ATA_DMA_WR
;
278 iowrite8(dmactl
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
280 /* issue r/w command */
281 ap
->ops
->exec_command(ap
, &qc
->tf
);
285 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
286 * @qc: Info associated with this ATA transaction.
289 * spin_lock_irqsave(host lock)
291 void ata_bmdma_start (struct ata_queued_cmd
*qc
)
293 struct ata_port
*ap
= qc
->ap
;
296 /* start host DMA transaction */
297 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
298 iowrite8(dmactl
| ATA_DMA_START
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
300 /* Strictly, one may wish to issue an ioread8() here, to
301 * flush the mmio write. However, control also passes
302 * to the hardware at this point, and it will interrupt
303 * us when we are to resume control. So, in effect,
304 * we don't care when the mmio write flushes.
305 * Further, a read of the DMA status register _immediately_
306 * following the write may not be what certain flaky hardware
307 * is expected, so I think it is best to not add a readb()
308 * without first all the MMIO ATA cards/mobos.
309 * Or maybe I'm just being paranoid.
311 * FIXME: The posting of this write means I/O starts are
312 * unneccessarily delayed for MMIO
317 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
318 * @ap: Port associated with this ATA transaction.
320 * Clear interrupt and error flags in DMA status register.
322 * May be used as the irq_clear() entry in ata_port_operations.
325 * spin_lock_irqsave(host lock)
327 void ata_bmdma_irq_clear(struct ata_port
*ap
)
329 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
334 iowrite8(ioread8(mmio
+ ATA_DMA_STATUS
), mmio
+ ATA_DMA_STATUS
);
338 * ata_bmdma_status - Read PCI IDE BMDMA status
339 * @ap: Port associated with this ATA transaction.
341 * Read and return BMDMA status register.
343 * May be used as the bmdma_status() entry in ata_port_operations.
346 * spin_lock_irqsave(host lock)
348 u8
ata_bmdma_status(struct ata_port
*ap
)
350 return ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
354 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
355 * @qc: Command we are ending DMA for
357 * Clears the ATA_DMA_START flag in the dma control register
359 * May be used as the bmdma_stop() entry in ata_port_operations.
362 * spin_lock_irqsave(host lock)
364 void ata_bmdma_stop(struct ata_queued_cmd
*qc
)
366 struct ata_port
*ap
= qc
->ap
;
367 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
369 /* clear start/stop bit */
370 iowrite8(ioread8(mmio
+ ATA_DMA_CMD
) & ~ATA_DMA_START
,
373 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
374 ata_altstatus(ap
); /* dummy read */
378 * ata_bmdma_freeze - Freeze BMDMA controller port
379 * @ap: port to freeze
381 * Freeze BMDMA controller port.
384 * Inherited from caller.
386 void ata_bmdma_freeze(struct ata_port
*ap
)
388 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
391 ap
->last_ctl
= ap
->ctl
;
393 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
395 /* Under certain circumstances, some controllers raise IRQ on
396 * ATA_NIEN manipulation. Also, many controllers fail to mask
397 * previously pending IRQ on ATA_NIEN assertion. Clear it.
401 ap
->ops
->irq_clear(ap
);
405 * ata_bmdma_thaw - Thaw BMDMA controller port
408 * Thaw BMDMA controller port.
411 * Inherited from caller.
413 void ata_bmdma_thaw(struct ata_port
*ap
)
415 /* clear & re-enable interrupts */
417 ap
->ops
->irq_clear(ap
);
422 * ata_bmdma_drive_eh - Perform EH with given methods for BMDMA controller
423 * @ap: port to handle error for
424 * @prereset: prereset method (can be NULL)
425 * @softreset: softreset method (can be NULL)
426 * @hardreset: hardreset method (can be NULL)
427 * @postreset: postreset method (can be NULL)
429 * Handle error for ATA BMDMA controller. It can handle both
430 * PATA and SATA controllers. Many controllers should be able to
431 * use this EH as-is or with some added handling before and
434 * This function is intended to be used for constructing
435 * ->error_handler callback by low level drivers.
438 * Kernel thread context (may sleep)
440 void ata_bmdma_drive_eh(struct ata_port
*ap
, ata_prereset_fn_t prereset
,
441 ata_reset_fn_t softreset
, ata_reset_fn_t hardreset
,
442 ata_postreset_fn_t postreset
)
444 struct ata_queued_cmd
*qc
;
448 qc
= __ata_qc_from_tag(ap
, ap
->active_tag
);
449 if (qc
&& !(qc
->flags
& ATA_QCFLAG_FAILED
))
452 /* reset PIO HSM and stop DMA engine */
453 spin_lock_irqsave(ap
->lock
, flags
);
455 ap
->hsm_task_state
= HSM_ST_IDLE
;
457 if (qc
&& (qc
->tf
.protocol
== ATA_PROT_DMA
||
458 qc
->tf
.protocol
== ATA_PROT_ATAPI_DMA
)) {
461 host_stat
= ap
->ops
->bmdma_status(ap
);
463 /* BMDMA controllers indicate host bus error by
464 * setting DMA_ERR bit and timing out. As it wasn't
465 * really a timeout event, adjust error mask and
466 * cancel frozen state.
468 if (qc
->err_mask
== AC_ERR_TIMEOUT
&& (host_stat
& ATA_DMA_ERR
)) {
469 qc
->err_mask
= AC_ERR_HOST_BUS
;
473 ap
->ops
->bmdma_stop(qc
);
478 ap
->ops
->irq_clear(ap
);
480 spin_unlock_irqrestore(ap
->lock
, flags
);
483 ata_eh_thaw_port(ap
);
485 /* PIO and DMA engines have been stopped, perform recovery */
486 ata_do_eh(ap
, prereset
, softreset
, hardreset
, postreset
);
490 * ata_bmdma_error_handler - Stock error handler for BMDMA controller
491 * @ap: port to handle error for
493 * Stock error handler for BMDMA controller.
496 * Kernel thread context (may sleep)
498 void ata_bmdma_error_handler(struct ata_port
*ap
)
500 ata_reset_fn_t hardreset
;
503 if (sata_scr_valid(ap
))
504 hardreset
= sata_std_hardreset
;
506 ata_bmdma_drive_eh(ap
, ata_std_prereset
, ata_std_softreset
, hardreset
,
511 * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for
513 * @qc: internal command to clean up
516 * Kernel thread context (may sleep)
518 void ata_bmdma_post_internal_cmd(struct ata_queued_cmd
*qc
)
520 if (qc
->ap
->ioaddr
.bmdma_addr
)
525 * ata_sff_port_start - Set port up for dma.
526 * @ap: Port to initialize
528 * Called just after data structures for each port are
529 * initialized. Allocates space for PRD table if the device
530 * is DMA capable SFF.
532 * May be used as the port_start() entry in ata_port_operations.
535 * Inherited from caller.
538 int ata_sff_port_start(struct ata_port
*ap
)
540 if (ap
->ioaddr
.bmdma_addr
)
541 return ata_port_start(ap
);
547 static int ata_resources_present(struct pci_dev
*pdev
, int port
)
551 /* Check the PCI resources for this channel are enabled */
553 for (i
= 0; i
< 2; i
++) {
554 if (pci_resource_start(pdev
, port
+ i
) == 0 ||
555 pci_resource_len(pdev
, port
+ i
) == 0)
562 * ata_pci_init_bmdma - acquire PCI BMDMA resources and init ATA host
563 * @host: target ATA host
565 * Acquire PCI BMDMA resources and initialize @host accordingly.
568 * Inherited from calling layer (may sleep).
571 * 0 on success, -errno otherwise.
573 int ata_pci_init_bmdma(struct ata_host
*host
)
575 struct device
*gdev
= host
->dev
;
576 struct pci_dev
*pdev
= to_pci_dev(gdev
);
579 /* No BAR4 allocation: No DMA */
580 if (pci_resource_start(pdev
, 4) == 0)
583 /* TODO: If we get no DMA mask we should fall back to PIO */
584 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
587 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
591 /* request and iomap DMA region */
592 rc
= pcim_iomap_regions(pdev
, 1 << 4, DRV_NAME
);
594 dev_printk(KERN_ERR
, gdev
, "failed to request/iomap BAR4\n");
597 host
->iomap
= pcim_iomap_table(pdev
);
599 for (i
= 0; i
< 2; i
++) {
600 struct ata_port
*ap
= host
->ports
[i
];
601 void __iomem
*bmdma
= host
->iomap
[4] + 8 * i
;
603 if (ata_port_is_dummy(ap
))
606 ap
->ioaddr
.bmdma_addr
= bmdma
;
607 if ((!(ap
->flags
& ATA_FLAG_IGN_SIMPLEX
)) &&
608 (ioread8(bmdma
+ 2) & 0x80))
609 host
->flags
|= ATA_HOST_SIMPLEX
;
616 * ata_pci_init_sff_host - acquire native PCI ATA resources and init host
617 * @host: target ATA host
619 * Acquire native PCI ATA resources for @host and initialize the
620 * first two ports of @host accordingly. Ports marked dummy are
621 * skipped and allocation failure makes the port dummy.
623 * Note that native PCI resources are valid even for legacy hosts
624 * as we fix up pdev resources array early in boot, so this
625 * function can be used for both native and legacy SFF hosts.
628 * Inherited from calling layer (may sleep).
631 * 0 if at least one port is initialized, -ENODEV if no port is
634 int ata_pci_init_sff_host(struct ata_host
*host
)
636 struct device
*gdev
= host
->dev
;
637 struct pci_dev
*pdev
= to_pci_dev(gdev
);
638 unsigned int mask
= 0;
641 /* request, iomap BARs and init port addresses accordingly */
642 for (i
= 0; i
< 2; i
++) {
643 struct ata_port
*ap
= host
->ports
[i
];
645 void __iomem
* const *iomap
;
647 if (ata_port_is_dummy(ap
))
650 /* Discard disabled ports. Some controllers show
651 * their unused channels this way. Disabled ports are
654 if (!ata_resources_present(pdev
, i
)) {
655 ap
->ops
= &ata_dummy_port_ops
;
659 rc
= pcim_iomap_regions(pdev
, 0x3 << base
, DRV_NAME
);
661 dev_printk(KERN_WARNING
, gdev
,
662 "failed to request/iomap BARs for port %d "
663 "(errno=%d)\n", i
, rc
);
665 pcim_pin_device(pdev
);
666 ap
->ops
= &ata_dummy_port_ops
;
669 host
->iomap
= iomap
= pcim_iomap_table(pdev
);
671 ap
->ioaddr
.cmd_addr
= iomap
[base
];
672 ap
->ioaddr
.altstatus_addr
=
673 ap
->ioaddr
.ctl_addr
= (void __iomem
*)
674 ((unsigned long)iomap
[base
+ 1] | ATA_PCI_CTL_OFS
);
675 ata_std_ports(&ap
->ioaddr
);
681 dev_printk(KERN_ERR
, gdev
, "no available native port\n");
689 * ata_pci_prepare_sff_host - helper to prepare native PCI ATA host
690 * @pdev: target PCI device
691 * @ppi: array of port_info, must be enough for two ports
692 * @r_host: out argument for the initialized ATA host
694 * Helper to allocate ATA host for @pdev, acquire all native PCI
695 * resources and initialize it accordingly in one go.
698 * Inherited from calling layer (may sleep).
701 * 0 on success, -errno otherwise.
703 int ata_pci_prepare_sff_host(struct pci_dev
*pdev
,
704 const struct ata_port_info
* const * ppi
,
705 struct ata_host
**r_host
)
707 struct ata_host
*host
;
710 if (!devres_open_group(&pdev
->dev
, NULL
, GFP_KERNEL
))
713 host
= ata_host_alloc_pinfo(&pdev
->dev
, ppi
, 2);
715 dev_printk(KERN_ERR
, &pdev
->dev
,
716 "failed to allocate ATA host\n");
721 rc
= ata_pci_init_sff_host(host
);
725 /* init DMA related stuff */
726 rc
= ata_pci_init_bmdma(host
);
730 devres_remove_group(&pdev
->dev
, NULL
);
735 /* This is necessary because PCI and iomap resources are
736 * merged and releasing the top group won't release the
737 * acquired resources if some of those have been acquired
738 * before entering this function.
740 pcim_iounmap_regions(pdev
, 0xf);
742 devres_release_group(&pdev
->dev
, NULL
);
747 * ata_pci_init_one - Initialize/register PCI IDE host controller
748 * @pdev: Controller to be initialized
749 * @ppi: array of port_info, must be enough for two ports
751 * This is a helper function which can be called from a driver's
752 * xxx_init_one() probe function if the hardware uses traditional
753 * IDE taskfile registers.
755 * This function calls pci_enable_device(), reserves its register
756 * regions, sets the dma mask, enables bus master mode, and calls
760 * Nobody makes a single channel controller that appears solely as
761 * the secondary legacy port on PCI.
764 * Inherited from PCI layer (may sleep).
767 * Zero on success, negative on errno-based value on error.
769 int ata_pci_init_one(struct pci_dev
*pdev
,
770 const struct ata_port_info
* const * ppi
)
772 struct device
*dev
= &pdev
->dev
;
773 const struct ata_port_info
*pi
= NULL
;
774 struct ata_host
*host
= NULL
;
781 /* look up the first valid port_info */
782 for (i
= 0; i
< 2 && ppi
[i
]; i
++) {
783 if (ppi
[i
]->port_ops
!= &ata_dummy_port_ops
) {
790 dev_printk(KERN_ERR
, &pdev
->dev
,
791 "no valid port_info specified\n");
795 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
798 /* FIXME: Really for ATA it isn't safe because the device may be
799 multi-purpose and we want to leave it alone if it was already
800 enabled. Secondly for shared use as Arjan says we want refcounting
802 Checking dev->is_enabled is insufficient as this is not set at
803 boot for the primary video which is BIOS enabled
806 rc
= pcim_enable_device(pdev
);
810 if ((pdev
->class >> 8) == PCI_CLASS_STORAGE_IDE
) {
813 /* TODO: What if one channel is in native mode ... */
814 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, &tmp8
);
815 mask
= (1 << 2) | (1 << 0);
816 if ((tmp8
& mask
) != mask
)
818 #if defined(CONFIG_NO_ATA_LEGACY)
819 /* Some platforms with PCI limits cannot address compat
820 port space. In that case we punt if their firmware has
821 left a device in compatibility mode */
823 printk(KERN_ERR
"ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
831 rc
= ata_pci_prepare_sff_host(pdev
, ppi
, &host
);
835 pci_set_master(pdev
);
837 /* start host and request IRQ */
838 rc
= ata_host_start(host
);
843 rc
= devm_request_irq(dev
, pdev
->irq
, pi
->port_ops
->irq_handler
,
844 IRQF_SHARED
, DRV_NAME
, host
);
847 host
->irq
= pdev
->irq
;
849 if (!ata_port_is_dummy(host
->ports
[0])) {
850 host
->irq
= ATA_PRIMARY_IRQ(pdev
);
851 rc
= devm_request_irq(dev
, host
->irq
,
852 pi
->port_ops
->irq_handler
,
853 IRQF_SHARED
, DRV_NAME
, host
);
858 if (!ata_port_is_dummy(host
->ports
[1])) {
859 host
->irq2
= ATA_SECONDARY_IRQ(pdev
);
860 rc
= devm_request_irq(dev
, host
->irq2
,
861 pi
->port_ops
->irq_handler
,
862 IRQF_SHARED
, DRV_NAME
, host
);
869 rc
= ata_host_register(host
, pi
->sht
);
873 devres_remove_group(dev
, NULL
);
877 devres_release_group(dev
, NULL
);
882 * ata_pci_clear_simplex - attempt to kick device out of simplex
885 * Some PCI ATA devices report simplex mode but in fact can be told to
886 * enter non simplex mode. This implements the neccessary logic to
887 * perform the task on such devices. Calling it on other devices will
888 * have -undefined- behaviour.
891 int ata_pci_clear_simplex(struct pci_dev
*pdev
)
893 unsigned long bmdma
= pci_resource_start(pdev
, 4);
899 simplex
= inb(bmdma
+ 0x02);
900 outb(simplex
& 0x60, bmdma
+ 0x02);
901 simplex
= inb(bmdma
+ 0x02);
907 unsigned long ata_pci_default_filter(struct ata_device
*adev
, unsigned long xfer_mask
)
909 /* Filter out DMA modes if the device has been configured by
910 the BIOS as PIO only */
912 if (adev
->ap
->ioaddr
.bmdma_addr
== 0)
913 xfer_mask
&= ~(ATA_MASK_MWDMA
| ATA_MASK_UDMA
);
917 #endif /* CONFIG_PCI */