drivers/ata/pata_atiixp.c

   1 /*
   2  * pata_atiixp.c        - ATI PATA for new ATA layer
   3  *                        (C) 2005 Red Hat Inc
   4  *                        Alan Cox <alan@redhat.com>
   5  *
   6  * Based on
   7  *
   8  *  linux/drivers/ide/pci/atiixp.c      Version 0.01-bart2      Feb. 26, 2004
   9  *
  10  *  Copyright (C) 2003 ATI Inc. <hyu@ati.com>
  11  *  Copyright (C) 2004 Bartlomiej Zolnierkiewicz
  12  *
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/pci.h>
  18 #include <linux/init.h>
  19 #include <linux/blkdev.h>
  20 #include <linux/delay.h>
  21 #include <scsi/scsi_host.h>
  22 #include <linux/libata.h>
  23
  24 #define DRV_NAME "pata_atiixp"
  25 #define DRV_VERSION "0.4.2"
  26
  27 enum {
  28         ATIIXP_IDE_PIO_TIMING   = 0x40,
  29         ATIIXP_IDE_MWDMA_TIMING = 0x44,
  30         ATIIXP_IDE_PIO_CONTROL  = 0x48,
  31         ATIIXP_IDE_PIO_MODE     = 0x4a,
  32         ATIIXP_IDE_UDMA_CONTROL = 0x54,
  33         ATIIXP_IDE_UDMA_MODE    = 0x56
  34 };
  35
  36 static int atiixp_pre_reset(struct ata_port *ap)
  37 {
  38         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  39         static struct pci_bits atiixp_enable_bits[] = {
  40                 { 0x48, 1, 0x01, 0x00 },
  41                 { 0x48, 1, 0x08, 0x00 }
  42         };
  43
  44         if (!pci_test_config_bits(pdev, &atiixp_enable_bits[ap->port_no])) {
  45                 ata_port_disable(ap);
  46                 printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
  47                 return 0;
  48         }
  49         ap->cbl = ATA_CBL_PATA80;
  50         return ata_std_prereset(ap);
  51 }
  52
  53 static void atiixp_error_handler(struct ata_port *ap)
  54 {
  55         ata_bmdma_drive_eh(ap, atiixp_pre_reset, ata_std_softreset, NULL,   ata_std_postreset);
  56 }
  57
  58 /**
  59  *      atiixp_set_pio_timing   -       set initial PIO mode data
  60  *      @ap: ATA interface
  61  *      @adev: ATA device
  62  *
  63  *      Called by both the pio and dma setup functions to set the controller
  64  *      timings for PIO transfers. We must load both the mode number and
  65  *      timing values into the controller.
  66  */
  67
  68 static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev, int pio)
  69 {
  70         static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
  71
  72         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  73         int dn = 2 * ap->port_no + adev->devno;
  74
  75         /* Check this is correct - the order is odd in both drivers */
  76         int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
  77         u16 pio_mode_data, pio_timing_data;
  78
  79         pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
  80         pio_mode_data &= ~(0x7 << (4 * dn));
  81         pio_mode_data |= pio << (4 * dn);
  82         pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
  83
  84         pci_read_config_word(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
  85         pio_mode_data &= ~(0xFF << timing_shift);
  86         pio_mode_data |= (pio_timings[pio] << timing_shift);
  87         pci_write_config_word(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
  88 }
  89
  90 /**
  91  *      atiixp_set_piomode      -       set initial PIO mode data
  92  *      @ap: ATA interface
  93  *      @adev: ATA device
  94  *
  95  *      Called to do the PIO mode setup. We use a shared helper for this
  96  *      as the DMA setup must also adjust the PIO timing information.
  97  */
  98
  99 static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
 100 {
 101         atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0);
 102 }
 103
 104 /**
 105  *      atiixp_set_dmamode      -       set initial DMA mode data
 106  *      @ap: ATA interface
 107  *      @adev: ATA device
 108  *
 109  *      Called to do the DMA mode setup. We use timing tables for most
 110  *      modes but must tune an appropriate PIO mode to match.
 111  */
 112
 113 static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 114 {
 115         static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
 116
 117         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 118         int dma = adev->dma_mode;
 119         int dn = 2 * ap->port_no + adev->devno;
 120         int wanted_pio;
 121
 122         if (adev->dma_mode >= XFER_UDMA_0) {
 123                 u16 udma_mode_data;
 124
 125                 dma -= XFER_UDMA_0;
 126
 127                 pci_read_config_word(pdev, ATIIXP_IDE_UDMA_MODE, &udma_mode_data);
 128                 udma_mode_data &= ~(0x7 << (4 * dn));
 129                 udma_mode_data |= dma << (4 * dn);
 130                 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data);
 131         } else {
 132                 u16 mwdma_timing_data;
 133                 /* Check this is correct - the order is odd in both drivers */
 134                 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
 135
 136                 dma -= XFER_MW_DMA_0;
 137
 138                 pci_read_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, &mwdma_timing_data);
 139                 mwdma_timing_data &= ~(0xFF << timing_shift);
 140                 mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
 141                 pci_write_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, mwdma_timing_data);
 142         }
 143         /*
 144          *      We must now look at the PIO mode situation. We may need to
 145          *      adjust the PIO mode to keep the timings acceptable
 146          */
 147          if (adev->dma_mode >= XFER_MW_DMA_2)
 148                 wanted_pio = 4;
 149         else if (adev->dma_mode == XFER_MW_DMA_1)
 150                 wanted_pio = 3;
 151         else if (adev->dma_mode == XFER_MW_DMA_0)
 152                 wanted_pio = 0;
 153         else BUG();
 154
 155         if (adev->pio_mode != wanted_pio)
 156                 atiixp_set_pio_timing(ap, adev, wanted_pio);
 157 }
 158
 159 /**
 160  *      atiixp_bmdma_start      -       DMA start callback
 161  *      @qc: Command in progress
 162  *
 163  *      When DMA begins we need to ensure that the UDMA control
 164  *      register for the channel is correctly set.
 165  */
 166
 167 static void atiixp_bmdma_start(struct ata_queued_cmd *qc)
 168 {
 169         struct ata_port *ap = qc->ap;
 170         struct ata_device *adev = qc->dev;
 171
 172         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 173         int dn = (2 * ap->port_no) + adev->devno;
 174         u16 tmp16;
 175
 176         pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
 177         if (adev->dma_mode >= XFER_UDMA_0)
 178                 tmp16 |= (1 << dn);
 179         else
 180                 tmp16 &= ~(1 << dn);
 181         pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
 182         ata_bmdma_start(qc);
 183 }
 184
 185 /**
 186  *      atiixp_dma_stop -       DMA stop callback
 187  *      @qc: Command in progress
 188  *
 189  *      DMA has completed. Clear the UDMA flag as the next operations will
 190  *      be PIO ones not UDMA data transfer.
 191  */
 192
 193 static void atiixp_bmdma_stop(struct ata_queued_cmd *qc)
 194 {
 195         struct ata_port *ap = qc->ap;
 196         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 197         int dn = (2 * ap->port_no) + qc->dev->devno;
 198         u16 tmp16;
 199
 200         pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
 201         tmp16 &= ~(1 << dn);
 202         pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
 203         ata_bmdma_stop(qc);
 204 }
 205
 206 static struct scsi_host_template atiixp_sht = {
 207         .module                 = THIS_MODULE,
 208         .name                   = DRV_NAME,
 209         .ioctl                  = ata_scsi_ioctl,
 210         .queuecommand           = ata_scsi_queuecmd,
 211         .can_queue              = ATA_DEF_QUEUE,
 212         .this_id                = ATA_SHT_THIS_ID,
 213         .sg_tablesize           = LIBATA_MAX_PRD,
 214         .max_sectors            = ATA_MAX_SECTORS,
 215         .cmd_per_lun            = ATA_SHT_CMD_PER_LUN,
 216         .emulated               = ATA_SHT_EMULATED,
 217         .use_clustering         = ATA_SHT_USE_CLUSTERING,
 218         .proc_name              = DRV_NAME,
 219         .dma_boundary           = ATA_DMA_BOUNDARY,
 220         .slave_configure        = ata_scsi_slave_config,
 221         .bios_param             = ata_std_bios_param,
 222 };
 223
 224 static struct ata_port_operations atiixp_port_ops = {
 225         .port_disable   = ata_port_disable,
 226         .set_piomode    = atiixp_set_piomode,
 227         .set_dmamode    = atiixp_set_dmamode,
 228         .mode_filter    = ata_pci_default_filter,
 229         .tf_load        = ata_tf_load,
 230         .tf_read        = ata_tf_read,
 231         .check_status   = ata_check_status,
 232         .exec_command   = ata_exec_command,
 233         .dev_select     = ata_std_dev_select,
 234
 235         .freeze         = ata_bmdma_freeze,
 236         .thaw           = ata_bmdma_thaw,
 237         .error_handler  = atiixp_error_handler,
 238         .post_internal_cmd = ata_bmdma_post_internal_cmd,
 239
 240         .bmdma_setup    = ata_bmdma_setup,
 241         .bmdma_start    = atiixp_bmdma_start,
 242         .bmdma_stop     = atiixp_bmdma_stop,
 243         .bmdma_status   = ata_bmdma_status,
 244
 245         .qc_prep        = ata_qc_prep,
 246         .qc_issue       = ata_qc_issue_prot,
 247         .eng_timeout    = ata_eng_timeout,
 248         .data_xfer      = ata_pio_data_xfer,
 249
 250         .irq_handler    = ata_interrupt,
 251         .irq_clear      = ata_bmdma_irq_clear,
 252
 253         .port_start     = ata_port_start,
 254         .port_stop      = ata_port_stop,
 255         .host_stop      = ata_host_stop
 256 };
 257
 258 static int atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 259 {
 260         static struct ata_port_info info = {
 261                 .sht = &atiixp_sht,
 262                 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
 263                 .pio_mask = 0x1f,
 264                 .mwdma_mask = 0x06,     /* No MWDMA0 support */
 265                 .udma_mask = 0x3F,
 266                 .port_ops = &atiixp_port_ops
 267         };
 268         static struct ata_port_info *port_info[2] = { &info, &info };
 269         return ata_pci_init_one(dev, port_info, 2);
 270 }
 271
 272 static struct pci_device_id atiixp[] = {
 273         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), },
 274         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), },
 275         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), },
 276         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), },
 277         { 0, },
 278 };
 279
 280 static struct pci_driver atiixp_pci_driver = {
 281         .name           = DRV_NAME,
 282         .id_table       = atiixp,
 283         .probe          = atiixp_init_one,
 284         .remove         = ata_pci_remove_one
 285 };
 286
 287 static int __init atiixp_init(void)
 288 {
 289         return pci_register_driver(&atiixp_pci_driver);
 290 }
 291
 292
 293 static void __exit atiixp_exit(void)
 294 {
 295         pci_unregister_driver(&atiixp_pci_driver);
 296 }
 297
 298
 299 MODULE_AUTHOR("Alan Cox");
 300 MODULE_DESCRIPTION("low-level driver for ATI IXP200/300/400");
 301 MODULE_LICENSE("GPL");
 302 MODULE_DEVICE_TABLE(pci, atiixp);
 303 MODULE_VERSION(DRV_VERSION);
 304
 305 module_init(atiixp_init);
 306 module_exit(atiixp_exit);