drivers/ata/pata_oldpiix.c

   1 /*
   2  *    pata_oldpiix.c - Intel PATA/SATA controllers
   3  *
   4  *      (C) 2005 Red Hat <alan@redhat.com>
   5  *
   6  *    Some parts based on ata_piix.c by Jeff Garzik and others.
   7  *
   8  *    Early PIIX differs significantly from the later PIIX as it lacks
   9  *    SITRE and the slave timing registers. This means that you have to
  10  *    set timing per channel, or be clever. Libata tells us whenever it
  11  *    does drive selection and we use this to reload the timings.
  12  *
  13  *    Because of these behaviour differences PIIX gets its own driver module.
  14  */
  15
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/pci.h>
  19 #include <linux/init.h>
  20 #include <linux/blkdev.h>
  21 #include <linux/delay.h>
  22 #include <linux/device.h>
  23 #include <scsi/scsi_host.h>
  24 #include <linux/libata.h>
  25 #include <linux/ata.h>
  26
  27 #define DRV_NAME        "pata_oldpiix"
  28 #define DRV_VERSION     "0.5.5"
  29
  30 /**
  31  *      oldpiix_pre_reset               -       probe begin
  32  *      @ap: ATA port
  33  *
  34  *      Set up cable type and use generic probe init
  35  */
  36
  37 static int oldpiix_pre_reset(struct ata_port *ap)
  38 {
  39         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  40         static const struct pci_bits oldpiix_enable_bits[] = {
  41                 { 0x41U, 1U, 0x80UL, 0x80UL },  /* port 0 */
  42                 { 0x43U, 1U, 0x80UL, 0x80UL },  /* port 1 */
  43         };
  44
  45         if (!pci_test_config_bits(pdev, &oldpiix_enable_bits[ap->port_no]))
  46                 return -ENOENT;
  47         return ata_std_prereset(ap);
  48 }
  49
  50 /**
  51  *      oldpiix_pata_error_handler - Probe specified port on PATA host controller
  52  *      @ap: Port to probe
  53  *      @classes:
  54  *
  55  *      LOCKING:
  56  *      None (inherited from caller).
  57  */
  58
  59 static void oldpiix_pata_error_handler(struct ata_port *ap)
  60 {
  61         ata_bmdma_drive_eh(ap, oldpiix_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
  62 }
  63
  64 /**
  65  *      oldpiix_set_piomode - Initialize host controller PATA PIO timings
  66  *      @ap: Port whose timings we are configuring
  67  *      @adev: Device whose timings we are configuring
  68  *
  69  *      Set PIO mode for device, in host controller PCI config space.
  70  *
  71  *      LOCKING:
  72  *      None (inherited from caller).
  73  */
  74
  75 static void oldpiix_set_piomode (struct ata_port *ap, struct ata_device *adev)
  76 {
  77         unsigned int pio        = adev->pio_mode - XFER_PIO_0;
  78         struct pci_dev *dev     = to_pci_dev(ap->host->dev);
  79         unsigned int idetm_port= ap->port_no ? 0x42 : 0x40;
  80         u16 idetm_data;
  81         int control = 0;
  82
  83         /*
  84          *      See Intel Document 298600-004 for the timing programing rules
  85          *      for PIIX/ICH. Note that the early PIIX does not have the slave
  86          *      timing port at 0x44.
  87          */
  88
  89         static const     /* ISP  RTC */
  90         u8 timings[][2] = { { 0, 0 },
  91                             { 0, 0 },
  92                             { 1, 0 },
  93                             { 2, 1 },
  94                             { 2, 3 }, };
  95
  96         if (pio > 1)
  97                 control |= 1;   /* TIME */
  98         if (ata_pio_need_iordy(adev))
  99                 control |= 2;   /* IE */
 100
 101         /* Intel specifies that the prefetch/posting is for disk only */
 102         if (adev->class == ATA_DEV_ATA)
 103                 control |= 4;   /* PPE */
 104
 105         pci_read_config_word(dev, idetm_port, &idetm_data);
 106
 107         /*
 108          * Set PPE, IE and TIME as appropriate.
 109          * Clear the other drive's timing bits.
 110          */
 111         if (adev->devno == 0) {
 112                 idetm_data &= 0xCCE0;
 113                 idetm_data |= control;
 114         } else {
 115                 idetm_data &= 0xCC0E;
 116                 idetm_data |= (control << 4);
 117         }
 118         idetm_data |= (timings[pio][0] << 12) |
 119                         (timings[pio][1] << 8);
 120         pci_write_config_word(dev, idetm_port, idetm_data);
 121
 122         /* Track which port is configured */
 123         ap->private_data = adev;
 124 }
 125
 126 /**
 127  *      oldpiix_set_dmamode - Initialize host controller PATA DMA timings
 128  *      @ap: Port whose timings we are configuring
 129  *      @adev: Device to program
 130  *      @isich: True if the device is an ICH and has IOCFG registers
 131  *
 132  *      Set MWDMA mode for device, in host controller PCI config space.
 133  *
 134  *      LOCKING:
 135  *      None (inherited from caller).
 136  */
 137
 138 static void oldpiix_set_dmamode (struct ata_port *ap, struct ata_device *adev)
 139 {
 140         struct pci_dev *dev     = to_pci_dev(ap->host->dev);
 141         u8 idetm_port           = ap->port_no ? 0x42 : 0x40;
 142         u16 idetm_data;
 143
 144         static const     /* ISP  RTC */
 145         u8 timings[][2] = { { 0, 0 },
 146                             { 0, 0 },
 147                             { 1, 0 },
 148                             { 2, 1 },
 149                             { 2, 3 }, };
 150
 151         /*
 152          * MWDMA is driven by the PIO timings. We must also enable
 153          * IORDY unconditionally along with TIME1. PPE has already
 154          * been set when the PIO timing was set.
 155          */
 156
 157         unsigned int mwdma      = adev->dma_mode - XFER_MW_DMA_0;
 158         unsigned int control;
 159         const unsigned int needed_pio[3] = {
 160                 XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
 161         };
 162         int pio = needed_pio[mwdma] - XFER_PIO_0;
 163
 164         pci_read_config_word(dev, idetm_port, &idetm_data);
 165
 166         control = 3;    /* IORDY|TIME0 */
 167         /* Intel specifies that the PPE functionality is for disk only */
 168         if (adev->class == ATA_DEV_ATA)
 169                 control |= 4;   /* PPE enable */
 170
 171         /* If the drive MWDMA is faster than it can do PIO then
 172            we must force PIO into PIO0 */
 173
 174         if (adev->pio_mode < needed_pio[mwdma])
 175                 /* Enable DMA timing only */
 176                 control |= 8;   /* PIO cycles in PIO0 */
 177
 178         /* Mask out the relevant control and timing bits we will load. Also
 179            clear the other drive TIME register as a precaution */
 180         if (adev->devno == 0) {
 181                 idetm_data &= 0xCCE0;
 182                 idetm_data |= control;
 183         } else {
 184                 idetm_data &= 0xCC0E;
 185                 idetm_data |= (control << 4);
 186         }
 187         idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
 188         pci_write_config_word(dev, idetm_port, idetm_data);
 189
 190         /* Track which port is configured */
 191         ap->private_data = adev;
 192 }
 193
 194 /**
 195  *      oldpiix_qc_issue_prot   -       command issue
 196  *      @qc: command pending
 197  *
 198  *      Called when the libata layer is about to issue a command. We wrap
 199  *      this interface so that we can load the correct ATA timings if
 200  *      neccessary. Our logic also clears TIME0/TIME1 for the other device so
 201  *      that, even if we get this wrong, cycles to the other device will
 202  *      be made PIO0.
 203  */
 204
 205 static unsigned int oldpiix_qc_issue_prot(struct ata_queued_cmd *qc)
 206 {
 207         struct ata_port *ap = qc->ap;
 208         struct ata_device *adev = qc->dev;
 209
 210         if (adev != ap->private_data) {
 211                 oldpiix_set_piomode(ap, adev);
 212                 if (adev->dma_mode)
 213                         oldpiix_set_dmamode(ap, adev);
 214         }
 215         return ata_qc_issue_prot(qc);
 216 }
 217
 218
 219 static struct scsi_host_template oldpiix_sht = {
 220         .module                 = THIS_MODULE,
 221         .name                   = DRV_NAME,
 222         .ioctl                  = ata_scsi_ioctl,
 223         .queuecommand           = ata_scsi_queuecmd,
 224         .can_queue              = ATA_DEF_QUEUE,
 225         .this_id                = ATA_SHT_THIS_ID,
 226         .sg_tablesize           = LIBATA_MAX_PRD,
 227         .cmd_per_lun            = ATA_SHT_CMD_PER_LUN,
 228         .emulated               = ATA_SHT_EMULATED,
 229         .use_clustering         = ATA_SHT_USE_CLUSTERING,
 230         .proc_name              = DRV_NAME,
 231         .dma_boundary           = ATA_DMA_BOUNDARY,
 232         .slave_configure        = ata_scsi_slave_config,
 233         .slave_destroy          = ata_scsi_slave_destroy,
 234         .bios_param             = ata_std_bios_param,
 235 #ifdef CONFIG_PM
 236         .resume                 = ata_scsi_device_resume,
 237         .suspend                = ata_scsi_device_suspend,
 238 #endif
 239 };
 240
 241 static const struct ata_port_operations oldpiix_pata_ops = {
 242         .port_disable           = ata_port_disable,
 243         .set_piomode            = oldpiix_set_piomode,
 244         .set_dmamode            = oldpiix_set_dmamode,
 245         .mode_filter            = ata_pci_default_filter,
 246
 247         .tf_load                = ata_tf_load,
 248         .tf_read                = ata_tf_read,
 249         .check_status           = ata_check_status,
 250         .exec_command           = ata_exec_command,
 251         .dev_select             = ata_std_dev_select,
 252
 253         .freeze                 = ata_bmdma_freeze,
 254         .thaw                   = ata_bmdma_thaw,
 255         .error_handler          = oldpiix_pata_error_handler,
 256         .post_internal_cmd      = ata_bmdma_post_internal_cmd,
 257         .cable_detect           = ata_cable_40wire,
 258
 259         .bmdma_setup            = ata_bmdma_setup,
 260         .bmdma_start            = ata_bmdma_start,
 261         .bmdma_stop             = ata_bmdma_stop,
 262         .bmdma_status           = ata_bmdma_status,
 263         .qc_prep                = ata_qc_prep,
 264         .qc_issue               = oldpiix_qc_issue_prot,
 265         .data_xfer              = ata_data_xfer,
 266
 267         .irq_handler            = ata_interrupt,
 268         .irq_clear              = ata_bmdma_irq_clear,
 269         .irq_on                 = ata_irq_on,
 270         .irq_ack                = ata_irq_ack,
 271
 272         .port_start             = ata_port_start,
 273 };
 274
 275
 276 /**
 277  *      oldpiix_init_one - Register PIIX ATA PCI device with kernel services
 278  *      @pdev: PCI device to register
 279  *      @ent: Entry in oldpiix_pci_tbl matching with @pdev
 280  *
 281  *      Called from kernel PCI layer.  We probe for combined mode (sigh),
 282  *      and then hand over control to libata, for it to do the rest.
 283  *
 284  *      LOCKING:
 285  *      Inherited from PCI layer (may sleep).
 286  *
 287  *      RETURNS:
 288  *      Zero on success, or -ERRNO value.
 289  */
 290
 291 static int oldpiix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
 292 {
 293         static int printed_version;
 294         static struct ata_port_info info = {
 295                 .sht            = &oldpiix_sht,
 296                 .flags          = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
 297                 .pio_mask       = 0x1f, /* pio0-4 */
 298                 .mwdma_mask     = 0x07, /* mwdma1-2 */
 299                 .port_ops       = &oldpiix_pata_ops,
 300         };
 301         static struct ata_port_info *port_info[2] = { &info, &info };
 302
 303         if (!printed_version++)
 304                 dev_printk(KERN_DEBUG, &pdev->dev,
 305                            "version " DRV_VERSION "\n");
 306
 307         return ata_pci_init_one(pdev, port_info, 2);
 308 }
 309
 310 static const struct pci_device_id oldpiix_pci_tbl[] = {
 311         { PCI_VDEVICE(INTEL, 0x1230), },
 312
 313         { }     /* terminate list */
 314 };
 315
 316 static struct pci_driver oldpiix_pci_driver = {
 317         .name                   = DRV_NAME,
 318         .id_table               = oldpiix_pci_tbl,
 319         .probe                  = oldpiix_init_one,
 320         .remove                 = ata_pci_remove_one,
 321 #ifdef CONFIG_PM
 322         .suspend                = ata_pci_device_suspend,
 323         .resume                 = ata_pci_device_resume,
 324 #endif
 325 };
 326
 327 static int __init oldpiix_init(void)
 328 {
 329         return pci_register_driver(&oldpiix_pci_driver);
 330 }
 331
 332 static void __exit oldpiix_exit(void)
 333 {
 334         pci_unregister_driver(&oldpiix_pci_driver);
 335 }
 336
 337 module_init(oldpiix_init);
 338 module_exit(oldpiix_exit);
 339
 340 MODULE_AUTHOR("Alan Cox");
 341 MODULE_DESCRIPTION("SCSI low-level driver for early PIIX series controllers");
 342 MODULE_LICENSE("GPL");
 343 MODULE_DEVICE_TABLE(pci, oldpiix_pci_tbl);
 344 MODULE_VERSION(DRV_VERSION);
 345