2 * pata_sis.c - SiS ATA driver
4 * (C) 2005 Red Hat <alan@redhat.com>
5 * (C) 2007 Bartlomiej Zolnierkiewicz
7 * Based upon linux/drivers/ide/pci/sis5513.c
8 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
9 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
10 * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz>
11 * SiS Taiwan : for direct support and hardware.
12 * Daniela Engert : for initial ATA100 advices and numerous others.
13 * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt :
14 * for checking code correctness, providing patches.
15 * Original tests and design on the SiS620 chipset.
16 * ATA100 tests and design on the SiS735 chipset.
17 * ATA16/33 support from specs
18 * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw>
22 * Check MWDMA on drives that don't support MWDMA speed pio cycles ?
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/init.h>
30 #include <linux/blkdev.h>
31 #include <linux/delay.h>
32 #include <linux/device.h>
33 #include <scsi/scsi_host.h>
34 #include <linux/libata.h>
35 #include <linux/ata.h>
38 #define DRV_NAME "pata_sis"
39 #define DRV_VERSION "0.5.2"
42 u16 device
; /* PCI host ID */
43 const struct ata_port_info
*info
; /* Info block */
44 /* Probably add family, cable detect type etc here to clean
54 static const struct sis_laptop sis_laptop
[] = {
55 /* devid, subvendor, subdev */
56 { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
57 { 0x5513, 0x1734, 0x105F }, /* FSC Amilo A1630 */
62 static int sis_short_ata40(struct pci_dev
*dev
)
64 const struct sis_laptop
*lap
= &sis_laptop
[0];
67 if (lap
->device
== dev
->device
&&
68 lap
->subvendor
== dev
->subsystem_vendor
&&
69 lap
->subdevice
== dev
->subsystem_device
)
78 * sis_old_port_base - return PCI configuration base for dev
81 * Returns the base of the PCI configuration registers for this port
85 static int sis_old_port_base(struct ata_device
*adev
)
87 return 0x40 + (4 * adev
->ap
->port_no
) + (2 * adev
->devno
);
91 * sis_133_cable_detect - check for 40/80 pin
93 * @deadline: deadline jiffies for the operation
95 * Perform cable detection for the later UDMA133 capable
99 static int sis_133_cable_detect(struct ata_port
*ap
)
101 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
104 /* The top bit of this register is the cable detect bit */
105 pci_read_config_word(pdev
, 0x50 + 2 * ap
->port_no
, &tmp
);
106 if ((tmp
& 0x8000) && !sis_short_ata40(pdev
))
107 return ATA_CBL_PATA40
;
108 return ATA_CBL_PATA80
;
112 * sis_66_cable_detect - check for 40/80 pin
114 * @deadline: deadline jiffies for the operation
116 * Perform cable detection on the UDMA66, UDMA100 and early UDMA133
117 * SiS IDE controllers.
120 static int sis_66_cable_detect(struct ata_port
*ap
)
122 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
125 /* Older chips keep cable detect in bits 4/5 of reg 0x48 */
126 pci_read_config_byte(pdev
, 0x48, &tmp
);
128 if ((tmp
& 0x10) && !sis_short_ata40(pdev
))
129 return ATA_CBL_PATA40
;
130 return ATA_CBL_PATA80
;
135 * sis_pre_reset - probe begin
137 * @deadline: deadline jiffies for the operation
139 * Set up cable type and use generic probe init
142 static int sis_pre_reset(struct ata_port
*ap
, unsigned long deadline
)
144 static const struct pci_bits sis_enable_bits
[] = {
145 { 0x4aU
, 1U, 0x02UL
, 0x02UL
}, /* port 0 */
146 { 0x4aU
, 1U, 0x04UL
, 0x04UL
}, /* port 1 */
149 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
151 if (!pci_test_config_bits(pdev
, &sis_enable_bits
[ap
->port_no
]))
154 /* Clear the FIFO settings. We can't enable the FIFO until
155 we know we are poking at a disk */
156 pci_write_config_byte(pdev
, 0x4B, 0);
157 return ata_std_prereset(ap
, deadline
);
162 * sis_error_handler - Probe specified port on PATA host controller
166 * None (inherited from caller).
169 static void sis_error_handler(struct ata_port
*ap
)
171 ata_bmdma_drive_eh(ap
, sis_pre_reset
, ata_std_softreset
, NULL
, ata_std_postreset
);
175 * sis_set_fifo - Set RWP fifo bits for this device
179 * SIS chipsets implement prefetch/postwrite bits for each device
180 * on both channels. This functionality is not ATAPI compatible and
181 * must be configured according to the class of device present
184 static void sis_set_fifo(struct ata_port
*ap
, struct ata_device
*adev
)
186 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
190 mask
<<= (2 * ap
->port_no
);
191 mask
<<= adev
->devno
;
193 /* This holds various bits including the FIFO control */
194 pci_read_config_byte(pdev
, 0x4B, &fifoctrl
);
197 /* Enable for ATA (disk) only */
198 if (adev
->class == ATA_DEV_ATA
)
200 pci_write_config_byte(pdev
, 0x4B, fifoctrl
);
204 * sis_old_set_piomode - Initialize host controller PATA PIO timings
205 * @ap: Port whose timings we are configuring
206 * @adev: Device we are configuring for.
208 * Set PIO mode for device, in host controller PCI config space. This
209 * function handles PIO set up for all chips that are pre ATA100 and
210 * also early ATA100 devices.
213 * None (inherited from caller).
216 static void sis_old_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
218 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
219 int port
= sis_old_port_base(adev
);
221 int speed
= adev
->pio_mode
- XFER_PIO_0
;
223 const u8 active
[] = { 0x00, 0x07, 0x04, 0x03, 0x01 };
224 const u8 recovery
[] = { 0x00, 0x06, 0x04, 0x03, 0x03 };
226 sis_set_fifo(ap
, adev
);
228 pci_read_config_byte(pdev
, port
, &t1
);
229 pci_read_config_byte(pdev
, port
+ 1, &t2
);
231 t1
&= ~0x0F; /* Clear active/recovery timings */
235 t2
|= recovery
[speed
];
237 pci_write_config_byte(pdev
, port
, t1
);
238 pci_write_config_byte(pdev
, port
+ 1, t2
);
242 * sis_100_set_piomode - Initialize host controller PATA PIO timings
243 * @ap: Port whose timings we are configuring
244 * @adev: Device we are configuring for.
246 * Set PIO mode for device, in host controller PCI config space. This
247 * function handles PIO set up for ATA100 devices and early ATA133.
250 * None (inherited from caller).
253 static void sis_100_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
255 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
256 int port
= sis_old_port_base(adev
);
257 int speed
= adev
->pio_mode
- XFER_PIO_0
;
259 const u8 actrec
[] = { 0x00, 0x67, 0x44, 0x33, 0x31 };
261 sis_set_fifo(ap
, adev
);
263 pci_write_config_byte(pdev
, port
, actrec
[speed
]);
267 * sis_133_set_piomode - Initialize host controller PATA PIO timings
268 * @ap: Port whose timings we are configuring
269 * @adev: Device we are configuring for.
271 * Set PIO mode for device, in host controller PCI config space. This
272 * function handles PIO set up for the later ATA133 devices.
275 * None (inherited from caller).
278 static void sis_133_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
280 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
284 int speed
= adev
->pio_mode
- XFER_PIO_0
;
286 const u32 timing133
[] = {
287 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */
293 const u32 timing100
[] = {
294 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */
301 sis_set_fifo(ap
, adev
);
303 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
304 pci_read_config_dword(pdev
, 0x54, ®54
);
305 if (reg54
& 0x40000000)
307 port
+= 8 * ap
->port_no
+ 4 * adev
->devno
;
309 pci_read_config_dword(pdev
, port
, &t1
);
310 t1
&= 0xC0C00FFF; /* Mask out timing */
312 if (t1
& 0x08) /* 100 or 133 ? */
313 t1
|= timing133
[speed
];
315 t1
|= timing100
[speed
];
316 pci_write_config_byte(pdev
, port
, t1
);
320 * sis_old_set_dmamode - Initialize host controller PATA DMA timings
321 * @ap: Port whose timings we are configuring
322 * @adev: Device to program
324 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
325 * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike
326 * the old ide/pci driver.
329 * None (inherited from caller).
332 static void sis_old_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
334 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
335 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
336 int drive_pci
= sis_old_port_base(adev
);
339 const u16 mwdma_bits
[] = { 0x008, 0x302, 0x301 };
340 const u16 udma_bits
[] = { 0xE000, 0xC000, 0xA000 };
342 pci_read_config_word(pdev
, drive_pci
, &timing
);
344 if (adev
->dma_mode
< XFER_UDMA_0
) {
345 /* bits 3-0 hold recovery timing bits 8-10 active timing and
346 the higer bits are dependant on the device */
348 timing
|= mwdma_bits
[speed
];
350 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */
351 speed
= adev
->dma_mode
- XFER_UDMA_0
;
353 timing
|= udma_bits
[speed
];
355 pci_write_config_word(pdev
, drive_pci
, timing
);
359 * sis_66_set_dmamode - Initialize host controller PATA DMA timings
360 * @ap: Port whose timings we are configuring
361 * @adev: Device to program
363 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
364 * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike
365 * the old ide/pci driver.
368 * None (inherited from caller).
371 static void sis_66_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
373 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
374 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
375 int drive_pci
= sis_old_port_base(adev
);
378 const u16 mwdma_bits
[] = { 0x008, 0x302, 0x301 };
379 const u16 udma_bits
[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000};
381 pci_read_config_word(pdev
, drive_pci
, &timing
);
383 if (adev
->dma_mode
< XFER_UDMA_0
) {
384 /* bits 3-0 hold recovery timing bits 8-10 active timing and
385 the higer bits are dependant on the device, bit 15 udma */
387 timing
|= mwdma_bits
[speed
];
389 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
390 speed
= adev
->dma_mode
- XFER_UDMA_0
;
392 timing
|= udma_bits
[speed
];
394 pci_write_config_word(pdev
, drive_pci
, timing
);
398 * sis_100_set_dmamode - Initialize host controller PATA DMA timings
399 * @ap: Port whose timings we are configuring
400 * @adev: Device to program
402 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
403 * Handles UDMA66 and early UDMA100 devices.
406 * None (inherited from caller).
409 static void sis_100_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
411 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
412 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
413 int drive_pci
= sis_old_port_base(adev
);
416 const u8 udma_bits
[] = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81};
418 pci_read_config_byte(pdev
, drive_pci
+ 1, &timing
);
420 if (adev
->dma_mode
< XFER_UDMA_0
) {
421 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
423 /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
424 speed
= adev
->dma_mode
- XFER_UDMA_0
;
426 timing
|= udma_bits
[speed
];
428 pci_write_config_byte(pdev
, drive_pci
+ 1, timing
);
432 * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings
433 * @ap: Port whose timings we are configuring
434 * @adev: Device to program
436 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
437 * Handles early SiS 961 bridges.
440 * None (inherited from caller).
443 static void sis_133_early_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
445 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
446 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
447 int drive_pci
= sis_old_port_base(adev
);
449 /* Low 4 bits are timing */
450 static const u8 udma_bits
[] = { 0x8F, 0x8A, 0x87, 0x85, 0x83, 0x82, 0x81};
452 pci_read_config_byte(pdev
, drive_pci
+ 1, &timing
);
454 if (adev
->dma_mode
< XFER_UDMA_0
) {
455 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
457 /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
458 speed
= adev
->dma_mode
- XFER_UDMA_0
;
460 timing
|= udma_bits
[speed
];
462 pci_write_config_byte(pdev
, drive_pci
+ 1, timing
);
466 * sis_133_set_dmamode - Initialize host controller PATA DMA timings
467 * @ap: Port whose timings we are configuring
468 * @adev: Device to program
470 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
473 * None (inherited from caller).
476 static void sis_133_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
478 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
479 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
484 /* bits 4- cycle time 8 - cvs time */
485 static const u32 timing_u100
[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 };
486 static const u32 timing_u133
[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 };
488 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
489 pci_read_config_dword(pdev
, 0x54, ®54
);
490 if (reg54
& 0x40000000)
492 port
+= (8 * ap
->port_no
) + (4 * adev
->devno
);
494 pci_read_config_dword(pdev
, port
, &t1
);
496 if (adev
->dma_mode
< XFER_UDMA_0
) {
498 /* FIXME: need data sheet to add MWDMA here. Also lacking on
501 speed
= adev
->dma_mode
- XFER_UDMA_0
;
502 /* if & 8 no UDMA133 - need info for ... */
506 t1
|= timing_u133
[speed
];
508 t1
|= timing_u100
[speed
];
510 pci_write_config_dword(pdev
, port
, t1
);
513 static struct scsi_host_template sis_sht
= {
514 .module
= THIS_MODULE
,
516 .ioctl
= ata_scsi_ioctl
,
517 .queuecommand
= ata_scsi_queuecmd
,
518 .can_queue
= ATA_DEF_QUEUE
,
519 .this_id
= ATA_SHT_THIS_ID
,
520 .sg_tablesize
= LIBATA_MAX_PRD
,
521 .cmd_per_lun
= ATA_SHT_CMD_PER_LUN
,
522 .emulated
= ATA_SHT_EMULATED
,
523 .use_clustering
= ATA_SHT_USE_CLUSTERING
,
524 .proc_name
= DRV_NAME
,
525 .dma_boundary
= ATA_DMA_BOUNDARY
,
526 .slave_configure
= ata_scsi_slave_config
,
527 .slave_destroy
= ata_scsi_slave_destroy
,
528 .bios_param
= ata_std_bios_param
,
531 static const struct ata_port_operations sis_133_ops
= {
532 .port_disable
= ata_port_disable
,
533 .set_piomode
= sis_133_set_piomode
,
534 .set_dmamode
= sis_133_set_dmamode
,
535 .mode_filter
= ata_pci_default_filter
,
537 .tf_load
= ata_tf_load
,
538 .tf_read
= ata_tf_read
,
539 .check_status
= ata_check_status
,
540 .exec_command
= ata_exec_command
,
541 .dev_select
= ata_std_dev_select
,
543 .freeze
= ata_bmdma_freeze
,
544 .thaw
= ata_bmdma_thaw
,
545 .error_handler
= sis_error_handler
,
546 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
547 .cable_detect
= sis_133_cable_detect
,
549 .bmdma_setup
= ata_bmdma_setup
,
550 .bmdma_start
= ata_bmdma_start
,
551 .bmdma_stop
= ata_bmdma_stop
,
552 .bmdma_status
= ata_bmdma_status
,
553 .qc_prep
= ata_qc_prep
,
554 .qc_issue
= ata_qc_issue_prot
,
555 .data_xfer
= ata_data_xfer
,
557 .irq_handler
= ata_interrupt
,
558 .irq_clear
= ata_bmdma_irq_clear
,
559 .irq_on
= ata_irq_on
,
560 .irq_ack
= ata_irq_ack
,
562 .port_start
= ata_port_start
,
565 static const struct ata_port_operations sis_133_for_sata_ops
= {
566 .port_disable
= ata_port_disable
,
567 .set_piomode
= sis_133_set_piomode
,
568 .set_dmamode
= sis_133_set_dmamode
,
569 .mode_filter
= ata_pci_default_filter
,
571 .tf_load
= ata_tf_load
,
572 .tf_read
= ata_tf_read
,
573 .check_status
= ata_check_status
,
574 .exec_command
= ata_exec_command
,
575 .dev_select
= ata_std_dev_select
,
577 .freeze
= ata_bmdma_freeze
,
578 .thaw
= ata_bmdma_thaw
,
579 .error_handler
= ata_bmdma_error_handler
,
580 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
581 .cable_detect
= sis_133_cable_detect
,
583 .bmdma_setup
= ata_bmdma_setup
,
584 .bmdma_start
= ata_bmdma_start
,
585 .bmdma_stop
= ata_bmdma_stop
,
586 .bmdma_status
= ata_bmdma_status
,
587 .qc_prep
= ata_qc_prep
,
588 .qc_issue
= ata_qc_issue_prot
,
589 .data_xfer
= ata_data_xfer
,
591 .irq_handler
= ata_interrupt
,
592 .irq_clear
= ata_bmdma_irq_clear
,
593 .irq_on
= ata_irq_on
,
594 .irq_ack
= ata_irq_ack
,
596 .port_start
= ata_port_start
,
599 static const struct ata_port_operations sis_133_early_ops
= {
600 .port_disable
= ata_port_disable
,
601 .set_piomode
= sis_100_set_piomode
,
602 .set_dmamode
= sis_133_early_set_dmamode
,
603 .mode_filter
= ata_pci_default_filter
,
605 .tf_load
= ata_tf_load
,
606 .tf_read
= ata_tf_read
,
607 .check_status
= ata_check_status
,
608 .exec_command
= ata_exec_command
,
609 .dev_select
= ata_std_dev_select
,
611 .freeze
= ata_bmdma_freeze
,
612 .thaw
= ata_bmdma_thaw
,
613 .error_handler
= sis_error_handler
,
614 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
615 .cable_detect
= sis_66_cable_detect
,
617 .bmdma_setup
= ata_bmdma_setup
,
618 .bmdma_start
= ata_bmdma_start
,
619 .bmdma_stop
= ata_bmdma_stop
,
620 .bmdma_status
= ata_bmdma_status
,
621 .qc_prep
= ata_qc_prep
,
622 .qc_issue
= ata_qc_issue_prot
,
623 .data_xfer
= ata_data_xfer
,
625 .irq_handler
= ata_interrupt
,
626 .irq_clear
= ata_bmdma_irq_clear
,
627 .irq_on
= ata_irq_on
,
628 .irq_ack
= ata_irq_ack
,
630 .port_start
= ata_port_start
,
633 static const struct ata_port_operations sis_100_ops
= {
634 .port_disable
= ata_port_disable
,
635 .set_piomode
= sis_100_set_piomode
,
636 .set_dmamode
= sis_100_set_dmamode
,
637 .mode_filter
= ata_pci_default_filter
,
639 .tf_load
= ata_tf_load
,
640 .tf_read
= ata_tf_read
,
641 .check_status
= ata_check_status
,
642 .exec_command
= ata_exec_command
,
643 .dev_select
= ata_std_dev_select
,
645 .freeze
= ata_bmdma_freeze
,
646 .thaw
= ata_bmdma_thaw
,
647 .error_handler
= sis_error_handler
,
648 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
649 .cable_detect
= sis_66_cable_detect
,
651 .bmdma_setup
= ata_bmdma_setup
,
652 .bmdma_start
= ata_bmdma_start
,
653 .bmdma_stop
= ata_bmdma_stop
,
654 .bmdma_status
= ata_bmdma_status
,
655 .qc_prep
= ata_qc_prep
,
656 .qc_issue
= ata_qc_issue_prot
,
657 .data_xfer
= ata_data_xfer
,
659 .irq_handler
= ata_interrupt
,
660 .irq_clear
= ata_bmdma_irq_clear
,
661 .irq_on
= ata_irq_on
,
662 .irq_ack
= ata_irq_ack
,
664 .port_start
= ata_port_start
,
667 static const struct ata_port_operations sis_66_ops
= {
668 .port_disable
= ata_port_disable
,
669 .set_piomode
= sis_old_set_piomode
,
670 .set_dmamode
= sis_66_set_dmamode
,
671 .mode_filter
= ata_pci_default_filter
,
673 .tf_load
= ata_tf_load
,
674 .tf_read
= ata_tf_read
,
675 .check_status
= ata_check_status
,
676 .exec_command
= ata_exec_command
,
677 .dev_select
= ata_std_dev_select
,
678 .cable_detect
= sis_66_cable_detect
,
680 .freeze
= ata_bmdma_freeze
,
681 .thaw
= ata_bmdma_thaw
,
682 .error_handler
= sis_error_handler
,
683 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
685 .bmdma_setup
= ata_bmdma_setup
,
686 .bmdma_start
= ata_bmdma_start
,
687 .bmdma_stop
= ata_bmdma_stop
,
688 .bmdma_status
= ata_bmdma_status
,
689 .qc_prep
= ata_qc_prep
,
690 .qc_issue
= ata_qc_issue_prot
,
691 .data_xfer
= ata_data_xfer
,
693 .irq_handler
= ata_interrupt
,
694 .irq_clear
= ata_bmdma_irq_clear
,
695 .irq_on
= ata_irq_on
,
696 .irq_ack
= ata_irq_ack
,
698 .port_start
= ata_port_start
,
701 static const struct ata_port_operations sis_old_ops
= {
702 .port_disable
= ata_port_disable
,
703 .set_piomode
= sis_old_set_piomode
,
704 .set_dmamode
= sis_old_set_dmamode
,
705 .mode_filter
= ata_pci_default_filter
,
707 .tf_load
= ata_tf_load
,
708 .tf_read
= ata_tf_read
,
709 .check_status
= ata_check_status
,
710 .exec_command
= ata_exec_command
,
711 .dev_select
= ata_std_dev_select
,
713 .freeze
= ata_bmdma_freeze
,
714 .thaw
= ata_bmdma_thaw
,
715 .error_handler
= sis_error_handler
,
716 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
717 .cable_detect
= ata_cable_40wire
,
719 .bmdma_setup
= ata_bmdma_setup
,
720 .bmdma_start
= ata_bmdma_start
,
721 .bmdma_stop
= ata_bmdma_stop
,
722 .bmdma_status
= ata_bmdma_status
,
723 .qc_prep
= ata_qc_prep
,
724 .qc_issue
= ata_qc_issue_prot
,
725 .data_xfer
= ata_data_xfer
,
727 .irq_handler
= ata_interrupt
,
728 .irq_clear
= ata_bmdma_irq_clear
,
729 .irq_on
= ata_irq_on
,
730 .irq_ack
= ata_irq_ack
,
732 .port_start
= ata_port_start
,
735 static const struct ata_port_info sis_info
= {
737 .flags
= ATA_FLAG_SLAVE_POSS
,
738 .pio_mask
= 0x1f, /* pio0-4 */
741 .port_ops
= &sis_old_ops
,
743 static const struct ata_port_info sis_info33
= {
745 .flags
= ATA_FLAG_SLAVE_POSS
,
746 .pio_mask
= 0x1f, /* pio0-4 */
748 .udma_mask
= ATA_UDMA2
, /* UDMA 33 */
749 .port_ops
= &sis_old_ops
,
751 static const struct ata_port_info sis_info66
= {
753 .flags
= ATA_FLAG_SLAVE_POSS
,
754 .pio_mask
= 0x1f, /* pio0-4 */
755 .udma_mask
= ATA_UDMA4
, /* UDMA 66 */
756 .port_ops
= &sis_66_ops
,
758 static const struct ata_port_info sis_info100
= {
760 .flags
= ATA_FLAG_SLAVE_POSS
,
761 .pio_mask
= 0x1f, /* pio0-4 */
762 .udma_mask
= ATA_UDMA5
,
763 .port_ops
= &sis_100_ops
,
765 static const struct ata_port_info sis_info100_early
= {
767 .flags
= ATA_FLAG_SLAVE_POSS
,
768 .udma_mask
= ATA_UDMA5
,
769 .pio_mask
= 0x1f, /* pio0-4 */
770 .port_ops
= &sis_66_ops
,
772 static const struct ata_port_info sis_info133
= {
774 .flags
= ATA_FLAG_SLAVE_POSS
,
775 .pio_mask
= 0x1f, /* pio0-4 */
776 .udma_mask
= ATA_UDMA6
,
777 .port_ops
= &sis_133_ops
,
779 const struct ata_port_info sis_info133_for_sata
= {
781 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
782 .pio_mask
= 0x1f, /* pio0-4 */
783 .udma_mask
= ATA_UDMA6
,
784 .port_ops
= &sis_133_for_sata_ops
,
786 static const struct ata_port_info sis_info133_early
= {
788 .flags
= ATA_FLAG_SLAVE_POSS
,
789 .pio_mask
= 0x1f, /* pio0-4 */
790 .udma_mask
= ATA_UDMA6
,
791 .port_ops
= &sis_133_early_ops
,
794 /* Privately shared with the SiS180 SATA driver, not for use elsewhere */
795 EXPORT_SYMBOL_GPL(sis_info133_for_sata
);
797 static void sis_fixup(struct pci_dev
*pdev
, struct sis_chipset
*sis
)
802 if (sis
->info
== &sis_info133
) {
803 pci_read_config_word(pdev
, 0x50, ®w
);
805 pci_write_config_word(pdev
, 0x50, regw
& ~0x08);
806 pci_read_config_word(pdev
, 0x52, ®w
);
808 pci_write_config_word(pdev
, 0x52, regw
& ~0x08);
812 if (sis
->info
== &sis_info133_early
|| sis
->info
== &sis_info100
) {
814 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, 0x80);
815 /* Set compatibility bit */
816 pci_read_config_byte(pdev
, 0x49, ®
);
818 pci_write_config_byte(pdev
, 0x49, reg
| 0x01);
822 if (sis
->info
== &sis_info66
|| sis
->info
== &sis_info100_early
) {
824 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, 0x80);
825 /* Set compatibility bit */
826 pci_read_config_byte(pdev
, 0x52, ®
);
828 pci_write_config_byte(pdev
, 0x52, reg
| 0x04);
832 if (sis
->info
== &sis_info33
) {
833 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, ®
);
834 if (( reg
& 0x0F ) != 0x00)
835 pci_write_config_byte(pdev
, PCI_CLASS_PROG
, reg
& 0xF0);
836 /* Fall through to ATA16 fixup below */
839 if (sis
->info
== &sis_info
|| sis
->info
== &sis_info33
) {
840 /* force per drive recovery and active timings
841 needed on ATA_33 and below chips */
842 pci_read_config_byte(pdev
, 0x52, ®
);
844 pci_write_config_byte(pdev
, 0x52, reg
|0x08);
852 * sis_init_one - Register SiS ATA PCI device with kernel services
853 * @pdev: PCI device to register
854 * @ent: Entry in sis_pci_tbl matching with @pdev
856 * Called from kernel PCI layer. We probe for combined mode (sigh),
857 * and then hand over control to libata, for it to do the rest.
860 * Inherited from PCI layer (may sleep).
863 * Zero on success, or -ERRNO value.
866 static int sis_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
868 static int printed_version
;
869 struct ata_port_info port
;
870 const struct ata_port_info
*ppi
[] = { &port
, NULL
};
871 struct pci_dev
*host
= NULL
;
872 struct sis_chipset
*chipset
= NULL
;
873 struct sis_chipset
*sets
;
875 static struct sis_chipset sis_chipsets
[] = {
877 { 0x0968, &sis_info133
},
878 { 0x0966, &sis_info133
},
879 { 0x0965, &sis_info133
},
880 { 0x0745, &sis_info100
},
881 { 0x0735, &sis_info100
},
882 { 0x0733, &sis_info100
},
883 { 0x0635, &sis_info100
},
884 { 0x0633, &sis_info100
},
886 { 0x0730, &sis_info100_early
}, /* 100 with ATA 66 layout */
887 { 0x0550, &sis_info100_early
}, /* 100 with ATA 66 layout */
889 { 0x0640, &sis_info66
},
890 { 0x0630, &sis_info66
},
891 { 0x0620, &sis_info66
},
892 { 0x0540, &sis_info66
},
893 { 0x0530, &sis_info66
},
895 { 0x5600, &sis_info33
},
896 { 0x5598, &sis_info33
},
897 { 0x5597, &sis_info33
},
898 { 0x5591, &sis_info33
},
899 { 0x5582, &sis_info33
},
900 { 0x5581, &sis_info33
},
902 { 0x5596, &sis_info
},
903 { 0x5571, &sis_info
},
904 { 0x5517, &sis_info
},
905 { 0x5511, &sis_info
},
909 static struct sis_chipset sis133_early
= {
910 0x0, &sis_info133_early
912 static struct sis_chipset sis133
= {
915 static struct sis_chipset sis100_early
= {
916 0x0, &sis_info100_early
918 static struct sis_chipset sis100
= {
922 if (!printed_version
++)
923 dev_printk(KERN_DEBUG
, &pdev
->dev
,
924 "version " DRV_VERSION
"\n");
926 /* We have to find the bridge first */
928 for (sets
= &sis_chipsets
[0]; sets
->device
; sets
++) {
929 host
= pci_get_device(PCI_VENDOR_ID_SI
, sets
->device
, NULL
);
931 chipset
= sets
; /* Match found */
932 if (sets
->device
== 0x630) { /* SIS630 */
933 if (host
->revision
>= 0x30) /* 630 ET */
934 chipset
= &sis100_early
;
940 /* Look for concealed bridges */
941 if (chipset
== NULL
) {
946 /* Disable ID masking and register remapping then
947 see what the real ID is */
949 pci_read_config_dword(pdev
, 0x54, &idemisc
);
950 pci_write_config_dword(pdev
, 0x54, idemisc
& 0x7fffffff);
951 pci_read_config_word(pdev
, PCI_DEVICE_ID
, &trueid
);
952 pci_write_config_dword(pdev
, 0x54, idemisc
);
955 case 0x5518: /* SIS 962/963 */
957 if ((idemisc
& 0x40000000) == 0) {
958 pci_write_config_dword(pdev
, 0x54, idemisc
| 0x40000000);
959 printk(KERN_INFO
"SIS5513: Switching to 5513 register mapping\n");
962 case 0x0180: /* SIS 965/965L */
965 case 0x1180: /* SIS 966/966L */
972 if (chipset
== NULL
) {
973 struct pci_dev
*lpc_bridge
;
978 /* Try the second unmasking technique */
979 pci_read_config_byte(pdev
, 0x4a, &idecfg
);
980 pci_write_config_byte(pdev
, 0x4a, idecfg
| 0x10);
981 pci_read_config_word(pdev
, PCI_DEVICE_ID
, &trueid
);
982 pci_write_config_byte(pdev
, 0x4a, idecfg
);
986 lpc_bridge
= pci_get_slot(pdev
->bus
, 0x10); /* Bus 0 Dev 2 Fn 0 */
987 if (lpc_bridge
== NULL
)
989 pci_read_config_byte(pdev
, 0x49, &prefctl
);
990 pci_dev_put(lpc_bridge
);
992 if (lpc_bridge
->revision
== 0x10 && (prefctl
& 0x80)) {
993 chipset
= &sis133_early
;
1002 /* No chipset info, no support */
1003 if (chipset
== NULL
)
1006 port
= *chipset
->info
;
1007 port
.private_data
= chipset
;
1009 sis_fixup(pdev
, chipset
);
1011 return ata_pci_init_one(pdev
, ppi
);
1014 static const struct pci_device_id sis_pci_tbl
[] = {
1015 { PCI_VDEVICE(SI
, 0x5513), }, /* SiS 5513 */
1016 { PCI_VDEVICE(SI
, 0x5518), }, /* SiS 5518 */
1017 { PCI_VDEVICE(SI
, 0x1180), }, /* SiS 1180 */
1022 static struct pci_driver sis_pci_driver
= {
1024 .id_table
= sis_pci_tbl
,
1025 .probe
= sis_init_one
,
1026 .remove
= ata_pci_remove_one
,
1028 .suspend
= ata_pci_device_suspend
,
1029 .resume
= ata_pci_device_resume
,
1033 static int __init
sis_init(void)
1035 return pci_register_driver(&sis_pci_driver
);
1038 static void __exit
sis_exit(void)
1040 pci_unregister_driver(&sis_pci_driver
);
1043 module_init(sis_init
);
1044 module_exit(sis_exit
);
1046 MODULE_AUTHOR("Alan Cox");
1047 MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA");
1048 MODULE_LICENSE("GPL");
1049 MODULE_DEVICE_TABLE(pci
, sis_pci_tbl
);
1050 MODULE_VERSION(DRV_VERSION
);