drivers/ata/pata_via.c

   1 /*
   2  * pata_via.c   - VIA PATA for new ATA layer
   3  *                        (C) 2005-2006 Red Hat Inc
   4  *                        Alan Cox <alan@redhat.com>
   5  *
   6  *  Documentation
   7  *      Most chipset documentation available under NDA only
   8  *
   9  *  VIA version guide
  10  *      VIA VT82C561    -       early design, uses ata_generic currently
  11  *      VIA VT82C576    -       MWDMA, 33Mhz
  12  *      VIA VT82C586    -       MWDMA, 33Mhz
  13  *      VIA VT82C586a   -       Added UDMA to 33Mhz
  14  *      VIA VT82C586b   -       UDMA33
  15  *      VIA VT82C596a   -       Nonfunctional UDMA66
  16  *      VIA VT82C596b   -       Working UDMA66
  17  *      VIA VT82C686    -       Nonfunctional UDMA66
  18  *      VIA VT82C686a   -       Working UDMA66
  19  *      VIA VT82C686b   -       Updated to UDMA100
  20  *      VIA VT8231      -       UDMA100
  21  *      VIA VT8233      -       UDMA100
  22  *      VIA VT8233a     -       UDMA133
  23  *      VIA VT8233c     -       UDMA100
  24  *      VIA VT8235      -       UDMA133
  25  *      VIA VT8237      -       UDMA133
  26  *      VIA VT8251      -       UDMA133
  27  *
  28  *      Most registers remain compatible across chips. Others start reserved
  29  *      and acquire sensible semantics if set to 1 (eg cable detect). A few
  30  *      exceptions exist, notably around the FIFO settings.
  31  *
  32  *      One additional quirk of the VIA design is that like ALi they use few
  33  *      PCI IDs for a lot of chips.
  34  *
  35  *      Based heavily on:
  36  *
  37  * Version 3.38
  38  *
  39  * VIA IDE driver for Linux. Supported southbridges:
  40  *
  41  *   vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
  42  *   vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
  43  *   vt8235, vt8237
  44  *
  45  * Copyright (c) 2000-2002 Vojtech Pavlik
  46  *
  47  * Based on the work of:
  48  *      Michel Aubry
  49  *      Jeff Garzik
  50  *      Andre Hedrick
  51
  52  */
  53
  54 #include <linux/kernel.h>
  55 #include <linux/module.h>
  56 #include <linux/pci.h>
  57 #include <linux/init.h>
  58 #include <linux/blkdev.h>
  59 #include <linux/delay.h>
  60 #include <scsi/scsi_host.h>
  61 #include <linux/libata.h>
  62
  63 #define DRV_NAME "pata_via"
  64 #define DRV_VERSION "0.2.0"
  65
  66 /*
  67  *      The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
  68  *      driver.
  69  */
  70
  71 enum {
  72         VIA_UDMA        = 0x007,
  73         VIA_UDMA_NONE   = 0x000,
  74         VIA_UDMA_33     = 0x001,
  75         VIA_UDMA_66     = 0x002,
  76         VIA_UDMA_100    = 0x003,
  77         VIA_UDMA_133    = 0x004,
  78         VIA_BAD_PREQ    = 0x010, /* Crashes if PREQ# till DDACK# set */
  79         VIA_BAD_CLK66   = 0x020, /* 66 MHz clock doesn't work correctly */
  80         VIA_SET_FIFO    = 0x040, /* Needs to have FIFO split set */
  81         VIA_NO_UNMASK   = 0x080, /* Doesn't work with IRQ unmasking on */
  82         VIA_BAD_ID      = 0x100, /* Has wrong vendor ID (0x1107) */
  83         VIA_BAD_AST     = 0x200, /* Don't touch Address Setup Timing */
  84         VIA_NO_ENABLES  = 0x400, /* Has no enablebits */
  85 };
  86
  87 /*
  88  * VIA SouthBridge chips.
  89  */
  90
  91 static const struct via_isa_bridge {
  92         const char *name;
  93         u16 id;
  94         u8 rev_min;
  95         u8 rev_max;
  96         u16 flags;
  97 } via_isa_bridges[] = {
  98         { "vt8251",     PCI_DEVICE_ID_VIA_8251,     0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  99         { "cx700",      PCI_DEVICE_ID_VIA_CX700,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
 100         { "vt6410",     PCI_DEVICE_ID_VIA_6410,     0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES},
 101         { "vt8237a",    PCI_DEVICE_ID_VIA_8237A,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
 102         { "vt8237",     PCI_DEVICE_ID_VIA_8237,     0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
 103         { "vt8235",     PCI_DEVICE_ID_VIA_8235,     0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
 104         { "vt8233a",    PCI_DEVICE_ID_VIA_8233A,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
 105         { "vt8233c",    PCI_DEVICE_ID_VIA_8233C_0,  0x00, 0x2f, VIA_UDMA_100 },
 106         { "vt8233",     PCI_DEVICE_ID_VIA_8233_0,   0x00, 0x2f, VIA_UDMA_100 },
 107         { "vt8231",     PCI_DEVICE_ID_VIA_8231,     0x00, 0x2f, VIA_UDMA_100 },
 108         { "vt82c686b",  PCI_DEVICE_ID_VIA_82C686,   0x40, 0x4f, VIA_UDMA_100 },
 109         { "vt82c686a",  PCI_DEVICE_ID_VIA_82C686,   0x10, 0x2f, VIA_UDMA_66 },
 110         { "vt82c686",   PCI_DEVICE_ID_VIA_82C686,   0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
 111         { "vt82c596b",  PCI_DEVICE_ID_VIA_82C596,   0x10, 0x2f, VIA_UDMA_66 },
 112         { "vt82c596a",  PCI_DEVICE_ID_VIA_82C596,   0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
 113         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
 114         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
 115         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
 116         { "vt82c586a",  PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
 117         { "vt82c586",   PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
 118         { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
 119         { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
 120         { NULL }
 121 };
 122
 123 /**
 124  *      via_cable_detect        -       cable detection
 125  *      @ap: ATA port
 126  *
 127  *      Perform cable detection. Actually for the VIA case the BIOS
 128  *      already did this for us. We read the values provided by the
 129  *      BIOS. If you are using an 8235 in a non-PC configuration you
 130  *      may need to update this code.
 131  *
 132  *      Hotplug also impacts on this.
 133  */
 134
 135 static int via_cable_detect(struct ata_port *ap) {
 136         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 137         u32 ata66;
 138
 139         pci_read_config_dword(pdev, 0x50, &ata66);
 140         /* Check both the drive cable reporting bits, we might not have
 141            two drives */
 142         if (ata66 & (0x10100000 >> (16 * ap->port_no)))
 143                 return ATA_CBL_PATA80;
 144         else
 145                 return ATA_CBL_PATA40;
 146 }
 147
 148 static int via_pre_reset(struct ata_port *ap)
 149 {
 150         const struct via_isa_bridge *config = ap->host->private_data;
 151
 152         if (!(config->flags & VIA_NO_ENABLES)) {
 153                 static const struct pci_bits via_enable_bits[] = {
 154                         { 0x40, 1, 0x02, 0x02 },
 155                         { 0x40, 1, 0x01, 0x01 }
 156                 };
 157
 158                 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 159
 160                 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
 161                         return -ENOENT;
 162         }
 163
 164         if ((config->flags & VIA_UDMA) >= VIA_UDMA_66)
 165                 ap->cbl = via_cable_detect(ap);
 166         else
 167                 ap->cbl = ATA_CBL_PATA40;
 168         return ata_std_prereset(ap);
 169 }
 170
 171
 172 /**
 173  *      via_error_handler               -       reset for VIA chips
 174  *      @ap: ATA port
 175  *
 176  *      Handle the reset callback for the later chips with cable detect
 177  */
 178
 179 static void via_error_handler(struct ata_port *ap)
 180 {
 181         ata_bmdma_drive_eh(ap, via_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
 182 }
 183
 184 /**
 185  *      via_do_set_mode -       set initial PIO mode data
 186  *      @ap: ATA interface
 187  *      @adev: ATA device
 188  *      @mode: ATA mode being programmed
 189  *      @tdiv: Clocks per PCI clock
 190  *      @set_ast: Set to program address setup
 191  *      @udma_type: UDMA mode/format of registers
 192  *
 193  *      Program the VIA registers for DMA and PIO modes. Uses the ata timing
 194  *      support in order to compute modes.
 195  *
 196  *      FIXME: Hotplug will require we serialize multiple mode changes
 197  *      on the two channels.
 198  */
 199
 200 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
 201 {
 202         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 203         struct ata_device *peer = ata_dev_pair(adev);
 204         struct ata_timing t, p;
 205         static int via_clock = 33333;   /* Bus clock in kHZ - ought to be tunable one day */
 206         unsigned long T =  1000000000 / via_clock;
 207         unsigned long UT = T/tdiv;
 208         int ut;
 209         int offset = 3 - (2*ap->port_no) - adev->devno;
 210
 211
 212         /* Calculate the timing values we require */
 213         ata_timing_compute(adev, mode, &t, T, UT);
 214
 215         /* We share 8bit timing so we must merge the constraints */
 216         if (peer) {
 217                 if (peer->pio_mode) {
 218                         ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
 219                         ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
 220                 }
 221         }
 222
 223         /* Address setup is programmable but breaks on UDMA133 setups */
 224         if (set_ast) {
 225                 u8 setup;       /* 2 bits per drive */
 226                 int shift = 2 * offset;
 227
 228                 pci_read_config_byte(pdev, 0x4C, &setup);
 229                 setup &= ~(3 << shift);
 230                 setup |= FIT(t.setup, 1, 4) << shift;   /* 1,4 or 1,4 - 1  FIXME */
 231                 pci_write_config_byte(pdev, 0x4C, setup);
 232         }
 233
 234         /* Load the PIO mode bits */
 235         pci_write_config_byte(pdev, 0x4F - ap->port_no,
 236                 ((FIT(t.act8b, 1, 16) - 1) << 4) | (FIT(t.rec8b, 1, 16) - 1));
 237         pci_write_config_byte(pdev, 0x48 + offset,
 238                 ((FIT(t.active, 1, 16) - 1) << 4) | (FIT(t.recover, 1, 16) - 1));
 239
 240         /* Load the UDMA bits according to type */
 241         switch(udma_type) {
 242                 default:
 243                         /* BUG() ? */
 244                         /* fall through */
 245                 case 33:
 246                         ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 5) - 2)) : 0x03;
 247                         break;
 248                 case 66:
 249                         ut = t.udma ? (0xe8 | (FIT(t.udma, 2, 9) - 2)) : 0x0f;
 250                         break;
 251                 case 100:
 252                         ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
 253                         break;
 254                 case 133:
 255                         ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
 256                         break;
 257         }
 258         /* Set UDMA unless device is not UDMA capable */
 259         if (udma_type)
 260                 pci_write_config_byte(pdev, 0x50 + offset, ut);
 261 }
 262
 263 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
 264 {
 265         const struct via_isa_bridge *config = ap->host->private_data;
 266         int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
 267         int mode = config->flags & VIA_UDMA;
 268         static u8 tclock[5] = { 1, 1, 2, 3, 4 };
 269         static u8 udma[5] = { 0, 33, 66, 100, 133 };
 270
 271         via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
 272 }
 273
 274 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 275 {
 276         const struct via_isa_bridge *config = ap->host->private_data;
 277         int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
 278         int mode = config->flags & VIA_UDMA;
 279         static u8 tclock[5] = { 1, 1, 2, 3, 4 };
 280         static u8 udma[5] = { 0, 33, 66, 100, 133 };
 281
 282         via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
 283 }
 284
 285 static struct scsi_host_template via_sht = {
 286         .module                 = THIS_MODULE,
 287         .name                   = DRV_NAME,
 288         .ioctl                  = ata_scsi_ioctl,
 289         .queuecommand           = ata_scsi_queuecmd,
 290         .can_queue              = ATA_DEF_QUEUE,
 291         .this_id                = ATA_SHT_THIS_ID,
 292         .sg_tablesize           = LIBATA_MAX_PRD,
 293         .cmd_per_lun            = ATA_SHT_CMD_PER_LUN,
 294         .emulated               = ATA_SHT_EMULATED,
 295         .use_clustering         = ATA_SHT_USE_CLUSTERING,
 296         .proc_name              = DRV_NAME,
 297         .dma_boundary           = ATA_DMA_BOUNDARY,
 298         .slave_configure        = ata_scsi_slave_config,
 299         .slave_destroy          = ata_scsi_slave_destroy,
 300         .bios_param             = ata_std_bios_param,
 301         .resume                 = ata_scsi_device_resume,
 302         .suspend                = ata_scsi_device_suspend,
 303 };
 304
 305 static struct ata_port_operations via_port_ops = {
 306         .port_disable   = ata_port_disable,
 307         .set_piomode    = via_set_piomode,
 308         .set_dmamode    = via_set_dmamode,
 309         .mode_filter    = ata_pci_default_filter,
 310
 311         .tf_load        = ata_tf_load,
 312         .tf_read        = ata_tf_read,
 313         .check_status   = ata_check_status,
 314         .exec_command   = ata_exec_command,
 315         .dev_select     = ata_std_dev_select,
 316
 317         .freeze         = ata_bmdma_freeze,
 318         .thaw           = ata_bmdma_thaw,
 319         .error_handler  = via_error_handler,
 320         .post_internal_cmd = ata_bmdma_post_internal_cmd,
 321
 322         .bmdma_setup    = ata_bmdma_setup,
 323         .bmdma_start    = ata_bmdma_start,
 324         .bmdma_stop     = ata_bmdma_stop,
 325         .bmdma_status   = ata_bmdma_status,
 326
 327         .qc_prep        = ata_qc_prep,
 328         .qc_issue       = ata_qc_issue_prot,
 329
 330         .data_xfer      = ata_pio_data_xfer,
 331
 332         .irq_handler    = ata_interrupt,
 333         .irq_clear      = ata_bmdma_irq_clear,
 334
 335         .port_start     = ata_port_start,
 336         .port_stop      = ata_port_stop,
 337         .host_stop      = ata_host_stop
 338 };
 339
 340 static struct ata_port_operations via_port_ops_noirq = {
 341         .port_disable   = ata_port_disable,
 342         .set_piomode    = via_set_piomode,
 343         .set_dmamode    = via_set_dmamode,
 344         .mode_filter    = ata_pci_default_filter,
 345
 346         .tf_load        = ata_tf_load,
 347         .tf_read        = ata_tf_read,
 348         .check_status   = ata_check_status,
 349         .exec_command   = ata_exec_command,
 350         .dev_select     = ata_std_dev_select,
 351
 352         .freeze         = ata_bmdma_freeze,
 353         .thaw           = ata_bmdma_thaw,
 354         .error_handler  = via_error_handler,
 355         .post_internal_cmd = ata_bmdma_post_internal_cmd,
 356
 357         .bmdma_setup    = ata_bmdma_setup,
 358         .bmdma_start    = ata_bmdma_start,
 359         .bmdma_stop     = ata_bmdma_stop,
 360         .bmdma_status   = ata_bmdma_status,
 361
 362         .qc_prep        = ata_qc_prep,
 363         .qc_issue       = ata_qc_issue_prot,
 364
 365         .data_xfer      = ata_pio_data_xfer_noirq,
 366
 367         .irq_handler    = ata_interrupt,
 368         .irq_clear      = ata_bmdma_irq_clear,
 369
 370         .port_start     = ata_port_start,
 371         .port_stop      = ata_port_stop,
 372         .host_stop      = ata_host_stop
 373 };
 374
 375 /**
 376  *      via_config_fifo         -       set up the FIFO
 377  *      @pdev: PCI device
 378  *      @flags: configuration flags
 379  *
 380  *      Set the FIFO properties for this device if neccessary. Used both on
 381  *      set up and on and the resume path
 382  */
 383
 384 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
 385 {
 386         u8 enable;
 387
 388         /* 0x40 low bits indicate enabled channels */
 389         pci_read_config_byte(pdev, 0x40 , &enable);
 390         enable &= 3;
 391
 392         if (flags & VIA_SET_FIFO) {
 393                 u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
 394                 u8 fifo;
 395
 396                 pci_read_config_byte(pdev, 0x43, &fifo);
 397
 398                 /* Clear PREQ# until DDACK# for errata */
 399                 if (flags & VIA_BAD_PREQ)
 400                         fifo &= 0x7F;
 401                 else
 402                         fifo &= 0x9f;
 403                 /* Turn on FIFO for enabled channels */
 404                 fifo |= fifo_setting[enable];
 405                 pci_write_config_byte(pdev, 0x43, fifo);
 406         }
 407 }
 408
 409 /**
 410  *      via_init_one            -       discovery callback
 411  *      @pdev: PCI device
 412  *      @id: PCI table info
 413  *
 414  *      A VIA IDE interface has been discovered. Figure out what revision
 415  *      and perform configuration work before handing it to the ATA layer
 416  */
 417
 418 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 419 {
 420         /* Early VIA without UDMA support */
 421         static struct ata_port_info via_mwdma_info = {
 422                 .sht = &via_sht,
 423                 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SETXFER_POLLING,
 424                 .pio_mask = 0x1f,
 425                 .mwdma_mask = 0x07,
 426                 .port_ops = &via_port_ops
 427         };
 428         /* Ditto with IRQ masking required */
 429         static struct ata_port_info via_mwdma_info_borked = {
 430                 .sht = &via_sht,
 431                 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SETXFER_POLLING,
 432                 .pio_mask = 0x1f,
 433                 .mwdma_mask = 0x07,
 434                 .port_ops = &via_port_ops_noirq,
 435         };
 436         /* VIA UDMA 33 devices (and borked 66) */
 437         static struct ata_port_info via_udma33_info = {
 438                 .sht = &via_sht,
 439                 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SETXFER_POLLING,
 440                 .pio_mask = 0x1f,
 441                 .mwdma_mask = 0x07,
 442                 .udma_mask = 0x7,
 443                 .port_ops = &via_port_ops
 444         };
 445         /* VIA UDMA 66 devices */
 446         static struct ata_port_info via_udma66_info = {
 447                 .sht = &via_sht,
 448                 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SETXFER_POLLING,
 449                 .pio_mask = 0x1f,
 450                 .mwdma_mask = 0x07,
 451                 .udma_mask = 0x1f,
 452                 .port_ops = &via_port_ops
 453         };
 454         /* VIA UDMA 100 devices */
 455         static struct ata_port_info via_udma100_info = {
 456                 .sht = &via_sht,
 457                 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SETXFER_POLLING,
 458                 .pio_mask = 0x1f,
 459                 .mwdma_mask = 0x07,
 460                 .udma_mask = 0x3f,
 461                 .port_ops = &via_port_ops
 462         };
 463         /* UDMA133 with bad AST (All current 133) */
 464         static struct ata_port_info via_udma133_info = {
 465                 .sht = &via_sht,
 466                 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SETXFER_POLLING,
 467                 .pio_mask = 0x1f,
 468                 .mwdma_mask = 0x07,
 469                 .udma_mask = 0x7f,      /* FIXME: should check north bridge */
 470                 .port_ops = &via_port_ops
 471         };
 472         struct ata_port_info *port_info[2], *type;
 473         struct pci_dev *isa = NULL;
 474         const struct via_isa_bridge *config;
 475         static int printed_version;
 476         u8 t;
 477         u8 enable;
 478         u32 timing;
 479
 480         if (!printed_version++)
 481                 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
 482
 483         /* To find out how the IDE will behave and what features we
 484            actually have to look at the bridge not the IDE controller */
 485         for (config = via_isa_bridges; config->id; config++)
 486                 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
 487                         !!(config->flags & VIA_BAD_ID),
 488                         config->id, NULL))) {
 489
 490                         pci_read_config_byte(isa, PCI_REVISION_ID, &t);
 491                         if (t >= config->rev_min &&
 492                             t <= config->rev_max)
 493                                 break;
 494                         pci_dev_put(isa);
 495                 }
 496
 497         if (!config->id) {
 498                 printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n");
 499                 return -ENODEV;
 500         }
 501         pci_dev_put(isa);
 502
 503         /* 0x40 low bits indicate enabled channels */
 504         pci_read_config_byte(pdev, 0x40 , &enable);
 505         enable &= 3;
 506         if (enable == 0) {
 507                 return -ENODEV;
 508         }
 509
 510         /* Initialise the FIFO for the enabled channels. */
 511         via_config_fifo(pdev, config->flags);
 512
 513         /* Clock set up */
 514         switch(config->flags & VIA_UDMA) {
 515                 case VIA_UDMA_NONE:
 516                         if (config->flags & VIA_NO_UNMASK)
 517                                 type = &via_mwdma_info_borked;
 518                         else
 519                                 type = &via_mwdma_info;
 520                         break;
 521                 case VIA_UDMA_33:
 522                         type = &via_udma33_info;
 523                         break;
 524                 case VIA_UDMA_66:
 525                         type = &via_udma66_info;
 526                         /* The 66 MHz devices require we enable the clock */
 527                         pci_read_config_dword(pdev, 0x50, &timing);
 528                         timing |= 0x80008;
 529                         pci_write_config_dword(pdev, 0x50, timing);
 530                         break;
 531                 case VIA_UDMA_100:
 532                         type = &via_udma100_info;
 533                         break;
 534                 case VIA_UDMA_133:
 535                         type = &via_udma133_info;
 536                         break;
 537                 default:
 538                         WARN_ON(1);
 539                         return -ENODEV;
 540         }
 541
 542         if (config->flags & VIA_BAD_CLK66) {
 543                 /* Disable the 66MHz clock on problem devices */
 544                 pci_read_config_dword(pdev, 0x50, &timing);
 545                 timing &= ~0x80008;
 546                 pci_write_config_dword(pdev, 0x50, timing);
 547         }
 548
 549         /* We have established the device type, now fire it up */
 550         type->private_data = (void *)config;
 551
 552         port_info[0] = port_info[1] = type;
 553         return ata_pci_init_one(pdev, port_info, 2);
 554 }
 555
 556 /**
 557  *      via_reinit_one          -       reinit after resume
 558  *      @pdev; PCI device
 559  *
 560  *      Called when the VIA PATA device is resumed. We must then
 561  *      reconfigure the fifo and other setup we may have altered. In
 562  *      addition the kernel needs to have the resume methods on PCI
 563  *      quirk supported.
 564  */
 565
 566 static int via_reinit_one(struct pci_dev *pdev)
 567 {
 568         u32 timing;
 569         struct ata_host *host = dev_get_drvdata(&pdev->dev);
 570         const struct via_isa_bridge *config = host->private_data;
 571
 572         via_config_fifo(pdev, config->flags);
 573
 574         if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
 575                 /* The 66 MHz devices require we enable the clock */
 576                 pci_read_config_dword(pdev, 0x50, &timing);
 577                 timing |= 0x80008;
 578                 pci_write_config_dword(pdev, 0x50, timing);
 579         }
 580         if (config->flags & VIA_BAD_CLK66) {
 581                 /* Disable the 66MHz clock on problem devices */
 582                 pci_read_config_dword(pdev, 0x50, &timing);
 583                 timing &= ~0x80008;
 584                 pci_write_config_dword(pdev, 0x50, timing);
 585         }
 586         return ata_pci_device_resume(pdev);
 587 }
 588
 589 static const struct pci_device_id via[] = {
 590         { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1), },
 591         { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1), },
 592         { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410), },
 593         { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), },
 594
 595         { },
 596 };
 597
 598 static struct pci_driver via_pci_driver = {
 599         .name           = DRV_NAME,
 600         .id_table       = via,
 601         .probe          = via_init_one,
 602         .remove         = ata_pci_remove_one,
 603         .suspend        = ata_pci_device_suspend,
 604         .resume         = via_reinit_one,
 605 };
 606
 607 static int __init via_init(void)
 608 {
 609         return pci_register_driver(&via_pci_driver);
 610 }
 611
 612 static void __exit via_exit(void)
 613 {
 614         pci_unregister_driver(&via_pci_driver);
 615 }
 616
 617 MODULE_AUTHOR("Alan Cox");
 618 MODULE_DESCRIPTION("low-level driver for VIA PATA");
 619 MODULE_LICENSE("GPL");
 620 MODULE_DEVICE_TABLE(pci, via);
 621 MODULE_VERSION(DRV_VERSION);
 622
 623 module_init(via_init);
 624 module_exit(via_exit);