2 * sata_promise.c - Promise SATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
26 * libata documentation is available via 'make {ps|pdf}docs',
27 * as Documentation/DocBook/libata.*
29 * Hardware information only available under NDA.
33 #include <linux/kernel.h>
34 #include <linux/module.h>
35 #include <linux/pci.h>
36 #include <linux/init.h>
37 #include <linux/blkdev.h>
38 #include <linux/delay.h>
39 #include <linux/interrupt.h>
40 #include <linux/sched.h>
41 #include <linux/device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_cmnd.h>
44 #include <linux/libata.h>
46 #include "sata_promise.h"
48 #define DRV_NAME "sata_promise"
49 #define DRV_VERSION "1.04"
53 PDC_PKT_SUBMIT
= 0x40, /* Command packet pointer addr */
54 PDC_INT_SEQMASK
= 0x40, /* Mask of asserted SEQ INTs */
55 PDC_TBG_MODE
= 0x41, /* TBG mode */
56 PDC_FLASH_CTL
= 0x44, /* Flash control register */
57 PDC_PCI_CTL
= 0x48, /* PCI control and status register */
58 PDC_GLOBAL_CTL
= 0x48, /* Global control/status (per port) */
59 PDC_CTLSTAT
= 0x60, /* IDE control and status (per port) */
60 PDC_SATA_PLUG_CSR
= 0x6C, /* SATA Plug control/status reg */
61 PDC2_SATA_PLUG_CSR
= 0x60, /* SATAII Plug control/status reg */
62 PDC_SLEW_CTL
= 0x470, /* slew rate control reg */
64 PDC_ERR_MASK
= (1<<19) | (1<<20) | (1<<21) | (1<<22) |
65 (1<<8) | (1<<9) | (1<<10),
67 board_2037x
= 0, /* FastTrak S150 TX2plus */
68 board_20319
= 1, /* FastTrak S150 TX4 */
69 board_20619
= 2, /* FastTrak TX4000 */
70 board_20771
= 3, /* FastTrak TX2300 */
71 board_2057x
= 4, /* SATAII150 Tx2plus */
72 board_40518
= 5, /* SATAII150 Tx4 */
74 PDC_HAS_PATA
= (1 << 1), /* PDC20375/20575 has PATA */
76 PDC_RESET
= (1 << 11), /* HDMA reset */
78 PDC_COMMON_FLAGS
= ATA_FLAG_NO_LEGACY
| ATA_FLAG_SRST
|
79 ATA_FLAG_MMIO
| ATA_FLAG_NO_ATAPI
|
84 struct pdc_port_priv
{
89 struct pdc_host_priv
{
93 static u32
pdc_sata_scr_read (struct ata_port
*ap
, unsigned int sc_reg
);
94 static void pdc_sata_scr_write (struct ata_port
*ap
, unsigned int sc_reg
, u32 val
);
95 static int pdc_ata_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
);
96 static irqreturn_t
pdc_interrupt (int irq
, void *dev_instance
);
97 static void pdc_eng_timeout(struct ata_port
*ap
);
98 static int pdc_port_start(struct ata_port
*ap
);
99 static void pdc_port_stop(struct ata_port
*ap
);
100 static void pdc_pata_phy_reset(struct ata_port
*ap
);
101 static void pdc_sata_phy_reset(struct ata_port
*ap
);
102 static void pdc_qc_prep(struct ata_queued_cmd
*qc
);
103 static void pdc_tf_load_mmio(struct ata_port
*ap
, const struct ata_taskfile
*tf
);
104 static void pdc_exec_command_mmio(struct ata_port
*ap
, const struct ata_taskfile
*tf
);
105 static void pdc_irq_clear(struct ata_port
*ap
);
106 static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd
*qc
);
107 static void pdc_host_stop(struct ata_host
*host
);
110 static struct scsi_host_template pdc_ata_sht
= {
111 .module
= THIS_MODULE
,
113 .ioctl
= ata_scsi_ioctl
,
114 .queuecommand
= ata_scsi_queuecmd
,
115 .can_queue
= ATA_DEF_QUEUE
,
116 .this_id
= ATA_SHT_THIS_ID
,
117 .sg_tablesize
= LIBATA_MAX_PRD
,
118 .cmd_per_lun
= ATA_SHT_CMD_PER_LUN
,
119 .emulated
= ATA_SHT_EMULATED
,
120 .use_clustering
= ATA_SHT_USE_CLUSTERING
,
121 .proc_name
= DRV_NAME
,
122 .dma_boundary
= ATA_DMA_BOUNDARY
,
123 .slave_configure
= ata_scsi_slave_config
,
124 .slave_destroy
= ata_scsi_slave_destroy
,
125 .bios_param
= ata_std_bios_param
,
128 static const struct ata_port_operations pdc_sata_ops
= {
129 .port_disable
= ata_port_disable
,
130 .tf_load
= pdc_tf_load_mmio
,
131 .tf_read
= ata_tf_read
,
132 .check_status
= ata_check_status
,
133 .exec_command
= pdc_exec_command_mmio
,
134 .dev_select
= ata_std_dev_select
,
136 .phy_reset
= pdc_sata_phy_reset
,
138 .qc_prep
= pdc_qc_prep
,
139 .qc_issue
= pdc_qc_issue_prot
,
140 .eng_timeout
= pdc_eng_timeout
,
141 .data_xfer
= ata_mmio_data_xfer
,
142 .irq_handler
= pdc_interrupt
,
143 .irq_clear
= pdc_irq_clear
,
145 .scr_read
= pdc_sata_scr_read
,
146 .scr_write
= pdc_sata_scr_write
,
147 .port_start
= pdc_port_start
,
148 .port_stop
= pdc_port_stop
,
149 .host_stop
= pdc_host_stop
,
152 static const struct ata_port_operations pdc_pata_ops
= {
153 .port_disable
= ata_port_disable
,
154 .tf_load
= pdc_tf_load_mmio
,
155 .tf_read
= ata_tf_read
,
156 .check_status
= ata_check_status
,
157 .exec_command
= pdc_exec_command_mmio
,
158 .dev_select
= ata_std_dev_select
,
160 .phy_reset
= pdc_pata_phy_reset
,
162 .qc_prep
= pdc_qc_prep
,
163 .qc_issue
= pdc_qc_issue_prot
,
164 .data_xfer
= ata_mmio_data_xfer
,
165 .eng_timeout
= pdc_eng_timeout
,
166 .irq_handler
= pdc_interrupt
,
167 .irq_clear
= pdc_irq_clear
,
169 .port_start
= pdc_port_start
,
170 .port_stop
= pdc_port_stop
,
171 .host_stop
= pdc_host_stop
,
174 static const struct ata_port_info pdc_port_info
[] = {
178 .flags
= PDC_COMMON_FLAGS
| ATA_FLAG_SATA
,
179 .pio_mask
= 0x1f, /* pio0-4 */
180 .mwdma_mask
= 0x07, /* mwdma0-2 */
181 .udma_mask
= 0x7f, /* udma0-6 ; FIXME */
182 .port_ops
= &pdc_sata_ops
,
188 .flags
= PDC_COMMON_FLAGS
| ATA_FLAG_SATA
,
189 .pio_mask
= 0x1f, /* pio0-4 */
190 .mwdma_mask
= 0x07, /* mwdma0-2 */
191 .udma_mask
= 0x7f, /* udma0-6 ; FIXME */
192 .port_ops
= &pdc_sata_ops
,
198 .flags
= PDC_COMMON_FLAGS
| ATA_FLAG_SLAVE_POSS
,
199 .pio_mask
= 0x1f, /* pio0-4 */
200 .mwdma_mask
= 0x07, /* mwdma0-2 */
201 .udma_mask
= 0x7f, /* udma0-6 ; FIXME */
202 .port_ops
= &pdc_pata_ops
,
208 .flags
= PDC_COMMON_FLAGS
| ATA_FLAG_SATA
,
209 .pio_mask
= 0x1f, /* pio0-4 */
210 .mwdma_mask
= 0x07, /* mwdma0-2 */
211 .udma_mask
= 0x7f, /* udma0-6 ; FIXME */
212 .port_ops
= &pdc_sata_ops
,
218 .flags
= PDC_COMMON_FLAGS
| ATA_FLAG_SATA
,
219 .pio_mask
= 0x1f, /* pio0-4 */
220 .mwdma_mask
= 0x07, /* mwdma0-2 */
221 .udma_mask
= 0x7f, /* udma0-6 ; FIXME */
222 .port_ops
= &pdc_sata_ops
,
228 .flags
= PDC_COMMON_FLAGS
| ATA_FLAG_SATA
,
229 .pio_mask
= 0x1f, /* pio0-4 */
230 .mwdma_mask
= 0x07, /* mwdma0-2 */
231 .udma_mask
= 0x7f, /* udma0-6 ; FIXME */
232 .port_ops
= &pdc_sata_ops
,
236 static const struct pci_device_id pdc_ata_pci_tbl
[] = {
237 { PCI_VDEVICE(PROMISE
, 0x3371), board_2037x
},
238 { PCI_VDEVICE(PROMISE
, 0x3570), board_2037x
},
239 { PCI_VDEVICE(PROMISE
, 0x3571), board_2037x
},
240 { PCI_VDEVICE(PROMISE
, 0x3373), board_2037x
},
241 { PCI_VDEVICE(PROMISE
, 0x3375), board_2037x
},
242 { PCI_VDEVICE(PROMISE
, 0x3376), board_2037x
},
243 { PCI_VDEVICE(PROMISE
, 0x3574), board_2057x
},
244 { PCI_VDEVICE(PROMISE
, 0x3d75), board_2057x
},
245 { PCI_VDEVICE(PROMISE
, 0x3d73), board_2037x
},
247 { PCI_VDEVICE(PROMISE
, 0x3318), board_20319
},
248 { PCI_VDEVICE(PROMISE
, 0x3319), board_20319
},
249 { PCI_VDEVICE(PROMISE
, 0x3515), board_20319
},
250 { PCI_VDEVICE(PROMISE
, 0x3519), board_20319
},
251 { PCI_VDEVICE(PROMISE
, 0x3d17), board_20319
},
252 { PCI_VDEVICE(PROMISE
, 0x3d18), board_40518
},
254 { PCI_VDEVICE(PROMISE
, 0x6629), board_20619
},
256 /* TODO: remove all associated board_20771 code, as it completely
257 * duplicates board_2037x code, unless reason for separation can be
261 { PCI_VDEVICE(PROMISE
, 0x3570), board_20771
},
263 { PCI_VDEVICE(PROMISE
, 0x3577), board_20771
},
265 { } /* terminate list */
269 static struct pci_driver pdc_ata_pci_driver
= {
271 .id_table
= pdc_ata_pci_tbl
,
272 .probe
= pdc_ata_init_one
,
273 .remove
= ata_pci_remove_one
,
277 static int pdc_port_start(struct ata_port
*ap
)
279 struct device
*dev
= ap
->host
->dev
;
280 struct pdc_port_priv
*pp
;
283 rc
= ata_port_start(ap
);
287 pp
= kzalloc(sizeof(*pp
), GFP_KERNEL
);
293 pp
->pkt
= dma_alloc_coherent(dev
, 128, &pp
->pkt_dma
, GFP_KERNEL
);
299 ap
->private_data
= pp
;
311 static void pdc_port_stop(struct ata_port
*ap
)
313 struct device
*dev
= ap
->host
->dev
;
314 struct pdc_port_priv
*pp
= ap
->private_data
;
316 ap
->private_data
= NULL
;
317 dma_free_coherent(dev
, 128, pp
->pkt
, pp
->pkt_dma
);
323 static void pdc_host_stop(struct ata_host
*host
)
325 struct pdc_host_priv
*hp
= host
->private_data
;
327 ata_pci_host_stop(host
);
333 static void pdc_reset_port(struct ata_port
*ap
)
335 void __iomem
*mmio
= (void __iomem
*) ap
->ioaddr
.cmd_addr
+ PDC_CTLSTAT
;
339 for (i
= 11; i
> 0; i
--) {
352 readl(mmio
); /* flush */
355 static void pdc_sata_phy_reset(struct ata_port
*ap
)
361 static void pdc_pata_cbl_detect(struct ata_port
*ap
)
364 void __iomem
*mmio
= (void __iomem
*) ap
->ioaddr
.cmd_addr
+ PDC_CTLSTAT
+ 0x03;
369 ap
->cbl
= ATA_CBL_PATA40
;
370 ap
->udma_mask
&= ATA_UDMA_MASK_40C
;
372 ap
->cbl
= ATA_CBL_PATA80
;
375 static void pdc_pata_phy_reset(struct ata_port
*ap
)
377 pdc_pata_cbl_detect(ap
);
383 static u32
pdc_sata_scr_read (struct ata_port
*ap
, unsigned int sc_reg
)
385 if (sc_reg
> SCR_CONTROL
)
387 return readl((void __iomem
*) ap
->ioaddr
.scr_addr
+ (sc_reg
* 4));
391 static void pdc_sata_scr_write (struct ata_port
*ap
, unsigned int sc_reg
,
394 if (sc_reg
> SCR_CONTROL
)
396 writel(val
, (void __iomem
*) ap
->ioaddr
.scr_addr
+ (sc_reg
* 4));
399 static void pdc_qc_prep(struct ata_queued_cmd
*qc
)
401 struct pdc_port_priv
*pp
= qc
->ap
->private_data
;
406 switch (qc
->tf
.protocol
) {
411 case ATA_PROT_NODATA
:
412 i
= pdc_pkt_header(&qc
->tf
, qc
->ap
->prd_dma
,
413 qc
->dev
->devno
, pp
->pkt
);
415 if (qc
->tf
.flags
& ATA_TFLAG_LBA48
)
416 i
= pdc_prep_lba48(&qc
->tf
, pp
->pkt
, i
);
418 i
= pdc_prep_lba28(&qc
->tf
, pp
->pkt
, i
);
420 pdc_pkt_footer(&qc
->tf
, pp
->pkt
, i
);
428 static void pdc_eng_timeout(struct ata_port
*ap
)
430 struct ata_host
*host
= ap
->host
;
432 struct ata_queued_cmd
*qc
;
437 spin_lock_irqsave(&host
->lock
, flags
);
439 qc
= ata_qc_from_tag(ap
, ap
->active_tag
);
441 switch (qc
->tf
.protocol
) {
443 case ATA_PROT_NODATA
:
444 ata_port_printk(ap
, KERN_ERR
, "command timeout\n");
445 drv_stat
= ata_wait_idle(ap
);
446 qc
->err_mask
|= __ac_err_mask(drv_stat
);
450 drv_stat
= ata_busy_wait(ap
, ATA_BUSY
| ATA_DRQ
, 1000);
452 ata_port_printk(ap
, KERN_ERR
,
453 "unknown timeout, cmd 0x%x stat 0x%x\n",
454 qc
->tf
.command
, drv_stat
);
456 qc
->err_mask
|= ac_err_mask(drv_stat
);
460 spin_unlock_irqrestore(&host
->lock
, flags
);
461 ata_eh_qc_complete(qc
);
465 static inline unsigned int pdc_host_intr( struct ata_port
*ap
,
466 struct ata_queued_cmd
*qc
)
468 unsigned int handled
= 0;
470 void __iomem
*mmio
= (void __iomem
*) ap
->ioaddr
.cmd_addr
+ PDC_GLOBAL_CTL
;
473 if (tmp
& PDC_ERR_MASK
) {
474 qc
->err_mask
|= AC_ERR_DEV
;
478 switch (qc
->tf
.protocol
) {
480 case ATA_PROT_NODATA
:
481 qc
->err_mask
|= ac_err_mask(ata_wait_idle(ap
));
487 ap
->stats
.idle_irq
++;
494 static void pdc_irq_clear(struct ata_port
*ap
)
496 struct ata_host
*host
= ap
->host
;
497 void __iomem
*mmio
= host
->mmio_base
;
499 readl(mmio
+ PDC_INT_SEQMASK
);
502 static irqreturn_t
pdc_interrupt (int irq
, void *dev_instance
)
504 struct ata_host
*host
= dev_instance
;
508 unsigned int handled
= 0;
509 void __iomem
*mmio_base
;
513 if (!host
|| !host
->mmio_base
) {
514 VPRINTK("QUICK EXIT\n");
518 mmio_base
= host
->mmio_base
;
520 /* reading should also clear interrupts */
521 mask
= readl(mmio_base
+ PDC_INT_SEQMASK
);
523 if (mask
== 0xffffffff) {
524 VPRINTK("QUICK EXIT 2\n");
528 spin_lock(&host
->lock
);
530 mask
&= 0xffff; /* only 16 tags possible */
532 VPRINTK("QUICK EXIT 3\n");
536 writel(mask
, mmio_base
+ PDC_INT_SEQMASK
);
538 for (i
= 0; i
< host
->n_ports
; i
++) {
539 VPRINTK("port %u\n", i
);
541 tmp
= mask
& (1 << (i
+ 1));
543 !(ap
->flags
& ATA_FLAG_DISABLED
)) {
544 struct ata_queued_cmd
*qc
;
546 qc
= ata_qc_from_tag(ap
, ap
->active_tag
);
547 if (qc
&& (!(qc
->tf
.flags
& ATA_TFLAG_POLLING
)))
548 handled
+= pdc_host_intr(ap
, qc
);
555 spin_unlock(&host
->lock
);
556 return IRQ_RETVAL(handled
);
559 static inline void pdc_packet_start(struct ata_queued_cmd
*qc
)
561 struct ata_port
*ap
= qc
->ap
;
562 struct pdc_port_priv
*pp
= ap
->private_data
;
563 unsigned int port_no
= ap
->port_no
;
564 u8 seq
= (u8
) (port_no
+ 1);
566 VPRINTK("ENTER, ap %p\n", ap
);
568 writel(0x00000001, ap
->host
->mmio_base
+ (seq
* 4));
569 readl(ap
->host
->mmio_base
+ (seq
* 4)); /* flush */
572 wmb(); /* flush PRD, pkt writes */
573 writel(pp
->pkt_dma
, (void __iomem
*) ap
->ioaddr
.cmd_addr
+ PDC_PKT_SUBMIT
);
574 readl((void __iomem
*) ap
->ioaddr
.cmd_addr
+ PDC_PKT_SUBMIT
); /* flush */
577 static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd
*qc
)
579 switch (qc
->tf
.protocol
) {
581 case ATA_PROT_NODATA
:
582 pdc_packet_start(qc
);
585 case ATA_PROT_ATAPI_DMA
:
593 return ata_qc_issue_prot(qc
);
596 static void pdc_tf_load_mmio(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
598 WARN_ON (tf
->protocol
== ATA_PROT_DMA
||
599 tf
->protocol
== ATA_PROT_NODATA
);
604 static void pdc_exec_command_mmio(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
606 WARN_ON (tf
->protocol
== ATA_PROT_DMA
||
607 tf
->protocol
== ATA_PROT_NODATA
);
608 ata_exec_command(ap
, tf
);
612 static void pdc_ata_setup_port(struct ata_ioports
*port
, unsigned long base
)
614 port
->cmd_addr
= base
;
615 port
->data_addr
= base
;
617 port
->error_addr
= base
+ 0x4;
618 port
->nsect_addr
= base
+ 0x8;
619 port
->lbal_addr
= base
+ 0xc;
620 port
->lbam_addr
= base
+ 0x10;
621 port
->lbah_addr
= base
+ 0x14;
622 port
->device_addr
= base
+ 0x18;
624 port
->status_addr
= base
+ 0x1c;
625 port
->altstatus_addr
=
626 port
->ctl_addr
= base
+ 0x38;
630 static void pdc_host_init(unsigned int chip_id
, struct ata_probe_ent
*pe
)
632 void __iomem
*mmio
= pe
->mmio_base
;
633 struct pdc_host_priv
*hp
= pe
->private_data
;
634 int hotplug_offset
= hp
->hotplug_offset
;
638 * Except for the hotplug stuff, this is voodoo from the
639 * Promise driver. Label this entire section
640 * "TODO: figure out why we do this"
643 /* change FIFO_SHD to 8 dwords, enable BMR_BURST */
644 tmp
= readl(mmio
+ PDC_FLASH_CTL
);
645 tmp
|= 0x12000; /* bit 16 (fifo 8 dw) and 13 (bmr burst?) */
646 writel(tmp
, mmio
+ PDC_FLASH_CTL
);
648 /* clear plug/unplug flags for all ports */
649 tmp
= readl(mmio
+ hotplug_offset
);
650 writel(tmp
| 0xff, mmio
+ hotplug_offset
);
652 /* mask plug/unplug ints */
653 tmp
= readl(mmio
+ hotplug_offset
);
654 writel(tmp
| 0xff0000, mmio
+ hotplug_offset
);
656 /* reduce TBG clock to 133 Mhz. */
657 tmp
= readl(mmio
+ PDC_TBG_MODE
);
658 tmp
&= ~0x30000; /* clear bit 17, 16*/
659 tmp
|= 0x10000; /* set bit 17:16 = 0:1 */
660 writel(tmp
, mmio
+ PDC_TBG_MODE
);
662 readl(mmio
+ PDC_TBG_MODE
); /* flush */
665 /* adjust slew rate control register. */
666 tmp
= readl(mmio
+ PDC_SLEW_CTL
);
667 tmp
&= 0xFFFFF03F; /* clear bit 11 ~ 6 */
668 tmp
|= 0x00000900; /* set bit 11-9 = 100b , bit 8-6 = 100 */
669 writel(tmp
, mmio
+ PDC_SLEW_CTL
);
672 static int pdc_ata_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
674 static int printed_version
;
675 struct ata_probe_ent
*probe_ent
= NULL
;
676 struct pdc_host_priv
*hp
;
678 void __iomem
*mmio_base
;
679 unsigned int board_idx
= (unsigned int) ent
->driver_data
;
680 int pci_dev_busy
= 0;
683 if (!printed_version
++)
684 dev_printk(KERN_DEBUG
, &pdev
->dev
, "version " DRV_VERSION
"\n");
686 rc
= pci_enable_device(pdev
);
690 rc
= pci_request_regions(pdev
, DRV_NAME
);
696 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
698 goto err_out_regions
;
699 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
701 goto err_out_regions
;
703 probe_ent
= kzalloc(sizeof(*probe_ent
), GFP_KERNEL
);
704 if (probe_ent
== NULL
) {
706 goto err_out_regions
;
709 probe_ent
->dev
= pci_dev_to_dev(pdev
);
710 INIT_LIST_HEAD(&probe_ent
->node
);
712 mmio_base
= pci_iomap(pdev
, 3, 0);
713 if (mmio_base
== NULL
) {
715 goto err_out_free_ent
;
717 base
= (unsigned long) mmio_base
;
719 hp
= kzalloc(sizeof(*hp
), GFP_KERNEL
);
722 goto err_out_free_ent
;
725 /* Set default hotplug offset */
726 hp
->hotplug_offset
= PDC_SATA_PLUG_CSR
;
727 probe_ent
->private_data
= hp
;
729 probe_ent
->sht
= pdc_port_info
[board_idx
].sht
;
730 probe_ent
->port_flags
= pdc_port_info
[board_idx
].flags
;
731 probe_ent
->pio_mask
= pdc_port_info
[board_idx
].pio_mask
;
732 probe_ent
->mwdma_mask
= pdc_port_info
[board_idx
].mwdma_mask
;
733 probe_ent
->udma_mask
= pdc_port_info
[board_idx
].udma_mask
;
734 probe_ent
->port_ops
= pdc_port_info
[board_idx
].port_ops
;
736 probe_ent
->irq
= pdev
->irq
;
737 probe_ent
->irq_flags
= IRQF_SHARED
;
738 probe_ent
->mmio_base
= mmio_base
;
740 pdc_ata_setup_port(&probe_ent
->port
[0], base
+ 0x200);
741 pdc_ata_setup_port(&probe_ent
->port
[1], base
+ 0x280);
743 probe_ent
->port
[0].scr_addr
= base
+ 0x400;
744 probe_ent
->port
[1].scr_addr
= base
+ 0x500;
746 /* notice 4-port boards */
749 /* Override hotplug offset for SATAII150 */
750 hp
->hotplug_offset
= PDC2_SATA_PLUG_CSR
;
753 probe_ent
->n_ports
= 4;
755 pdc_ata_setup_port(&probe_ent
->port
[2], base
+ 0x300);
756 pdc_ata_setup_port(&probe_ent
->port
[3], base
+ 0x380);
758 probe_ent
->port
[2].scr_addr
= base
+ 0x600;
759 probe_ent
->port
[3].scr_addr
= base
+ 0x700;
762 /* Override hotplug offset for SATAII150 */
763 hp
->hotplug_offset
= PDC2_SATA_PLUG_CSR
;
766 probe_ent
->n_ports
= 2;
769 probe_ent
->n_ports
= 2;
772 probe_ent
->n_ports
= 4;
774 pdc_ata_setup_port(&probe_ent
->port
[2], base
+ 0x300);
775 pdc_ata_setup_port(&probe_ent
->port
[3], base
+ 0x380);
777 probe_ent
->port
[2].scr_addr
= base
+ 0x600;
778 probe_ent
->port
[3].scr_addr
= base
+ 0x700;
785 pci_set_master(pdev
);
787 /* initialize adapter */
788 pdc_host_init(board_idx
, probe_ent
);
790 /* FIXME: Need any other frees than hp? */
791 if (!ata_device_add(probe_ent
))
801 pci_release_regions(pdev
);
804 pci_disable_device(pdev
);
809 static int __init
pdc_ata_init(void)
811 return pci_register_driver(&pdc_ata_pci_driver
);
815 static void __exit
pdc_ata_exit(void)
817 pci_unregister_driver(&pdc_ata_pci_driver
);
821 MODULE_AUTHOR("Jeff Garzik");
822 MODULE_DESCRIPTION("Promise ATA TX2/TX4/TX4000 low-level driver");
823 MODULE_LICENSE("GPL");
824 MODULE_DEVICE_TABLE(pci
, pdc_ata_pci_tbl
);
825 MODULE_VERSION(DRV_VERSION
);
827 module_init(pdc_ata_init
);
828 module_exit(pdc_ata_exit
);