drivers/ata/sata_via.c

   1 /*
   2  *  sata_via.c - VIA Serial ATA controllers
   3  *
   4  *  Maintained by:  Jeff Garzik <jgarzik@pobox.com>
   5  *                 Please ALWAYS copy linux-ide@vger.kernel.org
   6  *                 on emails.
   7  *
   8  *  Copyright 2003-2004 Red Hat, Inc.  All rights reserved.
   9  *  Copyright 2003-2004 Jeff Garzik
  10  *
  11  *
  12  *  This program is free software; you can redistribute it and/or modify
  13  *  it under the terms of the GNU General Public License as published by
  14  *  the Free Software Foundation; either version 2, or (at your option)
  15  *  any later version.
  16  *
  17  *  This program is distributed in the hope that it will be useful,
  18  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *  GNU General Public License for more details.
  21  *
  22  *  You should have received a copy of the GNU General Public License
  23  *  along with this program; see the file COPYING.  If not, write to
  24  *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  25  *
  26  *
  27  *  libata documentation is available via 'make {ps|pdf}docs',
  28  *  as Documentation/DocBook/libata.*
  29  *
  30  *  Hardware documentation available under NDA.
  31  *
  32  *
  33  *
  34  */
  35
  36 #include <linux/kernel.h>
  37 #include <linux/module.h>
  38 #include <linux/pci.h>
  39 #include <linux/init.h>
  40 #include <linux/blkdev.h>
  41 #include <linux/delay.h>
  42 #include <linux/device.h>
  43 #include <scsi/scsi_host.h>
  44 #include <linux/libata.h>
  45
  46 #define DRV_NAME        "sata_via"
  47 #define DRV_VERSION     "2.4"
  48
  49 /*
  50  * vt8251 is different from other sata controllers of VIA.  It has two
  51  * channels, each channel has both Master and Slave slot.
  52  */
  53 enum board_ids_enum {
  54         vt6420,
  55         vt6421,
  56         vt8251,
  57 };
  58
  59 enum {
  60         SATA_CHAN_ENAB          = 0x40, /* SATA channel enable */
  61         SATA_INT_GATE           = 0x41, /* SATA interrupt gating */
  62         SATA_NATIVE_MODE        = 0x42, /* Native mode enable */
  63         PATA_UDMA_TIMING        = 0xB3, /* PATA timing for DMA/ cable detect */
  64         PATA_PIO_TIMING         = 0xAB, /* PATA timing register */
  65
  66         PORT0                   = (1 << 1),
  67         PORT1                   = (1 << 0),
  68         ALL_PORTS               = PORT0 | PORT1,
  69
  70         NATIVE_MODE_ALL         = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4),
  71
  72         SATA_EXT_PHY            = (1 << 6), /* 0==use PATA, 1==ext phy */
  73 };
  74
  75 static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
  76 static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
  77 static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
  78 static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val);
  79 static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val);
  80 static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
  81 static void svia_noop_freeze(struct ata_port *ap);
  82 static int vt6420_prereset(struct ata_link *link, unsigned long deadline);
  83 static int vt6421_pata_cable_detect(struct ata_port *ap);
  84 static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev);
  85 static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev);
  86
  87 static const struct pci_device_id svia_pci_tbl[] = {
  88         { PCI_VDEVICE(VIA, 0x5337), vt6420 },
  89         { PCI_VDEVICE(VIA, 0x0591), vt6420 }, /* 2 sata chnls (Master) */
  90         { PCI_VDEVICE(VIA, 0x3149), vt6420 }, /* 2 sata chnls (Master) */
  91         { PCI_VDEVICE(VIA, 0x3249), vt6421 }, /* 2 sata chnls, 1 pata chnl */
  92         { PCI_VDEVICE(VIA, 0x5372), vt6420 },
  93         { PCI_VDEVICE(VIA, 0x7372), vt6420 },
  94         { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */
  95
  96         { }     /* terminate list */
  97 };
  98
  99 static struct pci_driver svia_pci_driver = {
 100         .name                   = DRV_NAME,
 101         .id_table               = svia_pci_tbl,
 102         .probe                  = svia_init_one,
 103 #ifdef CONFIG_PM
 104         .suspend                = ata_pci_device_suspend,
 105         .resume                 = ata_pci_device_resume,
 106 #endif
 107         .remove                 = ata_pci_remove_one,
 108 };
 109
 110 static struct scsi_host_template svia_sht = {
 111         ATA_BMDMA_SHT(DRV_NAME),
 112 };
 113
 114 static struct ata_port_operations svia_base_ops = {
 115         .inherits               = &ata_bmdma_port_ops,
 116         .sff_tf_load            = svia_tf_load,
 117 };
 118
 119 static struct ata_port_operations vt6420_sata_ops = {
 120         .inherits               = &svia_base_ops,
 121         .freeze                 = svia_noop_freeze,
 122         .prereset               = vt6420_prereset,
 123 };
 124
 125 static struct ata_port_operations vt6421_pata_ops = {
 126         .inherits               = &svia_base_ops,
 127         .cable_detect           = vt6421_pata_cable_detect,
 128         .set_piomode            = vt6421_set_pio_mode,
 129         .set_dmamode            = vt6421_set_dma_mode,
 130 };
 131
 132 static struct ata_port_operations vt6421_sata_ops = {
 133         .inherits               = &svia_base_ops,
 134         .scr_read               = svia_scr_read,
 135         .scr_write              = svia_scr_write,
 136 };
 137
 138 static struct ata_port_operations vt8251_ops = {
 139         .inherits               = &svia_base_ops,
 140         .hardreset              = sata_std_hardreset,
 141         .scr_read               = vt8251_scr_read,
 142         .scr_write              = vt8251_scr_write,
 143 };
 144
 145 static const struct ata_port_info vt6420_port_info = {
 146         .flags          = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
 147         .pio_mask       = 0x1f,
 148         .mwdma_mask     = 0x07,
 149         .udma_mask      = ATA_UDMA6,
 150         .port_ops       = &vt6420_sata_ops,
 151 };
 152
 153 static struct ata_port_info vt6421_sport_info = {
 154         .flags          = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
 155         .pio_mask       = 0x1f,
 156         .mwdma_mask     = 0x07,
 157         .udma_mask      = ATA_UDMA6,
 158         .port_ops       = &vt6421_sata_ops,
 159 };
 160
 161 static struct ata_port_info vt6421_pport_info = {
 162         .flags          = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_LEGACY,
 163         .pio_mask       = 0x1f,
 164         .mwdma_mask     = 0,
 165         .udma_mask      = ATA_UDMA6,
 166         .port_ops       = &vt6421_pata_ops,
 167 };
 168
 169 static struct ata_port_info vt8251_port_info = {
 170         .flags          = ATA_FLAG_SATA | ATA_FLAG_SLAVE_POSS |
 171                           ATA_FLAG_NO_LEGACY,
 172         .pio_mask       = 0x1f,
 173         .mwdma_mask     = 0x07,
 174         .udma_mask      = ATA_UDMA6,
 175         .port_ops       = &vt8251_ops,
 176 };
 177
 178 MODULE_AUTHOR("Jeff Garzik");
 179 MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers");
 180 MODULE_LICENSE("GPL");
 181 MODULE_DEVICE_TABLE(pci, svia_pci_tbl);
 182 MODULE_VERSION(DRV_VERSION);
 183
 184 static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val)
 185 {
 186         if (sc_reg > SCR_CONTROL)
 187                 return -EINVAL;
 188         *val = ioread32(link->ap->ioaddr.scr_addr + (4 * sc_reg));
 189         return 0;
 190 }
 191
 192 static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
 193 {
 194         if (sc_reg > SCR_CONTROL)
 195                 return -EINVAL;
 196         iowrite32(val, link->ap->ioaddr.scr_addr + (4 * sc_reg));
 197         return 0;
 198 }
 199
 200 static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val)
 201 {
 202         static const u8 ipm_tbl[] = { 1, 2, 6, 0 };
 203         struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
 204         int slot = 2 * link->ap->port_no + link->pmp;
 205         u32 v = 0;
 206         u8 raw;
 207
 208         switch (scr) {
 209         case SCR_STATUS:
 210                 pci_read_config_byte(pdev, 0xA0 + slot, &raw);
 211
 212                 /* read the DET field, bit0 and 1 of the config byte */
 213                 v |= raw & 0x03;
 214
 215                 /* read the SPD field, bit4 of the configure byte */
 216                 if (raw & (1 << 4))
 217                         v |= 0x02 << 4;
 218                 else
 219                         v |= 0x01 << 4;
 220
 221                 /* read the IPM field, bit2 and 3 of the config byte */
 222                 v |= ipm_tbl[(raw >> 2) & 0x3];
 223                 break;
 224
 225         case SCR_ERROR:
 226                 /* devices other than 5287 uses 0xA8 as base */
 227                 WARN_ON(pdev->device != 0x5287);
 228                 pci_read_config_dword(pdev, 0xB0 + slot * 4, &v);
 229                 break;
 230
 231         case SCR_CONTROL:
 232                 pci_read_config_byte(pdev, 0xA4 + slot, &raw);
 233
 234                 /* read the DET field, bit0 and bit1 */
 235                 v |= ((raw & 0x02) << 1) | (raw & 0x01);
 236
 237                 /* read the IPM field, bit2 and bit3 */
 238                 v |= ((raw >> 2) & 0x03) << 8;
 239                 break;
 240
 241         default:
 242                 return -EINVAL;
 243         }
 244
 245         *val = v;
 246         return 0;
 247 }
 248
 249 static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val)
 250 {
 251         struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
 252         int slot = 2 * link->ap->port_no + link->pmp;
 253         u32 v = 0;
 254
 255         switch (scr) {
 256         case SCR_ERROR:
 257                 /* devices other than 5287 uses 0xA8 as base */
 258                 WARN_ON(pdev->device != 0x5287);
 259                 pci_write_config_dword(pdev, 0xB0 + slot * 4, val);
 260                 return 0;
 261
 262         case SCR_CONTROL:
 263                 /* set the DET field */
 264                 v |= ((val & 0x4) >> 1) | (val & 0x1);
 265
 266                 /* set the IPM field */
 267                 v |= ((val >> 8) & 0x3) << 2;
 268
 269                 pci_write_config_byte(pdev, 0xA4 + slot, v);
 270                 return 0;
 271
 272         default:
 273                 return -EINVAL;
 274         }
 275 }
 276
 277 /**
 278  *      svia_tf_load - send taskfile registers to host controller
 279  *      @ap: Port to which output is sent
 280  *      @tf: ATA taskfile register set
 281  *
 282  *      Outputs ATA taskfile to standard ATA host controller.
 283  *
 284  *      This is to fix the internal bug of via chipsets, which will
 285  *      reset the device register after changing the IEN bit on ctl
 286  *      register.
 287  */
 288 static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
 289 {
 290         struct ata_taskfile ttf;
 291
 292         if (tf->ctl != ap->last_ctl)  {
 293                 ttf = *tf;
 294                 ttf.flags |= ATA_TFLAG_DEVICE;
 295                 tf = &ttf;
 296         }
 297         ata_sff_tf_load(ap, tf);
 298 }
 299
 300 static void svia_noop_freeze(struct ata_port *ap)
 301 {
 302         /* Some VIA controllers choke if ATA_NIEN is manipulated in
 303          * certain way.  Leave it alone and just clear pending IRQ.
 304          */
 305         ap->ops->sff_check_status(ap);
 306         ata_sff_irq_clear(ap);
 307 }
 308
 309 /**
 310  *      vt6420_prereset - prereset for vt6420
 311  *      @link: target ATA link
 312  *      @deadline: deadline jiffies for the operation
 313  *
 314  *      SCR registers on vt6420 are pieces of shit and may hang the
 315  *      whole machine completely if accessed with the wrong timing.
 316  *      To avoid such catastrophe, vt6420 doesn't provide generic SCR
 317  *      access operations, but uses SStatus and SControl only during
 318  *      boot probing in controlled way.
 319  *
 320  *      As the old (pre EH update) probing code is proven to work, we
 321  *      strictly follow the access pattern.
 322  *
 323  *      LOCKING:
 324  *      Kernel thread context (may sleep)
 325  *
 326  *      RETURNS:
 327  *      0 on success, -errno otherwise.
 328  */
 329 static int vt6420_prereset(struct ata_link *link, unsigned long deadline)
 330 {
 331         struct ata_port *ap = link->ap;
 332         struct ata_eh_context *ehc = &ap->link.eh_context;
 333         unsigned long timeout = jiffies + (HZ * 5);
 334         u32 sstatus, scontrol;
 335         int online;
 336
 337         /* don't do any SCR stuff if we're not loading */
 338         if (!(ap->pflags & ATA_PFLAG_LOADING))
 339                 goto skip_scr;
 340
 341         /* Resume phy.  This is the old SATA resume sequence */
 342         svia_scr_write(link, SCR_CONTROL, 0x300);
 343         svia_scr_read(link, SCR_CONTROL, &scontrol); /* flush */
 344
 345         /* wait for phy to become ready, if necessary */
 346         do {
 347                 msleep(200);
 348                 svia_scr_read(link, SCR_STATUS, &sstatus);
 349                 if ((sstatus & 0xf) != 1)
 350                         break;
 351         } while (time_before(jiffies, timeout));
 352
 353         /* open code sata_print_link_status() */
 354         svia_scr_read(link, SCR_STATUS, &sstatus);
 355         svia_scr_read(link, SCR_CONTROL, &scontrol);
 356
 357         online = (sstatus & 0xf) == 0x3;
 358
 359         ata_port_printk(ap, KERN_INFO,
 360                         "SATA link %s 1.5 Gbps (SStatus %X SControl %X)\n",
 361                         online ? "up" : "down", sstatus, scontrol);
 362
 363         /* SStatus is read one more time */
 364         svia_scr_read(link, SCR_STATUS, &sstatus);
 365
 366         if (!online) {
 367                 /* tell EH to bail */
 368                 ehc->i.action &= ~ATA_EH_RESET;
 369                 return 0;
 370         }
 371
 372  skip_scr:
 373         /* wait for !BSY */
 374         ata_sff_wait_ready(link, deadline);
 375
 376         return 0;
 377 }
 378
 379 static int vt6421_pata_cable_detect(struct ata_port *ap)
 380 {
 381         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 382         u8 tmp;
 383
 384         pci_read_config_byte(pdev, PATA_UDMA_TIMING, &tmp);
 385         if (tmp & 0x10)
 386                 return ATA_CBL_PATA40;
 387         return ATA_CBL_PATA80;
 388 }
 389
 390 static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
 391 {
 392         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 393         static const u8 pio_bits[] = { 0xA8, 0x65, 0x65, 0x31, 0x20 };
 394         pci_write_config_byte(pdev, PATA_PIO_TIMING, pio_bits[adev->pio_mode - XFER_PIO_0]);
 395 }
 396
 397 static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
 398 {
 399         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 400         static const u8 udma_bits[] = { 0xEE, 0xE8, 0xE6, 0xE4, 0xE2, 0xE1, 0xE0, 0xE0 };
 401         pci_write_config_byte(pdev, PATA_UDMA_TIMING, udma_bits[adev->dma_mode - XFER_UDMA_0]);
 402 }
 403
 404 static const unsigned int svia_bar_sizes[] = {
 405         8, 4, 8, 4, 16, 256
 406 };
 407
 408 static const unsigned int vt6421_bar_sizes[] = {
 409         16, 16, 16, 16, 32, 128
 410 };
 411
 412 static void __iomem *svia_scr_addr(void __iomem *addr, unsigned int port)
 413 {
 414         return addr + (port * 128);
 415 }
 416
 417 static void __iomem *vt6421_scr_addr(void __iomem *addr, unsigned int port)
 418 {
 419         return addr + (port * 64);
 420 }
 421
 422 static void vt6421_init_addrs(struct ata_port *ap)
 423 {
 424         void __iomem * const * iomap = ap->host->iomap;
 425         void __iomem *reg_addr = iomap[ap->port_no];
 426         void __iomem *bmdma_addr = iomap[4] + (ap->port_no * 8);
 427         struct ata_ioports *ioaddr = &ap->ioaddr;
 428
 429         ioaddr->cmd_addr = reg_addr;
 430         ioaddr->altstatus_addr =
 431         ioaddr->ctl_addr = (void __iomem *)
 432                 ((unsigned long)(reg_addr + 8) | ATA_PCI_CTL_OFS);
 433         ioaddr->bmdma_addr = bmdma_addr;
 434         ioaddr->scr_addr = vt6421_scr_addr(iomap[5], ap->port_no);
 435
 436         ata_sff_std_ports(ioaddr);
 437
 438         ata_port_pbar_desc(ap, ap->port_no, -1, "port");
 439         ata_port_pbar_desc(ap, 4, ap->port_no * 8, "bmdma");
 440 }
 441
 442 static int vt6420_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
 443 {
 444         const struct ata_port_info *ppi[] = { &vt6420_port_info, NULL };
 445         struct ata_host *host;
 446         int rc;
 447
 448         rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
 449         if (rc)
 450                 return rc;
 451         *r_host = host;
 452
 453         rc = pcim_iomap_regions(pdev, 1 << 5, DRV_NAME);
 454         if (rc) {
 455                 dev_printk(KERN_ERR, &pdev->dev, "failed to iomap PCI BAR 5\n");
 456                 return rc;
 457         }
 458
 459         host->ports[0]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 0);
 460         host->ports[1]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 1);
 461
 462         return 0;
 463 }
 464
 465 static int vt6421_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
 466 {
 467         const struct ata_port_info *ppi[] =
 468                 { &vt6421_sport_info, &vt6421_sport_info, &vt6421_pport_info };
 469         struct ata_host *host;
 470         int i, rc;
 471
 472         *r_host = host = ata_host_alloc_pinfo(&pdev->dev, ppi, ARRAY_SIZE(ppi));
 473         if (!host) {
 474                 dev_printk(KERN_ERR, &pdev->dev, "failed to allocate host\n");
 475                 return -ENOMEM;
 476         }
 477
 478         rc = pcim_iomap_regions(pdev, 0x3f, DRV_NAME);
 479         if (rc) {
 480                 dev_printk(KERN_ERR, &pdev->dev, "failed to request/iomap "
 481                            "PCI BARs (errno=%d)\n", rc);
 482                 return rc;
 483         }
 484         host->iomap = pcim_iomap_table(pdev);
 485
 486         for (i = 0; i < host->n_ports; i++)
 487                 vt6421_init_addrs(host->ports[i]);
 488
 489         rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
 490         if (rc)
 491                 return rc;
 492         rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
 493         if (rc)
 494                 return rc;
 495
 496         return 0;
 497 }
 498
 499 static int vt8251_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
 500 {
 501         const struct ata_port_info *ppi[] = { &vt8251_port_info, NULL };
 502         struct ata_host *host;
 503         int i, rc;
 504
 505         rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
 506         if (rc)
 507                 return rc;
 508         *r_host = host;
 509
 510         rc = pcim_iomap_regions(pdev, 1 << 5, DRV_NAME);
 511         if (rc) {
 512                 dev_printk(KERN_ERR, &pdev->dev, "failed to iomap PCI BAR 5\n");
 513                 return rc;
 514         }
 515
 516         /* 8251 hosts four sata ports as M/S of the two channels */
 517         for (i = 0; i < host->n_ports; i++)
 518                 ata_slave_link_init(host->ports[i]);
 519
 520         return 0;
 521 }
 522
 523 static void svia_configure(struct pci_dev *pdev)
 524 {
 525         u8 tmp8;
 526
 527         pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &tmp8);
 528         dev_printk(KERN_INFO, &pdev->dev, "routed to hard irq line %d\n",
 529                (int) (tmp8 & 0xf0) == 0xf0 ? 0 : tmp8 & 0x0f);
 530
 531         /* make sure SATA channels are enabled */
 532         pci_read_config_byte(pdev, SATA_CHAN_ENAB, &tmp8);
 533         if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
 534                 dev_printk(KERN_DEBUG, &pdev->dev,
 535                            "enabling SATA channels (0x%x)\n",
 536                            (int) tmp8);
 537                 tmp8 |= ALL_PORTS;
 538                 pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8);
 539         }
 540
 541         /* make sure interrupts for each channel sent to us */
 542         pci_read_config_byte(pdev, SATA_INT_GATE, &tmp8);
 543         if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
 544                 dev_printk(KERN_DEBUG, &pdev->dev,
 545                            "enabling SATA channel interrupts (0x%x)\n",
 546                            (int) tmp8);
 547                 tmp8 |= ALL_PORTS;
 548                 pci_write_config_byte(pdev, SATA_INT_GATE, tmp8);
 549         }
 550
 551         /* make sure native mode is enabled */
 552         pci_read_config_byte(pdev, SATA_NATIVE_MODE, &tmp8);
 553         if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) {
 554                 dev_printk(KERN_DEBUG, &pdev->dev,
 555                            "enabling SATA channel native mode (0x%x)\n",
 556                            (int) tmp8);
 557                 tmp8 |= NATIVE_MODE_ALL;
 558                 pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8);
 559         }
 560 }
 561
 562 static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 563 {
 564         static int printed_version;
 565         unsigned int i;
 566         int rc;
 567         struct ata_host *host;
 568         int board_id = (int) ent->driver_data;
 569         const unsigned *bar_sizes;
 570
 571         if (!printed_version++)
 572                 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
 573
 574         rc = pcim_enable_device(pdev);
 575         if (rc)
 576                 return rc;
 577
 578         if (board_id == vt6421)
 579                 bar_sizes = &vt6421_bar_sizes[0];
 580         else
 581                 bar_sizes = &svia_bar_sizes[0];
 582
 583         for (i = 0; i < ARRAY_SIZE(svia_bar_sizes); i++)
 584                 if ((pci_resource_start(pdev, i) == 0) ||
 585                     (pci_resource_len(pdev, i) < bar_sizes[i])) {
 586                         dev_printk(KERN_ERR, &pdev->dev,
 587                                 "invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n",
 588                                 i,
 589                                 (unsigned long long)pci_resource_start(pdev, i),
 590                                 (unsigned long long)pci_resource_len(pdev, i));
 591                         return -ENODEV;
 592                 }
 593
 594         switch (board_id) {
 595         case vt6420:
 596                 rc = vt6420_prepare_host(pdev, &host);
 597                 break;
 598         case vt6421:
 599                 rc = vt6421_prepare_host(pdev, &host);
 600                 break;
 601         case vt8251:
 602                 rc = vt8251_prepare_host(pdev, &host);
 603                 break;
 604         default:
 605                 rc = -EINVAL;
 606         }
 607         if (rc)
 608                 return rc;
 609
 610         svia_configure(pdev);
 611
 612         pci_set_master(pdev);
 613         return ata_host_activate(host, pdev->irq, ata_sff_interrupt,
 614                                  IRQF_SHARED, &svia_sht);
 615 }
 616
 617 static int __init svia_init(void)
 618 {
 619         return pci_register_driver(&svia_pci_driver);
 620 }
 621
 622 static void __exit svia_exit(void)
 623 {
 624         pci_unregister_driver(&svia_pci_driver);
 625 }
 626
 627 module_init(svia_init);
 628 module_exit(svia_exit);