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[mirror_ubuntu-zesty-kernel.git] / drivers / atm / nicstar.c
1 /*
2 * nicstar.c
3 *
4 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
5 *
6 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
7 * It was taken from the frle-0.22 device driver.
8 * As the file doesn't have a copyright notice, in the file
9 * nicstarmac.copyright I put the copyright notice from the
10 * frle-0.22 device driver.
11 * Some code is based on the nicstar driver by M. Welsh.
12 *
13 * Author: Rui Prior (rprior@inescn.pt)
14 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
15 *
16 *
17 * (C) INESC 1999
18 */
19
20 /*
21 * IMPORTANT INFORMATION
22 *
23 * There are currently three types of spinlocks:
24 *
25 * 1 - Per card interrupt spinlock (to protect structures and such)
26 * 2 - Per SCQ scq spinlock
27 * 3 - Per card resource spinlock (to access registers, etc.)
28 *
29 * These must NEVER be grabbed in reverse order.
30 *
31 */
32
33 /* Header files */
34
35 #include <linux/module.h>
36 #include <linux/kernel.h>
37 #include <linux/skbuff.h>
38 #include <linux/atmdev.h>
39 #include <linux/atm.h>
40 #include <linux/pci.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/types.h>
43 #include <linux/string.h>
44 #include <linux/delay.h>
45 #include <linux/init.h>
46 #include <linux/sched.h>
47 #include <linux/timer.h>
48 #include <linux/interrupt.h>
49 #include <linux/bitops.h>
50 #include <linux/slab.h>
51 #include <linux/idr.h>
52 #include <asm/io.h>
53 #include <asm/uaccess.h>
54 #include <asm/atomic.h>
55 #include "nicstar.h"
56 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
57 #include "suni.h"
58 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
59 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
60 #include "idt77105.h"
61 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
62
63 /* Additional code */
64
65 #include "nicstarmac.c"
66
67 /* Configurable parameters */
68
69 #undef PHY_LOOPBACK
70 #undef TX_DEBUG
71 #undef RX_DEBUG
72 #undef GENERAL_DEBUG
73 #undef EXTRA_DEBUG
74
75 #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
76 you're going to use only raw ATM */
77
78 /* Do not touch these */
79
80 #ifdef TX_DEBUG
81 #define TXPRINTK(args...) printk(args)
82 #else
83 #define TXPRINTK(args...)
84 #endif /* TX_DEBUG */
85
86 #ifdef RX_DEBUG
87 #define RXPRINTK(args...) printk(args)
88 #else
89 #define RXPRINTK(args...)
90 #endif /* RX_DEBUG */
91
92 #ifdef GENERAL_DEBUG
93 #define PRINTK(args...) printk(args)
94 #else
95 #define PRINTK(args...)
96 #endif /* GENERAL_DEBUG */
97
98 #ifdef EXTRA_DEBUG
99 #define XPRINTK(args...) printk(args)
100 #else
101 #define XPRINTK(args...)
102 #endif /* EXTRA_DEBUG */
103
104 /* Macros */
105
106 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
107
108 #define NS_DELAY mdelay(1)
109
110 #define PTR_DIFF(a, b) ((u32)((unsigned long)(a) - (unsigned long)(b)))
111
112 #ifndef ATM_SKB
113 #define ATM_SKB(s) (&(s)->atm)
114 #endif
115
116 #define scq_virt_to_bus(scq, p) \
117 (scq->dma + ((unsigned long)(p) - (unsigned long)(scq)->org))
118
119 /* Function declarations */
120
121 static u32 ns_read_sram(ns_dev * card, u32 sram_address);
122 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
123 int count);
124 static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
125 static void __devinit ns_init_card_error(ns_dev * card, int error);
126 static scq_info *get_scq(ns_dev *card, int size, u32 scd);
127 static void free_scq(ns_dev *card, scq_info * scq, struct atm_vcc *vcc);
128 static void push_rxbufs(ns_dev *, struct sk_buff *);
129 static irqreturn_t ns_irq_handler(int irq, void *dev_id);
130 static int ns_open(struct atm_vcc *vcc);
131 static void ns_close(struct atm_vcc *vcc);
132 static void fill_tst(ns_dev * card, int n, vc_map * vc);
133 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
134 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
135 struct sk_buff *skb);
136 static void process_tsq(ns_dev * card);
137 static void drain_scq(ns_dev * card, scq_info * scq, int pos);
138 static void process_rsq(ns_dev * card);
139 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe);
140 #ifdef NS_USE_DESTRUCTORS
141 static void ns_sb_destructor(struct sk_buff *sb);
142 static void ns_lb_destructor(struct sk_buff *lb);
143 static void ns_hb_destructor(struct sk_buff *hb);
144 #endif /* NS_USE_DESTRUCTORS */
145 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb);
146 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count);
147 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb);
148 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb);
149 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb);
150 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page);
151 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg);
152 #ifdef EXTRA_DEBUG
153 static void which_list(ns_dev * card, struct sk_buff *skb);
154 #endif
155 static void ns_poll(unsigned long arg);
156 static int ns_parse_mac(char *mac, unsigned char *esi);
157 static short ns_h2i(char c);
158 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
159 unsigned long addr);
160 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
161
162 /* Global variables */
163
164 static struct ns_dev *cards[NS_MAX_CARDS];
165 static unsigned num_cards;
166 static struct atmdev_ops atm_ops = {
167 .open = ns_open,
168 .close = ns_close,
169 .ioctl = ns_ioctl,
170 .send = ns_send,
171 .phy_put = ns_phy_put,
172 .phy_get = ns_phy_get,
173 .proc_read = ns_proc_read,
174 .owner = THIS_MODULE,
175 };
176
177 static struct timer_list ns_timer;
178 static char *mac[NS_MAX_CARDS];
179 module_param_array(mac, charp, NULL, 0);
180 MODULE_LICENSE("GPL");
181
182 /* Functions */
183
184 static int __devinit nicstar_init_one(struct pci_dev *pcidev,
185 const struct pci_device_id *ent)
186 {
187 static int index = -1;
188 unsigned int error;
189
190 index++;
191 cards[index] = NULL;
192
193 error = ns_init_card(index, pcidev);
194 if (error) {
195 cards[index--] = NULL; /* don't increment index */
196 goto err_out;
197 }
198
199 return 0;
200 err_out:
201 return -ENODEV;
202 }
203
204 static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
205 {
206 int i, j;
207 ns_dev *card = pci_get_drvdata(pcidev);
208 struct sk_buff *hb;
209 struct sk_buff *iovb;
210 struct sk_buff *lb;
211 struct sk_buff *sb;
212
213 i = card->index;
214
215 if (cards[i] == NULL)
216 return;
217
218 if (card->atmdev->phy && card->atmdev->phy->stop)
219 card->atmdev->phy->stop(card->atmdev);
220
221 /* Stop everything */
222 writel(0x00000000, card->membase + CFG);
223
224 /* De-register device */
225 atm_dev_deregister(card->atmdev);
226
227 /* Disable PCI device */
228 pci_disable_device(pcidev);
229
230 /* Free up resources */
231 j = 0;
232 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
233 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) {
234 dev_kfree_skb_any(hb);
235 j++;
236 }
237 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
238 j = 0;
239 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i,
240 card->iovpool.count);
241 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) {
242 dev_kfree_skb_any(iovb);
243 j++;
244 }
245 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
246 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
247 dev_kfree_skb_any(lb);
248 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
249 dev_kfree_skb_any(sb);
250 free_scq(card, card->scq0, NULL);
251 for (j = 0; j < NS_FRSCD_NUM; j++) {
252 if (card->scd2vc[j] != NULL)
253 free_scq(card, card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
254 }
255 idr_remove_all(&card->idr);
256 idr_destroy(&card->idr);
257 pci_free_consistent(card->pcidev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
258 card->rsq.org, card->rsq.dma);
259 pci_free_consistent(card->pcidev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
260 card->tsq.org, card->tsq.dma);
261 free_irq(card->pcidev->irq, card);
262 iounmap(card->membase);
263 kfree(card);
264 }
265
266 static struct pci_device_id nicstar_pci_tbl[] __devinitdata = {
267 {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
269 {0,} /* terminate list */
270 };
271
272 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
273
274 static struct pci_driver nicstar_driver = {
275 .name = "nicstar",
276 .id_table = nicstar_pci_tbl,
277 .probe = nicstar_init_one,
278 .remove = __devexit_p(nicstar_remove_one),
279 };
280
281 static int __init nicstar_init(void)
282 {
283 unsigned error = 0; /* Initialized to remove compile warning */
284
285 XPRINTK("nicstar: nicstar_init() called.\n");
286
287 error = pci_register_driver(&nicstar_driver);
288
289 TXPRINTK("nicstar: TX debug enabled.\n");
290 RXPRINTK("nicstar: RX debug enabled.\n");
291 PRINTK("nicstar: General debug enabled.\n");
292 #ifdef PHY_LOOPBACK
293 printk("nicstar: using PHY loopback.\n");
294 #endif /* PHY_LOOPBACK */
295 XPRINTK("nicstar: nicstar_init() returned.\n");
296
297 if (!error) {
298 init_timer(&ns_timer);
299 ns_timer.expires = jiffies + NS_POLL_PERIOD;
300 ns_timer.data = 0UL;
301 ns_timer.function = ns_poll;
302 add_timer(&ns_timer);
303 }
304
305 return error;
306 }
307
308 static void __exit nicstar_cleanup(void)
309 {
310 XPRINTK("nicstar: nicstar_cleanup() called.\n");
311
312 del_timer(&ns_timer);
313
314 pci_unregister_driver(&nicstar_driver);
315
316 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
317 }
318
319 static u32 ns_read_sram(ns_dev * card, u32 sram_address)
320 {
321 unsigned long flags;
322 u32 data;
323 sram_address <<= 2;
324 sram_address &= 0x0007FFFC; /* address must be dword aligned */
325 sram_address |= 0x50000000; /* SRAM read command */
326 spin_lock_irqsave(&card->res_lock, flags);
327 while (CMD_BUSY(card)) ;
328 writel(sram_address, card->membase + CMD);
329 while (CMD_BUSY(card)) ;
330 data = readl(card->membase + DR0);
331 spin_unlock_irqrestore(&card->res_lock, flags);
332 return data;
333 }
334
335 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
336 int count)
337 {
338 unsigned long flags;
339 int i, c;
340 count--; /* count range now is 0..3 instead of 1..4 */
341 c = count;
342 c <<= 2; /* to use increments of 4 */
343 spin_lock_irqsave(&card->res_lock, flags);
344 while (CMD_BUSY(card)) ;
345 for (i = 0; i <= c; i += 4)
346 writel(*(value++), card->membase + i);
347 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
348 so card->membase + DR0 == card->membase */
349 sram_address <<= 2;
350 sram_address &= 0x0007FFFC;
351 sram_address |= (0x40000000 | count);
352 writel(sram_address, card->membase + CMD);
353 spin_unlock_irqrestore(&card->res_lock, flags);
354 }
355
356 static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
357 {
358 int j;
359 struct ns_dev *card = NULL;
360 unsigned char pci_latency;
361 unsigned error;
362 u32 data;
363 u32 u32d[4];
364 u32 ns_cfg_rctsize;
365 int bcount;
366 unsigned long membase;
367
368 error = 0;
369
370 if (pci_enable_device(pcidev)) {
371 printk("nicstar%d: can't enable PCI device\n", i);
372 error = 2;
373 ns_init_card_error(card, error);
374 return error;
375 }
376 if ((pci_set_dma_mask(pcidev, DMA_BIT_MASK(32)) != 0) ||
377 (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32)) != 0)) {
378 printk(KERN_WARNING
379 "nicstar%d: No suitable DMA available.\n", i);
380 error = 2;
381 ns_init_card_error(card, error);
382 return error;
383 }
384
385 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL) {
386 printk
387 ("nicstar%d: can't allocate memory for device structure.\n",
388 i);
389 error = 2;
390 ns_init_card_error(card, error);
391 return error;
392 }
393 cards[i] = card;
394 spin_lock_init(&card->int_lock);
395 spin_lock_init(&card->res_lock);
396
397 pci_set_drvdata(pcidev, card);
398
399 card->index = i;
400 card->atmdev = NULL;
401 card->pcidev = pcidev;
402 membase = pci_resource_start(pcidev, 1);
403 card->membase = ioremap(membase, NS_IOREMAP_SIZE);
404 if (!card->membase) {
405 printk("nicstar%d: can't ioremap() membase.\n", i);
406 error = 3;
407 ns_init_card_error(card, error);
408 return error;
409 }
410 PRINTK("nicstar%d: membase at 0x%p.\n", i, card->membase);
411
412 pci_set_master(pcidev);
413
414 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) {
415 printk("nicstar%d: can't read PCI latency timer.\n", i);
416 error = 6;
417 ns_init_card_error(card, error);
418 return error;
419 }
420 #ifdef NS_PCI_LATENCY
421 if (pci_latency < NS_PCI_LATENCY) {
422 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i,
423 NS_PCI_LATENCY);
424 for (j = 1; j < 4; j++) {
425 if (pci_write_config_byte
426 (pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
427 break;
428 }
429 if (j == 4) {
430 printk
431 ("nicstar%d: can't set PCI latency timer to %d.\n",
432 i, NS_PCI_LATENCY);
433 error = 7;
434 ns_init_card_error(card, error);
435 return error;
436 }
437 }
438 #endif /* NS_PCI_LATENCY */
439
440 /* Clear timer overflow */
441 data = readl(card->membase + STAT);
442 if (data & NS_STAT_TMROF)
443 writel(NS_STAT_TMROF, card->membase + STAT);
444
445 /* Software reset */
446 writel(NS_CFG_SWRST, card->membase + CFG);
447 NS_DELAY;
448 writel(0x00000000, card->membase + CFG);
449
450 /* PHY reset */
451 writel(0x00000008, card->membase + GP);
452 NS_DELAY;
453 writel(0x00000001, card->membase + GP);
454 NS_DELAY;
455 while (CMD_BUSY(card)) ;
456 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
457 NS_DELAY;
458
459 /* Detect PHY type */
460 while (CMD_BUSY(card)) ;
461 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
462 while (CMD_BUSY(card)) ;
463 data = readl(card->membase + DR0);
464 switch (data) {
465 case 0x00000009:
466 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
467 card->max_pcr = ATM_25_PCR;
468 while (CMD_BUSY(card)) ;
469 writel(0x00000008, card->membase + DR0);
470 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
471 /* Clear an eventual pending interrupt */
472 writel(NS_STAT_SFBQF, card->membase + STAT);
473 #ifdef PHY_LOOPBACK
474 while (CMD_BUSY(card)) ;
475 writel(0x00000022, card->membase + DR0);
476 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
477 #endif /* PHY_LOOPBACK */
478 break;
479 case 0x00000030:
480 case 0x00000031:
481 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
482 card->max_pcr = ATM_OC3_PCR;
483 #ifdef PHY_LOOPBACK
484 while (CMD_BUSY(card)) ;
485 writel(0x00000002, card->membase + DR0);
486 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
487 #endif /* PHY_LOOPBACK */
488 break;
489 default:
490 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
491 error = 8;
492 ns_init_card_error(card, error);
493 return error;
494 }
495 writel(0x00000000, card->membase + GP);
496
497 /* Determine SRAM size */
498 data = 0x76543210;
499 ns_write_sram(card, 0x1C003, &data, 1);
500 data = 0x89ABCDEF;
501 ns_write_sram(card, 0x14003, &data, 1);
502 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
503 ns_read_sram(card, 0x1C003) == 0x76543210)
504 card->sram_size = 128;
505 else
506 card->sram_size = 32;
507 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
508
509 card->rct_size = NS_MAX_RCTSIZE;
510
511 #if (NS_MAX_RCTSIZE == 4096)
512 if (card->sram_size == 128)
513 printk
514 ("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n",
515 i);
516 #elif (NS_MAX_RCTSIZE == 16384)
517 if (card->sram_size == 32) {
518 printk
519 ("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n",
520 i);
521 card->rct_size = 4096;
522 }
523 #else
524 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
525 #endif
526
527 card->vpibits = NS_VPIBITS;
528 if (card->rct_size == 4096)
529 card->vcibits = 12 - NS_VPIBITS;
530 else /* card->rct_size == 16384 */
531 card->vcibits = 14 - NS_VPIBITS;
532
533 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
534 if (mac[i] == NULL)
535 nicstar_init_eprom(card->membase);
536
537 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
538 writel(0x00000000, card->membase + VPM);
539
540 /* Initialize TSQ */
541 card->tsq.org = pci_alloc_consistent(card->pcidev,
542 NS_TSQSIZE + NS_TSQ_ALIGNMENT,
543 &card->tsq.dma);
544 if (card->tsq.org == NULL) {
545 printk("nicstar%d: can't allocate TSQ.\n", i);
546 error = 10;
547 ns_init_card_error(card, error);
548 return error;
549 }
550 card->tsq.base = PTR_ALIGN(card->tsq.org, NS_TSQ_ALIGNMENT);
551 card->tsq.next = card->tsq.base;
552 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
553 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
554 ns_tsi_init(card->tsq.base + j);
555 writel(0x00000000, card->membase + TSQH);
556 writel(ALIGN(card->tsq.dma, NS_TSQ_ALIGNMENT), card->membase + TSQB);
557 PRINTK("nicstar%d: TSQ base at 0x%p.\n", i, card->tsq.base);
558
559 /* Initialize RSQ */
560 card->rsq.org = pci_alloc_consistent(card->pcidev,
561 NS_RSQSIZE + NS_RSQ_ALIGNMENT,
562 &card->rsq.dma);
563 if (card->rsq.org == NULL) {
564 printk("nicstar%d: can't allocate RSQ.\n", i);
565 error = 11;
566 ns_init_card_error(card, error);
567 return error;
568 }
569 card->rsq.base = PTR_ALIGN(card->rsq.org, NS_RSQ_ALIGNMENT);
570 card->rsq.next = card->rsq.base;
571 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
572 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
573 ns_rsqe_init(card->rsq.base + j);
574 writel(0x00000000, card->membase + RSQH);
575 writel(ALIGN(card->rsq.dma, NS_RSQ_ALIGNMENT), card->membase + RSQB);
576 PRINTK("nicstar%d: RSQ base at 0x%p.\n", i, card->rsq.base);
577
578 /* Initialize SCQ0, the only VBR SCQ used */
579 card->scq1 = NULL;
580 card->scq2 = NULL;
581 card->scq0 = get_scq(card, VBR_SCQSIZE, NS_VRSCD0);
582 if (card->scq0 == NULL) {
583 printk("nicstar%d: can't get SCQ0.\n", i);
584 error = 12;
585 ns_init_card_error(card, error);
586 return error;
587 }
588 u32d[0] = scq_virt_to_bus(card->scq0, card->scq0->base);
589 u32d[1] = (u32) 0x00000000;
590 u32d[2] = (u32) 0xffffffff;
591 u32d[3] = (u32) 0x00000000;
592 ns_write_sram(card, NS_VRSCD0, u32d, 4);
593 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
594 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
595 card->scq0->scd = NS_VRSCD0;
596 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%p.\n", i, card->scq0->base);
597
598 /* Initialize TSTs */
599 card->tst_addr = NS_TST0;
600 card->tst_free_entries = NS_TST_NUM_ENTRIES;
601 data = NS_TST_OPCODE_VARIABLE;
602 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
603 ns_write_sram(card, NS_TST0 + j, &data, 1);
604 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
605 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
606 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
607 ns_write_sram(card, NS_TST1 + j, &data, 1);
608 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
609 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
610 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
611 card->tste2vc[j] = NULL;
612 writel(NS_TST0 << 2, card->membase + TSTB);
613
614 /* Initialize RCT. AAL type is set on opening the VC. */
615 #ifdef RCQ_SUPPORT
616 u32d[0] = NS_RCTE_RAWCELLINTEN;
617 #else
618 u32d[0] = 0x00000000;
619 #endif /* RCQ_SUPPORT */
620 u32d[1] = 0x00000000;
621 u32d[2] = 0x00000000;
622 u32d[3] = 0xFFFFFFFF;
623 for (j = 0; j < card->rct_size; j++)
624 ns_write_sram(card, j * 4, u32d, 4);
625
626 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
627
628 for (j = 0; j < NS_FRSCD_NUM; j++)
629 card->scd2vc[j] = NULL;
630
631 /* Initialize buffer levels */
632 card->sbnr.min = MIN_SB;
633 card->sbnr.init = NUM_SB;
634 card->sbnr.max = MAX_SB;
635 card->lbnr.min = MIN_LB;
636 card->lbnr.init = NUM_LB;
637 card->lbnr.max = MAX_LB;
638 card->iovnr.min = MIN_IOVB;
639 card->iovnr.init = NUM_IOVB;
640 card->iovnr.max = MAX_IOVB;
641 card->hbnr.min = MIN_HB;
642 card->hbnr.init = NUM_HB;
643 card->hbnr.max = MAX_HB;
644
645 card->sm_handle = 0x00000000;
646 card->sm_addr = 0x00000000;
647 card->lg_handle = 0x00000000;
648 card->lg_addr = 0x00000000;
649
650 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
651
652 idr_init(&card->idr);
653
654 /* Pre-allocate some huge buffers */
655 skb_queue_head_init(&card->hbpool.queue);
656 card->hbpool.count = 0;
657 for (j = 0; j < NUM_HB; j++) {
658 struct sk_buff *hb;
659 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
660 if (hb == NULL) {
661 printk
662 ("nicstar%d: can't allocate %dth of %d huge buffers.\n",
663 i, j, NUM_HB);
664 error = 13;
665 ns_init_card_error(card, error);
666 return error;
667 }
668 NS_PRV_BUFTYPE(hb) = BUF_NONE;
669 skb_queue_tail(&card->hbpool.queue, hb);
670 card->hbpool.count++;
671 }
672
673 /* Allocate large buffers */
674 skb_queue_head_init(&card->lbpool.queue);
675 card->lbpool.count = 0; /* Not used */
676 for (j = 0; j < NUM_LB; j++) {
677 struct sk_buff *lb;
678 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
679 if (lb == NULL) {
680 printk
681 ("nicstar%d: can't allocate %dth of %d large buffers.\n",
682 i, j, NUM_LB);
683 error = 14;
684 ns_init_card_error(card, error);
685 return error;
686 }
687 NS_PRV_BUFTYPE(lb) = BUF_LG;
688 skb_queue_tail(&card->lbpool.queue, lb);
689 skb_reserve(lb, NS_SMBUFSIZE);
690 push_rxbufs(card, lb);
691 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
692 if (j == 1) {
693 card->rcbuf = lb;
694 card->rawcell = (struct ns_rcqe *) lb->data;
695 card->rawch = NS_PRV_DMA(lb);
696 }
697 }
698 /* Test for strange behaviour which leads to crashes */
699 if ((bcount =
700 ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) {
701 printk
702 ("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
703 i, j, bcount);
704 error = 14;
705 ns_init_card_error(card, error);
706 return error;
707 }
708
709 /* Allocate small buffers */
710 skb_queue_head_init(&card->sbpool.queue);
711 card->sbpool.count = 0; /* Not used */
712 for (j = 0; j < NUM_SB; j++) {
713 struct sk_buff *sb;
714 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
715 if (sb == NULL) {
716 printk
717 ("nicstar%d: can't allocate %dth of %d small buffers.\n",
718 i, j, NUM_SB);
719 error = 15;
720 ns_init_card_error(card, error);
721 return error;
722 }
723 NS_PRV_BUFTYPE(sb) = BUF_SM;
724 skb_queue_tail(&card->sbpool.queue, sb);
725 skb_reserve(sb, NS_AAL0_HEADER);
726 push_rxbufs(card, sb);
727 }
728 /* Test for strange behaviour which leads to crashes */
729 if ((bcount =
730 ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) {
731 printk
732 ("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
733 i, j, bcount);
734 error = 15;
735 ns_init_card_error(card, error);
736 return error;
737 }
738
739 /* Allocate iovec buffers */
740 skb_queue_head_init(&card->iovpool.queue);
741 card->iovpool.count = 0;
742 for (j = 0; j < NUM_IOVB; j++) {
743 struct sk_buff *iovb;
744 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
745 if (iovb == NULL) {
746 printk
747 ("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
748 i, j, NUM_IOVB);
749 error = 16;
750 ns_init_card_error(card, error);
751 return error;
752 }
753 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
754 skb_queue_tail(&card->iovpool.queue, iovb);
755 card->iovpool.count++;
756 }
757
758 /* Configure NICStAR */
759 if (card->rct_size == 4096)
760 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
761 else /* (card->rct_size == 16384) */
762 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
763
764 card->efbie = 1;
765
766 card->intcnt = 0;
767 if (request_irq
768 (pcidev->irq, &ns_irq_handler, IRQF_DISABLED | IRQF_SHARED,
769 "nicstar", card) != 0) {
770 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
771 error = 9;
772 ns_init_card_error(card, error);
773 return error;
774 }
775
776 /* Register device */
777 card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
778 if (card->atmdev == NULL) {
779 printk("nicstar%d: can't register device.\n", i);
780 error = 17;
781 ns_init_card_error(card, error);
782 return error;
783 }
784
785 if (ns_parse_mac(mac[i], card->atmdev->esi)) {
786 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
787 card->atmdev->esi, 6);
788 if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) ==
789 0) {
790 nicstar_read_eprom(card->membase,
791 NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
792 card->atmdev->esi, 6);
793 }
794 }
795
796 printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi);
797
798 card->atmdev->dev_data = card;
799 card->atmdev->ci_range.vpi_bits = card->vpibits;
800 card->atmdev->ci_range.vci_bits = card->vcibits;
801 card->atmdev->link_rate = card->max_pcr;
802 card->atmdev->phy = NULL;
803
804 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
805 if (card->max_pcr == ATM_OC3_PCR)
806 suni_init(card->atmdev);
807 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
808
809 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
810 if (card->max_pcr == ATM_25_PCR)
811 idt77105_init(card->atmdev);
812 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
813
814 if (card->atmdev->phy && card->atmdev->phy->start)
815 card->atmdev->phy->start(card->atmdev);
816
817 writel(NS_CFG_RXPATH | NS_CFG_SMBUFSIZE | NS_CFG_LGBUFSIZE | NS_CFG_EFBIE | NS_CFG_RSQSIZE | NS_CFG_VPIBITS | ns_cfg_rctsize | NS_CFG_RXINT_NODELAY | NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
818 NS_CFG_RSQAFIE | NS_CFG_TXEN | NS_CFG_TXIE | NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
819 NS_CFG_PHYIE, card->membase + CFG);
820
821 num_cards++;
822
823 return error;
824 }
825
826 static void __devinit ns_init_card_error(ns_dev * card, int error)
827 {
828 if (error >= 17) {
829 writel(0x00000000, card->membase + CFG);
830 }
831 if (error >= 16) {
832 struct sk_buff *iovb;
833 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
834 dev_kfree_skb_any(iovb);
835 }
836 if (error >= 15) {
837 struct sk_buff *sb;
838 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
839 dev_kfree_skb_any(sb);
840 free_scq(card, card->scq0, NULL);
841 }
842 if (error >= 14) {
843 struct sk_buff *lb;
844 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
845 dev_kfree_skb_any(lb);
846 }
847 if (error >= 13) {
848 struct sk_buff *hb;
849 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
850 dev_kfree_skb_any(hb);
851 }
852 if (error >= 12) {
853 kfree(card->rsq.org);
854 }
855 if (error >= 11) {
856 kfree(card->tsq.org);
857 }
858 if (error >= 10) {
859 free_irq(card->pcidev->irq, card);
860 }
861 if (error >= 4) {
862 iounmap(card->membase);
863 }
864 if (error >= 3) {
865 pci_disable_device(card->pcidev);
866 kfree(card);
867 }
868 }
869
870 static scq_info *get_scq(ns_dev *card, int size, u32 scd)
871 {
872 scq_info *scq;
873 int i;
874
875 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
876 return NULL;
877
878 scq = kmalloc(sizeof(scq_info), GFP_KERNEL);
879 if (!scq)
880 return NULL;
881 scq->org = pci_alloc_consistent(card->pcidev, 2 * size, &scq->dma);
882 if (!scq->org) {
883 kfree(scq);
884 return NULL;
885 }
886 scq->skb = kmalloc(sizeof(struct sk_buff *) *
887 (size / NS_SCQE_SIZE), GFP_KERNEL);
888 if (!scq->skb) {
889 kfree(scq->org);
890 kfree(scq);
891 return NULL;
892 }
893 scq->num_entries = size / NS_SCQE_SIZE;
894 scq->base = PTR_ALIGN(scq->org, size);
895 scq->next = scq->base;
896 scq->last = scq->base + (scq->num_entries - 1);
897 scq->tail = scq->last;
898 scq->scd = scd;
899 scq->num_entries = size / NS_SCQE_SIZE;
900 scq->tbd_count = 0;
901 init_waitqueue_head(&scq->scqfull_waitq);
902 scq->full = 0;
903 spin_lock_init(&scq->lock);
904
905 for (i = 0; i < scq->num_entries; i++)
906 scq->skb[i] = NULL;
907
908 return scq;
909 }
910
911 /* For variable rate SCQ vcc must be NULL */
912 static void free_scq(ns_dev *card, scq_info *scq, struct atm_vcc *vcc)
913 {
914 int i;
915
916 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
917 for (i = 0; i < scq->num_entries; i++) {
918 if (scq->skb[i] != NULL) {
919 vcc = ATM_SKB(scq->skb[i])->vcc;
920 if (vcc->pop != NULL)
921 vcc->pop(vcc, scq->skb[i]);
922 else
923 dev_kfree_skb_any(scq->skb[i]);
924 }
925 } else { /* vcc must be != NULL */
926
927 if (vcc == NULL) {
928 printk
929 ("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
930 for (i = 0; i < scq->num_entries; i++)
931 dev_kfree_skb_any(scq->skb[i]);
932 } else
933 for (i = 0; i < scq->num_entries; i++) {
934 if (scq->skb[i] != NULL) {
935 if (vcc->pop != NULL)
936 vcc->pop(vcc, scq->skb[i]);
937 else
938 dev_kfree_skb_any(scq->skb[i]);
939 }
940 }
941 }
942 kfree(scq->skb);
943 pci_free_consistent(card->pcidev,
944 2 * (scq->num_entries == VBR_SCQ_NUM_ENTRIES ?
945 VBR_SCQSIZE : CBR_SCQSIZE),
946 scq->org, scq->dma);
947 kfree(scq);
948 }
949
950 /* The handles passed must be pointers to the sk_buff containing the small
951 or large buffer(s) cast to u32. */
952 static void push_rxbufs(ns_dev * card, struct sk_buff *skb)
953 {
954 struct sk_buff *handle1, *handle2;
955 u32 id1 = 0, id2 = 0;
956 u32 addr1, addr2;
957 u32 stat;
958 unsigned long flags;
959 int err;
960
961 /* *BARF* */
962 handle2 = NULL;
963 addr2 = 0;
964 handle1 = skb;
965 addr1 = pci_map_single(card->pcidev,
966 skb->data,
967 (NS_PRV_BUFTYPE(skb) == BUF_SM
968 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
969 PCI_DMA_TODEVICE);
970 NS_PRV_DMA(skb) = addr1; /* save so we can unmap later */
971
972 #ifdef GENERAL_DEBUG
973 if (!addr1)
974 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n",
975 card->index);
976 #endif /* GENERAL_DEBUG */
977
978 stat = readl(card->membase + STAT);
979 card->sbfqc = ns_stat_sfbqc_get(stat);
980 card->lbfqc = ns_stat_lfbqc_get(stat);
981 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
982 if (!addr2) {
983 if (card->sm_addr) {
984 addr2 = card->sm_addr;
985 handle2 = card->sm_handle;
986 card->sm_addr = 0x00000000;
987 card->sm_handle = 0x00000000;
988 } else { /* (!sm_addr) */
989
990 card->sm_addr = addr1;
991 card->sm_handle = handle1;
992 }
993 }
994 } else { /* buf_type == BUF_LG */
995
996 if (!addr2) {
997 if (card->lg_addr) {
998 addr2 = card->lg_addr;
999 handle2 = card->lg_handle;
1000 card->lg_addr = 0x00000000;
1001 card->lg_handle = 0x00000000;
1002 } else { /* (!lg_addr) */
1003
1004 card->lg_addr = addr1;
1005 card->lg_handle = handle1;
1006 }
1007 }
1008 }
1009
1010 if (addr2) {
1011 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
1012 if (card->sbfqc >= card->sbnr.max) {
1013 skb_unlink(handle1, &card->sbpool.queue);
1014 dev_kfree_skb_any(handle1);
1015 skb_unlink(handle2, &card->sbpool.queue);
1016 dev_kfree_skb_any(handle2);
1017 return;
1018 } else
1019 card->sbfqc += 2;
1020 } else { /* (buf_type == BUF_LG) */
1021
1022 if (card->lbfqc >= card->lbnr.max) {
1023 skb_unlink(handle1, &card->lbpool.queue);
1024 dev_kfree_skb_any(handle1);
1025 skb_unlink(handle2, &card->lbpool.queue);
1026 dev_kfree_skb_any(handle2);
1027 return;
1028 } else
1029 card->lbfqc += 2;
1030 }
1031
1032 do {
1033 if (!idr_pre_get(&card->idr, GFP_ATOMIC)) {
1034 printk(KERN_ERR
1035 "nicstar%d: no free memory for idr\n",
1036 card->index);
1037 goto out;
1038 }
1039
1040 if (!id1)
1041 err = idr_get_new_above(&card->idr, handle1, 0, &id1);
1042
1043 if (!id2 && err == 0)
1044 err = idr_get_new_above(&card->idr, handle2, 0, &id2);
1045
1046 } while (err == -EAGAIN);
1047
1048 if (err)
1049 goto out;
1050
1051 spin_lock_irqsave(&card->res_lock, flags);
1052 while (CMD_BUSY(card)) ;
1053 writel(addr2, card->membase + DR3);
1054 writel(id2, card->membase + DR2);
1055 writel(addr1, card->membase + DR1);
1056 writel(id1, card->membase + DR0);
1057 writel(NS_CMD_WRITE_FREEBUFQ | NS_PRV_BUFTYPE(skb),
1058 card->membase + CMD);
1059 spin_unlock_irqrestore(&card->res_lock, flags);
1060
1061 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n",
1062 card->index,
1063 (NS_PRV_BUFTYPE(skb) == BUF_SM ? "small" : "large"),
1064 addr1, addr2);
1065 }
1066
1067 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1068 card->lbfqc >= card->lbnr.min) {
1069 card->efbie = 1;
1070 writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
1071 card->membase + CFG);
1072 }
1073
1074 out:
1075 return;
1076 }
1077
1078 static irqreturn_t ns_irq_handler(int irq, void *dev_id)
1079 {
1080 u32 stat_r;
1081 ns_dev *card;
1082 struct atm_dev *dev;
1083 unsigned long flags;
1084
1085 card = (ns_dev *) dev_id;
1086 dev = card->atmdev;
1087 card->intcnt++;
1088
1089 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1090
1091 spin_lock_irqsave(&card->int_lock, flags);
1092
1093 stat_r = readl(card->membase + STAT);
1094
1095 /* Transmit Status Indicator has been written to T. S. Queue */
1096 if (stat_r & NS_STAT_TSIF) {
1097 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1098 process_tsq(card);
1099 writel(NS_STAT_TSIF, card->membase + STAT);
1100 }
1101
1102 /* Incomplete CS-PDU has been transmitted */
1103 if (stat_r & NS_STAT_TXICP) {
1104 writel(NS_STAT_TXICP, card->membase + STAT);
1105 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1106 card->index);
1107 }
1108
1109 /* Transmit Status Queue 7/8 full */
1110 if (stat_r & NS_STAT_TSQF) {
1111 writel(NS_STAT_TSQF, card->membase + STAT);
1112 PRINTK("nicstar%d: TSQ full.\n", card->index);
1113 process_tsq(card);
1114 }
1115
1116 /* Timer overflow */
1117 if (stat_r & NS_STAT_TMROF) {
1118 writel(NS_STAT_TMROF, card->membase + STAT);
1119 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1120 }
1121
1122 /* PHY device interrupt signal active */
1123 if (stat_r & NS_STAT_PHYI) {
1124 writel(NS_STAT_PHYI, card->membase + STAT);
1125 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1126 if (dev->phy && dev->phy->interrupt) {
1127 dev->phy->interrupt(dev);
1128 }
1129 }
1130
1131 /* Small Buffer Queue is full */
1132 if (stat_r & NS_STAT_SFBQF) {
1133 writel(NS_STAT_SFBQF, card->membase + STAT);
1134 printk("nicstar%d: Small free buffer queue is full.\n",
1135 card->index);
1136 }
1137
1138 /* Large Buffer Queue is full */
1139 if (stat_r & NS_STAT_LFBQF) {
1140 writel(NS_STAT_LFBQF, card->membase + STAT);
1141 printk("nicstar%d: Large free buffer queue is full.\n",
1142 card->index);
1143 }
1144
1145 /* Receive Status Queue is full */
1146 if (stat_r & NS_STAT_RSQF) {
1147 writel(NS_STAT_RSQF, card->membase + STAT);
1148 printk("nicstar%d: RSQ full.\n", card->index);
1149 process_rsq(card);
1150 }
1151
1152 /* Complete CS-PDU received */
1153 if (stat_r & NS_STAT_EOPDU) {
1154 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1155 process_rsq(card);
1156 writel(NS_STAT_EOPDU, card->membase + STAT);
1157 }
1158
1159 /* Raw cell received */
1160 if (stat_r & NS_STAT_RAWCF) {
1161 writel(NS_STAT_RAWCF, card->membase + STAT);
1162 #ifndef RCQ_SUPPORT
1163 printk("nicstar%d: Raw cell received and no support yet...\n",
1164 card->index);
1165 #endif /* RCQ_SUPPORT */
1166 /* NOTE: the following procedure may keep a raw cell pending until the
1167 next interrupt. As this preliminary support is only meant to
1168 avoid buffer leakage, this is not an issue. */
1169 while (readl(card->membase + RAWCT) != card->rawch) {
1170
1171 if (ns_rcqe_islast(card->rawcell)) {
1172 struct sk_buff *oldbuf;
1173
1174 oldbuf = card->rcbuf;
1175 card->rcbuf = idr_find(&card->idr,
1176 ns_rcqe_nextbufhandle(card->rawcell));
1177 card->rawch = NS_PRV_DMA(card->rcbuf);
1178 card->rawcell = (struct ns_rcqe *)
1179 card->rcbuf->data;
1180 recycle_rx_buf(card, oldbuf);
1181 } else {
1182 card->rawch += NS_RCQE_SIZE;
1183 card->rawcell++;
1184 }
1185 }
1186 }
1187
1188 /* Small buffer queue is empty */
1189 if (stat_r & NS_STAT_SFBQE) {
1190 int i;
1191 struct sk_buff *sb;
1192
1193 writel(NS_STAT_SFBQE, card->membase + STAT);
1194 printk("nicstar%d: Small free buffer queue empty.\n",
1195 card->index);
1196 for (i = 0; i < card->sbnr.min; i++) {
1197 sb = dev_alloc_skb(NS_SMSKBSIZE);
1198 if (sb == NULL) {
1199 writel(readl(card->membase + CFG) &
1200 ~NS_CFG_EFBIE, card->membase + CFG);
1201 card->efbie = 0;
1202 break;
1203 }
1204 NS_PRV_BUFTYPE(sb) = BUF_SM;
1205 skb_queue_tail(&card->sbpool.queue, sb);
1206 skb_reserve(sb, NS_AAL0_HEADER);
1207 push_rxbufs(card, sb);
1208 }
1209 card->sbfqc = i;
1210 process_rsq(card);
1211 }
1212
1213 /* Large buffer queue empty */
1214 if (stat_r & NS_STAT_LFBQE) {
1215 int i;
1216 struct sk_buff *lb;
1217
1218 writel(NS_STAT_LFBQE, card->membase + STAT);
1219 printk("nicstar%d: Large free buffer queue empty.\n",
1220 card->index);
1221 for (i = 0; i < card->lbnr.min; i++) {
1222 lb = dev_alloc_skb(NS_LGSKBSIZE);
1223 if (lb == NULL) {
1224 writel(readl(card->membase + CFG) &
1225 ~NS_CFG_EFBIE, card->membase + CFG);
1226 card->efbie = 0;
1227 break;
1228 }
1229 NS_PRV_BUFTYPE(lb) = BUF_LG;
1230 skb_queue_tail(&card->lbpool.queue, lb);
1231 skb_reserve(lb, NS_SMBUFSIZE);
1232 push_rxbufs(card, lb);
1233 }
1234 card->lbfqc = i;
1235 process_rsq(card);
1236 }
1237
1238 /* Receive Status Queue is 7/8 full */
1239 if (stat_r & NS_STAT_RSQAF) {
1240 writel(NS_STAT_RSQAF, card->membase + STAT);
1241 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1242 process_rsq(card);
1243 }
1244
1245 spin_unlock_irqrestore(&card->int_lock, flags);
1246 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1247 return IRQ_HANDLED;
1248 }
1249
1250 static int ns_open(struct atm_vcc *vcc)
1251 {
1252 ns_dev *card;
1253 vc_map *vc;
1254 unsigned long tmpl, modl;
1255 int tcr, tcra; /* target cell rate, and absolute value */
1256 int n = 0; /* Number of entries in the TST. Initialized to remove
1257 the compiler warning. */
1258 u32 u32d[4];
1259 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1260 warning. How I wish compilers were clever enough to
1261 tell which variables can truly be used
1262 uninitialized... */
1263 int inuse; /* tx or rx vc already in use by another vcc */
1264 short vpi = vcc->vpi;
1265 int vci = vcc->vci;
1266
1267 card = (ns_dev *) vcc->dev->dev_data;
1268 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int)vpi,
1269 vci);
1270 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1271 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1272 return -EINVAL;
1273 }
1274
1275 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1276 vcc->dev_data = vc;
1277
1278 inuse = 0;
1279 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1280 inuse = 1;
1281 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1282 inuse += 2;
1283 if (inuse) {
1284 printk("nicstar%d: %s vci already in use.\n", card->index,
1285 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1286 return -EINVAL;
1287 }
1288
1289 set_bit(ATM_VF_ADDR, &vcc->flags);
1290
1291 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1292 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1293 needed to do that. */
1294 if (!test_bit(ATM_VF_PARTIAL, &vcc->flags)) {
1295 scq_info *scq;
1296
1297 set_bit(ATM_VF_PARTIAL, &vcc->flags);
1298 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1299 /* Check requested cell rate and availability of SCD */
1300 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0
1301 && vcc->qos.txtp.min_pcr == 0) {
1302 PRINTK
1303 ("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1304 card->index);
1305 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1306 clear_bit(ATM_VF_ADDR, &vcc->flags);
1307 return -EINVAL;
1308 }
1309
1310 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1311 tcra = tcr >= 0 ? tcr : -tcr;
1312
1313 PRINTK("nicstar%d: target cell rate = %d.\n",
1314 card->index, vcc->qos.txtp.max_pcr);
1315
1316 tmpl =
1317 (unsigned long)tcra *(unsigned long)
1318 NS_TST_NUM_ENTRIES;
1319 modl = tmpl % card->max_pcr;
1320
1321 n = (int)(tmpl / card->max_pcr);
1322 if (tcr > 0) {
1323 if (modl > 0)
1324 n++;
1325 } else if (tcr == 0) {
1326 if ((n =
1327 (card->tst_free_entries -
1328 NS_TST_RESERVED)) <= 0) {
1329 PRINTK
1330 ("nicstar%d: no CBR bandwidth free.\n",
1331 card->index);
1332 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1333 clear_bit(ATM_VF_ADDR, &vcc->flags);
1334 return -EINVAL;
1335 }
1336 }
1337
1338 if (n == 0) {
1339 printk
1340 ("nicstar%d: selected bandwidth < granularity.\n",
1341 card->index);
1342 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1343 clear_bit(ATM_VF_ADDR, &vcc->flags);
1344 return -EINVAL;
1345 }
1346
1347 if (n > (card->tst_free_entries - NS_TST_RESERVED)) {
1348 PRINTK
1349 ("nicstar%d: not enough free CBR bandwidth.\n",
1350 card->index);
1351 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1352 clear_bit(ATM_VF_ADDR, &vcc->flags);
1353 return -EINVAL;
1354 } else
1355 card->tst_free_entries -= n;
1356
1357 XPRINTK("nicstar%d: writing %d tst entries.\n",
1358 card->index, n);
1359 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) {
1360 if (card->scd2vc[frscdi] == NULL) {
1361 card->scd2vc[frscdi] = vc;
1362 break;
1363 }
1364 }
1365 if (frscdi == NS_FRSCD_NUM) {
1366 PRINTK
1367 ("nicstar%d: no SCD available for CBR channel.\n",
1368 card->index);
1369 card->tst_free_entries += n;
1370 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1371 clear_bit(ATM_VF_ADDR, &vcc->flags);
1372 return -EBUSY;
1373 }
1374
1375 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1376
1377 scq = get_scq(card, CBR_SCQSIZE, vc->cbr_scd);
1378 if (scq == NULL) {
1379 PRINTK("nicstar%d: can't get fixed rate SCQ.\n",
1380 card->index);
1381 card->scd2vc[frscdi] = NULL;
1382 card->tst_free_entries += n;
1383 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1384 clear_bit(ATM_VF_ADDR, &vcc->flags);
1385 return -ENOMEM;
1386 }
1387 vc->scq = scq;
1388 u32d[0] = scq_virt_to_bus(scq, scq->base);
1389 u32d[1] = (u32) 0x00000000;
1390 u32d[2] = (u32) 0xffffffff;
1391 u32d[3] = (u32) 0x00000000;
1392 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1393
1394 fill_tst(card, n, vc);
1395 } else if (vcc->qos.txtp.traffic_class == ATM_UBR) {
1396 vc->cbr_scd = 0x00000000;
1397 vc->scq = card->scq0;
1398 }
1399
1400 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1401 vc->tx = 1;
1402 vc->tx_vcc = vcc;
1403 vc->tbd_count = 0;
1404 }
1405 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1406 u32 status;
1407
1408 vc->rx = 1;
1409 vc->rx_vcc = vcc;
1410 vc->rx_iov = NULL;
1411
1412 /* Open the connection in hardware */
1413 if (vcc->qos.aal == ATM_AAL5)
1414 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1415 else /* vcc->qos.aal == ATM_AAL0 */
1416 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1417 #ifdef RCQ_SUPPORT
1418 status |= NS_RCTE_RAWCELLINTEN;
1419 #endif /* RCQ_SUPPORT */
1420 ns_write_sram(card,
1421 NS_RCT +
1422 (vpi << card->vcibits | vci) *
1423 NS_RCT_ENTRY_SIZE, &status, 1);
1424 }
1425
1426 }
1427
1428 set_bit(ATM_VF_READY, &vcc->flags);
1429 return 0;
1430 }
1431
1432 static void ns_close(struct atm_vcc *vcc)
1433 {
1434 vc_map *vc;
1435 ns_dev *card;
1436 u32 data;
1437 int i;
1438
1439 vc = vcc->dev_data;
1440 card = vcc->dev->dev_data;
1441 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1442 (int)vcc->vpi, vcc->vci);
1443
1444 clear_bit(ATM_VF_READY, &vcc->flags);
1445
1446 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1447 u32 addr;
1448 unsigned long flags;
1449
1450 addr =
1451 NS_RCT +
1452 (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1453 spin_lock_irqsave(&card->res_lock, flags);
1454 while (CMD_BUSY(card)) ;
1455 writel(NS_CMD_CLOSE_CONNECTION | addr << 2,
1456 card->membase + CMD);
1457 spin_unlock_irqrestore(&card->res_lock, flags);
1458
1459 vc->rx = 0;
1460 if (vc->rx_iov != NULL) {
1461 struct sk_buff *iovb;
1462 u32 stat;
1463
1464 stat = readl(card->membase + STAT);
1465 card->sbfqc = ns_stat_sfbqc_get(stat);
1466 card->lbfqc = ns_stat_lfbqc_get(stat);
1467
1468 PRINTK
1469 ("nicstar%d: closing a VC with pending rx buffers.\n",
1470 card->index);
1471 iovb = vc->rx_iov;
1472 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
1473 NS_PRV_IOVCNT(iovb));
1474 NS_PRV_IOVCNT(iovb) = 0;
1475 spin_lock_irqsave(&card->int_lock, flags);
1476 recycle_iov_buf(card, iovb);
1477 spin_unlock_irqrestore(&card->int_lock, flags);
1478 vc->rx_iov = NULL;
1479 }
1480 }
1481
1482 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1483 vc->tx = 0;
1484 }
1485
1486 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1487 unsigned long flags;
1488 ns_scqe *scqep;
1489 scq_info *scq;
1490
1491 scq = vc->scq;
1492
1493 for (;;) {
1494 spin_lock_irqsave(&scq->lock, flags);
1495 scqep = scq->next;
1496 if (scqep == scq->base)
1497 scqep = scq->last;
1498 else
1499 scqep--;
1500 if (scqep == scq->tail) {
1501 spin_unlock_irqrestore(&scq->lock, flags);
1502 break;
1503 }
1504 /* If the last entry is not a TSR, place one in the SCQ in order to
1505 be able to completely drain it and then close. */
1506 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) {
1507 ns_scqe tsr;
1508 u32 scdi, scqi;
1509 u32 data;
1510 int index;
1511
1512 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1513 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1514 scqi = scq->next - scq->base;
1515 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1516 tsr.word_3 = 0x00000000;
1517 tsr.word_4 = 0x00000000;
1518 *scq->next = tsr;
1519 index = (int)scqi;
1520 scq->skb[index] = NULL;
1521 if (scq->next == scq->last)
1522 scq->next = scq->base;
1523 else
1524 scq->next++;
1525 data = scq_virt_to_bus(scq, scq->next);
1526 ns_write_sram(card, scq->scd, &data, 1);
1527 }
1528 spin_unlock_irqrestore(&scq->lock, flags);
1529 schedule();
1530 }
1531
1532 /* Free all TST entries */
1533 data = NS_TST_OPCODE_VARIABLE;
1534 for (i = 0; i < NS_TST_NUM_ENTRIES; i++) {
1535 if (card->tste2vc[i] == vc) {
1536 ns_write_sram(card, card->tst_addr + i, &data,
1537 1);
1538 card->tste2vc[i] = NULL;
1539 card->tst_free_entries++;
1540 }
1541 }
1542
1543 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1544 free_scq(card, vc->scq, vcc);
1545 }
1546
1547 /* remove all references to vcc before deleting it */
1548 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1549 unsigned long flags;
1550 scq_info *scq = card->scq0;
1551
1552 spin_lock_irqsave(&scq->lock, flags);
1553
1554 for (i = 0; i < scq->num_entries; i++) {
1555 if (scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1556 ATM_SKB(scq->skb[i])->vcc = NULL;
1557 atm_return(vcc, scq->skb[i]->truesize);
1558 PRINTK
1559 ("nicstar: deleted pending vcc mapping\n");
1560 }
1561 }
1562
1563 spin_unlock_irqrestore(&scq->lock, flags);
1564 }
1565
1566 vcc->dev_data = NULL;
1567 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1568 clear_bit(ATM_VF_ADDR, &vcc->flags);
1569
1570 #ifdef RX_DEBUG
1571 {
1572 u32 stat, cfg;
1573 stat = readl(card->membase + STAT);
1574 cfg = readl(card->membase + CFG);
1575 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1576 printk
1577 ("TSQ: base = 0x%p next = 0x%p last = 0x%p TSQT = 0x%08X \n",
1578 card->tsq.base, card->tsq.next,
1579 card->tsq.last, readl(card->membase + TSQT));
1580 printk
1581 ("RSQ: base = 0x%p next = 0x%p last = 0x%p RSQT = 0x%08X \n",
1582 card->rsq.base, card->rsq.next,
1583 card->rsq.last, readl(card->membase + RSQT));
1584 printk("Empty free buffer queue interrupt %s \n",
1585 card->efbie ? "enabled" : "disabled");
1586 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1587 ns_stat_sfbqc_get(stat), card->sbpool.count,
1588 ns_stat_lfbqc_get(stat), card->lbpool.count);
1589 printk("hbpool.count = %d iovpool.count = %d \n",
1590 card->hbpool.count, card->iovpool.count);
1591 }
1592 #endif /* RX_DEBUG */
1593 }
1594
1595 static void fill_tst(ns_dev * card, int n, vc_map * vc)
1596 {
1597 u32 new_tst;
1598 unsigned long cl;
1599 int e, r;
1600 u32 data;
1601
1602 /* It would be very complicated to keep the two TSTs synchronized while
1603 assuring that writes are only made to the inactive TST. So, for now I
1604 will use only one TST. If problems occur, I will change this again */
1605
1606 new_tst = card->tst_addr;
1607
1608 /* Fill procedure */
1609
1610 for (e = 0; e < NS_TST_NUM_ENTRIES; e++) {
1611 if (card->tste2vc[e] == NULL)
1612 break;
1613 }
1614 if (e == NS_TST_NUM_ENTRIES) {
1615 printk("nicstar%d: No free TST entries found. \n", card->index);
1616 return;
1617 }
1618
1619 r = n;
1620 cl = NS_TST_NUM_ENTRIES;
1621 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1622
1623 while (r > 0) {
1624 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) {
1625 card->tste2vc[e] = vc;
1626 ns_write_sram(card, new_tst + e, &data, 1);
1627 cl -= NS_TST_NUM_ENTRIES;
1628 r--;
1629 }
1630
1631 if (++e == NS_TST_NUM_ENTRIES) {
1632 e = 0;
1633 }
1634 cl += n;
1635 }
1636
1637 /* End of fill procedure */
1638
1639 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1640 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1641 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1642 card->tst_addr = new_tst;
1643 }
1644
1645 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1646 {
1647 ns_dev *card;
1648 vc_map *vc;
1649 scq_info *scq;
1650 unsigned long buflen;
1651 ns_scqe scqe;
1652 u32 flags; /* TBD flags, not CPU flags */
1653
1654 card = vcc->dev->dev_data;
1655 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1656 if ((vc = (vc_map *) vcc->dev_data) == NULL) {
1657 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n",
1658 card->index);
1659 atomic_inc(&vcc->stats->tx_err);
1660 dev_kfree_skb_any(skb);
1661 return -EINVAL;
1662 }
1663
1664 if (!vc->tx) {
1665 printk("nicstar%d: Trying to transmit on a non-tx VC.\n",
1666 card->index);
1667 atomic_inc(&vcc->stats->tx_err);
1668 dev_kfree_skb_any(skb);
1669 return -EINVAL;
1670 }
1671
1672 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1673 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n",
1674 card->index);
1675 atomic_inc(&vcc->stats->tx_err);
1676 dev_kfree_skb_any(skb);
1677 return -EINVAL;
1678 }
1679
1680 if (skb_shinfo(skb)->nr_frags != 0) {
1681 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1682 atomic_inc(&vcc->stats->tx_err);
1683 dev_kfree_skb_any(skb);
1684 return -EINVAL;
1685 }
1686
1687 ATM_SKB(skb)->vcc = vcc;
1688
1689 NS_PRV_DMA(skb) = pci_map_single(card->pcidev, skb->data,
1690 skb->len, PCI_DMA_TODEVICE);
1691
1692 if (vcc->qos.aal == ATM_AAL5) {
1693 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1694 flags = NS_TBD_AAL5;
1695 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb));
1696 scqe.word_3 = cpu_to_le32(skb->len);
1697 scqe.word_4 =
1698 ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1699 ATM_SKB(skb)->
1700 atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1701 flags |= NS_TBD_EOPDU;
1702 } else { /* (vcc->qos.aal == ATM_AAL0) */
1703
1704 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1705 flags = NS_TBD_AAL0;
1706 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb) + NS_AAL0_HEADER);
1707 scqe.word_3 = cpu_to_le32(0x00000000);
1708 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1709 flags |= NS_TBD_EOPDU;
1710 scqe.word_4 =
1711 cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1712 /* Force the VPI/VCI to be the same as in VCC struct */
1713 scqe.word_4 |=
1714 cpu_to_le32((((u32) vcc->
1715 vpi) << NS_TBD_VPI_SHIFT | ((u32) vcc->
1716 vci) <<
1717 NS_TBD_VCI_SHIFT) & NS_TBD_VC_MASK);
1718 }
1719
1720 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1721 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1722 scq = ((vc_map *) vcc->dev_data)->scq;
1723 } else {
1724 scqe.word_1 =
1725 ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1726 scq = card->scq0;
1727 }
1728
1729 if (push_scqe(card, vc, scq, &scqe, skb) != 0) {
1730 atomic_inc(&vcc->stats->tx_err);
1731 dev_kfree_skb_any(skb);
1732 return -EIO;
1733 }
1734 atomic_inc(&vcc->stats->tx);
1735
1736 return 0;
1737 }
1738
1739 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
1740 struct sk_buff *skb)
1741 {
1742 unsigned long flags;
1743 ns_scqe tsr;
1744 u32 scdi, scqi;
1745 int scq_is_vbr;
1746 u32 data;
1747 int index;
1748
1749 spin_lock_irqsave(&scq->lock, flags);
1750 while (scq->tail == scq->next) {
1751 if (in_interrupt()) {
1752 spin_unlock_irqrestore(&scq->lock, flags);
1753 printk("nicstar%d: Error pushing TBD.\n", card->index);
1754 return 1;
1755 }
1756
1757 scq->full = 1;
1758 spin_unlock_irqrestore(&scq->lock, flags);
1759 interruptible_sleep_on_timeout(&scq->scqfull_waitq,
1760 SCQFULL_TIMEOUT);
1761 spin_lock_irqsave(&scq->lock, flags);
1762
1763 if (scq->full) {
1764 spin_unlock_irqrestore(&scq->lock, flags);
1765 printk("nicstar%d: Timeout pushing TBD.\n",
1766 card->index);
1767 return 1;
1768 }
1769 }
1770 *scq->next = *tbd;
1771 index = (int)(scq->next - scq->base);
1772 scq->skb[index] = skb;
1773 XPRINTK("nicstar%d: sending skb at 0x%p (pos %d).\n",
1774 card->index, skb, index);
1775 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1776 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1777 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1778 scq->next);
1779 if (scq->next == scq->last)
1780 scq->next = scq->base;
1781 else
1782 scq->next++;
1783
1784 vc->tbd_count++;
1785 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) {
1786 scq->tbd_count++;
1787 scq_is_vbr = 1;
1788 } else
1789 scq_is_vbr = 0;
1790
1791 if (vc->tbd_count >= MAX_TBD_PER_VC
1792 || scq->tbd_count >= MAX_TBD_PER_SCQ) {
1793 int has_run = 0;
1794
1795 while (scq->tail == scq->next) {
1796 if (in_interrupt()) {
1797 data = scq_virt_to_bus(scq, scq->next);
1798 ns_write_sram(card, scq->scd, &data, 1);
1799 spin_unlock_irqrestore(&scq->lock, flags);
1800 printk("nicstar%d: Error pushing TSR.\n",
1801 card->index);
1802 return 0;
1803 }
1804
1805 scq->full = 1;
1806 if (has_run++)
1807 break;
1808 spin_unlock_irqrestore(&scq->lock, flags);
1809 interruptible_sleep_on_timeout(&scq->scqfull_waitq,
1810 SCQFULL_TIMEOUT);
1811 spin_lock_irqsave(&scq->lock, flags);
1812 }
1813
1814 if (!scq->full) {
1815 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1816 if (scq_is_vbr)
1817 scdi = NS_TSR_SCDISVBR;
1818 else
1819 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1820 scqi = scq->next - scq->base;
1821 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1822 tsr.word_3 = 0x00000000;
1823 tsr.word_4 = 0x00000000;
1824
1825 *scq->next = tsr;
1826 index = (int)scqi;
1827 scq->skb[index] = NULL;
1828 XPRINTK
1829 ("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1830 card->index, le32_to_cpu(tsr.word_1),
1831 le32_to_cpu(tsr.word_2), le32_to_cpu(tsr.word_3),
1832 le32_to_cpu(tsr.word_4), scq->next);
1833 if (scq->next == scq->last)
1834 scq->next = scq->base;
1835 else
1836 scq->next++;
1837 vc->tbd_count = 0;
1838 scq->tbd_count = 0;
1839 } else
1840 PRINTK("nicstar%d: Timeout pushing TSR.\n",
1841 card->index);
1842 }
1843 data = scq_virt_to_bus(scq, scq->next);
1844 ns_write_sram(card, scq->scd, &data, 1);
1845
1846 spin_unlock_irqrestore(&scq->lock, flags);
1847
1848 return 0;
1849 }
1850
1851 static void process_tsq(ns_dev * card)
1852 {
1853 u32 scdi;
1854 scq_info *scq;
1855 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
1856 int serviced_entries; /* flag indicating at least on entry was serviced */
1857
1858 serviced_entries = 0;
1859
1860 if (card->tsq.next == card->tsq.last)
1861 one_ahead = card->tsq.base;
1862 else
1863 one_ahead = card->tsq.next + 1;
1864
1865 if (one_ahead == card->tsq.last)
1866 two_ahead = card->tsq.base;
1867 else
1868 two_ahead = one_ahead + 1;
1869
1870 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
1871 !ns_tsi_isempty(two_ahead))
1872 /* At most two empty, as stated in the 77201 errata */
1873 {
1874 serviced_entries = 1;
1875
1876 /* Skip the one or two possible empty entries */
1877 while (ns_tsi_isempty(card->tsq.next)) {
1878 if (card->tsq.next == card->tsq.last)
1879 card->tsq.next = card->tsq.base;
1880 else
1881 card->tsq.next++;
1882 }
1883
1884 if (!ns_tsi_tmrof(card->tsq.next)) {
1885 scdi = ns_tsi_getscdindex(card->tsq.next);
1886 if (scdi == NS_TSI_SCDISVBR)
1887 scq = card->scq0;
1888 else {
1889 if (card->scd2vc[scdi] == NULL) {
1890 printk
1891 ("nicstar%d: could not find VC from SCD index.\n",
1892 card->index);
1893 ns_tsi_init(card->tsq.next);
1894 return;
1895 }
1896 scq = card->scd2vc[scdi]->scq;
1897 }
1898 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
1899 scq->full = 0;
1900 wake_up_interruptible(&(scq->scqfull_waitq));
1901 }
1902
1903 ns_tsi_init(card->tsq.next);
1904 previous = card->tsq.next;
1905 if (card->tsq.next == card->tsq.last)
1906 card->tsq.next = card->tsq.base;
1907 else
1908 card->tsq.next++;
1909
1910 if (card->tsq.next == card->tsq.last)
1911 one_ahead = card->tsq.base;
1912 else
1913 one_ahead = card->tsq.next + 1;
1914
1915 if (one_ahead == card->tsq.last)
1916 two_ahead = card->tsq.base;
1917 else
1918 two_ahead = one_ahead + 1;
1919 }
1920
1921 if (serviced_entries)
1922 writel(PTR_DIFF(previous, card->tsq.base),
1923 card->membase + TSQH);
1924 }
1925
1926 static void drain_scq(ns_dev * card, scq_info * scq, int pos)
1927 {
1928 struct atm_vcc *vcc;
1929 struct sk_buff *skb;
1930 int i;
1931 unsigned long flags;
1932
1933 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%p, pos %d.\n",
1934 card->index, scq, pos);
1935 if (pos >= scq->num_entries) {
1936 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
1937 return;
1938 }
1939
1940 spin_lock_irqsave(&scq->lock, flags);
1941 i = (int)(scq->tail - scq->base);
1942 if (++i == scq->num_entries)
1943 i = 0;
1944 while (i != pos) {
1945 skb = scq->skb[i];
1946 XPRINTK("nicstar%d: freeing skb at 0x%p (index %d).\n",
1947 card->index, skb, i);
1948 if (skb != NULL) {
1949 pci_unmap_single(card->pcidev,
1950 NS_PRV_DMA(skb),
1951 skb->len,
1952 PCI_DMA_TODEVICE);
1953 vcc = ATM_SKB(skb)->vcc;
1954 if (vcc && vcc->pop != NULL) {
1955 vcc->pop(vcc, skb);
1956 } else {
1957 dev_kfree_skb_irq(skb);
1958 }
1959 scq->skb[i] = NULL;
1960 }
1961 if (++i == scq->num_entries)
1962 i = 0;
1963 }
1964 scq->tail = scq->base + pos;
1965 spin_unlock_irqrestore(&scq->lock, flags);
1966 }
1967
1968 static void process_rsq(ns_dev * card)
1969 {
1970 ns_rsqe *previous;
1971
1972 if (!ns_rsqe_valid(card->rsq.next))
1973 return;
1974 do {
1975 dequeue_rx(card, card->rsq.next);
1976 ns_rsqe_init(card->rsq.next);
1977 previous = card->rsq.next;
1978 if (card->rsq.next == card->rsq.last)
1979 card->rsq.next = card->rsq.base;
1980 else
1981 card->rsq.next++;
1982 } while (ns_rsqe_valid(card->rsq.next));
1983 writel(PTR_DIFF(previous, card->rsq.base), card->membase + RSQH);
1984 }
1985
1986 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe)
1987 {
1988 u32 vpi, vci;
1989 vc_map *vc;
1990 struct sk_buff *iovb;
1991 struct iovec *iov;
1992 struct atm_vcc *vcc;
1993 struct sk_buff *skb;
1994 unsigned short aal5_len;
1995 int len;
1996 u32 stat;
1997 u32 id;
1998
1999 stat = readl(card->membase + STAT);
2000 card->sbfqc = ns_stat_sfbqc_get(stat);
2001 card->lbfqc = ns_stat_lfbqc_get(stat);
2002
2003 id = le32_to_cpu(rsqe->buffer_handle);
2004 skb = idr_find(&card->idr, id);
2005 if (!skb) {
2006 RXPRINTK(KERN_ERR
2007 "nicstar%d: idr_find() failed!\n", card->index);
2008 return;
2009 }
2010 idr_remove(&card->idr, id);
2011 pci_dma_sync_single_for_cpu(card->pcidev,
2012 NS_PRV_DMA(skb),
2013 (NS_PRV_BUFTYPE(skb) == BUF_SM
2014 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2015 PCI_DMA_FROMDEVICE);
2016 pci_unmap_single(card->pcidev,
2017 NS_PRV_DMA(skb),
2018 (NS_PRV_BUFTYPE(skb) == BUF_SM
2019 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2020 PCI_DMA_FROMDEVICE);
2021 vpi = ns_rsqe_vpi(rsqe);
2022 vci = ns_rsqe_vci(rsqe);
2023 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) {
2024 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2025 card->index, vpi, vci);
2026 recycle_rx_buf(card, skb);
2027 return;
2028 }
2029
2030 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2031 if (!vc->rx) {
2032 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2033 card->index, vpi, vci);
2034 recycle_rx_buf(card, skb);
2035 return;
2036 }
2037
2038 vcc = vc->rx_vcc;
2039
2040 if (vcc->qos.aal == ATM_AAL0) {
2041 struct sk_buff *sb;
2042 unsigned char *cell;
2043 int i;
2044
2045 cell = skb->data;
2046 for (i = ns_rsqe_cellcount(rsqe); i; i--) {
2047 if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL) {
2048 printk
2049 ("nicstar%d: Can't allocate buffers for aal0.\n",
2050 card->index);
2051 atomic_add(i, &vcc->stats->rx_drop);
2052 break;
2053 }
2054 if (!atm_charge(vcc, sb->truesize)) {
2055 RXPRINTK
2056 ("nicstar%d: atm_charge() dropped aal0 packets.\n",
2057 card->index);
2058 atomic_add(i - 1, &vcc->stats->rx_drop); /* already increased by 1 */
2059 dev_kfree_skb_any(sb);
2060 break;
2061 }
2062 /* Rebuild the header */
2063 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2064 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2065 if (i == 1 && ns_rsqe_eopdu(rsqe))
2066 *((u32 *) sb->data) |= 0x00000002;
2067 skb_put(sb, NS_AAL0_HEADER);
2068 memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
2069 skb_put(sb, ATM_CELL_PAYLOAD);
2070 ATM_SKB(sb)->vcc = vcc;
2071 __net_timestamp(sb);
2072 vcc->push(vcc, sb);
2073 atomic_inc(&vcc->stats->rx);
2074 cell += ATM_CELL_PAYLOAD;
2075 }
2076
2077 recycle_rx_buf(card, skb);
2078 return;
2079 }
2080
2081 /* To reach this point, the AAL layer can only be AAL5 */
2082
2083 if ((iovb = vc->rx_iov) == NULL) {
2084 iovb = skb_dequeue(&(card->iovpool.queue));
2085 if (iovb == NULL) { /* No buffers in the queue */
2086 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2087 if (iovb == NULL) {
2088 printk("nicstar%d: Out of iovec buffers.\n",
2089 card->index);
2090 atomic_inc(&vcc->stats->rx_drop);
2091 recycle_rx_buf(card, skb);
2092 return;
2093 }
2094 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2095 } else if (--card->iovpool.count < card->iovnr.min) {
2096 struct sk_buff *new_iovb;
2097 if ((new_iovb =
2098 alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL) {
2099 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2100 skb_queue_tail(&card->iovpool.queue, new_iovb);
2101 card->iovpool.count++;
2102 }
2103 }
2104 vc->rx_iov = iovb;
2105 NS_PRV_IOVCNT(iovb) = 0;
2106 iovb->len = 0;
2107 iovb->data = iovb->head;
2108 skb_reset_tail_pointer(iovb);
2109 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2110 buffer is stored as iovec base, NOT a pointer to the
2111 small or large buffer itself. */
2112 } else if (NS_PRV_IOVCNT(iovb) >= NS_MAX_IOVECS) {
2113 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2114 atomic_inc(&vcc->stats->rx_err);
2115 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2116 NS_MAX_IOVECS);
2117 NS_PRV_IOVCNT(iovb) = 0;
2118 iovb->len = 0;
2119 iovb->data = iovb->head;
2120 skb_reset_tail_pointer(iovb);
2121 }
2122 iov = &((struct iovec *)iovb->data)[NS_PRV_IOVCNT(iovb)++];
2123 iov->iov_base = (void *)skb;
2124 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2125 iovb->len += iov->iov_len;
2126
2127 #ifdef EXTRA_DEBUG
2128 if (NS_PRV_IOVCNT(iovb) == 1) {
2129 if (NS_PRV_BUFTYPE(skb) != BUF_SM) {
2130 printk
2131 ("nicstar%d: Expected a small buffer, and this is not one.\n",
2132 card->index);
2133 which_list(card, skb);
2134 atomic_inc(&vcc->stats->rx_err);
2135 recycle_rx_buf(card, skb);
2136 vc->rx_iov = NULL;
2137 recycle_iov_buf(card, iovb);
2138 return;
2139 }
2140 } else { /* NS_PRV_IOVCNT(iovb) >= 2 */
2141
2142 if (NS_PRV_BUFTYPE(skb) != BUF_LG) {
2143 printk
2144 ("nicstar%d: Expected a large buffer, and this is not one.\n",
2145 card->index);
2146 which_list(card, skb);
2147 atomic_inc(&vcc->stats->rx_err);
2148 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2149 NS_PRV_IOVCNT(iovb));
2150 vc->rx_iov = NULL;
2151 recycle_iov_buf(card, iovb);
2152 return;
2153 }
2154 }
2155 #endif /* EXTRA_DEBUG */
2156
2157 if (ns_rsqe_eopdu(rsqe)) {
2158 /* This works correctly regardless of the endianness of the host */
2159 unsigned char *L1L2 = (unsigned char *)
2160 (skb->data + iov->iov_len - 6);
2161 aal5_len = L1L2[0] << 8 | L1L2[1];
2162 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2163 if (ns_rsqe_crcerr(rsqe) ||
2164 len + 8 > iovb->len || len + (47 + 8) < iovb->len) {
2165 printk("nicstar%d: AAL5 CRC error", card->index);
2166 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2167 printk(" - PDU size mismatch.\n");
2168 else
2169 printk(".\n");
2170 atomic_inc(&vcc->stats->rx_err);
2171 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2172 NS_PRV_IOVCNT(iovb));
2173 vc->rx_iov = NULL;
2174 recycle_iov_buf(card, iovb);
2175 return;
2176 }
2177
2178 /* By this point we (hopefully) have a complete SDU without errors. */
2179
2180 if (NS_PRV_IOVCNT(iovb) == 1) { /* Just a small buffer */
2181 /* skb points to a small buffer */
2182 if (!atm_charge(vcc, skb->truesize)) {
2183 push_rxbufs(card, skb);
2184 atomic_inc(&vcc->stats->rx_drop);
2185 } else {
2186 skb_put(skb, len);
2187 dequeue_sm_buf(card, skb);
2188 #ifdef NS_USE_DESTRUCTORS
2189 skb->destructor = ns_sb_destructor;
2190 #endif /* NS_USE_DESTRUCTORS */
2191 ATM_SKB(skb)->vcc = vcc;
2192 __net_timestamp(skb);
2193 vcc->push(vcc, skb);
2194 atomic_inc(&vcc->stats->rx);
2195 }
2196 } else if (NS_PRV_IOVCNT(iovb) == 2) { /* One small plus one large buffer */
2197 struct sk_buff *sb;
2198
2199 sb = (struct sk_buff *)(iov - 1)->iov_base;
2200 /* skb points to a large buffer */
2201
2202 if (len <= NS_SMBUFSIZE) {
2203 if (!atm_charge(vcc, sb->truesize)) {
2204 push_rxbufs(card, sb);
2205 atomic_inc(&vcc->stats->rx_drop);
2206 } else {
2207 skb_put(sb, len);
2208 dequeue_sm_buf(card, sb);
2209 #ifdef NS_USE_DESTRUCTORS
2210 sb->destructor = ns_sb_destructor;
2211 #endif /* NS_USE_DESTRUCTORS */
2212 ATM_SKB(sb)->vcc = vcc;
2213 __net_timestamp(sb);
2214 vcc->push(vcc, sb);
2215 atomic_inc(&vcc->stats->rx);
2216 }
2217
2218 push_rxbufs(card, skb);
2219
2220 } else { /* len > NS_SMBUFSIZE, the usual case */
2221
2222 if (!atm_charge(vcc, skb->truesize)) {
2223 push_rxbufs(card, skb);
2224 atomic_inc(&vcc->stats->rx_drop);
2225 } else {
2226 dequeue_lg_buf(card, skb);
2227 #ifdef NS_USE_DESTRUCTORS
2228 skb->destructor = ns_lb_destructor;
2229 #endif /* NS_USE_DESTRUCTORS */
2230 skb_push(skb, NS_SMBUFSIZE);
2231 skb_copy_from_linear_data(sb, skb->data,
2232 NS_SMBUFSIZE);
2233 skb_put(skb, len - NS_SMBUFSIZE);
2234 ATM_SKB(skb)->vcc = vcc;
2235 __net_timestamp(skb);
2236 vcc->push(vcc, skb);
2237 atomic_inc(&vcc->stats->rx);
2238 }
2239
2240 push_rxbufs(card, sb);
2241
2242 }
2243
2244 } else { /* Must push a huge buffer */
2245
2246 struct sk_buff *hb, *sb, *lb;
2247 int remaining, tocopy;
2248 int j;
2249
2250 hb = skb_dequeue(&(card->hbpool.queue));
2251 if (hb == NULL) { /* No buffers in the queue */
2252
2253 hb = dev_alloc_skb(NS_HBUFSIZE);
2254 if (hb == NULL) {
2255 printk
2256 ("nicstar%d: Out of huge buffers.\n",
2257 card->index);
2258 atomic_inc(&vcc->stats->rx_drop);
2259 recycle_iovec_rx_bufs(card,
2260 (struct iovec *)
2261 iovb->data,
2262 NS_PRV_IOVCNT(iovb));
2263 vc->rx_iov = NULL;
2264 recycle_iov_buf(card, iovb);
2265 return;
2266 } else if (card->hbpool.count < card->hbnr.min) {
2267 struct sk_buff *new_hb;
2268 if ((new_hb =
2269 dev_alloc_skb(NS_HBUFSIZE)) !=
2270 NULL) {
2271 skb_queue_tail(&card->hbpool.
2272 queue, new_hb);
2273 card->hbpool.count++;
2274 }
2275 }
2276 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2277 } else if (--card->hbpool.count < card->hbnr.min) {
2278 struct sk_buff *new_hb;
2279 if ((new_hb =
2280 dev_alloc_skb(NS_HBUFSIZE)) != NULL) {
2281 NS_PRV_BUFTYPE(new_hb) = BUF_NONE;
2282 skb_queue_tail(&card->hbpool.queue,
2283 new_hb);
2284 card->hbpool.count++;
2285 }
2286 if (card->hbpool.count < card->hbnr.min) {
2287 if ((new_hb =
2288 dev_alloc_skb(NS_HBUFSIZE)) !=
2289 NULL) {
2290 NS_PRV_BUFTYPE(new_hb) =
2291 BUF_NONE;
2292 skb_queue_tail(&card->hbpool.
2293 queue, new_hb);
2294 card->hbpool.count++;
2295 }
2296 }
2297 }
2298
2299 iov = (struct iovec *)iovb->data;
2300
2301 if (!atm_charge(vcc, hb->truesize)) {
2302 recycle_iovec_rx_bufs(card, iov,
2303 NS_PRV_IOVCNT(iovb));
2304 if (card->hbpool.count < card->hbnr.max) {
2305 skb_queue_tail(&card->hbpool.queue, hb);
2306 card->hbpool.count++;
2307 } else
2308 dev_kfree_skb_any(hb);
2309 atomic_inc(&vcc->stats->rx_drop);
2310 } else {
2311 /* Copy the small buffer to the huge buffer */
2312 sb = (struct sk_buff *)iov->iov_base;
2313 skb_copy_from_linear_data(sb, hb->data,
2314 iov->iov_len);
2315 skb_put(hb, iov->iov_len);
2316 remaining = len - iov->iov_len;
2317 iov++;
2318 /* Free the small buffer */
2319 push_rxbufs(card, sb);
2320
2321 /* Copy all large buffers to the huge buffer and free them */
2322 for (j = 1; j < NS_PRV_IOVCNT(iovb); j++) {
2323 lb = (struct sk_buff *)iov->iov_base;
2324 tocopy =
2325 min_t(int, remaining, iov->iov_len);
2326 skb_copy_from_linear_data(lb,
2327 skb_tail_pointer
2328 (hb), tocopy);
2329 skb_put(hb, tocopy);
2330 iov++;
2331 remaining -= tocopy;
2332 push_rxbufs(card, lb);
2333 }
2334 #ifdef EXTRA_DEBUG
2335 if (remaining != 0 || hb->len != len)
2336 printk
2337 ("nicstar%d: Huge buffer len mismatch.\n",
2338 card->index);
2339 #endif /* EXTRA_DEBUG */
2340 ATM_SKB(hb)->vcc = vcc;
2341 #ifdef NS_USE_DESTRUCTORS
2342 hb->destructor = ns_hb_destructor;
2343 #endif /* NS_USE_DESTRUCTORS */
2344 __net_timestamp(hb);
2345 vcc->push(vcc, hb);
2346 atomic_inc(&vcc->stats->rx);
2347 }
2348 }
2349
2350 vc->rx_iov = NULL;
2351 recycle_iov_buf(card, iovb);
2352 }
2353
2354 }
2355
2356 #ifdef NS_USE_DESTRUCTORS
2357
2358 static void ns_sb_destructor(struct sk_buff *sb)
2359 {
2360 ns_dev *card;
2361 u32 stat;
2362
2363 card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
2364 stat = readl(card->membase + STAT);
2365 card->sbfqc = ns_stat_sfbqc_get(stat);
2366 card->lbfqc = ns_stat_lfbqc_get(stat);
2367
2368 do {
2369 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2370 if (sb == NULL)
2371 break;
2372 NS_PRV_BUFTYPE(sb) = BUF_SM;
2373 skb_queue_tail(&card->sbpool.queue, sb);
2374 skb_reserve(sb, NS_AAL0_HEADER);
2375 push_rxbufs(card, sb);
2376 } while (card->sbfqc < card->sbnr.min);
2377 }
2378
2379 static void ns_lb_destructor(struct sk_buff *lb)
2380 {
2381 ns_dev *card;
2382 u32 stat;
2383
2384 card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
2385 stat = readl(card->membase + STAT);
2386 card->sbfqc = ns_stat_sfbqc_get(stat);
2387 card->lbfqc = ns_stat_lfbqc_get(stat);
2388
2389 do {
2390 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2391 if (lb == NULL)
2392 break;
2393 NS_PRV_BUFTYPE(lb) = BUF_LG;
2394 skb_queue_tail(&card->lbpool.queue, lb);
2395 skb_reserve(lb, NS_SMBUFSIZE);
2396 push_rxbufs(card, lb);
2397 } while (card->lbfqc < card->lbnr.min);
2398 }
2399
2400 static void ns_hb_destructor(struct sk_buff *hb)
2401 {
2402 ns_dev *card;
2403
2404 card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
2405
2406 while (card->hbpool.count < card->hbnr.init) {
2407 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2408 if (hb == NULL)
2409 break;
2410 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2411 skb_queue_tail(&card->hbpool.queue, hb);
2412 card->hbpool.count++;
2413 }
2414 }
2415
2416 #endif /* NS_USE_DESTRUCTORS */
2417
2418 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb)
2419 {
2420 if (unlikely(NS_PRV_BUFTYPE(skb) == BUF_NONE)) {
2421 printk("nicstar%d: What kind of rx buffer is this?\n",
2422 card->index);
2423 dev_kfree_skb_any(skb);
2424 } else
2425 push_rxbufs(card, skb);
2426 }
2427
2428 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count)
2429 {
2430 while (count-- > 0)
2431 recycle_rx_buf(card, (struct sk_buff *)(iov++)->iov_base);
2432 }
2433
2434 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb)
2435 {
2436 if (card->iovpool.count < card->iovnr.max) {
2437 skb_queue_tail(&card->iovpool.queue, iovb);
2438 card->iovpool.count++;
2439 } else
2440 dev_kfree_skb_any(iovb);
2441 }
2442
2443 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb)
2444 {
2445 skb_unlink(sb, &card->sbpool.queue);
2446 #ifdef NS_USE_DESTRUCTORS
2447 if (card->sbfqc < card->sbnr.min)
2448 #else
2449 if (card->sbfqc < card->sbnr.init) {
2450 struct sk_buff *new_sb;
2451 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2452 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2453 skb_queue_tail(&card->sbpool.queue, new_sb);
2454 skb_reserve(new_sb, NS_AAL0_HEADER);
2455 push_rxbufs(card, new_sb);
2456 }
2457 }
2458 if (card->sbfqc < card->sbnr.init)
2459 #endif /* NS_USE_DESTRUCTORS */
2460 {
2461 struct sk_buff *new_sb;
2462 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2463 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2464 skb_queue_tail(&card->sbpool.queue, new_sb);
2465 skb_reserve(new_sb, NS_AAL0_HEADER);
2466 push_rxbufs(card, new_sb);
2467 }
2468 }
2469 }
2470
2471 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb)
2472 {
2473 skb_unlink(lb, &card->lbpool.queue);
2474 #ifdef NS_USE_DESTRUCTORS
2475 if (card->lbfqc < card->lbnr.min)
2476 #else
2477 if (card->lbfqc < card->lbnr.init) {
2478 struct sk_buff *new_lb;
2479 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2480 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2481 skb_queue_tail(&card->lbpool.queue, new_lb);
2482 skb_reserve(new_lb, NS_SMBUFSIZE);
2483 push_rxbufs(card, new_lb);
2484 }
2485 }
2486 if (card->lbfqc < card->lbnr.init)
2487 #endif /* NS_USE_DESTRUCTORS */
2488 {
2489 struct sk_buff *new_lb;
2490 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2491 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2492 skb_queue_tail(&card->lbpool.queue, new_lb);
2493 skb_reserve(new_lb, NS_SMBUFSIZE);
2494 push_rxbufs(card, new_lb);
2495 }
2496 }
2497 }
2498
2499 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2500 {
2501 u32 stat;
2502 ns_dev *card;
2503 int left;
2504
2505 left = (int)*pos;
2506 card = (ns_dev *) dev->dev_data;
2507 stat = readl(card->membase + STAT);
2508 if (!left--)
2509 return sprintf(page, "Pool count min init max \n");
2510 if (!left--)
2511 return sprintf(page, "Small %5d %5d %5d %5d \n",
2512 ns_stat_sfbqc_get(stat), card->sbnr.min,
2513 card->sbnr.init, card->sbnr.max);
2514 if (!left--)
2515 return sprintf(page, "Large %5d %5d %5d %5d \n",
2516 ns_stat_lfbqc_get(stat), card->lbnr.min,
2517 card->lbnr.init, card->lbnr.max);
2518 if (!left--)
2519 return sprintf(page, "Huge %5d %5d %5d %5d \n",
2520 card->hbpool.count, card->hbnr.min,
2521 card->hbnr.init, card->hbnr.max);
2522 if (!left--)
2523 return sprintf(page, "Iovec %5d %5d %5d %5d \n",
2524 card->iovpool.count, card->iovnr.min,
2525 card->iovnr.init, card->iovnr.max);
2526 if (!left--) {
2527 int retval;
2528 retval =
2529 sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2530 card->intcnt = 0;
2531 return retval;
2532 }
2533 #if 0
2534 /* Dump 25.6 Mbps PHY registers */
2535 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2536 here just in case it's needed for debugging. */
2537 if (card->max_pcr == ATM_25_PCR && !left--) {
2538 u32 phy_regs[4];
2539 u32 i;
2540
2541 for (i = 0; i < 4; i++) {
2542 while (CMD_BUSY(card)) ;
2543 writel(NS_CMD_READ_UTILITY | 0x00000200 | i,
2544 card->membase + CMD);
2545 while (CMD_BUSY(card)) ;
2546 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2547 }
2548
2549 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2550 phy_regs[0], phy_regs[1], phy_regs[2],
2551 phy_regs[3]);
2552 }
2553 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2554 #if 0
2555 /* Dump TST */
2556 if (left-- < NS_TST_NUM_ENTRIES) {
2557 if (card->tste2vc[left + 1] == NULL)
2558 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2559 else
2560 return sprintf(page, "%5d - %d %d \n", left + 1,
2561 card->tste2vc[left + 1]->tx_vcc->vpi,
2562 card->tste2vc[left + 1]->tx_vcc->vci);
2563 }
2564 #endif /* 0 */
2565 return 0;
2566 }
2567
2568 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg)
2569 {
2570 ns_dev *card;
2571 pool_levels pl;
2572 long btype;
2573 unsigned long flags;
2574
2575 card = dev->dev_data;
2576 switch (cmd) {
2577 case NS_GETPSTAT:
2578 if (get_user
2579 (pl.buftype, &((pool_levels __user *) arg)->buftype))
2580 return -EFAULT;
2581 switch (pl.buftype) {
2582 case NS_BUFTYPE_SMALL:
2583 pl.count =
2584 ns_stat_sfbqc_get(readl(card->membase + STAT));
2585 pl.level.min = card->sbnr.min;
2586 pl.level.init = card->sbnr.init;
2587 pl.level.max = card->sbnr.max;
2588 break;
2589
2590 case NS_BUFTYPE_LARGE:
2591 pl.count =
2592 ns_stat_lfbqc_get(readl(card->membase + STAT));
2593 pl.level.min = card->lbnr.min;
2594 pl.level.init = card->lbnr.init;
2595 pl.level.max = card->lbnr.max;
2596 break;
2597
2598 case NS_BUFTYPE_HUGE:
2599 pl.count = card->hbpool.count;
2600 pl.level.min = card->hbnr.min;
2601 pl.level.init = card->hbnr.init;
2602 pl.level.max = card->hbnr.max;
2603 break;
2604
2605 case NS_BUFTYPE_IOVEC:
2606 pl.count = card->iovpool.count;
2607 pl.level.min = card->iovnr.min;
2608 pl.level.init = card->iovnr.init;
2609 pl.level.max = card->iovnr.max;
2610 break;
2611
2612 default:
2613 return -ENOIOCTLCMD;
2614
2615 }
2616 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2617 return (sizeof(pl));
2618 else
2619 return -EFAULT;
2620
2621 case NS_SETBUFLEV:
2622 if (!capable(CAP_NET_ADMIN))
2623 return -EPERM;
2624 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2625 return -EFAULT;
2626 if (pl.level.min >= pl.level.init
2627 || pl.level.init >= pl.level.max)
2628 return -EINVAL;
2629 if (pl.level.min == 0)
2630 return -EINVAL;
2631 switch (pl.buftype) {
2632 case NS_BUFTYPE_SMALL:
2633 if (pl.level.max > TOP_SB)
2634 return -EINVAL;
2635 card->sbnr.min = pl.level.min;
2636 card->sbnr.init = pl.level.init;
2637 card->sbnr.max = pl.level.max;
2638 break;
2639
2640 case NS_BUFTYPE_LARGE:
2641 if (pl.level.max > TOP_LB)
2642 return -EINVAL;
2643 card->lbnr.min = pl.level.min;
2644 card->lbnr.init = pl.level.init;
2645 card->lbnr.max = pl.level.max;
2646 break;
2647
2648 case NS_BUFTYPE_HUGE:
2649 if (pl.level.max > TOP_HB)
2650 return -EINVAL;
2651 card->hbnr.min = pl.level.min;
2652 card->hbnr.init = pl.level.init;
2653 card->hbnr.max = pl.level.max;
2654 break;
2655
2656 case NS_BUFTYPE_IOVEC:
2657 if (pl.level.max > TOP_IOVB)
2658 return -EINVAL;
2659 card->iovnr.min = pl.level.min;
2660 card->iovnr.init = pl.level.init;
2661 card->iovnr.max = pl.level.max;
2662 break;
2663
2664 default:
2665 return -EINVAL;
2666
2667 }
2668 return 0;
2669
2670 case NS_ADJBUFLEV:
2671 if (!capable(CAP_NET_ADMIN))
2672 return -EPERM;
2673 btype = (long)arg; /* a long is the same size as a pointer or bigger */
2674 switch (btype) {
2675 case NS_BUFTYPE_SMALL:
2676 while (card->sbfqc < card->sbnr.init) {
2677 struct sk_buff *sb;
2678
2679 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2680 if (sb == NULL)
2681 return -ENOMEM;
2682 NS_PRV_BUFTYPE(sb) = BUF_SM;
2683 skb_queue_tail(&card->sbpool.queue, sb);
2684 skb_reserve(sb, NS_AAL0_HEADER);
2685 push_rxbufs(card, sb);
2686 }
2687 break;
2688
2689 case NS_BUFTYPE_LARGE:
2690 while (card->lbfqc < card->lbnr.init) {
2691 struct sk_buff *lb;
2692
2693 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2694 if (lb == NULL)
2695 return -ENOMEM;
2696 NS_PRV_BUFTYPE(lb) = BUF_LG;
2697 skb_queue_tail(&card->lbpool.queue, lb);
2698 skb_reserve(lb, NS_SMBUFSIZE);
2699 push_rxbufs(card, lb);
2700 }
2701 break;
2702
2703 case NS_BUFTYPE_HUGE:
2704 while (card->hbpool.count > card->hbnr.init) {
2705 struct sk_buff *hb;
2706
2707 spin_lock_irqsave(&card->int_lock, flags);
2708 hb = skb_dequeue(&card->hbpool.queue);
2709 card->hbpool.count--;
2710 spin_unlock_irqrestore(&card->int_lock, flags);
2711 if (hb == NULL)
2712 printk
2713 ("nicstar%d: huge buffer count inconsistent.\n",
2714 card->index);
2715 else
2716 dev_kfree_skb_any(hb);
2717
2718 }
2719 while (card->hbpool.count < card->hbnr.init) {
2720 struct sk_buff *hb;
2721
2722 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2723 if (hb == NULL)
2724 return -ENOMEM;
2725 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2726 spin_lock_irqsave(&card->int_lock, flags);
2727 skb_queue_tail(&card->hbpool.queue, hb);
2728 card->hbpool.count++;
2729 spin_unlock_irqrestore(&card->int_lock, flags);
2730 }
2731 break;
2732
2733 case NS_BUFTYPE_IOVEC:
2734 while (card->iovpool.count > card->iovnr.init) {
2735 struct sk_buff *iovb;
2736
2737 spin_lock_irqsave(&card->int_lock, flags);
2738 iovb = skb_dequeue(&card->iovpool.queue);
2739 card->iovpool.count--;
2740 spin_unlock_irqrestore(&card->int_lock, flags);
2741 if (iovb == NULL)
2742 printk
2743 ("nicstar%d: iovec buffer count inconsistent.\n",
2744 card->index);
2745 else
2746 dev_kfree_skb_any(iovb);
2747
2748 }
2749 while (card->iovpool.count < card->iovnr.init) {
2750 struct sk_buff *iovb;
2751
2752 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2753 if (iovb == NULL)
2754 return -ENOMEM;
2755 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2756 spin_lock_irqsave(&card->int_lock, flags);
2757 skb_queue_tail(&card->iovpool.queue, iovb);
2758 card->iovpool.count++;
2759 spin_unlock_irqrestore(&card->int_lock, flags);
2760 }
2761 break;
2762
2763 default:
2764 return -EINVAL;
2765
2766 }
2767 return 0;
2768
2769 default:
2770 if (dev->phy && dev->phy->ioctl) {
2771 return dev->phy->ioctl(dev, cmd, arg);
2772 } else {
2773 printk("nicstar%d: %s == NULL \n", card->index,
2774 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2775 return -ENOIOCTLCMD;
2776 }
2777 }
2778 }
2779
2780 #ifdef EXTRA_DEBUG
2781 static void which_list(ns_dev * card, struct sk_buff *skb)
2782 {
2783 printk("skb buf_type: 0x%08x\n", NS_PRV_BUFTYPE(skb));
2784 }
2785 #endif /* EXTRA_DEBUG */
2786
2787 static void ns_poll(unsigned long arg)
2788 {
2789 int i;
2790 ns_dev *card;
2791 unsigned long flags;
2792 u32 stat_r, stat_w;
2793
2794 PRINTK("nicstar: Entering ns_poll().\n");
2795 for (i = 0; i < num_cards; i++) {
2796 card = cards[i];
2797 if (spin_is_locked(&card->int_lock)) {
2798 /* Probably it isn't worth spinning */
2799 continue;
2800 }
2801 spin_lock_irqsave(&card->int_lock, flags);
2802
2803 stat_w = 0;
2804 stat_r = readl(card->membase + STAT);
2805 if (stat_r & NS_STAT_TSIF)
2806 stat_w |= NS_STAT_TSIF;
2807 if (stat_r & NS_STAT_EOPDU)
2808 stat_w |= NS_STAT_EOPDU;
2809
2810 process_tsq(card);
2811 process_rsq(card);
2812
2813 writel(stat_w, card->membase + STAT);
2814 spin_unlock_irqrestore(&card->int_lock, flags);
2815 }
2816 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
2817 PRINTK("nicstar: Leaving ns_poll().\n");
2818 }
2819
2820 static int ns_parse_mac(char *mac, unsigned char *esi)
2821 {
2822 int i, j;
2823 short byte1, byte0;
2824
2825 if (mac == NULL || esi == NULL)
2826 return -1;
2827 j = 0;
2828 for (i = 0; i < 6; i++) {
2829 if ((byte1 = ns_h2i(mac[j++])) < 0)
2830 return -1;
2831 if ((byte0 = ns_h2i(mac[j++])) < 0)
2832 return -1;
2833 esi[i] = (unsigned char)(byte1 * 16 + byte0);
2834 if (i < 5) {
2835 if (mac[j++] != ':')
2836 return -1;
2837 }
2838 }
2839 return 0;
2840 }
2841
2842 static short ns_h2i(char c)
2843 {
2844 if (c >= '0' && c <= '9')
2845 return (short)(c - '0');
2846 if (c >= 'A' && c <= 'F')
2847 return (short)(c - 'A' + 10);
2848 if (c >= 'a' && c <= 'f')
2849 return (short)(c - 'a' + 10);
2850 return -1;
2851 }
2852
2853 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
2854 unsigned long addr)
2855 {
2856 ns_dev *card;
2857 unsigned long flags;
2858
2859 card = dev->dev_data;
2860 spin_lock_irqsave(&card->res_lock, flags);
2861 while (CMD_BUSY(card)) ;
2862 writel((u32) value, card->membase + DR0);
2863 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
2864 card->membase + CMD);
2865 spin_unlock_irqrestore(&card->res_lock, flags);
2866 }
2867
2868 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
2869 {
2870 ns_dev *card;
2871 unsigned long flags;
2872 u32 data;
2873
2874 card = dev->dev_data;
2875 spin_lock_irqsave(&card->res_lock, flags);
2876 while (CMD_BUSY(card)) ;
2877 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
2878 card->membase + CMD);
2879 while (CMD_BUSY(card)) ;
2880 data = readl(card->membase + DR0) & 0x000000FF;
2881 spin_unlock_irqrestore(&card->res_lock, flags);
2882 return (unsigned char)data;
2883 }
2884
2885 module_init(nicstar_init);
2886 module_exit(nicstar_cleanup);
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