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1 /*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/device.h>
14 #include <linux/slab.h>
15 #include <linux/export.h>
16 #include <linux/mutex.h>
17 #include <linux/err.h>
18 #include <linux/of.h>
19 #include <linux/rbtree.h>
20 #include <linux/sched.h>
21
22 #define CREATE_TRACE_POINTS
23 #include "trace.h"
24
25 #include "internal.h"
26
27 /*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33 #undef LOG_DEVICE
34
35 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
36 unsigned int mask, unsigned int val,
37 bool *change);
38
39 static int _regmap_bus_reg_read(void *context, unsigned int reg,
40 unsigned int *val);
41 static int _regmap_bus_read(void *context, unsigned int reg,
42 unsigned int *val);
43 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
44 unsigned int val);
45 static int _regmap_bus_reg_write(void *context, unsigned int reg,
46 unsigned int val);
47 static int _regmap_bus_raw_write(void *context, unsigned int reg,
48 unsigned int val);
49
50 bool regmap_reg_in_ranges(unsigned int reg,
51 const struct regmap_range *ranges,
52 unsigned int nranges)
53 {
54 const struct regmap_range *r;
55 int i;
56
57 for (i = 0, r = ranges; i < nranges; i++, r++)
58 if (regmap_reg_in_range(reg, r))
59 return true;
60 return false;
61 }
62 EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
63
64 bool regmap_check_range_table(struct regmap *map, unsigned int reg,
65 const struct regmap_access_table *table)
66 {
67 /* Check "no ranges" first */
68 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
69 return false;
70
71 /* In case zero "yes ranges" are supplied, any reg is OK */
72 if (!table->n_yes_ranges)
73 return true;
74
75 return regmap_reg_in_ranges(reg, table->yes_ranges,
76 table->n_yes_ranges);
77 }
78 EXPORT_SYMBOL_GPL(regmap_check_range_table);
79
80 bool regmap_writeable(struct regmap *map, unsigned int reg)
81 {
82 if (map->max_register && reg > map->max_register)
83 return false;
84
85 if (map->writeable_reg)
86 return map->writeable_reg(map->dev, reg);
87
88 if (map->wr_table)
89 return regmap_check_range_table(map, reg, map->wr_table);
90
91 return true;
92 }
93
94 bool regmap_readable(struct regmap *map, unsigned int reg)
95 {
96 if (map->max_register && reg > map->max_register)
97 return false;
98
99 if (map->format.format_write)
100 return false;
101
102 if (map->readable_reg)
103 return map->readable_reg(map->dev, reg);
104
105 if (map->rd_table)
106 return regmap_check_range_table(map, reg, map->rd_table);
107
108 return true;
109 }
110
111 bool regmap_volatile(struct regmap *map, unsigned int reg)
112 {
113 if (!map->format.format_write && !regmap_readable(map, reg))
114 return false;
115
116 if (map->volatile_reg)
117 return map->volatile_reg(map->dev, reg);
118
119 if (map->volatile_table)
120 return regmap_check_range_table(map, reg, map->volatile_table);
121
122 if (map->cache_ops)
123 return false;
124 else
125 return true;
126 }
127
128 bool regmap_precious(struct regmap *map, unsigned int reg)
129 {
130 if (!regmap_readable(map, reg))
131 return false;
132
133 if (map->precious_reg)
134 return map->precious_reg(map->dev, reg);
135
136 if (map->precious_table)
137 return regmap_check_range_table(map, reg, map->precious_table);
138
139 return false;
140 }
141
142 static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
143 size_t num)
144 {
145 unsigned int i;
146
147 for (i = 0; i < num; i++)
148 if (!regmap_volatile(map, reg + i))
149 return false;
150
151 return true;
152 }
153
154 static void regmap_format_2_6_write(struct regmap *map,
155 unsigned int reg, unsigned int val)
156 {
157 u8 *out = map->work_buf;
158
159 *out = (reg << 6) | val;
160 }
161
162 static void regmap_format_4_12_write(struct regmap *map,
163 unsigned int reg, unsigned int val)
164 {
165 __be16 *out = map->work_buf;
166 *out = cpu_to_be16((reg << 12) | val);
167 }
168
169 static void regmap_format_7_9_write(struct regmap *map,
170 unsigned int reg, unsigned int val)
171 {
172 __be16 *out = map->work_buf;
173 *out = cpu_to_be16((reg << 9) | val);
174 }
175
176 static void regmap_format_10_14_write(struct regmap *map,
177 unsigned int reg, unsigned int val)
178 {
179 u8 *out = map->work_buf;
180
181 out[2] = val;
182 out[1] = (val >> 8) | (reg << 6);
183 out[0] = reg >> 2;
184 }
185
186 static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
187 {
188 u8 *b = buf;
189
190 b[0] = val << shift;
191 }
192
193 static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
194 {
195 __be16 *b = buf;
196
197 b[0] = cpu_to_be16(val << shift);
198 }
199
200 static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
201 {
202 __le16 *b = buf;
203
204 b[0] = cpu_to_le16(val << shift);
205 }
206
207 static void regmap_format_16_native(void *buf, unsigned int val,
208 unsigned int shift)
209 {
210 *(u16 *)buf = val << shift;
211 }
212
213 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
214 {
215 u8 *b = buf;
216
217 val <<= shift;
218
219 b[0] = val >> 16;
220 b[1] = val >> 8;
221 b[2] = val;
222 }
223
224 static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
225 {
226 __be32 *b = buf;
227
228 b[0] = cpu_to_be32(val << shift);
229 }
230
231 static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
232 {
233 __le32 *b = buf;
234
235 b[0] = cpu_to_le32(val << shift);
236 }
237
238 static void regmap_format_32_native(void *buf, unsigned int val,
239 unsigned int shift)
240 {
241 *(u32 *)buf = val << shift;
242 }
243
244 static void regmap_parse_inplace_noop(void *buf)
245 {
246 }
247
248 static unsigned int regmap_parse_8(const void *buf)
249 {
250 const u8 *b = buf;
251
252 return b[0];
253 }
254
255 static unsigned int regmap_parse_16_be(const void *buf)
256 {
257 const __be16 *b = buf;
258
259 return be16_to_cpu(b[0]);
260 }
261
262 static unsigned int regmap_parse_16_le(const void *buf)
263 {
264 const __le16 *b = buf;
265
266 return le16_to_cpu(b[0]);
267 }
268
269 static void regmap_parse_16_be_inplace(void *buf)
270 {
271 __be16 *b = buf;
272
273 b[0] = be16_to_cpu(b[0]);
274 }
275
276 static void regmap_parse_16_le_inplace(void *buf)
277 {
278 __le16 *b = buf;
279
280 b[0] = le16_to_cpu(b[0]);
281 }
282
283 static unsigned int regmap_parse_16_native(const void *buf)
284 {
285 return *(u16 *)buf;
286 }
287
288 static unsigned int regmap_parse_24(const void *buf)
289 {
290 const u8 *b = buf;
291 unsigned int ret = b[2];
292 ret |= ((unsigned int)b[1]) << 8;
293 ret |= ((unsigned int)b[0]) << 16;
294
295 return ret;
296 }
297
298 static unsigned int regmap_parse_32_be(const void *buf)
299 {
300 const __be32 *b = buf;
301
302 return be32_to_cpu(b[0]);
303 }
304
305 static unsigned int regmap_parse_32_le(const void *buf)
306 {
307 const __le32 *b = buf;
308
309 return le32_to_cpu(b[0]);
310 }
311
312 static void regmap_parse_32_be_inplace(void *buf)
313 {
314 __be32 *b = buf;
315
316 b[0] = be32_to_cpu(b[0]);
317 }
318
319 static void regmap_parse_32_le_inplace(void *buf)
320 {
321 __le32 *b = buf;
322
323 b[0] = le32_to_cpu(b[0]);
324 }
325
326 static unsigned int regmap_parse_32_native(const void *buf)
327 {
328 return *(u32 *)buf;
329 }
330
331 static void regmap_lock_mutex(void *__map)
332 {
333 struct regmap *map = __map;
334 mutex_lock(&map->mutex);
335 }
336
337 static void regmap_unlock_mutex(void *__map)
338 {
339 struct regmap *map = __map;
340 mutex_unlock(&map->mutex);
341 }
342
343 static void regmap_lock_spinlock(void *__map)
344 __acquires(&map->spinlock)
345 {
346 struct regmap *map = __map;
347 unsigned long flags;
348
349 spin_lock_irqsave(&map->spinlock, flags);
350 map->spinlock_flags = flags;
351 }
352
353 static void regmap_unlock_spinlock(void *__map)
354 __releases(&map->spinlock)
355 {
356 struct regmap *map = __map;
357 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
358 }
359
360 static void dev_get_regmap_release(struct device *dev, void *res)
361 {
362 /*
363 * We don't actually have anything to do here; the goal here
364 * is not to manage the regmap but to provide a simple way to
365 * get the regmap back given a struct device.
366 */
367 }
368
369 static bool _regmap_range_add(struct regmap *map,
370 struct regmap_range_node *data)
371 {
372 struct rb_root *root = &map->range_tree;
373 struct rb_node **new = &(root->rb_node), *parent = NULL;
374
375 while (*new) {
376 struct regmap_range_node *this =
377 container_of(*new, struct regmap_range_node, node);
378
379 parent = *new;
380 if (data->range_max < this->range_min)
381 new = &((*new)->rb_left);
382 else if (data->range_min > this->range_max)
383 new = &((*new)->rb_right);
384 else
385 return false;
386 }
387
388 rb_link_node(&data->node, parent, new);
389 rb_insert_color(&data->node, root);
390
391 return true;
392 }
393
394 static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
395 unsigned int reg)
396 {
397 struct rb_node *node = map->range_tree.rb_node;
398
399 while (node) {
400 struct regmap_range_node *this =
401 container_of(node, struct regmap_range_node, node);
402
403 if (reg < this->range_min)
404 node = node->rb_left;
405 else if (reg > this->range_max)
406 node = node->rb_right;
407 else
408 return this;
409 }
410
411 return NULL;
412 }
413
414 static void regmap_range_exit(struct regmap *map)
415 {
416 struct rb_node *next;
417 struct regmap_range_node *range_node;
418
419 next = rb_first(&map->range_tree);
420 while (next) {
421 range_node = rb_entry(next, struct regmap_range_node, node);
422 next = rb_next(&range_node->node);
423 rb_erase(&range_node->node, &map->range_tree);
424 kfree(range_node);
425 }
426
427 kfree(map->selector_work_buf);
428 }
429
430 int regmap_attach_dev(struct device *dev, struct regmap *map,
431 const struct regmap_config *config)
432 {
433 struct regmap **m;
434
435 map->dev = dev;
436
437 regmap_debugfs_init(map, config->name);
438
439 /* Add a devres resource for dev_get_regmap() */
440 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
441 if (!m) {
442 regmap_debugfs_exit(map);
443 return -ENOMEM;
444 }
445 *m = map;
446 devres_add(dev, m);
447
448 return 0;
449 }
450 EXPORT_SYMBOL_GPL(regmap_attach_dev);
451
452 static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
453 const struct regmap_config *config)
454 {
455 enum regmap_endian endian;
456
457 /* Retrieve the endianness specification from the regmap config */
458 endian = config->reg_format_endian;
459
460 /* If the regmap config specified a non-default value, use that */
461 if (endian != REGMAP_ENDIAN_DEFAULT)
462 return endian;
463
464 /* Retrieve the endianness specification from the bus config */
465 if (bus && bus->reg_format_endian_default)
466 endian = bus->reg_format_endian_default;
467
468 /* If the bus specified a non-default value, use that */
469 if (endian != REGMAP_ENDIAN_DEFAULT)
470 return endian;
471
472 /* Use this if no other value was found */
473 return REGMAP_ENDIAN_BIG;
474 }
475
476 enum regmap_endian regmap_get_val_endian(struct device *dev,
477 const struct regmap_bus *bus,
478 const struct regmap_config *config)
479 {
480 struct device_node *np;
481 enum regmap_endian endian;
482
483 /* Retrieve the endianness specification from the regmap config */
484 endian = config->val_format_endian;
485
486 /* If the regmap config specified a non-default value, use that */
487 if (endian != REGMAP_ENDIAN_DEFAULT)
488 return endian;
489
490 /* If the dev and dev->of_node exist try to get endianness from DT */
491 if (dev && dev->of_node) {
492 np = dev->of_node;
493
494 /* Parse the device's DT node for an endianness specification */
495 if (of_property_read_bool(np, "big-endian"))
496 endian = REGMAP_ENDIAN_BIG;
497 else if (of_property_read_bool(np, "little-endian"))
498 endian = REGMAP_ENDIAN_LITTLE;
499
500 /* If the endianness was specified in DT, use that */
501 if (endian != REGMAP_ENDIAN_DEFAULT)
502 return endian;
503 }
504
505 /* Retrieve the endianness specification from the bus config */
506 if (bus && bus->val_format_endian_default)
507 endian = bus->val_format_endian_default;
508
509 /* If the bus specified a non-default value, use that */
510 if (endian != REGMAP_ENDIAN_DEFAULT)
511 return endian;
512
513 /* Use this if no other value was found */
514 return REGMAP_ENDIAN_BIG;
515 }
516 EXPORT_SYMBOL_GPL(regmap_get_val_endian);
517
518 /**
519 * regmap_init(): Initialise register map
520 *
521 * @dev: Device that will be interacted with
522 * @bus: Bus-specific callbacks to use with device
523 * @bus_context: Data passed to bus-specific callbacks
524 * @config: Configuration for register map
525 *
526 * The return value will be an ERR_PTR() on error or a valid pointer to
527 * a struct regmap. This function should generally not be called
528 * directly, it should be called by bus-specific init functions.
529 */
530 struct regmap *regmap_init(struct device *dev,
531 const struct regmap_bus *bus,
532 void *bus_context,
533 const struct regmap_config *config)
534 {
535 struct regmap *map;
536 int ret = -EINVAL;
537 enum regmap_endian reg_endian, val_endian;
538 int i, j;
539
540 if (!config)
541 goto err;
542
543 map = kzalloc(sizeof(*map), GFP_KERNEL);
544 if (map == NULL) {
545 ret = -ENOMEM;
546 goto err;
547 }
548
549 if (config->lock && config->unlock) {
550 map->lock = config->lock;
551 map->unlock = config->unlock;
552 map->lock_arg = config->lock_arg;
553 } else {
554 if ((bus && bus->fast_io) ||
555 config->fast_io) {
556 spin_lock_init(&map->spinlock);
557 map->lock = regmap_lock_spinlock;
558 map->unlock = regmap_unlock_spinlock;
559 } else {
560 mutex_init(&map->mutex);
561 map->lock = regmap_lock_mutex;
562 map->unlock = regmap_unlock_mutex;
563 }
564 map->lock_arg = map;
565 }
566 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
567 map->format.pad_bytes = config->pad_bits / 8;
568 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
569 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
570 config->val_bits + config->pad_bits, 8);
571 map->reg_shift = config->pad_bits % 8;
572 if (config->reg_stride)
573 map->reg_stride = config->reg_stride;
574 else
575 map->reg_stride = 1;
576 map->use_single_rw = config->use_single_rw;
577 map->can_multi_write = config->can_multi_write;
578 map->dev = dev;
579 map->bus = bus;
580 map->bus_context = bus_context;
581 map->max_register = config->max_register;
582 map->wr_table = config->wr_table;
583 map->rd_table = config->rd_table;
584 map->volatile_table = config->volatile_table;
585 map->precious_table = config->precious_table;
586 map->writeable_reg = config->writeable_reg;
587 map->readable_reg = config->readable_reg;
588 map->volatile_reg = config->volatile_reg;
589 map->precious_reg = config->precious_reg;
590 map->cache_type = config->cache_type;
591 map->name = config->name;
592
593 spin_lock_init(&map->async_lock);
594 INIT_LIST_HEAD(&map->async_list);
595 INIT_LIST_HEAD(&map->async_free);
596 init_waitqueue_head(&map->async_waitq);
597
598 if (config->read_flag_mask || config->write_flag_mask) {
599 map->read_flag_mask = config->read_flag_mask;
600 map->write_flag_mask = config->write_flag_mask;
601 } else if (bus) {
602 map->read_flag_mask = bus->read_flag_mask;
603 }
604
605 if (!bus) {
606 map->reg_read = config->reg_read;
607 map->reg_write = config->reg_write;
608
609 map->defer_caching = false;
610 goto skip_format_initialization;
611 } else if (!bus->read || !bus->write) {
612 map->reg_read = _regmap_bus_reg_read;
613 map->reg_write = _regmap_bus_reg_write;
614
615 map->defer_caching = false;
616 goto skip_format_initialization;
617 } else {
618 map->reg_read = _regmap_bus_read;
619 }
620
621 reg_endian = regmap_get_reg_endian(bus, config);
622 val_endian = regmap_get_val_endian(dev, bus, config);
623
624 switch (config->reg_bits + map->reg_shift) {
625 case 2:
626 switch (config->val_bits) {
627 case 6:
628 map->format.format_write = regmap_format_2_6_write;
629 break;
630 default:
631 goto err_map;
632 }
633 break;
634
635 case 4:
636 switch (config->val_bits) {
637 case 12:
638 map->format.format_write = regmap_format_4_12_write;
639 break;
640 default:
641 goto err_map;
642 }
643 break;
644
645 case 7:
646 switch (config->val_bits) {
647 case 9:
648 map->format.format_write = regmap_format_7_9_write;
649 break;
650 default:
651 goto err_map;
652 }
653 break;
654
655 case 10:
656 switch (config->val_bits) {
657 case 14:
658 map->format.format_write = regmap_format_10_14_write;
659 break;
660 default:
661 goto err_map;
662 }
663 break;
664
665 case 8:
666 map->format.format_reg = regmap_format_8;
667 break;
668
669 case 16:
670 switch (reg_endian) {
671 case REGMAP_ENDIAN_BIG:
672 map->format.format_reg = regmap_format_16_be;
673 break;
674 case REGMAP_ENDIAN_NATIVE:
675 map->format.format_reg = regmap_format_16_native;
676 break;
677 default:
678 goto err_map;
679 }
680 break;
681
682 case 24:
683 if (reg_endian != REGMAP_ENDIAN_BIG)
684 goto err_map;
685 map->format.format_reg = regmap_format_24;
686 break;
687
688 case 32:
689 switch (reg_endian) {
690 case REGMAP_ENDIAN_BIG:
691 map->format.format_reg = regmap_format_32_be;
692 break;
693 case REGMAP_ENDIAN_NATIVE:
694 map->format.format_reg = regmap_format_32_native;
695 break;
696 default:
697 goto err_map;
698 }
699 break;
700
701 default:
702 goto err_map;
703 }
704
705 if (val_endian == REGMAP_ENDIAN_NATIVE)
706 map->format.parse_inplace = regmap_parse_inplace_noop;
707
708 switch (config->val_bits) {
709 case 8:
710 map->format.format_val = regmap_format_8;
711 map->format.parse_val = regmap_parse_8;
712 map->format.parse_inplace = regmap_parse_inplace_noop;
713 break;
714 case 16:
715 switch (val_endian) {
716 case REGMAP_ENDIAN_BIG:
717 map->format.format_val = regmap_format_16_be;
718 map->format.parse_val = regmap_parse_16_be;
719 map->format.parse_inplace = regmap_parse_16_be_inplace;
720 break;
721 case REGMAP_ENDIAN_LITTLE:
722 map->format.format_val = regmap_format_16_le;
723 map->format.parse_val = regmap_parse_16_le;
724 map->format.parse_inplace = regmap_parse_16_le_inplace;
725 break;
726 case REGMAP_ENDIAN_NATIVE:
727 map->format.format_val = regmap_format_16_native;
728 map->format.parse_val = regmap_parse_16_native;
729 break;
730 default:
731 goto err_map;
732 }
733 break;
734 case 24:
735 if (val_endian != REGMAP_ENDIAN_BIG)
736 goto err_map;
737 map->format.format_val = regmap_format_24;
738 map->format.parse_val = regmap_parse_24;
739 break;
740 case 32:
741 switch (val_endian) {
742 case REGMAP_ENDIAN_BIG:
743 map->format.format_val = regmap_format_32_be;
744 map->format.parse_val = regmap_parse_32_be;
745 map->format.parse_inplace = regmap_parse_32_be_inplace;
746 break;
747 case REGMAP_ENDIAN_LITTLE:
748 map->format.format_val = regmap_format_32_le;
749 map->format.parse_val = regmap_parse_32_le;
750 map->format.parse_inplace = regmap_parse_32_le_inplace;
751 break;
752 case REGMAP_ENDIAN_NATIVE:
753 map->format.format_val = regmap_format_32_native;
754 map->format.parse_val = regmap_parse_32_native;
755 break;
756 default:
757 goto err_map;
758 }
759 break;
760 }
761
762 if (map->format.format_write) {
763 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
764 (val_endian != REGMAP_ENDIAN_BIG))
765 goto err_map;
766 map->use_single_rw = true;
767 }
768
769 if (!map->format.format_write &&
770 !(map->format.format_reg && map->format.format_val))
771 goto err_map;
772
773 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
774 if (map->work_buf == NULL) {
775 ret = -ENOMEM;
776 goto err_map;
777 }
778
779 if (map->format.format_write) {
780 map->defer_caching = false;
781 map->reg_write = _regmap_bus_formatted_write;
782 } else if (map->format.format_val) {
783 map->defer_caching = true;
784 map->reg_write = _regmap_bus_raw_write;
785 }
786
787 skip_format_initialization:
788
789 map->range_tree = RB_ROOT;
790 for (i = 0; i < config->num_ranges; i++) {
791 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
792 struct regmap_range_node *new;
793
794 /* Sanity check */
795 if (range_cfg->range_max < range_cfg->range_min) {
796 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
797 range_cfg->range_max, range_cfg->range_min);
798 goto err_range;
799 }
800
801 if (range_cfg->range_max > map->max_register) {
802 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
803 range_cfg->range_max, map->max_register);
804 goto err_range;
805 }
806
807 if (range_cfg->selector_reg > map->max_register) {
808 dev_err(map->dev,
809 "Invalid range %d: selector out of map\n", i);
810 goto err_range;
811 }
812
813 if (range_cfg->window_len == 0) {
814 dev_err(map->dev, "Invalid range %d: window_len 0\n",
815 i);
816 goto err_range;
817 }
818
819 /* Make sure, that this register range has no selector
820 or data window within its boundary */
821 for (j = 0; j < config->num_ranges; j++) {
822 unsigned sel_reg = config->ranges[j].selector_reg;
823 unsigned win_min = config->ranges[j].window_start;
824 unsigned win_max = win_min +
825 config->ranges[j].window_len - 1;
826
827 /* Allow data window inside its own virtual range */
828 if (j == i)
829 continue;
830
831 if (range_cfg->range_min <= sel_reg &&
832 sel_reg <= range_cfg->range_max) {
833 dev_err(map->dev,
834 "Range %d: selector for %d in window\n",
835 i, j);
836 goto err_range;
837 }
838
839 if (!(win_max < range_cfg->range_min ||
840 win_min > range_cfg->range_max)) {
841 dev_err(map->dev,
842 "Range %d: window for %d in window\n",
843 i, j);
844 goto err_range;
845 }
846 }
847
848 new = kzalloc(sizeof(*new), GFP_KERNEL);
849 if (new == NULL) {
850 ret = -ENOMEM;
851 goto err_range;
852 }
853
854 new->map = map;
855 new->name = range_cfg->name;
856 new->range_min = range_cfg->range_min;
857 new->range_max = range_cfg->range_max;
858 new->selector_reg = range_cfg->selector_reg;
859 new->selector_mask = range_cfg->selector_mask;
860 new->selector_shift = range_cfg->selector_shift;
861 new->window_start = range_cfg->window_start;
862 new->window_len = range_cfg->window_len;
863
864 if (!_regmap_range_add(map, new)) {
865 dev_err(map->dev, "Failed to add range %d\n", i);
866 kfree(new);
867 goto err_range;
868 }
869
870 if (map->selector_work_buf == NULL) {
871 map->selector_work_buf =
872 kzalloc(map->format.buf_size, GFP_KERNEL);
873 if (map->selector_work_buf == NULL) {
874 ret = -ENOMEM;
875 goto err_range;
876 }
877 }
878 }
879
880 ret = regcache_init(map, config);
881 if (ret != 0)
882 goto err_range;
883
884 if (dev) {
885 ret = regmap_attach_dev(dev, map, config);
886 if (ret != 0)
887 goto err_regcache;
888 }
889
890 return map;
891
892 err_regcache:
893 regcache_exit(map);
894 err_range:
895 regmap_range_exit(map);
896 kfree(map->work_buf);
897 err_map:
898 kfree(map);
899 err:
900 return ERR_PTR(ret);
901 }
902 EXPORT_SYMBOL_GPL(regmap_init);
903
904 static void devm_regmap_release(struct device *dev, void *res)
905 {
906 regmap_exit(*(struct regmap **)res);
907 }
908
909 /**
910 * devm_regmap_init(): Initialise managed register map
911 *
912 * @dev: Device that will be interacted with
913 * @bus: Bus-specific callbacks to use with device
914 * @bus_context: Data passed to bus-specific callbacks
915 * @config: Configuration for register map
916 *
917 * The return value will be an ERR_PTR() on error or a valid pointer
918 * to a struct regmap. This function should generally not be called
919 * directly, it should be called by bus-specific init functions. The
920 * map will be automatically freed by the device management code.
921 */
922 struct regmap *devm_regmap_init(struct device *dev,
923 const struct regmap_bus *bus,
924 void *bus_context,
925 const struct regmap_config *config)
926 {
927 struct regmap **ptr, *regmap;
928
929 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
930 if (!ptr)
931 return ERR_PTR(-ENOMEM);
932
933 regmap = regmap_init(dev, bus, bus_context, config);
934 if (!IS_ERR(regmap)) {
935 *ptr = regmap;
936 devres_add(dev, ptr);
937 } else {
938 devres_free(ptr);
939 }
940
941 return regmap;
942 }
943 EXPORT_SYMBOL_GPL(devm_regmap_init);
944
945 static void regmap_field_init(struct regmap_field *rm_field,
946 struct regmap *regmap, struct reg_field reg_field)
947 {
948 rm_field->regmap = regmap;
949 rm_field->reg = reg_field.reg;
950 rm_field->shift = reg_field.lsb;
951 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
952 rm_field->id_size = reg_field.id_size;
953 rm_field->id_offset = reg_field.id_offset;
954 }
955
956 /**
957 * devm_regmap_field_alloc(): Allocate and initialise a register field
958 * in a register map.
959 *
960 * @dev: Device that will be interacted with
961 * @regmap: regmap bank in which this register field is located.
962 * @reg_field: Register field with in the bank.
963 *
964 * The return value will be an ERR_PTR() on error or a valid pointer
965 * to a struct regmap_field. The regmap_field will be automatically freed
966 * by the device management code.
967 */
968 struct regmap_field *devm_regmap_field_alloc(struct device *dev,
969 struct regmap *regmap, struct reg_field reg_field)
970 {
971 struct regmap_field *rm_field = devm_kzalloc(dev,
972 sizeof(*rm_field), GFP_KERNEL);
973 if (!rm_field)
974 return ERR_PTR(-ENOMEM);
975
976 regmap_field_init(rm_field, regmap, reg_field);
977
978 return rm_field;
979
980 }
981 EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
982
983 /**
984 * devm_regmap_field_free(): Free register field allocated using
985 * devm_regmap_field_alloc. Usally drivers need not call this function,
986 * as the memory allocated via devm will be freed as per device-driver
987 * life-cyle.
988 *
989 * @dev: Device that will be interacted with
990 * @field: regmap field which should be freed.
991 */
992 void devm_regmap_field_free(struct device *dev,
993 struct regmap_field *field)
994 {
995 devm_kfree(dev, field);
996 }
997 EXPORT_SYMBOL_GPL(devm_regmap_field_free);
998
999 /**
1000 * regmap_field_alloc(): Allocate and initialise a register field
1001 * in a register map.
1002 *
1003 * @regmap: regmap bank in which this register field is located.
1004 * @reg_field: Register field with in the bank.
1005 *
1006 * The return value will be an ERR_PTR() on error or a valid pointer
1007 * to a struct regmap_field. The regmap_field should be freed by the
1008 * user once its finished working with it using regmap_field_free().
1009 */
1010 struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1011 struct reg_field reg_field)
1012 {
1013 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1014
1015 if (!rm_field)
1016 return ERR_PTR(-ENOMEM);
1017
1018 regmap_field_init(rm_field, regmap, reg_field);
1019
1020 return rm_field;
1021 }
1022 EXPORT_SYMBOL_GPL(regmap_field_alloc);
1023
1024 /**
1025 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1026 *
1027 * @field: regmap field which should be freed.
1028 */
1029 void regmap_field_free(struct regmap_field *field)
1030 {
1031 kfree(field);
1032 }
1033 EXPORT_SYMBOL_GPL(regmap_field_free);
1034
1035 /**
1036 * regmap_reinit_cache(): Reinitialise the current register cache
1037 *
1038 * @map: Register map to operate on.
1039 * @config: New configuration. Only the cache data will be used.
1040 *
1041 * Discard any existing register cache for the map and initialize a
1042 * new cache. This can be used to restore the cache to defaults or to
1043 * update the cache configuration to reflect runtime discovery of the
1044 * hardware.
1045 *
1046 * No explicit locking is done here, the user needs to ensure that
1047 * this function will not race with other calls to regmap.
1048 */
1049 int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1050 {
1051 regcache_exit(map);
1052 regmap_debugfs_exit(map);
1053
1054 map->max_register = config->max_register;
1055 map->writeable_reg = config->writeable_reg;
1056 map->readable_reg = config->readable_reg;
1057 map->volatile_reg = config->volatile_reg;
1058 map->precious_reg = config->precious_reg;
1059 map->cache_type = config->cache_type;
1060
1061 regmap_debugfs_init(map, config->name);
1062
1063 map->cache_bypass = false;
1064 map->cache_only = false;
1065
1066 return regcache_init(map, config);
1067 }
1068 EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1069
1070 /**
1071 * regmap_exit(): Free a previously allocated register map
1072 */
1073 void regmap_exit(struct regmap *map)
1074 {
1075 struct regmap_async *async;
1076
1077 regcache_exit(map);
1078 regmap_debugfs_exit(map);
1079 regmap_range_exit(map);
1080 if (map->bus && map->bus->free_context)
1081 map->bus->free_context(map->bus_context);
1082 kfree(map->work_buf);
1083 while (!list_empty(&map->async_free)) {
1084 async = list_first_entry_or_null(&map->async_free,
1085 struct regmap_async,
1086 list);
1087 list_del(&async->list);
1088 kfree(async->work_buf);
1089 kfree(async);
1090 }
1091 kfree(map);
1092 }
1093 EXPORT_SYMBOL_GPL(regmap_exit);
1094
1095 static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1096 {
1097 struct regmap **r = res;
1098 if (!r || !*r) {
1099 WARN_ON(!r || !*r);
1100 return 0;
1101 }
1102
1103 /* If the user didn't specify a name match any */
1104 if (data)
1105 return (*r)->name == data;
1106 else
1107 return 1;
1108 }
1109
1110 /**
1111 * dev_get_regmap(): Obtain the regmap (if any) for a device
1112 *
1113 * @dev: Device to retrieve the map for
1114 * @name: Optional name for the register map, usually NULL.
1115 *
1116 * Returns the regmap for the device if one is present, or NULL. If
1117 * name is specified then it must match the name specified when
1118 * registering the device, if it is NULL then the first regmap found
1119 * will be used. Devices with multiple register maps are very rare,
1120 * generic code should normally not need to specify a name.
1121 */
1122 struct regmap *dev_get_regmap(struct device *dev, const char *name)
1123 {
1124 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1125 dev_get_regmap_match, (void *)name);
1126
1127 if (!r)
1128 return NULL;
1129 return *r;
1130 }
1131 EXPORT_SYMBOL_GPL(dev_get_regmap);
1132
1133 /**
1134 * regmap_get_device(): Obtain the device from a regmap
1135 *
1136 * @map: Register map to operate on.
1137 *
1138 * Returns the underlying device that the regmap has been created for.
1139 */
1140 struct device *regmap_get_device(struct regmap *map)
1141 {
1142 return map->dev;
1143 }
1144 EXPORT_SYMBOL_GPL(regmap_get_device);
1145
1146 static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1147 struct regmap_range_node *range,
1148 unsigned int val_num)
1149 {
1150 void *orig_work_buf;
1151 unsigned int win_offset;
1152 unsigned int win_page;
1153 bool page_chg;
1154 int ret;
1155
1156 win_offset = (*reg - range->range_min) % range->window_len;
1157 win_page = (*reg - range->range_min) / range->window_len;
1158
1159 if (val_num > 1) {
1160 /* Bulk write shouldn't cross range boundary */
1161 if (*reg + val_num - 1 > range->range_max)
1162 return -EINVAL;
1163
1164 /* ... or single page boundary */
1165 if (val_num > range->window_len - win_offset)
1166 return -EINVAL;
1167 }
1168
1169 /* It is possible to have selector register inside data window.
1170 In that case, selector register is located on every page and
1171 it needs no page switching, when accessed alone. */
1172 if (val_num > 1 ||
1173 range->window_start + win_offset != range->selector_reg) {
1174 /* Use separate work_buf during page switching */
1175 orig_work_buf = map->work_buf;
1176 map->work_buf = map->selector_work_buf;
1177
1178 ret = _regmap_update_bits(map, range->selector_reg,
1179 range->selector_mask,
1180 win_page << range->selector_shift,
1181 &page_chg);
1182
1183 map->work_buf = orig_work_buf;
1184
1185 if (ret != 0)
1186 return ret;
1187 }
1188
1189 *reg = range->window_start + win_offset;
1190
1191 return 0;
1192 }
1193
1194 int _regmap_raw_write(struct regmap *map, unsigned int reg,
1195 const void *val, size_t val_len)
1196 {
1197 struct regmap_range_node *range;
1198 unsigned long flags;
1199 u8 *u8 = map->work_buf;
1200 void *work_val = map->work_buf + map->format.reg_bytes +
1201 map->format.pad_bytes;
1202 void *buf;
1203 int ret = -ENOTSUPP;
1204 size_t len;
1205 int i;
1206
1207 WARN_ON(!map->bus);
1208
1209 /* Check for unwritable registers before we start */
1210 if (map->writeable_reg)
1211 for (i = 0; i < val_len / map->format.val_bytes; i++)
1212 if (!map->writeable_reg(map->dev,
1213 reg + (i * map->reg_stride)))
1214 return -EINVAL;
1215
1216 if (!map->cache_bypass && map->format.parse_val) {
1217 unsigned int ival;
1218 int val_bytes = map->format.val_bytes;
1219 for (i = 0; i < val_len / val_bytes; i++) {
1220 ival = map->format.parse_val(val + (i * val_bytes));
1221 ret = regcache_write(map, reg + (i * map->reg_stride),
1222 ival);
1223 if (ret) {
1224 dev_err(map->dev,
1225 "Error in caching of register: %x ret: %d\n",
1226 reg + i, ret);
1227 return ret;
1228 }
1229 }
1230 if (map->cache_only) {
1231 map->cache_dirty = true;
1232 return 0;
1233 }
1234 }
1235
1236 range = _regmap_range_lookup(map, reg);
1237 if (range) {
1238 int val_num = val_len / map->format.val_bytes;
1239 int win_offset = (reg - range->range_min) % range->window_len;
1240 int win_residue = range->window_len - win_offset;
1241
1242 /* If the write goes beyond the end of the window split it */
1243 while (val_num > win_residue) {
1244 dev_dbg(map->dev, "Writing window %d/%zu\n",
1245 win_residue, val_len / map->format.val_bytes);
1246 ret = _regmap_raw_write(map, reg, val, win_residue *
1247 map->format.val_bytes);
1248 if (ret != 0)
1249 return ret;
1250
1251 reg += win_residue;
1252 val_num -= win_residue;
1253 val += win_residue * map->format.val_bytes;
1254 val_len -= win_residue * map->format.val_bytes;
1255
1256 win_offset = (reg - range->range_min) %
1257 range->window_len;
1258 win_residue = range->window_len - win_offset;
1259 }
1260
1261 ret = _regmap_select_page(map, &reg, range, val_num);
1262 if (ret != 0)
1263 return ret;
1264 }
1265
1266 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1267
1268 u8[0] |= map->write_flag_mask;
1269
1270 /*
1271 * Essentially all I/O mechanisms will be faster with a single
1272 * buffer to write. Since register syncs often generate raw
1273 * writes of single registers optimise that case.
1274 */
1275 if (val != work_val && val_len == map->format.val_bytes) {
1276 memcpy(work_val, val, map->format.val_bytes);
1277 val = work_val;
1278 }
1279
1280 if (map->async && map->bus->async_write) {
1281 struct regmap_async *async;
1282
1283 trace_regmap_async_write_start(map, reg, val_len);
1284
1285 spin_lock_irqsave(&map->async_lock, flags);
1286 async = list_first_entry_or_null(&map->async_free,
1287 struct regmap_async,
1288 list);
1289 if (async)
1290 list_del(&async->list);
1291 spin_unlock_irqrestore(&map->async_lock, flags);
1292
1293 if (!async) {
1294 async = map->bus->async_alloc();
1295 if (!async)
1296 return -ENOMEM;
1297
1298 async->work_buf = kzalloc(map->format.buf_size,
1299 GFP_KERNEL | GFP_DMA);
1300 if (!async->work_buf) {
1301 kfree(async);
1302 return -ENOMEM;
1303 }
1304 }
1305
1306 async->map = map;
1307
1308 /* If the caller supplied the value we can use it safely. */
1309 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1310 map->format.reg_bytes + map->format.val_bytes);
1311
1312 spin_lock_irqsave(&map->async_lock, flags);
1313 list_add_tail(&async->list, &map->async_list);
1314 spin_unlock_irqrestore(&map->async_lock, flags);
1315
1316 if (val != work_val)
1317 ret = map->bus->async_write(map->bus_context,
1318 async->work_buf,
1319 map->format.reg_bytes +
1320 map->format.pad_bytes,
1321 val, val_len, async);
1322 else
1323 ret = map->bus->async_write(map->bus_context,
1324 async->work_buf,
1325 map->format.reg_bytes +
1326 map->format.pad_bytes +
1327 val_len, NULL, 0, async);
1328
1329 if (ret != 0) {
1330 dev_err(map->dev, "Failed to schedule write: %d\n",
1331 ret);
1332
1333 spin_lock_irqsave(&map->async_lock, flags);
1334 list_move(&async->list, &map->async_free);
1335 spin_unlock_irqrestore(&map->async_lock, flags);
1336 }
1337
1338 return ret;
1339 }
1340
1341 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1342
1343 /* If we're doing a single register write we can probably just
1344 * send the work_buf directly, otherwise try to do a gather
1345 * write.
1346 */
1347 if (val == work_val)
1348 ret = map->bus->write(map->bus_context, map->work_buf,
1349 map->format.reg_bytes +
1350 map->format.pad_bytes +
1351 val_len);
1352 else if (map->bus->gather_write)
1353 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1354 map->format.reg_bytes +
1355 map->format.pad_bytes,
1356 val, val_len);
1357
1358 /* If that didn't work fall back on linearising by hand. */
1359 if (ret == -ENOTSUPP) {
1360 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1361 buf = kzalloc(len, GFP_KERNEL);
1362 if (!buf)
1363 return -ENOMEM;
1364
1365 memcpy(buf, map->work_buf, map->format.reg_bytes);
1366 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1367 val, val_len);
1368 ret = map->bus->write(map->bus_context, buf, len);
1369
1370 kfree(buf);
1371 }
1372
1373 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1374
1375 return ret;
1376 }
1377
1378 /**
1379 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1380 *
1381 * @map: Map to check.
1382 */
1383 bool regmap_can_raw_write(struct regmap *map)
1384 {
1385 return map->bus && map->format.format_val && map->format.format_reg;
1386 }
1387 EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1388
1389 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1390 unsigned int val)
1391 {
1392 int ret;
1393 struct regmap_range_node *range;
1394 struct regmap *map = context;
1395
1396 WARN_ON(!map->bus || !map->format.format_write);
1397
1398 range = _regmap_range_lookup(map, reg);
1399 if (range) {
1400 ret = _regmap_select_page(map, &reg, range, 1);
1401 if (ret != 0)
1402 return ret;
1403 }
1404
1405 map->format.format_write(map, reg, val);
1406
1407 trace_regmap_hw_write_start(map, reg, 1);
1408
1409 ret = map->bus->write(map->bus_context, map->work_buf,
1410 map->format.buf_size);
1411
1412 trace_regmap_hw_write_done(map, reg, 1);
1413
1414 return ret;
1415 }
1416
1417 static int _regmap_bus_reg_write(void *context, unsigned int reg,
1418 unsigned int val)
1419 {
1420 struct regmap *map = context;
1421
1422 return map->bus->reg_write(map->bus_context, reg, val);
1423 }
1424
1425 static int _regmap_bus_raw_write(void *context, unsigned int reg,
1426 unsigned int val)
1427 {
1428 struct regmap *map = context;
1429
1430 WARN_ON(!map->bus || !map->format.format_val);
1431
1432 map->format.format_val(map->work_buf + map->format.reg_bytes
1433 + map->format.pad_bytes, val, 0);
1434 return _regmap_raw_write(map, reg,
1435 map->work_buf +
1436 map->format.reg_bytes +
1437 map->format.pad_bytes,
1438 map->format.val_bytes);
1439 }
1440
1441 static inline void *_regmap_map_get_context(struct regmap *map)
1442 {
1443 return (map->bus) ? map : map->bus_context;
1444 }
1445
1446 int _regmap_write(struct regmap *map, unsigned int reg,
1447 unsigned int val)
1448 {
1449 int ret;
1450 void *context = _regmap_map_get_context(map);
1451
1452 if (!regmap_writeable(map, reg))
1453 return -EIO;
1454
1455 if (!map->cache_bypass && !map->defer_caching) {
1456 ret = regcache_write(map, reg, val);
1457 if (ret != 0)
1458 return ret;
1459 if (map->cache_only) {
1460 map->cache_dirty = true;
1461 return 0;
1462 }
1463 }
1464
1465 #ifdef LOG_DEVICE
1466 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1467 dev_info(map->dev, "%x <= %x\n", reg, val);
1468 #endif
1469
1470 trace_regmap_reg_write(map, reg, val);
1471
1472 return map->reg_write(context, reg, val);
1473 }
1474
1475 /**
1476 * regmap_write(): Write a value to a single register
1477 *
1478 * @map: Register map to write to
1479 * @reg: Register to write to
1480 * @val: Value to be written
1481 *
1482 * A value of zero will be returned on success, a negative errno will
1483 * be returned in error cases.
1484 */
1485 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1486 {
1487 int ret;
1488
1489 if (reg % map->reg_stride)
1490 return -EINVAL;
1491
1492 map->lock(map->lock_arg);
1493
1494 ret = _regmap_write(map, reg, val);
1495
1496 map->unlock(map->lock_arg);
1497
1498 return ret;
1499 }
1500 EXPORT_SYMBOL_GPL(regmap_write);
1501
1502 /**
1503 * regmap_write_async(): Write a value to a single register asynchronously
1504 *
1505 * @map: Register map to write to
1506 * @reg: Register to write to
1507 * @val: Value to be written
1508 *
1509 * A value of zero will be returned on success, a negative errno will
1510 * be returned in error cases.
1511 */
1512 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1513 {
1514 int ret;
1515
1516 if (reg % map->reg_stride)
1517 return -EINVAL;
1518
1519 map->lock(map->lock_arg);
1520
1521 map->async = true;
1522
1523 ret = _regmap_write(map, reg, val);
1524
1525 map->async = false;
1526
1527 map->unlock(map->lock_arg);
1528
1529 return ret;
1530 }
1531 EXPORT_SYMBOL_GPL(regmap_write_async);
1532
1533 /**
1534 * regmap_raw_write(): Write raw values to one or more registers
1535 *
1536 * @map: Register map to write to
1537 * @reg: Initial register to write to
1538 * @val: Block of data to be written, laid out for direct transmission to the
1539 * device
1540 * @val_len: Length of data pointed to by val.
1541 *
1542 * This function is intended to be used for things like firmware
1543 * download where a large block of data needs to be transferred to the
1544 * device. No formatting will be done on the data provided.
1545 *
1546 * A value of zero will be returned on success, a negative errno will
1547 * be returned in error cases.
1548 */
1549 int regmap_raw_write(struct regmap *map, unsigned int reg,
1550 const void *val, size_t val_len)
1551 {
1552 int ret;
1553
1554 if (!regmap_can_raw_write(map))
1555 return -EINVAL;
1556 if (val_len % map->format.val_bytes)
1557 return -EINVAL;
1558
1559 map->lock(map->lock_arg);
1560
1561 ret = _regmap_raw_write(map, reg, val, val_len);
1562
1563 map->unlock(map->lock_arg);
1564
1565 return ret;
1566 }
1567 EXPORT_SYMBOL_GPL(regmap_raw_write);
1568
1569 /**
1570 * regmap_field_write(): Write a value to a single register field
1571 *
1572 * @field: Register field to write to
1573 * @val: Value to be written
1574 *
1575 * A value of zero will be returned on success, a negative errno will
1576 * be returned in error cases.
1577 */
1578 int regmap_field_write(struct regmap_field *field, unsigned int val)
1579 {
1580 return regmap_update_bits(field->regmap, field->reg,
1581 field->mask, val << field->shift);
1582 }
1583 EXPORT_SYMBOL_GPL(regmap_field_write);
1584
1585 /**
1586 * regmap_field_update_bits(): Perform a read/modify/write cycle
1587 * on the register field
1588 *
1589 * @field: Register field to write to
1590 * @mask: Bitmask to change
1591 * @val: Value to be written
1592 *
1593 * A value of zero will be returned on success, a negative errno will
1594 * be returned in error cases.
1595 */
1596 int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1597 {
1598 mask = (mask << field->shift) & field->mask;
1599
1600 return regmap_update_bits(field->regmap, field->reg,
1601 mask, val << field->shift);
1602 }
1603 EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1604
1605 /**
1606 * regmap_fields_write(): Write a value to a single register field with port ID
1607 *
1608 * @field: Register field to write to
1609 * @id: port ID
1610 * @val: Value to be written
1611 *
1612 * A value of zero will be returned on success, a negative errno will
1613 * be returned in error cases.
1614 */
1615 int regmap_fields_write(struct regmap_field *field, unsigned int id,
1616 unsigned int val)
1617 {
1618 if (id >= field->id_size)
1619 return -EINVAL;
1620
1621 return regmap_update_bits(field->regmap,
1622 field->reg + (field->id_offset * id),
1623 field->mask, val << field->shift);
1624 }
1625 EXPORT_SYMBOL_GPL(regmap_fields_write);
1626
1627 /**
1628 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1629 * on the register field
1630 *
1631 * @field: Register field to write to
1632 * @id: port ID
1633 * @mask: Bitmask to change
1634 * @val: Value to be written
1635 *
1636 * A value of zero will be returned on success, a negative errno will
1637 * be returned in error cases.
1638 */
1639 int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1640 unsigned int mask, unsigned int val)
1641 {
1642 if (id >= field->id_size)
1643 return -EINVAL;
1644
1645 mask = (mask << field->shift) & field->mask;
1646
1647 return regmap_update_bits(field->regmap,
1648 field->reg + (field->id_offset * id),
1649 mask, val << field->shift);
1650 }
1651 EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1652
1653 /*
1654 * regmap_bulk_write(): Write multiple registers to the device
1655 *
1656 * @map: Register map to write to
1657 * @reg: First register to be write from
1658 * @val: Block of data to be written, in native register size for device
1659 * @val_count: Number of registers to write
1660 *
1661 * This function is intended to be used for writing a large block of
1662 * data to the device either in single transfer or multiple transfer.
1663 *
1664 * A value of zero will be returned on success, a negative errno will
1665 * be returned in error cases.
1666 */
1667 int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1668 size_t val_count)
1669 {
1670 int ret = 0, i;
1671 size_t val_bytes = map->format.val_bytes;
1672
1673 if (map->bus && !map->format.parse_inplace)
1674 return -EINVAL;
1675 if (reg % map->reg_stride)
1676 return -EINVAL;
1677
1678 /*
1679 * Some devices don't support bulk write, for
1680 * them we have a series of single write operations.
1681 */
1682 if (!map->bus || map->use_single_rw) {
1683 map->lock(map->lock_arg);
1684 for (i = 0; i < val_count; i++) {
1685 unsigned int ival;
1686
1687 switch (val_bytes) {
1688 case 1:
1689 ival = *(u8 *)(val + (i * val_bytes));
1690 break;
1691 case 2:
1692 ival = *(u16 *)(val + (i * val_bytes));
1693 break;
1694 case 4:
1695 ival = *(u32 *)(val + (i * val_bytes));
1696 break;
1697 #ifdef CONFIG_64BIT
1698 case 8:
1699 ival = *(u64 *)(val + (i * val_bytes));
1700 break;
1701 #endif
1702 default:
1703 ret = -EINVAL;
1704 goto out;
1705 }
1706
1707 ret = _regmap_write(map, reg + (i * map->reg_stride),
1708 ival);
1709 if (ret != 0)
1710 goto out;
1711 }
1712 out:
1713 map->unlock(map->lock_arg);
1714 } else {
1715 void *wval;
1716
1717 if (!val_count)
1718 return -EINVAL;
1719
1720 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1721 if (!wval) {
1722 dev_err(map->dev, "Error in memory allocation\n");
1723 return -ENOMEM;
1724 }
1725 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1726 map->format.parse_inplace(wval + i);
1727
1728 map->lock(map->lock_arg);
1729 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
1730 map->unlock(map->lock_arg);
1731
1732 kfree(wval);
1733 }
1734 return ret;
1735 }
1736 EXPORT_SYMBOL_GPL(regmap_bulk_write);
1737
1738 /*
1739 * _regmap_raw_multi_reg_write()
1740 *
1741 * the (register,newvalue) pairs in regs have not been formatted, but
1742 * they are all in the same page and have been changed to being page
1743 * relative. The page register has been written if that was neccessary.
1744 */
1745 static int _regmap_raw_multi_reg_write(struct regmap *map,
1746 const struct reg_default *regs,
1747 size_t num_regs)
1748 {
1749 int ret;
1750 void *buf;
1751 int i;
1752 u8 *u8;
1753 size_t val_bytes = map->format.val_bytes;
1754 size_t reg_bytes = map->format.reg_bytes;
1755 size_t pad_bytes = map->format.pad_bytes;
1756 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1757 size_t len = pair_size * num_regs;
1758
1759 if (!len)
1760 return -EINVAL;
1761
1762 buf = kzalloc(len, GFP_KERNEL);
1763 if (!buf)
1764 return -ENOMEM;
1765
1766 /* We have to linearise by hand. */
1767
1768 u8 = buf;
1769
1770 for (i = 0; i < num_regs; i++) {
1771 unsigned int reg = regs[i].reg;
1772 unsigned int val = regs[i].def;
1773 trace_regmap_hw_write_start(map, reg, 1);
1774 map->format.format_reg(u8, reg, map->reg_shift);
1775 u8 += reg_bytes + pad_bytes;
1776 map->format.format_val(u8, val, 0);
1777 u8 += val_bytes;
1778 }
1779 u8 = buf;
1780 *u8 |= map->write_flag_mask;
1781
1782 ret = map->bus->write(map->bus_context, buf, len);
1783
1784 kfree(buf);
1785
1786 for (i = 0; i < num_regs; i++) {
1787 int reg = regs[i].reg;
1788 trace_regmap_hw_write_done(map, reg, 1);
1789 }
1790 return ret;
1791 }
1792
1793 static unsigned int _regmap_register_page(struct regmap *map,
1794 unsigned int reg,
1795 struct regmap_range_node *range)
1796 {
1797 unsigned int win_page = (reg - range->range_min) / range->window_len;
1798
1799 return win_page;
1800 }
1801
1802 static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1803 struct reg_default *regs,
1804 size_t num_regs)
1805 {
1806 int ret;
1807 int i, n;
1808 struct reg_default *base;
1809 unsigned int this_page = 0;
1810 /*
1811 * the set of registers are not neccessarily in order, but
1812 * since the order of write must be preserved this algorithm
1813 * chops the set each time the page changes
1814 */
1815 base = regs;
1816 for (i = 0, n = 0; i < num_regs; i++, n++) {
1817 unsigned int reg = regs[i].reg;
1818 struct regmap_range_node *range;
1819
1820 range = _regmap_range_lookup(map, reg);
1821 if (range) {
1822 unsigned int win_page = _regmap_register_page(map, reg,
1823 range);
1824
1825 if (i == 0)
1826 this_page = win_page;
1827 if (win_page != this_page) {
1828 this_page = win_page;
1829 ret = _regmap_raw_multi_reg_write(map, base, n);
1830 if (ret != 0)
1831 return ret;
1832 base += n;
1833 n = 0;
1834 }
1835 ret = _regmap_select_page(map, &base[n].reg, range, 1);
1836 if (ret != 0)
1837 return ret;
1838 }
1839 }
1840 if (n > 0)
1841 return _regmap_raw_multi_reg_write(map, base, n);
1842 return 0;
1843 }
1844
1845 static int _regmap_multi_reg_write(struct regmap *map,
1846 const struct reg_default *regs,
1847 size_t num_regs)
1848 {
1849 int i;
1850 int ret;
1851
1852 if (!map->can_multi_write) {
1853 for (i = 0; i < num_regs; i++) {
1854 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1855 if (ret != 0)
1856 return ret;
1857 }
1858 return 0;
1859 }
1860
1861 if (!map->format.parse_inplace)
1862 return -EINVAL;
1863
1864 if (map->writeable_reg)
1865 for (i = 0; i < num_regs; i++) {
1866 int reg = regs[i].reg;
1867 if (!map->writeable_reg(map->dev, reg))
1868 return -EINVAL;
1869 if (reg % map->reg_stride)
1870 return -EINVAL;
1871 }
1872
1873 if (!map->cache_bypass) {
1874 for (i = 0; i < num_regs; i++) {
1875 unsigned int val = regs[i].def;
1876 unsigned int reg = regs[i].reg;
1877 ret = regcache_write(map, reg, val);
1878 if (ret) {
1879 dev_err(map->dev,
1880 "Error in caching of register: %x ret: %d\n",
1881 reg, ret);
1882 return ret;
1883 }
1884 }
1885 if (map->cache_only) {
1886 map->cache_dirty = true;
1887 return 0;
1888 }
1889 }
1890
1891 WARN_ON(!map->bus);
1892
1893 for (i = 0; i < num_regs; i++) {
1894 unsigned int reg = regs[i].reg;
1895 struct regmap_range_node *range;
1896 range = _regmap_range_lookup(map, reg);
1897 if (range) {
1898 size_t len = sizeof(struct reg_default)*num_regs;
1899 struct reg_default *base = kmemdup(regs, len,
1900 GFP_KERNEL);
1901 if (!base)
1902 return -ENOMEM;
1903 ret = _regmap_range_multi_paged_reg_write(map, base,
1904 num_regs);
1905 kfree(base);
1906
1907 return ret;
1908 }
1909 }
1910 return _regmap_raw_multi_reg_write(map, regs, num_regs);
1911 }
1912
1913 /*
1914 * regmap_multi_reg_write(): Write multiple registers to the device
1915 *
1916 * where the set of register,value pairs are supplied in any order,
1917 * possibly not all in a single range.
1918 *
1919 * @map: Register map to write to
1920 * @regs: Array of structures containing register,value to be written
1921 * @num_regs: Number of registers to write
1922 *
1923 * The 'normal' block write mode will send ultimately send data on the
1924 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
1925 * addressed. However, this alternative block multi write mode will send
1926 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
1927 * must of course support the mode.
1928 *
1929 * A value of zero will be returned on success, a negative errno will be
1930 * returned in error cases.
1931 */
1932 int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
1933 int num_regs)
1934 {
1935 int ret;
1936
1937 map->lock(map->lock_arg);
1938
1939 ret = _regmap_multi_reg_write(map, regs, num_regs);
1940
1941 map->unlock(map->lock_arg);
1942
1943 return ret;
1944 }
1945 EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
1946
1947 /*
1948 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
1949 * device but not the cache
1950 *
1951 * where the set of register are supplied in any order
1952 *
1953 * @map: Register map to write to
1954 * @regs: Array of structures containing register,value to be written
1955 * @num_regs: Number of registers to write
1956 *
1957 * This function is intended to be used for writing a large block of data
1958 * atomically to the device in single transfer for those I2C client devices
1959 * that implement this alternative block write mode.
1960 *
1961 * A value of zero will be returned on success, a negative errno will
1962 * be returned in error cases.
1963 */
1964 int regmap_multi_reg_write_bypassed(struct regmap *map,
1965 const struct reg_default *regs,
1966 int num_regs)
1967 {
1968 int ret;
1969 bool bypass;
1970
1971 map->lock(map->lock_arg);
1972
1973 bypass = map->cache_bypass;
1974 map->cache_bypass = true;
1975
1976 ret = _regmap_multi_reg_write(map, regs, num_regs);
1977
1978 map->cache_bypass = bypass;
1979
1980 map->unlock(map->lock_arg);
1981
1982 return ret;
1983 }
1984 EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
1985
1986 /**
1987 * regmap_raw_write_async(): Write raw values to one or more registers
1988 * asynchronously
1989 *
1990 * @map: Register map to write to
1991 * @reg: Initial register to write to
1992 * @val: Block of data to be written, laid out for direct transmission to the
1993 * device. Must be valid until regmap_async_complete() is called.
1994 * @val_len: Length of data pointed to by val.
1995 *
1996 * This function is intended to be used for things like firmware
1997 * download where a large block of data needs to be transferred to the
1998 * device. No formatting will be done on the data provided.
1999 *
2000 * If supported by the underlying bus the write will be scheduled
2001 * asynchronously, helping maximise I/O speed on higher speed buses
2002 * like SPI. regmap_async_complete() can be called to ensure that all
2003 * asynchrnous writes have been completed.
2004 *
2005 * A value of zero will be returned on success, a negative errno will
2006 * be returned in error cases.
2007 */
2008 int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2009 const void *val, size_t val_len)
2010 {
2011 int ret;
2012
2013 if (val_len % map->format.val_bytes)
2014 return -EINVAL;
2015 if (reg % map->reg_stride)
2016 return -EINVAL;
2017
2018 map->lock(map->lock_arg);
2019
2020 map->async = true;
2021
2022 ret = _regmap_raw_write(map, reg, val, val_len);
2023
2024 map->async = false;
2025
2026 map->unlock(map->lock_arg);
2027
2028 return ret;
2029 }
2030 EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2031
2032 static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2033 unsigned int val_len)
2034 {
2035 struct regmap_range_node *range;
2036 u8 *u8 = map->work_buf;
2037 int ret;
2038
2039 WARN_ON(!map->bus);
2040
2041 range = _regmap_range_lookup(map, reg);
2042 if (range) {
2043 ret = _regmap_select_page(map, &reg, range,
2044 val_len / map->format.val_bytes);
2045 if (ret != 0)
2046 return ret;
2047 }
2048
2049 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2050
2051 /*
2052 * Some buses or devices flag reads by setting the high bits in the
2053 * register addresss; since it's always the high bits for all
2054 * current formats we can do this here rather than in
2055 * formatting. This may break if we get interesting formats.
2056 */
2057 u8[0] |= map->read_flag_mask;
2058
2059 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2060
2061 ret = map->bus->read(map->bus_context, map->work_buf,
2062 map->format.reg_bytes + map->format.pad_bytes,
2063 val, val_len);
2064
2065 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2066
2067 return ret;
2068 }
2069
2070 static int _regmap_bus_reg_read(void *context, unsigned int reg,
2071 unsigned int *val)
2072 {
2073 struct regmap *map = context;
2074
2075 return map->bus->reg_read(map->bus_context, reg, val);
2076 }
2077
2078 static int _regmap_bus_read(void *context, unsigned int reg,
2079 unsigned int *val)
2080 {
2081 int ret;
2082 struct regmap *map = context;
2083
2084 if (!map->format.parse_val)
2085 return -EINVAL;
2086
2087 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2088 if (ret == 0)
2089 *val = map->format.parse_val(map->work_buf);
2090
2091 return ret;
2092 }
2093
2094 static int _regmap_read(struct regmap *map, unsigned int reg,
2095 unsigned int *val)
2096 {
2097 int ret;
2098 void *context = _regmap_map_get_context(map);
2099
2100 WARN_ON(!map->reg_read);
2101
2102 if (!map->cache_bypass) {
2103 ret = regcache_read(map, reg, val);
2104 if (ret == 0)
2105 return 0;
2106 }
2107
2108 if (map->cache_only)
2109 return -EBUSY;
2110
2111 if (!regmap_readable(map, reg))
2112 return -EIO;
2113
2114 ret = map->reg_read(context, reg, val);
2115 if (ret == 0) {
2116 #ifdef LOG_DEVICE
2117 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2118 dev_info(map->dev, "%x => %x\n", reg, *val);
2119 #endif
2120
2121 trace_regmap_reg_read(map, reg, *val);
2122
2123 if (!map->cache_bypass)
2124 regcache_write(map, reg, *val);
2125 }
2126
2127 return ret;
2128 }
2129
2130 /**
2131 * regmap_read(): Read a value from a single register
2132 *
2133 * @map: Register map to read from
2134 * @reg: Register to be read from
2135 * @val: Pointer to store read value
2136 *
2137 * A value of zero will be returned on success, a negative errno will
2138 * be returned in error cases.
2139 */
2140 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2141 {
2142 int ret;
2143
2144 if (reg % map->reg_stride)
2145 return -EINVAL;
2146
2147 map->lock(map->lock_arg);
2148
2149 ret = _regmap_read(map, reg, val);
2150
2151 map->unlock(map->lock_arg);
2152
2153 return ret;
2154 }
2155 EXPORT_SYMBOL_GPL(regmap_read);
2156
2157 /**
2158 * regmap_raw_read(): Read raw data from the device
2159 *
2160 * @map: Register map to read from
2161 * @reg: First register to be read from
2162 * @val: Pointer to store read value
2163 * @val_len: Size of data to read
2164 *
2165 * A value of zero will be returned on success, a negative errno will
2166 * be returned in error cases.
2167 */
2168 int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2169 size_t val_len)
2170 {
2171 size_t val_bytes = map->format.val_bytes;
2172 size_t val_count = val_len / val_bytes;
2173 unsigned int v;
2174 int ret, i;
2175
2176 if (!map->bus)
2177 return -EINVAL;
2178 if (val_len % map->format.val_bytes)
2179 return -EINVAL;
2180 if (reg % map->reg_stride)
2181 return -EINVAL;
2182
2183 map->lock(map->lock_arg);
2184
2185 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2186 map->cache_type == REGCACHE_NONE) {
2187 if (!map->bus->read) {
2188 ret = -ENOTSUPP;
2189 goto out;
2190 }
2191
2192 /* Physical block read if there's no cache involved */
2193 ret = _regmap_raw_read(map, reg, val, val_len);
2194
2195 } else {
2196 /* Otherwise go word by word for the cache; should be low
2197 * cost as we expect to hit the cache.
2198 */
2199 for (i = 0; i < val_count; i++) {
2200 ret = _regmap_read(map, reg + (i * map->reg_stride),
2201 &v);
2202 if (ret != 0)
2203 goto out;
2204
2205 map->format.format_val(val + (i * val_bytes), v, 0);
2206 }
2207 }
2208
2209 out:
2210 map->unlock(map->lock_arg);
2211
2212 return ret;
2213 }
2214 EXPORT_SYMBOL_GPL(regmap_raw_read);
2215
2216 /**
2217 * regmap_field_read(): Read a value to a single register field
2218 *
2219 * @field: Register field to read from
2220 * @val: Pointer to store read value
2221 *
2222 * A value of zero will be returned on success, a negative errno will
2223 * be returned in error cases.
2224 */
2225 int regmap_field_read(struct regmap_field *field, unsigned int *val)
2226 {
2227 int ret;
2228 unsigned int reg_val;
2229 ret = regmap_read(field->regmap, field->reg, &reg_val);
2230 if (ret != 0)
2231 return ret;
2232
2233 reg_val &= field->mask;
2234 reg_val >>= field->shift;
2235 *val = reg_val;
2236
2237 return ret;
2238 }
2239 EXPORT_SYMBOL_GPL(regmap_field_read);
2240
2241 /**
2242 * regmap_fields_read(): Read a value to a single register field with port ID
2243 *
2244 * @field: Register field to read from
2245 * @id: port ID
2246 * @val: Pointer to store read value
2247 *
2248 * A value of zero will be returned on success, a negative errno will
2249 * be returned in error cases.
2250 */
2251 int regmap_fields_read(struct regmap_field *field, unsigned int id,
2252 unsigned int *val)
2253 {
2254 int ret;
2255 unsigned int reg_val;
2256
2257 if (id >= field->id_size)
2258 return -EINVAL;
2259
2260 ret = regmap_read(field->regmap,
2261 field->reg + (field->id_offset * id),
2262 &reg_val);
2263 if (ret != 0)
2264 return ret;
2265
2266 reg_val &= field->mask;
2267 reg_val >>= field->shift;
2268 *val = reg_val;
2269
2270 return ret;
2271 }
2272 EXPORT_SYMBOL_GPL(regmap_fields_read);
2273
2274 /**
2275 * regmap_bulk_read(): Read multiple registers from the device
2276 *
2277 * @map: Register map to read from
2278 * @reg: First register to be read from
2279 * @val: Pointer to store read value, in native register size for device
2280 * @val_count: Number of registers to read
2281 *
2282 * A value of zero will be returned on success, a negative errno will
2283 * be returned in error cases.
2284 */
2285 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2286 size_t val_count)
2287 {
2288 int ret, i;
2289 size_t val_bytes = map->format.val_bytes;
2290 bool vol = regmap_volatile_range(map, reg, val_count);
2291
2292 if (reg % map->reg_stride)
2293 return -EINVAL;
2294
2295 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2296 /*
2297 * Some devices does not support bulk read, for
2298 * them we have a series of single read operations.
2299 */
2300 if (map->use_single_rw) {
2301 for (i = 0; i < val_count; i++) {
2302 ret = regmap_raw_read(map,
2303 reg + (i * map->reg_stride),
2304 val + (i * val_bytes),
2305 val_bytes);
2306 if (ret != 0)
2307 return ret;
2308 }
2309 } else {
2310 ret = regmap_raw_read(map, reg, val,
2311 val_bytes * val_count);
2312 if (ret != 0)
2313 return ret;
2314 }
2315
2316 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2317 map->format.parse_inplace(val + i);
2318 } else {
2319 for (i = 0; i < val_count; i++) {
2320 unsigned int ival;
2321 ret = regmap_read(map, reg + (i * map->reg_stride),
2322 &ival);
2323 if (ret != 0)
2324 return ret;
2325 map->format.format_val(val + (i * val_bytes), ival, 0);
2326 }
2327 }
2328
2329 return 0;
2330 }
2331 EXPORT_SYMBOL_GPL(regmap_bulk_read);
2332
2333 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2334 unsigned int mask, unsigned int val,
2335 bool *change)
2336 {
2337 int ret;
2338 unsigned int tmp, orig;
2339
2340 ret = _regmap_read(map, reg, &orig);
2341 if (ret != 0)
2342 return ret;
2343
2344 tmp = orig & ~mask;
2345 tmp |= val & mask;
2346
2347 if (tmp != orig) {
2348 ret = _regmap_write(map, reg, tmp);
2349 if (change)
2350 *change = true;
2351 } else {
2352 if (change)
2353 *change = false;
2354 }
2355
2356 return ret;
2357 }
2358
2359 /**
2360 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2361 *
2362 * @map: Register map to update
2363 * @reg: Register to update
2364 * @mask: Bitmask to change
2365 * @val: New value for bitmask
2366 *
2367 * Returns zero for success, a negative number on error.
2368 */
2369 int regmap_update_bits(struct regmap *map, unsigned int reg,
2370 unsigned int mask, unsigned int val)
2371 {
2372 int ret;
2373
2374 map->lock(map->lock_arg);
2375 ret = _regmap_update_bits(map, reg, mask, val, NULL);
2376 map->unlock(map->lock_arg);
2377
2378 return ret;
2379 }
2380 EXPORT_SYMBOL_GPL(regmap_update_bits);
2381
2382 /**
2383 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2384 * map asynchronously
2385 *
2386 * @map: Register map to update
2387 * @reg: Register to update
2388 * @mask: Bitmask to change
2389 * @val: New value for bitmask
2390 *
2391 * With most buses the read must be done synchronously so this is most
2392 * useful for devices with a cache which do not need to interact with
2393 * the hardware to determine the current register value.
2394 *
2395 * Returns zero for success, a negative number on error.
2396 */
2397 int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2398 unsigned int mask, unsigned int val)
2399 {
2400 int ret;
2401
2402 map->lock(map->lock_arg);
2403
2404 map->async = true;
2405
2406 ret = _regmap_update_bits(map, reg, mask, val, NULL);
2407
2408 map->async = false;
2409
2410 map->unlock(map->lock_arg);
2411
2412 return ret;
2413 }
2414 EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2415
2416 /**
2417 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2418 * register map and report if updated
2419 *
2420 * @map: Register map to update
2421 * @reg: Register to update
2422 * @mask: Bitmask to change
2423 * @val: New value for bitmask
2424 * @change: Boolean indicating if a write was done
2425 *
2426 * Returns zero for success, a negative number on error.
2427 */
2428 int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2429 unsigned int mask, unsigned int val,
2430 bool *change)
2431 {
2432 int ret;
2433
2434 map->lock(map->lock_arg);
2435 ret = _regmap_update_bits(map, reg, mask, val, change);
2436 map->unlock(map->lock_arg);
2437 return ret;
2438 }
2439 EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2440
2441 /**
2442 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2443 * register map asynchronously and report if
2444 * updated
2445 *
2446 * @map: Register map to update
2447 * @reg: Register to update
2448 * @mask: Bitmask to change
2449 * @val: New value for bitmask
2450 * @change: Boolean indicating if a write was done
2451 *
2452 * With most buses the read must be done synchronously so this is most
2453 * useful for devices with a cache which do not need to interact with
2454 * the hardware to determine the current register value.
2455 *
2456 * Returns zero for success, a negative number on error.
2457 */
2458 int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2459 unsigned int mask, unsigned int val,
2460 bool *change)
2461 {
2462 int ret;
2463
2464 map->lock(map->lock_arg);
2465
2466 map->async = true;
2467
2468 ret = _regmap_update_bits(map, reg, mask, val, change);
2469
2470 map->async = false;
2471
2472 map->unlock(map->lock_arg);
2473
2474 return ret;
2475 }
2476 EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2477
2478 void regmap_async_complete_cb(struct regmap_async *async, int ret)
2479 {
2480 struct regmap *map = async->map;
2481 bool wake;
2482
2483 trace_regmap_async_io_complete(map);
2484
2485 spin_lock(&map->async_lock);
2486 list_move(&async->list, &map->async_free);
2487 wake = list_empty(&map->async_list);
2488
2489 if (ret != 0)
2490 map->async_ret = ret;
2491
2492 spin_unlock(&map->async_lock);
2493
2494 if (wake)
2495 wake_up(&map->async_waitq);
2496 }
2497 EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2498
2499 static int regmap_async_is_done(struct regmap *map)
2500 {
2501 unsigned long flags;
2502 int ret;
2503
2504 spin_lock_irqsave(&map->async_lock, flags);
2505 ret = list_empty(&map->async_list);
2506 spin_unlock_irqrestore(&map->async_lock, flags);
2507
2508 return ret;
2509 }
2510
2511 /**
2512 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2513 *
2514 * @map: Map to operate on.
2515 *
2516 * Blocks until any pending asynchronous I/O has completed. Returns
2517 * an error code for any failed I/O operations.
2518 */
2519 int regmap_async_complete(struct regmap *map)
2520 {
2521 unsigned long flags;
2522 int ret;
2523
2524 /* Nothing to do with no async support */
2525 if (!map->bus || !map->bus->async_write)
2526 return 0;
2527
2528 trace_regmap_async_complete_start(map);
2529
2530 wait_event(map->async_waitq, regmap_async_is_done(map));
2531
2532 spin_lock_irqsave(&map->async_lock, flags);
2533 ret = map->async_ret;
2534 map->async_ret = 0;
2535 spin_unlock_irqrestore(&map->async_lock, flags);
2536
2537 trace_regmap_async_complete_done(map);
2538
2539 return ret;
2540 }
2541 EXPORT_SYMBOL_GPL(regmap_async_complete);
2542
2543 /**
2544 * regmap_register_patch: Register and apply register updates to be applied
2545 * on device initialistion
2546 *
2547 * @map: Register map to apply updates to.
2548 * @regs: Values to update.
2549 * @num_regs: Number of entries in regs.
2550 *
2551 * Register a set of register updates to be applied to the device
2552 * whenever the device registers are synchronised with the cache and
2553 * apply them immediately. Typically this is used to apply
2554 * corrections to be applied to the device defaults on startup, such
2555 * as the updates some vendors provide to undocumented registers.
2556 *
2557 * The caller must ensure that this function cannot be called
2558 * concurrently with either itself or regcache_sync().
2559 */
2560 int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
2561 int num_regs)
2562 {
2563 struct reg_default *p;
2564 int ret;
2565 bool bypass;
2566
2567 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2568 num_regs))
2569 return 0;
2570
2571 p = krealloc(map->patch,
2572 sizeof(struct reg_default) * (map->patch_regs + num_regs),
2573 GFP_KERNEL);
2574 if (p) {
2575 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2576 map->patch = p;
2577 map->patch_regs += num_regs;
2578 } else {
2579 return -ENOMEM;
2580 }
2581
2582 map->lock(map->lock_arg);
2583
2584 bypass = map->cache_bypass;
2585
2586 map->cache_bypass = true;
2587 map->async = true;
2588
2589 ret = _regmap_multi_reg_write(map, regs, num_regs);
2590
2591 map->async = false;
2592 map->cache_bypass = bypass;
2593
2594 map->unlock(map->lock_arg);
2595
2596 regmap_async_complete(map);
2597
2598 return ret;
2599 }
2600 EXPORT_SYMBOL_GPL(regmap_register_patch);
2601
2602 /*
2603 * regmap_get_val_bytes(): Report the size of a register value
2604 *
2605 * Report the size of a register value, mainly intended to for use by
2606 * generic infrastructure built on top of regmap.
2607 */
2608 int regmap_get_val_bytes(struct regmap *map)
2609 {
2610 if (map->format.format_write)
2611 return -EINVAL;
2612
2613 return map->format.val_bytes;
2614 }
2615 EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2616
2617 /**
2618 * regmap_get_max_register(): Report the max register value
2619 *
2620 * Report the max register value, mainly intended to for use by
2621 * generic infrastructure built on top of regmap.
2622 */
2623 int regmap_get_max_register(struct regmap *map)
2624 {
2625 return map->max_register ? map->max_register : -EINVAL;
2626 }
2627 EXPORT_SYMBOL_GPL(regmap_get_max_register);
2628
2629 /**
2630 * regmap_get_reg_stride(): Report the register address stride
2631 *
2632 * Report the register address stride, mainly intended to for use by
2633 * generic infrastructure built on top of regmap.
2634 */
2635 int regmap_get_reg_stride(struct regmap *map)
2636 {
2637 return map->reg_stride;
2638 }
2639 EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2640
2641 int regmap_parse_val(struct regmap *map, const void *buf,
2642 unsigned int *val)
2643 {
2644 if (!map->format.parse_val)
2645 return -EINVAL;
2646
2647 *val = map->format.parse_val(buf);
2648
2649 return 0;
2650 }
2651 EXPORT_SYMBOL_GPL(regmap_parse_val);
2652
2653 static int __init regmap_initcall(void)
2654 {
2655 regmap_debugfs_initcall();
2656
2657 return 0;
2658 }
2659 postcore_initcall(regmap_initcall);